gcc/testsuite/gcc.target/aarch64/sve/struct_move_2.c

   1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
   2 /* { dg-options "-O -msve-vector-bits=256 -mbig-endian --save-temps" } */
   3
   4 typedef char vnx16qi __attribute__((vector_size(32)));
   5 typedef struct { vnx16qi a[3]; } vnx48qi;
   6
   7 typedef short vnx8hi __attribute__((vector_size(32)));
   8 typedef struct { vnx8hi a[3]; } vnx24hi;
   9
  10 typedef int vnx4si __attribute__((vector_size(32)));
  11 typedef struct { vnx4si a[3]; } vnx12si;
  12
  13 typedef long vnx2di __attribute__((vector_size(32)));
  14 typedef struct { vnx2di a[3]; } vnx6di;
  15
  16 typedef _Float16 vnx8hf __attribute__((vector_size(32)));
  17 typedef struct { vnx8hf a[3]; } vnx24hf;
  18
  19 typedef float vnx4sf __attribute__((vector_size(32)));
  20 typedef struct { vnx4sf a[3]; } vnx12sf;
  21
  22 typedef double vnx2df __attribute__((vector_size(32)));
  23 typedef struct { vnx2df a[3]; } vnx6df;
  24
  25 #define TEST_TYPE(TYPE, REG1, REG2) \
  26   void \
  27   f_##TYPE (TYPE *a) \
  28   { \
  29     register TYPE x asm (#REG1) = a[0]; \
  30     asm volatile ("# test " #TYPE " 1 %S0" :: "w" (x)); \
  31     register TYPE y asm (#REG2) = x; \
  32     asm volatile ("# test " #TYPE " 2 %S0, %S1, %S2" \
  33                   : "=&w" (x) : "0" (x), "w" (y)); \
  34     a[1] = x; \
  35   }
  36
  37 TEST_TYPE (vnx48qi, z0, z3)
  38 TEST_TYPE (vnx24hi, z6, z2)
  39 TEST_TYPE (vnx12si, z12, z15)
  40 TEST_TYPE (vnx6di, z16, z13)
  41 TEST_TYPE (vnx24hf, z18, z1)
  42 TEST_TYPE (vnx12sf, z20, z23)
  43 TEST_TYPE (vnx6df, z26, z29)
  44
  45 /* { dg-final { scan-assembler {\tld1b\tz0.b, p[0-7]/z, \[x0\]\n} } } */
  46 /* { dg-final { scan-assembler {\tld1b\tz1.b, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
  47 /* { dg-final { scan-assembler {\tld1b\tz2.b, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
  48 /* { dg-final { scan-assembler { test vnx48qi 1 z0\n} } } */
  49 /* { dg-final { scan-assembler {\tmov\tz3.d, z0.d\n} } } */
  50 /* { dg-final { scan-assembler {\tmov\tz4.d, z1.d\n} } } */
  51 /* { dg-final { scan-assembler {\tmov\tz5.d, z2.d\n} } } */
  52 /* { dg-final { scan-assembler { test vnx48qi 2 z0, z0, z3\n} } } */
  53 /* { dg-final { scan-assembler {\tst1b\tz0.b, p[0-7], \[x0, #3, mul vl\]\n} } } */
  54 /* { dg-final { scan-assembler {\tst1b\tz1.b, p[0-7], \[x0, #4, mul vl\]\n} } } */
  55 /* { dg-final { scan-assembler {\tst1b\tz2.b, p[0-7], \[x0, #5, mul vl\]\n} } } */
  56
  57 /* { dg-final { scan-assembler {\tld1h\tz6.h, p[0-7]/z, \[x0\]\n} } } */
  58 /* { dg-final { scan-assembler {\tld1h\tz7.h, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
  59 /* { dg-final { scan-assembler {\tld1h\tz8.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
  60 /* { dg-final { scan-assembler { test vnx24hi 1 z6\n} } } */
  61 /* { dg-final { scan-assembler {\tmov\tz2.d, z6.d\n} } } */
  62 /* { dg-final { scan-assembler {\tmov\tz3.d, z7.d\n} } } */
  63 /* { dg-final { scan-assembler {\tmov\tz4.d, z8.d\n} } } */
  64 /* { dg-final { scan-assembler { test vnx24hi 2 z6, z6, z2\n} } } */
  65 /* { dg-final { scan-assembler {\tst1h\tz6.h, p[0-7], \[x0, #3, mul vl\]\n} } } */
  66 /* { dg-final { scan-assembler {\tst1h\tz7.h, p[0-7], \[x0, #4, mul vl\]\n} } } */
  67 /* { dg-final { scan-assembler {\tst1h\tz8.h, p[0-7], \[x0, #5, mul vl\]\n} } } */
  68
  69 /* { dg-final { scan-assembler {\tld1w\tz12.s, p[0-7]/z, \[x0\]\n} } } */
  70 /* { dg-final { scan-assembler {\tld1w\tz13.s, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
  71 /* { dg-final { scan-assembler {\tld1w\tz14.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
  72 /* { dg-final { scan-assembler { test vnx12si 1 z12\n} } } */
  73 /* { dg-final { scan-assembler {\tmov\tz15.d, z12.d\n} } } */
  74 /* { dg-final { scan-assembler {\tmov\tz16.d, z13.d\n} } } */
  75 /* { dg-final { scan-assembler {\tmov\tz17.d, z14.d\n} } } */
  76 /* { dg-final { scan-assembler { test vnx12si 2 z12, z12, z15\n} } } */
  77 /* { dg-final { scan-assembler {\tst1w\tz12.s, p[0-7], \[x0, #3, mul vl\]\n} } } */
  78 /* { dg-final { scan-assembler {\tst1w\tz13.s, p[0-7], \[x0, #4, mul vl\]\n} } } */
  79 /* { dg-final { scan-assembler {\tst1w\tz14.s, p[0-7], \[x0, #5, mul vl\]\n} } } */
  80
  81 /* { dg-final { scan-assembler {\tld1d\tz16.d, p[0-7]/z, \[x0\]\n} } } */
  82 /* { dg-final { scan-assembler {\tld1d\tz17.d, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
  83 /* { dg-final { scan-assembler {\tld1d\tz18.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
  84 /* { dg-final { scan-assembler { test vnx6di 1 z16\n} } } */
  85 /* { dg-final { scan-assembler {\tmov\tz13.d, z16.d\n} } } */
  86 /* { dg-final { scan-assembler {\tmov\tz14.d, z17.d\n} } } */
  87 /* { dg-final { scan-assembler {\tmov\tz15.d, z18.d\n} } } */
  88 /* { dg-final { scan-assembler { test vnx6di 2 z16, z16, z13\n} } } */
  89 /* { dg-final { scan-assembler {\tst1d\tz16.d, p[0-7], \[x0, #3, mul vl\]\n} } } */
  90 /* { dg-final { scan-assembler {\tst1d\tz17.d, p[0-7], \[x0, #4, mul vl\]\n} } } */
  91 /* { dg-final { scan-assembler {\tst1d\tz18.d, p[0-7], \[x0, #5, mul vl\]\n} } } */
  92
  93 /* { dg-final { scan-assembler {\tld1h\tz18.h, p[0-7]/z, \[x0\]\n} } } */
  94 /* { dg-final { scan-assembler {\tld1h\tz19.h, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
  95 /* { dg-final { scan-assembler {\tld1h\tz20.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
  96 /* { dg-final { scan-assembler { test vnx24hf 1 z18\n} } } */
  97 /* { dg-final { scan-assembler {\tmov\tz1.d, z18.d\n} } } */
  98 /* { dg-final { scan-assembler {\tmov\tz2.d, z19.d\n} } } */
  99 /* { dg-final { scan-assembler {\tmov\tz3.d, z20.d\n} } } */
 100 /* { dg-final { scan-assembler { test vnx24hf 2 z18, z18, z1\n} } } */
 101 /* { dg-final { scan-assembler {\tst1h\tz18.h, p[0-7], \[x0, #3, mul vl\]\n} } } */
 102 /* { dg-final { scan-assembler {\tst1h\tz19.h, p[0-7], \[x0, #4, mul vl\]\n} } } */
 103 /* { dg-final { scan-assembler {\tst1h\tz20.h, p[0-7], \[x0, #5, mul vl\]\n} } } */
 104
 105 /* { dg-final { scan-assembler {\tld1w\tz20.s, p[0-7]/z, \[x0\]\n} } } */
 106 /* { dg-final { scan-assembler {\tld1w\tz21.s, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
 107 /* { dg-final { scan-assembler {\tld1w\tz22.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
 108 /* { dg-final { scan-assembler { test vnx12sf 1 z20\n} } } */
 109 /* { dg-final { scan-assembler {\tmov\tz23.d, z20.d\n} } } */
 110 /* { dg-final { scan-assembler {\tmov\tz24.d, z21.d\n} } } */
 111 /* { dg-final { scan-assembler {\tmov\tz25.d, z22.d\n} } } */
 112 /* { dg-final { scan-assembler { test vnx12sf 2 z20, z20, z23\n} } } */
 113 /* { dg-final { scan-assembler {\tst1w\tz20.s, p[0-7], \[x0, #3, mul vl\]\n} } } */
 114 /* { dg-final { scan-assembler {\tst1w\tz21.s, p[0-7], \[x0, #4, mul vl\]\n} } } */
 115 /* { dg-final { scan-assembler {\tst1w\tz22.s, p[0-7], \[x0, #5, mul vl\]\n} } } */
 116
 117 /* { dg-final { scan-assembler {\tld1d\tz26.d, p[0-7]/z, \[x0\]\n} } } */
 118 /* { dg-final { scan-assembler {\tld1d\tz27.d, p[0-7]/z, \[x0, #1, mul vl\]\n} } } */
 119 /* { dg-final { scan-assembler {\tld1d\tz28.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
 120 /* { dg-final { scan-assembler { test vnx6df 1 z26\n} } } */
 121 /* { dg-final { scan-assembler {\tmov\tz29.d, z26.d\n} } } */
 122 /* { dg-final { scan-assembler {\tmov\tz30.d, z27.d\n} } } */
 123 /* { dg-final { scan-assembler {\tmov\tz31.d, z28.d\n} } } */
 124 /* { dg-final { scan-assembler { test vnx6df 2 z26, z26, z29\n} } } */
 125 /* { dg-final { scan-assembler {\tst1d\tz26.d, p[0-7], \[x0, #3, mul vl\]\n} } } */
 126 /* { dg-final { scan-assembler {\tst1d\tz27.d, p[0-7], \[x0, #4, mul vl\]\n} } } */
 127 /* { dg-final { scan-assembler {\tst1d\tz28.d, p[0-7], \[x0, #5, mul vl\]\n} } } */