1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O3 -msve-vector-bits=256 --save-temps" } */
6 typedef int8_t vnx16qi
__attribute__((vector_size(32)));
7 typedef int16_t vnx8hi
__attribute__((vector_size(32)));
8 typedef int32_t vnx4si
__attribute__((vector_size(32)));
9 typedef int64_t vnx2di
__attribute__((vector_size(32)));
12 void vmla_##TYPE (TYPE *x, TYPE y, TYPE z) \
14 register TYPE dst asm("z0"); \
15 register TYPE src1 asm("z2"); \
16 register TYPE src2 asm("z4"); \
20 asm volatile ("" :: "w" (dst), "w" (src1), "w" (src2)); \
21 dst = src2 - (dst * src1); \
22 asm volatile ("" :: "w" (dst)); \
31 /* { dg-final { scan-assembler-times {\tmsb\tz0\.b, p[0-7]/m, z2\.b, z4\.b} 1 } } */
32 /* { dg-final { scan-assembler-times {\tmsb\tz0\.h, p[0-7]/m, z2\.h, z4\.h} 1 } } */
33 /* { dg-final { scan-assembler-times {\tmsb\tz0\.s, p[0-7]/m, z2\.s, z4\.s} 1 } } */
34 /* { dg-final { scan-assembler-times {\tmsb\tz0\.d, p[0-7]/m, z2\.d, z4\.d} 1 } } */