1 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2 Alan Hayward <alan.hayward@arm.com>
3 David Sherwood <david.sherwood@arm.com>
5 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
6 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
7 (vect_use_loop_mask_for_alignment_p): New function.
8 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
9 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
10 niters_skip argument. Make sure that the first niters_skip elements
11 of the first iteration are inactive.
12 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
13 Update call to vect_set_loop_masks_directly.
14 (get_misalign_in_elems): New function, split out from...
15 (vect_gen_prolog_loop_niters): ...here.
16 (vect_update_init_of_dr): Take a code argument that specifies whether
17 the adjustment should be added or subtracted.
18 (vect_update_init_of_drs): Likewise.
19 (vect_prepare_for_masked_peels): New function.
20 (vect_do_peeling): Skip prologue peeling if we're using a mask
21 instead. Update call to vect_update_inits_of_drs.
22 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
24 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
25 alignment. Do not include the number of peeled iterations in
26 the minimum threshold in that case.
27 (vectorizable_induction): Adjust the start value down by
28 LOOP_VINFO_MASK_SKIP_NITERS iterations.
29 (vect_transform_loop): Call vect_prepare_for_masked_peels.
30 Take the number of skipped iterations into account when calculating
32 * tree-vect-stmts.c (vect_gen_while_not): New function.
34 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
35 Alan Hayward <alan.hayward@arm.com>
36 David Sherwood <david.sherwood@arm.com>
38 * doc/sourcebuild.texi (vect_fully_masked): Document.
39 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
41 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
43 (vect_analyze_loop_2): ...here. Don't check the vectorization
44 factor against the number of loop iterations if the loop is
47 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
48 Alan Hayward <alan.hayward@arm.com>
49 David Sherwood <david.sherwood@arm.com>
51 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
52 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
53 (dump_groups): Update accordingly.
54 (iv_use::mem_type): New member variable.
55 (address_p): New function.
56 (record_use): Add a mem_type argument and initialize the new
58 (record_group_use): Add a mem_type argument. Use address_p.
59 Remove obsolete null checks of base_object. Update call to record_use.
60 (find_interesting_uses_op): Update call to record_group_use.
61 (find_interesting_uses_cond): Likewise.
62 (find_interesting_uses_address): Likewise.
63 (get_mem_type_for_internal_fn): New function.
64 (find_address_like_use): Likewise.
65 (find_interesting_uses_stmt): Try find_address_like_use before
66 calling find_interesting_uses_op.
67 (addr_offset_valid_p): Use the iv mem_type field as the type
68 of the addressed memory.
69 (add_autoinc_candidates): Likewise.
70 (get_address_cost): Likewise.
71 (split_small_address_groups_p): Use address_p.
72 (split_address_groups): Likewise.
73 (add_iv_candidate_for_use): Likewise.
74 (autoinc_possible_for_pair): Likewise.
75 (rewrite_groups): Likewise.
76 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
77 (determine_group_iv_cost): Update after split of USE_ADDRESS.
78 (get_alias_ptr_type_for_ptr_address): New function.
79 (rewrite_use_address): Rewrite address uses in calls that were
80 identified by find_address_like_use.
82 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
83 Alan Hayward <alan.hayward@arm.com>
84 David Sherwood <david.sherwood@arm.com>
86 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
88 * gimple-expr.h (is_gimple_addressable: Likewise.
89 * gimple-expr.c (is_gimple_address): Likewise.
90 * internal-fn.c (expand_call_mem_ref): New function.
91 (expand_mask_load_optab_fn): Use it.
92 (expand_mask_store_optab_fn): Likewise.
94 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
95 Alan Hayward <alan.hayward@arm.com>
96 David Sherwood <david.sherwood@arm.com>
98 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
99 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
100 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
101 (cond_umax@var{mode}): Document.
102 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
103 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
104 (cond_umin_optab, cond_umax_optab): New optabs.
105 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
106 (COND_IOR, COND_XOR): New internal functions.
107 * internal-fn.h (get_conditional_internal_fn): Declare.
108 * internal-fn.c (cond_binary_direct): New macro.
109 (expand_cond_binary_optab_fn): Likewise.
110 (direct_cond_binary_optab_supported_p): Likewise.
111 (get_conditional_internal_fn): New function.
112 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
113 Cope with reduction statements that are vectorized as calls rather
115 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
116 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
117 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
118 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
119 (UNSPEC_COND_EOR): New unspecs.
120 (optab): Add mappings for them.
121 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
122 (sve_int_op, sve_fp_op): New int attributes.
124 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
125 Alan Hayward <alan.hayward@arm.com>
126 David Sherwood <david.sherwood@arm.com>
128 * optabs.def (while_ult_optab): New optab.
129 * doc/md.texi (while_ult@var{m}@var{n}): Document.
130 * internal-fn.def (WHILE_ULT): New internal function.
131 * internal-fn.h (direct_internal_fn_supported_p): New override
132 that takes two types as argument.
133 * internal-fn.c (while_direct): New macro.
134 (expand_while_optab_fn): New function.
135 (convert_optab_supported_p): Likewise.
136 (direct_while_optab_supported_p): New macro.
137 * wide-int.h (wi::udiv_ceil): New function.
138 * tree-vectorizer.h (rgroup_masks): New structure.
139 (vec_loop_masks): New typedef.
140 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
142 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
143 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
144 (vect_max_vf): New function.
145 (slpeel_make_loop_iterate_ntimes): Delete.
146 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
147 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
148 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
149 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
150 internal-fn.h, stor-layout.h and optabs-query.h.
151 (vect_set_loop_mask): New function.
152 (add_preheader_seq): Likewise.
153 (add_header_seq): Likewise.
154 (interleave_supported_p): Likewise.
155 (vect_maybe_permute_loop_masks): Likewise.
156 (vect_set_loop_masks_directly): Likewise.
157 (vect_set_loop_condition_masked): Likewise.
158 (vect_set_loop_condition_unmasked): New function, split out from
159 slpeel_make_loop_iterate_ntimes.
160 (slpeel_make_loop_iterate_ntimes): Rename to..
161 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
162 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
163 (vect_do_peeling): Update call accordingly.
164 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
166 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
167 mask_compare_type, can_fully_mask_p and fully_masked_p.
168 (release_vec_loop_masks): New function.
169 (_loop_vec_info): Use it to free the loop masks.
170 (can_produce_all_loop_masks_p): New function.
171 (vect_get_max_nscalars_per_iter): Likewise.
172 (vect_verify_full_masking): Likewise.
173 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
174 retries, and free the mask rgroups before retrying. Check loop-wide
175 reasons for disallowing fully-masked loops. Make the final decision
176 about whether use a fully-masked loop or not.
177 (vect_estimate_min_profitable_iters): Do not assume that peeling
178 for the number of iterations will be needed for fully-masked loops.
179 (vectorizable_reduction): Disable fully-masked loops.
180 (vectorizable_live_operation): Likewise.
181 (vect_halve_mask_nunits): New function.
182 (vect_double_mask_nunits): Likewise.
183 (vect_record_loop_mask): Likewise.
184 (vect_get_loop_mask): Likewise.
185 (vect_transform_loop): Handle the case in which the final loop
186 iteration might handle a partial vector. Call vect_set_loop_condition
187 instead of slpeel_make_loop_iterate_ntimes.
188 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
189 (check_load_store_masking): New function.
190 (prepare_load_store_mask): Likewise.
191 (vectorizable_store): Handle fully-masked loops.
192 (vectorizable_load): Likewise.
193 (supportable_widening_operation): Use vect_halve_mask_nunits for
195 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
196 (vect_gen_while): New function.
197 * config/aarch64/aarch64.md (umax<mode>3): New expander.
198 (aarch64_uqdec<mode>): New insn.
200 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
201 Alan Hayward <alan.hayward@arm.com>
202 David Sherwood <david.sherwood@arm.com>
204 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
205 (reduc_xor_scal_optab): New optabs.
206 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
207 (reduc_xor_scal_@var{m}): Document.
208 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
209 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
211 * fold-const-call.c (fold_const_call): Handle them.
212 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
213 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
214 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
215 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
216 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
217 (UNSPEC_XORV): New unspecs.
218 (optab): Add entries for them.
219 (BITWISEV): New int iterator.
220 (bit_reduc_op): New int attributes.
222 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
223 Alan Hayward <alan.hayward@arm.com>
224 David Sherwood <david.sherwood@arm.com>
226 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
227 * internal-fn.def (VEC_SHL_INSERT): New internal function.
228 * optabs.def (vec_shl_insert_optab): New optab.
229 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
230 (duplicate_and_interleave): Likewise.
231 * tree-vect-loop.c: Include internal-fn.h.
232 (neutral_op_for_slp_reduction): New function, split out from
233 get_initial_defs_for_reduction.
234 (get_initial_def_for_reduction): Handle option 2 for variable-length
235 vectors by loading the neutral value into a vector and then shifting
236 the initial value into element 0.
237 (get_initial_defs_for_reduction): Replace the code argument with
238 the neutral value calculated by neutral_op_for_slp_reduction.
239 Use gimple_build_vector for constant-length vectors.
240 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
241 but the first group_size elements have a neutral value.
242 Use duplicate_and_interleave otherwise.
243 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
244 Update call to get_initial_defs_for_reduction. Handle SLP
245 reductions for variable-length vectors by creating one vector
246 result for each scalar result, with the elements associated
247 with other scalar results stubbed out with the neutral value.
248 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
249 Require IFN_VEC_SHL_INSERT for double reductions on
250 variable-length vectors, or SLP reductions that have
251 a neutral value. Require can_duplicate_and_interleave_p
252 support for variable-length unchained SLP reductions if there
253 is no neutral value, such as for MIN/MAX reductions. Also require
254 the number of vector elements to be a multiple of the number of
255 SLP statements when doing variable-length unchained SLP reductions.
256 Update call to vect_create_epilog_for_reduction.
257 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
258 and remove initial values.
259 (duplicate_and_interleave): Make public.
260 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
261 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
263 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
264 Alan Hayward <alan.hayward@arm.com>
265 David Sherwood <david.sherwood@arm.com>
267 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
268 (can_duplicate_and_interleave_p): New function.
269 (vect_get_and_check_slp_defs): Take the vector of statements
270 rather than just the current one. Remove excess parentheses.
271 Restriction rejectinon of vect_constant_def and vect_external_def
272 for variable-length vectors to boolean types, or types for which
273 can_duplicate_and_interleave_p is false.
274 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
275 (duplicate_and_interleave): New function.
276 (vect_get_constant_vectors): Use gimple_build_vector for
277 constant-length vectors and suitable variable-length constant
278 vectors. Use duplicate_and_interleave for other variable-length
279 vectors. Don't defer the update when inserting new statements.
281 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
282 Alan Hayward <alan.hayward@arm.com>
283 David Sherwood <david.sherwood@arm.com>
285 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
286 min_profitable_iters doesn't go negative.
288 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
289 Alan Hayward <alan.hayward@arm.com>
290 David Sherwood <david.sherwood@arm.com>
292 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
293 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
294 * optabs.def (vec_mask_load_lanes_optab): New optab.
295 (vec_mask_store_lanes_optab): Likewise.
296 * internal-fn.def (MASK_LOAD_LANES): New internal function.
297 (MASK_STORE_LANES): Likewise.
298 * internal-fn.c (mask_load_lanes_direct): New macro.
299 (mask_store_lanes_direct): Likewise.
300 (expand_mask_load_optab_fn): Handle masked operations.
301 (expand_mask_load_lanes_optab_fn): New macro.
302 (expand_mask_store_optab_fn): Handle masked operations.
303 (expand_mask_store_lanes_optab_fn): New macro.
304 (direct_mask_load_lanes_optab_supported_p): Likewise.
305 (direct_mask_store_lanes_optab_supported_p): Likewise.
306 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
308 (vect_load_lanes_supported): Likewise.
309 * tree-vect-data-refs.c (strip_conversion): New function.
310 (can_group_stmts_p): Likewise.
311 (vect_analyze_data_ref_accesses): Use it instead of checking
312 for a pair of assignments.
313 (vect_store_lanes_supported): Take a masked_p parameter.
314 (vect_load_lanes_supported): Likewise.
315 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
316 vect_store_lanes_supported and vect_load_lanes_supported.
317 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
318 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
319 parameter. Don't allow gaps for masked accesses.
320 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
321 and vect_load_lanes_supported.
322 (get_load_store_type): Take a masked_p parameter and update
323 call to get_group_load_store_type.
324 (vectorizable_store): Update call to get_load_store_type.
325 Handle IFN_MASK_STORE_LANES.
326 (vectorizable_load): Update call to get_load_store_type.
327 Handle IFN_MASK_LOAD_LANES.
329 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
330 Alan Hayward <alan.hayward@arm.com>
331 David Sherwood <david.sherwood@arm.com>
333 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
335 * config/aarch64/aarch64-protos.h
336 (aarch64_sve_struct_memory_operand_p): Declare.
337 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
338 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
339 (VPRED, vpred): Handle SVE structure modes.
340 * config/aarch64/constraints.md (Utx): New constraint.
341 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
342 (aarch64_sve_struct_nonimmediate_operand): New predicates.
343 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
344 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
345 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
346 structure modes. Split into pieces after RA.
347 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
348 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
350 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
352 (aarch64_classify_address): Likewise.
353 (sizetochar): Move earlier in file.
354 (aarch64_print_operand): Handle SVE register lists.
355 (aarch64_array_mode): New function.
356 (aarch64_sve_struct_memory_operand_p): Likewise.
357 (TARGET_ARRAY_MODE): Redefine.
359 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
360 Alan Hayward <alan.hayward@arm.com>
361 David Sherwood <david.sherwood@arm.com>
363 * target.def (array_mode): New target hook.
364 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
365 * doc/tm.texi: Regenerate.
366 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
367 * hooks.c (hook_optmode_mode_uhwi_none): New function.
368 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
370 * stor-layout.c (mode_for_array): Likewise. Support polynomial
373 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
374 Alan Hayward <alan.hayward@arm.com>
375 David Sherwood <david.sherwood@arm.com>
377 * fold-const.c (fold_binary_loc): Check the argument types
378 rather than the result type when testing for a vector operation.
380 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
382 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
383 * doc/tm.texi: Regenerate.
385 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
386 Alan Hayward <alan.hayward@arm.com>
387 David Sherwood <david.sherwood@arm.com>
389 * doc/invoke.texi (-msve-vector-bits=): Document new option.
390 (sve): Document new AArch64 extension.
391 * doc/md.texi (w): Extend the description of the AArch64
392 constraint to include SVE vectors.
393 (Upl, Upa): Document new AArch64 predicate constraints.
394 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
396 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
397 (msve-vector-bits=): New option.
398 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
399 SVE when these are disabled.
400 (sve): New extension.
401 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
402 modes. Adjust their number of units based on aarch64_sve_vg.
403 (MAX_BITSIZE_MODE_ANY_MODE): Define.
404 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
405 aarch64_addr_query_type.
406 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
407 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
408 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
409 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
410 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
411 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
412 (aarch64_simd_imm_zero_p): Delete.
413 (aarch64_check_zero_based_sve_index_immediate): Declare.
414 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
415 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
416 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
417 (aarch64_sve_float_mul_immediate_p): Likewise.
418 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
420 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
421 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
422 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
423 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
424 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
425 (aarch64_regmode_natural_size): Likewise.
426 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
427 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
429 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
430 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
431 for VG and the SVE predicate registers.
432 (V_ALIASES): Add a "z"-prefixed alias.
433 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
434 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
435 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
436 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
437 (REG_CLASS_NAMES): Add entries for them.
438 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
439 and the predicate registers.
440 (aarch64_sve_vg): Declare.
441 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
442 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
443 (REGMODE_NATURAL_SIZE): Define.
444 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
446 * config/aarch64/aarch64.c: Include cfgrtl.h.
447 (simd_immediate_info): Add a constructor for series vectors,
448 and an associated step field.
449 (aarch64_sve_vg): New variable.
450 (aarch64_dbx_register_number): Handle VG and the predicate registers.
451 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
452 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
453 (VEC_ANY_DATA, VEC_STRUCT): New constants.
454 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
455 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
456 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
457 (aarch64_get_mask_mode): New functions.
458 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
459 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
460 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
461 predicate modes and predicate registers. Explicitly restrict
462 GPRs to modes of 16 bytes or smaller. Only allow FP registers
463 to store a vector mode if it is recognized by
464 aarch64_classify_vector_mode.
465 (aarch64_regmode_natural_size): New function.
466 (aarch64_hard_regno_caller_save_mode): Return the original mode
468 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
469 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
470 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
471 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
473 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
474 does not overlap dest if the function is frame-related. Handle
476 (aarch64_split_add_offset): New function.
477 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
478 them aarch64_add_offset.
479 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
480 and update call to aarch64_sub_sp.
481 (aarch64_add_cfa_expression): New function.
482 (aarch64_expand_prologue): Pass extra temporary registers to the
483 functions above. Handle the case in which we need to emit new
484 DW_CFA_expressions for registers that were originally saved
485 relative to the stack pointer, but now have to be expressed
486 relative to the frame pointer.
487 (aarch64_output_mi_thunk): Pass extra temporary registers to the
489 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
490 IP0 and IP1 values for SVE frames.
491 (aarch64_expand_vec_series): New function.
492 (aarch64_expand_sve_widened_duplicate): Likewise.
493 (aarch64_expand_sve_const_vector): Likewise.
494 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
495 Handle SVE constants. Use emit_move_insn to move a force_const_mem
496 into the register, rather than emitting a SET directly.
497 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
498 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
499 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
500 (offset_9bit_signed_scaled_p): New functions.
501 (aarch64_replicate_bitmask_imm): New function.
502 (aarch64_bitmask_imm): Use it.
503 (aarch64_cannot_force_const_mem): Reject expressions involving
504 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
505 (aarch64_classify_index): Handle SVE indices, by requiring
506 a plain register index with a scale that matches the element size.
507 (aarch64_classify_address): Handle SVE addresses. Assert that
508 the mode of the address is VOIDmode or an integer mode.
509 Update call to aarch64_classify_symbol.
510 (aarch64_classify_symbolic_expression): Update call to
511 aarch64_classify_symbol.
512 (aarch64_const_vec_all_in_range_p): New function.
513 (aarch64_print_vector_float_operand): Likewise.
514 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
515 "vN" for FP registers with SVE modes. Handle (const ...) vectors
516 and the FP immediates 1.0 and 0.5.
517 (aarch64_print_address_internal): Handle SVE addresses.
518 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
519 (aarch64_regno_regclass): Handle predicate registers.
520 (aarch64_secondary_reload): Handle big-endian reloads of SVE
522 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
523 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
524 (aarch64_convert_sve_vector_bits): New function.
525 (aarch64_override_options): Use it to handle -msve-vector-bits=.
526 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
528 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
529 Handle SVE vector and predicate modes. Accept VL-based constants
530 that need only one temporary register, and VL offsets that require
531 no temporary registers.
532 (aarch64_conditional_register_usage): Mark the predicate registers
533 as fixed if SVE isn't available.
534 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
535 Return true for SVE vector and predicate modes.
536 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
537 rather than an unsigned int. Handle SVE modes.
538 (aarch64_preferred_simd_mode): Update call accordingly. Handle
540 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
542 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
543 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
544 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
545 (aarch64_sve_float_mul_immediate_p): New functions.
546 (aarch64_sve_valid_immediate): New function.
547 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
548 Explicitly reject structure modes. Check for INDEX constants.
549 Handle PTRUE and PFALSE constants.
550 (aarch64_check_zero_based_sve_index_immediate): New function.
551 (aarch64_simd_imm_zero_p): Delete.
552 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
553 vector modes. Accept constants in the range of CNT[BHWD].
554 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
555 ask for an Advanced SIMD mode.
556 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
557 (aarch64_simd_vector_alignment): Handle SVE predicates.
558 (aarch64_vectorize_preferred_vector_alignment): New function.
559 (aarch64_simd_vector_alignment_reachable): Use it instead of
561 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
562 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
564 (MAX_VECT_LEN): Delete.
565 (expand_vec_perm_d): Add a vec_flags field.
566 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
567 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
568 (aarch64_evpc_ext): Don't apply a big-endian lane correction
570 (aarch64_evpc_rev): Rename to...
571 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
572 (aarch64_evpc_rev_global): New function.
573 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
574 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
576 (aarch64_evpc_sve_tbl): New function.
577 (aarch64_expand_vec_perm_const_1): Update after rename of
578 aarch64_evpc_rev. Handle SVE permutes too, trying
579 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
580 than aarch64_evpc_tbl.
581 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
582 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
583 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
584 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
585 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
586 (aarch64_expand_sve_vcond): New functions.
587 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
588 of aarch64_vector_mode_p.
589 (aarch64_dwarf_poly_indeterminate_value): New function.
590 (aarch64_compute_pressure_classes): Likewise.
591 (aarch64_can_change_mode_class): Likewise.
592 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
593 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
594 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
595 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
596 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
597 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
598 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
599 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
601 (Dn, Dl, Dr): Accept const as well as const_vector.
602 (Dz): Likewise. Compare against CONST0_RTX.
603 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
604 of "vector" where appropriate.
605 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
606 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
607 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
608 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
609 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
610 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
611 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
612 (v_int_equiv): Extend to SVE modes.
613 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
615 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
616 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
617 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
618 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
619 (SVE_COND_FP_CMP): New int iterators.
620 (perm_hilo): Handle the new unpack unspecs.
621 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
623 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
624 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
625 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
626 (aarch64_equality_operator, aarch64_constant_vector_operand)
627 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
628 (aarch64_sve_nonimmediate_operand): Likewise.
629 (aarch64_sve_general_operand): Likewise.
630 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
631 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
632 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
633 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
634 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
635 (aarch64_sve_float_arith_immediate): Likewise.
636 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
637 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
638 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
639 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
640 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
641 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
642 (aarch64_sve_float_arith_operand): Likewise.
643 (aarch64_sve_float_arith_with_sub_operand): Likewise.
644 (aarch64_sve_float_mul_operand): Likewise.
645 (aarch64_sve_vec_perm_operand): Likewise.
646 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
647 (aarch64_mov_operand): Accept const_poly_int and const_vector.
648 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
649 as well as const_vector.
650 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
651 in file. Use CONST0_RTX and CONSTM1_RTX.
652 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
653 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
654 Use aarch64_simd_imm_zero.
655 * config/aarch64/aarch64-sve.md: New file.
656 * config/aarch64/aarch64.md: Include it.
657 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
658 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
659 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
660 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
661 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
662 (sve): New attribute.
663 (enabled): Disable instructions with the sve attribute unless
665 (movqi, movhi): Pass CONST_POLY_INT operaneds through
666 aarch64_expand_mov_immediate.
667 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
668 CNT[BHSD] immediates.
669 (movti): Split CONST_POLY_INT moves into two halves.
670 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
671 Split additions that need a temporary here if the destination
672 is the stack pointer.
673 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
674 (*add<mode>3_poly_1): New instruction.
675 (set_clobber_cc): New expander.
677 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
679 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
680 parameter and use it instead of GET_MODE_SIZE (innermode). Use
681 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
682 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
683 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
684 Change innermode from fixed_mode_size to machine_mode.
685 (simplify_subreg): Update call accordingly. Handle a constant-sized
686 subreg of a variable-length CONST_VECTOR.
688 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
689 Alan Hayward <alan.hayward@arm.com>
690 David Sherwood <david.sherwood@arm.com>
692 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
693 (add_offset_to_base): New function, split out from...
694 (create_mem_ref): ...here. When handling a scale other than 1,
695 check first whether the address is valid without the offset.
696 Add it into the base if so, leaving the index and scale as-is.
698 2018-01-12 Jakub Jelinek <jakub@redhat.com>
701 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
702 fold_for_warn before checking if arg2 is INTEGER_CST.
704 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
706 * config/rs6000/predicates.md (load_multiple_operation): Delete.
707 (store_multiple_operation): Delete.
708 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
709 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
710 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
711 guarded by TARGET_STRING.
712 (rs6000_output_load_multiple): Delete.
713 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
714 OPTION_MASK_STRING / TARGET_STRING handling.
715 (print_operand) <'N', 'O'>: Add comment that these are unused now.
716 (const rs6000_opt_masks) <"string">: Change mask to 0.
717 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
718 (MASK_STRING): Delete.
719 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
721 (load_multiple): Delete.
728 (store_multiple): Delete.
735 (movmemsi_8reg): Delete.
736 (corresponding unnamed define_insn): Delete.
737 (movmemsi_6reg): Delete.
738 (corresponding unnamed define_insn): Delete.
739 (movmemsi_4reg): Delete.
740 (corresponding unnamed define_insn): Delete.
741 (movmemsi_2reg): Delete.
742 (corresponding unnamed define_insn): Delete.
743 (movmemsi_1reg): Delete.
744 (corresponding unnamed define_insn): Delete.
745 * config/rs6000/rs6000.opt (mno-string): New.
746 (mstring): Replace by deprecation warning stub.
747 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
749 2018-01-12 Jakub Jelinek <jakub@redhat.com>
751 * regrename.c (regrename_do_replace): If replacing the same
752 reg multiple times, try to reuse last created gen_raw_REG.
755 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
756 main to workaround a bug in GDB.
758 2018-01-12 Tom de Vries <tom@codesourcery.com>
761 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
763 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
765 PR rtl-optimization/80481
766 * ira-color.c (get_cap_member): New function.
767 (allocnos_conflict_by_live_ranges_p): Use it.
768 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
769 (setup_slot_coalesced_allocno_live_ranges): Ditto.
771 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
774 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
775 (*saddl_se_1): Ditto.
777 (*saddl_se_1): Ditto.
779 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
781 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
782 rather than wi::to_widest for DR_INITs.
783 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
784 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
785 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
787 (vect_analyze_group_access_1): Note that here.
789 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
791 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
792 polynomial type sizes.
794 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
796 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
797 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
798 (gimple_add_tmp_var): Likewise.
800 2018-01-12 Martin Liska <mliska@suse.cz>
802 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
803 (gimple_alloc_sizes): Likewise.
804 (dump_gimple_statistics): Use PRIu64 in printf format.
805 * gimple.h: Change uint64_t to int.
807 2018-01-12 Martin Liska <mliska@suse.cz>
809 * tree-core.h: Use uint64_t instead of int.
810 * tree.c (tree_node_counts): Likewise.
811 (tree_node_sizes): Likewise.
812 (dump_tree_statistics): Use PRIu64 in printf format.
814 2018-01-12 Martin Liska <mliska@suse.cz>
816 * Makefile.in: As qsort_chk is implemented in vec.c, add
817 vec.o to linkage of gencfn-macros.
818 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
819 passing the info to record_node_allocation_statistics.
820 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
822 * ggc-common.c (struct ggc_usage): Add operator== and use
823 it in operator< and compare function.
824 * mem-stats.h (struct mem_usage): Likewise.
825 * vec.c (struct vec_usage): Remove operator< and compare
826 function. Can be simply inherited.
828 2018-01-12 Martin Jambor <mjambor@suse.cz>
831 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
832 * tree-ssa-math-opts.c: Include domwalk.h.
833 (convert_mult_to_fma_1): New function.
834 (fma_transformation_info): New type.
835 (fma_deferring_state): Likewise.
836 (cancel_fma_deferring): New function.
837 (result_of_phi): Likewise.
838 (last_fma_candidate_feeds_initial_phi): Likewise.
839 (convert_mult_to_fma): Added deferring logic, split actual
840 transformation to convert_mult_to_fma_1.
841 (math_opts_dom_walker): New type.
842 (math_opts_dom_walker::after_dom_children): New method, body moved
843 here from pass_optimize_widening_mul::execute, added deferring logic
845 (pass_optimize_widening_mul::execute): Moved most of code to
846 math_opts_dom_walker::after_dom_children.
847 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
848 * config/i386/i386.c (ix86_option_override_internal): Added
849 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
851 2018-01-12 Richard Biener <rguenther@suse.de>
854 * dwarf2out.c (gen_variable_die): Do not reset old_die for
855 inline instance vars.
857 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
860 * config/rx/rx.c (rx_is_restricted_memory_address):
863 2018-01-12 Richard Biener <rguenther@suse.de>
865 PR tree-optimization/80846
866 * target.def (split_reduction): New target hook.
867 * targhooks.c (default_split_reduction): New function.
868 * targhooks.h (default_split_reduction): Declare.
869 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
870 target requests first reduce vectors by combining low and high
872 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
873 (get_vectype_for_scalar_type_and_size): Export.
874 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
875 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
876 * doc/tm.texi: Regenerate.
877 * config/i386/i386.c (ix86_split_reduction): Implement
878 TARGET_VECTORIZE_SPLIT_REDUCTION.
880 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
883 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
884 in PIC mode except for TARGET_VXWORKS_RTP.
885 * config/sparc/sparc.c: Include cfgrtl.h.
886 (TARGET_INIT_PIC_REG): Define.
887 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
888 (sparc_pic_register_p): New predicate.
889 (sparc_legitimate_address_p): Use it.
890 (sparc_legitimize_pic_address): Likewise.
891 (sparc_delegitimize_address): Likewise.
892 (sparc_mode_dependent_address_p): Likewise.
893 (gen_load_pcrel_sym): Remove 4th parameter.
894 (load_got_register): Adjust call to above. Remove obsolete stuff.
895 (sparc_expand_prologue): Do not call load_got_register here.
896 (sparc_flat_expand_prologue): Likewise.
897 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
898 (sparc_use_pseudo_pic_reg): New function.
899 (sparc_init_pic_reg): Likewise.
900 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
901 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
903 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
905 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
906 Add item for branch_cost.
908 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
910 PR rtl-optimization/83565
911 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
912 not extend the result to a larger mode for rotate operations.
913 (num_sign_bit_copies1): Likewise.
915 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
918 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
920 Use values-Xc.o for -pedantic.
921 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
923 2018-01-12 Martin Liska <mliska@suse.cz>
926 * ipa-devirt.c (final_warning_record::grow_type_warnings):
928 (possible_polymorphic_call_targets): Use it.
929 (ipa_devirt): Likewise.
931 2018-01-12 Martin Liska <mliska@suse.cz>
933 * profile-count.h (enum profile_quality): Use 0 as invalid
934 enum value of profile_quality.
936 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
938 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
939 -mext-string options.
941 2018-01-12 Richard Biener <rguenther@suse.de>
943 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
944 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
945 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
947 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
949 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
951 * configure.ac (--with-long-double-format): Add support for the
952 configuration option to change the default long double format on
954 * config.gcc (powerpc*-linux*-*): Likewise.
955 * configure: Regenerate.
956 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
957 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
958 used without modification.
960 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
962 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
963 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
964 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
965 MISC_BUILTIN_SPEC_BARRIER.
966 (rs6000_init_builtins): Likewise.
967 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
969 (speculation_barrier): New define_insn.
970 * doc/extend.texi: Document __builtin_speculation_barrier.
972 2018-01-11 Jakub Jelinek <jakub@redhat.com>
975 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
976 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
977 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
979 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
980 integral modes instead of "ss" and "sd".
981 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
982 vectors with 32-bit and 64-bit elements.
983 (vecdupssescalarmodesuffix): New mode attribute.
984 (vec_dup<mode>): Use it.
986 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
989 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
990 frame if argument is passed on stack.
992 2018-01-11 Jakub Jelinek <jakub@redhat.com>
995 * ree.c (combine_reaching_defs): Optimize also
996 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
997 reg2=any_extend(exp); reg1=reg2;, formatting fix.
999 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1002 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1004 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1007 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1008 after they are computed.
1010 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1012 PR tree-optimization/83695
1013 * gimple-loop-linterchange.cc
1014 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1015 reset cached scev information after interchange.
1016 (pass_linterchange::execute): Remove call to scev_reset_htab.
1018 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1020 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1021 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1022 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1023 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1024 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1025 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1026 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1027 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1028 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1029 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1030 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1031 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1032 (V_lane_reg): Likewise.
1033 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1035 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1036 (vfmal_lane_low<mode>_intrinsic,
1037 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1038 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1039 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1040 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1041 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1042 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1044 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1046 * config/arm/arm-cpus.in (fp16fml): New feature.
1047 (ALL_SIMD): Add fp16fml.
1048 (armv8.2-a): Add fp16fml as an option.
1049 (armv8.3-a): Likewise.
1050 (armv8.4-a): Add fp16fml as part of fp16.
1051 * config/arm/arm.h (TARGET_FP16FML): Define.
1052 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1054 * config/arm/arm-modes.def (V2HF): Define.
1055 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1056 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1057 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1058 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1059 vfmsl_low, vfmsl_high): New set of builtins.
1060 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1061 (vfml_op): New code attribute.
1062 (VFMLHALVES): New int iterator.
1063 (VFML, VFMLSEL): New mode attributes.
1064 (V_reg): Define mapping for V2HF.
1065 (V_hi, V_lo): New mode attributes.
1066 (VF_constraint): Likewise.
1067 (vfml_half, vfml_half_selector): New int attributes.
1068 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1070 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1071 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1073 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1074 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1075 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1076 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1078 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1079 Document new effective target and option set.
1081 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1083 * config/arm/arm-cpus.in (armv8_4): New feature.
1084 (ARMv8_4a): New fgroup.
1085 (armv8.4-a): New arch.
1086 * config/arm/arm-tables.opt: Regenerate.
1087 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1088 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1089 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1090 Add matching rules for -march=armv8.4-a and extensions.
1091 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1093 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1096 * config/rx/rx.md (BW): New mode attribute.
1097 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1099 2018-01-11 Richard Biener <rguenther@suse.de>
1101 PR tree-optimization/83435
1102 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1103 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1104 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1106 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1107 Alan Hayward <alan.hayward@arm.com>
1108 David Sherwood <david.sherwood@arm.com>
1110 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1112 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1113 (aarch64_print_address_internal): Use it to check for a zero offset.
1115 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1116 Alan Hayward <alan.hayward@arm.com>
1117 David Sherwood <david.sherwood@arm.com>
1119 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1120 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1121 Return a poly_int64 rather than a HOST_WIDE_INT.
1122 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1123 rather than a HOST_WIDE_INT.
1124 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1125 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1126 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1127 final_offset from HOST_WIDE_INT to poly_int64.
1128 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1129 to_constant when getting the number of units in an Advanced SIMD
1131 (aarch64_builtin_vectorized_function): Check for a constant number
1133 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1135 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1136 attribute instead of GET_MODE_NUNITS.
1137 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1138 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1139 GET_MODE_SIZE for fixed-size registers.
1140 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1141 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1142 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1143 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1144 (aarch64_print_operand, aarch64_print_address_internal)
1145 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1146 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1147 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1148 Handle polynomial GET_MODE_SIZE.
1149 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1150 wider than SImode without modification.
1151 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1152 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1153 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1154 passing and returning SVE modes.
1155 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1156 rather than GEN_INT.
1157 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1158 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1159 (aarch64_allocate_and_probe_stack_space): Likewise.
1160 (aarch64_layout_frame): Cope with polynomial offsets.
1161 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1162 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1164 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1165 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1166 poly_int64 rather than a HOST_WIDE_INT.
1167 (aarch64_get_separate_components, aarch64_process_components)
1168 (aarch64_expand_prologue, aarch64_expand_epilogue)
1169 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1170 (aarch64_anchor_offset): New function, split out from...
1171 (aarch64_legitimize_address): ...here.
1172 (aarch64_builtin_vectorization_cost): Handle polynomial
1173 TYPE_VECTOR_SUBPARTS.
1174 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1176 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1177 number of elements from the PARALLEL rather than the mode.
1178 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1179 rather than GET_MODE_BITSIZE.
1180 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1181 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1182 (aarch64_expand_vec_perm_const_1): Handle polynomial
1183 d->perm.length () and d->perm elements.
1184 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1185 Apply to_constant to d->perm elements.
1186 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1187 polynomial CONST_VECTOR_NUNITS.
1188 (aarch64_move_pointer): Take amount as a poly_int64 rather
1190 (aarch64_progress_pointer): Avoid temporary variable.
1191 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1192 the mode attribute instead of GET_MODE.
1194 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1195 Alan Hayward <alan.hayward@arm.com>
1196 David Sherwood <david.sherwood@arm.com>
1198 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1199 x exists before using it.
1200 (aarch64_add_constant_internal): Rename to...
1201 (aarch64_add_offset_1): ...this. Replace regnum with separate
1202 src and dest rtxes. Handle the case in which they're different,
1203 including when the offset is zero. Replace scratchreg with an rtx.
1204 Use 2 additions if there is no spare register into which we can
1205 move a 16-bit constant.
1206 (aarch64_add_constant): Delete.
1207 (aarch64_add_offset): Replace reg with separate src and dest
1208 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1209 Use aarch64_add_offset_1.
1210 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1211 an rtx rather than an int. Take the delta as a poly_int64
1212 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1213 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1214 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1215 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1216 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1218 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1219 aarch64_add_constant.
1221 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1223 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1224 Use scalar_float_mode.
1226 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1228 * config/aarch64/aarch64-simd.md
1229 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1230 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1231 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1232 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1233 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1234 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1235 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1236 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1237 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1238 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1240 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1243 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1244 targ_options->x_arm_arch_string is non NULL.
1246 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1248 * config/aarch64/aarch64.h
1249 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1251 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1254 * expmed.c (emit_store_flag_force): Swap if const op0
1255 and change VOIDmode to mode of op0.
1257 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1259 PR rtl-optimization/83761
1260 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1261 than bytes to mode_for_size.
1263 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1266 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1267 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1270 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1273 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1274 when in layout mode.
1275 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1276 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1279 2018-01-10 Michael Collison <michael.collison@arm.com>
1281 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1282 * config/aarch64/aarch64-option-extension.def: Add
1283 AARCH64_OPT_EXTENSION of 'fp16fml'.
1284 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1285 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1286 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1287 * config/aarch64/constraints.md (Ui7): New constraint.
1288 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1289 (VFMLA_SEL_W): Ditto.
1292 (VFMLA16_LOW): New int iterator.
1293 (VFMLA16_HIGH): Ditto.
1294 (UNSPEC_FMLAL): New unspec.
1295 (UNSPEC_FMLSL): Ditto.
1296 (UNSPEC_FMLAL2): Ditto.
1297 (UNSPEC_FMLSL2): Ditto.
1298 (f16mac): New code attribute.
1299 * config/aarch64/aarch64-simd-builtins.def
1300 (aarch64_fmlal_lowv2sf): Ditto.
1301 (aarch64_fmlsl_lowv2sf): Ditto.
1302 (aarch64_fmlalq_lowv4sf): Ditto.
1303 (aarch64_fmlslq_lowv4sf): Ditto.
1304 (aarch64_fmlal_highv2sf): Ditto.
1305 (aarch64_fmlsl_highv2sf): Ditto.
1306 (aarch64_fmlalq_highv4sf): Ditto.
1307 (aarch64_fmlslq_highv4sf): Ditto.
1308 (aarch64_fmlal_lane_lowv2sf): Ditto.
1309 (aarch64_fmlsl_lane_lowv2sf): Ditto.
1310 (aarch64_fmlal_laneq_lowv2sf): Ditto.
1311 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1312 (aarch64_fmlalq_lane_lowv4sf): Ditto.
1313 (aarch64_fmlsl_lane_lowv4sf): Ditto.
1314 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1315 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1316 (aarch64_fmlal_lane_highv2sf): Ditto.
1317 (aarch64_fmlsl_lane_highv2sf): Ditto.
1318 (aarch64_fmlal_laneq_highv2sf): Ditto.
1319 (aarch64_fmlsl_laneq_highv2sf): Ditto.
1320 (aarch64_fmlalq_lane_highv4sf): Ditto.
1321 (aarch64_fmlsl_lane_highv4sf): Ditto.
1322 (aarch64_fmlalq_laneq_highv4sf): Ditto.
1323 (aarch64_fmlsl_laneq_highv4sf): Ditto.
1324 * config/aarch64/aarch64-simd.md:
1325 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1326 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1327 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1328 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1329 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1330 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1331 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1332 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1333 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1334 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1335 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1336 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1337 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1338 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1339 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1340 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1341 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1342 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1343 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1344 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1345 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1346 (vfmlsl_low_u32): Ditto.
1347 (vfmlalq_low_u32): Ditto.
1348 (vfmlslq_low_u32): Ditto.
1349 (vfmlal_high_u32): Ditto.
1350 (vfmlsl_high_u32): Ditto.
1351 (vfmlalq_high_u32): Ditto.
1352 (vfmlslq_high_u32): Ditto.
1353 (vfmlal_lane_low_u32): Ditto.
1354 (vfmlsl_lane_low_u32): Ditto.
1355 (vfmlal_laneq_low_u32): Ditto.
1356 (vfmlsl_laneq_low_u32): Ditto.
1357 (vfmlalq_lane_low_u32): Ditto.
1358 (vfmlslq_lane_low_u32): Ditto.
1359 (vfmlalq_laneq_low_u32): Ditto.
1360 (vfmlslq_laneq_low_u32): Ditto.
1361 (vfmlal_lane_high_u32): Ditto.
1362 (vfmlsl_lane_high_u32): Ditto.
1363 (vfmlal_laneq_high_u32): Ditto.
1364 (vfmlsl_laneq_high_u32): Ditto.
1365 (vfmlalq_lane_high_u32): Ditto.
1366 (vfmlslq_lane_high_u32): Ditto.
1367 (vfmlalq_laneq_high_u32): Ditto.
1368 (vfmlslq_laneq_high_u32): Ditto.
1369 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1370 (AARCH64_FL_FOR_ARCH8_4): New.
1371 (AARCH64_ISA_F16FML): New ISA flag.
1372 (TARGET_F16FML): New feature flag for fp16fml.
1373 (doc/invoke.texi): Document new fp16fml option.
1375 2018-01-10 Michael Collison <michael.collison@arm.com>
1377 * config/aarch64/aarch64-builtins.c:
1378 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1379 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1380 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1381 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1382 (AARCH64_ISA_SHA3): New ISA flag.
1383 (TARGET_SHA3): New feature flag for sha3.
1384 * config/aarch64/iterators.md (sha512_op): New int attribute.
1385 (CRYPTO_SHA512): New int iterator.
1386 (UNSPEC_SHA512H): New unspec.
1387 (UNSPEC_SHA512H2): Ditto.
1388 (UNSPEC_SHA512SU0): Ditto.
1389 (UNSPEC_SHA512SU1): Ditto.
1390 * config/aarch64/aarch64-simd-builtins.def
1391 (aarch64_crypto_sha512hqv2di): New builtin.
1392 (aarch64_crypto_sha512h2qv2di): Ditto.
1393 (aarch64_crypto_sha512su0qv2di): Ditto.
1394 (aarch64_crypto_sha512su1qv2di): Ditto.
1395 (aarch64_eor3qv8hi): Ditto.
1396 (aarch64_rax1qv2di): Ditto.
1397 (aarch64_xarqv2di): Ditto.
1398 (aarch64_bcaxqv8hi): Ditto.
1399 * config/aarch64/aarch64-simd.md:
1400 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1401 (aarch64_crypto_sha512su0qv2di): Ditto.
1402 (aarch64_crypto_sha512su1qv2di): Ditto.
1403 (aarch64_eor3qv8hi): Ditto.
1404 (aarch64_rax1qv2di): Ditto.
1405 (aarch64_xarqv2di): Ditto.
1406 (aarch64_bcaxqv8hi): Ditto.
1407 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1408 (vsha512h2q_u64): Ditto.
1409 (vsha512su0q_u64): Ditto.
1410 (vsha512su1q_u64): Ditto.
1411 (veor3q_u16): Ditto.
1412 (vrax1q_u64): Ditto.
1414 (vbcaxq_u16): Ditto.
1415 * config/arm/types.md (crypto_sha512): New type attribute.
1416 (crypto_sha3): Ditto.
1417 (doc/invoke.texi): Document new sha3 option.
1419 2018-01-10 Michael Collison <michael.collison@arm.com>
1421 * config/aarch64/aarch64-builtins.c:
1422 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1423 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1424 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1425 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1426 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1427 (AARCH64_ISA_SM4): New ISA flag.
1428 (TARGET_SM4): New feature flag for sm4.
1429 * config/aarch64/aarch64-simd-builtins.def
1430 (aarch64_sm3ss1qv4si): Ditto.
1431 (aarch64_sm3tt1aq4si): Ditto.
1432 (aarch64_sm3tt1bq4si): Ditto.
1433 (aarch64_sm3tt2aq4si): Ditto.
1434 (aarch64_sm3tt2bq4si): Ditto.
1435 (aarch64_sm3partw1qv4si): Ditto.
1436 (aarch64_sm3partw2qv4si): Ditto.
1437 (aarch64_sm4eqv4si): Ditto.
1438 (aarch64_sm4ekeyqv4si): Ditto.
1439 * config/aarch64/aarch64-simd.md:
1440 (aarch64_sm3ss1qv4si): Ditto.
1441 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1442 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1443 (aarch64_sm4eqv4si): Ditto.
1444 (aarch64_sm4ekeyqv4si): Ditto.
1445 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1446 (sm3part_op): Ditto.
1447 (CRYPTO_SM3TT): Ditto.
1448 (CRYPTO_SM3PART): Ditto.
1449 (UNSPEC_SM3SS1): New unspec.
1450 (UNSPEC_SM3TT1A): Ditto.
1451 (UNSPEC_SM3TT1B): Ditto.
1452 (UNSPEC_SM3TT2A): Ditto.
1453 (UNSPEC_SM3TT2B): Ditto.
1454 (UNSPEC_SM3PARTW1): Ditto.
1455 (UNSPEC_SM3PARTW2): Ditto.
1456 (UNSPEC_SM4E): Ditto.
1457 (UNSPEC_SM4EKEY): Ditto.
1458 * config/aarch64/constraints.md (Ui2): New constraint.
1459 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1460 * config/arm/types.md (crypto_sm3): New type attribute.
1461 (crypto_sm4): Ditto.
1462 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1463 (vsm3tt1aq_u32): Ditto.
1464 (vsm3tt1bq_u32): Ditto.
1465 (vsm3tt2aq_u32): Ditto.
1466 (vsm3tt2bq_u32): Ditto.
1467 (vsm3partw1q_u32): Ditto.
1468 (vsm3partw2q_u32): Ditto.
1469 (vsm4eq_u32): Ditto.
1470 (vsm4ekeyq_u32): Ditto.
1471 (doc/invoke.texi): Document new sm4 option.
1473 2018-01-10 Michael Collison <michael.collison@arm.com>
1475 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1476 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1477 (AARCH64_FL_FOR_ARCH8_4): New.
1478 (AARCH64_FL_V8_4): New flag.
1479 (doc/invoke.texi): Document new armv8.4-a option.
1481 2018-01-10 Michael Collison <michael.collison@arm.com>
1483 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1484 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1485 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1486 * config/aarch64/aarch64-option-extension.def: Add
1487 AARCH64_OPT_EXTENSION of 'sha2'.
1488 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1489 (crypto): Disable sha2 and aes if crypto disabled.
1490 (crypto): Enable aes and sha2 if enabled.
1491 (simd): Disable sha2 and aes if simd disabled.
1492 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1494 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1495 (TARGET_SHA2): New feature flag for sha2.
1496 (TARGET_AES): New feature flag for aes.
1497 * config/aarch64/aarch64-simd.md:
1498 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1499 conditional on TARGET_AES.
1500 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1501 (aarch64_crypto_sha1hsi): Make pattern conditional
1503 (aarch64_crypto_sha1hv4si): Ditto.
1504 (aarch64_be_crypto_sha1hv4si): Ditto.
1505 (aarch64_crypto_sha1su1v4si): Ditto.
1506 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1507 (aarch64_crypto_sha1su0v4si): Ditto.
1508 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1509 (aarch64_crypto_sha256su0v4si): Ditto.
1510 (aarch64_crypto_sha256su1v4si): Ditto.
1511 (doc/invoke.texi): Document new aes and sha2 options.
1513 2018-01-10 Martin Sebor <msebor@redhat.com>
1515 PR tree-optimization/83781
1516 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1519 2018-01-11 Martin Sebor <msebor@gmail.com>
1520 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1522 PR tree-optimization/83501
1523 PR tree-optimization/81703
1525 * tree-ssa-strlen.c (get_string_cst): Rename...
1526 (get_string_len): ...to this. Handle global constants.
1527 (handle_char_store): Adjust.
1529 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
1530 Jim Wilson <jimw@sifive.com>
1532 * config/riscv/riscv-protos.h (riscv_output_return): New.
1533 * config/riscv/riscv.c (struct machine_function): New naked_p field.
1534 (riscv_attribute_table, riscv_output_return),
1535 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1536 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1537 (riscv_compute_frame_info): Only compute frame->mask if not a naked
1539 (riscv_expand_prologue): Add early return for naked function.
1540 (riscv_expand_epilogue): Likewise.
1541 (riscv_function_ok_for_sibcall): Return false for naked function.
1542 (riscv_set_current_function): New.
1543 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
1544 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
1545 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
1546 * doc/extend.texi (RISC-V Function Attributes): New.
1548 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
1550 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
1551 check for 128-bit long double before checking TCmode.
1552 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
1553 128-bit long doubles before checking TFmode or TCmode.
1554 (FLOAT128_IBM_P): Likewise.
1556 2018-01-10 Martin Sebor <msebor@redhat.com>
1558 PR tree-optimization/83671
1559 * builtins.c (c_strlen): Unconditionally return zero for the empty
1561 Use -Warray-bounds for warnings.
1562 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
1563 for non-constant array indices with COMPONENT_REF, arrays of
1564 arrays, and pointers to arrays.
1565 (gimple_fold_builtin_strlen): Determine and set length range for
1566 non-constant character arrays.
1568 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
1571 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
1574 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
1576 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
1578 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1581 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
1582 VECTOR_MEM_ALTIVEC_OR_VSX_P.
1583 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
1584 indexed_or_indirect_operand predicate.
1585 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
1586 (*vsx_le_perm_load_v8hi): Likewise.
1587 (*vsx_le_perm_load_v16qi): Likewise.
1588 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
1589 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
1590 (*vsx_le_perm_store_v8hi): Likewise.
1591 (*vsx_le_perm_store_v16qi): Likewise.
1592 (eight unnamed splitters): Likewise.
1594 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1596 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
1597 * config/rs6000/emmintrin.h: Likewise.
1598 * config/rs6000/mmintrin.h: Likewise.
1599 * config/rs6000/xmmintrin.h: Likewise.
1601 2018-01-10 David Malcolm <dmalcolm@redhat.com>
1604 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
1606 * tree.c (tree_nop_conversion): Return true for location wrapper
1608 (maybe_wrap_with_location): New function.
1609 (selftest::check_strip_nops): New function.
1610 (selftest::test_location_wrappers): New function.
1611 (selftest::tree_c_tests): Call it.
1612 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
1613 (maybe_wrap_with_location): New decl.
1614 (EXPR_LOCATION_WRAPPER_P): New macro.
1615 (location_wrapper_p): New inline function.
1616 (tree_strip_any_location_wrapper): New inline function.
1618 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
1621 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
1622 stack_realign_offset for the largest alignment of stack slot
1624 (ix86_find_max_used_stack_alignment): New function.
1625 (ix86_finalize_stack_frame_flags): Use it. Set
1626 max_used_stack_alignment if we don't realign stack.
1627 * config/i386/i386.h (machine_function): Add
1628 max_used_stack_alignment.
1630 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
1632 * config/arm/arm.opt (-mbranch-cost): New option.
1633 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
1636 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
1639 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
1640 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
1642 2018-01-10 Richard Biener <rguenther@suse.de>
1645 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
1646 early out so it also covers the case where we have a non-NULL
1649 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
1651 PR tree-optimization/83753
1652 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
1653 for non-strided grouped accesses if the number of elements is 1.
1655 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1658 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
1659 * i386.h (TARGET_USE_GATHER): Define.
1660 * x86-tune.def (X86_TUNE_USE_GATHER): New.
1662 2018-01-10 Martin Liska <mliska@suse.cz>
1665 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
1666 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
1668 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
1669 CLEANUP_NO_PARTITIONING is not set.
1671 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
1673 * doc/rtl.texi: Remove documentation of (const ...) wrappers
1674 for vectors, as a partial revert of r254296.
1675 * rtl.h (const_vec_p): Delete.
1676 (const_vec_duplicate_p): Don't test for vector CONSTs.
1677 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
1678 * expmed.c (make_tree): Likewise.
1681 * common.md (E, F): Use CONSTANT_P instead of checking for
1683 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
1684 checking for CONST_VECTOR.
1686 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1689 * predict.c (force_edge_cold): Handle in more sane way edges
1692 2018-01-09 Carl Love <cel@us.ibm.com>
1694 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
1696 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
1697 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
1698 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
1699 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
1700 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
1701 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
1702 * config/rs6000/rs6000-protos.h: Add extern defition for
1703 rs6000_generate_float2_double_code.
1704 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
1706 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
1707 (float2_v2df): Add define_expand.
1709 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
1712 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
1713 op_mode in the force_to_mode call.
1715 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1717 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
1718 instead of checking each element individually.
1719 (aarch64_evpc_uzp): Likewise.
1720 (aarch64_evpc_zip): Likewise.
1721 (aarch64_evpc_ext): Likewise.
1722 (aarch64_evpc_rev): Likewise.
1723 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
1724 instead of checking each element individually. Return true without
1726 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
1727 whether all selected elements come from the same input, instead of
1728 checking each element individually. Remove calls to gen_rtx_REG,
1729 start_sequence and end_sequence and instead assert that no rtl is
1732 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1734 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
1735 order of HIGH and CONST checks.
1737 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1739 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
1740 if the destination isn't an SSA_NAME.
1742 2018-01-09 Richard Biener <rguenther@suse.de>
1744 PR tree-optimization/83668
1745 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
1747 (canonicalize_loop_form): ... here, renamed from ...
1748 (canonicalize_loop_closed_ssa_form): ... this and amended to
1749 swap successor edges for loop exit blocks to make us use
1750 the RPO order we need for initial schedule generation.
1752 2018-01-09 Joseph Myers <joseph@codesourcery.com>
1754 PR tree-optimization/64811
1755 * match.pd: When optimizing comparisons with Inf, avoid
1756 introducing or losing exceptions from comparisons with NaN.
1758 2018-01-09 Martin Liska <mliska@suse.cz>
1761 * asan.c (shadow_mem_size): Add gcc_assert.
1763 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
1765 Don't save registers in main().
1768 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
1769 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
1770 * config/avr/avr.c (avr_set_current_function): Don't error if
1771 naked, OS_task or OS_main are specified at the same time.
1772 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
1774 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
1776 * common/config/avr/avr-common.c (avr_option_optimization_table):
1777 Switch on -mmain-is-OS_task for optimizing compilations.
1779 2018-01-09 Richard Biener <rguenther@suse.de>
1781 PR tree-optimization/83572
1782 * graphite.c: Include cfganal.h.
1783 (graphite_transform_loops): Connect infinite loops to exit
1784 and remove fake edges at the end.
1786 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1788 * ipa-inline.c (edge_badness): Revert accidental checkin.
1790 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1793 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
1794 symbols; not inline clones.
1796 2018-01-09 Jakub Jelinek <jakub@redhat.com>
1799 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
1800 hard registers. Formatting fixes.
1802 PR preprocessor/83722
1803 * gcc.c (try_generate_repro): Pass
1804 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
1805 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
1808 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
1809 Kito Cheng <kito.cheng@gmail.com>
1811 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
1812 (riscv_leaf_function_p): Delete.
1813 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
1815 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1817 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
1819 (do_ifelse): New function.
1820 (do_isel): New function.
1821 (do_sub3): New function.
1822 (do_add3): New function.
1823 (do_load_mask_compare): New function.
1824 (do_overlap_load_compare): New function.
1825 (expand_compare_loop): New function.
1826 (expand_block_compare): Call expand_compare_loop() when appropriate.
1827 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
1829 (-mblock-compare-inline-loop-limit): New option.
1831 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1834 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
1835 Reverse order of second and third operands in first alternative.
1836 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
1837 of first and second elements in UNSPEC_VPERMR vector.
1838 (altivec_expand_vec_perm_le): Likewise.
1840 2017-01-08 Jeff Law <law@redhat.com>
1842 PR rtl-optimizatin/81308
1843 * tree-switch-conversion.c (cfg_altered): New file scoped static.
1844 (process_switch): If group_case_labels makes a change, then set
1846 (pass_convert_switch::execute): If a switch is converted, then
1847 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
1849 PR rtl-optimization/81308
1850 * recog.c (split_all_insns): Conditionally cleanup the CFG after
1853 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
1855 PR target/83663 - Revert r255946
1856 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
1857 generation for cases where splatting a value is not useful.
1858 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
1859 across a vec_duplicate and a paradoxical subreg forming a vector
1860 mode to a vec_concat.
1862 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1864 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
1865 -march=armv8.3-a variants.
1866 * config/arm/t-multilib: Likewise.
1867 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
1869 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1871 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
1873 (cceq_ior_compare_complement): Give it a name so I can use it, and
1874 change boolean_or_operator predicate to boolean_operator so it can
1875 be used to generate a crand.
1876 (eqne): New code iterator.
1877 (bd/bd_neg): New code_attrs.
1878 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
1879 a single define_insn.
1880 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
1881 decrement (bdnzt/bdnzf/bdzt/bdzf).
1882 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
1883 with the new names of the branch decrement patterns, and added the
1884 names of the branch decrement conditional patterns.
1886 2018-01-08 Richard Biener <rguenther@suse.de>
1888 PR tree-optimization/83563
1889 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
1892 2018-01-08 Richard Biener <rguenther@suse.de>
1895 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
1897 2018-01-08 Richard Biener <rguenther@suse.de>
1899 PR tree-optimization/83685
1900 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
1901 references to abnormals.
1903 2018-01-08 Richard Biener <rguenther@suse.de>
1906 * dwarf2out.c (output_indirect_strings): Handle empty
1907 skeleton_debug_str_hash.
1908 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
1910 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1912 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
1913 (emit_store_direct): Likewise.
1914 (arc_trampoline_adjust_address): Likewise.
1915 (arc_asm_trampoline_template): New function.
1916 (arc_initialize_trampoline): Use asm_trampoline_template.
1917 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
1918 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
1919 * config/arc/arc.md (flush_icache): Delete pattern.
1921 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1923 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
1924 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
1927 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1930 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
1931 by not USED_FOR_TARGET.
1932 (make_pass_resolve_sw_modes): Likewise.
1934 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1936 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
1939 2018-01-08 Richard Biener <rguenther@suse.de>
1942 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
1944 2018-01-08 Richard Biener <rguenther@suse.de>
1947 * match.pd ((t * 2) / 2) -> t): Add missing :c.
1949 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
1952 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
1953 basic blocks with a small number of successors.
1954 (convert_control_dep_chain_into_preds): Improve handling of
1956 (dump_predicates): Split apart into...
1957 (dump_pred_chain): ...here...
1958 (dump_pred_info): ...and here.
1959 (can_one_predicate_be_invalidated_p): Add debugging printfs.
1960 (can_chain_union_be_invalidated_p): Improve check for invalidation
1962 (uninit_uses_cannot_happen): Avoid unnecessary if
1963 convert_control_dep_chain_into_preds yielded nothing.
1965 2018-01-06 Martin Sebor <msebor@redhat.com>
1967 PR tree-optimization/83640
1968 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
1969 subtracting negative offset from size.
1970 (builtin_access::overlap): Adjust offset bounds of the access to fall
1971 within the size of the object if possible.
1973 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
1975 PR rtl-optimization/83699
1976 * expmed.c (extract_bit_field_1): Restrict the vector usage of
1977 extract_bit_field_as_subreg to cases in which the extracted
1978 value is also a vector.
1980 * lra-constraints.c (process_alt_operands): Test for the equivalence
1981 substitutions when detecting a possible reload cycle.
1983 2018-01-06 Jakub Jelinek <jakub@redhat.com>
1986 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
1987 by default if flag_selective_schedling{,2}. Formatting fixes.
1989 PR rtl-optimization/83682
1990 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
1991 if it has non-VECTOR_MODE element mode.
1992 (vec_duplicate_p): Likewise.
1995 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
1996 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
1998 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2001 * config/i386/i386-builtin.def
2002 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2003 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2004 Require also OPTION_MASK_ISA_AVX512F in addition to
2005 OPTION_MASK_ISA_GFNI.
2006 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2007 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2008 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2009 to OPTION_MASK_ISA_GFNI.
2010 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2011 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2012 OPTION_MASK_ISA_AVX512BW.
2013 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2014 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2015 addition to OPTION_MASK_ISA_GFNI.
2016 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2017 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2018 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2019 to OPTION_MASK_ISA_GFNI.
2020 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2021 a requirement for all ISAs rather than any of them with a few
2023 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2025 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2026 bitmasks to be enabled with 3 exceptions, instead of requiring any
2027 enabled ISA with lots of exceptions.
2028 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2029 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2030 Change avx512bw in isa attribute to avx512f.
2031 * config/i386/sgxintrin.h: Add license boilerplate.
2032 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2033 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2034 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2035 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2037 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2038 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2039 temporarily sse2 rather than sse if not enabled already.
2042 * config/i386/sse.md (VI248_VLBW): Rename to ...
2043 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2044 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2045 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2046 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2047 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2048 mode iterator instead of VI248_VLBW.
2050 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2052 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2053 (record_modified): Skip clobbers; add debug output.
2054 (param_change_prob): Use sreal frequencies.
2056 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2058 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2059 punt for user-aligned variables.
2061 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2063 * tree-chrec.c (chrec_contains_symbols): Return true for
2066 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2069 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2070 of (x|y) == x for BICS pattern.
2072 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2074 PR tree-optimization/83605
2075 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2076 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2079 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2081 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2082 * config/epiphany/rtems.h: New file.
2084 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2085 Uros Bizjak <ubizjak@gmail.com>
2088 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2089 QIreg_operand instead of register_operand predicate.
2090 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2091 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2092 comments instead of -fmitigate[-_]rop.
2094 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2097 * cgraphunit.c (symbol_table::compile): Switch to text_section
2098 before calling assembly_start debug hook.
2099 * run-rtl-passes.c (run_rtl_passes): Likewise.
2102 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2104 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2105 range_int_cst_p rather than !symbolic_range_p before calling
2106 extract_range_from_multiplicative_op_1.
2108 2017-01-04 Jeff Law <law@redhat.com>
2110 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2111 redundant test in assertion.
2113 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2115 * doc/rtl.texi: Document machine_mode wrapper classes.
2117 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2119 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2122 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2124 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2125 the VEC_PERM_EXPR fold to fail.
2127 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2130 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2131 to switched_sections.
2133 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2136 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2139 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2142 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2143 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2145 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2148 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2149 is BLKmode and bitpos not zero or mode change is needed.
2151 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2154 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2157 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2160 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2161 instead of MULT rtx. Update all corresponding splitters.
2163 (*ssub<modesuffix>): Ditto.
2165 (*cmp_sadd_di): Update split patterns.
2166 (*cmp_sadd_si): Ditto.
2167 (*cmp_sadd_sidi): Ditto.
2168 (*cmp_ssub_di): Ditto.
2169 (*cmp_ssub_si): Ditto.
2170 (*cmp_ssub_sidi): Ditto.
2171 * config/alpha/predicates.md (const23_operand): New predicate.
2172 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2173 Look for ASHIFT, not MULT inner operand.
2174 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2176 2018-01-04 Martin Liska <mliska@suse.cz>
2178 PR gcov-profile/83669
2179 * gcov.c (output_intermediate_file): Add version to intermediate
2181 * doc/gcov.texi: Document new field 'version' in intermediate
2182 file format. Fix location of '-k' option of gcov command.
2184 2018-01-04 Martin Liska <mliska@suse.cz>
2187 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2189 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2191 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2193 2018-01-03 Martin Sebor <msebor@redhat.com>
2195 PR tree-optimization/83655
2196 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2197 checking calls with invalid arguments.
2199 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2201 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2202 (vectorizable_mask_load_store): Delete.
2203 (vectorizable_call): Return false for masked loads and stores.
2204 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2205 instead of gimple_assign_rhs1.
2206 (vectorizable_load): Handle IFN_MASK_LOAD.
2207 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2209 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2211 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2213 (vectorizable_mask_load_store): ...here.
2214 (vectorizable_load): ...and here.
2216 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2218 * tree-vect-stmts.c (vect_build_all_ones_mask)
2219 (vect_build_zero_merge_argument): New functions, split out from...
2220 (vectorizable_load): ...here.
2222 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2224 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2226 (vectorizable_mask_load_store): ...here.
2227 (vectorizable_store): ...and here.
2229 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2231 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2233 (vectorizable_mask_load_store): ...here.
2235 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2237 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2238 (vect_model_store_cost): Take a vec_load_store_type instead of a
2240 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2241 (vect_model_store_cost): Take a vec_load_store_type instead of a
2243 (vectorizable_mask_load_store): Update accordingly.
2244 (vectorizable_store): Likewise.
2245 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2247 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2249 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2250 IFN_MASK_LOAD calls here rather than...
2251 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2253 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2254 Alan Hayward <alan.hayward@arm.com>
2255 David Sherwood <david.sherwood@arm.com>
2257 * expmed.c (extract_bit_field_1): For vector extracts,
2258 fall back to extract_bit_field_as_subreg if vec_extract
2261 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2262 Alan Hayward <alan.hayward@arm.com>
2263 David Sherwood <david.sherwood@arm.com>
2265 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2266 they are variable or constant sized.
2267 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2268 slots for constant-sized data.
2270 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2271 Alan Hayward <alan.hayward@arm.com>
2272 David Sherwood <david.sherwood@arm.com>
2274 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2275 handling COND_EXPRs with boolean comparisons, try to find a better
2276 basis for the mask type than the boolean itself.
2278 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2280 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2281 is calculated and how it can be overridden.
2282 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2283 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2285 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2288 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2289 Alan Hayward <alan.hayward@arm.com>
2290 David Sherwood <david.sherwood@arm.com>
2292 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2293 Remove the mode argument.
2294 (aarch64_simd_valid_immediate): Remove the mode and inverse
2296 * config/aarch64/iterators.md (bitsize): New iterator.
2297 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2298 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2299 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2300 aarch64_simd_valid_immediate.
2301 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2302 (aarch64_reg_or_bic_imm): Likewise.
2303 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2304 with an insn_type enum and msl with a modifier_type enum.
2305 Replace element_width with a scalar_mode. Change the shift
2306 to unsigned int. Add constructors for scalar_float_mode and
2307 scalar_int_mode elements.
2308 (aarch64_vect_float_const_representable_p): Delete.
2309 (aarch64_can_const_movi_rtx_p)
2310 (aarch64_simd_scalar_immediate_valid_for_move)
2311 (aarch64_simd_make_constant): Update call to
2312 aarch64_simd_valid_immediate.
2313 (aarch64_advsimd_valid_immediate_hs): New function.
2314 (aarch64_advsimd_valid_immediate): Likewise.
2315 (aarch64_simd_valid_immediate): Remove mode and inverse
2316 arguments. Rewrite to use the above. Use const_vec_duplicate_p
2317 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2318 and aarch64_float_const_representable_p on the result.
2319 (aarch64_output_simd_mov_immediate): Remove mode argument.
2320 Update call to aarch64_simd_valid_immediate and use of
2321 simd_immediate_info.
2322 (aarch64_output_scalar_simd_mov_immediate): Update call
2325 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2326 Alan Hayward <alan.hayward@arm.com>
2327 David Sherwood <david.sherwood@arm.com>
2329 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2330 (mode_nunits): Likewise CONST_MODE_NUNITS.
2331 * machmode.def (ADJUST_NUNITS): Document.
2332 * genmodes.c (mode_data::need_nunits_adj): New field.
2333 (blank_mode): Update accordingly.
2334 (adj_nunits): New variable.
2335 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2337 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2338 listed in adj_nunits.
2339 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2340 listed in adj_nunits. Don't emit case statements for such modes.
2341 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2342 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2343 nothing if adj_nunits is nonnull.
2344 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2345 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2346 (emit_mode_fbit): Update use of print_maybe_const_decl.
2347 (emit_move_size): Likewise. Treat the array as non-const
2349 (emit_mode_adjustments): Handle adj_nunits.
2351 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2353 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2354 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2355 (VECTOR_MODES): Use it.
2356 (make_vector_modes): Take the prefix as an argument.
2358 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2359 Alan Hayward <alan.hayward@arm.com>
2360 David Sherwood <david.sherwood@arm.com>
2362 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2363 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2364 for MODE_VECTOR_BOOL.
2365 * machmode.def (VECTOR_BOOL_MODE): Document.
2366 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2367 (make_vector_bool_mode): New function.
2368 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2370 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2371 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2373 * stor-layout.c (int_mode_for_mode): Likewise.
2374 * tree.c (build_vector_type_for_mode): Likewise.
2375 * varasm.c (output_constant_pool_2): Likewise.
2376 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2377 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2378 for MODE_VECTOR_BOOL.
2379 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2380 of mode class checks.
2381 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2382 instead of a list of mode class checks.
2383 (expand_vector_scalar_condition): Likewise.
2384 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2386 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2387 Alan Hayward <alan.hayward@arm.com>
2388 David Sherwood <david.sherwood@arm.com>
2390 * machmode.h (mode_size): Change from unsigned short to
2392 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2393 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2394 or if measurement_type is not polynomial.
2395 (fixed_size_mode::includes_p): Check for constant-sized modes.
2396 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2397 return a poly_uint16 rather than an unsigned short.
2398 (emit_mode_size): Change the type of mode_size from unsigned short
2399 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
2400 (emit_mode_adjustments): Cope with polynomial vector sizes.
2401 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2403 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2405 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2406 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2407 * caller-save.c (setup_save_areas): Likewise.
2408 (replace_reg_with_saved_mem): Likewise.
2409 * calls.c (emit_library_call_value_1): Likewise.
2410 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2411 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2412 (gen_lowpart_for_combine): Likewise.
2413 * convert.c (convert_to_integer_1): Likewise.
2414 * cse.c (equiv_constant, cse_insn): Likewise.
2415 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2416 (cselib_subst_to_values): Likewise.
2417 * dce.c (word_dce_process_block): Likewise.
2418 * df-problems.c (df_word_lr_mark_ref): Likewise.
2419 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2420 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2421 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2422 (rtl_for_decl_location): Likewise.
2423 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2424 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2425 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2426 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2427 (expand_expr_real_1): Likewise.
2428 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2429 (pad_below): Likewise.
2430 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2431 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2432 * ira.c (get_subreg_tracking_sizes): Likewise.
2433 * ira-build.c (ira_create_allocno_objects): Likewise.
2434 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2435 (ira_sort_regnos_for_alter_reg): Likewise.
2436 * ira-costs.c (record_operand_costs): Likewise.
2437 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2438 (resolve_simple_move): Likewise.
2439 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2440 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2441 (lra_constraints): Likewise.
2442 (CONST_POOL_OK_P): Reject variable-sized modes.
2443 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2444 (add_pseudo_to_slot, lra_spill): Likewise.
2445 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2446 * optabs-query.c (get_best_extraction_insn): Likewise.
2447 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2448 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2449 (expand_mult_highpart, valid_multiword_target_p): Likewise.
2450 * recog.c (offsettable_address_addr_space_p): Likewise.
2451 * regcprop.c (maybe_mode_change): Likewise.
2452 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2453 * regrename.c (build_def_use): Likewise.
2454 * regstat.c (dump_reg_info): Likewise.
2455 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2456 (find_reloads, find_reloads_subreg_address): Likewise.
2457 * reload1.c (eliminate_regs_1): Likewise.
2458 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2459 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2460 (simplify_binary_operation_1, simplify_subreg): Likewise.
2461 * targhooks.c (default_function_arg_padding): Likewise.
2462 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2463 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2464 (verify_gimple_assign_ternary): Likewise.
2465 * tree-inline.c (estimate_move_cost): Likewise.
2466 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2467 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2468 (get_address_cost_ainc): Likewise.
2469 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2470 (vect_supportable_dr_alignment): Likewise.
2471 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2472 (vectorizable_reduction): Likewise.
2473 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2474 (vectorizable_operation, vectorizable_load): Likewise.
2475 * tree.c (build_same_sized_truth_vector_type): Likewise.
2476 * valtrack.c (cleanup_auto_inc_dec): Likewise.
2477 * var-tracking.c (emit_note_insn_var_location): Likewise.
2478 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2479 (ADDR_VEC_ALIGN): Likewise.
2481 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2482 Alan Hayward <alan.hayward@arm.com>
2483 David Sherwood <david.sherwood@arm.com>
2485 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2487 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2488 or if measurement_type is polynomial.
2489 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2490 * combine.c (make_extraction): Likewise.
2491 * dse.c (find_shift_sequence): Likewise.
2492 * dwarf2out.c (mem_loc_descriptor): Likewise.
2493 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2494 (extract_bit_field, extract_low_bits): Likewise.
2495 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2496 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2497 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2498 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2499 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2500 * reload.c (find_reloads): Likewise.
2501 * reload1.c (alter_reg): Likewise.
2502 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2503 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2504 * tree-if-conv.c (predicate_mem_writes): Likewise.
2505 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2506 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2507 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2508 * valtrack.c (dead_debug_insert_temp): Likewise.
2509 * varasm.c (mergeable_constant_section): Likewise.
2510 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2512 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2513 Alan Hayward <alan.hayward@arm.com>
2514 David Sherwood <david.sherwood@arm.com>
2516 * expr.c (expand_assignment): Cope with polynomial mode sizes
2517 when assigning to a CONCAT.
2519 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2520 Alan Hayward <alan.hayward@arm.com>
2521 David Sherwood <david.sherwood@arm.com>
2523 * machmode.h (mode_precision): Change from unsigned short to
2525 (mode_to_precision): Return a poly_uint16 rather than an unsigned
2527 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2528 or if measurement_type is not polynomial.
2529 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
2530 in which the mode is already known to be a scalar_int_mode.
2531 * genmodes.c (emit_mode_precision): Change the type of mode_precision
2532 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
2534 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2535 for GET_MODE_PRECISION.
2536 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2537 for GET_MODE_PRECISION.
2538 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2540 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2541 (expand_field_assignment, make_extraction): Likewise.
2542 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
2543 (get_last_value): Likewise.
2544 * convert.c (convert_to_integer_1): Likewise.
2545 * cse.c (cse_insn): Likewise.
2546 * expr.c (expand_expr_real_1): Likewise.
2547 * lra-constraints.c (simplify_operand_subreg): Likewise.
2548 * optabs-query.c (can_atomic_load_p): Likewise.
2549 * optabs.c (expand_atomic_load): Likewise.
2550 (expand_atomic_store): Likewise.
2551 * ree.c (combine_reaching_defs): Likewise.
2552 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
2553 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
2554 * tree.h (type_has_mode_precision_p): Likewise.
2555 * ubsan.c (instrument_si_overflow): Likewise.
2557 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2558 Alan Hayward <alan.hayward@arm.com>
2559 David Sherwood <david.sherwood@arm.com>
2561 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
2562 polynomial numbers of units.
2563 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
2564 (valid_vector_subparts_p): New function.
2565 (build_vector_type): Remove temporary shim and take the number
2566 of units as a poly_uint64 rather than an int.
2567 (build_opaque_vector_type): Take the number of units as a
2568 poly_uint64 rather than an int.
2569 * tree.c (build_vector_from_ctor): Handle polynomial
2570 TYPE_VECTOR_SUBPARTS.
2571 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
2572 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
2573 (build_vector_from_val): If the number of units is variable,
2574 use build_vec_duplicate_cst for constant operands and
2575 VEC_DUPLICATE_EXPR otherwise.
2576 (make_vector_type): Remove temporary is_constant ().
2577 (build_vector_type, build_opaque_vector_type): Take the number of
2578 units as a poly_uint64 rather than an int.
2579 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
2581 * cfgexpand.c (expand_debug_expr): Likewise.
2582 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
2583 (store_constructor, expand_expr_real_1): Likewise.
2584 (const_scalar_mask_from_tree): Likewise.
2585 * fold-const-call.c (fold_const_reduction): Likewise.
2586 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
2587 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
2588 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
2589 (fold_relational_const): Likewise.
2590 (native_interpret_vector): Likewise. Change the size from an
2591 int to an unsigned int.
2592 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
2593 TYPE_VECTOR_SUBPARTS.
2594 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
2595 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
2596 duplicating a non-constant operand into a variable-length vector.
2597 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
2598 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
2599 * ipa-icf.c (sem_variable::equals): Likewise.
2600 * match.pd: Likewise.
2601 * omp-simd-clone.c (simd_clone_subparts): Likewise.
2602 * print-tree.c (print_node): Likewise.
2603 * stor-layout.c (layout_type): Likewise.
2604 * targhooks.c (default_builtin_vectorization_cost): Likewise.
2605 * tree-cfg.c (verify_gimple_comparison): Likewise.
2606 (verify_gimple_assign_binary): Likewise.
2607 (verify_gimple_assign_ternary): Likewise.
2608 (verify_gimple_assign_single): Likewise.
2609 * tree-pretty-print.c (dump_generic_node): Likewise.
2610 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2611 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
2612 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
2613 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
2614 (vect_shift_permute_load_chain): Likewise.
2615 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
2616 (expand_vector_condition, optimize_vector_constructor): Likewise.
2617 (lower_vec_perm, get_compute_type): Likewise.
2618 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2619 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
2620 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
2621 (vect_recog_mask_conversion_pattern): Likewise.
2622 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
2623 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
2624 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2625 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
2626 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
2627 (vectorizable_shift, vectorizable_operation, vectorizable_store)
2628 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
2629 (supportable_widening_operation): Likewise.
2630 (supportable_narrowing_operation): Likewise.
2631 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
2633 * varasm.c (output_constant): Likewise.
2635 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2636 Alan Hayward <alan.hayward@arm.com>
2637 David Sherwood <david.sherwood@arm.com>
2639 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
2640 so that both the length == 3 and length != 3 cases set up their
2641 own permute vectors. Add comments explaining why we know the
2642 number of elements is constant.
2643 (vect_permute_load_chain): Likewise.
2645 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2646 Alan Hayward <alan.hayward@arm.com>
2647 David Sherwood <david.sherwood@arm.com>
2649 * machmode.h (mode_nunits): Change from unsigned char to
2651 (ONLY_FIXED_SIZE_MODES): New macro.
2652 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
2653 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
2654 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
2656 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
2657 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
2658 or if measurement_type is not polynomial.
2659 * genmodes.c (ZERO_COEFFS): New macro.
2660 (emit_mode_nunits_inline): Make mode_nunits_inline return a
2662 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
2663 Use ZERO_COEFFS when emitting initializers.
2664 * data-streamer.h (bp_pack_poly_value): New function.
2665 (bp_unpack_poly_value): Likewise.
2666 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2667 for GET_MODE_NUNITS.
2668 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2669 for GET_MODE_NUNITS.
2670 * tree.c (make_vector_type): Remove temporary shim and make
2671 the real function take the number of units as a poly_uint64
2673 (build_vector_type_for_mode): Handle polynomial nunits.
2674 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
2675 * emit-rtl.c (const_vec_series_p_1): Likewise.
2676 (gen_rtx_CONST_VECTOR): Likewise.
2677 * fold-const.c (test_vec_duplicate_folding): Likewise.
2678 * genrecog.c (validate_pattern): Likewise.
2679 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
2680 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2681 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
2682 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
2683 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
2684 * rtlanal.c (subreg_get_info): Likewise.
2685 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2686 (vect_grouped_load_supported): Likewise.
2687 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
2688 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
2689 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
2690 (simplify_const_unary_operation, simplify_binary_operation_1)
2691 (simplify_const_binary_operation, simplify_ternary_operation)
2692 (test_vector_ops_duplicate, test_vector_ops): Likewise.
2693 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
2694 instead of CONST_VECTOR_NUNITS.
2695 * varasm.c (output_constant_pool_2): Likewise.
2696 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
2697 explicit-encoded elements in the XVEC for variable-length vectors.
2699 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2701 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
2703 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2704 Alan Hayward <alan.hayward@arm.com>
2705 David Sherwood <david.sherwood@arm.com>
2707 * coretypes.h (fixed_size_mode): Declare.
2708 (fixed_size_mode_pod): New typedef.
2709 * builtins.h (target_builtins::x_apply_args_mode)
2710 (target_builtins::x_apply_result_mode): Change type to
2711 fixed_size_mode_pod.
2712 * builtins.c (apply_args_size, apply_result_size, result_vector)
2713 (expand_builtin_apply_args_1, expand_builtin_apply)
2714 (expand_builtin_return): Update accordingly.
2716 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2718 * cse.c (hash_rtx_cb): Hash only the encoded elements.
2719 * cselib.c (cselib_hash_rtx): Likewise.
2720 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
2721 CONST_VECTOR encoding.
2723 2017-01-03 Jakub Jelinek <jakub@redhat.com>
2724 Jeff Law <law@redhat.com>
2727 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
2728 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
2729 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
2730 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
2733 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
2734 explicitly probe *sp in a noreturn function if there were any callee
2735 register saves or frame pointer is needed.
2737 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2740 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
2741 BLKmode for ternary, binary or unary expressions.
2744 * var-tracking.c (delete_vta_debug_insn): New inline function.
2745 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
2746 insns from get_insns () to NULL instead of each bb separately.
2747 Use delete_vta_debug_insn. No longer static.
2748 (vt_debug_insns_local, variable_tracking_main_1): Adjust
2749 delete_vta_debug_insns callers.
2750 * rtl.h (delete_vta_debug_insns): Declare.
2751 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
2752 instead of variable_tracking_main.
2754 2018-01-03 Martin Sebor <msebor@redhat.com>
2756 PR tree-optimization/83603
2757 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
2758 arguments past the endof the argument list in functions declared
2759 without a prototype.
2760 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
2761 Avoid checking when arguments are null.
2763 2018-01-03 Martin Sebor <msebor@redhat.com>
2766 * doc/extend.texi (attribute const): Fix a typo.
2767 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
2768 issuing -Wsuggest-attribute for void functions.
2770 2018-01-03 Martin Sebor <msebor@redhat.com>
2772 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
2773 offset_int::from instead of wide_int::to_shwi.
2774 (maybe_diag_overlap): Remove assertion.
2775 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
2776 * gimple-ssa-sprintf.c (format_directive): Same.
2777 (parse_directive): Same.
2778 (sprintf_dom_walker::compute_format_length): Same.
2779 (try_substitute_return_value): Same.
2781 2017-01-03 Jeff Law <law@redhat.com>
2784 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
2785 non-constant residual for zero at runtime and avoid probing in
2786 that case. Reorganize code for trailing problem to mirror handling
2789 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2791 PR tree-optimization/83501
2792 * tree-ssa-strlen.c (get_string_cst): New.
2793 (handle_char_store): Call get_string_cst.
2795 2018-01-03 Martin Liska <mliska@suse.cz>
2797 PR tree-optimization/83593
2798 * tree-ssa-strlen.c: Include tree-cfg.h.
2799 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
2800 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
2801 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
2803 (strlen_dom_walker::before_dom_children): Call
2804 gimple_purge_dead_eh_edges. Dump tranformation with details
2806 (strlen_dom_walker::before_dom_children): Update call by adding
2807 new argument cleanup_eh.
2808 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
2810 2018-01-03 Martin Liska <mliska@suse.cz>
2813 * cif-code.def (VARIADIC_THUNK): New enum value.
2814 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
2817 2018-01-03 Jan Beulich <jbeulich@suse.com>
2819 * sse.md (mov<mode>_internal): Tighten condition for when to use
2820 vmovdqu<ssescalarsize> for TI and OI modes.
2822 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2824 Update copyright years.
2826 2018-01-03 Martin Liska <mliska@suse.cz>
2829 * ipa-visibility.c (function_and_variable_visibility): Skip
2830 functions with noipa attribure.
2832 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2834 * gcc.c (process_command): Update copyright notice dates.
2835 * gcov-dump.c (print_version): Ditto.
2836 * gcov.c (print_version): Ditto.
2837 * gcov-tool.c (print_version): Ditto.
2838 * gengtype.c (create_file): Ditto.
2839 * doc/cpp.texi: Bump @copying's copyright year.
2840 * doc/cppinternals.texi: Ditto.
2841 * doc/gcc.texi: Ditto.
2842 * doc/gccint.texi: Ditto.
2843 * doc/gcov.texi: Ditto.
2844 * doc/install.texi: Ditto.
2845 * doc/invoke.texi: Ditto.
2847 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2849 * vector-builder.h (vector_builder::m_full_nelts): Change from
2850 unsigned int to poly_uint64.
2851 (vector_builder::full_nelts): Update prototype accordingly.
2852 (vector_builder::new_vector): Likewise.
2853 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
2854 (vector_builder::operator ==): Likewise.
2855 (vector_builder::finalize): Likewise.
2856 * int-vector-builder.h (int_vector_builder::int_vector_builder):
2857 Take the number of elements as a poly_uint64 rather than an
2859 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
2860 from unsigned int to poly_uint64.
2861 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
2862 (vec_perm_indices::new_vector): Likewise.
2863 (vec_perm_indices::length): Likewise.
2864 (vec_perm_indices::nelts_per_input): Likewise.
2865 (vec_perm_indices::input_nelts): Likewise.
2866 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
2867 number of elements per input as a poly_uint64 rather than an
2868 unsigned int. Use the original encoding for variable-length
2869 vectors, rather than clamping each individual element.
2870 For the second and subsequent elements in each pattern,
2871 clamp the step and base before clamping their sum.
2872 (vec_perm_indices::series_p): Handle polynomial element counts.
2873 (vec_perm_indices::all_in_range_p): Likewise.
2874 (vec_perm_indices_to_tree): Likewise.
2875 (vec_perm_indices_to_rtx): Likewise.
2876 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
2877 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
2878 (tree_vector_builder::new_binary_operation): Handle polynomial
2879 element counts. Return false if we need to know the number
2880 of elements at compile time.
2881 * fold-const.c (fold_vec_perm): Punt if the number of elements
2882 isn't known at compile time.
2884 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2886 * vec-perm-indices.h (vec_perm_builder): Change element type
2887 from HOST_WIDE_INT to poly_int64.
2888 (vec_perm_indices::element_type): Update accordingly.
2889 (vec_perm_indices::clamp): Handle polynomial element_types.
2890 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
2891 (vec_perm_indices::all_in_range_p): Likewise.
2892 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
2894 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
2895 polynomial vec_perm_indices element types.
2896 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
2897 * fold-const.c (fold_vec_perm): Likewise.
2898 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
2899 * tree-vect-generic.c (lower_vec_perm): Likewise.
2900 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
2901 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
2902 element type to HOST_WIDE_INT.
2904 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2905 Alan Hayward <alan.hayward@arm.com>
2906 David Sherwood <david.sherwood@arm.com>
2908 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
2909 rather than an int. Use plus_constant.
2910 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
2911 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
2913 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2914 Alan Hayward <alan.hayward@arm.com>
2915 David Sherwood <david.sherwood@arm.com>
2917 * calls.c (emit_call_1, expand_call): Change struct_value_size from
2918 a HOST_WIDE_INT to a poly_int64.
2920 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2921 Alan Hayward <alan.hayward@arm.com>
2922 David Sherwood <david.sherwood@arm.com>
2924 * calls.c (load_register_parameters): Cope with polynomial
2925 mode sizes. Require a constant size for BLKmode parameters
2926 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
2927 forces a parameter to be padded at the lsb end in order to
2928 fill a complete number of words, require the parameter size
2929 to be ordered wrt UNITS_PER_WORD.
2931 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2932 Alan Hayward <alan.hayward@arm.com>
2933 David Sherwood <david.sherwood@arm.com>
2935 * reload1.c (spill_stack_slot_width): Change element type
2936 from unsigned int to poly_uint64_pod.
2937 (alter_reg): Treat mode sizes as polynomial.
2939 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2940 Alan Hayward <alan.hayward@arm.com>
2941 David Sherwood <david.sherwood@arm.com>
2943 * reload.c (complex_word_subreg_p): New function.
2944 (reload_inner_reg_of_subreg, push_reload): Use it.
2946 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2947 Alan Hayward <alan.hayward@arm.com>
2948 David Sherwood <david.sherwood@arm.com>
2950 * lra-constraints.c (process_alt_operands): Reject matched
2951 operands whose sizes aren't ordered.
2952 (match_reload): Refer to this check here.
2954 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2955 Alan Hayward <alan.hayward@arm.com>
2956 David Sherwood <david.sherwood@arm.com>
2958 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
2959 that the mode size is in the set {1, 2, 4, 8, 16}.
2961 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2962 Alan Hayward <alan.hayward@arm.com>
2963 David Sherwood <david.sherwood@arm.com>
2965 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
2966 Use plus_constant instead of gen_rtx_PLUS.
2968 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2969 Alan Hayward <alan.hayward@arm.com>
2970 David Sherwood <david.sherwood@arm.com>
2972 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
2973 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
2974 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
2975 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
2976 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
2977 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
2978 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
2979 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
2980 * config/i386/i386.c (ix86_push_rounding): ...this new function.
2981 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
2983 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
2984 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
2985 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
2986 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
2987 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
2988 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
2989 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
2990 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
2991 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
2992 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
2994 * expr.c (emit_move_resolve_push): Treat the input and result
2995 of PUSH_ROUNDING as a poly_int64.
2996 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
2997 (emit_push_insn): Likewise.
2998 * lra-eliminations.c (mark_not_eliminable): Likewise.
2999 * recog.c (push_operand): Likewise.
3000 * reload1.c (elimination_effects): Likewise.
3001 * rtlanal.c (nonzero_bits1): Likewise.
3002 * calls.c (store_one_arg): Likewise. Require the padding to be
3003 known at compile time.
3005 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3006 Alan Hayward <alan.hayward@arm.com>
3007 David Sherwood <david.sherwood@arm.com>
3009 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3010 Use plus_constant instead of gen_rtx_PLUS.
3012 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3013 Alan Hayward <alan.hayward@arm.com>
3014 David Sherwood <david.sherwood@arm.com>
3016 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3019 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3020 Alan Hayward <alan.hayward@arm.com>
3021 David Sherwood <david.sherwood@arm.com>
3023 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3024 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3025 via stack temporaries. Treat the mode size as polynomial too.
3027 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3028 Alan Hayward <alan.hayward@arm.com>
3029 David Sherwood <david.sherwood@arm.com>
3031 * expr.c (expand_expr_real_2): When handling conversions involving
3032 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3033 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3034 as a poly_uint64 too.
3036 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3037 Alan Hayward <alan.hayward@arm.com>
3038 David Sherwood <david.sherwood@arm.com>
3040 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3042 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3043 Alan Hayward <alan.hayward@arm.com>
3044 David Sherwood <david.sherwood@arm.com>
3046 * combine.c (can_change_dest_mode): Handle polynomial
3047 REGMODE_NATURAL_SIZE.
3048 * expmed.c (store_bit_field_1): Likewise.
3049 * expr.c (store_constructor): Likewise.
3050 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3051 and polynomial REGMODE_NATURAL_SIZE.
3052 (gen_lowpart_common): Likewise.
3053 * reginfo.c (record_subregs_of_mode): Likewise.
3054 * rtlanal.c (read_modify_subreg_p): Likewise.
3056 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3057 Alan Hayward <alan.hayward@arm.com>
3058 David Sherwood <david.sherwood@arm.com>
3060 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3061 numbers of elements.
3063 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3064 Alan Hayward <alan.hayward@arm.com>
3065 David Sherwood <david.sherwood@arm.com>
3067 * match.pd: Cope with polynomial numbers of vector elements.
3069 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3070 Alan Hayward <alan.hayward@arm.com>
3071 David Sherwood <david.sherwood@arm.com>
3073 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3074 in a POINTER_PLUS_EXPR.
3076 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3077 Alan Hayward <alan.hayward@arm.com>
3078 David Sherwood <david.sherwood@arm.com>
3080 * omp-simd-clone.c (simd_clone_subparts): New function.
3081 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3082 (ipa_simd_modify_function_body): Likewise.
3084 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3085 Alan Hayward <alan.hayward@arm.com>
3086 David Sherwood <david.sherwood@arm.com>
3088 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3089 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3090 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3091 (expand_vector_condition, vector_element): Likewise.
3092 (subparts_gt): New function.
3093 (get_compute_type): Use subparts_gt.
3094 (count_type_subparts): Delete.
3095 (expand_vector_operations_1): Use subparts_gt instead of
3096 count_type_subparts.
3098 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3099 Alan Hayward <alan.hayward@arm.com>
3100 David Sherwood <david.sherwood@arm.com>
3102 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3103 (vect_compile_time_alias): ...this new function. Do the calculation
3104 on poly_ints rather than trees.
3105 (vect_prune_runtime_alias_test_list): Update call accordingly.
3107 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3108 Alan Hayward <alan.hayward@arm.com>
3109 David Sherwood <david.sherwood@arm.com>
3111 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3113 (vect_schedule_slp_instance): Likewise.
3115 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3116 Alan Hayward <alan.hayward@arm.com>
3117 David Sherwood <david.sherwood@arm.com>
3119 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3120 constant and extern definitions for variable-length vectors.
3121 (vect_get_constant_vectors): Note that the number of units
3122 is known to be constant.
3124 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3125 Alan Hayward <alan.hayward@arm.com>
3126 David Sherwood <david.sherwood@arm.com>
3128 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3129 of units as polynomial. Choose between WIDE and NARROW based
3132 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3133 Alan Hayward <alan.hayward@arm.com>
3134 David Sherwood <david.sherwood@arm.com>
3136 * tree-vect-stmts.c (simd_clone_subparts): New function.
3137 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3139 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3140 Alan Hayward <alan.hayward@arm.com>
3141 David Sherwood <david.sherwood@arm.com>
3143 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3144 vectors as polynomial. Use build_index_vector for
3147 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3148 Alan Hayward <alan.hayward@arm.com>
3149 David Sherwood <david.sherwood@arm.com>
3151 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3152 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3153 for variable-length vectors.
3154 (vectorizable_mask_load_store): Treat the number of units as
3155 polynomial, asserting that it is constant if the condition has
3156 already been enforced.
3157 (vectorizable_store, vectorizable_load): Likewise.
3159 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3160 Alan Hayward <alan.hayward@arm.com>
3161 David Sherwood <david.sherwood@arm.com>
3163 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3164 of units as polynomial. Punt if we can't tell at compile time
3165 which vector contains the final result.
3167 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3168 Alan Hayward <alan.hayward@arm.com>
3169 David Sherwood <david.sherwood@arm.com>
3171 * tree-vect-loop.c (vectorizable_induction): Treat the number
3172 of units as polynomial. Punt on SLP inductions. Use an integer
3173 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3174 cast of such a series for variable-length floating-point
3177 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3178 Alan Hayward <alan.hayward@arm.com>
3179 David Sherwood <david.sherwood@arm.com>
3181 * tree.h (build_index_vector): Declare.
3182 * tree.c (build_index_vector): New function.
3183 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3184 of units as polynomial, forcibly converting it to a constant if
3185 vectorizable_reduction has already enforced the condition.
3186 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3187 to create a {1,2,3,...} vector.
3188 (vectorizable_reduction): Treat the number of units as polynomial.
3189 Choose vectype_in based on the largest scalar element size rather
3190 than the smallest number of units. Enforce the restrictions
3193 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3194 Alan Hayward <alan.hayward@arm.com>
3195 David Sherwood <david.sherwood@arm.com>
3197 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3198 number of units as polynomial.
3200 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3201 Alan Hayward <alan.hayward@arm.com>
3202 David Sherwood <david.sherwood@arm.com>
3204 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3205 * target.def (autovectorize_vector_sizes): Return the vector sizes
3206 by pointer, using vector_sizes rather than a bitmask.
3207 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3208 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3209 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3211 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3212 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3213 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3214 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3215 * omp-general.c (omp_max_vf): Likewise.
3216 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3217 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3218 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3219 * tree-vect-slp.c (vect_slp_bb): Likewise.
3220 * doc/tm.texi: Regenerate.
3221 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3223 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3224 the vector size as a poly_uint64 rather than an unsigned int.
3225 (current_vector_size): Change from an unsigned int to a poly_uint64.
3226 (get_vectype_for_scalar_type): Update accordingly.
3227 * tree.h (build_truth_vector_type): Take the size and number of
3228 units as a poly_uint64 rather than an unsigned int.
3229 (build_vector_type): Add a temporary overload that takes
3230 the number of units as a poly_uint64 rather than an unsigned int.
3231 * tree.c (make_vector_type): Likewise.
3232 (build_truth_vector_type): Take the number of units as a poly_uint64
3233 rather than an unsigned int.
3235 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3236 Alan Hayward <alan.hayward@arm.com>
3237 David Sherwood <david.sherwood@arm.com>
3239 * target.def (get_mask_mode): Take the number of units and length
3240 as poly_uint64s rather than unsigned ints.
3241 * targhooks.h (default_get_mask_mode): Update accordingly.
3242 * targhooks.c (default_get_mask_mode): Likewise.
3243 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3244 * doc/tm.texi: Regenerate.
3246 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3247 Alan Hayward <alan.hayward@arm.com>
3248 David Sherwood <david.sherwood@arm.com>
3250 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3251 * omp-general.c (omp_max_vf): Likewise.
3252 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3253 (expand_omp_simd): Handle polynomial safelen.
3254 * omp-low.c (omplow_simd_context): Add a default constructor.
3255 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3256 (lower_rec_simd_input_clauses): Update accordingly.
3257 (lower_rec_input_clauses): Likewise.
3259 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3260 Alan Hayward <alan.hayward@arm.com>
3261 David Sherwood <david.sherwood@arm.com>
3263 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3264 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3265 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3266 (vect_analyze_slp_cost): Likewise.
3267 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3268 (vect_model_load_cost): Likewise.
3270 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3271 Alan Hayward <alan.hayward@arm.com>
3272 David Sherwood <david.sherwood@arm.com>
3274 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3275 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3276 from an unsigned int * to a poly_uint64_pod *.
3277 (calculate_unrolling_factor): New function.
3278 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3280 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3281 Alan Hayward <alan.hayward@arm.com>
3282 David Sherwood <david.sherwood@arm.com>
3284 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3285 from an unsigned int to a poly_uint64.
3286 (_loop_vec_info::slp_unrolling_factor): Likewise.
3287 (_loop_vec_info::vectorization_factor): Change from an int
3289 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3290 (vect_get_num_vectors): New function.
3291 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3292 (vect_get_num_copies): Use vect_get_num_vectors.
3293 (vect_analyze_data_ref_dependences): Change max_vf from an int *
3294 to an unsigned int *.
3295 (vect_analyze_data_refs): Change min_vf from an int * to a
3297 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3298 than an unsigned HOST_WIDE_INT.
3299 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3300 (vect_analyze_data_ref_dependence): Change max_vf from an int *
3301 to an unsigned int *.
3302 (vect_analyze_data_ref_dependences): Likewise.
3303 (vect_compute_data_ref_alignment): Handle polynomial vf.
3304 (vect_enhance_data_refs_alignment): Likewise.
3305 (vect_prune_runtime_alias_test_list): Likewise.
3306 (vect_shift_permute_load_chain): Likewise.
3307 (vect_supportable_dr_alignment): Likewise.
3308 (dependence_distance_ge_vf): Take the vectorization factor as a
3309 poly_uint64 rather than an unsigned HOST_WIDE_INT.
3310 (vect_analyze_data_refs): Change min_vf from an int * to a
3312 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3313 vfm1 as a poly_uint64 rather than an int. Make the same change
3314 for the returned bound_scalar.
3315 (vect_gen_vector_loop_niters): Handle polynomial vf.
3316 (vect_do_peeling): Likewise. Update call to
3317 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3318 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3320 * tree-vect-loop.c (vect_determine_vectorization_factor)
3321 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3322 (vect_get_known_peeling_cost): Likewise.
3323 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3324 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3325 (vect_transform_loop): Likewise. Use the lowest possible VF when
3326 updating the upper bounds of the loop.
3327 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3329 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3330 polynomial unroll factors.
3331 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3332 (vect_make_slp_decision): Likewise.
3333 (vect_supported_load_permutation_p): Likewise, and polynomial
3335 (vect_analyze_slp_cost): Handle polynomial vf.
3336 (vect_slp_analyze_node_operations): Likewise.
3337 (vect_slp_analyze_bb_1): Likewise.
3338 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3339 than an unsigned HOST_WIDE_INT.
3340 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3341 (vectorizable_load): Handle polynomial vf.
3342 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3344 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3346 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3347 Alan Hayward <alan.hayward@arm.com>
3348 David Sherwood <david.sherwood@arm.com>
3350 * match.pd: Handle bit operations involving three constants
3351 and try to fold one pair.
3353 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3355 * tree-vect-loop-manip.c: Include gimple-fold.h.
3356 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3357 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3358 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3359 Add a path that uses a step of VF instead of 1, but disable it
3361 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3362 and niters_no_overflow parameters. Update calls to
3363 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3364 Create a new SSA name if the latter choses to use a ste other
3365 than zero, and return it via niters_vector_mult_vf_var.
3366 * tree-vect-loop.c (vect_transform_loop): Update calls to
3367 vect_do_peeling, vect_gen_vector_loop_niters and
3368 slpeel_make_loop_iterate_ntimes.
3369 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3370 (vect_gen_vector_loop_niters): Update declarations after above changes.
3372 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3374 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3375 128-bit round to integer instructions.
3376 (ceil<mode>2): Likewise.
3377 (btrunc<mode>2): Likewise.
3378 (round<mode>2): Likewise.
3380 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3382 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3383 unaligned VSX load/store on P8/P9.
3384 (expand_block_clear): Allow the use of unaligned VSX
3385 load/store on P8/P9.
3387 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3389 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3391 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3392 swap associated with both a load and a store.
3394 2018-01-02 Andrew Waterman <andrew@sifive.com>
3396 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3397 * config/riscv/riscv.md (clear_cache): Use it.
3399 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
3401 * web.c: Remove out-of-date comment.
3403 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3405 * expr.c (fixup_args_size_notes): Check that any existing
3406 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3407 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3408 (emit_single_push_insn): ...here.
3410 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3412 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3413 (const_vector_encoded_nelts): New function.
3414 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3415 (const_vector_int_elt, const_vector_elt): Declare.
3416 * emit-rtl.c (const_vector_int_elt_1): New function.
3417 (const_vector_elt): Likewise.
3418 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3419 of CONST_VECTOR_ELT.
3421 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3423 * expr.c: Include rtx-vector-builder.h.
3424 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3425 directly on the tree encoding.
3426 (const_vector_from_tree): Likewise.
3427 * optabs.c: Include rtx-vector-builder.h.
3428 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3429 sequence of "u" values.
3430 * vec-perm-indices.c: Include rtx-vector-builder.h.
3431 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3432 directly on the vec_perm_indices encoding.
3434 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3436 * doc/rtl.texi (const_vector): Describe new encoding scheme.
3437 * Makefile.in (OBJS): Add rtx-vector-builder.o.
3438 * rtx-vector-builder.h: New file.
3439 * rtx-vector-builder.c: Likewise.
3440 * rtl.h (rtx_def::u2): Add a const_vector field.
3441 (CONST_VECTOR_NPATTERNS): New macro.
3442 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3443 (CONST_VECTOR_DUPLICATE_P): Likewise.
3444 (CONST_VECTOR_STEPPED_P): Likewise.
3445 (CONST_VECTOR_ENCODED_ELT): Likewise.
3446 (const_vec_duplicate_p): Check for a duplicated vector encoding.
3447 (unwrap_const_vec_duplicate): Likewise.
3448 (const_vec_series_p): Check for a non-duplicated vector encoding.
3449 Say that the function only returns true for integer vectors.
3450 * emit-rtl.c: Include rtx-vector-builder.h.
3451 (gen_const_vec_duplicate_1): Delete.
3452 (gen_const_vector): Call gen_const_vec_duplicate instead of
3453 gen_const_vec_duplicate_1.
3454 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3455 (gen_const_vec_duplicate): Use rtx_vector_builder.
3456 (gen_const_vec_series): Likewise.
3457 (gen_rtx_CONST_VECTOR): Likewise.
3458 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3459 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3460 Build a new vector rather than modifying a CONST_VECTOR in-place.
3461 (handle_special_swappables): Update call accordingly.
3462 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3463 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3464 Build a new vector rather than modifying a CONST_VECTOR in-place.
3465 (handle_special_swappables): Update call accordingly.
3467 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3469 * simplify-rtx.c (simplify_const_binary_operation): Use
3470 CONST_VECTOR_ELT instead of XVECEXP.
3472 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3474 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3475 the selector elements to be different from the data elements
3476 if the selector is a VECTOR_CST.
3477 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3478 ssizetype for the selector.
3480 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3482 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3483 before testing each element individually.
3484 * tree-vect-generic.c (lower_vec_perm): Likewise.
3486 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3488 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3489 * selftest-run-tests.c (selftest::run_tests): Call it.
3490 * vector-builder.h (vector_builder::operator ==): New function.
3491 (vector_builder::operator !=): Likewise.
3492 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3493 (vec_perm_indices::all_from_input_p): New function.
3494 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3495 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3496 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3497 instead of reading the VECTOR_CST directly. Detect whether both
3498 vector inputs are the same before constructing the vec_perm_indices,
3499 and update the number of inputs argument accordingly. Use the
3500 utility functions added above. Only construct sel2 if we need to.
3502 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3504 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3505 the broadcast of the low byte.
3506 (expand_mult_highpart): Use an explicit encoding for the permutes.
3507 * optabs-query.c (can_mult_highpart_p): Likewise.
3508 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3509 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3510 (vectorizable_bswap): Likewise.
3511 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3512 explicit encoding for the power-of-2 permutes.
3513 (vect_permute_store_chain): Likewise.
3514 (vect_grouped_load_supported): Likewise.
3515 (vect_permute_load_chain): Likewise.
3517 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3519 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3520 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3521 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3522 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3523 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3524 (vect_gen_perm_mask_any): Likewise.
3526 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3528 * int-vector-builder.h: New file.
3529 * vec-perm-indices.h: Include int-vector-builder.h.
3530 (vec_perm_indices): Redefine as an int_vector_builder.
3531 (auto_vec_perm_indices): Delete.
3532 (vec_perm_builder): Redefine as a stand-alone class.
3533 (vec_perm_indices::vec_perm_indices): New function.
3534 (vec_perm_indices::clamp): Likewise.
3535 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3536 (vec_perm_indices::new_vector): New function.
3537 (vec_perm_indices::new_expanded_vector): Update for new
3538 vec_perm_indices class.
3539 (vec_perm_indices::rotate_inputs): New function.
3540 (vec_perm_indices::all_in_range_p): Operate directly on the
3541 encoded form, without computing elided elements.
3542 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
3543 encoding. Update for new vec_perm_indices class.
3544 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
3545 the given vec_perm_builder.
3546 (expand_vec_perm_var): Update vec_perm_builder constructor.
3547 (expand_mult_highpart): Use vec_perm_builder instead of
3548 auto_vec_perm_indices.
3549 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
3550 vec_perm_indices instead of auto_vec_perm_indices. Use a single
3551 or double series encoding as appropriate.
3552 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
3553 vec_perm_indices instead of auto_vec_perm_indices.
3554 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3555 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3556 (vect_permute_store_chain): Likewise.
3557 (vect_grouped_load_supported): Likewise.
3558 (vect_permute_load_chain): Likewise.
3559 (vect_shift_permute_load_chain): Likewise.
3560 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3561 (vect_transform_slp_perm_load): Likewise.
3562 (vect_schedule_slp_instance): Likewise.
3563 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3564 (vectorizable_mask_load_store): Likewise.
3565 (vectorizable_bswap): Likewise.
3566 (vectorizable_store): Likewise.
3567 (vectorizable_load): Likewise.
3568 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
3569 vec_perm_indices instead of auto_vec_perm_indices. Use
3570 tree_to_vec_perm_builder to read the vector from a tree.
3571 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
3572 vec_perm_builder instead of a vec_perm_indices.
3573 (have_whole_vector_shift): Use vec_perm_builder and
3574 vec_perm_indices instead of auto_vec_perm_indices. Leave the
3575 truncation to calc_vec_perm_mask_for_shift.
3576 (vect_create_epilog_for_reduction): Likewise.
3577 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
3578 from auto_vec_perm_indices to vec_perm_indices.
3579 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3580 instead of changing individual elements.
3581 (aarch64_vectorize_vec_perm_const): Use new_vector to install
3582 the vector in d.perm.
3583 * config/arm/arm.c (expand_vec_perm_d::perm): Change
3584 from auto_vec_perm_indices to vec_perm_indices.
3585 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3586 instead of changing individual elements.
3587 (arm_vectorize_vec_perm_const): Use new_vector to install
3588 the vector in d.perm.
3589 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
3590 Update vec_perm_builder constructor.
3591 (rs6000_expand_interleave): Likewise.
3592 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
3593 (rs6000_expand_interleave): Likewise.
3595 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3597 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
3598 to qimode could truncate the indices.
3599 * optabs.c (expand_vec_perm_var): Likewise.
3601 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3603 * Makefile.in (OBJS): Add vec-perm-indices.o.
3604 * vec-perm-indices.h: New file.
3605 * vec-perm-indices.c: Likewise.
3606 * target.h (vec_perm_indices): Replace with a forward class
3608 (auto_vec_perm_indices): Move to vec-perm-indices.h.
3609 * optabs.h: Include vec-perm-indices.h.
3610 (expand_vec_perm): Delete.
3611 (selector_fits_mode_p, expand_vec_perm_var): Declare.
3612 (expand_vec_perm_const): Declare.
3613 * target.def (vec_perm_const_ok): Replace with...
3614 (vec_perm_const): ...this new hook.
3615 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
3616 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
3617 * doc/tm.texi: Regenerate.
3618 * optabs.def (vec_perm_const): Delete.
3619 * doc/md.texi (vec_perm_const): Likewise.
3620 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
3621 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
3622 expand_vec_perm for constant permutation vectors. Assert that
3623 the mode of variable permutation vectors is the integer equivalent
3624 of the mode that is being permuted.
3625 * optabs-query.h (selector_fits_mode_p): Declare.
3626 * optabs-query.c: Include vec-perm-indices.h.
3627 (selector_fits_mode_p): New function.
3628 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
3629 is defined, instead of checking whether the vec_perm_const_optab
3630 exists. Use targetm.vectorize.vec_perm_const instead of
3631 targetm.vectorize.vec_perm_const_ok. Check whether the indices
3632 fit in the vector mode before using a variable permute.
3633 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
3634 vec_perm_indices instead of an rtx.
3635 (expand_vec_perm): Replace with...
3636 (expand_vec_perm_const): ...this new function. Take the selector
3637 as a vec_perm_indices rather than an rtx. Also take the mode of
3638 the selector. Update call to shift_amt_for_vec_perm_mask.
3639 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
3640 Use vec_perm_indices::new_expanded_vector to expand the original
3641 selector into bytes. Check whether the indices fit in the vector
3642 mode before using a variable permute.
3643 (expand_vec_perm_var): Make global.
3644 (expand_mult_highpart): Use expand_vec_perm_const.
3645 * fold-const.c: Includes vec-perm-indices.h.
3646 * tree-ssa-forwprop.c: Likewise.
3647 * tree-vect-data-refs.c: Likewise.
3648 * tree-vect-generic.c: Likewise.
3649 * tree-vect-loop.c: Likewise.
3650 * tree-vect-slp.c: Likewise.
3651 * tree-vect-stmts.c: Likewise.
3652 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
3654 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
3655 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
3656 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
3657 (aarch64_vectorize_vec_perm_const): ...this new function.
3658 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3659 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3660 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
3661 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
3662 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3663 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3664 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
3666 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
3667 check for NEON modes.
3668 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
3669 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
3670 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
3671 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
3673 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
3674 the old VEC_PERM_CONST conditions.
3675 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
3676 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
3677 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
3678 (ia64_vectorize_vec_perm_const_ok): Merge into...
3679 (ia64_vectorize_vec_perm_const): ...this new function.
3680 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
3681 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
3682 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
3683 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
3684 * config/mips/mips.c (mips_expand_vec_perm_const)
3685 (mips_vectorize_vec_perm_const_ok): Merge into...
3686 (mips_vectorize_vec_perm_const): ...this new function.
3687 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
3688 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
3689 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
3690 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
3691 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
3692 (rs6000_expand_vec_perm_const): Delete.
3693 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
3695 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3696 (altivec_expand_vec_perm_const_le): Take each operand individually.
3697 Operate on constant selectors rather than rtxes.
3698 (altivec_expand_vec_perm_const): Likewise. Update call to
3699 altivec_expand_vec_perm_const_le.
3700 (rs6000_expand_vec_perm_const): Delete.
3701 (rs6000_vectorize_vec_perm_const_ok): Delete.
3702 (rs6000_vectorize_vec_perm_const): New function.
3703 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3704 an element count and rtx array.
3705 (rs6000_expand_extract_even): Update call accordingly.
3706 (rs6000_expand_interleave): Likewise.
3707 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
3708 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
3709 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
3710 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
3711 (rs6000_expand_vec_perm_const): Delete.
3712 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3713 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3714 (altivec_expand_vec_perm_const_le): Take each operand individually.
3715 Operate on constant selectors rather than rtxes.
3716 (altivec_expand_vec_perm_const): Likewise. Update call to
3717 altivec_expand_vec_perm_const_le.
3718 (rs6000_expand_vec_perm_const): Delete.
3719 (rs6000_vectorize_vec_perm_const_ok): Delete.
3720 (rs6000_vectorize_vec_perm_const): New function. Remove stray
3721 reference to the SPE evmerge intructions.
3722 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3723 an element count and rtx array.
3724 (rs6000_expand_extract_even): Update call accordingly.
3725 (rs6000_expand_interleave): Likewise.
3726 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
3727 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
3729 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3731 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3733 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
3734 vector mode and that that mode matches the mode of the data
3736 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
3737 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
3738 directly using expand_vec_perm_1 when forcing selectors into
3740 (expand_vec_perm_var): New function, split out from expand_vec_perm.
3742 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3744 * optabs-query.h (can_vec_perm_p): Delete.
3745 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
3746 * optabs-query.c (can_vec_perm_p): Split into...
3747 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
3748 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
3749 particular selector is valid.
3750 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3751 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3752 (vect_grouped_load_supported): Likewise.
3753 (vect_shift_permute_load_chain): Likewise.
3754 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3755 (vect_transform_slp_perm_load): Likewise.
3756 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3757 (vectorizable_bswap): Likewise.
3758 (vect_gen_perm_mask_checked): Likewise.
3759 * fold-const.c (fold_ternary_loc): Likewise. Don't take
3760 implementations of variable permutation vectors into account
3761 when deciding which selector to use.
3762 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
3763 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
3764 with a false third argument.
3765 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
3766 to test whether the constant selector is valid and can_vec_perm_var_p
3767 to test whether a variable selector is valid.
3769 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3771 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
3772 * optabs-query.c (can_vec_perm_p): Likewise.
3773 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
3774 instead of vec_perm_indices.
3775 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
3776 (vect_gen_perm_mask_checked): Likewise,
3777 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
3778 (vect_gen_perm_mask_checked): Likewise,
3780 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3782 * optabs-query.h (qimode_for_vec_perm): Declare.
3783 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
3784 (qimode_for_vec_perm): ...this new function.
3785 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
3787 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3789 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
3790 does not have a conditional at the top.
3792 2018-01-02 Richard Biener <rguenther@suse.de>
3794 * ipa-inline.c (big_speedup_p): Fix expression.
3796 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
3799 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
3802 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
3806 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
3807 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
3808 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
3809 cond_taken_branch_cost 3->4.
3811 2018-01-01 Jakub Jelinek <jakub@redhat.com>
3813 PR tree-optimization/83581
3814 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
3815 TODO_cleanup_cfg if any changes have been made.
3818 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
3819 convert_modes if target mode has the right side, but different mode
3823 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
3824 last argument when extracting from CONCAT. If either from_real or
3825 from_imag is NULL, use expansion through memory. If result is not
3826 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
3827 the parts directly to inner mode, if even that fails, use expansion
3831 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
3832 check for bswap in mode rather than HImode and use that in expand_unop
3835 Copyright (C) 2018 Free Software Foundation, Inc.
3837 Copying and distribution of this file, with or without modification,
3838 are permitted in any medium without royalty provided the copyright
3839 notice and this notice are preserved.