1 2020-09-09 David Malcolm <dmalcolm@redhat.com>
4 * doc/invoke.texi: Document -Wanalyzer-mismatching-deallocation.
6 2020-09-09 Segher Boessenkool <segher@kernel.crashing.org>
8 PR rtl-optimization/96475
9 * bb-reorder.c (maybe_duplicate_computed_goto): Remove single_pred_p
12 2020-09-09 Tom de Vries <tdevries@suse.de>
14 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Fix Wformat
17 2020-09-09 Richard Biener <rguenther@suse.de>
19 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
20 nothing when the permutation doesn't permute.
22 2020-09-09 Tom de Vries <tdevries@suse.de>
25 * config/nvptx/nvptx.c (write_fn_proto): Fix boolean type check.
27 2020-09-09 Richard Biener <rguenther@suse.de>
29 * tree-vect-stmts.c (vectorizable_comparison): Allow
30 STMT_VINFO_LIVE_P stmts.
32 2020-09-09 Richard Biener <rguenther@suse.de>
34 * tree-vect-stmts.c (vectorizable_condition): Allow
35 STMT_VINFO_LIVE_P stmts.
37 2020-09-09 Richard Biener <rguenther@suse.de>
39 PR tree-optimization/96978
40 * tree-vect-stmts.c (vectorizable_condition): Do not
41 look at STMT_VINFO_LIVE_P for BB vectorization.
42 (vectorizable_comparison): Likewise.
44 2020-09-09 liuhongt <hongtao.liu@intel.com>
47 * config/i386/i386.md (get_thread_pointer<mode>): New
50 2020-09-08 Julian Brown <julian@codesourcery.com>
52 * config/gcn/gcn-valu.md (scatter<mode>_insn_1offset_ds<exec_scatter>):
54 * config/gcn/gcn.md (*mov<mode>_insn, *movti_insn): Add waitcnt to
55 ds_write alternatives.
57 2020-09-08 Julian Brown <julian@codesourcery.com>
59 * config/gcn/mkoffload.c (process_asm): Initialise regcount. Update
60 scanning for SGPR/VGPR usage for HSACO v3.
62 2020-09-08 Aldy Hernandez <aldyh@redhat.com>
64 PR tree-optimization/96967
65 * tree-vrp.c (find_case_label_range): Cast label range to
66 type of switch operand.
68 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
70 * config/msp430/msp430.c (msp430_file_end): Fix jumbled
71 HAVE_AS_MSPABI_ATTRIBUTE and HAVE_AS_GNU_ATTRIBUTE checks.
72 * configure: Regenerate.
73 * configure.ac: Use ".mspabi_attribute 4,2" to check for assembler
74 support for this object attribute directive.
76 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
78 * common/config/msp430/msp430-common.c (msp430_handle_option): Remove
80 Set target_cpu value to new enum values when parsing certain -mmcu=
82 * config/msp430/msp430-opts.h (enum msp430_cpu_types): New.
83 * config/msp430/msp430.c (msp430_option_override): Handle new
84 target_cpu enum values.
85 Set target_cpu using extracted value for given MCU when -mcpu=
86 option is not passed by the user.
87 * config/msp430/msp430.opt: Handle -mcpu= values using enums.
89 2020-09-07 Richard Sandiford <richard.sandiford@arm.com>
91 PR rtl-optimization/96796
92 * lra-constraints.c (in_class_p): Add a default-false
93 allow_all_reload_class_changes_p parameter. Do not treat
94 reload moves specially when the parameter is true.
95 (get_reload_reg): Try to narrow the class of an existing OP_OUT
96 reload if we're reloading a reload pseudo in a reload instruction.
98 2020-09-07 Andrea Corallo <andrea.corallo@arm.com>
100 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Revert
101 dead-code removal introduced by 09fa6acd8d9 + add a comment to
104 2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
106 * doc/rtl.texi (subreg): Fix documentation to state there is a known
107 number of undefined bits in regs and subregs of MODE_PARTIAL_INT modes.
109 2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
111 * config/msp430/msp430.c (msp430_option_override): Don't set the
112 ISA to 430 when the MCU is unrecognized.
114 2020-09-07 Iain Sandoe <iain@sandoe.co.uk>
116 * config/darwin.c (darwin_libc_has_function): Report sincos
119 2020-09-07 Alex Coplan <alex.coplan@arm.com>
121 * config/aarch64/aarch64.md (*adds_mul_imm_<mode>): Delete.
122 (*subs_mul_imm_<mode>): Delete.
123 (*adds_<optab><mode>_multp2): Delete.
124 (*subs_<optab><mode>_multp2): Delete.
125 (*add_mul_imm_<mode>): Delete.
126 (*add_<optab><ALLX:mode>_mult_<GPI:mode>): Delete.
127 (*add_<optab><SHORT:mode>_mult_si_uxtw): Delete.
128 (*add_<optab><mode>_multp2): Delete.
129 (*add_<optab>si_multp2_uxtw): Delete.
130 (*add_uxt<mode>_multp2): Delete.
131 (*add_uxtsi_multp2_uxtw): Delete.
132 (*sub_mul_imm_<mode>): Delete.
133 (*sub_mul_imm_si_uxtw): Delete.
134 (*sub_<optab><mode>_multp2): Delete.
135 (*sub_<optab>si_multp2_uxtw): Delete.
136 (*sub_uxt<mode>_multp2): Delete.
137 (*sub_uxtsi_multp2_uxtw): Delete.
138 (*neg_mul_imm_<mode>2): Delete.
139 (*neg_mul_imm_si2_uxtw): Delete.
140 * config/aarch64/predicates.md (aarch64_pwr_imm3): Delete.
141 (aarch64_pwr_2_si): Delete.
142 (aarch64_pwr_2_di): Delete.
144 2020-09-07 Alex Coplan <alex.coplan@arm.com>
146 * config/aarch64/aarch64.md
147 (*adds_<optab><ALLX:mode>_<GPI:mode>): Ensure extended operand
148 agrees with width of extension specifier.
149 (*subs_<optab><ALLX:mode>_<GPI:mode>): Likewise.
150 (*adds_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
151 (*subs_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
152 (*add_<optab><ALLX:mode>_<GPI:mode>): Likewise.
153 (*add_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
154 (*add_uxt<mode>_shift2): Likewise.
155 (*sub_<optab><ALLX:mode>_<GPI:mode>): Likewise.
156 (*sub_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
157 (*sub_uxt<mode>_shift2): Likewise.
158 (*cmp_swp_<optab><ALLX:mode>_reg<GPI:mode>): Likewise.
159 (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
161 2020-09-07 Richard Biener <rguenther@suse.de>
163 * tree-vect-slp.c (vect_analyze_slp_instance): Dump
164 stmts we start SLP analysis from, failure and splitting.
165 (vect_schedule_slp): Dump SLP graph entry and root stmt
166 we are about to emit code for.
168 2020-09-07 Martin Storsjö <martin@martin.st>
170 * dwarf2out.c (file_name_acquire): Make a strchr return value
173 2020-09-07 Jakub Jelinek <jakub@redhat.com>
176 * lto-streamer-out.c (output_cfg): Also stream goto_locus for edges.
177 Use bp_pack_var_len_unsigned instead of streamer_write_uhwi to stream
178 e->dest->index and e->flags.
179 (output_function): Call output_cfg before output_ssa_name, rather than
180 after streaming all bbs.
181 * lto-streamer-in.c (input_cfg): Stream in goto_locus for edges.
182 Use bp_unpack_var_len_unsigned instead of streamer_read_uhwi to stream
183 in dest_index and edge_flags.
185 2020-09-07 Richard Biener <rguenther@suse.de>
187 * tree-vectorizer.h (vectorizable_live_operation): Adjust.
188 * tree-vect-loop.c (vectorizable_live_operation): Vectorize
189 live lanes out of basic-block vectorization nodes.
190 * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): New function.
191 (vect_slp_analyze_operations): Analyze live lanes and their
192 vectorization possibility after the whole SLP graph is final.
193 (vect_bb_slp_scalar_cost): Adjust for vectorized live lanes.
194 * tree-vect-stmts.c (can_vectorize_live_stmts): Adjust.
195 (vect_transform_stmt): Call can_vectorize_live_stmts also for
196 basic-block vectorization.
198 2020-09-04 Richard Biener <rguenther@suse.de>
200 PR tree-optimization/96698
201 PR tree-optimization/96920
202 * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): Remove.
203 (loop_vec_info::reduc_latch_slp_defs): Likewise.
204 * tree-vect-stmts.c (vect_transform_stmt): Remove vectorized
205 cycle PHI latch code.
206 * tree-vect-loop.c (maybe_set_vectorized_backedge_value): New
207 helper to set vectorized cycle PHI latch values.
208 (vect_transform_loop): Walk over all PHIs again after
209 vectorizing them, calling maybe_set_vectorized_backedge_value.
210 Call maybe_set_vectorized_backedge_value for each vectorized
211 stmt. Remove delayed update code.
212 * tree-vect-slp.c (vect_analyze_slp_instance): Initialize
213 SLP instance reduc_phis member.
214 (vect_schedule_slp): Set vectorized cycle PHI latch values.
216 2020-09-04 Andrea Corallo <andrea.corallo@arm.com>
218 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Remove
219 dead code as LOOP_VINFO_USING_PARTIAL_VECTORS_P (loop_vinfo) is
222 2020-09-04 Christophe Lyon <christophe.lyon@linaro.org>
225 * config/arm/thumb1.md: Move movsi splitter for
226 arm_disable_literal_pool after the other movsi splitters.
228 2020-09-04 Aldy Hernandez <aldyh@redhat.com>
230 * range-op.cc (range_operator::fold_range): Rename widest_irange
232 (operator_div::wi_fold): Same.
233 (operator_lshift::op1_range): Same.
234 (operator_rshift::op1_range): Same.
235 (operator_cast::fold_range): Same.
236 (operator_cast::op1_range): Same.
237 (operator_bitwise_and::remove_impossible_ranges): Same.
238 (operator_bitwise_and::op1_range): Same.
239 (operator_abs::op1_range): Same.
241 (widest_irange_tests): Same.
242 (range3_tests): Rename irange3 to int_range3.
243 (int_range_max_tests): Rename from widest_irange_tests.
244 Rename widest_irange to int_range_max.
245 (operator_tests): Rename widest_irange to int_range_max.
247 * tree-vrp.c (find_case_label_range): Same.
248 * value-range.cc (irange::irange_intersect): Same.
249 (irange::invert): Same.
250 * value-range.h: Same.
252 2020-09-04 Richard Biener <rguenther@suse.de>
254 PR tree-optimization/96931
255 * tree-cfgcleanup.c (cleanup_call_ctrl_altering_flag): If
256 there's a fallthru edge and no abnormal edge the call is
257 no longer control-altering.
258 (cleanup_control_flow_bb): Pass down the BB to
259 cleanup_call_ctrl_altering_flag.
261 2020-09-04 Jakub Jelinek <jakub@redhat.com>
263 * lto-streamer.h (stream_input_location_now): Remove declaration.
264 * lto-streamer-in.c (stream_input_location_now): Remove.
265 (input_eh_region, input_struct_function_base): Use
266 stream_input_location instead of stream_input_location_now.
268 2020-09-04 Jakub Jelinek <jakub@redhat.com>
270 * lto-streamer.h (struct output_block): Add reset_locus member.
271 * lto-streamer-out.c (clear_line_info): Set reset_locus to true.
272 (lto_output_location_1): If reset_locus, clear it and ensure
273 current_{file,line,col} is different from xloc members.
275 2020-09-04 David Faust <david.faust@oracle.com>
277 * config/bpf/bpf.h (ASM_SPEC): Pass -mxbpf to gas, if specified.
278 * config/bpf/bpf.c (bpf_output_call): Support indirect calls in xBPF.
280 2020-09-03 Martin Jambor <mjambor@suse.cz>
282 PR tree-optimization/96820
283 * tree-sra.c (create_access): Disqualify candidates with accesses
284 beyond the end of the original aggregate.
285 (maybe_add_sra_candidate): Check that candidate type size fits
286 signed uhwi for the sake of consistency.
288 2020-09-03 Will Schmidt <will_schmidt@vnet.ibm.com>
290 * config/rs6000/rs6000-call.c (rs6000_init_builtin): Update V2DI_type_node
291 and unsigned_V2DI_type_node definitions.
293 2020-09-03 Jakub Jelinek <jakub@redhat.com>
296 * tree.h (struct decl_tree_traits): New type.
297 (decl_tree_map): New typedef.
299 2020-09-03 Jakub Jelinek <jakub@redhat.com>
302 * gimple.h (gimple_location_ptr, gimple_phi_arg_location_ptr): New
304 * streamer-hooks.h (struct streamer_hooks): Add
305 output_location_and_block callback. Fix up formatting for
307 (stream_output_location_and_block): Define.
308 * lto-streamer.h (class lto_location_cache): Fix comment typo. Add
309 current_block member.
310 (lto_location_cache::input_location_and_block): New method.
311 (lto_location_cache::lto_location_cache): Initialize current_block.
312 (lto_location_cache::cached_location): Add block member.
313 (struct output_block): Add current_block member.
314 (lto_output_location): Formatting fix.
315 (lto_output_location_and_block): Declare.
316 * lto-streamer.c (lto_streamer_hooks_init): Initialize
317 streamer_hooks.output_location_and_block.
318 * lto-streamer-in.c (lto_location_cache::cmp_loc): Also compare
320 (lto_location_cache::apply_location_cache): Handle blocks.
321 (lto_location_cache::accept_location_cache,
322 lto_location_cache::revert_location_cache): Fix up function comments.
323 (lto_location_cache::input_location_and_block): New method.
324 (lto_location_cache::input_location): Implement using
325 input_location_and_block.
326 (input_function): Invoke apply_location_cache after streaming in all
328 * lto-streamer-out.c (clear_line_info): Set current_block.
329 (lto_output_location_1): New function, moved from lto_output_location,
330 added block handling.
331 (lto_output_location): Implement using lto_output_location_1.
332 (lto_output_location_and_block): New function.
333 * gimple-streamer-in.c (input_phi): Use input_location_and_block
334 to input and cache both location and block.
335 (input_gimple_stmt): Likewise.
336 * gimple-streamer-out.c (output_phi): Use
337 stream_output_location_and_block.
338 (output_gimple_stmt): Likewise.
340 2020-09-03 Richard Biener <rguenther@suse.de>
342 * tree-vect-generic.c (tree_vec_extract): Remove odd
343 special-casing of boolean vectors.
344 * fold-const.c (fold_ternary_loc): Handle boolean vector
347 2020-09-03 Hongtao Liu <hongtao.liu@intel.com>
350 * config/i386/i386-features.c
351 (replace_constant_pool_with_broadcast): New function.
352 (constant_pool_broadcast): Ditto.
353 (class pass_constant_pool_broadcast): New pass.
354 (make_pass_constant_pool_broadcast): Ditto.
355 (remove_partial_avx_dependency): Call
356 replace_constant_pool_with_broadcast under TARGET_AVX512F, it
357 would save compile time when both pass rpad and cpb are
359 (remove_partial_avx_dependency_gate): New function.
360 (class pass_remove_partial_avx_dependency::gate): Call
361 remove_partial_avx_dependency_gate.
362 * config/i386/i386-passes.def: Insert new pass after combine.
363 * config/i386/i386-protos.h
364 (make_pass_constant_pool_broadcast): Declare.
365 * config/i386/sse.md (*avx512dq_mul<mode>3<mask_name>_bcst):
367 (*avx512f_mul<mode>3<mask_name>_bcst): Ditto.
368 * config/i386/avx512fintrin.h (_mm512_set1_ps,
369 _mm512_set1_pd,_mm512_set1_epi32, _mm512_set1_epi64): Adjusted.
371 2020-09-02 Jonathan Wakely <jwakely@redhat.com>
374 * ginclude/stdbool.h (bool, false, true): Never define for C++.
376 2020-09-02 Jozef Lawrynowicz <jozef.l@mittosystems.com>
378 * doc/invoke.texi (MSP430 options): Fix -mlarge description to
379 indicate size_t is a 20-bit type.
381 2020-09-02 Roger Sayle <roger@nextmovesoftware.com>
383 * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFTRT, LSHIFTRT]:
384 Provide accurate costs for shifts of integer constants.
386 2020-09-02 Jose E. Marchesi <jose.marchesi@oracle.com>
388 * config/bpf/bpf.c (bpf_asm_named_section): Delete.
389 (TARGET_ASM_NAMED_SECTION): Likewise.
391 2020-09-02 Jose E. Marchesi <jemarch@gnu.org>
393 * config.gcc: Use elfos.h in bpf-*-* targets.
394 * config/bpf/bpf.h (MAX_OFILE_ALIGNMENT): Remove definition.
395 (COMMON_ASM_OP): Likewise.
396 (INIT_SECTION_ASM_OP): Likewise.
397 (FINI_SECTION_ASM_OP): Likewise.
398 (ASM_OUTPUT_SKIP): Likewise.
399 (ASM_OUTPUT_ALIGNED_COMMON): Likewise.
400 (ASM_OUTPUT_ALIGNED_LOCAL): Likewise.
402 2020-09-01 Martin Sebor <msebor@redhat.com>
404 * builtins.c (compute_objsize): Only replace the upper bound
405 of a POINTER_PLUS offset when it's less than the lower bound.
407 2020-09-01 Peter Bergner <bergner@linux.ibm.com>
410 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Do not
411 reuse accumulator memory reference for source and destination accesses.
413 2020-09-01 Martin Liska <mliska@suse.cz>
415 * cfgrtl.c (rtl_create_basic_block): Use default value for
416 growth vector function.
417 * gimple.c (gimple_set_bb): Likewise.
418 * symbol-summary.h: Likewise.
419 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
420 (build_gimple_cfg): Likewise.
421 (create_bb): Likewise.
422 (move_block_to_fn): Likewise.
424 2020-09-01 Martin Liska <mliska@suse.cz>
426 * vec.h (vec_safe_grow): Change default of exact to false.
427 (vec_safe_grow_cleared): Likewise.
429 2020-09-01 Roger Sayle <roger@nextmovesoftware.com>
432 * targhooks.c (default_vector_alignment): Return at least the
433 GET_MODE_ALIGNMENT for the type's mode.
435 2020-09-01 Richard Biener <rguenther@suse.de>
437 PR rtl-optimization/96812
438 * tree-ssa-address.c (copy_ref_info): Also copy dependence info.
439 * cfgrtl.h (duplicate_insn_chain): Adjust prototype.
440 * cfgrtl.c (duplicate_insn_chain): Remap dependence info
442 (cfg_layout_duplicate_bb): Make sure we remap dependence info.
443 * modulo-sched.c (duplicate_insns_of_cycles): Remap dependence
445 (generate_prolog_epilog): Adjust.
446 * config/c6x/c6x.c (hwloop_optimize): Remap dependence info.
448 2020-09-01 Kewen Lin <linkw@gcc.gnu.org>
450 * doc/sourcebuild.texi (has_arch_pwr5, has_arch_pwr6, has_arch_pwr7,
451 has_arch_pwr8, has_arch_pwr9): Document.
453 2020-08-31 Carl Love <cel@us.ibm.com>
456 * config/rs6000/altivec.h (vec_popcntb, vec_popcnth, vec_popcntw,
457 vec_popcntd): Remove defines.
459 2020-08-31 Marek Polacek <polacek@redhat.com>
460 Jason Merrill <jason@redhat.com>
463 * tree.c (build_constructor_from_vec): New.
464 * tree.h (build_constructor_from_vec): Declare.
466 2020-08-31 Aldy Hernandez <aldyh@redhat.com>
468 PR tree-optimization/96818
469 * tree-vrp.c (find_case_label_range): Cast label range to
470 type of switch operand.
472 2020-08-31 liuhongt <hongtao.liu@intel.com>
475 * config/i386/sse.md (vec_unpacku_float_hi_v16si): For vector
476 compare to integer mask, don't use gen_rtx_LT, use
477 ix86_expand_mask_vec_cmp instead.
478 (vec_unpacku_float_hi_v16si): Ditto.
480 2020-08-31 Jakub Jelinek <jakub@redhat.com>
482 * tree-cfg.c (verify_gimple_switch): If the first non-default case
483 label has CASE_HIGH, verify it has the same type as CASE_LOW.
485 2020-08-31 Feng Xue <fxue@os.amperecomputing.com>
488 * ipa-cp.c (decide_about_value): Use safe_add to avoid cost addition
491 2020-08-31 Jakub Jelinek <jakub@redhat.com>
494 * varasm.c: Include alloc-pool.h.
495 (output_constant_pool_contents): Emit desc->mark < 0 entries as
497 (struct constant_descriptor_rtx_data): New type.
498 (constant_descriptor_rtx_data_cmp): New function.
499 (struct const_rtx_data_hasher): New type.
500 (const_rtx_data_hasher::hash, const_rtx_data_hasher::equal): New
502 (optimize_constant_pool): New function.
503 (output_shared_constant_pool): Call it if TARGET_SUPPORTS_ALIASES.
505 2020-08-31 Kewen Lin <linkw@gcc.gnu.org>
507 * doc/sourcebuild.texi (vect_len_load_store,
508 vect_partial_vectors_usage_1, vect_partial_vectors_usage_2,
509 vect_partial_vectors): Document.
511 2020-08-30 Martin Sebor <msebor@redhat.com>
513 * builtins.c (access_ref::access_ref): Call get_size_range instead
516 2020-08-30 Jakub Jelinek <jakub@redhat.com>
518 * config/i386/sse.md (ssse3_pshufbv8qi): Use gen_int_mode instead of
519 GEN_INT, and ix86_build_const_vector instead of gen_rtvec and
522 2020-08-29 Bill Schmidt <wschmidt@linux.ibm.com>
524 * config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
525 * config/rs6000/rs6000-call.c (rs6000_expand_builtin): Remove
526 all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
528 2020-08-28 Martin Sebor <msebor@redhat.com>
530 * attribs.c (init_attr_rdwr_indices): Use global access_mode.
531 * attribs.h (struct attr_access): Same.
532 * builtins.c (fold_builtin_strlen): Add argument.
533 (compute_objsize): Declare.
534 (get_range): Declare.
535 (check_read_access): New function.
536 (access_ref::access_ref): Define ctor.
537 (warn_string_no_nul): Add arguments. Handle -Wstrintop-overread.
538 (check_nul_terminated_array): Handle source strings of different
540 (expand_builtin_strlen): Remove warning code, call check_read_access
541 instead. Declare locals closer to their initialization.
542 (expand_builtin_strnlen): Same.
543 (maybe_warn_for_bound): New function.
544 (warn_for_access): Remove argument. Handle -Wstrintop-overread.
545 (inform_access): Change argument type.
546 (get_size_range): New function.
547 (check_access): Remove unused arguments. Add new arguments. Handle
548 -Wstrintop-overread. Move warning code to helpers and call them.
549 Call check_nul_terminated_array.
550 (check_memop_access): Remove unnecessary and provide additional
552 (expand_builtin_memchr): Call check_read_access.
553 (expand_builtin_strcat): Remove unnecessary and provide additional
555 (expand_builtin_strcpy): Same.
556 (expand_builtin_strcpy_args): Same. Avoid testing no-warning bit.
557 (expand_builtin_stpcpy_1): Remove unnecessary and provide additional
559 (expand_builtin_stpncpy): Same.
560 (check_strncat_sizes): Same.
561 (expand_builtin_strncat): Remove unnecessary and provide additional
562 arguments in calls. Adjust comments.
563 (expand_builtin_strncpy): Remove unnecessary and provide additional
565 (expand_builtin_memcmp): Remove warning code. Call check_access.
566 (expand_builtin_strcmp): Call check_access instead of
567 check_nul_terminated_array.
568 (expand_builtin_strncmp): Handle -Wstrintop-overread.
569 (expand_builtin_fork_or_exec): Call check_access instead of
570 check_nul_terminated_array.
571 (expand_builtin): Same.
572 (fold_builtin_1): Pass additional argument.
573 (fold_builtin_n): Same.
574 (fold_builtin_strpbrk): Remove calls to check_nul_terminated_array.
575 (expand_builtin_memory_chk): Add comments.
576 (maybe_emit_chk_warning): Remove unnecessary and provide additional
578 (maybe_emit_sprintf_chk_warning): Same. Adjust comments.
579 * builtins.h (warn_string_no_nul): Add arguments.
580 (struct access_ref): Add member and ctor argument.
581 (struct access_data): Add members and ctor.
582 (check_access): Adjust signature.
583 * calls.c (maybe_warn_nonstring_arg): Return an indication of
584 whether a warning was issued. Issue -Wstrintop-overread instead
585 of -Wstringop-overflow.
586 (append_attrname): Adjust to naming changes.
587 (maybe_warn_rdwr_sizes): Same. Remove unnecessary and provide
588 additional arguments in calls.
589 * calls.h (maybe_warn_nonstring_arg): Return bool.
590 * doc/invoke.texi (-Wstringop-overread): Document new option.
591 * gimple-fold.c (gimple_fold_builtin_strcpy): Provide an additional
593 (gimple_fold_builtin_stpcpy): Same.
594 * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Adjust to naming
596 * tree.h (enum access_mode): New type.
598 2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
600 * config/rs6000/rs6000.c (rs6000_call_aix): Remove test for r12.
601 (rs6000_sibcall_aix): Likewise.
603 2020-08-28 Andrew Stubbs <ams@codesourcery.com>
605 * config/gcn/gcn-tree.c (gcn_goacc_get_worker_red_decl): Add "true"
606 parameter to vec_safe_grow_cleared.
608 2020-08-28 Martin Sebor <msebor@redhat.com>
610 * ggc-common.c (gt_pch_save): Add argument to a call.
612 2020-08-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
615 * config/aarch64/aarch64-sve.md
616 (cond_sub<mode>_relaxed_const): Updated and renamed from
617 cond_sub<mode>_any_const pattern.
618 (cond_sub<mode>_strict_const): New pattern.
620 2020-08-28 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
622 * doc/rtl.texi: Fix typo.
624 2020-08-28 Uros Bizjak <ubizjak@gmail.com>
627 * config/i386/i386-expand.c (split_double_mode): Also handle
628 E_P2HImode and E_P2QImode.
629 * config/i386/sse.md (MASK_DWI): New define_mode_iterator.
630 (mov<mode>): New expander for P2HI,P2QI.
631 (*mov<mode>_internal): New define_insn_and_split to split
632 movement of P2QI/P2HI to 2 movqi/movhi patterns after reload.
634 2020-08-28 liuhongt <hongtao.liu@intel.com>
636 * common/config/i386/i386-common.c (ix86_handle_option): Set
637 AVX512DQ when AVX512VP2INTERSECT exists.
639 2020-08-27 Jakub Jelinek <jakub@redhat.com>
642 * config/i386/i386.c (iamcu_alignment): Don't decrease alignment
643 for TYPE_ATOMIC types.
644 (ix86_local_alignment): Likewise.
645 (ix86_minimum_alignment): Likewise.
646 (x86_field_alignment): Likewise, and emit a -Wpsabi diagnostic
649 2020-08-27 Bill Schmidt <wschmidt@linux.ibm.com>
652 * config/rs6000/rs6000.c (rs6000_sibcall_aix): Support
653 indirect call for ELFv2.
655 2020-08-27 Richard Biener <rguenther@suse.de>
657 PR tree-optimization/96522
658 * tree-ssa-address.c (copy_ref_info): Reset flow-sensitive
659 info of the copied points-to. Transfer bigger alignment
661 * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt):
662 Reset all flow-sensitive info.
664 2020-08-27 Martin Liska <mliska@suse.cz>
666 * alias.c (init_alias_analysis): Set exact argument of a vector
667 growth function to true.
668 * calls.c (internal_arg_pointer_based_exp_scan): Likewise.
669 * cfgbuild.c (find_many_sub_basic_blocks): Likewise.
670 * cfgexpand.c (expand_asm_stmt): Likewise.
671 * cfgrtl.c (rtl_create_basic_block): Likewise.
672 * combine.c (combine_split_insns): Likewise.
673 (combine_instructions): Likewise.
674 * config/aarch64/aarch64-sve-builtins.cc (function_expander::add_output_operand): Likewise.
675 (function_expander::add_input_operand): Likewise.
676 (function_expander::add_integer_operand): Likewise.
677 (function_expander::add_address_operand): Likewise.
678 (function_expander::add_fixed_operand): Likewise.
679 * df-core.c (df_worklist_dataflow_doublequeue): Likewise.
680 * dwarf2cfi.c (update_row_reg_save): Likewise.
681 * early-remat.c (early_remat::init_block_info): Likewise.
682 (early_remat::finalize_candidate_indices): Likewise.
683 * except.c (sjlj_build_landing_pads): Likewise.
684 * final.c (compute_alignments): Likewise.
685 (grow_label_align): Likewise.
686 * function.c (temp_slots_at_level): Likewise.
687 * fwprop.c (build_single_def_use_links): Likewise.
688 (update_uses): Likewise.
689 * gcc.c (insert_wrapper): Likewise.
690 * genautomata.c (create_state_ainsn_table): Likewise.
691 (add_vect): Likewise.
692 (output_dead_lock_vect): Likewise.
693 * genmatch.c (capture_info::capture_info): Likewise.
694 (parser::finish_match_operand): Likewise.
695 * genrecog.c (optimize_subroutine_group): Likewise.
696 (merge_pattern_info::merge_pattern_info): Likewise.
697 (merge_into_decision): Likewise.
698 (print_subroutine_start): Likewise.
700 * gimple-loop-versioning.cc (loop_versioning::loop_versioning): Likewise.
701 * gimple.c (gimple_set_bb): Likewise.
702 * graphite-isl-ast-to-gimple.c (translate_isl_ast_node_user): Likewise.
703 * haifa-sched.c (sched_extend_luids): Likewise.
704 (extend_h_i_d): Likewise.
705 * insn-addr.h (insn_addresses_new): Likewise.
706 * ipa-cp.c (gather_context_independent_values): Likewise.
707 (find_more_contexts_for_caller_subset): Likewise.
708 * ipa-devirt.c (final_warning_record::grow_type_warnings): Likewise.
709 (ipa_odr_read_section): Likewise.
710 * ipa-fnsummary.c (evaluate_properties_for_edge): Likewise.
711 (ipa_fn_summary_t::duplicate): Likewise.
712 (analyze_function_body): Likewise.
713 (ipa_merge_fn_summary_after_inlining): Likewise.
714 (read_ipa_call_summary): Likewise.
715 * ipa-icf.c (sem_function::bb_dict_test): Likewise.
716 * ipa-prop.c (ipa_alloc_node_params): Likewise.
717 (parm_bb_aa_status_for_bb): Likewise.
718 (ipa_compute_jump_functions_for_edge): Likewise.
719 (ipa_analyze_node): Likewise.
720 (update_jump_functions_after_inlining): Likewise.
721 (ipa_read_edge_info): Likewise.
722 (read_ipcp_transformation_info): Likewise.
723 (ipcp_transform_function): Likewise.
724 * ipa-reference.c (ipa_reference_write_optimization_summary): Likewise.
725 * ipa-split.c (execute_split_functions): Likewise.
726 * ira.c (find_moveable_pseudos): Likewise.
727 * lower-subreg.c (decompose_multiword_subregs): Likewise.
728 * lto-streamer-in.c (input_eh_regions): Likewise.
729 (input_cfg): Likewise.
730 (input_struct_function_base): Likewise.
731 (input_function): Likewise.
732 * modulo-sched.c (set_node_sched_params): Likewise.
733 (extend_node_sched_params): Likewise.
734 (schedule_reg_moves): Likewise.
735 * omp-general.c (omp_construct_simd_compare): Likewise.
736 * passes.c (pass_manager::create_pass_tab): Likewise.
737 (enable_disable_pass): Likewise.
738 * predict.c (determine_unlikely_bbs): Likewise.
739 * profile.c (compute_branch_probabilities): Likewise.
740 * read-rtl-function.c (function_reader::parse_block): Likewise.
741 * read-rtl.c (rtx_reader::read_rtx_code): Likewise.
742 * reg-stack.c (stack_regs_mentioned): Likewise.
743 * regrename.c (regrename_init): Likewise.
744 * rtlanal.c (T>::add_single_to_queue): Likewise.
745 * sched-deps.c (init_deps_data_vector): Likewise.
746 * sel-sched-ir.c (sel_extend_global_bb_info): Likewise.
747 (extend_region_bb_info): Likewise.
748 (extend_insn_data): Likewise.
749 * symtab.c (symtab_node::create_reference): Likewise.
750 * tracer.c (tail_duplicate): Likewise.
751 * trans-mem.c (tm_region_init): Likewise.
752 (get_bb_regions_instrumented): Likewise.
753 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
754 (build_gimple_cfg): Likewise.
755 (create_bb): Likewise.
756 (move_block_to_fn): Likewise.
757 * tree-complex.c (tree_lower_complex): Likewise.
758 * tree-if-conv.c (predicate_rhs_code): Likewise.
759 * tree-inline.c (copy_bb): Likewise.
760 * tree-into-ssa.c (get_ssa_name_ann): Likewise.
761 (mark_phi_for_rewrite): Likewise.
762 * tree-object-size.c (compute_builtin_object_size): Likewise.
763 (init_object_sizes): Likewise.
764 * tree-predcom.c (initialize_root_vars_store_elim_1): Likewise.
765 (initialize_root_vars_store_elim_2): Likewise.
766 (prepare_initializers_chain_store_elim): Likewise.
767 * tree-ssa-address.c (addr_for_mem_ref): Likewise.
768 (multiplier_allowed_in_address_p): Likewise.
769 * tree-ssa-coalesce.c (ssa_conflicts_new): Likewise.
770 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
771 * tree-ssa-loop-ivopts.c (addr_offset_valid_p): Likewise.
772 (get_address_cost_ainc): Likewise.
773 * tree-ssa-loop-niter.c (discover_iteration_bound_by_body_walk): Likewise.
774 * tree-ssa-pre.c (add_to_value): Likewise.
775 (phi_translate_1): Likewise.
776 (do_pre_regular_insertion): Likewise.
777 (do_pre_partial_partial_insertion): Likewise.
778 (init_pre): Likewise.
779 * tree-ssa-propagate.c (ssa_prop_init): Likewise.
780 (update_call_from_tree): Likewise.
781 * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Likewise.
782 * tree-ssa-sccvn.c (vn_reference_lookup_3): Likewise.
783 (vn_reference_lookup_pieces): Likewise.
784 (eliminate_dom_walker::eliminate_push_avail): Likewise.
785 * tree-ssa-strlen.c (set_strinfo): Likewise.
786 (get_stridx_plus_constant): Likewise.
787 (zero_length_string): Likewise.
788 (find_equal_ptrs): Likewise.
789 (printf_strlen_execute): Likewise.
790 * tree-ssa-threadedge.c (set_ssa_name_value): Likewise.
791 * tree-ssanames.c (make_ssa_name_fn): Likewise.
792 * tree-streamer-in.c (streamer_read_tree_bitfields): Likewise.
793 * tree-vect-loop.c (vect_record_loop_mask): Likewise.
794 (vect_get_loop_mask): Likewise.
795 (vect_record_loop_len): Likewise.
796 (vect_get_loop_len): Likewise.
797 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
798 * tree-vect-slp.c (vect_slp_convert_to_external): Likewise.
799 (vect_bb_slp_scalar_cost): Likewise.
800 (vect_bb_vectorization_profitable_p): Likewise.
801 (vectorizable_slp_permutation): Likewise.
802 * tree-vect-stmts.c (vectorizable_call): Likewise.
803 (vectorizable_simd_clone_call): Likewise.
804 (scan_store_can_perm_p): Likewise.
805 (vectorizable_store): Likewise.
807 * vec.c (test_safe_grow_cleared): Likewise.
808 * vec.h (vec_safe_grow): Likewise.
809 (vec_safe_grow_cleared): Likewise.
810 (vl_ptr>::safe_grow): Likewise.
811 (vl_ptr>::safe_grow_cleared): Likewise.
812 * config/c6x/c6x.c (insn_set_clock): Likewise.
814 2020-08-27 Richard Biener <rguenther@suse.de>
816 * tree-pretty-print.c (dump_mem_ref): Handle TARGET_MEM_REFs.
817 (dump_generic_node): Use dump_mem_ref also for TARGET_MEM_REF.
819 2020-08-27 Alex Coplan <alex.coplan@arm.com>
821 * lra-constraints.c (canonicalize_reload_addr): New.
822 (curr_insn_transform): Use canonicalize_reload_addr to ensure we
823 generate canonical RTL for an address reload.
825 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
827 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
828 for rounding intrinsics.
830 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
832 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
833 for min/max intrinsics.
835 2020-08-27 Richard Biener <rguenther@suse.de>
837 PR tree-optimization/96579
838 * tree-ssa-reassoc.c (linearize_expr_tree): If we expand
839 rhs via special ops make sure to swap operands.
841 2020-08-27 Richard Biener <rguenther@suse.de>
843 PR tree-optimization/96565
844 * tree-ssa-dse.c (dse_classify_store): Remove defs with
845 no uses from further processing.
847 2020-08-26 Göran Uddeborg <goeran@uddeborg.se>
849 PR gcov-profile/96285
850 * common.opt, doc/invoke.texi: Clarify wording of
851 -fprofile-exclude-files and adjust -fprofile-filter-files to
854 2020-08-26 H.J. Lu <hjl.tools@gmail.com>
857 * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
858 Reject target("no-general-regs-only").
860 2020-08-26 Jozef Lawrynowicz <jozef.l@mittosystems.com>
862 * config/msp430/constraints.md (K): Change unused constraint to
863 constraint to a const_int between 1 and 19.
865 * config/msp430/msp430-protos.h (msp430x_logical_shift_right): Remove.
866 (msp430_expand_shift): New.
867 (msp430_output_asm_shift_insns): New.
868 * config/msp430/msp430.c (msp430_rtx_costs): Remove shift costs.
870 (msp430_expand_helper): Remove hard-coded generation of some inline
872 (use_helper_for_const_shift): New.
873 (msp430_expand_shift): New.
874 (msp430_output_asm_shift_insns): New.
875 (msp430_print_operand): Add new 'W' operand selector.
876 (msp430x_logical_shift_right): Remove.
877 * config/msp430/msp430.md (HPSI): New define_mode_iterator.
879 (any_shift): New define_code_iterator.
880 (shift_insn): New define_code_attr.
881 Adjust unnamed insn patterns searched for by combine.
884 (430x_shift_left): Remove.
891 (430x_arithmetic_shift_right): Remove.
900 (430x_logical_shift_right): Remove.
906 (<shift_insn><mode>3): New define_expand.
907 (<shift_insn>hi3_430): New define_insn.
908 (<shift_insn>si3_const): Likewise.
909 (ashl<mode>3_430x): Likewise.
910 (ashr<mode>3_430x): Likewise.
911 (lshr<mode>3_430x): Likewise.
912 (*bitbranch<mode>4_z): Replace renamed predicate msp430_bitpos with
913 const_0_to_15_operand.
914 * config/msp430/msp430.opt: New option -mmax-inline-shift=.
915 * config/msp430/predicates.md (const_1_to_8_operand): New predicate.
916 (const_0_to_15_operand): Rename msp430_bitpos predicate.
917 (const_1_to_19_operand): New predicate.
918 * doc/invoke.texi: Document -mmax-inline-shift=.
920 2020-08-26 Aldy Hernandez <aldyh@redhat.com>
922 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Abstract code out to...
923 * tree-vrp.c (find_case_label_range): ...here. Rewrite for to use irange
925 (simplify_stmt_for_jump_threading): Call find_case_label_range instead of
926 duplicating the code in simplify_stmt_for_jump_threading.
927 * tree-vrp.h (find_case_label_range): New prototype.
929 2020-08-26 Richard Biener <rguenther@suse.de>
931 PR tree-optimization/96698
932 * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): New.
933 (loop_vec_info::reduc_latch_slp_defs): Likewise.
934 * tree-vect-stmts.c (vect_transform_stmt): Only record
935 stmts to update PHI latches from, perform the update ...
936 * tree-vect-loop.c (vect_transform_loop): ... here after
937 vectorizing those PHIs.
938 (info_for_reduction): Properly handle non-reduction PHIs.
940 2020-08-26 Martin Liska <mliska@suse.cz>
942 * cgraphunit.c (process_symver_attribute): Match only symver
945 2020-08-26 Richard Biener <rguenther@suse.de>
947 PR tree-optimization/96783
948 * tree-vect-stmts.c (get_group_load_store_type): Use
949 VMAT_ELEMENTWISE for negative strides when we cannot
950 use VMAT_STRIDED_SLP.
952 2020-08-26 Martin Liska <mliska@suse.cz>
954 * doc/invoke.texi: Document how are pie and pic options merged.
956 2020-08-26 Zhiheng Xie <xiezhiheng@huawei.com>
958 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
959 for add/sub arithmetic intrinsics.
961 2020-08-26 Jakub Jelinek <jakub@redhat.com>
964 * dwarf2out.c (dwarf2out_next_real_insn): Adjust function comment.
965 (dwarf2out_var_location): Look for next_note only if next_real is
966 non-NULL, in that case look for the first non-deleted
967 NOTE_INSN_VAR_LOCATION between loc_note and next_real, if any.
969 2020-08-26 Iain Buclaw <ibuclaw@gdcproject.org>
971 * config/tilepro/gen-mul-tables.cc (main): Define IN_TARGET_CODE to 1
974 2020-08-26 Martin Liska <mliska@suse.cz>
976 * cgraphunit.c (process_symver_attribute): Allow multiple
977 symver attributes for one symbol.
978 * doc/extend.texi: Document the change.
980 2020-08-25 H.J. Lu <hjl.tools@gmail.com>
983 * config/i386/i386.h (CTZ_DEFINED_VALUE_AT_ZERO): Return 0/2.
984 (CLZ_DEFINED_VALUE_AT_ZERO): Likewise.
986 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
989 * config/pa/pa.c (hppa_rtx_costs_shadd_p): New helper function
990 to check for coefficients supported by shNadd and shladd,l.
991 (hppa_rtx_costs): Rewrite to avoid using estimates based upon
992 FACTOR and enable recursing deeper into RTL expressions.
994 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
996 * config/pa/pa.md (ashldi3): Additionally, on !TARGET_64BIT
997 generate a two instruction shd/zdep sequence when shifting
998 registers by suitable constants.
999 (shd_internal): New define_expand to provide gen_shd_internal.
1001 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1003 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Rename
1004 __ARM_FEATURE_SVE_VECTOR_OPERATIONS to
1005 __ARM_FEATURE_SVE_VECTOR_OPERATORS.
1007 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1009 * config/aarch64/aarch64-sve-builtins.cc (add_sve_type_attribute):
1010 Take the ACLE name of the type as a parameter and add it as fourth
1011 argument to the "SVE type" attribute.
1012 (register_builtin_types): Update call accordingly.
1013 (register_tuple_type): Likewise. Construct the name of the type
1014 earlier in order to do this.
1015 (get_arm_sve_vector_bits_attributes): New function.
1016 (handle_arm_sve_vector_bits_attribute): Report a more sensible
1017 error message if the attribute is applied to an SVE tuple type.
1018 Don't allow the attribute to be applied to an existing fixed-length
1019 SVE type. Mangle the new type as __SVE_VLS<type, vector-bits>.
1020 Add a dummy TYPE_DECL to the new type.
1022 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
1024 * config/aarch64/aarch64-sve-builtins.cc (DEF_SVE_TYPE): Add a
1025 leading "u" to each mangled name.
1027 2020-08-25 Richard Biener <rguenther@suse.de>
1029 PR tree-optimization/96548
1030 PR tree-optimization/96760
1031 * tree-ssa-loop-im.c (tree_ssa_lim): Recompute RPO after
1034 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1036 PR tree-optimization/96722
1037 * gimple.c (infer_nonnull_range): Formatting fix.
1038 (infer_nonnull_range_by_dereference): Return false for clobber stmts.
1040 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1042 PR tree-optimization/96758
1043 * tree-ssa-strlen.c (handle_builtin_string_cmp): If both cstlen1
1044 and cstlen2 are set, set cmpsiz to their minimum, otherwise use the
1045 one that is set. If bound is used and smaller than cmpsiz, set cmpsiz
1046 to bound. If both cstlen1 and cstlen2 are set, perform the optimization.
1048 2020-08-25 Martin Jambor <mjambor@suse.cz>
1050 PR tree-optimization/96730
1051 * tree-sra.c (create_access): Disqualify any aggregate with negative
1053 (build_ref_for_model): Add assert that offset is non-negative.
1055 2020-08-25 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
1057 * rtl.def: Fix typo in comment.
1059 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
1061 PR tree-optimization/21137
1062 * fold-const.c (fold_binary_loc) [NE_EXPR/EQ_EXPR]: Call
1063 STRIP_NOPS when checking whether to simplify ((x>>C1)&C2) != 0.
1065 2020-08-25 Andrew Pinski <apinski@marvell.com>
1068 * config/mips/mips.md (builtin_longjmp): Restore the frame
1069 pointer and stack pointer and gp.
1071 2020-08-25 Richard Biener <rguenther@suse.de>
1074 * dwarf2out.c (reference_to_unused): Make FUNCTION_DECL
1075 processing more consistent with respect to
1076 symtab->global_info_ready.
1077 (tree_add_const_value_attribute): Unconditionally call
1078 rtl_for_decl_init to do all mangling early but throw
1079 away the result if early_dwarf.
1081 2020-08-25 Hongtao Liu <hongtao.liu@intel.com>
1084 * config/i386/sse.md: Correct the mode of NOT operands to
1087 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1089 PR tree-optimization/96715
1090 * match.pd (copysign(x,-x) -> -x): New simplification.
1092 2020-08-25 Jakub Jelinek <jakub@redhat.com>
1095 * fold-const.c (native_interpret_real): For MODE_COMPOSITE_P modes
1096 punt if the to be returned REAL_CST does not encode to the bitwise
1097 same representation.
1099 2020-08-24 Gerald Pfeifer <gerald@pfeifer.com>
1101 * doc/install.texi (Configuration): Switch valgrind.com to https.
1103 2020-08-24 Christophe Lyon <christophe.lyon@linaro.org>
1107 * config/arm/thumb1.md: Disable set-constant splitter when
1109 (thumb1_movsi_insn): Fix -mpure-code
1112 2020-08-24 Martin Liska <mliska@suse.cz>
1114 * tree-vect-data-refs.c (dr_group_sort_cmp): Work on
1116 (vect_analyze_data_ref_accesses): Work on groups.
1117 (vect_find_stmt_data_reference): Add group_id argument and fill
1118 up dataref_groups vector.
1119 * tree-vect-loop.c (vect_get_datarefs_in_loop): Pass new
1121 (vect_analyze_loop_2): Likewise.
1122 * tree-vect-slp.c (vect_slp_analyze_bb_1): Pass argument.
1123 (vect_slp_bb_region): Likewise.
1124 (vect_slp_region): Likewise.
1125 (vect_slp_bb):Work on the entire BB.
1126 * tree-vectorizer.h (vect_analyze_data_ref_accesses): Add new
1128 (vect_find_stmt_data_reference): Likewise.
1130 2020-08-24 Martin Liska <mliska@suse.cz>
1132 PR tree-optimization/96597
1133 * tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing
1134 initialization of ::punned.
1135 (vn_reference_insert): Use consistently false instead of 0.
1136 (vn_reference_insert_pieces): Likewise.
1138 2020-08-24 Hans-Peter Nilsson <hp@axis.com>
1141 * reorg.c (fill_slots_from_thread): Allow trial insns that clobber
1142 TARGET_FLAGS_REGNUM as delay-slot fillers.
1144 2020-08-23 H.J. Lu <hjl.tools@gmail.com>
1147 * config/i386/i386-options.c (IX86_ATTR_IX86_YES): New.
1148 (IX86_ATTR_IX86_NO): Likewise.
1149 (ix86_opt_type): Add ix86_opt_ix86_yes and ix86_opt_ix86_no.
1150 (ix86_valid_target_attribute_inner_p): Handle general-regs-only,
1151 ix86_opt_ix86_yes and ix86_opt_ix86_no.
1152 (ix86_option_override_internal): Check opts->x_ix86_target_flags
1153 instead of opts->x_ix86_target_flags.
1154 * doc/extend.texi: Document target("general-regs-only") function
1157 2020-08-21 Richard Sandiford <richard.sandiford@arm.com>
1159 * doc/extend.texi: Update links to Arm docs.
1160 * doc/invoke.texi: Likewise.
1162 2020-08-21 Hongtao Liu <hongtao.liu@intel.com>
1165 * config/i386/i386-expand.c
1166 (ix86_expand_vec_shift_qihi_constant): Refine.
1168 2020-08-21 Alex Coplan <alex.coplan@arm.com>
1171 * gcc.c (set_static_spec): New.
1172 (set_static_spec_owned): New.
1173 (set_static_spec_shared): New.
1174 (driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use
1175 set_static_spec_owned() to take ownership of lto_wrapper_file
1176 such that it gets freed in driver::finalize.
1177 (driver::maybe_run_linker): Use set_static_spec_shared() to
1178 ensure that we don't try and free() the static string "ld",
1179 also ensuring that any previously-allocated string in
1180 linker_name_spec is freed. Likewise with argv0.
1181 (driver::finalize): Use set_static_spec_shared() when resetting
1182 specs that previously had allocated strings; remove if(0)
1183 around call to free().
1185 2020-08-21 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
1187 * emit-rtl.c (try_split): Call copy_frame_info_to_split_insn
1188 to split certain RTX_FRAME_RELATED_P insns.
1189 * recog.c (copy_frame_info_to_split_insn): New function.
1190 (peep2_attempt): Split copying of frame related info of
1191 RTX_FRAME_RELATED_P insns into above function and call it.
1192 * recog.h (copy_frame_info_to_split_insn): Declare it.
1194 2020-08-21 liuhongt <hongtao.liu@intel.com>
1197 * config/i386/i386.c (ix86_preferred_reload_class): Allow
1198 QImode data go into mask registers.
1199 * config/i386/i386.md: (*movhi_internal): Adjust constraints
1201 (*movqi_internal): Ditto.
1202 (*anddi_1): Support mask register operations
1203 (*and<mode>_1): Ditto.
1205 (*andn<mode>_1): Ditto.
1206 (*<code><mode>_1): Ditto.
1207 (*<code>qi_1): Ditto.
1208 (*one_cmpl<mode>2_1): Ditto.
1209 (*one_cmplsi2_1_zext): Ditto.
1210 (*one_cmplqi2_1): Ditto.
1211 (define_peephole2): Move constant 0/-1 directly into mask
1213 * config/i386/predicates.md (mask_reg_operand): New predicate.
1214 * config/i386/sse.md (define_split): Add post-reload splitters
1215 that would convert "generic" patterns to mask patterns.
1216 (*knotsi_1_zext): New define_insn.
1218 2020-08-21 liuhongt <hongtao.liu@intel.com>
1220 * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost
1223 2020-08-21 liuhongt <hongtao.liu@intel.com>
1225 * config/i386/i386.c (inline_secondary_memory_needed):
1226 No memory is needed between mask regs and gpr.
1227 (ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for
1229 * config/i386/i386.h (enum reg_class): Add INT_MASK_REGS.
1230 (REG_CLASS_NAMES): Ditto.
1231 (REG_CLASS_CONTENTS): Ditto.
1232 * config/i386/i386.md: Exclude mask register in
1233 define_peephole2 which is avaiable only for gpr.
1235 2020-08-21 H.J. Lu <hjl.tools@gmail.com>
1238 * config/i386/i386.h (struct processor_costs): Add member
1239 mask_to_integer, integer_to_mask, mask_load[3], mask_store[3],
1241 * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost,
1242 i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost,
1243 geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost,
1244 bdver_cost, znver1_cost, znver2_cost, skylake_cost,
1245 btver1_cost, btver2_cost, pentium4_cost, nocona_cost,
1246 atom_cost, slm_cost, intel_cost, generic_cost, core_cost):
1247 Initialize mask_load[3], mask_store[3], mask_move,
1248 integer_to_mask, mask_to_integer for all target costs.
1249 * config/i386/i386.c (ix86_register_move_cost): Using cost
1250 model of mask registers.
1251 (inline_memory_move_cost): Ditto.
1252 (ix86_register_move_cost): Ditto.
1254 2020-08-20 Iain Buclaw <ibuclaw@gdcproject.org>
1256 * config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include
1257 VxWorks header files if -fself-test is used.
1258 (STARTFILE_PREFIX_SPEC): Avoid using VSB_DIR if -fself-test is used.
1260 2020-08-20 Joe Ramsay <Joe.Ramsay@arm.com>
1263 * config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for
1265 (mve_vst1q_<supf><mode>): Likewise.
1267 2020-08-19 2020-08-19 Carl Love <cel@us.ibm.com>
1269 * config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1,
1270 BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1,
1271 BU_P10V_VSX_2, BU_P10V_VSX_3 respectively.
1272 (BU_P10V_4): Remove.
1273 (BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4):
1274 New definitions for Power 10 Altivec macros.
1275 (VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P,
1276 VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM,
1277 VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB,
1278 VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro
1279 expansion BU_P10V_1 with BU_P10V_AV_1.
1280 (VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB,
1281 VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion
1282 BU_P10V_2 with BU_P10V_AV_2.
1283 (VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR,
1284 VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL,
1285 VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR,
1286 VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR,
1287 VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF,
1288 VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI,
1289 VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
1290 VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI,
1291 VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion
1292 BU_P10V_3 with BU_P10V_AV_3.
1293 (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion
1294 BU_P10V_1 with BU_P10V_AV_1.
1295 (XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI):
1296 Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2.
1297 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI,
1298 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor
1299 expansion BU_P10V_3 with BU_P10V_VSX_3.
1300 (XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4.
1301 (XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with
1302 BU_P10V_VSX_1. Also change MISC to CONST.
1303 * config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with
1304 P10V_BUILTIN_VXXPERMX.
1305 (P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB,
1306 P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX,
1307 P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL,
1308 P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL,
1309 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
1310 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
1311 P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR,
1312 P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR,
1313 P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR,
1314 P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR,
1315 P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR,
1316 P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI,
1317 P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI,
1318 P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF,
1319 P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI,
1320 P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI,
1321 P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF,
1322 P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI,
1323 P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI,
1324 P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI,
1325 P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID,
1326 P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF,
1327 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
1328 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI,
1329 P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF,
1330 P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI,
1331 P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI,
1332 P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL,
1333 P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P,
1334 P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR,
1335 P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P,
1336 P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM,
1337 P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
1338 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB,
1339 P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW,
1340 P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB,
1341 P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW,
1342 P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ,
1343 P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH,
1344 P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD,
1345 P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS,
1346 P10_BUILTIN_XVTLSBB_ONES): Replace with
1347 P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB,
1348 P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX,
1349 P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL,
1350 P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL,
1351 P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL,
1352 P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL,
1353 P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR
1354 P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR,
1355 P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR,
1356 P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR,
1357 P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR,
1358 P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
1359 P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
1360 P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF,
1361 P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI,
1362 P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI,
1363 P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF,
1364 P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI,
1365 P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI,
1366 P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI,
1367 P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID,
1368 P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
1369 P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI,
1370 P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI,
1371 P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF,
1372 P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI,
1373 P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI,
1374 P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL,
1375 P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P,
1376 P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR,
1377 P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P,
1378 P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM,
1379 P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM,
1380 P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB,
1381 P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW,
1382 P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB,
1383 P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW,
1384 P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ,
1385 P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH,
1386 P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD,
1387 P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS,
1388 P10V_BUILTIN_XVTLSBB_ONES respectively.
1389 * config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to
1391 (P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to
1392 P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively.
1394 2020-08-19 Bill Schmidt <wschmidt@linux.ibm.com>
1396 * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
1397 Sibcalls are always legal when the caller doesn't preserve r2.
1399 2020-08-19 Uroš Bizjak <ubizjak@gmail.com>
1401 * config/i386/i386-expand.c (ix86_expand_builtin)
1402 [case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]:
1403 Rewrite expansion to use code_for_enqcmd.
1404 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]:
1405 Rewrite expansion to use code_for_wrss.
1406 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
1407 Rewrite expansion to use code_for_wrss.
1409 2020-08-19 Feng Xue <fxue@os.amperecomputing.com>
1411 PR tree-optimization/94234
1412 * match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
1415 2020-08-19 H.J. Lu <hjl.tools@gmail.com>
1417 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
1418 Lake and Alder Lake.
1420 2020-08-19 Peixin Qiao <qiaopeixin@huawei.com>
1422 * config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove
1423 "fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion
1424 type check when calling via a function pointer or when calling a static
1427 2020-08-19 Kewen Lin <linkw@linux.ibm.com>
1429 * opts-global.c (decode_options): Call target_option_override_hook
1430 before it prints for --help=*.
1432 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
1434 * config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to
1436 * config/rs6000/rs6000-call.c (builtin_function_type): Likewise.
1437 * config/rs6000/vsx.md: Likewise.
1438 * doc/extend.texi: Likewise.
1440 2020-08-18 Aaron Sawdey <acsawdey@linux.ibm.com>
1442 * config/rs6000/rs6000-string.c (gen_lxvl_stxvl_move):
1444 (expand_block_move): Add lxvl/stxvl, vector pair, and
1446 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1447 Default value for -mblock-ops-vector-pair.
1448 * config/rs6000/rs6000.opt: Add -mblock-ops-vector-pair.
1450 2020-08-18 Aldy Hernandez <aldyh@redhat.com>
1452 * vr-values.c (check_for_binary_op_overflow): Change type of store
1454 (vr_values::adjust_range_with_scev): Abstract most of the code...
1455 (range_of_var_in_loop): ...here. Remove value_range_equiv uses.
1456 (simplify_using_ranges::simplify_using_ranges): Change type of store
1458 * vr-values.h (class range_query): New.
1459 (class simplify_using_ranges): Use range_query.
1460 (class vr_values): Add OVERRIDE to get_value_range.
1461 (range_of_var_in_loop): New.
1463 2020-08-18 Martin Sebor <msebor@redhat.com>
1467 * expr.c (convert_to_bytes): Replace statically allocated buffer with
1468 a dynamically allocated one of sufficient size.
1470 2020-08-18 Martin Sebor <msebor@redhat.com>
1472 PR tree-optimization/96670
1474 * gimple-fold.c (gimple_fold_builtin_memchr): Call byte_representation
1475 to get it, not string_constant.
1477 2020-08-18 Hu Jiangping <hujiangping@cn.fujitsu.com>
1479 * doc/gimple.texi (gimple_debug_begin_stmt_p): Add return type.
1480 (gimple_debug_inline_entry_p, gimple_debug_nonbind_marker_p): Likewise.
1482 2020-08-18 Martin Sebor <msebor@redhat.com>
1484 * fold-const.c (native_encode_expr): Update comment.
1486 2020-08-18 Uroš Bizjak <ubizjak@gmail.com>
1489 * config/i386/i386.md (restore_stack_nonlocal): Add missing compare
1490 RTX. Rewrite expander to use high-level functions in RTL construction.
1492 2020-08-18 liuhongt <hongtao.liu@intel.com>
1496 * config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
1498 (ix86_expand_pextr): Don't use pextr for TImode.
1500 2020-08-17 Uroš Bizjak <ubizjak@gmail.com>
1502 * config/i386/i386-builtin.def (__builtin_ia32_bextri_u32)
1503 (__builtin_ia32_bextri_u64): Use CODE_FOR_nothing.
1504 * config/i386/i386.md (@tbm_bextri_<mode>):
1505 Implement as parametrized name pattern.
1506 (@rdrand<mode>): Ditto.
1507 (@rdseed<mode>): Ditto.
1508 * config/i386/i386-expand.c (ix86_expand_builtin)
1509 [case IX86_BUILTIN_BEXTRI32, case IX86_BUILTIN_BEXTRI64]:
1510 Update for parameterized name patterns.
1511 [case IX86_BUILTIN_RDRAND16_STEP, case IX86_BUILTIN_RDRAND32_STEP]
1512 [case IX86_BUILTIN_RDRAND64_STEP]: Ditto.
1513 [case IX86_BUILTIN_RDSEED16_STEP, case IX86_BUILTIN_RDSEED32_STEP]
1514 [case IX86_BUILTIN_RDSEED64_STEP]: Ditto.
1516 2020-08-17 Aldy Hernandez <aldyh@redhat.com>
1518 * vr-values.c (vr_values::get_value_range): Add stmt param.
1519 (vr_values::extract_range_from_comparison): Same.
1520 (vr_values::extract_range_from_assignment): Pass stmt to
1521 extract_range_from_comparison.
1522 (vr_values::adjust_range_with_scev): Pass stmt to get_value_range.
1523 (simplify_using_ranges::vrp_evaluate_conditional): Add stmt param.
1524 Pass stmt to get_value_range.
1525 (simplify_using_ranges::vrp_visit_cond_stmt): Pass stmt to
1527 (simplify_using_ranges::simplify_abs_using_ranges): Same.
1528 (simplify_using_ranges::simplify_div_or_mod_using_ranges): Same.
1529 (simplify_using_ranges::simplify_bit_ops_using_ranges): Same.
1530 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
1531 (simplify_using_ranges::simplify_switch_using_ranges): Same.
1532 (simplify_using_ranges::simplify_float_conversion_using_ranges): Same.
1533 * vr-values.h (class vr_values): Add stmt arg to
1534 vrp_evaluate_conditional_warnv_with_ops.
1535 Add stmt arg to extract_range_from_comparison and get_value_range.
1536 (simplify_using_ranges::get_value_range): Add stmt arg.
1538 2020-08-17 liuhongt <hongtao.liu@intel.com>
1541 * config/i386/i386.c (ix86_legitimate_constant_p): Return
1542 false for ENDBR immediate.
1543 (ix86_legitimate_address_p): Ditto.
1544 * config/i386/predicates.md
1545 (x86_64_immediate_operand): Exclude ENDBR immediate.
1546 (x86_64_zext_immediate_operand): Ditto.
1547 (x86_64_dwzext_immediate_operand): Ditto.
1548 (ix86_endbr_immediate_operand): New predicate.
1550 2020-08-16 Roger Sayle <roger@nextmovesoftware.com>
1552 * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]:
1553 Simplify (sign_extend:M (truncate:N (lshiftrt:M x C))) to
1554 (ashiftrt:M x C) when the shift sets the high bits appropriately.
1556 2020-08-14 Martin Sebor <msebor@redhat.com>
1559 * builtins.c (expand_builtin_memory_copy_args): Rename called function.
1560 (expand_builtin_stpcpy_1): Remove argument from call.
1561 (expand_builtin_memcmp): Rename called function.
1562 (inline_expand_builtin_bytecmp): Same.
1563 * expr.c (convert_to_bytes): New function.
1564 (constant_byte_string): New function (formerly string_constant).
1565 (string_constant): Call constant_byte_string.
1566 (byte_representation): New function.
1567 * expr.h (byte_representation): Declare.
1568 * fold-const-call.c (fold_const_call): Rename called function.
1569 * fold-const.c (c_getstr): Remove an argument.
1570 (getbyterep): Define a new function.
1571 * fold-const.h (c_getstr): Remove an argument.
1572 (getbyterep): Declare a new function.
1573 * gimple-fold.c (gimple_fold_builtin_memory_op): Rename callee.
1574 (gimple_fold_builtin_string_compare): Same.
1575 (gimple_fold_builtin_memchr): Same.
1577 2020-08-14 David Malcolm <dmalcolm@redhat.com>
1579 * doc/analyzer.texi (Overview): Add tip about how to get a
1580 gimple dump if the analyzer ICEs.
1582 2020-08-14 Uroš Bizjak <ubizjak@gmail.com>
1584 * config/i386/i386-builtin.def (__builtin_ia32_llwpcb)
1585 (__builtin_ia32_slwpcb, __builtin_ia32_lwpval32)
1586 (__builtin_ia32_lwpval64, __builtin_ia32_lwpins32)
1587 (__builtin_ia32_lwpins64): Use CODE_FOR_nothing.
1588 * config/i386/i386.md (@lwp_llwpcb<mode>):
1589 Implement as parametrized name pattern.
1590 (@lwp_slwpcb<mode>): Ditto.
1591 (@lwp_lwpval<mode>): Ditto.
1592 (@lwp_lwpins<mode>): Ditto.
1593 * config/i386/i386-expand.c (ix86_expand_special_args_builtin)
1594 [case VOID_FTYPE_UINT_UINT_UINT, case VOID_FTYPE_UINT64_UINT_UINT]
1595 [case UCHAR_FTYPE_UINT_UINT_UINT, case UCHAR_FTYPE_UINT64_UINT_UINT]:
1597 (ix86_expand_builtin)
1598 [ case IX86_BUILTIN_LLWPCB, case IX86_BUILTIN_LLWPCB]:
1599 Update for parameterized name patterns.
1600 [case IX86_BUILTIN_LWPVAL32, case IX86_BUILTIN_LWPVAL64]
1601 [case IX86_BUILTIN_LWPINS32, case IX86_BUILTIN_LWPINS64]: Expand here.
1603 2020-08-14 Lewis Hyatt <lhyatt@gmail.com>
1605 * common.opt: Add new option -fdiagnostics-plain-output.
1606 * doc/invoke.texi: Document it.
1607 * opts-common.c (decode_cmdline_options_to_array): Implement it.
1608 (decode_cmdline_option): Add missing const qualifier to argv.
1610 2020-08-14 Jakub Jelinek <jakub@redhat.com>
1611 Jonathan Wakely <jwakely@redhat.com>
1612 Jonathan Wakely <jwakely@redhat.com>
1614 * system.h: Include type_traits.
1615 * vec.h (vec<T, A, vl_embed>::embedded_size): Use offsetof and asserts
1616 on vec_stdlayout, which is conditionally a vec (for standard layout T)
1617 and otherwise vec_embedded.
1619 2020-08-14 Jojo R <jiejie_rong@c-sky.com>
1621 * config/csky/csky-elf.h (ASM_SPEC): Use mfloat-abi.
1622 * config/csky/csky-linux-elf.h (ASM_SPEC): mfloat-abi.
1624 2020-08-13 David Malcolm <dmalcolm@redhat.com>
1640 * Makefile.in (ANALYZER_OBJS): Add analyzer/region.o,
1641 analyzer/region-model-impl-calls.o,
1642 analyzer/region-model-manager.o,
1643 analyzer/region-model-reachability.o, analyzer/store.o, and
1645 * doc/analyzer.texi: Update for changes to analyzer
1647 * tristate.h (tristate::get_value): New accessor.
1649 2020-08-13 Uroš Bizjak <ubizjak@gmail.com>
1651 * config/i386/i386-builtin.def (CET_NORMAL): Merge to CET BDESC array.
1652 (__builtin_ia32_rddspd, __builtin_ia32_rddspq, __builtin_ia32_incsspd)
1653 (__builtin_ia32_incsspq, __builtin_ia32_wrssd, __builtin_ia32_wrssq)
1654 (__builtin_ia32_wrussd, __builtin_ia32_wrussq): Use CODE_FOR_nothing.
1655 * config/i386/i386-builtins.c: Remove handling of CET_NORMAL builtins.
1656 * config/i386/i386.md (@rdssp<mode>): Implement as parametrized
1657 name pattern. Use SWI48 mode iterator. Introduce input operand
1658 and remove explicit XOR zeroing from insn template.
1659 (@incssp<mode>): Implement as parametrized name pattern.
1660 Use SWI48 mode iterator.
1661 (@wrss<mode>): Ditto.
1662 (@wruss<mode>): Ditto.
1663 (rstorssp): Remove expander. Rename insn pattern from *rstorssp<mode>.
1664 Use DImode memory operand.
1665 (clrssbsy): Remove expander. Rename insn pattern from *clrssbsy<mode>.
1666 Use DImode memory operand.
1667 (save_stack_nonlocal): Update for parametrized name patterns.
1668 Use cleared register as an argument to gen_rddsp.
1669 (restore_stack_nonlocal): Update for parametrized name patterns.
1670 * config/i386/i386-expand.c (ix86_expand_builtin):
1671 [case IX86_BUILTIN_RDSSPD, case IX86_BUILTIN_RDSSPQ]: Expand here.
1672 [case IX86_BUILTIN_INCSSPD, case IX86_BUILTIN_INCSSPQ]: Ditto.
1673 [case IX86_BUILTIN_RSTORSSP, case IX86_BUILTIN_CLRSSBSY]:
1674 Generate DImode memory operand.
1675 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]
1676 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
1677 Update for parameterized name patterns.
1679 2020-08-13 Peter Bergner <bergner@linux.ibm.com>
1682 * config/rs6000/rs6000-call.c (rs6000_promote_function_mode): Disallow
1683 MMA types as return values.
1684 (rs6000_function_arg): Disallow MMA types as function arguments.
1686 2020-08-13 Richard Sandiford <richard.sandiford@arm.com>
1689 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
1691 * config/aarch64/aarch64.c (aarch64_function_value): Add if
1692 condition to check ag_mode after entering if condition of
1693 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
1694 set as false by -mgeneral-regs-only, report the diagnostic
1695 information of -mgeneral-regs-only imcompatible with the use
1696 of fp/simd register(s).
1698 2020-08-13 Martin Liska <mliska@suse.cz>
1701 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value
1704 2020-08-13 Jakub Jelinek <jakub@redhat.com>
1706 * gimplify.c (gimplify_omp_taskloop_expr): New function.
1707 (gimplify_omp_for): Use it. For OMP_FOR_NON_RECTANGULAR
1708 loops adjust in outer taskloop the var-outer decls.
1709 * omp-expand.c (expand_omp_taskloop_for_inner): Handle non-rectangular
1711 (expand_omp_for): Don't reject non-rectangular taskloop.
1712 * omp-general.c (omp_extract_for_data): Don't assert that
1713 non-rectangular loops have static schedule, instead treat loop->m1
1714 or loop->m2 as if loop->n1 or loop->n2 is non-constant.
1716 2020-08-13 Hongtao Liu <hongtao.liu@intel.com>
1719 * config/i386/sse.md (<avx512>_load<mode>_mask,
1720 <avx512>_load<mode>_mask): Extend to generate blendm
1722 (<avx512>_blendm<mode>, <avx512>_blendm<mode>): Change
1723 define_insn to define_expand.
1725 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
1726 Uroš Bizjak <ubizjak@gmail.com>
1729 * config/i386/i386.md (peephole2): Only reorder register clearing
1730 instructions to allow use of xor for general registers.
1732 2020-08-12 Martin Liska <mliska@suse.cz>
1735 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits
1736 for bits that are unknown.
1737 (ipcp_bits_lattice::set_to_constant): Likewise.
1738 * tree-ssa-ccp.c (get_default_value): Add sanity check that
1739 IPA CP bit info has all bits set to zero in bits that
1742 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
1744 * config/aarch64/aarch64.c (aarch64_function_value): Add if
1745 condition to check ag_mode after entering if condition of
1746 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
1747 set as false by -mgeneral-regs-only, report the diagnostic
1748 information of -mgeneral-regs-only imcompatible with the use
1749 of fp/simd register(s).
1751 2020-08-12 Jakub Jelinek <jakub@redhat.com>
1753 PR tree-optimization/96535
1754 * toplev.c (process_options): Move flag_unroll_loops and
1755 flag_cunroll_grow_size handling from here to ...
1756 * opts.c (finish_options): ... here. For flag_cunroll_grow_size,
1757 don't check for AUTODETECT_VALUE, but instead check
1758 opts_set->x_flag_cunroll_grow_size.
1759 * common.opt (funroll-completely-grow-size): Default to 0.
1760 * config/rs6000/rs6000.c (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE):
1762 (rs6000_override_options_after_change): New function.
1763 (rs6000_option_override_internal): Call it. Move there the
1764 flag_cunroll_grow_size, unroll_only_small_loops and
1765 flag_rename_registers handling.
1767 2020-08-12 Tom de Vries <tdevries@suse.de>
1769 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Make elt_size an
1770 unsigned HOST_WIDE_INT. Print init_frag.remaining using
1771 HOST_WIDE_INT_PRINT_UNSIGNED.
1773 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
1774 Uroš Bizjak <ubizjak@gmail.com>
1776 * config/i386/i386.md (peephole2): Reduce unnecessary
1777 register shuffling produced by register allocation.
1779 2020-08-12 Aldy Hernandez <aldyh@redhat.com>
1781 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use vec<>
1782 instead of std::vector<>.
1783 (evaluate_properties_for_edge): Same.
1784 (ipa_fn_summary_t::duplicate): Same.
1785 (estimate_ipcp_clone_size_and_time): Same.
1786 * vec.h (<T, A, vl_embed>::embedded_size): Change vec_embedded
1787 type to contain a char[].
1789 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
1792 * config/s390/s390.c (s390_cannot_force_const_mem): Reject an
1793 unary minus for everything not being a numeric constant.
1794 (legitimize_tls_address): Move a NEG out of the CONST rtx.
1796 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
1799 * config/s390/s390.h (TARGET_NONSIGNALING_VECTOR_COMPARE_OK): New
1801 * config/s390/vector.md (vcond_comparison_operator): Use new macro
1804 2020-08-11 Jakub Jelinek <jakub@redhat.com>
1806 PR rtl-optimization/96539
1807 * expr.c (emit_block_move_hints): Don't copy anything if x and y
1808 are the same and neither is MEM_VOLATILE_P.
1810 2020-08-11 Jakub Jelinek <jakub@redhat.com>
1813 * tree.c (get_narrower): Use TREE_TYPE (ret) instead of
1814 TREE_TYPE (win) for COMPOUND_EXPRs.
1816 2020-08-11 Jan Hubicka <hubicka@ucw.cz>
1818 * predict.c (not_loop_guard_equal_edge_p): New function.
1819 (maybe_predict_edge): New function.
1820 (predict_paths_for_bb): Use it.
1821 (predict_paths_leading_to_edge): Use it.
1823 2020-08-11 Martin Liska <mliska@suse.cz>
1825 * dbgcnt.def (DEBUG_COUNTER): Add ipa_cp_bits.
1826 * ipa-cp.c (ipcp_store_bits_results): Use it when we store known
1827 bits for parameters.
1829 2020-08-10 Marek Polacek <polacek@redhat.com>
1831 * doc/sourcebuild.texi: Document dg-ice.
1833 2020-08-10 Roger Sayle <roger@nextmovesoftware.com>
1835 * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand
1836 signed MIN_EXPR against zero as "x < 0 ? x : 0" instead of
1837 "x <= 0 ? x : 0" to enable sign_bit_compare_p optimizations.
1839 2020-08-10 Aldy Hernandez <aldyh@redhat.com>
1841 * value-range.h (gt_ggc_mx): Declare inline.
1844 2020-08-10 Marc Glisse <marc.glisse@inria.fr>
1846 PR tree-optimization/95433
1847 * match.pd (X * C1 == C2): Handle wrapping overflow.
1848 * expr.c (maybe_optimize_mod_cmp): Qualify call to mod_inv.
1850 * wide-int.cc (mod_inv): ... here.
1851 * wide-int.h (mod_inv): Declare it.
1853 2020-08-10 Jan Hubicka <hubicka@ucw.cz>
1855 * predict.c (filter_predictions): Document semantics of filter.
1856 (equal_edge_p): Rename to ...
1857 (not_equal_edge_p): ... this; reverse semantics.
1858 (remove_predictions_associated_with_edge): Fix.
1860 2020-08-10 Hongtao Liu <hongtao.liu@intel.com>
1863 * config/i386/i386-expand.c (ix86_expand_sse_cmp): Refine for
1865 (ix86_expand_mask_vec_cmp): Change prototype.
1866 * config/i386/i386-protos.h (ix86_expand_mask_vec_cmp): Change prototype.
1867 * config/i386/i386.c (ix86_print_operand): Remove operand
1869 * config/i386/sse.md
1870 (*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Deleted.
1871 (*<avx512>_cmp<mode>3<mask_scalar_merge_name>): Ditto.
1872 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
1873 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
1874 avx512f_maskcmp<mode>3): Ditto.
1876 2020-08-09 Roger Sayle <roger@nextmovesoftware.com>
1878 * expmed.c (init_expmed_one_conv): Restore all->reg's mode.
1879 (init_expmed_one_mode): Set all->reg to desired mode.
1881 2020-08-08 Peter Bergner <bergner@linux.ibm.com>
1884 * config/rs6000/rs6000.c (rs6000_invalid_conversion): Use canonical
1885 types for type comparisons. Refactor code to simplify it.
1887 2020-08-08 Jakub Jelinek <jakub@redhat.com>
1890 * tree-nested.c (convert_nonlocal_omp_clauses): For
1891 OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR
1892 save info->new_local_var_chain around walks of the clause gimple
1893 sequences and declare_vars if needed into the sequence.
1895 2020-08-08 Jakub Jelinek <jakub@redhat.com>
1897 PR tree-optimization/96424
1898 * omp-expand.c: Include tree-eh.h.
1899 (expand_omp_for_init_vars): Handle -fexceptions -fnon-call-exceptions
1900 by forcing floating point comparison into a bool temporary.
1902 2020-08-07 Marc Glisse <marc.glisse@inria.fr>
1904 * generic-match-head.c (optimize_vectors_before_lowering_p): New
1906 * gimple-match-head.c (optimize_vectors_before_lowering_p):
1908 * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it.
1910 2020-08-07 Richard Biener <rguenther@suse.de>
1912 PR tree-optimization/96514
1913 * tree-if-conv.c (if_convertible_bb_p): If the last stmt
1914 is a call that is control-altering, fail.
1916 2020-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
1918 * config/bpf/bpf.md: Remove trailing whitespaces.
1919 * config/bpf/constraints.md: Likewise.
1920 * config/bpf/predicates.md: Likewise.
1922 2020-08-07 Michael Meissner <meissner@linux.ibm.com>
1924 * config/rs6000/rs6000.md (bswaphi2_reg): Add ISA 3.1 support.
1925 (bswapsi2_reg): Add ISA 3.1 support.
1926 (bswapdi2): Rename bswapdi2_xxbrd to bswapdi2_brd.
1927 (bswapdi2_brd,bswapdi2_xxbrd): Rename. Add ISA 3.1 support.
1929 2020-08-07 Alan Modra <amodra@gmail.com>
1932 * config/rs6000/predicates.md (current_file_function_operand): Don't
1933 accept functions that differ in r2 usage.
1935 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com>
1937 * config/mmix/mmix.md (MM): New mode_iterator.
1938 ("mov<mode>"): New expander to expand for all MM-modes.
1939 ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded")
1940 ("*movsf_expanded", "*movdf_expanded"): Rename from the
1941 corresponding mov<M> named pattern. Add to the condition that
1942 either operand must be a register_operand.
1943 ("*movdi_expanded"): Similar, but also allow STCO in the condition.
1945 2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
1948 * config/arm/arm.md (arm_stack_protect_test_insn): Zero out
1949 operand 2 after use.
1950 * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
1952 2020-08-06 Peter Bergner <bergner@linux.ibm.com>
1955 * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation.
1956 Disable split for zero constant source operand.
1957 (mma_xxsetaccz): Change to define_expand. Call gen_movpxi.
1959 2020-08-06 Jakub Jelinek <jakub@redhat.com>
1961 PR tree-optimization/96480
1962 * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument.
1963 If TEST_BB ends in cond and has one edge to *OTHER_BB and another
1964 through an empty bb to that block too, if PHI args don't match, retry
1965 them through the other path from TEST_BB.
1966 (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB
1967 through inversion of the condition.
1969 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com>
1971 * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define.
1972 (KERNEL_VERSION): Remove.
1973 * config/bpf/bpf-helpers.def: Delete.
1974 * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function.
1975 (bpf_attribute_table): Define.
1976 (bpf_helper_names): Delete.
1977 (bpf_helper_code): Likewise.
1978 (enum bpf_builtins): Adjust to new helpers mechanism.
1979 (bpf_output_call): Likewise.
1980 (bpf_init_builtins): Likewise.
1981 (bpf_init_builtins): Likewise.
1982 * doc/extend.texi (BPF Function Attributes): New section.
1983 (BPF Kernel Helpers): Delete section.
1985 2020-08-06 Richard Biener <rguenther@suse.de>
1987 PR tree-optimization/96491
1988 * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid
1989 sinking across abnormal edges.
1991 2020-08-06 Richard Biener <rguenther@suse.de>
1993 PR tree-optimization/96483
1994 * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
1997 2020-08-06 Richard Biener <rguenther@suse.de>
1999 * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead
2001 (ivs_params_clear): Adjust.
2002 (gcc_expression_from_isl_ast_expr_id): Likewise.
2003 (graphite_create_new_loop): Likewise.
2004 (add_parameters_to_ivs_params): Likewise.
2006 2020-08-06 Roger Sayle <roger@nextmovesoftware.com>
2007 Uroš Bizjak <ubizjak@gmail.com>
2009 * config/i386/i386.md (MAXMIN_IMODE): No longer needed.
2010 (<maxmin><mode>3): Support SWI248 and general_operand for
2011 second operand, when TARGET_CMOVE.
2012 (<maxmin><mode>3_1 splitter): Optimize comparisons against
2013 0, 1 and -1 to use "test" instead of "cmp".
2014 (*<maxmin>di3_doubleword): Likewise, allow general_operand
2015 and enable on TARGET_CMOVE.
2016 (peephole2): Convert clearing a register after a flag setting
2017 instruction into an xor followed by the original flag setter.
2019 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com>
2021 * ipa-fnsummary.c (INCLUDE_VECTOR): Define.
2022 Remove direct inclusion of <vector>.
2024 2020-08-06 Kewen Lin <linkw@gcc.gnu.org>
2026 * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New
2028 (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop.
2029 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost
2030 modeling for vector with length.
2031 (vect_rgroup_iv_might_wrap_p): New function, factored out from...
2032 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this.
2033 Update function comment.
2034 * tree-vect-stmts.c (vect_gen_len): Update function comment.
2035 * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare.
2037 2020-08-06 Kewen Lin <linkw@linux.ibm.com>
2039 * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops
2042 2020-08-05 Marc Glisse <marc.glisse@inria.fr>
2044 PR tree-optimization/95906
2046 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
2047 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations.
2048 (op (c ? a : b)): Update to match the new transformations.
2050 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
2053 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
2054 CC register directly, instead of a GPR. Replace the original GPR
2055 destination with an extra scratch register. Zero out operand 3
2057 (stack_protect_test): Update accordingly.
2059 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
2061 * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
2062 (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
2063 (store_pair_sw_<SX:mode><SX2:mode>)
2064 (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
2065 (*load_pair_extendsidi2_aarch64)
2066 (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
2067 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
2068 (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
2069 (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
2071 2020-08-05 Richard Biener <rguenther@suse.de>
2073 * tree-ssa-loop-im.c (invariantness_dom_walker): Remove.
2074 (invariantness_dom_walker::before_dom_children): Move to ...
2075 (compute_invariantness): ... this function.
2076 (move_computations): Inline ...
2077 (tree_ssa_lim): ... here, share RPO order and avoid some
2079 (analyze_memory_references): Remove sorting of location
2080 lists, instead assert they are sorted already when checking.
2081 (prev_flag_edges): Remove.
2082 (execute_sm_if_changed): Pass down and adjust prev edge state.
2083 (execute_sm_exit): Likewise.
2084 (hoist_memory_references): Likewise. Commit edge insertions
2085 of each processed exit.
2086 (store_motion_loop): Do not commit edge insertions on all
2087 edges in the function.
2088 (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges.
2089 (tree_ssa_lim_finalize): Do not call free_aux_for_edges.
2091 2020-08-05 Richard Biener <rguenther@suse.de>
2093 * genmatch.c (fail_label): New global.
2094 (expr::gen_transform): Branch to fail_label instead of
2095 returning. Fix indent of call argument checking.
2096 (dt_simplify::gen_1): Compute and emit fail_label, branch
2097 to it instead of returning early.
2099 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2101 * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular
2104 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2107 * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
2110 2020-08-05 Jakub Jelinek <jakub@redhat.com>
2112 * omp-expand.c (expand_omp_for_init_counts): Remember
2113 first_inner_iterations, factor and n1o from the number of iterations
2115 (expand_omp_for_init_vars): Use more efficient logical iteration number
2116 to actual iterator values computation even for non-rectangular loops
2117 where number of loop iterations could not be computed at compile time.
2119 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2121 * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
2122 * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
2124 (VM3): New define_mode.
2125 (VM3_char): New define_attr.
2126 (xxblend_<mode> mode VM3): New define_insn.
2127 (xxpermx): New define_expand.
2128 (xxpermx_inst): New define_insn.
2129 * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
2130 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
2131 BU_P10V_3 definitions.
2132 (XXBLEND): New BU_P10_OVERLOAD_3 definition.
2133 (XXPERMX): New BU_P10_OVERLOAD_4 definition.
2134 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
2135 (P10_BUILTIN_VXXPERMX): Add if statement.
2136 * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI,
2137 P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI,
2138 P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF,
2139 P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define
2140 overloaded arguments.
2141 (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
2142 (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
2143 variables, add case statement for P10_BUILTIN_VXXPERMX.
2144 (builtin_function_type): Add case statements for
2145 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
2146 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI.
2147 * doc/extend.texi: Add documentation for vec_blendv and vec_permx.
2149 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2151 * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
2153 * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
2154 UNSPEC_XXSPLTI32DX): New.
2155 (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
2156 vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
2157 (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
2158 vxxsplti32dx_v4sf.): New define_expands.
2159 * config/rs6000/predicates.md (u1bit_cint_operand,
2160 s32bit_cint_operand, c32bit_cint_operand): New predicates.
2161 * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
2162 VXXSPLTID): New definitions.
2163 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3
2165 (XXSPLTIW, XXSPLTID): New definitions.
2166 (XXSPLTI32DX): Add definitions.
2167 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW,
2168 P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX):
2170 * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
2172 * config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
2173 * doc/extend.texi: Add documentation for vec_splati,
2174 vec_splatid, and vec_splati_ins.
2176 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2178 * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines.
2179 * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
2180 (SLDB_lr): New attribute.
2181 (VSHIFT_DBL_LR): New iterator.
2182 (vs<SLDB_lr>db_<mode>): New define_insn.
2183 * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
2184 VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
2185 VSRDB_V2DI): New BU_P10V_3 definitions.
2186 (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions.
2187 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB,
2188 P10_BUILTIN_VEC_SRDB): New definitions.
2189 (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
2190 CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
2191 CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
2192 CODE_FOR_vsrdb_v2di]: Add clauses.
2193 * doc/extend.texi: Add description for vec_sldb and vec_srdb.
2195 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2197 * config/rs6000/altivec.h: Add define for vec_replace_elt and
2198 vec_replace_unaligned.
2199 * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
2201 (REPLACE_ELT): New mode iterator.
2202 (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
2203 (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
2204 * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
2205 VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
2206 VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
2207 VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
2208 VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
2210 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
2211 P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
2212 (rs6000_expand_quaternop_builtin): Add 3rd argument checks for
2213 CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
2214 CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
2215 (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
2216 P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
2217 P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
2218 * doc/extend.texi: Add description for vec_replace_elt and
2219 vec_replace_unaligned builtins.
2221 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2223 * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
2224 * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
2225 VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
2226 VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
2227 VINSERTVPRHR, VINSERTVPRWR): New builtins.
2228 (INSERTL, INSERTH): New builtins.
2229 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
2230 P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
2231 (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
2232 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
2233 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
2234 P10_BUILTIN_VINSERTVPRWL): Add case entries.
2235 * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
2237 (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
2238 vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
2239 (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
2240 vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
2241 * doc/extend.texi: Add documentation for vec_insertl, vec_inserth.
2243 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
2245 * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
2246 (vextractl<mode>, vextractr<mode>)
2247 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
2249 * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
2250 (vextractl<mode>, vextractr<mode>)
2251 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
2253 * doc/extend.texi: Update documentation for vec_extractl.
2254 Replace builtin name vec_extractr with vec_extracth. Update
2255 description of vec_extracth.
2257 2020-08-04 Jim Wilson <jimw@sifive.com>
2259 * doc/invoke.texi (AArch64 Options): Delete duplicate
2260 -mstack-protector-guard docs.
2262 2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
2264 * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
2265 (umulhi3_highpart, umulsi3_highpart): New instructions.
2267 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
2269 * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
2270 (R_AMDGPU_ABS32_LO): Delete.
2271 (R_AMDGPU_ABS32_HI): Delete.
2272 (R_AMDGPU_ABS64): Delete.
2273 (R_AMDGPU_REL32): Delete.
2274 (R_AMDGPU_REL64): Delete.
2275 (R_AMDGPU_ABS32): Delete.
2276 (R_AMDGPU_GOTPCREL): Delete.
2277 (R_AMDGPU_GOTPCREL32_LO): Delete.
2278 (R_AMDGPU_GOTPCREL32_HI): Delete.
2279 (R_AMDGPU_REL32_LO): Delete.
2280 (R_AMDGPU_REL32_HI): Delete.
2282 (R_AMDGPU_RELATIVE64): Delete.
2284 2020-08-04 Omar Tahir <omar.tahir@arm.com>
2286 * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.
2288 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com>
2290 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
2291 redundant extra_cost variable.
2293 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com>
2295 * config/aarch64/aarch64-builtins.c (aarch64_call_properties):
2296 Use FLOAT_MODE_P macro instead of enumerating all floating-point
2297 modes and add global flag FLAG_AUTO_FP.
2299 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2301 * doc/extend.texi (symver): Add @cindex for symver function attribute.
2303 2020-08-04 Marc Glisse <marc.glisse@inria.fr>
2305 PR tree-optimization/95433
2306 * match.pd (X * C1 == C2): New transformation.
2308 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2310 * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
2311 (format_integer): Same.
2312 (handle_printf_call): Same.
2314 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
2316 * config/gcn/gcn.md ("<expander>ti3"): New.
2318 2020-08-04 Richard Biener <rguenther@suse.de>
2320 PR tree-optimization/88240
2321 * tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
2322 * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
2323 (vn_reference_insert_pieces): Likewise.
2324 (visit_reference_op_call): Likewise.
2325 (visit_reference_op_load): Track whether a ref was punned.
2326 * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
2327 insertion on punned floating point loads.
2329 2020-08-04 Sudakshina Das <sudi.das@arm.com>
2331 * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
2333 (aarch64_gen_load_pair): Likewise.
2334 (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
2335 (aarch64_expand_cpymem): Expand copy_limit to 256bits where
2338 2020-08-04 Andrea Corallo <andrea.corallo@arm.com>
2340 * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
2342 * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
2343 target supports option.
2345 2020-08-04 Tom de Vries <tdevries@suse.de>
2348 * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.
2350 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2353 * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
2354 call with GIMPLE_NOP if there is no lhs.
2356 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2359 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
2360 argument. Return false instead of gcc_unreachable if it is true and
2361 get_addr_base_and_unit_offset returns NULL.
2362 (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.
2364 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2366 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
2367 Call is_gimple_min_invariant dropped from previous patch.
2369 2020-08-04 Jakub Jelinek <jakub@redhat.com>
2371 * omp-expand.c (expand_omp_for_init_counts): For triangular loops
2372 compute number of iterations at runtime more efficiently.
2373 (expand_omp_for_init_vars): Adjust immediate dominators.
2374 (extract_omp_for_update_vars): Likewise.
2376 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2378 * vr-values.c (simplify_using_ranges::two_valued_val_range_p):
2381 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2383 * vr-values.c (simplify_conversion_using_ranges): Convert to irange API.
2385 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2387 * vr-values.c (test_for_singularity): Use irange API.
2388 (simplify_using_ranges::simplify_cond_using_ranges_1): Do not
2389 special case VR_RANGE.
2391 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2393 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
2396 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2398 * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
2401 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2403 * tree-ssanames.c (get_range_info): Use irange instead of value_range.
2404 * tree-ssanames.h (get_range_info): Same.
2406 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2408 * fold-const.c (expr_not_equal_to): Adjust for irange API.
2410 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2412 * builtins.c (determine_block_size): Remove ad-hoc range canonicalization.
2414 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com>
2416 PR rtl-optimization/71309
2417 * dse.c (find_shift_sequence): Use subreg of shifted from high part
2418 register to avoid loading from address.
2420 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
2422 * doc/cpp.texi (Variadic Macros): Use the exact ... token in
2425 2020-08-03 Nathan Sidwell <nathan@acm.org>
2427 * doc/invoke.texi: Refer to c++20
2429 2020-08-03 Julian Brown <julian@codesourcery.com>
2430 Thomas Schwinge <thomas@codesourcery.com>
2432 * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
2433 without a preceding data-movement mapping.
2435 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
2437 * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
2439 (DEF_MIN_OSX_VERSION): Only define if there's no existing
2442 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
2444 * config/darwin.c (IN_TARGET_CODE): Remove.
2445 (darwin_mergeable_constant_section): Handle poly-int machine modes.
2446 (machopic_select_rtx_section): Likewise.
2448 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
2450 PR tree-optimization/96430
2451 * range-op.cc (operator_tests): Do not shift by 31 on targets with
2452 integer's smaller than 32 bits.
2454 2020-08-03 Martin Jambor <mjambor@suse.cz>
2456 * hsa-brig-format.h: Moved to brig/brigfrontend.
2457 * hsa-brig.c: Removed.
2458 * hsa-builtins.def: Likewise.
2459 * hsa-common.c: Likewise.
2460 * hsa-common.h: Likewise.
2461 * hsa-dump.c: Likewise.
2462 * hsa-gen.c: Likewise.
2463 * hsa-regalloc.c: Likewise.
2464 * ipa-hsa.c: Likewise.
2465 * omp-grid.c: Likewise.
2466 * omp-grid.h: Likewise.
2467 * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
2468 (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
2469 hsa-dump.o, ipa-hsa.c and omp-grid.o.
2470 (GTFILES): Removed hsa-common.c and omp-expand.c.
2471 * builtins.def: Remove processing of hsa-builtins.def.
2472 (DEF_HSA_BUILTIN): Remove.
2473 * common.opt (flag_disable_hsa): Remove.
2475 * config.in (ENABLE_HSA): Removed.
2476 * configure.ac: Removed handling configuration for hsa offloading.
2477 (ENABLE_HSA): Removed.
2478 * configure: Regenerated.
2479 * doc/install.texi (--enable-offload-targets): Remove hsa from the
2481 (--with-hsa-runtime): Reword to reference any HSA run-time, not
2482 specifically HSA offloading.
2483 * doc/invoke.texi (Option Summary): Remove -Whsa.
2484 (Warning Options): Likewise.
2485 (Optimize Options): Remove hsa-gen-debug-stores.
2486 * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
2488 * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
2489 * gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
2490 (dump_gimple_omp_block): Likewise.
2491 (pp_gimple_stmt_1): Likewise.
2492 * gimple-walk.c (walk_gimple_stmt): Likewise.
2493 * gimple.c (gimple_build_omp_grid_body): Removed function.
2494 (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
2495 * gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
2496 * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
2497 OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
2498 GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
2499 GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and
2501 (gimple_build_omp_grid_body): Removed declaration.
2502 (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
2503 (gimple_omp_for_grid_phony): Removed.
2504 (gimple_omp_for_set_grid_phony): Likewise.
2505 (gimple_omp_for_grid_intra_group): Likewise.
2506 (gimple_omp_for_grid_intra_group): Likewise.
2507 (gimple_omp_for_grid_group_iter): Likewise.
2508 (gimple_omp_for_set_grid_group_iter): Likewise.
2509 (gimple_omp_parallel_grid_phony): Likewise.
2510 (gimple_omp_parallel_set_grid_phony): Likewise.
2511 (gimple_omp_teams_grid_phony): Likewise.
2512 (gimple_omp_teams_set_grid_phony): Likewise.
2513 (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
2514 * lto-section-in.c (lto_section_name): Removed hsa.
2515 * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
2516 * lto-wrapper.c (compile_images_for_offload_targets): Remove special
2518 * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
2519 (parallel_needs_hsa_kernel_p): Removed.
2520 (grid_launch_attributes_trees): Likewise.
2521 (grid_launch_attributes_trees): Likewise.
2522 (grid_create_kernel_launch_attr_types): Likewise.
2523 (grid_insert_store_range_dim): Likewise.
2524 (grid_get_kernel_launch_attributes): Likewise.
2525 (get_target_arguments): Remove code passing HSA grid sizes.
2526 (grid_expand_omp_for_loop): Remove.
2527 (grid_arg_decl_map): Likewise.
2528 (grid_remap_kernel_arg_accesses): Likewise.
2529 (grid_expand_target_grid_body): Likewise.
2530 (expand_omp): Remove call to grid_expand_target_grid_body.
2531 (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
2532 * omp-general.c: Do not include hsa-common.h.
2533 (omp_maybe_offloaded): Do not check for HSA offloading.
2534 (omp_context_selector_matches): Likewise.
2535 * omp-low.c: Do not include hsa-common.h and omp-grid.h.
2536 (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
2537 (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
2538 (scan_omp_parallel): Remove handling of the phoney variant.
2539 (check_omp_nesting_restrictions): Remove handling of
2540 GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
2541 (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
2542 (lower_omp_for_lastprivate): Remove handling of gridified loops.
2543 (lower_omp_for): Remove phony loop handling.
2544 (lower_omp_taskreg): Remove phony construct handling.
2545 (lower_omp_teams): Likewise.
2546 (lower_omp_grid_body): Removed.
2547 (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
2548 (execute_lower_omp): Do not call omp_grid_gridify_all_targets.
2549 * opts.c (common_handle_option): Do not handle hsa when processing
2551 * params.opt (hsa-gen-debug-stores): Remove.
2552 * passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
2553 * timevar.def: Remove TV_IPA_HSA.
2554 * toplev.c: Do not include hsa-common.h.
2555 (compile_file): Do not call hsa_output_brig.
2556 * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
2557 (tree_omp_clause): Remove union field dimension.
2558 * tree-nested.c (convert_nonlocal_omp_clauses): Remove the
2559 OMP_CLAUSE__GRIDDIM_ case.
2560 (convert_local_omp_clauses): Likewise.
2561 * tree-pass.h (make_pass_gen_hsail): Remove declaration.
2562 (make_pass_ipa_hsa): Likewise.
2563 * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
2565 * tree.c (omp_clause_num_ops): Remove the element corresponding to
2566 OMP_CLAUSE__GRIDDIM_.
2567 (omp_clause_code_name): Likewise.
2568 (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
2569 * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
2570 (OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
2571 (OMP_CLAUSE__GRIDDIM__GROUP): Likewise.
2573 2020-08-03 Bu Le <bule1@huawei.com>
2575 * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
2578 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2580 * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.
2582 2020-08-03 Yunde Zhong <zhongyunde@huawei.com>
2584 PR rtl-optimization/95696
2585 * regrename.c (regrename_analyze): New param include_all_block_p
2586 with default value TRUE. If set to false, avoid disrupting SMS
2588 * regrename.h (regrename_analyze): Adjust prototype.
2590 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
2592 * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
2593 * doc/tm.texi: Regenerate.
2595 2020-08-03 Richard Sandiford <richard.sandiford@arm.com>
2597 * doc/invoke.texi: Add missing comma after octeontx2f95mm entry.
2599 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
2601 * config/aarch64/aarch64-cores.def (a64fx): New core.
2602 * config/aarch64/aarch64-tune.md: Regenerated.
2603 * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
2604 * doc/invoke.texi: Add a64fx to the list.
2606 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
2608 PR rtl-optimization/61494
2609 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
2610 simplify x - 0.0 with -fsignaling-nans.
2612 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
2614 * genmatch.c (decision_tree::gen): Emit stub functions for
2615 tree code operand counts that have no simplifications.
2616 (main): Correct comment typo.
2618 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
2620 * gimple-ssa-sprintf.c: Fix typos in comments.
2622 2020-08-03 Tamar Christina <tamar.christina@arm.com>
2624 * config/aarch64/driver-aarch64.c (readline): Check return value fgets.
2626 2020-08-03 Richard Biener <rguenther@suse.de>
2628 * doc/match-and-simplify.texi: Amend accordingly.
2630 2020-08-03 Richard Biener <rguenther@suse.de>
2632 * genmatch.c (parser::gimple): New.
2633 (parser::parser): Initialize gimple flag member.
2634 (parser::parse_expr): Error on ! operator modifier when
2635 not targeting GIMPLE.
2636 (main): Pass down gimple flag to parser ctor.
2638 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
2640 * Makefile.in (GTFILES): Move value-range.h up.
2641 * gengtype-lex.l: Set yylval to handle GTY markers on templates.
2642 * ipa-cp.c (initialize_node_lattices): Call value_range
2644 (ipcp_propagate_stage): Use in-place new so value_range construct
2646 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
2647 vec instead of GCC's vec<>.
2648 (evaluate_properties_for_edge): Adjust for std vec.
2649 (ipa_fn_summary_t::duplicate): Same.
2650 (estimate_ipcp_clone_size_and_time): Same.
2651 * ipa-prop.c (ipa_get_value_range): Use in-place new for
2653 * ipa-prop.h (struct GTY): Remove class keyword for m_vr.
2654 * range-op.cc (empty_range_check): Rename to...
2655 (empty_range_varying): ...this and adjust for varying.
2656 (undefined_shift_range_check): Adjust for irange.
2657 (range_operator::wi_fold): Same.
2658 (range_operator::fold_range): Adjust for irange. Special case
2659 single pairs for performance.
2660 (range_operator::op1_range): Adjust for irange.
2661 (range_operator::op2_range): Same.
2662 (value_range_from_overflowed_bounds): Same.
2663 (value_range_with_overflow): Same.
2664 (create_possibly_reversed_range): Same.
2666 (range_false): Same.
2667 (range_true_and_false): Same.
2668 (get_bool_state): Adjust for irange and tweak for performance.
2669 (operator_equal::fold_range): Adjust for irange.
2670 (operator_equal::op1_range): Same.
2671 (operator_equal::op2_range): Same.
2672 (operator_not_equal::fold_range): Same.
2673 (operator_not_equal::op1_range): Same.
2674 (operator_not_equal::op2_range): Same.
2679 (operator_lt::fold_range): Same.
2680 (operator_lt::op1_range): Same.
2681 (operator_lt::op2_range): Same.
2682 (operator_le::fold_range): Same.
2683 (operator_le::op1_range): Same.
2684 (operator_le::op2_range): Same.
2685 (operator_gt::fold_range): Same.
2686 (operator_gt::op1_range): Same.
2687 (operator_gt::op2_range): Same.
2688 (operator_ge::fold_range): Same.
2689 (operator_ge::op1_range): Same.
2690 (operator_ge::op2_range): Same.
2691 (operator_plus::wi_fold): Same.
2692 (operator_plus::op1_range): Same.
2693 (operator_plus::op2_range): Same.
2694 (operator_minus::wi_fold): Same.
2695 (operator_minus::op1_range): Same.
2696 (operator_minus::op2_range): Same.
2697 (operator_min::wi_fold): Same.
2698 (operator_max::wi_fold): Same.
2699 (cross_product_operator::wi_cross_product): Same.
2700 (operator_mult::op1_range): New.
2701 (operator_mult::op2_range): New.
2702 (operator_mult::wi_fold): Adjust for irange.
2703 (operator_div::wi_fold): Same.
2704 (operator_exact_divide::op1_range): Same.
2705 (operator_lshift::fold_range): Same.
2706 (operator_lshift::wi_fold): Same.
2707 (operator_lshift::op1_range): New.
2708 (operator_rshift::op1_range): New.
2709 (operator_rshift::fold_range): Adjust for irange.
2710 (operator_rshift::wi_fold): Same.
2711 (operator_cast::truncating_cast_p): Abstract out from
2712 operator_cast::fold_range.
2713 (operator_cast::fold_range): Adjust for irange and tweak for
2715 (operator_cast::inside_domain_p): Abstract out from fold_range.
2716 (operator_cast::fold_pair): Same.
2717 (operator_cast::op1_range): Use abstracted methods above. Adjust
2718 for irange and tweak for performance.
2719 (operator_logical_and::fold_range): Adjust for irange.
2720 (operator_logical_and::op1_range): Same.
2721 (operator_logical_and::op2_range): Same.
2722 (unsigned_singleton_p): New.
2723 (operator_bitwise_and::remove_impossible_ranges): New.
2724 (operator_bitwise_and::fold_range): New.
2725 (wi_optimize_and_or): Adjust for irange.
2726 (operator_bitwise_and::wi_fold): Same.
2727 (set_nonzero_range_from_mask): New.
2728 (operator_bitwise_and::simple_op1_range_solver): New.
2729 (operator_bitwise_and::op1_range): Adjust for irange.
2730 (operator_bitwise_and::op2_range): Same.
2731 (operator_logical_or::fold_range): Same.
2732 (operator_logical_or::op1_range): Same.
2733 (operator_logical_or::op2_range): Same.
2734 (operator_bitwise_or::wi_fold): Same.
2735 (operator_bitwise_or::op1_range): Same.
2736 (operator_bitwise_or::op2_range): Same.
2737 (operator_bitwise_xor::wi_fold): Same.
2738 (operator_bitwise_xor::op1_range): New.
2739 (operator_bitwise_xor::op2_range): New.
2740 (operator_trunc_mod::wi_fold): Adjust for irange.
2741 (operator_logical_not::fold_range): Same.
2742 (operator_logical_not::op1_range): Same.
2743 (operator_bitwise_not::fold_range): Same.
2744 (operator_bitwise_not::op1_range): Same.
2745 (operator_cst::fold_range): Same.
2746 (operator_identity::fold_range): Same.
2747 (operator_identity::op1_range): Same.
2748 (class operator_unknown): New.
2749 (operator_unknown::fold_range): New.
2750 (class operator_abs): Adjust for irange.
2751 (operator_abs::wi_fold): Same.
2752 (operator_abs::op1_range): Same.
2753 (operator_absu::wi_fold): Same.
2754 (class operator_negate): Same.
2755 (operator_negate::fold_range): Same.
2756 (operator_negate::op1_range): Same.
2757 (operator_addr_expr::fold_range): Same.
2758 (operator_addr_expr::op1_range): Same.
2759 (pointer_plus_operator::wi_fold): Same.
2760 (pointer_min_max_operator::wi_fold): Same.
2761 (pointer_and_operator::wi_fold): Same.
2762 (pointer_or_operator::op1_range): New.
2763 (pointer_or_operator::op2_range): New.
2764 (pointer_or_operator::wi_fold): Adjust for irange.
2765 (integral_table::integral_table): Add entries for IMAGPART_EXPR
2766 and POINTER_DIFF_EXPR.
2767 (range_cast): Adjust for irange.
2768 (build_range3): New.
2769 (range3_tests): New.
2770 (widest_irange_tests): New.
2771 (multi_precision_range_tests): New.
2772 (operator_tests): New.
2774 * range-op.h (class range_operator): Adjust for irange.
2776 * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
2777 tweak for performance.
2778 (range_fold_binary_expr): Same.
2779 (masked_increment): Change to extern.
2780 * tree-vrp.h (masked_increment): New.
2781 * tree.c (cache_wide_int_in_type_cache): New function abstracted
2782 out from wide_int_to_tree_1.
2783 (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
2784 * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
2786 (value_range_equiv::move): Same.
2787 (value_range_equiv::check): Adjust for irange.
2788 (value_range_equiv::intersect): Same.
2789 (value_range_equiv::union_): Same.
2790 (value_range_equiv::dump): Same.
2791 * value-range.cc (irange::operator=): Same.
2792 (irange::maybe_anti_range): New.
2793 (irange::copy_legacy_range): New.
2794 (irange::set_undefined): Adjust for irange.
2795 (irange::swap_out_of_order_endpoints): Abstract out from set().
2796 (irange::set_varying): Adjust for irange.
2797 (irange::irange_set): New.
2798 (irange::irange_set_anti_range): New.
2799 (irange::set): Adjust for irange.
2800 (value_range::set_nonzero): Move to header file.
2801 (value_range::set_zero): Move to header file.
2802 (value_range::check): Rename to...
2803 (irange::verify_range): ...this.
2804 (value_range::num_pairs): Rename to...
2805 (irange::legacy_num_pairs): ...this, and adjust for irange.
2806 (value_range::lower_bound): Rename to...
2807 (irange::legacy_lower_bound): ...this, and adjust for irange.
2808 (value_range::upper_bound): Rename to...
2809 (irange::legacy_upper_bound): ...this, and adjust for irange.
2810 (value_range::equal_p): Rename to...
2811 (irange::legacy_equal_p): ...this.
2812 (value_range::operator==): Move to header file.
2813 (irange::equal_p): New.
2814 (irange::symbolic_p): Adjust for irange.
2815 (irange::constant_p): Same.
2816 (irange::singleton_p): Same.
2817 (irange::value_inside_range): Same.
2818 (irange::may_contain_p): Same.
2819 (irange::contains_p): Same.
2820 (irange::normalize_addresses): Same.
2821 (irange::normalize_symbolics): Same.
2822 (irange::legacy_intersect): Same.
2823 (irange::legacy_union): Same.
2824 (irange::union_): Same.
2825 (irange::intersect): Same.
2826 (irange::irange_union): New.
2827 (irange::irange_intersect): New.
2828 (subtract_one): New.
2829 (irange::invert): Adjust for irange.
2830 (dump_bound_with_infinite_markers): New.
2831 (irange::dump): Adjust for irange.
2832 (debug): Add irange versions.
2833 (range_has_numeric_bounds_p): Adjust for irange.
2834 (vrp_val_max): Move to header file.
2835 (vrp_val_min): Move to header file.
2836 (DEFINE_INT_RANGE_GC_STUBS): New.
2837 (DEFINE_INT_RANGE_INSTANCE): New.
2838 * value-range.h (class irange): New.
2839 (class int_range): New.
2840 (class value_range): Rename to a instantiation of int_range.
2841 (irange::legacy_mode_p): New.
2842 (value_range::value_range): Remove.
2843 (irange::kind): New.
2844 (irange::num_pairs): Adjust for irange.
2845 (irange::type): Adjust for irange.
2846 (irange::tree_lower_bound): New.
2847 (irange::tree_upper_bound): New.
2848 (irange::type): Adjust for irange.
2849 (irange::min): Same.
2850 (irange::max): Same.
2851 (irange::varying_p): Same.
2852 (irange::undefined_p): Same.
2853 (irange::zero_p): Same.
2854 (irange::nonzero_p): Same.
2855 (irange::supports_type_p): Same.
2856 (range_includes_zero_p): Same.
2859 (irange::irange): New.
2860 (int_range::int_range): New.
2861 (int_range::operator=): New.
2862 (irange::set): Moved from value-range.cc and adjusted for irange.
2863 (irange::set_undefined): Same.
2864 (irange::set_varying): Same.
2865 (irange::operator==): Same.
2866 (irange::lower_bound): Same.
2867 (irange::upper_bound): Same.
2868 (irange::union_): Same.
2869 (irange::intersect): Same.
2870 (irange::set_nonzero): Same.
2871 (irange::set_zero): Same.
2872 (irange::normalize_min_max): New.
2873 (vrp_val_max): Move from value-range.cc.
2874 (vrp_val_min): Same.
2875 * vr-values.c (vr_values::get_lattice_entry): Call value_range
2878 2020-08-02 Sergei Trofimovich <siarheit@google.com>
2881 * var-tracking.c (vt_find_locations): Fully initialize
2882 all 'in_pending' bits.
2884 2020-08-01 Jan Hubicka <jh@suse.cz>
2886 * symtab.c (symtab_node::verify_base): Verify order.
2887 (symtab_node::verify_symtab_nodes): Verify order.
2889 2020-08-01 Jan Hubicka <jh@suse.cz>
2891 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
2893 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
2895 * config/csky/csky_opts.h (float_abi_type): New.
2896 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
2897 (TARGET_HARD_FLOAT): New.
2898 (TARGET_HARD_FLOAT_ABI): New.
2899 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
2900 * config/csky/csky.opt (mfloat-abi): New.
2901 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
2903 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
2905 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
2907 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
2908 Tom de Vries <tdevries@suse.de>
2911 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
2912 (TARGET_TRULY_NOOP_TRUNCATION): Define.
2914 2020-07-31 Richard Biener <rguenther@suse.de>
2917 * langhooks-def.h (lhd_finalize_early_debug): Declare.
2918 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
2919 (LANG_HOOKS_INITIALIZER): Amend.
2920 * langhooks.c: Include cgraph.h and debug.h.
2921 (lhd_finalize_early_debug): Default implementation from
2922 former code in finalize_compilation_unit.
2923 * langhooks.h (lang_hooks::finalize_early_debug): Add.
2924 * cgraphunit.c (symbol_table::finalize_compilation_unit):
2925 Call the finalize_early_debug langhook.
2927 2020-07-31 Richard Biener <rguenther@suse.de>
2929 * genmatch.c (expr::force_leaf): Add and initialize.
2930 (expr::gen_transform): Honor force_leaf by passing
2931 NULL as sequence argument to maybe_push_res_to_seq.
2932 (parser::parse_expr): Allow ! marker on result expression
2934 * doc/match-and-simplify.texi: Amend.
2936 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
2938 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
2939 taken costs for prologue and epilogue if they don't exist.
2940 (vect_estimate_min_profitable_iters): Likewise.
2942 2020-07-31 Martin Liska <mliska@suse.cz>
2944 * cgraph.h: Remove leading empty lines.
2945 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
2947 (struct cgraph_order_sort): Add constructors.
2948 (cgraph_order_sort::process): New.
2949 (cgraph_order_cmp): New.
2950 (output_in_order): Simplify and push nodes to vector.
2952 2020-07-31 Richard Biener <rguenther@suse.de>
2955 * fold-const.c (fold_range_test): Special-case constant
2956 LHS for short-circuiting operations.
2958 2020-07-31 Martin Liska <mliska@suse.cz>
2960 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
2962 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
2964 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
2965 Add new argument ATTRS.
2966 (aarch64_call_properties): New function.
2967 (aarch64_modifies_global_state_p): Likewise.
2968 (aarch64_reads_global_state_p): Likewise.
2969 (aarch64_could_trap_p): Likewise.
2970 (aarch64_add_attribute): Likewise.
2971 (aarch64_get_attributes): Likewise.
2972 (aarch64_init_simd_builtins): Add attributes for each built-in function.
2974 2020-07-31 Richard Biener <rguenther@suse.de>
2977 * var-tracking.c (vt_find_locations): Use
2978 rev_post_order_and_mark_dfs_back_seme and separately iterate
2981 2020-07-31 Richard Biener <rguenther@suse.de>
2983 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
2985 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
2986 (tag_header): New helper.
2987 (cmp_edge_dest_pre): Likewise.
2988 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
2989 find SCC exits and perform a DFS walk with extra edges to
2990 compute a RPO with adjacent SCC members when requesting an
2991 iteration optimized order and populate the toplevel SCC array.
2992 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
2993 of max_rpo and fill it in from SCC extent info instead.
2995 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
2997 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
2998 (vec_test_lsbb_all_zeros): New define.
2999 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
3001 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
3002 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
3003 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
3004 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
3005 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
3006 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
3007 (xvtlsbbo, xvtlsbbz): New instruction expands.
3009 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
3011 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
3012 * config/riscv/riscv.c (riscv_option_override): Handle
3014 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
3015 flexible stack protector guard settings.
3016 (stack_protect_set_<mode>): Ditto.
3017 (stack_protect_test): Ditto.
3018 (stack_protect_test_<mode>): Ditto.
3019 * config/riscv/riscv.opt (mstack-protector-guard=,
3020 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
3022 * doc/invoke.texi (Option Summary) [RISC-V Options]:
3023 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
3024 -mstack-protector-guard-offset=.
3025 (RISC-V Options): Ditto.
3027 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
3030 * configure: Regenerated.
3032 2020-07-30 Richard Biener <rguenther@suse.de>
3034 PR tree-optimization/96370
3035 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
3036 code parameter and use it instead of picking it up from
3037 the stmt that is being rewritten.
3038 (reassociate_bb): Pass down the operation code.
3040 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
3041 Tom de Vries <tdevries@suse.de>
3043 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
3044 (VECELEM): New mode attribute for a vector's uppercase element mode.
3045 (Vecelem): New mode attribute for a vector's lowercase element mode.
3046 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
3047 (*vec_set<mode>_3): New instructions.
3048 (vec_set<mode>): New expander to generate one of the above insns.
3049 (vec_extract<mode><Vecelem>): New instruction.
3051 2020-07-30 Martin Liska <mliska@suse.cz>
3054 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
3055 -m32. Start using libcall from 128+ bytes.
3057 2020-07-30 Martin Liska <mliska@suse.cz>
3059 * config/i386/x86-tune-costs.h: Change code formatting.
3061 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
3063 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
3065 2020-07-29 Fangrui Song <maskray@google.com>
3068 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
3069 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
3071 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
3073 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
3075 (arm_mve_mode_and_operands_type_check): Declare prototype.
3076 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
3077 _arm_coproc_mem_operand.
3078 (arm_coproc_mem_operand_wb): New function to cover full, limited
3080 (arm_coproc_mem_operand_no_writeback): New constraint for memory
3081 operand with no writeback.
3082 (arm_print_operand): Extend 'E' specifier for memory operand
3083 that does not support writeback.
3084 (arm_mve_mode_and_operands_type_check): New constraint check for
3085 MVE memory operands.
3086 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
3088 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
3090 (*mov_store_vfp_hf16): New pattern for vstr.16.
3091 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
3093 2020-07-29 Richard Biener <rguenther@suse.de>
3095 PR tree-optimization/96349
3096 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
3097 condition runs into a loop PHI with an abnormal entry value give up.
3099 2020-07-29 Richard Biener <rguenther@suse.de>
3101 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
3102 cache if we removed any SIMD UID SSA defs.
3103 * gimple-loop-interchange.cc (pass_linterchange::execute):
3104 Reset the scev cache if we interchanged a loop.
3106 2020-07-29 Richard Biener <rguenther@suse.de>
3108 PR tree-optimization/95679
3109 * tree-ssa-propagate.h
3110 (substitute_and_fold_engine::propagate_into_phi_args): Return
3111 whether anything changed.
3112 * tree-ssa-propagate.c
3113 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
3114 (substitute_and_fold_dom_walker::before_dom_children): Update
3117 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3119 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
3120 Ensure that loop variable npeel_tmp advances in each iteration.
3122 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
3124 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
3126 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
3128 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
3129 default_elf_asm_output_external.
3131 2020-07-28 Sergei Trofimovich <siarheit@google.com>
3134 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
3135 unoptimized callers as undead.
3137 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
3138 Richard Biener <rguenther@suse.de>
3140 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
3141 (parity(~x) -> parity(x)): New simplification.
3142 (parity(x)^parity(y) -> parity(x^y)): New simplification.
3143 (parity(x&1) -> x&1): New simplification.
3144 (popcount(x) -> x>>C): New simplification.
3146 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
3147 Tom de Vries <tdevries@suse.de>
3149 * config/nvptx/nvptx.md (extendqihi2): New instruction.
3150 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
3152 2020-07-28 Jakub Jelinek <jakub@redhat.com>
3155 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
3156 instead of trying to rediscover them in the body.
3157 (initialize_argument_information): Adjust caller.
3159 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
3161 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
3162 to determine peel_iters_epilogue to...
3163 (vect_get_peel_iters_epilogue): ...this new function.
3164 (vect_estimate_min_profitable_iters): Refactor cost calculation on
3165 peel_iters_prologue and peel_iters_epilogue.
3167 2020-07-27 Martin Sebor <msebor@redhat.com>
3169 PR tree-optimization/84079
3170 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
3171 Only allow just-past-the-end references for the most significant
3174 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
3177 * opts.c (check_alignment_argument): Set the -falign-Name
3178 on/off flag on and set the -falign-Name string value null,
3179 when the command-line specified argument is zero.
3181 2020-07-27 Martin Liska <mliska@suse.cz>
3183 PR tree-optimization/96058
3184 * expr.c (string_constant): Build string_constant only
3185 for a type that has same precision as char_type_node
3186 and is an integral type.
3188 2020-07-27 Richard Biener <rguenther@suse.de>
3190 * var-tracking.c (variable_tracking_main_1): Remove call
3191 to mark_dfs_back_edges.
3193 2020-07-27 Martin Liska <mliska@suse.cz>
3195 PR tree-optimization/96128
3196 * tree-vect-generic.c (expand_vector_comparison): Do not expand
3197 vector comparison with VEC_COND_EXPR.
3199 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
3202 * common.opt: Add -fcf-protection=check.
3203 * flag-types.h (cf_protection_level): Add CF_CHECK.
3204 * lto-wrapper.c (merge_and_complain): Issue an error for
3205 mismatching -fcf-protection values with -fcf-protection=check.
3206 Otherwise, merge -fcf-protection values.
3207 * doc/invoke.texi: Document -fcf-protection=check.
3209 2020-07-27 Martin Liska <mliska@suse.cz>
3212 * symbol-summary.h: Call vec_safe_reserve before grow is called
3213 in order to grow to a reasonable size.
3214 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
3217 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
3219 * configure.ac (out-of-tree linker .hidden support): Don't turn off
3220 for mmix-knuth-mmixware.
3221 * configure: Regenerate.
3223 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
3225 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3226 Set the default value for -mblock-ops-unaligned-vsx.
3227 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
3228 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
3230 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
3232 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
3233 with default_asm_output_ident_directive.
3235 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
3237 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
3238 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
3240 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
3241 Clement Chigot <clement.chigot@atos.net>
3243 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
3245 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
3248 (ASM_CPU_SPEC): Remove vsx and altivec options.
3249 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
3252 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
3253 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
3254 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
3257 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
3260 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
3261 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
3263 (CPLUSPLUS_CPP_SPEC): Same.
3266 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
3267 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
3268 * config/rs6000/defaultaix64.h: Delete.
3270 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
3272 * config/rs6000/rs6000.opt: Delete -mpower10.
3274 2020-07-24 Alexandre Oliva <oliva@adacore.com>
3276 * config/i386/intelmic-mkoffload.c
3277 (generate_target_descr_file): Use dumppfx for save_temps
3278 files. Pass -dumpbase et al down to the compiler.
3279 (generate_target_offloadend_file): Likewise.
3280 (generate_host_descr_file): Likewise.
3281 (prepare_target_image): Likewise. Move out_obj_filename
3283 (main): ... here. Detect -dumpbase, set dumppfx too.
3285 2020-07-24 Alexandre Oliva <oliva@adacore.com>
3288 * gcc.c (process_command): Adjust and document conditions to
3291 2020-07-24 Matthias Klose <doko@ubuntu.com>
3293 * config/aarch64/aarch64.c (+aarch64_offload_options,
3294 TARGET_OFFLOAD_OPTIONS): New.
3296 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
3299 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
3301 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
3303 PR rtl-optimization/96298
3304 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
3305 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
3307 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
3309 PR gcov-profile/96267
3310 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
3312 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
3314 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
3315 (rs6000_adjust_vect_cost_per_stmt): ... here.
3316 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
3317 rs6000_adjust_vect_cost_per_stmt.
3319 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
3321 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
3322 IFN_LEN_LOAD and IFN_LEN_STORE.
3323 (get_alias_ptr_type_for_ptr_address): Likewise.
3325 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
3328 * asan.c (asan_shadow_offset_set_p): New.
3329 * asan.h (asan_shadow_offset_set_p): Ditto.
3330 * toplev.c (process_options): Allow -fsanitize=kernel-address
3331 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
3332 asan stack protection is enabled.
3334 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
3337 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
3338 little-endian memory ordering.
3340 2020-07-22 Nathan Sidwell <nathan@acm.org>
3342 * dumpfile.c (parse_dump_option): Deal with filenames
3345 2020-07-22 Nathan Sidwell <nathan@acm.org>
3347 * incpath.c (add_path): Avoid multiple strlen calls.
3349 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3351 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
3352 is not NULL_RTX before use.
3354 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3356 * expr.c (convert_modes): Allow a constant integer to be converted to
3357 any scalar int mode.
3359 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
3361 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
3362 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
3363 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
3364 Change mode parameter to machine_mode.
3365 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
3367 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
3368 Change mode parameter to machine_mode.
3369 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
3370 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
3372 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
3374 * doc/languages.texi: Fix “then”/“than” typo.
3376 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
3379 * config/i386/i386-protos.h (ix86_local_alignment): Add
3380 another function parameter may_lower alignment. Default is
3382 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
3384 (ix86_local_alignment): Amend ix86_local_alignment to accept
3385 another parameter may_lower. If may_lower is true, new align
3386 may be lower than incoming alignment. If may_lower is false,
3387 new align will be greater or equal to incoming alignment.
3388 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
3389 * doc/tm.texi: Regenerate.
3390 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
3392 * target.def (lower_local_decl_alignment): New hook.
3394 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
3397 * config/i386/sync.md (mfence_sse2): Enable for
3398 TARGET_64BIT and TARGET_SSE2.
3399 (mfence_nosse): Always enable.
3401 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3403 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
3405 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
3406 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
3407 msp430_do_not_relax_short_jumps.
3409 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3411 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
3413 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3415 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
3418 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
3420 PR rtl-optimization/89310
3421 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
3423 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3425 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
3426 allocated size and set current_function_static_stack_size, if
3427 flag_stack_usage_info.
3429 2020-07-20 Sergei Trofimovich <siarheit@google.com>
3432 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
3433 to get crtendS.o for !no-pie mode.
3434 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
3436 2020-07-20 Yang Yang <yangyang305@huawei.com>
3438 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
3439 VIEW_CONVERT_EXPRs if the arguments types and return type
3440 of simd clone function are distinct with the vectype of stmt.
3442 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
3445 * config/i386/i386.h (TARGET_AVOID_MFENCE):
3446 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
3447 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
3448 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
3449 referred memory in word_mode.
3450 (mem_thread_fence): Do not generate mfence_sse2 pattern when
3451 TARGET_AVOID_MFENCE is true.
3452 (atomic_store<mode>): Update for rename.
3453 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
3454 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
3456 2020-07-20 Martin Sebor <msebor@redhat.com>
3460 * builtins.c (inline_expand_builtin_string_cmp): Rename...
3461 (inline_expand_builtin_bytecmp): ...to this.
3462 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
3463 (expand_builtin_memory_copy_args): Handle object representations
3464 with embedded nul bytes.
3465 (expand_builtin_memcmp): Same.
3466 (expand_builtin_strcmp): Adjust call to naming change.
3467 (expand_builtin_strncmp): Same.
3468 * expr.c (string_constant): Create empty strings with nonzero size.
3469 * fold-const.c (c_getstr): Rename locals and update comments.
3470 * tree.c (build_string): Accept null pointer argument.
3471 (build_string_literal): Same.
3472 * tree.h (build_string): Provide a default.
3473 (build_string_literal): Same.
3475 2020-07-20 Richard Biener <rguenther@suse.de>
3477 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
3478 write-only post array.
3480 2020-07-20 Jakub Jelinek <jakub@redhat.com>
3483 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
3484 of a bitfield not aligned on byte boundaries try to
3485 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
3486 adjust it depending on endianity.
3488 2020-07-20 Jakub Jelinek <jakub@redhat.com>
3491 * fold-const.c (native_encode_initializer): Handle bit-fields.
3493 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
3495 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3496 Set param_vect_partial_vector_usage to 0 explicitly.
3497 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
3498 * optabs-query.c (get_len_load_store_mode): New function.
3499 * optabs-query.h (get_len_load_store_mode): New declare.
3500 * params.opt (vect-partial-vector-usage): New.
3501 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
3502 handlings for vectorization using length-based partial vectors, call
3503 vect_gen_len for length generation, and rename some variables with
3504 items instead of scalars.
3505 (vect_set_loop_condition_partial_vectors): Add the handlings for
3506 vectorization using length-based partial vectors.
3507 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
3508 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
3509 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
3510 epil_using_partial_vectors_p.
3511 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
3512 for lengths destruction.
3513 (vect_verify_loop_lens): New function.
3514 (vect_analyze_loop): Add handlings for epilogue of loop when it's
3515 marked to use vectorization using partial vectors.
3516 (vect_analyze_loop_2): Add the check to allow only one vectorization
3517 approach using partial vectorization at the same time. Check param
3518 vect-partial-vector-usage for partial vectors decision. Mark
3519 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
3520 considerable to use partial vectors. Call release_vec_loop_controls
3521 for lengths destruction.
3522 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
3523 using length-based partial vectors.
3524 (vect_record_loop_mask): Init factor to 1 for vectorization using
3525 mask-based partial vectors.
3526 (vect_record_loop_len): New function.
3527 (vect_get_loop_len): Likewise.
3528 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
3529 checks for vectorization using length-based partial vectors. Factor
3530 some code to lambda function get_valid_nvectors.
3531 (vectorizable_store): Add handlings when using length-based partial
3533 (vectorizable_load): Likewise.
3534 (vect_gen_len): New function.
3535 * tree-vectorizer.h (struct rgroup_controls): Add field factor
3536 mainly for length-based partial vectors.
3537 (vec_loop_lens): New typedef.
3538 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
3539 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
3540 (LOOP_VINFO_LENS): Likewise.
3541 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
3542 (vect_record_loop_len): New declare.
3543 (vect_get_loop_len): Likewise.
3544 (vect_gen_len): Likewise.
3546 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3548 * config/mmix/mmix.c (mmix_option_override): Reinstate default
3549 integer-emitting targetm.asm_out pseudos when dumping detailed
3551 (mmix_assemble_integer): Update comment.
3553 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
3557 * config/i386/cpuid.h: Add include guard.
3560 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
3563 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
3565 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
3568 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
3569 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
3570 (define_attr "enabled"): Handle p9.
3572 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
3574 * function.c (assign_parm_setup_block): Use the macro
3575 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
3576 targetm.truly_noop_truncation directly.
3578 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
3582 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
3583 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
3584 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
3585 VF1_AVX512ER_128_256.
3587 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3589 * doc/sourcebuild.texi (dg-set-compiler-env-var,
3590 dg-set-target-env-var): Document.
3592 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3594 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
3596 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3598 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
3601 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3603 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
3604 (parse_field): Use std::string.
3605 (split_words, readline, find_field): New.
3606 (host_detect_local_cpu): Fix truncation issues.
3608 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
3610 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
3611 (ELFOSABI_AMDGPU_HSA): Likewise.
3612 (ELFABIVERSION_AMDGPU_HSA): Likewise.
3613 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
3614 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
3615 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
3618 2020-07-17 Andrew Pinski <apinksi@marvell.com>
3619 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
3622 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
3623 (aarch64_expand_vec_perm_const_1): Call it.
3624 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
3625 public, and add a "@" prefix.
3627 2020-07-17 Andrew Pinski <apinksi@marvell.com>
3628 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
3631 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
3632 (aarch64_expand_vec_perm_const_1): Call it.
3634 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
3636 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
3637 Add new field flags.
3638 (VAR1): Add new field FLAG in macro.
3654 (aarch64_general_fold_builtin): Likewise.
3655 (aarch64_general_gimple_fold_builtin): Likewise.
3656 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
3657 each built-in function.
3658 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
3660 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
3663 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
3664 expanders to generate the pattern.
3665 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
3666 '*' to have callable expanders.
3668 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
3669 Segher Boessenkool <segher@kernel.crashing.org>
3672 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
3675 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
3678 * config/i386/sync.md
3679 (peephole2 to remove unneded compare after CMPXCHG):
3680 New pattern, also handle XOR zeroing and load of -1 by OR.
3682 2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
3684 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
3685 (ix86_adjust_stack_and_probe): Delete.
3686 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
3687 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
3688 a small dope beyond SIZE bytes.
3689 (ix86_emit_probe_stack_range): Use local variable.
3690 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
3691 and tidy up the stack checking code.
3692 * explow.c (get_stack_check_protect): Fix head comment.
3693 (anti_adjust_stack_and_probe_stack_clash): Likewise.
3694 (allocate_dynamic_stack_space): Add comment.
3695 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
3696 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
3698 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
3700 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
3701 (EM_AMDGPU): New macro.
3702 (ELFOSABI_AMDGPU_HSA): New macro.
3703 (ELFABIVERSION_AMDGPU_HSA): New macro.
3704 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
3705 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
3706 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
3707 (R_AMDGPU_NONE): New macro.
3708 (R_AMDGPU_ABS32_LO): New macro.
3709 (R_AMDGPU_ABS32_HI): New macro.
3710 (R_AMDGPU_ABS64): New macro.
3711 (R_AMDGPU_REL32): New macro.
3712 (R_AMDGPU_REL64): New macro.
3713 (R_AMDGPU_ABS32): New macro.
3714 (R_AMDGPU_GOTPCREL): New macro.
3715 (R_AMDGPU_GOTPCREL32_LO): New macro.
3716 (R_AMDGPU_GOTPCREL32_HI): New macro.
3717 (R_AMDGPU_REL32_LO): New macro.
3718 (R_AMDGPU_REL32_HI): New macro.
3719 (reserved): New macro.
3720 (R_AMDGPU_RELATIVE64): New macro.
3721 (gcn_s1_name): Delete global variable.
3722 (gcn_s2_name): Delete global variable.
3723 (gcn_o_name): Delete global variable.
3724 (gcn_cfile_name): Delete global variable.
3725 (files_to_cleanup): New global variable.
3726 (offload_abi): New global variable.
3727 (tool_cleanup): Use files_to_cleanup, not explicit list.
3728 (copy_early_debug_info): New function.
3729 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
3731 Create files_to_cleanup obstack.
3732 Recognize -march options.
3733 Copy early debug info from input .o files.
3735 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
3737 * Makefile.in (TAGS): Remove 'params.def'.
3739 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
3741 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
3742 targets that return false, indicating SUBREGs shouldn't be
3743 used, also need to provide a trunc?i?i2 optab that performs this
3745 * doc/tm.texi: Regenerate.
3747 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
3750 * config/i386/sync.md
3751 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
3753 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3756 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
3757 member to first_inner_iterations, adjust comment.
3758 * omp-general.c (omp_extract_for_data): Adjust for the above change.
3759 Always use n1first and n2first to compute it, rather than depending
3760 on single_nonrect_cond_code. Similarly, always compute factor
3761 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
3762 depending on single_nonrect_cond_code.
3763 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
3764 to first_inner_iterations and min_inner_iterationsd to
3765 first_inner_iterationsd.
3767 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3770 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
3771 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
3772 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
3773 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
3774 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
3775 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
3776 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
3777 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
3778 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
3779 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
3780 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
3781 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
3782 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
3783 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
3784 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
3785 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
3786 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
3789 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3792 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
3794 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
3795 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
3798 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
3800 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
3802 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
3804 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
3806 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
3807 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
3809 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
3811 PR preprocessor/49973
3813 * common.opt: Handle -ftabstop here instead of in c-family
3814 options. Add -fdiagnostics-column-unit= and
3815 -fdiagnostics-column-origin= options.
3816 * opts.c (common_handle_option): Handle the new options.
3817 * diagnostic-format-json.cc (json_from_expanded_location): Add
3818 diagnostic_context argument. Use it to convert column numbers as per
3820 (json_from_location_range): Likewise.
3821 (json_from_fixit_hint): Likewise.
3822 (json_end_diagnostic): Pass the new context argument to helper
3823 functions above. Add "column-origin" field to the output.
3824 (test_unknown_location): Add the new context argument to calls to
3826 (test_bad_endpoints): Likewise.
3827 * diagnostic-show-locus.c
3828 (exploc_with_display_col::exploc_with_display_col): Support
3830 (layout_point::layout_point): Make use of class
3831 exploc_with_display_col.
3832 (layout_range::layout_range): Likewise.
3833 (struct line_bounds): Clarify that the units are now always
3834 display columns. Rename members accordingly. Add constructor.
3835 (layout::print_source_line): Add support for tab expansion.
3836 (make_range): Adapt to class layout_range changes.
3837 (layout::maybe_add_location_range): Likewise.
3838 (layout::layout): Adapt to class exploc_with_display_col changes.
3839 (layout::calculate_x_offset_display): Support tabstop parameter.
3840 (layout::print_annotation_line): Adapt to struct line_bounds changes.
3841 (layout::print_line): Likewise.
3842 (line_label::line_label): Add diagnostic_context argument.
3843 (get_affected_range): Likewise.
3844 (get_printed_columns): Likewise.
3845 (layout::print_any_labels): Adapt to struct line_label changes.
3846 (class correction): Add m_tabstop member.
3847 (correction::correction): Add tabstop argument.
3848 (correction::compute_display_cols): Use m_tabstop.
3849 (class line_corrections): Add m_context member.
3850 (line_corrections::line_corrections): Add diagnostic_context argument.
3851 (line_corrections::add_hint): Use m_context to handle tabstops.
3852 (layout::print_trailing_fixits): Adapt to class line_corrections
3854 (test_layout_x_offset_display_utf8): Support tabstop parameter.
3855 (test_layout_x_offset_display_tab): New selftest.
3856 (test_one_liner_colorized_utf8): Likewise.
3857 (test_tab_expansion): Likewise.
3858 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
3859 (diagnostic_show_locus_c_tests): Likewise.
3860 (test_overlapped_fixit_printing): Adapt to helper class and
3862 (test_overlapped_fixit_printing_utf8): Likewise.
3863 (test_overlapped_fixit_printing_2): Likewise.
3864 * diagnostic.h (enum diagnostics_column_unit): New enum.
3865 (struct diagnostic_context): Add members for the new options.
3866 (diagnostic_converted_column): Declare.
3867 (json_from_expanded_location): Add new context argument.
3868 * diagnostic.c (diagnostic_initialize): Initialize new members.
3869 (diagnostic_converted_column): New function.
3870 (maybe_line_and_column): Be willing to output a column of 0.
3871 (diagnostic_get_location_text): Convert column number as per the new
3873 (diagnostic_report_current_module): Likewise.
3874 (assert_location_text): Add origin and column_unit arguments for
3875 testing the new functionality.
3876 (test_diagnostic_get_location_text): Test the new functionality.
3877 * doc/invoke.texi: Document the new options and behavior.
3878 * input.h (location_compute_display_column): Add tabstop argument.
3879 * input.c (location_compute_display_column): Likewise.
3880 (test_cpp_utf8): Add selftests for tab expansion.
3881 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
3882 new context argument to json_from_expanded_location().
3884 2020-07-14 Jakub Jelinek <jakub@redhat.com>
3887 * expr.c (expand_constructor): Don't create temporary for store to
3888 volatile MEM if exp has an addressable type.
3890 2020-07-14 Nathan Sidwell <nathan@acm.org>
3892 * hash-map.h (hash_map::get): Note it is a pointer to value.
3893 * incpath.h (incpath_kind): Align comments.
3895 2020-07-14 Nathan Sidwell <nathan@acm.org>
3897 * tree-core.h (tree_decl_with_vis, tree_function_decl):
3898 Note additional padding on 64-bits
3899 * tree.c (cache_integer_cst): Note why no caching of enum literals.
3900 (get_tree_code_name): Robustify error case.
3902 2020-07-14 Nathan Sidwell <nathan@acm.org>
3904 * doc/gty.texi: Fic gt_cleare_cache name.
3905 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
3907 2020-07-14 Jakub Jelinek <jakub@redhat.com>
3909 * omp-general.h (struct omp_for_data): Add adjn1 member.
3910 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
3911 count computing if n1, n2 or step are not INTEGER_CST earlier.
3912 Narrow the outer iterator range if needed so that non-rect loop
3913 has at least one iteration for each outer range iteration. Compute
3915 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
3916 instead of the outer loop's n1.
3918 2020-07-14 Matthias Klose <doko@ubuntu.com>
3921 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
3922 error on different values for -fcf-protection.
3923 (append_compiler_options): Pass -fcf-protection option.
3924 (find_and_merge_options): Add decoded options as parameter,
3925 pass decoded_options to merge_and_complain.
3926 (run_gcc): Pass decoded options to find_and_merge_options.
3927 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
3929 2020-07-13 Alan Modra <amodra@gmail.com>
3931 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
3932 and sibcall_local64.
3933 (sibcall_value_local): Similarly.
3935 2020-07-13 Nathan Sidwell <nathan@acm.org>
3937 * Makefile.in (distclean): Remove long gone cxxmain.c
3939 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
3942 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
3943 length to cmpstrnqi patterns.
3945 2020-07-13 Jakub Jelinek <jakub@redhat.com>
3948 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
3951 2020-07-13 Richard Biener <rguenther@suse.de>
3953 PR tree-optimization/96163
3954 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
3955 at least after region begin.
3957 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3959 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
3960 __ARM_FEATURE_PAC_DEFAULT support.
3962 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3965 * doc/extend.texi: Update the text for __builtin_return_address.
3967 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3970 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
3971 Disable return address signing if __builtin_eh_return is used.
3973 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3977 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
3978 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
3979 (aarch64_return_addr): Use aarch64_return_addr_rtx.
3980 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
3982 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
3985 * tree.h (virtual_method_call_p): Add a default-false parameter
3986 that indicates whether the function is being called from dump
3988 (obj_type_ref_class): Likewise.
3989 * tree.c (virtual_method_call_p): Likewise.
3990 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
3991 type information for the type when the parameter is false.
3992 * tree-pretty-print.c (dump_generic_node): Update calls to
3993 virtual_method_call_p and obj_type_ref_class accordingly.
3995 2020-07-13 Julian Brown <julian@codesourcery.com>
3996 Thomas Schwinge <thomas@codesourcery.com>
3998 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
3999 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
4000 directives (see also PR92929).
4002 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
4004 * convert.c (convert_to_integer_1): Narrow integer operations
4005 even on targets that require explicit truncation instructions.
4007 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4010 * config/cris/cris-passes.def: New file.
4011 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
4012 * config/cris/cris.c: Add infrastructure bits and pass execute
4013 function cris_postdbr_cmpelim.
4014 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
4016 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4018 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
4020 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4023 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
4024 ("*addi_b_<mode>"): New pattern.
4025 ("*addsi3<setnz>"): Remove stale %-related comment.
4027 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
4029 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
4030 Use match_dup in output template, not match_operand.
4032 2020-07-13 Richard Biener <rguenther@suse.de>
4034 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
4035 (vt_find_locations): Eliminate visited bitmap in favor of
4036 RPO order check. Dump statistics about the number of
4037 local BB dataflow computes.
4039 2020-07-13 Richard Biener <rguenther@suse.de>
4042 * expr.c (expand_constructor): Make a temporary also if we're
4043 storing to volatile memory.
4045 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
4047 * config/rs6000/rs6000.md (rotl_unspec): New
4048 define_insn_and_split.
4050 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
4052 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
4053 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
4055 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
4057 * internal-fn.c (expand_mul_overflow): When checking for signed
4058 overflow from a widening multiplication, we access the truncated
4059 lowpart RES twice, so keep this value in a pseudo register.
4061 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
4063 PR tree-optimization/96146
4064 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
4065 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
4066 involving POLY_INT_CSTs.
4068 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
4071 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
4072 create named section for VAR_DECL or FUNCTION_DECL.
4074 2020-07-10 Joseph Myers <joseph@codesourcery.com>
4076 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
4079 2020-07-10 Alexander Popov <alex.popov@linux.com>
4081 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
4083 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
4086 * expr.c (expand_expr_real_2): When reducing bit fields,
4087 clear the target if it has a different mode from the expression.
4088 (reduce_to_bit_field_precision): Don't do that here. Instead
4089 assert that the target already has the correct mode.
4091 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
4095 * config/arm/arm.c (arm_attribute_table): Add
4096 "Advanced SIMD type".
4097 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
4098 attributes are equal.
4099 * config/arm/arm-builtins.c: Include stringpool.h and
4101 (arm_mangle_builtin_vector_type): Use the mangling recorded
4102 in the "Advanced SIMD type" attribute.
4103 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
4104 attribute to each Advanced SIMD type, using the mangled type
4105 as the attribute's single argument.
4107 2020-07-10 Carl Love <cel@us.ibm.com>
4109 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
4110 (VSX_MM4): New define_mode_iterator.
4111 (vec_mtvsrbmi): New define_insn.
4112 (vec_mtvsr_<mode>): New define_insn.
4113 (vec_cntmb_<mode>): New define_insn.
4114 (vec_extract_<mode>): New define_insn.
4115 (vec_expand_<mode>): New define_insn.
4116 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
4117 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
4118 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
4119 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
4121 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
4122 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
4123 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
4124 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
4125 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
4126 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
4127 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
4128 (BU_P10_OVERLOAD_2): Add defition for cntm.
4129 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
4130 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
4131 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
4132 (altivec_overloaded_builtins): Add overloaded argument entries for
4133 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
4134 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
4135 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
4136 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
4137 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
4138 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
4139 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
4140 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
4141 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
4142 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
4143 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
4144 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
4145 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
4146 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
4147 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
4148 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
4149 P10_BUILTIN_VEXPANDMQ.
4150 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
4151 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
4152 VEXPANDM, VEXTRACTM.
4154 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
4157 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
4158 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
4159 v16qi_ftype_pcvoid with correct number of parameters.
4161 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
4164 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
4165 TARGET_AVX512VL when enabling FMA.
4167 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
4168 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
4169 Iain Apreotesei <iain.apreotesei@arm.com>
4171 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
4173 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
4174 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
4175 (arm_target_insn_ok_for_lob): New function.
4176 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
4177 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
4178 (dls_insn): Add new patterns.
4179 (doloop_end): Modify to select LR when LOB is available.
4180 * config/arm/unspecs.md: Add new unspec.
4181 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
4182 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
4185 2020-07-10 Richard Biener <rguenther@suse.de>
4187 PR tree-optimization/96133
4188 * gimple-fold.c (fold_array_ctor_reference): Do not
4189 recurse to folding a CTOR that does not fully cover the
4192 2020-07-10 Cui,Lili <lili.cui@intel.com>
4194 * common/config/i386/cpuinfo.h
4195 (get_intel_cpu): Handle sapphirerapids.
4196 * common/config/i386/i386-common.c
4197 (processor_names): Add sapphirerapids and alderlake.
4198 (processor_alias_table): Add sapphirerapids and alderlake.
4199 * common/config/i386/i386-cpuinfo.h
4200 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
4201 INTEL_COREI7_ALDERLAKE.
4202 * config.gcc: Add -march=sapphirerapids and alderlake.
4203 * config/i386/driver-i386.c
4204 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
4205 * config/i386/i386-c.c
4206 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
4207 * config/i386/i386-options.c
4208 (m_SAPPHIRERAPIDS) : Define.
4209 (m_ALDERLAKE): Ditto.
4210 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
4211 (processor_cost_table): Add sapphirerapids and alderlake.
4212 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
4213 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
4214 * config/i386/i386.h
4215 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
4216 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
4217 PROCESSOR_ALDERLAKE.
4219 (PTA_CLDEMOTE): Ditto.
4220 (PTA_SERIALIZE): Ditto.
4221 (PTA_TSXLDTRK): New.
4222 (PTA_SAPPHIRERAPIDS): Ditto.
4223 (PTA_ALDERLAKE): Ditto.
4224 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
4225 PROCESSOR_ALDERLAKE.
4226 * doc/extend.texi: Add sapphirerapids and alderlake.
4227 * doc/invoke.texi: Add sapphirerapids and alderlake.
4229 2020-07-10 Martin Liska <mliska@suse.cz>
4231 * dumpfile.c [profile-report]: Add new profile dump.
4232 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
4233 * passes.c (pass_manager::dump_profile_report): Change stderr
4236 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
4238 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
4239 is adjusted by considering peeled prologue for non
4240 vect_use_loop_mask_for_alignment_p cases.
4242 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
4245 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
4246 specific types __vector_quad and __vector_pair, and initialize the
4247 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
4248 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
4249 Remove now unneeded mask variable.
4250 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
4251 OPTION_MASK_MMA flag for power10 if not already set.
4253 2020-07-09 Richard Biener <rguenther@suse.de>
4255 PR tree-optimization/96133
4256 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
4257 status between stmts.
4259 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
4262 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
4263 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
4264 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
4265 (rsqrtv16sf2): Removed.
4267 2020-07-09 Richard Biener <rguenther@suse.de>
4269 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
4270 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
4271 (vect_slp_analyze_instance_alignment): ... this.
4272 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
4273 (vect_verify_datarefs_alignment): Likewise.
4274 (vect_enhance_data_refs_alignment): Do not call
4275 vect_verify_datarefs_alignment.
4276 (vect_slp_analyze_node_alignment): Rename from
4277 vect_slp_analyze_and_verify_node_alignment and do not
4278 call verify_data_ref_alignment.
4279 (vect_slp_analyze_instance_alignment): Rename from
4280 vect_slp_analyze_and_verify_instance_alignment.
4281 * tree-vect-stmts.c (vectorizable_store): Dump when
4282 we vectorize an unaligned access.
4283 (vectorizable_load): Likewise.
4284 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
4285 vect_verify_datarefs_alignment.
4286 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
4288 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
4290 PR tree-optimization/95804
4291 * tree-loop-distribution.c (break_alias_scc_partitions): Force
4292 negative post order to reduction partition.
4294 2020-07-09 Jakub Jelinek <jakub@redhat.com>
4296 * omp-general.h (struct omp_for_data): Add min_inner_iterations
4298 * omp-general.c (omp_extract_for_data): Initialize them and remember
4299 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
4300 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
4301 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
4302 (expand_omp_for_init_vars): For
4303 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
4304 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
4305 using fallback method when possible.
4307 2020-07-09 Omar Tahir <omar.tahir@arm.com>
4309 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
4310 last_moveable_pseudo before returning.
4312 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
4314 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
4315 __ARM_FEATURE_BTI_DEFAULT support.
4317 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4319 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
4321 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
4322 stub registers class.
4323 (aarch64_class_max_nregs): Likewise.
4324 (aarch64_register_move_cost): Likewise.
4325 (aarch64_sls_shared_thunks): Global array to store stub labels.
4326 (aarch64_sls_emit_function_stub): New.
4327 (aarch64_create_blr_label): New.
4328 (aarch64_sls_emit_blr_function_thunks): New.
4329 (aarch64_sls_emit_shared_blr_thunks): New.
4330 (aarch64_asm_file_end): New.
4331 (aarch64_indirect_call_asm): New.
4332 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
4333 (TARGET_ASM_FUNCTION_EPILOGUE): Use
4334 aarch64_sls_emit_blr_function_thunks.
4335 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
4336 (enum reg_class): Add STUB_REGS class.
4337 (machine_function): Introduce `call_via` array for
4338 function-local stub labels.
4339 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
4340 aarch64_indirect_call_asm to emit code when hardening BLR
4342 * config/aarch64/constraints.md (Ucr): New constraint
4343 representing registers for indirect calls. Is GENERAL_REGS
4344 usually, and STUB_REGS when hardening BLR instruction against
4346 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
4347 is also a general register.
4349 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4351 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
4352 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
4353 speculation barrier after BR instruction if needs be.
4354 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
4356 (aarch64_sls_barrier): New.
4357 (aarch64_asm_trampoline_template): Add needed barriers.
4358 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
4360 (TRAMPOLINE_SIZE): Account for barrier.
4361 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
4362 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
4363 Emit barrier if needs be, also account for possible barrier using
4364 "sls_length" attribute.
4365 (sls_length): New attribute.
4366 (length): Determine default using any non-default sls_length
4369 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
4371 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
4373 (aarch64_harden_sls_blr_p): New.
4374 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
4376 (aarch64_harden_sls_retbr_p): New.
4377 (aarch64_harden_sls_blr_p): New.
4378 (aarch64_validate_sls_mitigation): New.
4379 (aarch64_override_options): Parse options for SLS mitigation.
4380 * config/aarch64/aarch64.opt (-mharden-sls): New option.
4381 * doc/invoke.texi: Document new option.
4383 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
4385 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
4386 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
4387 or nested-cycle reduction.
4389 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
4391 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
4392 for fully masking to be more common.
4394 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
4396 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
4398 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
4399 Document __builtin_thread_pointer.
4401 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
4403 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
4404 Abort if any arguments on stack.
4406 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
4408 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
4409 either type has reverse scalar storage order.
4410 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
4411 a memory copy if either type has reverse scalar storage order.
4413 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
4415 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
4416 on to the native compiler, if used.
4417 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
4419 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
4421 * config/rs6000/altivec.h (vec_vmsumudm): New define.
4422 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
4423 (altivec_vmsumudm): New define_insn.
4424 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
4425 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
4426 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
4427 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
4428 * doc/extend.texi: Add document for vmsumudm behind vmsum.
4430 2020-07-08 Richard Biener <rguenther@suse.de>
4432 * tree-vect-stmts.c (get_group_load_store_type): Pass
4433 in the SLP node and the alignment support scheme output.
4435 (get_load_store_type): Likewise.
4436 (vectorizable_store): Adjust.
4437 (vectorizable_load): Likewise.
4439 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
4442 * expr.c (expand_expr_real_2): Get the mode from the type rather
4443 than the rtx, and assert that it is consistent with the mode of
4444 the rtx (where known). Optimize all constant integers, not just
4445 those that can be represented in poly_int64.
4447 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
4449 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
4450 (len_store_v16qi): Likewise.
4452 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
4454 * doc/md.texi (len_load_@var{m}): Document.
4455 (len_store_@var{m}): Likewise.
4456 * internal-fn.c (len_load_direct): New macro.
4457 (len_store_direct): Likewise.
4458 (expand_len_load_optab_fn): Likewise.
4459 (expand_len_store_optab_fn): Likewise.
4460 (direct_len_load_optab_supported_p): Likewise.
4461 (direct_len_store_optab_supported_p): Likewise.
4462 (expand_mask_load_optab_fn): New macro. Original renamed to ...
4463 (expand_partial_load_optab_fn): ... here. Add handlings for
4465 (expand_mask_store_optab_fn): New macro. Original renamed to ...
4466 (expand_partial_store_optab_fn): ... here. Add handlings for
4468 (internal_load_fn_p): Handle IFN_LEN_LOAD.
4469 (internal_store_fn_p): Handle IFN_LEN_STORE.
4470 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
4471 * internal-fn.def (LEN_LOAD): New internal function.
4472 (LEN_STORE): Likewise.
4473 * optabs.def (len_load_optab, len_store_optab): New optab.
4475 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
4477 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
4478 thunderx2t99_vector_cost): Likewise.
4480 2020-07-07 Richard Biener <rguenther@suse.de>
4482 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
4483 group overlap condition to allow negative step DR groups.
4484 * tree-vect-stmts.c (get_group_load_store_type): For
4485 multi element SLP groups force VMAT_STRIDED_SLP when the step
4488 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
4490 * doc/generic.texi: Fix typo.
4492 2020-07-07 Richard Biener <rguenther@suse.de>
4494 * lto-streamer-out.c (cmp_symbol_files): Use the computed
4495 order map to sort symbols from the same sub-file together.
4496 (lto_output): Compute a map of sub-file to an order number
4497 it appears in the symbol output array.
4499 2020-07-06 Richard Biener <rguenther@suse.de>
4501 PR tree-optimization/96075
4502 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
4503 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
4504 for the misalignment calculation for negative step.
4506 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
4508 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
4509 (*vsub_addsi4): New instruction.
4511 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
4513 * config/cris/cris.md (movulsr): New peephole2.
4515 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
4517 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
4518 Correct gcc_assert of overlapping operands.
4520 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
4522 * config/cris/cris.c (cris_select_cc_mode): Always return
4523 CC_NZmode for matching comparisons. Clarify comments.
4524 * config/cris/cris-modes.def: Clarify mode comment.
4525 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
4527 (addsub, addsubbo, nd): New code iterator attributes.
4528 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
4529 iterator constructs instead of match_operator constructs.
4530 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
4531 "*extop<mode>si<setnz>".
4532 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
4533 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
4534 "*extop<mode>si<setnz>_swap".
4536 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
4538 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
4539 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
4541 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
4543 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
4544 were initially created for the assignment of a variable-sized
4545 object and whose source is now a string constant.
4546 * gimple-ssa-store-merging.c (struct merged_store_group): Document
4547 STRING_CST for rhs_code field.
4548 Add string_concatenation boolean field.
4549 (merged_store_group::merged_store_group): Initialize it as well as
4551 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
4552 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
4553 (merged_store_group::apply_stores): Clear it for small regions.
4554 Do not create a power-of-2-sized buffer if it is still true.
4555 And do not set bit_insertion here again.
4556 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
4557 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
4558 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
4559 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
4560 (count_multiple_uses): Return 0 for STRING_CST.
4561 (split_group): Do not split the group for a string concatenation.
4562 (imm_store_chain_info::output_merged_store): Constify and rename
4563 some local variables. Build an array type as destination type
4564 for a string concatenation, as well as a zero mask, and call
4565 build_string to build the source.
4566 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
4567 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
4568 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
4569 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
4570 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
4572 2020-07-03 Martin Jambor <mjambor@suse.cz>
4575 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
4576 mismatched accesses.
4578 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
4580 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
4581 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
4583 2020-07-03 Martin Liska <mliska@suse.cz>
4584 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4587 * gcov-dump.c (tag_function): Use gcov_position_t
4590 2020-07-03 Richard Biener <rguenther@suse.de>
4592 PR tree-optimization/96037
4593 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
4595 2020-07-03 Richard Biener <rguenther@suse.de>
4597 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
4598 original non-pattern stmts, look at the pattern stmt
4599 vectorization status.
4601 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
4603 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
4605 2020-07-03 Richard Biener <rguenther@suse.de>
4607 * tree-vectorizer.h (vec_info::insert_on_entry): New.
4608 (vec_info::insert_seq_on_entry): Likewise.
4609 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
4610 (vec_info::insert_seq_on_entry): Likewise.
4611 * tree-vect-stmts.c (vect_init_vector_1): Use
4612 vec_info::insert_on_entry.
4613 (vect_finish_stmt_generation): Set modified bit after
4615 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
4616 by using vec_info::insert_seq_on_entry and bypassing
4618 (vect_schedule_slp_instance): Deal with all-constant
4621 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
4622 Tom de Vries <tdevries@suse.de>
4625 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
4626 to access TYPE_SIZE (type). Return at least the mode's alignment.
4628 2020-07-02 Richard Biener <rguenther@suse.de>
4630 PR tree-optimization/96028
4631 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
4632 we have scalar stmts to use.
4633 (vect_slp_analyze_node_operations): When analyzing a child
4634 failed try externalizing the parent node.
4636 2020-07-02 Martin Jambor <mjambor@suse.cz>
4639 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
4640 argument index if necessary.
4642 2020-07-02 Martin Liska <mliska@suse.cz>
4645 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
4646 (expand_vector_comparison): Do not expand a comparison if all
4647 uses are consumed by a VEC_COND_EXPR.
4648 (expand_vector_operation): Change void return type to bool.
4649 (expand_vector_operations_1): Pass dce_ssa_names.
4651 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
4654 * system.h (NULL): Redefine to nullptr.
4656 2020-07-02 Jakub Jelinek <jakub@redhat.com>
4658 PR tree-optimization/95857
4659 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
4660 base_bb, remember all forced and non-local labels on it and later
4661 treat those as if they have NULL label_to_block. Formatting fix.
4664 2020-07-02 Richard Biener <rguenther@suse.de>
4666 PR tree-optimization/96022
4667 * tree-vect-stmts.c (vectorizable_shift): Only use the
4668 first vector stmt when extracting the scalar shift amount.
4669 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
4670 nodes with all-scalar children from scalars but not stores.
4671 (vect_analyze_slp_instance): Mark the node not failed.
4673 2020-07-02 Felix Yang <felix.yang@huawei.com>
4675 PR tree-optimization/95961
4676 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
4677 number of scalars instead of the number of vectors as an upper bound
4678 for the loop saving info about DR in the hash table. Remove unused
4681 2020-07-02 Jakub Jelinek <jakub@redhat.com>
4683 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
4684 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
4685 OpenMP non-rectangular loops. Use XALLOCAVEC.
4687 2020-07-02 Martin Liska <mliska@suse.cz>
4689 PR gcov-profile/95348
4690 * coverage.c (read_counts_file): Read only COUNTERS that are
4692 * gcov-dump.c (tag_function): Change signature from unsigned to
4694 (tag_blocks): Likewise.
4695 (tag_arcs): Likewise.
4696 (tag_lines): Likewise.
4697 (tag_counters): Likewise.
4698 (tag_summary): Likewise.
4699 * gcov.c (read_count_file): Read all non-zero counters
4702 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
4704 * config/riscv/multilib-generator (arch_canonicalize): Handle
4705 multi-letter extension.
4706 Using underline as separator between different extensions.
4708 2020-07-01 Pip Cet <pipcet@gmail.com>
4710 * spellcheck.c (test_data): Add problematic strings.
4711 (test_metric_conditions): Don't test the triangle inequality
4712 condition, which our distance function does not satisfy.
4714 2020-07-01 Omar Tahir <omar.tahir@arm.com>
4716 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
4717 generate a BTI instruction.
4719 2020-07-01 Jeff Law <law@redhat.com>
4721 PR tree-optimization/94882
4722 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
4724 2020-07-01 Jeff Law <law@redhat.com>
4726 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
4727 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
4729 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
4731 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
4732 for 64bits fpsr/fpcr getter setters builtin variants.
4733 (aarch64_init_fpsr_fpcr_builtins): New function.
4734 (aarch64_general_init_builtins): Modify to make use of the later.
4735 (aarch64_expand_fpsr_fpcr_setter): New function.
4736 (aarch64_general_expand_builtin): Modify to make use of the later.
4737 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
4738 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
4739 generalizing 'get_fpcr', 'set_fpsr'.
4740 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
4742 (fpscr_name): New int attribute.
4743 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
4744 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
4745 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
4748 2020-07-01 Martin Liska <mliska@suse.cz>
4750 * gcov.c (print_usage): Avoid trailing space for -j option.
4752 2020-07-01 Richard Biener <rguenther@suse.de>
4754 PR tree-optimization/95839
4755 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
4756 vectors are not uniform.
4757 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
4759 (vect_build_slp_tree_2): For groups of lane extracts
4760 from a vector register generate a permute node
4761 with a special child representing the pre-existing vector.
4762 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
4763 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
4764 (vectorizable_slp_permutation): Do not generate or cost identity
4766 (vect_schedule_slp_instance): Handle pre-existing vector
4767 that are function arguments.
4769 2020-07-01 Richard Biener <rguenther@suse.de>
4771 * system.h (INCLUDE_ISL): New guarded include.
4772 * graphite-dependences.c: Use it.
4773 * graphite-isl-ast-to-gimple.c: Likewise.
4774 * graphite-optimize-isl.c: Likewise.
4775 * graphite-poly.c: Likewise.
4776 * graphite-scop-detection.c: Likewise.
4777 * graphite-sese-to-poly.c: Likewise.
4778 * graphite.c: Likewise.
4779 * graphite.h: Drop the includes here.
4781 2020-07-01 Martin Liska <mliska@suse.cz>
4783 * gcov.c (print_usage): Shorted option description for -j
4786 2020-07-01 Martin Liska <mliska@suse.cz>
4788 * doc/gcov.texi: Rename 2 options.
4789 * gcov.c (print_usage): Rename -i,--json-format to
4790 -j,--json-format and -j,--human-readable to -H,--human-readable.
4791 (process_args): Fix up parsing. Document obsolete options and
4792 how are they changed.
4794 2020-07-01 Jeff Law <law@redhat.com>
4796 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
4797 (pa_output_ascii): Likewise.
4799 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
4801 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
4803 (riscv_subset_list::parsing_subset_version): Add parameter for
4804 indicate explicitly version, and handle explicitly version.
4805 (riscv_subset_list::handle_implied_ext): Ditto.
4806 (riscv_subset_list::add): Ditto.
4807 (riscv_subset_t::riscv_subset_t): Init new field.
4808 (riscv_subset_list::to_string): Always output version info if version
4809 explicitly specified.
4810 (riscv_subset_list::parsing_subset_version): Handle explicitly
4812 (riscv_subset_list::parse_std_ext): Ditto.
4813 (riscv_subset_list::parse_multiletter_ext): Ditto.
4815 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
4819 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
4820 "Advanced SIMD type".
4821 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
4822 attributes are equal.
4823 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
4825 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
4826 in the "Advanced SIMD type" attribute.
4827 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
4828 attribute to each Advanced SIMD type, using the mangled type
4829 as the attribute's single argument.
4831 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
4834 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
4835 -mgeneral-regs-only is not used.
4837 2020-06-30 Yang Yang <yangyang305@huawei.com>
4839 PR tree-optimization/95855
4840 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
4841 checks to recognize a missed if-conversion opportunity when
4842 judging whether to duplicate a block.
4844 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
4846 * doc/extend.texi: Change references to "future architecture" to
4847 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
4848 references to "future" (because the future is now).
4850 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
4852 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
4854 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
4856 * simplify-rtx.c (simplify_distributive_operation): New function
4857 to un-distribute a binary operation of two binary operations.
4858 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
4859 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
4861 (test_scalar_int_ops): New function for unit self-testing
4862 scalar integer transformations in simplify-rtx.c.
4863 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
4864 (simplify_rtx_c_tests): Call test_scalar_ops.
4866 2020-06-29 Richard Biener <rguenther@suse.de>
4868 PR tree-optimization/95916
4869 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
4870 the case of not vectorized externals.
4872 2020-06-29 Richard Biener <rguenther@suse.de>
4874 * tree-vectorizer.h: Do not include <utility>.
4876 2020-06-29 Martin Liska <mliska@suse.cz>
4878 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
4879 instead of gimple_stmt_iterator::bb.
4880 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
4881 * tree-vectorizer.h: Likewise.
4883 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
4885 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
4886 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
4887 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
4888 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
4889 (gcn_dwarf_register_number): New function.
4890 (gcn_dwarf_register_span): New function.
4891 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
4893 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
4895 PR tree-optimization/95854
4896 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
4897 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
4898 unsigned HOST_WIDE_INT.
4900 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4902 * config/sparc/sparc.c (epilogue_renumber): Remove register.
4903 (sparc_print_operand_address): Likewise.
4904 (sparc_type_code): Likewise.
4905 (set_extends): Likewise.
4907 2020-06-29 Martin Liska <mliska@suse.cz>
4909 PR tree-optimization/92860
4910 * optc-save-gen.awk: Add exceptions for arc target.
4912 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
4914 * doc/sourcebuild.texi: Describe globbing of the
4915 dump file scanning commands "suffix" argument.
4917 2020-06-28 Martin Sebor <msebor@redhat.com>
4920 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
4922 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
4924 * tree.c (get_nonnull_args): Consider the this pointer implicitly
4926 * var-tracking.c (deps_vec): New type.
4927 (var_loc_dep_vec): New function.
4928 (VAR_LOC_DEP_VEC): Use it.
4930 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
4932 * internal-fn.c (direct_mask_load_optab_supported_p): Use
4933 convert_optab_supported_p instead of direct_optab_supported_p.
4934 (direct_mask_store_optab_supported_p): Likewise.
4936 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
4938 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
4939 simplify_using_ranges class.
4940 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
4941 field. Adjust all methods to use new field.
4942 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
4943 simplify_using_ranges class.
4944 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
4945 field. Adjust all methods to use new field.
4946 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
4947 (vrp_prop::vrp_finalize): New vrp_folder argument.
4948 (execute_vrp): Pass folder to vrp_finalize. Use
4949 simplify_using_ranges class.
4950 Remove cleanup_edges_and_switches call.
4951 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
4952 value_range_equiv uses to value_range.
4953 (simplify_using_ranges::op_with_boolean_value_range_p): Use
4954 simplify_using_ranges class.
4955 (check_for_binary_op_overflow): Make static.
4956 (vr_values::extract_range_basic): Pass this to
4957 check_for_binary_op_overflow.
4958 (compare_range_with_value): Change value_range_equiv uses to
4960 (vr_values::vr_values): Initialize simplifier field.
4961 Remove uses of to_remove_edges and to_update_switch_stmts.
4962 (vr_values::~vr_values): Remove uses of to_remove_edges and
4963 to_update_switch_stmts.
4964 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
4966 (vr_values::compare_name_with_value): Same.
4967 (vr_values::compare_names): Same.
4968 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
4969 (vr_values::vrp_evaluate_conditional): Same.
4970 (vr_values::vrp_visit_cond_stmt): Same.
4971 (find_case_label_ranges): Change value_range_equiv uses to
4973 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
4974 (vr_values::simplify_truth_ops_using_ranges): Move to
4975 simplify_using_ranges class.
4976 (vr_values::simplify_div_or_mod_using_ranges): Same.
4977 (vr_values::simplify_min_or_max_using_ranges): Same.
4978 (vr_values::simplify_abs_using_ranges): Same.
4979 (vr_values::simplify_bit_ops_using_ranges): Same.
4980 (test_for_singularity): Change value_range_equiv uses to
4982 (range_fits_type_p): Same.
4983 (vr_values::simplify_cond_using_ranges_1): Same.
4984 (vr_values::simplify_cond_using_ranges_2): Make extern.
4985 (vr_values::fold_cond): Move to simplify_using_ranges class.
4986 (vr_values::simplify_switch_using_ranges): Same.
4987 (vr_values::cleanup_edges_and_switches): Same.
4988 (vr_values::simplify_float_conversion_using_ranges): Same.
4989 (vr_values::simplify_internal_call_using_ranges): Same.
4990 (vr_values::two_valued_val_range_p): Same.
4991 (vr_values::simplify_stmt_using_ranges): Move to...
4992 (simplify_using_ranges::simplify): ...here.
4993 * vr-values.h (class vr_values): Move all the simplification of
4994 statements using ranges methods and code from here...
4995 (class simplify_using_ranges): ...to here.
4996 (simplify_cond_using_ranges_2): New extern prototype.
4998 2020-06-27 Jakub Jelinek <jakub@redhat.com>
5000 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
5001 member, move outer member.
5002 (struct omp_for_data): Add first_nonrect and last_nonrect members.
5003 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
5004 last_nonrect and non_rect_referenced members.
5005 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
5007 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
5008 non-rectangular loops.
5009 (extract_omp_for_update_vars): Likewise.
5010 (expand_omp_for_generic, expand_omp_for_static_nochunk,
5011 expand_omp_for_static_chunk, expand_omp_simd,
5012 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
5013 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
5014 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
5017 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
5020 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
5022 * config/i386/i386.c (ix86_frame_pointer_required): Update
5025 2020-06-26 Yichao Yu <yyc1992@gmail.com>
5027 * multiple_target.c (redirect_to_specific_clone): Fix tests
5028 to check individual attribute rather than an attribute list.
5030 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
5032 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
5033 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
5036 2020-06-26 Marek Polacek <polacek@redhat.com>
5038 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
5039 * doc/standards.texi (C Language): Correct the default dialect.
5040 (C++ Language): Update the default for C++ to gnu++17.
5042 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
5044 * tree-ssa-reassoc.c (dump_range_entry): New function.
5045 (debug_range_entry): New debug function.
5046 (update_range_test): Invoke dump_range_entry for dumping.
5047 (optimize_range_tests_to_bit_test): Merge the entry test in the
5048 bit test when possible and lower the profitability threshold.
5050 2020-06-26 Richard Biener <rguenther@suse.de>
5052 PR tree-optimization/95897
5053 * tree-vectorizer.h (vectorizable_induction): Remove
5054 unused gimple_stmt_iterator * parameter.
5055 * tree-vect-loop.c (vectorizable_induction): Likewise.
5056 (vect_analyze_loop_operations): Adjust.
5057 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
5058 (vect_transform_stmt): Likewise.
5059 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
5060 for fold-left reductions, clarify existing reduction case.
5062 2020-06-25 Nick Clifton <nickc@redhat.com>
5064 * config/m32r/m32r.md (movsicc): Disable pattern.
5066 2020-06-25 Richard Biener <rguenther@suse.de>
5068 PR tree-optimization/95839
5069 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
5070 check on the number of datarefs.
5072 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
5074 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
5075 the insn_data n_operands value to unsigned.
5077 2020-06-25 Richard Biener <rguenther@suse.de>
5079 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
5080 vector defs to determine insertion place.
5082 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
5085 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
5086 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
5087 (PTA_TIGERLAKE): Add PTA_CLWB.
5089 2020-06-25 Richard Biener <rguenther@suse.de>
5091 PR tree-optimization/95866
5092 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
5093 vectorized shift operands. For scalar shifts use lane zero
5094 of a vectorized shift operand.
5096 2020-06-25 Martin Liska <mliska@suse.cz>
5098 PR tree-optimization/95745
5100 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
5101 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
5103 * tree-vect-generic.c (expand_vector_condition): Remove dead
5104 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
5106 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
5109 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
5110 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
5111 (convert_4f32_8f16): New define_expand
5112 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
5114 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
5115 overloaded builtin entry.
5116 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
5117 (vsx_xvcvsphp): New define_insn.
5119 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
5120 Segher Boessenkool <segher@kernel.crashing.org>
5122 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
5124 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
5126 * simplify-rtx.c (simplify_unary_operation_1): Simplify
5127 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
5129 2020-06-24 Richard Biener <rguenther@suse.de>
5131 PR tree-optimization/95866
5132 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
5133 (vect_build_slp_tree_2): Properly reset matches[0],
5134 ignore uniform constants.
5136 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5139 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
5140 (cpu_indicator_init): Likewise.
5141 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
5143 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5146 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
5147 detection with AVX512BF16.
5149 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5152 * common/config/i386/i386-isas.h: New file. Extracted from
5153 gcc/config/i386/i386-builtins.c.
5154 (_isa_names_table): Add option.
5155 (ISA_NAMES_TABLE_START): New.
5156 (ISA_NAMES_TABLE_END): Likewise.
5157 (ISA_NAMES_TABLE_ENTRY): Likewise.
5158 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
5159 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
5160 from enum processor_features.
5161 * config/i386/driver-i386.c: Include
5162 "common/config/i386/cpuinfo.h" and
5163 "common/config/i386/i386-isas.h".
5164 (has_feature): New macro.
5165 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
5166 features. Use has_feature to detect processor features. Call
5167 Call get_intel_cpu to get the newer Intel CPU name. Use
5168 isa_names_table to generate command-line options.
5169 * config/i386/i386-builtins.c: Include
5170 "common/config/i386/i386-isas.h".
5171 (_arch_names_table): Removed.
5172 (isa_names_table): Likewise.
5174 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5177 * common/config/i386/cpuinfo.h: New file.
5178 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
5179 (__processor_model2): New.
5180 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
5181 (has_cpu_feature): New function.
5182 (set_cpu_feature): Likewise.
5183 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
5184 CHECK___builtin_cpu_is. Return AMD CPU name.
5185 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
5186 Use CHECK___builtin_cpu_is. Return Intel CPU name.
5187 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
5188 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
5189 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
5190 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
5191 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
5192 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
5193 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
5194 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
5195 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
5196 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
5197 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
5198 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
5199 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
5200 FEATURE_XSAVEOPT and FEATURE_XSAVES
5201 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
5202 Also update cpu_model2.
5203 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
5204 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
5205 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
5206 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
5207 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
5208 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
5209 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
5210 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
5211 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
5212 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
5213 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
5214 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
5215 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
5216 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
5217 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
5218 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
5219 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
5220 (SIZE_OF_CPU_FEATURES): New.
5221 * config/i386/i386-builtins.c (processor_features): Removed.
5222 (isa_names_table): Replace F_XXX with FEATURE_XXX.
5223 (fold_builtin_cpu): Change __cpu_features2 to an array.
5225 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
5228 * common/config/i386/i386-common.c (processor_alias_table): Add
5229 processor model and priority to each entry.
5230 (pta_size): Updated with -6.
5231 (num_arch_names): New.
5232 * common/config/i386/i386-cpuinfo.h: New file.
5233 * config/i386/i386-builtins.c (feature_priority): Removed.
5234 (processor_model): Likewise.
5235 (_arch_names_table): Likewise.
5236 (arch_names_table): Likewise.
5237 (_isa_names_table): Replace P_ZERO with P_NONE.
5238 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
5239 processor_alias_table.
5240 (fold_builtin_cpu): Replace arch_names_table with
5241 processor_alias_table.
5242 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
5243 (pta): Add model and priority.
5244 (num_arch_names): New.
5246 2020-06-24 Richard Biener <rguenther@suse.de>
5248 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
5250 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
5251 Simplify for new position of vectorized SLP loads.
5252 (vect_slp_analyze_node_dependences): Adjust for it.
5253 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
5254 for the first stmts dataref.
5255 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
5256 (vect_schedule_slp_instance): Emit loads before the
5258 * tree-vect-stmts.c (vectorizable_load): Do what the comment
5259 says and use vect_find_first_scalar_stmt_in_slp.
5261 2020-06-24 Richard Biener <rguenther@suse.de>
5263 PR tree-optimization/95856
5264 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
5267 2020-06-24 Jakub Jelinek <jakub@redhat.com>
5270 * fold-const.c (fold_cond_expr_with_comparison): Optimize
5271 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
5273 2020-06-24 Jakub Jelinek <jakub@redhat.com>
5275 * omp-low.c (lower_omp_for): Fix two pastos.
5277 2020-06-24 Martin Liska <mliska@suse.cz>
5279 * optc-save-gen.awk: Compare string options in cl_optimization_compare
5282 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
5284 * config.gcc: Identify power10 as a 64-bit processor and as valid
5285 for --with-cpu and --with-tune.
5287 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
5289 * Makefile.in (LANG_MAKEFRAGS): Same.
5290 (tmake_file): Use -include.
5293 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
5295 * REVISION: Delete file meant for a private branch.
5297 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
5300 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
5301 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
5303 2020-06-23 Alexandre Oliva <oliva@adacore.com>
5305 * collect-utils.h (dumppfx): New.
5306 * collect-utils.c (dumppfx): Likewise.
5307 * lto-wrapper.c (run_gcc): Set global dumppfx.
5308 (compile_offload_image): Pass a -dumpbase on to mkoffload.
5309 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
5310 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
5312 (compile_native): Pass -dumpbase et al to compiler.
5313 * config/gcn/mkoffload.c (gcn_dumpbase): New.
5314 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
5315 save_temps. Pass -dumpbase et al to offload target compiler.
5316 (compile_native): Pass -dumpbase et al to compiler.
5318 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
5320 * REVISION: New file.
5322 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
5324 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
5325 Update comment for ISA 3.1.
5326 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
5327 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
5328 on AIX, and -mpower10 elsewhere.
5329 * config/rs6000/future.md: Delete.
5330 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
5332 * config/rs6000/power10.md: New file.
5333 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
5334 PPC_PLATFORM_FUTURE.
5335 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
5336 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
5337 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
5338 Use BU_P10_* instead of BU_FUTURE_*.
5339 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
5340 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
5341 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
5342 FUTURE_BUILTIN_VEC_XXEVAL.
5343 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
5344 Update compiler messages.
5345 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
5346 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
5347 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
5349 * config/rs6000/rs6000-string.c: Ditto.
5350 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
5351 instead of "future", reorder it to right after "power9".
5352 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
5353 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
5354 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
5355 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
5356 not ISA_FUTURE_MASKS_SERVER.
5357 (rs6000_opt_masks): Use "power10" instead of "future".
5358 (rs6000_builtin_mask_names): Ditto.
5359 (rs6000_disable_incompatible_switches): Ditto.
5360 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
5361 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
5362 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
5363 not RS6000_BTM_FUTURE.
5364 * config/rs6000/rs6000.md: Use "power10", not "future". Use
5365 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
5367 * config/rs6000/rs6000.opt (mfuture): Delete.
5369 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
5370 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
5372 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
5374 * coretypes.h (first_type): Delete.
5375 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
5377 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5379 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
5380 (arm_mve_hw): Likewise.
5382 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
5385 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
5388 2020-06-22 Richard Biener <rguenther@suse.de>
5390 PR tree-optimization/95770
5391 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
5394 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
5396 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
5397 (gcn_return_in_memory): Return vectors in memory.
5399 2020-06-22 Jakub Jelinek <jakub@redhat.com>
5401 * omp-general.c (omp_extract_for_data): For triangular loops with
5402 all loop invariant expressions constant where the innermost loop is
5403 executed at least once compute number of iterations at compile time.
5405 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
5407 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
5408 (DRIVER_SELF_SPECS): New.
5410 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
5412 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
5413 (RISCV_FTYPE_ATYPES0): New.
5414 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
5415 * config/riscv/riscv-ftypes.def: Remove VOID argument.
5417 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
5419 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
5420 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
5423 (ASM_CPU_SPEC): Remove vsx and altivec options.
5424 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
5427 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
5428 (TARGET_DEFAULT): Only define if not BIARCH.
5429 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
5432 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
5435 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
5436 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
5438 (CPLUSPLUS_CPP_SPEC): Same.
5441 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
5442 * config/rs6000/defaultaix64.h: New file.
5443 * config/rs6000/t-aix64: New file.
5445 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
5447 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
5448 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
5449 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
5451 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
5452 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
5453 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
5454 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
5455 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
5456 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
5457 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
5458 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
5459 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
5460 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
5461 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
5462 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
5463 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
5464 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
5465 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
5466 Allow zero constants.
5467 (print_operand) <case 'A'>: New output modifier.
5468 (rs6000_split_multireg_move): Add support for inserting accumulator
5469 priming and depriming instructions. Add support for splitting an
5470 assemble accumulator pattern.
5471 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
5472 rs6000_gimple_fold_mma_builtin): New functions.
5473 (RS6000_BUILTIN_M): New macro.
5474 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
5475 (bdesc_mma): Add new MMA built-in support.
5476 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
5477 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
5479 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
5480 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
5481 and rs6000_gimple_fold_mma_builtin.
5482 (rs6000_expand_builtin): Call mma_expand_builtin.
5483 Use RS6000_BTC_OPND_MASK.
5484 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
5485 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
5486 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
5487 VSX_BUILTIN_XVCVBF16SP.
5488 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
5489 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
5490 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
5491 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
5492 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
5493 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
5494 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
5495 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
5496 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
5497 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
5498 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
5499 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
5500 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
5501 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
5502 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
5503 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
5504 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
5505 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
5506 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
5507 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
5508 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
5509 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
5510 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
5511 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
5512 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
5513 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
5514 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
5515 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
5516 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
5517 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
5518 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
5519 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
5520 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
5521 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
5522 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
5523 MMA_AVVI4I4I4): New define_int_iterator.
5524 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
5525 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
5526 avvi4i4i4): New define_int_attr.
5527 (*movpxi): Add zero constant alternative.
5528 (mma_assemble_pair, mma_assemble_acc): New define_expand.
5529 (*mma_assemble_acc): New define_insn_and_split.
5530 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
5531 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
5532 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
5533 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
5534 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
5535 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
5536 (UNSPEC_VSX_XVCVSPBF16): Likewise.
5537 (XVCVBF16): New define_int_iterator.
5538 (xvcvbf16): New define_int_attr.
5539 (vsx_<xvcvbf16>): New define_insn.
5540 * doc/extend.texi: Document the mma built-ins.
5542 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
5543 Michael Meissner <meissner@linux.ibm.com>
5545 * config/rs6000/mma.md: New file.
5546 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
5548 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
5549 for __vector_pair and __vector_quad types.
5550 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
5552 (POWERPC_MASKS): Likewise.
5553 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
5554 (POI, PXI): New partial integer modes.
5555 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
5556 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
5557 (rs6000_hard_regno_mode_ok_uncached): Likewise.
5558 Add support for POImode being allowed in VSX registers and PXImode
5559 being allowed in FP registers.
5560 (rs6000_modes_tieable_p): Adjust comment.
5561 Add support for POImode and PXImode.
5562 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
5563 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
5564 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
5565 Set up appropriate addr_masks for vector pair and vector quad addresses.
5566 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
5567 vector quad registers. Setup reload handlers for POImode and PXImode.
5568 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
5569 (rs6000_option_override_internal): Error if -mmma is specified
5570 without -mcpu=future.
5571 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
5572 (quad_address_p): Change size test to less than 16 bytes.
5573 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
5574 and vector quad instructions.
5575 (avoiding_indexed_address_p): Likewise.
5576 (rs6000_emit_move): Disallow POImode and PXImode moves involving
5578 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
5579 and FP registers for PXImode.
5580 (rs6000_split_multireg_move): Support splitting POImode and PXImode
5582 (rs6000_mangle_type): Adjust comment. Add support for mangling
5583 __vector_pair and __vector_quad types.
5584 (rs6000_opt_masks): Add entry for mma.
5585 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
5586 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
5587 (address_to_insn_form): Likewise.
5588 (reg_to_non_prefixed): Likewise.
5589 (rs6000_invalid_conversion): New function.
5590 * config/rs6000/rs6000.h (MASK_MMA): Define.
5591 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
5592 (VECTOR_ALIGNMENT_P): New helper macro.
5593 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
5594 (RS6000_BTM_MMA): Define.
5595 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
5596 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
5597 RS6000_BTI_vector_quad.
5598 (vector_pair_type_node): New.
5599 (vector_quad_type_node): New.
5600 * config/rs6000/rs6000.md: Include mma.md.
5601 (define_mode_iterator RELOAD): Add POI and PXI.
5602 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
5603 * config/rs6000/rs6000.opt (-mmma): New.
5604 * doc/invoke.texi: Document -mmma.
5606 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
5608 PR tree-optimization/95638
5609 * tree-loop-distribution.c (pg_edge_callback_data): New field.
5610 (loop_distribution::break_alias_scc_partitions): Record and restore
5611 postorder information. Fix memory leak.
5613 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
5615 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
5616 (output_file_start): Use const 'char *'.
5618 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
5620 PR tree-optimization/94880
5621 * match.pd (A | B) - B -> (A & ~B): New simplification.
5623 2020-06-19 Richard Biener <rguenther@suse.de>
5625 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
5626 for lane permutations.
5628 2020-06-19 Richard Biener <rguenther@suse.de>
5630 PR tree-optimization/95761
5631 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
5632 vectorized stmts for finding the last one.
5634 2020-06-18 Felix Yang <felix.yang@huawei.com>
5636 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
5637 vect_relevant_for_alignment_p to filter out data references in
5638 the loop whose alignment is irrelevant when trying loop peeling
5641 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
5643 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
5644 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5645 mode iterator for the first operand of ZERO_EXTRACT RTX.
5646 Change ext_register_operand predicate to register_operand.
5647 Rename from *cmpqi_ext_1.
5648 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
5649 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
5650 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
5651 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5652 (*extv<mode>): Use SWI24 mode iterator for the first operand
5653 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5654 to register_operand.
5655 (*extzv<mode>): Use SWI248 mode iterator for the first operand
5656 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5657 to register_operand.
5658 (*extzvqi): Use SWI248 mode iterator instead of SImode for
5659 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
5660 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
5662 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
5663 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5664 mode iterator for the first operand of ZERO_EXTRACT RTX.
5665 Change ext_register_operand predicate to register_operand.
5666 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
5667 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
5669 (*insvqi_1): Use SWI248 mode iterator instead of SImode
5670 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
5671 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
5672 predicate to register_operand.
5675 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
5676 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5677 mode iterator for the first operand of ZERO_EXTRACT RTX.
5678 Change ext_register_operand predicate to register_operand.
5679 (addqi_ext_1): New expander.
5680 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5681 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5682 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5683 to register_operand. Rename from *addqi_ext_1.
5684 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
5685 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5686 (udivmodqi4): Ditto.
5687 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5688 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5689 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5690 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5691 to register_operand. Rename from *testqi_ext_1.
5692 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
5693 (andqi_ext_1): New expander.
5694 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5695 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5696 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5697 to register_operand. Rename from andqi_ext_1.
5698 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
5699 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
5700 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
5701 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
5702 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5703 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
5704 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5705 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5706 to register_operand. Rename from *xorqi_ext_1_cc.
5707 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
5708 in mode, matching its first operand.
5709 (promote_duplicated_reg): Update for renamed insv<mode>_1.
5710 * config/i386/predicates.md (ext_register_operand): Remove predicate.
5712 2020-06-18 Martin Sebor <msebor@redhat.com>
5716 * builtins.c (compute_objsize): Remove call to
5717 compute_builtin_object_size and instead compute conservative sizes
5720 2020-06-18 Martin Liska <mliska@suse.cz>
5722 * coretypes.h (struct iterator_range): New type.
5723 * tree-vect-patterns.c (vect_determine_precisions): Use
5724 range-based iterator.
5725 (vect_pattern_recog): Likewise.
5726 * tree-vect-slp.c (_bb_vec_info): Likewise.
5727 (_bb_vec_info::~_bb_vec_info): Likewise.
5728 (vect_slp_check_for_constructors): Likewise.
5729 * tree-vectorizer.h:Add new iterators
5730 and functions that use it.
5732 2020-06-18 Martin Liska <mliska@suse.cz>
5734 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
5735 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
5736 of a VEC_COND_EXPR cannot be tcc_comparison and so that
5737 a SSA_NAME needs to be created before we use it for the first
5738 argument of the VEC_COND_EXPR.
5739 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
5741 2020-06-18 Richard Biener <rguenther@suse.de>
5744 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
5745 to the target if necessary.
5746 (expand_vect_cond_mask_optab_fn): Likewise.
5748 2020-06-18 Martin Liska <mliska@suse.cz>
5750 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
5751 vcond as we check for NULL pointer.
5753 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
5755 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
5756 silence empty-body warning with gcc_fallthrough.
5758 2020-06-18 Jakub Jelinek <jakub@redhat.com>
5760 PR tree-optimization/95699
5761 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
5762 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
5763 declarations to the statements that set them where possible.
5765 2020-06-18 Jakub Jelinek <jakub@redhat.com>
5768 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
5769 scalar mode halfvectype other than vector boolean for
5770 VEC_PACK_TRUNC_EXPR.
5772 2020-06-18 Richard Biener <rguenther@suse.de>
5774 * varasm.c (assemble_variable): Make sure to not
5775 defer output when outputting addressed constants.
5776 (output_constant_def_contents): Likewise.
5777 (add_constant_to_table): Take and pass on whether to
5779 (output_addressed_constants): Likewise.
5780 (output_constant_def): Pass on whether to defer output
5781 to add_constant_to_table.
5782 (tree_output_constant_def): Defer output of constants.
5784 2020-06-18 Richard Biener <rguenther@suse.de>
5786 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
5787 (_slp_tree::lane_permutation): New member.
5788 (_slp_tree::code): Likewise.
5789 (SLP_TREE_TWO_OPERATORS): Remove.
5790 (SLP_TREE_LANE_PERMUTATION): New.
5791 (SLP_TREE_CODE): Likewise.
5792 (vect_stmt_dominates_stmt_p): Declare.
5793 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
5794 * tree-vect-stmts.c (vect_model_simple_cost): Remove
5795 SLP_TREE_TWO_OPERATORS handling.
5796 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
5797 (_slp_tree::~_slp_tree): Likewise.
5798 (vect_two_operations_perm_ok_p): Remove.
5799 (vect_build_slp_tree_1): Remove verification of two-operator
5801 (vect_build_slp_tree_2): When we have two different operators
5802 build two computation SLP nodes and a blend.
5803 (vect_print_slp_tree): Print the lane permutation if it exists.
5804 (slp_copy_subtree): Copy it.
5805 (vect_slp_rearrange_stmts): Re-arrange it.
5806 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
5807 VEC_PERM_EXPR explicitely.
5808 (vect_schedule_slp_instance): Likewise. Remove old
5809 SLP_TREE_TWO_OPERATORS code.
5810 (vectorizable_slp_permutation): New function.
5812 2020-06-18 Martin Liska <mliska@suse.cz>
5814 * tree-vect-generic.c (expand_vector_condition): Check
5815 for gassign before inspecting RHS.
5817 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
5819 * gimplify.c (omp_notice_threadprivate_variable)
5820 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
5821 diagnostic. Adjust all users.
5823 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
5825 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
5826 NULL_TREE' check earlier.
5828 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
5830 * doc/extend.texi (attribute access): Fix a typo.
5832 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
5833 Kaipeng Zhou <zhoukaipeng3@huawei.com>
5835 PR tree-optimization/95199
5836 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
5837 strided load/store operations and remove redundant code.
5839 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
5841 * coretypes.h (first_type): New alias template.
5842 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
5843 Remove spurious “...” and split the function type out into a typedef.
5845 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
5847 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
5850 2020-06-17 Richard Biener <rguenther@suse.de>
5852 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
5853 in *vectype parameter.
5854 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
5855 vect_build_slp_tree_1 computed.
5856 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
5857 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
5858 (vect_schedule_slp_instance): Likewise.
5859 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
5860 from SLP_TREE_VECTYPE.
5862 2020-06-17 Richard Biener <rguenther@suse.de>
5864 PR tree-optimization/95717
5865 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
5866 Move BB SSA updating before exit/latch PHI current def copying.
5868 2020-06-17 Martin Liska <mliska@suse.cz>
5870 * Makefile.in: Add new file.
5871 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
5872 not meet this condition.
5873 (do_store_flag): Likewise.
5874 * gimplify.c (gimplify_expr): Gimplify first argument of
5875 VEC_COND_EXPR to be a SSA name.
5876 * internal-fn.c (vec_cond_mask_direct): New.
5877 (vec_cond_direct): Likewise.
5878 (vec_condu_direct): Likewise.
5879 (vec_condeq_direct): Likewise.
5880 (expand_vect_cond_optab_fn): New.
5881 (expand_vec_cond_optab_fn): Likewise.
5882 (expand_vec_condu_optab_fn): Likewise.
5883 (expand_vec_condeq_optab_fn): Likewise.
5884 (expand_vect_cond_mask_optab_fn): Likewise.
5885 (expand_vec_cond_mask_optab_fn): Likewise.
5886 (direct_vec_cond_mask_optab_supported_p): Likewise.
5887 (direct_vec_cond_optab_supported_p): Likewise.
5888 (direct_vec_condu_optab_supported_p): Likewise.
5889 (direct_vec_condeq_optab_supported_p): Likewise.
5890 * internal-fn.def (VCOND): New OPTAB.
5892 (VCONDEQ): Likewise.
5893 (VCOND_MASK): Likewise.
5894 * optabs.c (get_rtx_code): Make it global.
5895 (expand_vec_cond_mask_expr): Removed.
5896 (expand_vec_cond_expr): Removed.
5897 * optabs.h (expand_vec_cond_expr): Likewise.
5898 (vector_compare_rtx): Make it global.
5899 * passes.def: Add new pass_gimple_isel pass.
5900 * tree-cfg.c (verify_gimple_assign_ternary): Add check
5901 for VEC_COND_EXPR about first argument.
5902 * tree-pass.h (make_pass_gimple_isel): New.
5903 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
5904 propagation of the first argument of a VEC_COND_EXPR.
5905 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
5906 first argument of a VEC_COND_EXPR.
5907 (optimize_vec_cond_expr): Likewise.
5908 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
5909 for a first argument of created VEC_COND_EXPR.
5910 (expand_vector_condition): Fix coding style.
5911 * tree-vect-stmts.c (vectorizable_condition): Gimplify
5913 * gimple-isel.cc: New file.
5915 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
5917 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
5918 (BSS_SECTION_ASM_OP): Use ".bss".
5919 (ASM_SPEC): Remove "-mattr=-code-object-v3".
5920 (LINK_SPEC): Add "--export-dynamic".
5921 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
5922 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
5923 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
5924 (load_image): Remove obsolete relocation handling.
5925 Add ".kd" suffix to the symbol names.
5926 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
5927 (gcn_option_override): Update gcn_isa test.
5928 (gcn_kernel_arg_types): Update all the assembler directives.
5929 Remove the obsolete options.
5930 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
5931 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
5933 (output_file_start): Rework assembler file header.
5934 (gcn_hsa_declare_function_name): Rework kernel metadata.
5935 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
5936 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
5937 (PROCESSOR_VEGA10): New enum value.
5938 (PROCESSOR_VEGA20): New enum value.
5940 2020-06-17 Martin Liska <mliska@suse.cz>
5942 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
5944 * gcov-tool.c (print_version): Likewise.
5945 * gcov.c (print_version): Likewise.
5947 2020-06-17 liuhongt <hongtao.liu@intel.com>
5950 * config/i386/i386-expand.c
5951 (ix86_expand_vec_shift_qihi_constant): New function.
5952 * config/i386/i386-protos.h
5953 (ix86_expand_vec_shift_qihi_constant): Declare.
5954 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
5955 V*QImode by constant.
5957 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
5959 PR tree-optimization/95649
5960 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
5961 value is a constant.
5963 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5965 * config.in: Regenerate.
5966 * config/s390/s390.c (print_operand): Emit vector alignment hints
5967 for target z13, if AS accepts them. For other targets the logic
5969 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
5971 * configure: Regenerate.
5972 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
5974 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5976 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
5978 (__arm_vaddq_m_n_s32): Likewise.
5979 (__arm_vaddq_m_n_s16): Likewise.
5980 (__arm_vaddq_m_n_u8): Likewise.
5981 (__arm_vaddq_m_n_u32): Likewise.
5982 (__arm_vaddq_m_n_u16): Likewise.
5983 (__arm_vaddq_m): Modify polymorphic variant.
5985 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5987 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
5988 and constraint of all the operands.
5989 (mve_sqrshrl_sat<supf>_di): Likewise.
5990 (mve_uqrshl_si): Likewise.
5991 (mve_sqrshr_si): Likewise.
5992 (mve_uqshll_di): Likewise.
5993 (mve_urshrl_di): Likewise.
5994 (mve_uqshl_si): Likewise.
5995 (mve_urshr_si): Likewise.
5996 (mve_sqshl_si): Likewise.
5997 (mve_srshr_si): Likewise.
5998 (mve_srshrl_di): Likewise.
5999 (mve_sqshll_di): Likewise.
6000 * config/arm/predicates.md (arm_low_register_operand): Define.
6002 2020-06-16 Jakub Jelinek <jakub@redhat.com>
6004 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
6005 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
6006 or dist_schedule clause on non-rectangular loops. Handle
6007 gimplification of non-rectangular lb/b expressions. When changing
6008 iteration variable, adjust also non-rectangular lb/b expressions
6010 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
6012 (struct omp_for_data): Add non_rect member.
6013 * omp-general.c (omp_extract_for_data): Handle non-rectangular
6014 loops. Fill in non_rect, m1, m2 and outer.
6015 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
6016 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
6017 non-rectangular loop cases and assert for cases that can't be
6019 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
6020 (dump_omp_loop_non_rect_expr): New function.
6021 (dump_generic_node): Handle non-rectangular OpenMP loops.
6022 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
6023 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
6026 2020-06-16 Richard Biener <rguenther@suse.de>
6029 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
6031 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
6034 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
6035 assertion and turn it into a early exit check.
6037 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
6039 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
6040 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
6041 true and all elements are zero, then always clear. Return GS_ERROR
6042 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
6043 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
6044 the type is aggregate non-addressable, ask gimplify_init_constructor
6045 whether it can generate a single access to the target.
6047 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
6049 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
6050 access on the LHS is replaced with a scalar access, propagate the
6051 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
6053 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6055 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
6056 TARGET_THREADPTR reference.
6057 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
6058 targetm.have_tls instead of TARGET_HAVE_TLS.
6059 (xtensa_option_override): Set targetm.have_tls to false in
6060 configurations without THREADPTR.
6062 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6064 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
6066 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
6067 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
6068 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
6069 xtensa_windowed_abi if needed.
6070 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
6072 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
6073 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
6075 (mabi=call0, mabi=windowed): New options.
6076 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
6078 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
6080 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
6081 (TARGET_CAN_ELIMINATE): New macro.
6082 * config/xtensa/xtensa.h
6083 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
6084 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
6085 (HARD_FRAME_POINTER_REGNUM): Define using
6086 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
6087 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
6088 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
6089 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
6091 2020-06-15 Felix Yang <felix.yang@huawei.com>
6093 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
6094 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
6096 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
6098 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
6099 LOOP_VINFO_DATAREFS when possible.
6100 (update_epilogue_loop_vinfo): Likewise.
6102 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
6104 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
6106 (riscv_gpr_save_operation_p): Change type to unsigned for i and
6109 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
6112 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
6114 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
6115 * config/i386/sse.md (mul<mode>3): Drop mask_name since
6116 there's no real simd int8 multiplication instruction with
6117 mask. Also optimize it under TARGET_AVX512BW.
6118 (mulv8qi3): New expander.
6120 2020-06-12 Marco Elver <elver@google.com>
6122 * gimplify.c (gimplify_function_tree): Optimize and do not emit
6123 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
6124 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
6125 * tsan.c (instrument_memory_accesses): Make
6126 fentry_exit_instrument bool depend on new param.
6128 2020-06-12 Felix Yang <felix.yang@huawei.com>
6130 PR tree-optimization/95570
6131 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
6132 (vect_verify_datarefs_alignment): Call it to filter out data references
6133 in the loop whose alignment is irrelevant.
6134 (vect_get_peeling_costs_all_drs): Likewise.
6135 (vect_peeling_supportable): Likewise.
6136 (vect_enhance_data_refs_alignment): Likewise.
6138 2020-06-12 Richard Biener <rguenther@suse.de>
6140 PR tree-optimization/95633
6141 * tree-vect-stmts.c (vectorizable_condition): Properly
6142 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
6144 2020-06-12 Martin Liška <mliska@suse.cz>
6146 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
6147 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
6149 * lto-wrapper.c (merge_and_complain): Wrap option names.
6151 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
6153 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
6154 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
6155 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
6156 (vect_set_loop_condition_masked): Renamed to ...
6157 (vect_set_loop_condition_partial_vectors): ... this. Rename
6158 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
6159 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
6160 (vect_set_loop_condition_unmasked): Renamed to ...
6161 (vect_set_loop_condition_normal): ... this.
6162 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
6163 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
6164 to vect_set_loop_condition_partial_vectors.
6165 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
6166 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
6167 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
6169 (vect_analyze_loop_costing): ... this.
6170 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
6172 (vect_min_prec_for_max_niters): New, factored out from ...
6173 (vect_verify_full_masking): ... this. Rename
6174 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
6175 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
6176 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
6177 (vectorizable_reduction): Update some dumpings with partial
6178 vectors instead of fully-masked.
6179 (vectorizable_live_operation): Likewise.
6180 (vect_iv_limit_for_full_masking): Renamed to ...
6181 (vect_iv_limit_for_partial_vectors): ... this.
6182 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
6183 (check_load_store_for_partial_vectors): ... this. Update some
6184 dumpings with partial vectors instead of fully-masked.
6185 (vectorizable_store): Rename check_load_store_masking to
6186 check_load_store_for_partial_vectors.
6187 (vectorizable_load): Likewise.
6188 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
6189 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
6190 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
6191 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
6192 (vect_iv_limit_for_full_masking): Renamed to ...
6193 (vect_iv_limit_for_partial_vectors): this.
6194 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
6195 Rename iv_type to rgroup_iv_type.
6197 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
6199 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
6200 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
6201 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
6202 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
6203 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
6204 (insn_gen_fn::operator()): Replace overloaded definitions with
6205 a parameter-pack version.
6207 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
6210 * config/i386/i386-features.c (rest_of_insert_endbranch):
6212 (rest_of_insert_endbr_and_patchable_area): Change return type
6213 to void. Add need_endbr and patchable_area_size arguments.
6214 Don't call timevar_push nor timevar_pop. Replace
6215 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
6216 UNSPECV_PATCHABLE_AREA for patchable area.
6217 (pass_data_insert_endbranch): Renamed to ...
6218 (pass_data_insert_endbr_and_patchable_area): This. Change
6219 pass name to endbr_and_patchable_area.
6220 (pass_insert_endbranch): Renamed to ...
6221 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
6222 and patchable_area_size;.
6223 (pass_insert_endbr_and_patchable_area::gate): Set and check
6224 need_endbr and patchable_area_size.
6225 (pass_insert_endbr_and_patchable_area::execute): Call
6226 timevar_push and timevar_pop. Pass need_endbr and
6227 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
6228 (make_pass_insert_endbranch): Renamed to ...
6229 (make_pass_insert_endbr_and_patchable_area): This.
6230 * config/i386/i386-passes.def: Replace pass_insert_endbranch
6231 with pass_insert_endbr_and_patchable_area.
6232 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
6233 (make_pass_insert_endbranch): Renamed to ...
6234 (make_pass_insert_endbr_and_patchable_area): This.
6235 * config/i386/i386.c (ix86_asm_output_function_label): Set
6236 function_label_emitted to true.
6237 (ix86_print_patchable_function_entry): New function.
6238 (ix86_output_patchable_area): Likewise.
6239 (x86_function_profiler): Replace endbr_queued_at_entrance with
6240 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
6241 Call ix86_output_patchable_area to generate patchable area if
6243 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
6244 * config/i386/i386.h (queued_insn_type): New.
6245 (machine_function): Add function_label_emitted. Replace
6246 endbr_queued_at_entrance with insn_queued_at_entrance.
6247 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
6248 (patchable_area): New.
6250 2020-06-11 Martin Liska <mliska@suse.cz>
6252 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
6255 2020-06-11 Martin Liska <mliska@suse.cz>
6258 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
6261 2020-06-11 Martin Liska <mliska@suse.cz>
6262 Jakub Jelinek <jakub@redhat.com>
6265 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
6266 by using Pmode instead of ptr_mode.
6268 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6270 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
6271 (vect_set_loop_control): ... this.
6272 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
6273 (vect_set_loop_masks_directly): Renamed to ...
6274 (vect_set_loop_controls_directly): ... this. Also rename some
6275 variables with ctrl instead of mask. Rename vect_set_loop_mask to
6276 vect_set_loop_control.
6277 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
6278 Also rename some variables with ctrl instead of mask.
6279 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
6280 (release_vec_loop_controls): ... this. Rename rgroup_masks related
6282 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
6283 release_vec_loop_controls.
6284 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
6285 (vect_get_max_nscalars_per_iter): Likewise.
6286 (vect_estimate_min_profitable_iters): Likewise.
6287 (vect_record_loop_mask): Likewise.
6288 (vect_get_loop_mask): Likewise.
6289 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
6290 (struct rgroup_controls): ... this. Also rename mask_type
6291 to type and rename masks to controls.
6293 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6295 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
6296 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
6297 (vect_gen_vector_loop_niters): Likewise.
6298 (vect_do_peeling): Likewise.
6299 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
6300 fully_masked_p to using_partial_vectors_p.
6301 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
6302 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
6303 (determine_peel_for_niter): Likewise.
6304 (vect_estimate_min_profitable_iters): Likewise.
6305 (vect_transform_loop): Likewise.
6306 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
6307 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
6309 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
6311 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
6312 can_fully_mask_p to can_use_partial_vectors_p.
6313 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
6314 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
6315 to saved_can_use_partial_vectors_p.
6316 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
6317 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
6318 (vectorizable_live_operation): Likewise.
6319 * tree-vect-stmts.c (permute_vec_elements): Likewise.
6320 (check_load_store_masking): Likewise.
6321 (vectorizable_operation): Likewise.
6322 (vectorizable_store): Likewise.
6323 (vectorizable_load): Likewise.
6324 (vectorizable_condition): Likewise.
6325 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
6326 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
6327 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
6329 2020-06-11 Martin Liska <mliska@suse.cz>
6331 * optc-save-gen.awk: Quote error string.
6333 2020-06-11 Alexandre Oliva <oliva@adacore.com>
6335 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
6337 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
6339 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
6340 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
6342 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
6343 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
6345 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
6347 * config/riscv/predicates.md (gpr_save_operation): New.
6348 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
6349 (riscv_gpr_save_operation_p): Ditto.
6350 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
6351 Ignore USEs for gpr_save patter.
6352 * config/riscv/riscv.c (gpr_save_reg_order): New.
6353 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
6354 (riscv_gen_gpr_save_insn): New.
6355 (riscv_gpr_save_operation_p): Ditto.
6356 * config/riscv/riscv.md (S3_REGNUM): New.
6363 (S10_REGNUM): Ditto.
6364 (S11_REGNUM): Ditto.
6365 (gpr_save): Model USEs correctly.
6367 2020-06-10 Martin Sebor <msebor@redhat.com>
6371 * builtins.c (inform_access): New function.
6372 (check_access): Call it. Add argument.
6373 (addr_decl_size): Remove.
6374 (get_range): New function.
6375 (compute_objsize): New overload. Only use compute_builtin_object_size
6376 with raw memory function.
6377 (check_memop_access): Pass new argument to compute_objsize and
6379 (expand_builtin_memchr, expand_builtin_strcat): Same.
6380 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
6381 (expand_builtin_stpncpy, check_strncat_sizes): Same.
6382 (expand_builtin_strncat, expand_builtin_strncpy): Same.
6383 (expand_builtin_memcmp): Same.
6384 * builtins.h (check_nul_terminated_array): Declare extern.
6385 (check_access): Add argument.
6386 (struct access_ref, struct access_data): New structs.
6387 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
6388 (builtin_access::overlap): Call it.
6389 * tree-object-size.c (decl_init_size): Declare extern.
6390 (addr_object_size): Correct offset computation.
6391 * tree-object-size.h (decl_init_size): Declare.
6392 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
6393 to maybe_warn_overflow when assigning to an SSA_NAME.
6395 2020-06-10 Richard Biener <rguenther@suse.de>
6397 * tree-vect-loop.c (vect_determine_vectorization_factor):
6399 (_loop_vec_info::_loop_vec_info): Likewise.
6400 (vect_update_vf_for_slp): Likewise.
6401 (vect_analyze_loop_operations): Likewise.
6402 (update_epilogue_loop_vinfo): Likewise.
6403 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
6404 (vect_pattern_recog): Likewise.
6405 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
6406 (_bb_vec_info::_bb_vec_info): Likewise.
6407 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
6410 2020-06-10 Richard Biener <rguenther@suse.de>
6412 PR tree-optimization/95576
6413 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
6415 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
6418 * config/aarch64/aarch64-sve-builtins.h
6419 (sve_switcher::m_old_maximum_field_alignment): New member.
6420 * config/aarch64/aarch64-sve-builtins.cc
6421 (sve_switcher::sve_switcher): Save maximum_field_alignment in
6422 m_old_maximum_field_alignment and clear maximum_field_alignment.
6423 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
6425 2020-06-10 Richard Biener <rguenther@suse.de>
6427 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
6429 (_stmt_vec_info::vec_stmts): Likewise.
6430 (vec_info::stmt_vec_info_ro): New flag.
6431 (vect_finish_replace_stmt): Adjust declaration.
6432 (vect_finish_stmt_generation): Likewise.
6433 (vectorizable_induction): Likewise.
6434 (vect_transform_reduction): Likewise.
6435 (vectorizable_lc_phi): Likewise.
6436 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
6437 allocate stmt infos for increments.
6438 (vect_record_grouped_load_vectors): Adjust.
6439 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6440 (vectorize_fold_left_reduction): Likewise.
6441 (vect_transform_reduction): Likewise.
6442 (vect_transform_cycle_phi): Likewise.
6443 (vectorizable_lc_phi): Likewise.
6444 (vectorizable_induction): Likewise.
6445 (vectorizable_live_operation): Likewise.
6446 (vect_transform_loop): Likewise.
6447 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
6448 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
6449 (vect_get_slp_defs): Likewise.
6450 (vect_transform_slp_perm_load): Likewise.
6451 (vect_schedule_slp_instance): Likewise.
6452 (vectorize_slp_instance_root_stmt): Likewise.
6453 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
6454 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
6455 (vect_finish_replace_stmt): Do not return anything.
6456 (vect_finish_stmt_generation): Likewise.
6457 (vect_build_gather_load_calls): Adjust.
6458 (vectorizable_bswap): Likewise.
6459 (vectorizable_call): Likewise.
6460 (vectorizable_simd_clone_call): Likewise.
6461 (vect_create_vectorized_demotion_stmts): Likewise.
6462 (vectorizable_conversion): Likewise.
6463 (vectorizable_assignment): Likewise.
6464 (vectorizable_shift): Likewise.
6465 (vectorizable_operation): Likewise.
6466 (vectorizable_scan_store): Likewise.
6467 (vectorizable_store): Likewise.
6468 (vectorizable_load): Likewise.
6469 (vectorizable_condition): Likewise.
6470 (vectorizable_comparison): Likewise.
6471 (vect_transform_stmt): Likewise.
6472 * tree-vectorizer.c (vec_info::vec_info): Initialize
6474 (vec_info::replace_stmt): Copy over stmt UID rather than
6475 unsetting/setting a stmt info allocating a new UID.
6476 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
6478 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
6480 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
6482 * gimple-ssa-evrp.c (class evrp_folder): New.
6483 (class evrp_dom_walker): Remove.
6484 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
6485 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
6486 * tree-ssa-copy.c (copy_folder::get_value): Same.
6487 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
6488 Pass stmt to get_value.
6489 (substitute_and_fold_engine::replace_phi_args_in): Same.
6490 (substitute_and_fold_dom_walker::after_dom_children): Call
6492 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
6493 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
6494 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
6495 call virtual functions for folding, pre_folding, and post folding.
6496 Call get_value with PHI. Tweak dump.
6497 * tree-ssa-propagate.h (class substitute_and_fold_engine):
6498 New argument to get_value.
6499 New virtual function pre_fold_bb.
6500 New virtual function post_fold_bb.
6501 New virtual function pre_fold_stmt.
6502 New virtual function post_new_stmt.
6503 New function propagate_into_phi_args.
6504 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
6505 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
6507 (vr_values::fold_cond): New.
6508 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
6509 * vr-values.h (class vr_values): Add
6510 simplify_cond_using_ranges_when_edge_is_known.
6512 2020-06-10 Martin Liska <mliska@suse.cz>
6515 * asan.c (asan_emit_stack_protection): Emit
6516 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
6519 2020-06-10 Tamar Christina <tamar.christina@arm.com>
6521 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
6523 2020-06-10 Richard Biener <rguenther@suse.de>
6525 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
6526 (vect_record_grouped_load_vectors): Likewise.
6527 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6528 (vectorize_fold_left_reduction): Likewise.
6529 (vect_transform_reduction): Likewise.
6530 (vect_transform_cycle_phi): Likewise.
6531 (vectorizable_lc_phi): Likewise.
6532 (vectorizable_induction): Likewise.
6533 (vectorizable_live_operation): Likewise.
6534 (vect_transform_loop): Likewise.
6535 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
6537 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
6538 (vect_get_vec_def_for_operand): Likewise.
6539 (vect_get_vec_def_for_stmt_copy): Likewise.
6540 (vect_get_vec_defs_for_stmt_copy): Likewise.
6541 (vect_get_vec_defs_for_operand): New function.
6542 (vect_get_vec_defs): Likewise.
6543 (vect_build_gather_load_calls): Adjust.
6544 (vect_get_gather_scatter_ops): Likewise.
6545 (vectorizable_bswap): Likewise.
6546 (vectorizable_call): Likewise.
6547 (vectorizable_simd_clone_call): Likewise.
6548 (vect_get_loop_based_defs): Remove.
6549 (vect_create_vectorized_demotion_stmts): Adjust.
6550 (vectorizable_conversion): Likewise.
6551 (vectorizable_assignment): Likewise.
6552 (vectorizable_shift): Likewise.
6553 (vectorizable_operation): Likewise.
6554 (vectorizable_scan_store): Likewise.
6555 (vectorizable_store): Likewise.
6556 (vectorizable_load): Likewise.
6557 (vectorizable_condition): Likewise.
6558 (vectorizable_comparison): Likewise.
6559 (vect_transform_stmt): Adjust and remove no longer applicable
6561 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
6562 STMT_VINFO_VEC_STMTS.
6563 (vec_info::free_stmt_vec_info): Relase it.
6564 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
6565 (_stmt_vec_info::vec_stmts): Add.
6566 (STMT_VINFO_VEC_STMT): Remove.
6567 (STMT_VINFO_VEC_STMTS): New.
6568 (vect_get_vec_def_for_operand_1): Remove.
6569 (vect_get_vec_def_for_operand): Likewise.
6570 (vect_get_vec_defs_for_stmt_copy): Likewise.
6571 (vect_get_vec_def_for_stmt_copy): Likewise.
6572 (vect_get_vec_defs): New overloads.
6573 (vect_get_vec_defs_for_operand): New.
6574 (vect_get_slp_defs): Declare.
6576 2020-06-10 Qian Chao <qianchao9@huawei.com>
6578 PR tree-optimization/95569
6579 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
6581 2020-06-10 Martin Liska <mliska@suse.cz>
6583 PR tree-optimization/92860
6584 * optc-save-gen.awk: Generate new function cl_optimization_compare.
6585 * opth-gen.awk: Generate declaration of the function.
6587 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
6589 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
6590 'future' PowerPC platform.
6591 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
6592 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
6593 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
6595 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
6596 (rs6000_clone_map): Add 'future' system target_clones support.
6598 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
6600 * Makefile.in (ZSTD_INC): Define.
6601 (ZSTD_LIB): Include ZSTD_LDFLAGS.
6602 (CFLAGS-lto-compress.o): Add ZSTD_INC.
6603 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
6605 * configure: Rebuilt.
6607 2020-06-09 Jason Merrill <jason@redhat.com>
6610 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
6612 2020-06-09 Marco Elver <elver@google.com>
6614 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
6615 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
6616 builtin for volatile instrumentation of reads/writes.
6617 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
6618 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
6619 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
6620 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
6621 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
6622 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
6623 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
6624 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
6625 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
6626 * tsan.c (get_memory_access_decl): Argument if access is
6627 volatile. If param tsan-distinguish-volatile is non-zero, and
6628 access if volatile, return volatile instrumentation decl.
6629 (instrument_expr): Check if access is volatile.
6631 2020-06-09 Richard Biener <rguenther@suse.de>
6633 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
6635 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
6637 * omp-offload.c (add_decls_addresses_to_decl_constructor,
6638 omp_finish_file): With in_lto_p, stream out all offload-table
6639 items even if the symtab_node does not exist.
6641 2020-06-09 Richard Biener <rguenther@suse.de>
6643 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
6645 2020-06-09 Martin Liska <mliska@suse.cz>
6647 * gcov-dump.c (print_usage): Fix spacing for --raw option
6650 2020-06-09 Martin Liska <mliska@suse.cz>
6652 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
6653 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
6654 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
6655 Handle all sanitizer options.
6656 (can_inline_edge_p): Use renamed CIF_* enum value.
6658 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
6660 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
6662 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
6663 (@aarch64_bic<mode>): Enable unpacked BIC.
6664 (*bic<mode>3): Enable unpacked BIC.
6666 2020-06-09 Martin Liska <mliska@suse.cz>
6668 PR gcov-profile/95365
6669 * doc/gcov.texi: Compile and link one example in 2 steps.
6671 2020-06-09 Jakub Jelinek <jakub@redhat.com>
6673 PR tree-optimization/95527
6674 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
6676 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
6678 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
6679 'future' PowerPC platform.
6680 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
6681 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
6682 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
6684 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
6685 (rs6000_clone_map): Add 'future' system target_clones support.
6687 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
6691 * omp-offload.c (add_decls_addresses_to_decl_constructor,
6692 omp_finish_file): Skip removed items.
6693 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
6694 to this node for variables and functions.
6696 2020-06-08 Jason Merrill <jason@redhat.com>
6698 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
6699 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
6700 * configure: Regenerate.
6702 2020-06-08 Martin Sebor <msebor@redhat.com>
6704 * postreload.c (reload_cse_simplify_operands): Clear first array element
6705 before using it. Assert a precondition.
6707 2020-06-08 Jakub Jelinek <jakub@redhat.com>
6710 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
6711 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
6712 type is vector boolean.
6714 2020-06-08 Tamar Christina <tamar.christina@arm.com>
6716 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
6718 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
6720 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
6721 instead of VFP_REGS.
6723 2020-06-08 Martin Liska <mliska@suse.cz>
6725 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
6726 in all vcond* patterns.
6728 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
6730 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
6731 Define. No longer include <algorithm>.
6733 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
6735 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
6736 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
6737 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
6738 (parityhi2, parityqi2): New expanders.
6739 (parityhi2_cmp): Implement set parity flag with xorb insn.
6740 (parityqi2_cmp): Implement set parity flag with testb insn.
6741 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
6743 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
6746 * config/rs6000/rs6000.c (rs6000_option_override_internal):
6747 Override flag_cunroll_grow_size.
6749 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
6751 * common.opt (flag_cunroll_grow_size): New flag.
6752 * toplev.c (process_options): Set flag_cunroll_grow_size.
6753 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
6754 Use flag_cunroll_grow_size.
6756 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
6759 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
6760 (ipa_odr_summary_write): Update streaming.
6761 (ipa_odr_read_section): Update streaming.
6763 2020-06-06 Alexandre Oliva <oliva@adacore.com>
6766 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
6768 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
6769 Julian Brown <julian@codesourcery.com>
6771 * gimplify.c (gimplify_adjust_omp_clauses): Remove
6772 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
6774 2020-06-05 Richard Biener <rguenther@suse.de>
6776 PR tree-optimization/95539
6777 * tree-vect-data-refs.c
6778 (vect_slp_analyze_and_verify_instance_alignment): Use
6779 SLP_TREE_REPRESENTATIVE for the data-ref check.
6780 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
6781 back to the first scalar stmt rather than the
6782 SLP_TREE_REPRESENTATIVE to match previous behavior.
6784 2020-06-05 Felix Yang <felix.yang@huawei.com>
6787 * expr.c (emit_move_insn): Check src and dest of the copy to see
6788 if one or both of them are subregs, try to remove the subregs when
6789 innermode and outermode are equal in size and the mode change involves
6790 an implicit round trip through memory.
6792 2020-06-05 Jakub Jelinek <jakub@redhat.com>
6795 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
6796 define_insn_and_split patterns.
6797 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
6798 define_insn patterns.
6800 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
6802 * alloc-pool.h (object_allocator::remove_raw): New.
6803 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
6804 (occurrence::occurrence): Add.
6805 (occurrence::~occurrence): Likewise.
6806 (occurrence::new): Likewise.
6807 (occurrence::delete): Likewise.
6809 (insert_bb): Use new occurence (...) instead of occ_new.
6810 (register_division_in): Likewise.
6811 (free_bb): Use delete occ instead of manually removing
6814 2020-06-05 Richard Biener <rguenther@suse.de>
6817 * cfgexpand.c (expand_debug_expr): Avoid calling
6818 set_mem_attributes_minus_bitpos when we were expanding
6820 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
6821 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
6822 special-cases we do not want MEM_EXPRs for. Assert
6823 we end up with reasonable MEM_EXPRs.
6825 2020-06-05 Lili Cui <lili.cui@intel.com>
6828 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
6830 2020-06-04 Martin Sebor <msebor@redhat.com>
6834 * attribs.c (init_attr_rdwr_indices): Move function here.
6835 * attribs.h (rdwr_access_hash, rdwr_map): Define.
6836 (attr_access): Add 'none'.
6837 (init_attr_rdwr_indices): Declared function.
6838 * builtins.c (warn_for_access)): New function.
6839 (check_access): Call it.
6840 * builtins.h (checK-access): Add an optional argument.
6841 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
6842 (init_attr_rdwr_indices): Declare extern.
6843 (append_attrname): Handle attr_access::none.
6844 (maybe_warn_rdwr_sizes): Same.
6845 (initialize_argument_information): Update comments.
6846 * doc/extend.texi (attribute access): Document 'none'.
6847 * tree-ssa-uninit.c (struct wlimits): New.
6848 (maybe_warn_operand): New function.
6849 (maybe_warn_pass_by_reference): Same.
6850 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
6851 Also call for function calls.
6852 (pass_late_warn_uninitialized::execute): Adjust comments.
6853 (execute_early_warn_uninitialized): Same.
6855 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
6858 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
6859 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
6860 reload if the original insn has it too.
6862 2020-06-04 Richard Biener <rguenther@suse.de>
6864 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
6865 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
6867 2020-06-04 Martin Jambor <mjambor@suse.cz>
6870 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
6871 exceptions check to...
6872 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
6874 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
6875 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
6878 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6881 * config/arm/predicates.md (mve_scatter_memory): Define to
6882 match (mem (reg)) for scatter store memory.
6883 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
6884 define_insn to define_expand.
6885 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
6886 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
6887 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
6888 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
6889 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
6890 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
6891 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
6892 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
6893 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
6894 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
6895 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
6896 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
6897 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
6898 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
6899 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
6900 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
6901 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
6902 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
6903 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
6904 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
6905 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
6907 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
6908 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
6909 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
6910 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
6911 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
6912 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
6913 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
6914 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
6915 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
6916 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
6917 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
6918 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
6919 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
6920 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
6921 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
6922 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
6923 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
6924 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
6925 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
6926 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
6928 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6930 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
6932 (__arm_vbicq_n_s16): Likewise.
6933 (__arm_vbicq_n_u32): Likewise.
6934 (__arm_vbicq_n_s32): Likewise.
6935 (__arm_vbicq): Modify polymorphic variant.
6937 2020-06-04 Richard Biener <rguenther@suse.de>
6939 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
6940 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
6941 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
6942 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
6943 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
6945 (vect_get_slp_defs): ... here.
6946 (vect_get_slp_vect_def): New function.
6948 2020-06-04 Richard Biener <rguenther@suse.de>
6950 * tree-vectorizer.h (_slp_tree::lanes): New.
6951 (SLP_TREE_LANES): Likewise.
6952 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
6953 (vectorizable_reduction): Likewise.
6954 (vect_transform_cycle_phi): Likewise.
6955 (vectorizable_induction): Likewise.
6956 (vectorizable_live_operation): Likewise.
6957 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
6958 (vect_create_new_slp_node): Likewise.
6959 (slp_copy_subtree): Copy it.
6960 (vect_optimize_slp): Use it.
6961 (vect_slp_analyze_node_operations_1): Likewise.
6962 (vect_slp_convert_to_external): Likewise.
6963 (vect_bb_vectorization_profitable_p): Likewise.
6964 * tree-vect-stmts.c (vectorizable_load): Likewise.
6965 (get_vectype_for_scalar_type): Likewise.
6967 2020-06-04 Richard Biener <rguenther@suse.de>
6969 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
6970 (vect_build_slp_tree_2): Simplify building all external op
6972 (vect_slp_analyze_node_operations): Remove push/pop of
6973 STMT_VINFO_DEF_TYPE.
6974 (vect_schedule_slp_instance): Likewise.
6975 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
6976 stmt_info, use the vect_is_simple_use overload combining
6977 SLP and stmt_info analysis.
6978 (vect_is_simple_cond): Likewise.
6979 (vectorizable_store): Adjust.
6980 (vectorizable_condition): Likewise.
6981 (vect_is_simple_use): Fully handle invariant SLP nodes
6982 here. Amend stmt_info operand extraction with COND_EXPR
6984 * tree-vect-loop.c (vectorizable_reduction): Deal with
6985 COND_EXPR representation ugliness.
6987 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
6990 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
6991 Refine from *vcvtps2ph_store<mask_name>.
6992 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
6993 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
6994 (*vcvtps2ph256<merge_mask_name>): New define_insn.
6995 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
6996 * config/i386/subst.md (merge_mask): New define_subst.
6997 (merge_mask_name): New define_subst_attr.
6998 (merge_mask_operand3): Ditto.
7000 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
7002 PR tree-optimization/89430
7004 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
7005 remove ssa_name_ver, store, offset fields.
7006 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
7007 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
7008 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
7011 2020-06-04 Andreas Schwab <schwab@suse.de>
7014 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
7016 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
7018 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
7019 (trunc<mode><pmov_dst_3_lower>2): Refine from
7020 trunc<mode><pmov_dst_3>2.
7022 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
7024 * match.pd (tanh/sinh -> 1/cosh): New simplification.
7026 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
7029 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
7030 is_lfs_stfs_insn and make it recognize lfs as well.
7031 (prefixed_store_p): Use is_lfs_stfs_insn().
7032 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
7034 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
7036 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
7038 (odr_enums): New static var.
7039 (struct odr_enum_val): New struct.
7040 (class odr_enum): New struct.
7041 (odr_enum_map): New hashtable.
7042 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
7043 (add_type_duplicate): Likewise.
7044 (free_odr_warning_data): Do not free TYPE_VALUES.
7045 (register_odr_enum): New function.
7046 (ipa_odr_summary_write): New function.
7047 (ipa_odr_read_section): New function.
7048 (ipa_odr_summary_read): New function.
7049 (class pass_ipa_odr): New pass.
7050 (make_pass_ipa_odr): New function.
7051 * ipa-utils.h (register_odr_enum): Declare.
7052 * lto-section-in.c: (lto_section_name): Add odr_types section.
7053 * lto-streamer.h (enum lto_section_type): Add odr_types section.
7054 * passes.def: Add odr_types pass.
7055 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
7057 (hash_tree): Likewise.
7058 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
7060 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
7062 * timevar.def (TV_IPA_ODR): New timervar.
7063 * tree-pass.h (make_pass_ipa_odr): Declare.
7064 * tree.c (free_lang_data_in_type): Regiser ODR types.
7066 2020-06-03 Romain Naour <romain.naour@gmail.com>
7068 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
7071 2020-06-03 Richard Biener <rguenther@suse.de>
7073 PR tree-optimization/95487
7074 * tree-vect-stmts.c (vectorizable_store): Use a truth type
7075 for the scatter mask.
7077 2020-06-03 Richard Biener <rguenther@suse.de>
7079 PR tree-optimization/95495
7080 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
7081 SLP_TREE_REPRESENTATIVE in the shift assertion.
7083 2020-06-03 Tom Tromey <tromey@adacore.com>
7085 * spellcheck.c (CASE_COST): New define.
7086 (BASE_COST): New define.
7087 (get_edit_distance): Recognize case changes.
7088 (get_edit_distance_cutoff): Update.
7089 (test_edit_distances): Update.
7090 (get_old_cutoff): Update.
7091 (test_find_closest_string): Add case sensitivity test.
7093 2020-06-03 Richard Biener <rguenther@suse.de>
7095 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
7096 the cost vector to unset the visited flag on stmts.
7098 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
7100 * gimplify.c (omp_notice_variable): Use new hook.
7101 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
7102 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
7103 (LANG_HOOKS_DECLS): Add it.
7104 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
7105 (lhd_omp_predetermined_mapping): New.
7106 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
7108 2020-06-03 Jan Hubicka <jh@suse.cz>
7110 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
7111 add LTO_first_tree_tag and LTO_first_gimple_tag.
7112 (lto_tag_is_tree_code_p): Update.
7113 (lto_tag_is_gimple_code_p): Update.
7114 (lto_gimple_code_to_tag): Update.
7115 (lto_tag_to_gimple_code): Update.
7116 (lto_tree_code_to_tag): Update.
7117 (lto_tag_to_tree_code): Update.
7119 2020-06-02 Felix Yang <felix.yang@huawei.com>
7122 * config/aarch64/aarch64.c (aarch64_short_vector_p):
7123 Leave later code to report an error if SVE is disabled.
7125 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7127 * config/aarch64/aarch64-cores.def (zeus): Define.
7128 * config/aarch64/aarch64-tune.md: Regenerate.
7129 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
7131 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
7134 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
7136 (is_stfs_insn): New helper function.
7138 2020-06-02 Jan Hubicka <jh@suse.cz>
7140 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
7142 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
7144 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
7146 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
7147 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
7148 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
7150 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
7153 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
7154 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
7156 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7158 * config/s390/s390.c (print_operand): Emit vector alignment
7161 2020-06-02 Martin Liska <mliska@suse.cz>
7163 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
7164 as they have variable number of counters.
7165 * gcov-dump.c (main): Add new option -r.
7166 (print_usage): Likewise.
7167 (tag_counters): All new raw format.
7168 * gcov-io.h (struct gcov_kvp): New.
7169 (GCOV_TOPN_VALUES): Remove.
7170 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
7171 (GCOV_TOPN_MEM_COUNTERS): New.
7172 (GCOV_TOPN_DISK_COUNTERS): Likewise.
7173 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
7174 * ipa-profile.c (ipa_profile_generate_summary): Use
7175 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
7176 (ipa_profile_write_edge_summary): Likewise.
7177 (ipa_profile_read_edge_summary): Likewise.
7178 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
7179 * profile.c (sort_hist_values): Sort variable number
7181 (compute_value_histograms): Special case for TOP N counters
7182 that have dynamic number of key-value pairs.
7183 * value-prof.c (dump_histogram_value): Dump variable number
7185 (stream_in_histogram_value): Stream in variable number
7186 of key-value pairs for TOP N counter.
7187 (get_nth_most_common_value): Deal with variable number
7189 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
7191 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
7193 * doc/gcov-dump.texi: Document new -r option.
7195 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
7198 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
7200 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
7202 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
7203 returns (const_int 0) for the destination, then emit nothing.
7205 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
7207 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
7208 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
7209 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
7210 LTO_const_decl_ref, LTO_imported_decl_ref,
7211 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
7212 LTO_namelist_decl_ref; add LTO_global_stream_ref.
7213 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
7214 (lto_input_scc): Update.
7215 (lto_input_tree_1): Update.
7216 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
7217 * lto-streamer.c (lto_tag_name): Update.
7219 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
7221 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
7222 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
7223 * lto-cgraph.c (lto_output_node): Likewise.
7224 (lto_output_varpool_node): Likewise.
7225 (output_offload_tables): Likewise.
7226 (input_node): Likewise.
7227 (input_varpool_node): Likewise.
7228 (input_offload_tables): Likewise.
7229 * lto-streamer-in.c (lto_input_tree_ref): Declare.
7230 (lto_input_var_decl_ref): Declare.
7231 (lto_input_fn_decl_ref): Declare.
7232 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
7233 (lto_output_var_decl_index): Rename to ..
7234 (lto_output_var_decl_ref): ... this.
7235 (lto_output_fn_decl_index): Rename to ...
7236 (lto_output_fn_decl_ref): ... this.
7237 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
7238 (DEFINE_DECL_STREAM_FUNCS): Remove.
7239 (lto_output_var_decl_index): Remove.
7240 (lto_output_fn_decl_index): Remove.
7241 (lto_output_var_decl_ref): Declare.
7242 (lto_output_fn_decl_ref): Declare.
7243 (lto_input_var_decl_ref): Declare.
7244 (lto_input_fn_decl_ref): Declare.
7246 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
7248 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
7249 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
7250 dump infomation if there is no adjusted parameter.
7251 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
7253 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
7255 * Makefile.in (gimple-array-bounds.o): New.
7256 * tree-vrp.c: Move array bounds code...
7257 * gimple-array-bounds.cc: ...here...
7258 * gimple-array-bounds.h: ...and here.
7260 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
7262 * Makefile.in (OBJS): Add value-range-equiv.o.
7263 * tree-vrp.c (*value_range_equiv*): Move to...
7264 * value-range-equiv.cc: ...here.
7265 * tree-vrp.h (class value_range_equiv): Move to...
7266 * value-range-equiv.h: ...here.
7267 * vr-values.h: Include value-range-equiv.h.
7269 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
7272 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
7273 lattice for simple pass-through by-ref argument.
7275 2020-05-31 Jeff Law <law@redhat.com>
7277 * lra.c (add_auto_inc_notes): Remove function.
7278 * reload1.c (add_auto_inc_notes): Similarly. Move into...
7279 * rtlanal.c (add_auto_inc_notes): New function.
7280 * rtl.h (add_auto_inc_notes): Add prototype.
7281 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
7284 2020-05-31 Jan Hubicka <jh@suse.cz>
7286 * lto-section-out.c (lto_output_decl_index): Remove.
7287 (lto_output_field_decl_index): Move to lto-streamer-out.c
7288 (lto_output_fn_decl_index): Move to lto-streamer-out.c
7289 (lto_output_namespace_decl_index): Remove.
7290 (lto_output_var_decl_index): Remove.
7291 (lto_output_type_decl_index): Remove.
7292 (lto_output_type_ref_index): Remove.
7293 * lto-streamer-out.c (output_type_ref): Remove.
7294 (lto_get_index): New function.
7295 (lto_output_tree_ref): Remove.
7296 (lto_indexable_tree_ref): New function.
7297 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
7298 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
7299 (stream_write_tree_ref): Update.
7300 (lto_output_tree): Update.
7301 * lto-streamer.h (lto_output_decl_index): Remove prototype.
7302 (lto_output_field_decl_index): Remove prototype.
7303 (lto_output_namespace_decl_index): Remove prototype.
7304 (lto_output_type_decl_index): Remove prototype.
7305 (lto_output_type_ref_index): Remove prototype.
7306 (lto_output_var_decl_index): Move.
7307 (lto_output_fn_decl_index): Move
7309 2020-05-31 Jakub Jelinek <jakub@redhat.com>
7312 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
7315 2020-05-31 Jeff Law <law@redhat.com>
7317 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
7319 2020-05-31 Jim Wilson <jimw@sifive.com>
7321 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
7323 2020-05-30 Jonathan Yong <10walls@gmail.com>
7325 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
7326 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
7327 import library, but also contains some functions that invoke
7328 others in KERNEL32.DLL.
7330 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
7332 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
7333 (altivec_vmrglw_direct): Ditto.
7334 (altivec_vperm_<mode>_direct): Ditto.
7335 (altivec_vperm_v8hiv16qi): Ditto.
7336 (*altivec_vperm_<mode>_uns_internal): Ditto.
7337 (*altivec_vpermr_<mode>_internal): Ditto.
7338 (vperm_v8hiv4si): Ditto.
7339 (vperm_v16qiv8hi): Ditto.
7341 2020-05-29 Jan Hubicka <jh@suse.cz>
7343 * lto-streamer-in.c (streamer_read_chain): Move here from
7345 (stream_read_tree_ref): New.
7346 (lto_input_tree_1): Simplify.
7347 * lto-streamer-out.c (stream_write_tree_ref): New.
7348 (lto_write_tree_1): Simplify.
7349 (lto_output_tree_1): Simplify.
7350 (DFS::DFS_write_tree): Simplify.
7351 (streamer_write_chain): Move here from tree-stremaer-out.c.
7352 * lto-streamer.h (lto_output_tree_ref): Update prototype.
7353 (stream_read_tree_ref): Declare
7354 (stream_write_tree_ref): Declare
7355 * tree-streamer-in.c (streamer_read_chain): Update to use
7356 stream_read_tree_ref.
7357 (lto_input_ts_common_tree_pointers): Likewise.
7358 (lto_input_ts_vector_tree_pointers): Likewise.
7359 (lto_input_ts_poly_tree_pointers): Likewise.
7360 (lto_input_ts_complex_tree_pointers): Likewise.
7361 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
7362 (lto_input_ts_decl_common_tree_pointers): Likewise.
7363 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
7364 (lto_input_ts_field_decl_tree_pointers): Likewise.
7365 (lto_input_ts_function_decl_tree_pointers): Likewise.
7366 (lto_input_ts_type_common_tree_pointers): Likewise.
7367 (lto_input_ts_type_non_common_tree_pointers): Likewise.
7368 (lto_input_ts_list_tree_pointers): Likewise.
7369 (lto_input_ts_vec_tree_pointers): Likewise.
7370 (lto_input_ts_exp_tree_pointers): Likewise.
7371 (lto_input_ts_block_tree_pointers): Likewise.
7372 (lto_input_ts_binfo_tree_pointers): Likewise.
7373 (lto_input_ts_constructor_tree_pointers): Likewise.
7374 (lto_input_ts_omp_clause_tree_pointers): Likewise.
7375 * tree-streamer-out.c (streamer_write_chain): Update to use
7376 stream_write_tree_ref.
7377 (write_ts_common_tree_pointers): Likewise.
7378 (write_ts_vector_tree_pointers): Likewise.
7379 (write_ts_poly_tree_pointers): Likewise.
7380 (write_ts_complex_tree_pointers): Likewise.
7381 (write_ts_decl_minimal_tree_pointers): Likewise.
7382 (write_ts_decl_common_tree_pointers): Likewise.
7383 (write_ts_decl_non_common_tree_pointers): Likewise.
7384 (write_ts_decl_with_vis_tree_pointers): Likewise.
7385 (write_ts_field_decl_tree_pointers): Likewise.
7386 (write_ts_function_decl_tree_pointers): Likewise.
7387 (write_ts_type_common_tree_pointers): Likewise.
7388 (write_ts_type_non_common_tree_pointers): Likewise.
7389 (write_ts_list_tree_pointers): Likewise.
7390 (write_ts_vec_tree_pointers): Likewise.
7391 (write_ts_exp_tree_pointers): Likewise.
7392 (write_ts_block_tree_pointers): Likewise.
7393 (write_ts_binfo_tree_pointers): Likewise.
7394 (write_ts_constructor_tree_pointers): Likewise.
7395 (write_ts_omp_clause_tree_pointers): Likewise.
7396 (streamer_write_tree_body): Likewise.
7397 (streamer_write_integer_cst): Likewise.
7398 * tree-streamer.h (streamer_read_chain):Declare.
7399 (streamer_write_chain):Declare.
7400 (streamer_write_tree_body): Update prototype.
7401 (streamer_write_integer_cst): Update prototype.
7403 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
7406 * configure: Regenerated.
7408 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
7410 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
7411 (add<mode>3_vcc_zext_dup_exec): Likewise.
7412 (add<mode>3_vcc_zext_dup2): Likewise.
7413 (add<mode>3_vcc_zext_dup2_exec): Likewise.
7415 2020-05-29 Richard Biener <rguenther@suse.de>
7417 PR tree-optimization/95272
7418 * tree-vectorizer.h (_slp_tree::representative): Add.
7419 (SLP_TREE_REPRESENTATIVE): Likewise.
7420 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
7422 (vectorizable_live_operation): Use the representative to
7423 attach the reduction info to.
7424 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
7425 SLP_TREE_REPRESENTATIVE.
7426 (vect_create_new_slp_node): Likewise.
7427 (slp_copy_subtree): Copy it.
7428 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
7429 (vect_slp_analyze_node_operations_1): Pass the representative
7430 to vect_analyze_stmt.
7431 (vect_schedule_slp_instance): Pass the representative to
7432 vect_transform_stmt.
7434 2020-05-29 Richard Biener <rguenther@suse.de>
7436 PR tree-optimization/95356
7437 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
7438 node hacking during analysis.
7440 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
7443 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
7445 2020-05-29 Richard Biener <rguenther@suse.de>
7447 PR tree-optimization/95403
7448 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
7451 2020-05-29 Jakub Jelinek <jakub@redhat.com>
7454 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
7455 declare variant cgraph node removal callback.
7457 2020-05-29 Jakub Jelinek <jakub@redhat.com>
7460 * expr.c (store_expr): If expr_size is constant and significantly
7461 larger than TREE_STRING_LENGTH, set temp to just the
7462 TREE_STRING_LENGTH portion of the STRING_CST.
7464 2020-05-29 Richard Biener <rguenther@suse.de>
7466 PR tree-optimization/95393
7467 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
7468 to build the min/max expression so we simplify cases like
7469 MAX(0, s) immediately.
7471 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
7473 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
7474 for unpacked EOR, ORR, AND.
7476 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
7478 * Makefile.in: don't look for libiberty in the "pic" subdirectory
7479 when building for Mingw. Add dependency on xgcc with the proper
7482 2020-05-28 Jeff Law <law@redhat.com>
7484 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
7486 2020-05-28 Jeff Law <law@redhat.com>
7488 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
7489 make a nonzero adjustment to the memory offset.
7490 (b<ior,xor>hi_msx): Turn into a splitter.
7492 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
7494 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
7495 Fix off-by-one error.
7497 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
7499 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
7500 wb_candidate1 and wb_candidate2.
7501 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
7502 wb_candidate1 and wb_candidate2 if we decided not to use them.
7504 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
7507 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
7508 we have at least some CFI operations when using a frame pointer.
7509 Only redefine the CFA if we have CFI operations.
7511 2020-05-28 Richard Biener <rguenther@suse.de>
7513 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
7514 case for !SLP_TREE_VECTYPE.
7515 (vect_slp_analyze_node_operations): Adjust.
7517 2020-05-28 Richard Biener <rguenther@suse.de>
7519 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
7520 (SLP_TREE_VEC_DEFS): Likewise.
7521 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
7522 (_slp_tree::~_slp_tree): Likewise.
7523 (vect_mask_constant_operand_p): Remove unused function.
7524 (vect_get_constant_vectors): Rename to...
7525 (vect_create_constant_vectors): ... this. Take the
7526 invariant node as argument and code generate it. Remove
7527 dead code, remove temporary asserts. Pass a NULL stmt_info
7528 to vect_init_vector.
7529 (vect_get_slp_defs): Simplify.
7530 (vect_schedule_slp_instance): Code-generate externals and
7531 invariants using vect_create_constant_vectors.
7533 2020-05-28 Richard Biener <rguenther@suse.de>
7535 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
7536 Conditionalize stmt_info use, assert the new stmt cannot throw
7538 (vect_finish_stmt_generation): Adjust assert.
7540 2020-05-28 Richard Biener <rguenther@suse.de>
7542 PR tree-optimization/95273
7543 PR tree-optimization/95356
7544 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
7545 what we set the vector type of the shift operand SLP node
7548 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
7550 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
7553 2020-05-28 Martin Liska <mliska@suse.cz>
7556 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
7557 rename ipcp-unit-growth to ipa-cp-unit-growth.
7559 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
7561 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
7562 from *avx512vl_<code>v2div2qi_store and refine memory size of
7564 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
7565 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
7566 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
7567 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
7568 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
7569 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
7570 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
7571 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
7572 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
7573 (*avx512vl_<code>v2div2si2_store_1): Ditto.
7574 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
7575 (*avx512f_<code>v8div16qi2_store_1): Ditto.
7576 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
7577 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
7578 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
7579 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
7580 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
7581 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
7582 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
7583 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
7584 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
7585 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
7586 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
7587 (*avx512vl_<code>v2div2si2_store_2): Ditto.
7588 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
7589 (*avx512f_<code>v8div16qi2_store_2): Ditto.
7590 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
7591 * config/i386/i386-builtin-types.def: Adjust builtin type.
7592 * config/i386/i386-expand.c: Ditto.
7593 * config/i386/i386-builtin.def: Adjust builtin.
7594 * config/i386/avx512fintrin.h: Ditto.
7595 * config/i386/avx512vlbwintrin.h: Ditto.
7596 * config/i386/avx512vlintrin.h: Ditto.
7598 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
7600 PR gcov-profile/95332
7601 * gcov-io.c (gcov_var::endian): Move field.
7602 (from_file): Add IN_GCOV_TOOL check.
7603 * gcov-io.h (gcov_magic): Ditto.
7605 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
7607 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
7609 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
7611 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
7613 * builtin-types.def (BT_UINT128): New primitive type.
7614 (BT_FN_UINT128_UINT128): New function type.
7615 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
7616 * doc/extend.texi (__builtin_bswap128): Document it.
7617 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
7618 (is_inexpensive_builtin): Likewise.
7619 * fold-const-call.c (fold_const_call_ss): Likewise.
7620 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
7621 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
7622 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
7623 (vectorizable_call): Likewise.
7624 * optabs.c (expand_unop): Always use the double word path for it.
7625 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
7626 * tree.h (uint128_type_node): New global type.
7627 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
7629 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7631 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
7632 (mmx_hsubv2sf3): Ditto.
7633 (mmx_haddsubv2sf3): New expander.
7634 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
7635 RTL template to model horizontal subtraction and addition.
7636 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
7639 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7642 * config/i386/sse.md
7643 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
7644 Remove %q operand modifier from insn template.
7645 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
7647 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7649 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
7650 Enable insn pattern for TARGET_MMX_WITH_SSE.
7651 (*mmx_movshdup): New insn pattern.
7652 (*mmx_movsldup): Ditto.
7653 (*mmx_movss): Ditto.
7654 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
7656 (expand_vec_perm_movs): Handle E_V2SFmode.
7657 (expand_vec_perm_even_odd): Ditto.
7658 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
7659 is already handled by standard shuffle patterns.
7661 2020-05-27 Richard Biener <rguenther@suse.de>
7663 PR tree-optimization/95295
7664 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
7665 merging stores from paths.
7667 2020-05-27 Richard Biener <rguenther@suse.de>
7669 PR tree-optimization/95356
7670 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
7671 type for the shift operand.
7673 2020-05-27 Richard Biener <rguenther@suse.de>
7675 PR tree-optimization/95335
7676 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
7677 lvisited for nodes made external.
7679 2020-05-27 Richard Biener <rguenther@suse.de>
7681 * dump-context.h (debug_dump_context): New class.
7682 (dump_context): Make it friend.
7683 * dumpfile.c (debug_dump_context::debug_dump_context):
7685 (debug_dump_context::~debug_dump_context): Likewise.
7686 * tree-vect-slp.c: Include dump-context.h.
7687 (vect_print_slp_tree): Dump a single SLP node.
7688 (debug): New overload for slp_tree.
7689 (vect_print_slp_graph): Rename from vect_print_slp_tree and
7691 (vect_analyze_slp_instance): Adjust.
7693 2020-05-27 Jakub Jelinek <jakub@redhat.com>
7696 * omp-general.c (omp_declare_variant_remove_hook): New function.
7697 (omp_resolve_declare_variant): Always return base if it is already
7698 declare_variant_alt magic decl itself. Register
7699 omp_declare_variant_remove_hook as cgraph node removal hook.
7701 2020-05-27 Jeff Law <law@redhat.com>
7703 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
7704 for the primary input operand.
7705 (tstsi_variable_bit_qi): Similarly.
7707 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
7709 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
7711 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
7714 * ipa-utils.h (odr_type_p): Also permit calls with
7715 only flag_generate_offload set.
7717 2020-05-26 Alexandre Oliva <oliva@adacore.com>
7719 * gcc.c (validate_switches): Add braced parameter. Adjust all
7720 callers. Expected and skip trailing brace only if braced.
7721 Return after handling one atom otherwise.
7722 (DUMPS_OPTIONS): New.
7723 (cpp_debug_options): Define in terms of it.
7725 2020-05-26 Richard Biener <rguenther@suse.de>
7727 PR tree-optimization/95327
7728 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
7729 when we are not using a scalar shift.
7731 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
7733 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
7734 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
7735 Handle E_V2SImode and E_V4HImode.
7736 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
7737 Assert that E_V2SImode is already handled.
7738 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
7739 is already handled by standard shuffle patterns.
7741 2020-05-26 Jan Hubicka <jh@suse.cz>
7743 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
7746 2020-05-26 Jakub Jelinek <jakub@redhat.com>
7749 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
7750 * omp-general.h (find_combined_omp_for): Declare.
7751 * omp-general.c: Include tree-iterator.h.
7752 (find_combined_omp_for): New function, moved from gimplify.c.
7754 2020-05-26 Alexandre Oliva <oliva@adacore.com>
7756 * common.opt (aux_base_name): Define.
7757 (dumpbase, dumpdir): Mark as Driver options.
7758 (-dumpbase, -dumpdir): Likewise.
7759 (dumpbase-ext, -dumpbase-ext): New.
7760 (auxbase, auxbase-strip): Drop.
7761 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
7763 (-o): Introduce the notion of primary output, mention it
7764 influences auxiliary and dump output names as well, add
7766 (-save-temps): Adjust, move examples into -dump*.
7767 (-save-temps=cwd, -save-temps=obj): Likewise.
7768 (-fdump-final-insns): Adjust.
7769 * dwarf2out.c (gen_producer_string): Drop auxbase and
7770 auxbase_strip; add dumpbase_ext.
7771 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
7772 (save_temps_prefix, save_temps_length): Drop.
7773 (save_temps_overrides_dumpdir): New.
7774 (dumpdir, dumpbase, dumpbase_ext): New.
7775 (dumpdir_length, dumpdir_trailing_dash_added): New.
7776 (outbase, outbase_length): New.
7777 (The Specs Language): Introduce %". Adjust %b and %B.
7778 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
7779 Precede object file with %w when it's the primary output.
7780 (cpp_debug_options): Do not pass on incoming -dumpdir,
7781 -dumpbase and -dumpbase-ext options; recompute them with
7783 (cc1_options): Drop auxbase with and without compare-debug;
7784 use cpp_debug_options instead of dumpbase. Mark asm output
7785 with %w when it's the primary output.
7786 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
7787 %:replace-exception. Add %:dumps.
7788 (driver_handle_option): Implement -save-temps=*/-dumpdir
7789 mutual overriding logic. Save dumpdir, dumpbase and
7790 dumpbase-ext options. Do not save output_file in
7792 (adds_single_suffix_p): New.
7793 (single_input_file_index): New.
7794 (process_command): Combine output dir, output base name, and
7795 dumpbase into dumpdir and outbase.
7796 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
7797 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
7798 and outbase instead of input_basename in %b, %B and in
7799 -save-temps aux files. Handle empty argument %".
7800 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
7801 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
7802 naming. Spec-quote the computed -fdump-final-insns file name.
7803 (debug_auxbase_opt): Drop.
7804 (compare_debug_self_opt_spec_function): Drop auxbase-strip
7806 (compare_debug_auxbase_opt_spec_function): Drop.
7807 (not_actual_file_p): New.
7808 (replace_extension_spec_func): Drop.
7809 (dumps_spec_func): New.
7810 (convert_white_space): Split-out parts into...
7811 (quote_string, whitespace_to_convert_p): ... these. New.
7812 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
7813 (driver::finalize): Release and reset new variables; drop
7815 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
7816 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
7817 empty string otherwise.
7818 (DUMPBASE_SUFFIX): Drop leading period.
7819 (debug_objcopy): Use concat.
7820 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
7821 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
7822 component. Simplify temp file names.
7823 * opts.c (finish_options): Drop aux base name handling.
7824 (common_handle_option): Drop auxbase-strip handling.
7825 * toplev.c (print_switch_values): Drop auxbase, add
7827 (process_options): Derive aux_base_name from dump_base_name
7829 (lang_dependent_init): Compute dump_base_ext along with
7830 dump_base_name. Disable stack usage and callgraph-info during
7831 lto generation and compare-debug recompilation.
7833 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
7834 Uroš Bizjak <ubizjak@gmail.com>
7838 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
7839 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
7840 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
7841 float<floatunssuffix>v2div2sf2.
7842 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
7843 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
7844 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
7845 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7846 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
7847 * config/i386/i386-builtin.def: Ditto.
7848 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
7849 subregs when both omode and imode are vector mode and
7850 have the same inner mode.
7852 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
7854 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
7855 Only turn MEM_REFs into bit-field stores for small bit-field regions.
7856 (imm_store_chain_info::output_merged_store): Be prepared for sources
7857 with non-integral type in the bit-field insertion case.
7858 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
7859 the largest size for the bit-field case.
7861 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
7863 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
7864 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
7865 (*vec_dupv4hi): Redefine as define_insn.
7866 Remove alternative with general register input.
7867 (*vec_dupv2si): Ditto.
7869 2020-05-25 Richard Biener <rguenther@suse.de>
7871 PR tree-optimization/95309
7872 * tree-vect-slp.c (vect_get_constant_vectors): Move number
7873 of vector computation ...
7874 (vect_slp_analyze_node_operations): ... to analysis phase.
7876 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
7878 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
7879 * lto-streamer.h (streamer_debugging): New constant
7880 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
7881 streamer_debugging check.
7882 (streamer_get_pickled_tree): Likewise.
7883 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
7885 2020-05-25 Richard Biener <rguenther@suse.de>
7887 PR tree-optimization/95308
7888 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
7889 test for TARGET_MEM_REFs.
7891 2020-05-25 Richard Biener <rguenther@suse.de>
7893 PR tree-optimization/95295
7894 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
7895 RHSes and drop to full sm_other if they are not equal.
7897 2020-05-25 Richard Biener <rguenther@suse.de>
7899 PR tree-optimization/95271
7900 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
7901 children vector type.
7902 (vectorizable_call): Pass down slp ops.
7904 2020-05-25 Richard Biener <rguenther@suse.de>
7906 PR tree-optimization/95297
7907 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
7908 skip updating operand 1 vector type.
7910 2020-05-25 Richard Biener <rguenther@suse.de>
7912 PR tree-optimization/95284
7913 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
7916 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
7919 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
7920 (trunc<mode><sf2dfmode_lower>2) New expander.
7921 (extend<sf2dfmode_lower><mode>2): Ditto.
7923 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
7925 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
7926 ubsan_{data,type},ASAN symbols linker-visible.
7928 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7930 * lto-streamer-out.c (DFS::DFS): Silence warning.
7932 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
7935 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
7936 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
7938 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7940 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
7943 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7945 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
7946 * lto-streamer-out.c (create_output_block): Fix whitespace
7947 (lto_write_tree_1): Add (debug) dump.
7948 (DFS::DFS): Add dump.
7949 (DFS::DFS_write_tree_body): Do not dump here.
7950 (lto_output_tree): Improve dumping; do not stream ref when not needed.
7951 (produce_asm_for_decls): Fix whitespace.
7952 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
7953 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
7955 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
7958 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
7959 (truncv32hiv32qi2): Ditto.
7960 (trunc<ssedoublemodelower><mode>2): Ditto.
7961 (trunc<mode><pmov_dst_3>2): Ditto.
7962 (trunc<mode><pmov_dst_mode_4>2): Ditto.
7963 (truncv2div2si2): Ditto.
7964 (truncv8div8qi2): Ditto.
7965 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
7966 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
7967 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
7968 *avx512vl_<code><mode>v<ssescalarnum>qi2.
7970 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
7973 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
7976 2020-05-22 Richard Biener <rguenther@suse.de>
7978 PR tree-optimization/95268
7979 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
7982 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7984 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
7987 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7989 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
7990 (lto_input_scc): Optimize streaming of entry lengths.
7991 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
7992 (DFS::DFS): Optimize stremaing of entry lengths
7994 2020-05-22 Richard Biener <rguenther@suse.de>
7997 * doc/invoke.texi (flto): Document behavior of diagnostic
8000 2020-05-22 Richard Biener <rguenther@suse.de>
8002 * tree-vectorizer.h (vect_is_simple_use): New overload.
8003 (vect_maybe_update_slp_op_vectype): New.
8004 * tree-vect-stmts.c (vect_is_simple_use): New overload
8005 accessing operands of SLP vs. non-SLP operation transparently.
8006 (vect_maybe_update_slp_op_vectype): New function updating
8007 the possibly shared SLP operands vector type.
8008 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
8009 using the new vect_is_simple_use overload; update SLP invariant
8010 operand nodes vector type.
8011 (vectorizable_comparison): Likewise.
8012 (vectorizable_call): Likewise.
8013 (vectorizable_conversion): Likewise.
8014 (vectorizable_shift): Likewise.
8015 (vectorizable_store): Likewise.
8016 (vectorizable_condition): Likewise.
8017 (vectorizable_assignment): Likewise.
8018 * tree-vect-loop.c (vectorizable_reduction): Likewise.
8019 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
8020 present SLP_TREE_VECTYPE and check it matches previous
8023 2020-05-22 Richard Biener <rguenther@suse.de>
8025 PR tree-optimization/95248
8026 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
8028 2020-05-22 Richard Biener <rguenther@suse.de>
8030 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
8031 (_slp_tree::~_slp_tree): Likewise.
8032 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
8034 (_slp_tree::~_slp_tree): Implement.
8035 (vect_free_slp_tree): Simplify.
8036 (vect_create_new_slp_node): Likewise. Add nops parameter.
8037 (vect_build_slp_tree_2): Adjust.
8038 (vect_analyze_slp_instance): Likewise.
8040 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8042 * adjust-alignment.c: Include memmodel.h.
8044 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
8047 * config/i386/cpuid.h: Use hexadecimal in comments.
8049 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
8052 * config/i386/i386-builtins.c (processor_features): Move
8053 F_AVX512VP2INTERSECT after F_AVX512BF16.
8054 (isa_names_table): Likewise.
8056 2020-05-21 Martin Liska <mliska@suse.cz>
8058 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
8059 Handle OPT_moutline_atomics.
8060 * config/aarch64/aarch64.c: Add outline-atomics to
8062 * doc/extend.texi: Document the newly added target attribute.
8064 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
8068 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
8069 operands 1 and 2 commutative. Manually swap operands.
8070 (*mmx_nabsv2sf2): Ditto.
8073 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8075 * config/i386/i386.md (*<code>tf2_1):
8076 Mark operands 1 and 2 commutative.
8077 (*nabstf2_1): Ditto.
8078 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
8079 commutative. Do not swap operands.
8080 (*nabs<mode>2): Ditto.
8082 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
8085 * config/i386/sse.md (<code>v8qiv8hi2): Use
8086 simplify_gen_subreg instead of simplify_subreg.
8087 (<code>v8qiv8si2): Ditto.
8088 (<code>v4qiv4si2): Ditto.
8089 (<code>v4hiv4si2): Ditto.
8090 (<code>v8qiv8di2): Ditto.
8091 (<code>v4qiv4di2): Ditto.
8092 (<code>v2qiv2di2): Ditto.
8093 (<code>v4hiv4di2): Ditto.
8094 (<code>v2hiv2di2): Ditto.
8095 (<code>v2siv2di2): Ditto.
8097 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
8100 * config/i386/i386.md (*pushsi2_rex64):
8101 Use "e" constraint instead of "i".
8103 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
8105 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
8106 (lto_input_tree_1): Strenghten sanity check.
8107 (lto_input_tree): Update call of lto_input_scc.
8108 * lto-streamer-out.c: Include ipa-utils.h
8109 (create_output_block): Initialize local_trees if merigng is going
8111 (destroy_output_block): Destroy local_trees.
8112 (DFS): Add max_local_entry.
8113 (local_tree_p): New function.
8114 (DFS::DFS): Initialize and maintain it.
8115 (DFS::DFS_write_tree): Decide on streaming format.
8116 (lto_output_tree): Stream inline singleton SCCs
8117 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
8118 (struct output_block): Add local_trees.
8119 (lto_input_scc): Update prototype.
8121 2020-05-20 Patrick Palka <ppalka@redhat.com>
8124 * hash-table.h (hash_table::find_with_hash): Move up the call to
8127 2020-05-20 Martin Liska <mliska@suse.cz>
8129 * lto-compress.c (lto_compression_zstd): Fill up
8130 num_compressed_il_bytes.
8131 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
8133 2020-05-20 Richard Biener <rguenther@suse.de>
8135 PR tree-optimization/95219
8136 * tree-vect-loop.c (vectorizable_induction): Reduce
8137 group_size before computing the number of required IVs.
8139 2020-05-20 Richard Biener <rguenther@suse.de>
8142 * tree-inline.c (remap_gimple_stmt): Revert adjusting
8143 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
8145 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8146 Andre Vieira <andre.simoesdiasvieira@arm.com>
8149 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
8151 (mve_vector_mem_operand): Likewise.
8152 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
8153 the load from memory to a core register is legitimate for give mode.
8154 (mve_vector_mem_operand): Define function.
8155 (arm_print_operand): Modify comment.
8156 (arm_mode_base_reg_class): Define.
8157 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
8158 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
8159 * config/arm/constraints.md (Ux): Likewise.
8161 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
8162 add support for missing Vector Store Register and Vector Load Register.
8163 Add a new alternative to support load from memory to PC (or label) in
8165 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
8166 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
8167 mve_memory_operand and also modify the MVE instructions to emit.
8168 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
8169 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
8170 mve_memory_operand and also modify the MVE instructions to emit.
8171 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
8172 mve_memory_operand and also modify the MVE instructions to emit.
8173 (mve_vldrhq_z_fv8hf): Likewise.
8174 (mve_vldrhq_z_<supf><mode>): Likewise.
8175 (mve_vldrwq_fv4sf): Likewise.
8176 (mve_vldrwq_<supf>v4si): Likewise.
8177 (mve_vldrwq_z_fv4sf): Likewise.
8178 (mve_vldrwq_z_<supf>v4si): Likewise.
8179 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
8180 (mve_vld1q_<supf><mode>): Likewise.
8181 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
8183 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
8184 mve_memory_operand and also modify the MVE instructions to emit.
8185 (mve_vstrhq_p_<supf><mode>): Likewise.
8186 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
8188 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
8189 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
8190 instructions to emit.
8191 (mve_vstrwq_p_<supf>v4si): Likewise.
8192 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
8193 * config/arm/predicates.md (mve_memory_operand): Define.
8195 2020-05-30 Richard Biener <rguenther@suse.de>
8198 * c-fold.c (c_fully_fold_internal): Enhance guard on
8201 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
8204 * Makefile.in (OBJS): Add adjust-alignment.o.
8205 * adjust-alignment.c (pass_data_adjust_alignment): New.
8206 (pass_adjust_alignment): New.
8207 (pass_adjust_alignment::execute): New.
8208 (make_pass_adjust_alignment): New.
8209 * tree-pass.h (make_pass_adjust_alignment): New.
8210 * passes.def: Add pass_adjust_alignment.
8212 2020-05-19 Alex Coplan <alex.coplan@arm.com>
8215 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
8216 identity permutation.
8218 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8220 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
8221 msp430_small, msp430_large and size24plus DejaGNU effective
8223 Improve grammar in descriptions for size20plus and size32plus effective
8226 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
8228 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
8229 callee saved registers only in xBPF.
8230 (bpf_expand_prologue): Save callee saved registers only in xBPF.
8231 (bpf_expand_epilogue): Likewise for restoring.
8232 * doc/invoke.texi (eBPF Options): Document this is activated by
8235 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
8237 * config/bpf/bpf.opt (mxbpf): New option.
8238 * doc/invoke.texi (Option Summary): Add -mxbpf.
8239 (eBPF Options): Document -mxbbpf.
8241 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
8244 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
8245 (<code>v32qiv32hi2): Ditto.
8246 (<code>v8qiv8hi2): Ditto.
8247 (<code>v16qiv16si2): Ditto.
8248 (<code>v8qiv8si2): Ditto.
8249 (<code>v4qiv4si2): Ditto.
8250 (<code>v16hiv16si2): Ditto.
8251 (<code>v8hiv8si2): Ditto.
8252 (<code>v4hiv4si2): Ditto.
8253 (<code>v8qiv8di2): Ditto.
8254 (<code>v4qiv4di2): Ditto.
8255 (<code>v2qiv2di2): Ditto.
8256 (<code>v8hiv8di2): Ditto.
8257 (<code>v4hiv4di2): Ditto.
8258 (<code>v2hiv2di2): Ditto.
8259 (<code>v8siv8di2): Ditto.
8260 (<code>v4siv4di2): Ditto.
8261 (<code>v2siv2di2): Ditto.
8263 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
8265 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
8266 (riscv_implied_info): New.
8267 (riscv_subset_list): Add handle_implied_ext.
8268 (riscv_subset_list::to_string): New parameter version_p to
8269 control output format.
8270 (riscv_subset_list::handle_implied_ext): New.
8271 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
8272 (riscv_arch_str): New parameter version_p to control output format.
8273 (riscv_expand_arch): New.
8274 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
8276 * config/riscv/riscv.h (riscv_expand_arch): New,
8277 (EXTRA_SPEC_FUNCTIONS): Define.
8278 (ASM_SPEC): Transform -march= via riscv_expand_arch.
8280 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
8282 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
8283 parse_multiletter_ext.
8284 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
8285 adjust parsing order for 's' and 'x'.
8287 2020-05-19 Richard Biener <rguenther@suse.de>
8289 * tree-vectorizer.h (_slp_tree::vectype): Add field.
8290 (SLP_TREE_VECTYPE): New.
8291 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
8293 (vect_create_new_slp_node): Likewise.
8294 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
8296 (vect_slp_analyze_node_operations): Walk nodes children for
8298 (vect_get_constant_vectors): Use local scope op variable.
8299 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
8300 (vect_model_simple_cost): Adjust.
8301 (vect_model_store_cost): Likewise.
8302 (vectorizable_store): Likewise.
8304 2020-05-18 Martin Sebor <msebor@redhat.com>
8307 * tree-object-size.c (decl_init_size): New function.
8308 (addr_object_size): Call it.
8309 * tree.h (last_field): Declare.
8310 (first_field): Add attribute nonnull.
8312 2020-05-18 Martin Sebor <msebor@redhat.com>
8315 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
8316 * tree.c (component_ref_size): Correct the handling or array members
8318 Drop a pointless test.
8319 Rename a local variable.
8321 2020-05-18 Jason Merrill <jason@redhat.com>
8323 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
8324 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
8326 2020-05-14 Jason Merrill <jason@redhat.com>
8328 * doc/install.texi (Prerequisites): Update boostrap compiler
8329 requirement to C++11/GCC 4.8.
8331 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8333 PR tree-optimization/94952
8334 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
8335 Initialize variables bitpos, bitregion_start, and bitregion_end in
8336 order to silence warnings about use of uninitialized variables.
8338 2020-05-18 Carl Love <cel@us.ibm.com>
8341 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
8342 first_match_index_<mode>.
8343 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
8344 additional test cases with zero vector elements.
8346 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8349 * config/i386/i386-expand.c (ix86_expand_int_movcc):
8350 Avoid reversing a non-trapping comparison to a trapping one.
8352 2020-05-18 Alex Coplan <alex.coplan@arm.com>
8354 * config/arm/arm.c (output_move_double): Fix codegen when loading into
8355 a register pair with an odd base register.
8357 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
8359 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
8360 Do not emit FLAGS_REG clobber for TFmode.
8361 * config/i386/i386.md (*<code>tf2_1): Rewrite as
8362 define_insn_and_split. Mark operands 1 and 2 commutative.
8363 (*nabstf2_1): Ditto.
8364 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
8365 Do not swap memory operands. Simplify RTX generation.
8366 (neg abs SSE splitter): Ditto.
8367 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
8368 commutative. Do not swap operands. Simplify RTX generation.
8369 (*nabs<mode>2): Ditto.
8371 2020-05-18 Richard Biener <rguenther@suse.de>
8373 * tree-vect-slp.c (vect_slp_bb): Start after labels.
8374 (vect_get_constant_vectors): Really place init stmt after scalar defs.
8375 * tree-vect-stmts.c (vect_init_vector_1): Insert before
8378 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
8380 * config/i386/driver-i386.c (host_detect_local_cpu): Support
8381 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
8384 2020-05-18 Richard Biener <rguenther@suse.de>
8387 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
8388 when inlining into a non-call EH function.
8390 2020-05-18 Richard Biener <rguenther@suse.de>
8392 PR tree-optimization/95172
8393 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
8394 eventually need the conditional processing.
8395 (execute_sm_exit): When processing an orderd sequence
8396 avoid doing any conditional processing.
8397 (hoist_memory_references): Pass down whether all edges
8398 have ordered processing for a ref to execute_sm.
8400 2020-05-17 Jeff Law <law@redhat.com>
8402 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
8403 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
8404 into a single pattern using pc_or_label_operand.
8405 * config/h8300/combiner.md (bit branch patterns): Likewise.
8406 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
8408 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
8411 * config/i386/i386-features.c (has_non_address_hard_reg):
8413 (pseudo_reg_set): This. Return the SET expression. Ignore
8414 pseudo register push.
8415 (general_scalar_to_vector_candidate_p): Combine single_set and
8416 has_non_address_hard_reg calls to pseudo_reg_set.
8417 (timode_scalar_to_vector_candidate_p): Likewise.
8418 * config/i386/i386.md (*pushv1ti2): New pattern.
8420 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8423 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8425 * tree-vrp.c (operand_less_p): Move to...
8426 * vr-values.c (operand_less_p): ...here.
8427 * tree-vrp.h (operand_less_p): Remove.
8429 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8431 * tree-vrp.c (operand_less_p): Move to...
8432 * vr-values.c (operand_less_p): ...here.
8433 * tree-vrp.h (operand_less_p): Remove.
8435 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8437 * tree-vrp.c (class vrp_insert): Remove prototype for
8440 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8442 * tree-vrp.c (class live_names): New.
8443 (live_on_edge): Move into live_names.
8444 (build_assert_expr_for): Move into vrp_insert.
8445 (find_assert_locations_in_bb): Rename from
8446 find_assert_locations_1.
8447 (process_assert_insertions_for): Move into vrp_insert.
8448 (compare_assert_loc): Same.
8449 (remove_range_assertions): Same.
8450 (dump_asserts_for): Rename to vrp_insert::dump.
8451 (debug_asserts_for): Rename to vrp_insert::debug.
8452 (dump_all_asserts): Rename to vrp_insert::dump.
8453 (debug_all_asserts): Rename to vrp_insert::debug.
8455 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8457 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
8458 check_array_ref, check_mem_ref, and search_for_addr_array
8460 (class array_bounds_checker): ...here.
8461 (class check_array_bounds_dom_walker): Adjust to use
8462 array_bounds_checker.
8463 (check_all_array_refs): Move into array_bounds_checker and rename
8465 (class vrp_folder): Make fold_predicate_in private.
8467 2020-05-15 Jeff Law <law@redhat.com>
8469 * config/h8300/h8300.md (SFI iterator): New iterator for
8471 * config/h8300/peepholes.md (memory comparison): Use mode
8472 iterator to consolidate 3 patterns into one.
8473 (stack allocation and stack store): Handle SFmode. Handle
8476 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
8478 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
8479 RS6000_BTM_POWERPC64.
8481 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8483 * config/i386/i386.md (SWI48DWI): New mode iterator.
8484 (*push<mode>2): Allow XMM registers.
8485 (*pushdi2_rex64): Ditto.
8486 (*pushsi2_rex64): Ditto.
8488 (push XMM reg splitter): New splitter
8490 (*pushdf) Change "x" operand constraint to "v".
8491 (*pushsf_rex64): Ditto.
8494 2020-05-15 Richard Biener <rguenther@suse.de>
8496 PR tree-optimization/92260
8497 * tree-vect-slp.c (vect_get_constant_vectors): Compute
8498 the number of vector stmts in a canonical way.
8500 2020-05-15 Martin Liska <mliska@suse.cz>
8502 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
8505 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
8507 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
8509 2020-05-15 Richard Biener <rguenther@suse.de>
8511 PR tree-optimization/95133
8512 * gimple-ssa-split-paths.c
8513 (find_block_to_duplicate_for_splitting_paths): Check for
8516 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
8518 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
8520 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
8522 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
8525 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
8526 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
8529 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8532 * config/i386/i386.md (isa): Add sse3_noavx.
8533 (enabled): Handle sse3_noavx.
8535 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
8536 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
8537 alternatives. Match commutative vec_select selector operands.
8538 (*mmx_haddv2sf3_low): New insn pattern.
8540 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
8541 (*mmx_hsubv2sf3_low): New insn pattern.
8543 2020-05-15 Richard Biener <rguenther@suse.de>
8545 PR tree-optimization/33315
8546 * tree-ssa-sink.c: Include tree-eh.h.
8547 (sink_stats): Add commoned member.
8548 (sink_common_stores_to_bb): New function implementing store
8549 commoning by sinking to the successor.
8550 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
8551 (pass_sink_code::execute): Likewise. Record commoned stores
8554 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
8556 PR rtl-optimization/37451, part of PR target/61837
8557 * loop-doloop.c (doloop_simplify_count): New function. Simplify
8558 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
8559 (doloop_modify): Call doloop_simplify_count.
8561 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
8564 * doc/sourcebuild.texi: Document effective target lgccjit.
8566 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
8568 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
8569 define_expand, and rename the original to ...
8570 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
8571 (add<mode>3_zext_dup_exec): Likewise, with ...
8572 (add<mode>3_vcc_zext_dup_exec): ... this.
8573 (add<mode>3_zext_dup2): Likewise, with ...
8574 (add<mode>3_zext_dup_exec): ... this.
8575 (add<mode>3_zext_dup2_exec): Likewise, with ...
8576 (add<mode>3_zext_dup2): ... this.
8577 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
8578 addv64di3_zext* calls to use addv64di3_vcc_zext*.
8580 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8583 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
8584 (extendv2sfv2df2): Ditto.
8586 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
8588 * configure: Regenerated.
8590 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
8592 * config/arm/arm.c (reg_needs_saving_p): New function.
8593 (use_return_insn): Use reg_needs_saving_p.
8594 (arm_get_vfp_saved_size): Likewise.
8595 (arm_compute_frame_layout): Likewise.
8596 (arm_save_coproc_regs): Likewise.
8597 (thumb1_expand_epilogue): Likewise.
8598 (arm_expand_epilogue_apcs_frame): Likewise.
8599 (arm_expand_epilogue): Likewise.
8601 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
8603 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
8605 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8608 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
8610 (floatv2siv2df2): New expander.
8611 (floatunsv2siv2df2): New insn pattern.
8613 (fix_truncv2dfv2si2): New expander.
8614 (fixuns_truncv2dfv2si2): New insn pattern.
8616 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
8619 * config/aarch64/aarch64-sve-builtins.cc
8620 (handle_arm_sve_vector_bits_attribute): Create a copy of the
8621 original type's TYPE_MAIN_VARIANT, then reapply all the differences
8622 between the original type and its main variant.
8624 2020-05-14 Richard Biener <rguenther@suse.de>
8627 * real.c (real_to_decimal_for_mode): Make sure we handle
8628 a zero with nonzero exponent.
8630 2020-05-14 Jakub Jelinek <jakub@redhat.com>
8632 * Makefile.in (GTFILES): Add omp-general.c.
8633 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
8634 calls_declare_variant_alt members and initialize them in the
8636 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
8637 calls to declare_variant_alt nodes.
8638 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
8639 and calls_declare_variant_alt.
8640 (input_overwrite_node): Read them back.
8641 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
8643 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
8645 (tree_function_versioning): Copy calls_declare_variant_alt bit.
8646 * omp-offload.c (execute_omp_device_lower): Call
8647 omp_resolve_declare_variant on direct function calls.
8648 (pass_omp_device_lower::gate): Also enable for
8649 calls_declare_variant_alt functions.
8650 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
8651 (omp_context_selector_matches): Handle the case when
8652 cfun->curr_properties has PROP_gimple_any bit set.
8653 (struct omp_declare_variant_entry): New type.
8654 (struct omp_declare_variant_base_entry): New type.
8655 (struct omp_declare_variant_hasher): New type.
8656 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
8658 (omp_declare_variants): New variable.
8659 (struct omp_declare_variant_alt_hasher): New type.
8660 (omp_declare_variant_alt_hasher::hash,
8661 omp_declare_variant_alt_hasher::equal): New methods.
8662 (omp_declare_variant_alt): New variables.
8663 (omp_resolve_late_declare_variant): New function.
8664 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
8665 when called late. Create a magic declare_variant_alt fndecl and
8666 cgraph node and return that if decision needs to be deferred until
8667 after gimplification.
8668 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
8672 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
8673 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
8674 entry block if info->after_stmt is NULL, otherwise add after that stmt
8675 and update it after adding each stmt.
8676 (ipa_simd_modify_function_body): Initialize info.after_stmt.
8678 * function.h (struct function): Add has_omp_target bit.
8679 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
8681 (omp_discover_declare_target_tgt_fn_r): ... this.
8682 (omp_discover_declare_target_var_r): Call
8683 omp_discover_declare_target_tgt_fn_r instead of
8684 omp_discover_declare_target_fn_r.
8685 (omp_discover_implicit_declare_target): Also queue functions with
8686 has_omp_target bit set, for those walk with
8687 omp_discover_declare_target_fn_r, for declare target to functions
8688 walk with omp_discover_declare_target_tgt_fn_r.
8690 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8693 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
8694 Add SSE/AVX alternative. Change operand predicates from
8695 nonimmediate_operand to register_mmxmem_operand.
8696 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8697 (fix_truncv2sfv2si2): New expander.
8698 (fixuns_truncv2sfv2si2): New insn pattern.
8700 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
8701 Add SSE/AVX alternative. Change operand predicates from
8702 nonimmediate_operand to register_mmxmem_operand.
8703 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8704 (floatv2siv2sf2): New expander.
8705 (floatunsv2siv2sf2): New insn pattern.
8707 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
8709 (IX86_BUILTIN_PI2FD): Ditto.
8711 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8713 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
8715 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
8718 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8720 * config/s390/s390.c (allocate_stack_space): Add missing updates
8721 of last_probe_offset.
8723 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8725 * config/s390/s390.md ("allocate_stack"): Call
8726 anti_adjust_stack_and_probe_stack_clash when stack clash
8727 protection is enabled.
8728 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
8729 prototype. Remove static.
8730 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
8733 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
8735 * config/rs6000/altivec.h (vec_extractl): New #define.
8736 (vec_extracth): Likewise.
8737 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
8738 (UNSPEC_EXTRACTR): Likewise.
8739 (vextractl<mode>): New expansion.
8740 (vextractl<mode>_internal): New insn.
8741 (vextractr<mode>): New expansion.
8742 (vextractr<mode>_internal): New insn.
8743 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
8744 New built-in function.
8745 (__builtin_altivec_vextduhvlx): Likewise.
8746 (__builtin_altivec_vextduwvlx): Likewise.
8747 (__builtin_altivec_vextddvlx): Likewise.
8748 (__builtin_altivec_vextdubvhx): Likewise.
8749 (__builtin_altivec_vextduhvhx): Likewise.
8750 (__builtin_altivec_vextduwvhx): Likewise.
8751 (__builtin_altivec_vextddvhx): Likewise.
8752 (__builtin_vec_extractl): New overloaded built-in function.
8753 (__builtin_vec_extracth): Likewise.
8754 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8755 Define overloaded forms of __builtin_vec_extractl and
8756 __builtin_vec_extracth.
8757 (builtin_function_type): Add cases to mark arguments of new
8758 built-in functions as unsigned.
8759 (rs6000_common_init_builtins): Add
8760 opaque_ftype_opaque_opaque_opaque_opaque.
8761 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
8762 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8763 for a Future Architecture): Add description of vec_extractl and
8764 vec_extractr built-in functions.
8766 2020-05-13 Richard Biener <rguenther@suse.de>
8768 * target.def (add_stmt_cost): Add new vectype parameter.
8769 * targhooks.c (default_add_stmt_cost): Adjust.
8770 * targhooks.h (default_add_stmt_cost): Likewise.
8771 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
8773 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
8774 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
8775 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
8777 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
8778 (dump_stmt_cost): Add new vectype parameter.
8779 (add_stmt_cost): Likewise.
8780 (record_stmt_cost): Likewise.
8781 (record_stmt_cost): Add overload with old signature.
8782 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
8784 (vect_get_known_peeling_cost): Likewise.
8785 (vect_estimate_min_profitable_iters): Likewise.
8786 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
8787 * tree-vect-stmts.c (record_stmt_cost): Likewise.
8788 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
8789 and pass down correct vectype and NULL stmt_info.
8790 (vect_model_simple_cost): Adjust.
8791 (vect_model_store_cost): Likewise.
8793 2020-05-13 Richard Biener <rguenther@suse.de>
8795 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
8796 (_slp_instance::group_size): Likewise.
8797 * tree-vect-loop.c (vectorizable_reduction): The group size
8798 is the number of lanes in the node.
8799 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
8800 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
8801 verify it matches the instance trees number of lanes.
8802 (vect_slp_analyze_node_operations_1): Use the numer of lanes
8803 in the node as group size.
8804 (vect_bb_vectorization_profitable_p): Use the instance root
8805 number of lanes for the size of life.
8806 (vect_schedule_slp_instance): Use the number of lanes as
8808 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
8809 parameter. Use the number of lanes of the load for the group
8810 size in the gap adjustment code.
8811 (vect_analyze_stmt): Adjust.
8812 (vect_transform_stmt): Likewise.
8814 2020-05-13 Jakub Jelinek <jakub@redhat.com>
8817 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
8818 if the last insn is a note.
8820 PR tree-optimization/95060
8821 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
8822 if it is the single use of the FMA internal builtin.
8824 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
8826 PR tree-optimization/94969
8827 * tree-data-dependence.c (constant_access_functions): Rename to...
8828 (invariant_access_functions): ...this. Add parameter. Check for
8829 invariant access function, rather than constant.
8830 (build_classic_dist_vector): Call above function.
8831 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
8833 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
8836 * doc/extend.texi (x86Operandmodifiers): Document more x86
8838 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
8840 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
8842 * tree-vrp.c (class vrp_insert): New.
8843 (insert_range_assertions): Move to class vrp_insert.
8844 (dump_all_asserts): Same as above.
8845 (dump_asserts_for): Same as above.
8846 (live): Same as above.
8847 (need_assert_for): Same as above.
8848 (live_on_edge): Same as above.
8849 (finish_register_edge_assert_for): Same as above.
8850 (find_switch_asserts): Same as above.
8851 (find_assert_locations): Same as above.
8852 (find_assert_locations_1): Same as above.
8853 (find_conditional_asserts): Same as above.
8854 (process_assert_insertions): Same as above.
8855 (register_new_assert_for): Same as above.
8856 (vrp_prop): New variable fun.
8857 (vrp_initialize): New parameter.
8858 (identify_jump_threads): Same as above.
8859 (execute_vrp): Same as above.
8862 2020-05-12 Keith Packard <keith.packard@sifive.com>
8864 * config/riscv/riscv.c (riscv_unique_section): New.
8865 (TARGET_ASM_UNIQUE_SECTION): New.
8867 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
8869 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
8870 * config/riscv/riscv-passes.def: New file.
8871 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
8872 * config/riscv/riscv-shorten-memrefs.c: New file.
8873 * config/riscv/riscv.c (tree-pass.h): New include.
8874 (riscv_compressed_reg_p): New Function
8875 (riscv_compressed_lw_offset_p): Likewise.
8876 (riscv_compressed_lw_address_p): Likewise.
8877 (riscv_shorten_lw_offset): Likewise.
8878 (riscv_legitimize_address): Attempt to convert base + large_offset
8879 to compressible new_base + small_offset.
8880 (riscv_address_cost): Make anticipated compressed load/stores
8881 cheaper for code size than uncompressed load/stores.
8882 (riscv_register_priority): Move compressed register check to
8883 riscv_compressed_reg_p.
8884 * config/riscv/riscv.h (C_S_BITS): Define.
8885 (CSW_MAX_OFFSET): Define.
8886 * config/riscv/riscv.opt (mshorten-memefs): New option.
8887 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
8888 (PASSES_EXTRA): Add riscv-passes.def.
8889 * doc/invoke.texi: Document -mshorten-memrefs.
8891 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
8892 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
8893 * doc/tm.texi: Regenerate.
8894 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
8895 * sched-deps.c (attempt_change): Use old address if it is cheaper than
8897 * target.def (new_address_profitable_p): New hook.
8898 * targhooks.c (default_new_address_profitable_p): New function.
8899 * targhooks.h (default_new_address_profitable_p): Declare.
8901 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8904 * config/i386/mmx.md (copysignv2sf3): New expander.
8905 (xorsignv2sf3): Ditto.
8906 (signbitv2sf3): Ditto.
8908 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8911 * config/i386/mmx.md (fmav2sf4): New insn pattern.
8916 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
8918 * Makefile.in (CET_HOST_FLAGS): New.
8919 (COMPILER): Add $(CET_HOST_FLAGS).
8920 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
8921 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
8923 * aclocal.m4: Regenerated.
8924 * configure: Likewise.
8926 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8929 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
8930 (*mmx_<code>v2sf2): New insn_and_split pattern.
8931 (*mmx_nabsv2sf2): Ditto.
8932 (*mmx_andnotv2sf3): New insn pattern.
8933 (*mmx_<code>v2sf3): Ditto.
8934 * config/i386/i386.md (absneg_op): New code attribute.
8935 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
8936 (ix86_build_signbit_mask): Ditto.
8938 2020-05-12 Richard Biener <rguenther@suse.de>
8940 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
8943 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8945 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
8946 Update prototype to include "local" argument.
8947 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
8948 "local" argument. Handle local common decls.
8949 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
8950 msp430_output_aligned_decl_common call with 0 for "local" argument.
8951 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
8953 2020-05-12 Richard Biener <rguenther@suse.de>
8955 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
8957 2020-05-12 Martin Liska <mliska@suse.cz>
8961 * sanopt.c (sanitize_rewrite_addressable_params):
8962 Clear DECL_NOT_GIMPLE_REG_P for argument.
8964 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8966 PR tree-optimization/94980
8967 * tree-vect-generic.c (expand_vector_comparison): Use
8968 vector_element_bits_tree to get the element size in bits,
8969 rather than using TYPE_SIZE.
8970 (expand_vector_condition, vector_element): Likewise.
8972 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8974 PR tree-optimization/94980
8975 * tree-vect-generic.c (build_replicated_const): Take the number
8976 of bits as a parameter, instead of the type of the elements.
8977 (do_plus_minus): Update accordingly, using vector_element_bits
8978 to calculate the correct number of bits.
8979 (do_negate): Likewise.
8981 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8983 PR tree-optimization/94980
8984 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
8985 * tree.c (vector_element_bits, vector_element_bits_tree): New.
8986 * match.pd: Use the new functions instead of determining the
8987 vector element size directly from TYPE_SIZE(_UNIT).
8988 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
8989 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
8990 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
8991 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
8992 (expand_vector_conversion): Likewise.
8993 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
8994 a divisor. Convert the dividend to bits to compensate.
8995 * tree-vect-loop.c (vectorizable_live_operation): Call
8996 vector_element_bits instead of open-coding it.
8998 2020-05-12 Jakub Jelinek <jakub@redhat.com>
9000 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
9001 * omp-offload.c: Include context.h.
9002 (omp_declare_target_fn_p, omp_declare_target_var_p,
9003 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
9004 omp_discover_implicit_declare_target): New functions.
9005 * cgraphunit.c (analyze_functions): Call
9006 omp_discover_implicit_declare_target.
9008 2020-05-12 Richard Biener <rguenther@suse.de>
9010 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
9011 literal constant &MEM[..] to a constant literal.
9013 2020-05-12 Richard Biener <rguenther@suse.de>
9015 PR tree-optimization/95045
9016 * dbgcnt.def (lim): Add debug-counter.
9017 * tree-ssa-loop-im.c: Include dbgcnt.h.
9018 (find_refs_for_sm): Use lim debug counter for store motion
9020 (do_store_motion): Rename form store_motion. Commit edge
9022 (store_motion_loop): ... here.
9023 (tree_ssa_lim): Adjust.
9025 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9027 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
9028 (vec_ctzm): Rename to vec_cnttzm.
9029 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
9030 Change fourth operand for vec_ternarylogic to require
9031 compatibility with unsigned SImode rather than unsigned QImode.
9032 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9033 Remove overloaded forms of vec_gnb that are no longer needed.
9034 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9035 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
9036 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
9037 vec_gnb; move vec_ternarylogic documentation into this section
9038 and replace const unsigned char with const unsigned int as its
9041 2020-05-11 Carl Love <cel@us.ibm.com>
9043 * config/rs6000/altivec.h (vec_genpcvm): New #define.
9044 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
9046 (XXGENPCVM_V8HI): Likewise.
9047 (XXGENPCVM_V4SI): Likewise.
9048 (XXGENPCVM_V2DI): Likewise.
9049 (XXGENPCVM): New overloaded built-in instantiation.
9050 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
9051 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
9052 (altivec_expand_builtin): Add special handling for
9053 FUTURE_BUILTIN_VEC_XXGENPCVM.
9054 (builtin_function_type): Add handling for
9055 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
9056 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
9057 (UNSPEC_XXGENPCV): New constant.
9058 (xxgenpcvm_<mode>_internal): New insn.
9059 (xxgenpcvm_<mode>): New expansion.
9060 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
9062 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9064 * config/rs6000/altivec.h (vec_strir): New #define.
9065 (vec_stril): Likewise.
9066 (vec_strir_p): Likewise.
9067 (vec_stril_p): Likewise.
9068 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
9069 (UNSPEC_VSTRIL): Likewise.
9070 (vstrir_<mode>): New expansion.
9071 (vstrir_code_<mode>): New insn.
9072 (vstrir_p_<mode>): New expansion.
9073 (vstrir_p_code_<mode>): New insn.
9074 (vstril_<mode>): New expansion.
9075 (vstril_code_<mode>): New insn.
9076 (vstril_p_<mode>): New expansion.
9077 (vstril_p_code_<mode>): New insn.
9078 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
9079 New built-in function.
9080 (__builtin_altivec_vstrihr): Likewise.
9081 (__builtin_altivec_vstribl): Likewise.
9082 (__builtin_altivec_vstrihl): Likewise.
9083 (__builtin_altivec_vstribr_p): Likewise.
9084 (__builtin_altivec_vstrihr_p): Likewise.
9085 (__builtin_altivec_vstribl_p): Likewise.
9086 (__builtin_altivec_vstrihl_p): Likewise.
9087 (__builtin_vec_strir): New overloaded built-in function.
9088 (__builtin_vec_stril): Likewise.
9089 (__builtin_vec_strir_p): Likewise.
9090 (__builtin_vec_stril_p): Likewise.
9091 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9092 Define overloaded forms of __builtin_vec_strir,
9093 __builtin_vec_stril, __builtin_vec_strir_p, and
9094 __builtin_vec_stril_p.
9095 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9096 for a Future Architecture): Add description of vec_stril,
9097 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
9099 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
9101 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
9102 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
9104 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
9105 * config/rs6000/rs6000-builtin.def: Add handling of new macro
9107 (BU_FUTURE_V_4): New macro. Use it.
9108 (BU_FUTURE_OVERLOAD_4): Likewise.
9109 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
9110 handling for quaternary built-in functions.
9111 (altivec_resolve_overloaded_builtin): Add special-case handling
9112 for __builtin_vec_xxeval.
9113 * config/rs6000/rs6000-call.c: Add handling of new macro
9114 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
9115 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
9116 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
9117 (altivec_overloaded_builtins): Add definitions for
9118 FUTURE_BUILTIN_VEC_XXEVAL.
9119 (bdesc_4arg): New array.
9120 (htm_expand_builtin): Add handling for quaternary built-in
9122 (rs6000_expand_quaternop_builtin): New function.
9123 (rs6000_expand_builtin): Add handling for quaternary built-in
9125 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
9126 for unsigned QImode and unsigned HImode.
9127 (builtin_quaternary_function_type): New function.
9128 (rs6000_common_init_builtins): Add handling of quaternary
9130 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
9132 (RS6000_BTC_PREDICATE): Change value of constant.
9133 (RS6000_BTC_ABS): Likewise.
9134 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
9135 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
9136 for a Future Architecture): Add description of vec_ternarylogic
9139 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9141 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
9143 (__builtin_pextd): Likewise.
9144 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
9145 (UNSPEC_PEXTD): Likewise.
9148 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
9149 a Future Architecture): Add descriptions of __builtin_pdepd and
9150 __builtin_pextd functions.
9152 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9154 * config/rs6000/altivec.h (vec_clrl): New #define.
9155 (vec_clrr): Likewise.
9156 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
9157 (UNSPEC_VCLRRB): Likewise.
9160 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
9162 (__builtin_altivec_vclrrb): Likewise.
9163 (__builtin_vec_clrl): New overloaded built-in function.
9164 (__builtin_vec_clrr): Likewise.
9165 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9166 Define overloaded forms of __builtin_vec_clrl and
9168 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9169 for a Future Architecture): Add descriptions of vec_clrl and
9172 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9174 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
9175 built-in function definition.
9176 (__builtin_cnttzdm): Likewise.
9177 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
9178 (UNSPEC_CNTTZDM): Likewise.
9179 (cntlzdm): New insn.
9180 (cnttzdm): Likewise.
9181 * doc/extend.texi (Basic PowerPC Built-in Functions available for
9182 a Future Architecture): Add descriptions of __builtin_cntlzdm and
9183 __builtin_cnttzdm functions.
9185 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9188 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
9190 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9192 * config/rs6000/altivec.h (vec_cfuge): New #define.
9193 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
9194 (vcfuged): New insn.
9195 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
9196 New built-in function.
9197 * config/rs6000/rs6000-call.c (builtin_function_type): Add
9198 handling for FUTURE_BUILTIN_VCFUGED case.
9199 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9200 for a Future Architecture): Add description of vec_cfuge built-in
9203 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9205 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
9207 (BU_FUTURE_MISC_1): Likewise.
9208 (BU_FUTURE_MISC_2): Likewise.
9209 (BU_FUTURE_MISC_3): Likewise.
9210 (__builtin_cfuged): New built-in function definition.
9211 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
9213 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
9214 a Future Architecture): New subsubsection.
9216 2020-05-11 Richard Biener <rguenther@suse.de>
9218 PR tree-optimization/95049
9219 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
9220 between different constants.
9222 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
9224 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
9226 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9227 Bill Schmidt <wschmidt@linux.ibm.com>
9229 * config/rs6000/altivec.h (vec_gnb): New #define.
9230 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
9232 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
9234 (BU_FUTURE_OVERLOAD_2): Likewise.
9235 (BU_FUTURE_OVERLOAD_3): Likewise.
9236 (__builtin_altivec_gnb): New built-in function.
9237 (__buiiltin_vec_gnb): New overloaded built-in function.
9238 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
9239 Define overloaded forms of __builtin_vec_gnb.
9240 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
9241 of __builtin_vec_gnb.
9242 (builtin_function_type): Mark return value and arguments unsigned
9243 for FUTURE_BUILTIN_VGNB.
9244 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
9245 for a Future Architecture): Add description of vec_gnb built-in
9248 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9249 Bill Schmidt <wschmidt@linux.ibm.com>
9251 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
9253 (vec_pext): Likewise.
9254 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
9255 (UNSPEC_VPEXTD): Likewise.
9258 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
9260 (__builtin_altivec_vpextd): Likewise.
9261 * config/rs6000/rs6000-call.c (builtin_function_type): Add
9262 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
9264 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
9265 for a Future Architecture): Add description of vec_pdep and
9266 vec_pext built-in functions.
9268 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
9269 Bill Schmidt <wschmidt@linux.ibm.com>
9271 * config/rs6000/altivec.h (vec_clzm): New macro.
9272 (vec_ctzm): Likewise.
9273 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
9274 (UNSPEC_VCTZDM): Likewise.
9277 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
9278 (BU_FUTURE_V_1): Likewise.
9279 (BU_FUTURE_V_2): Likewise.
9280 (BU_FUTURE_V_3): Likewise.
9281 (__builtin_altivec_vclzdm): New builtin definition.
9282 (__builtin_altivec_vctzdm): Likewise.
9283 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
9284 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
9286 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
9287 value and parameter types to be unsigned for VCLZDM and VCTZDM.
9288 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
9289 support for TARGET_FUTURE flag.
9290 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
9291 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
9292 for a Future Architecture): New subsubsection.
9294 2020-05-11 Richard Biener <rguenther@suse.de>
9296 PR tree-optimization/94988
9297 PR tree-optimization/95025
9298 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
9299 (sm_seq_push_down): Take extra parameter denoting where we
9301 (execute_sm_exit): Re-issue sm_other stores in the correct
9303 (sm_seq_valid_bb): When always executed, allow sm_other to
9304 prevail inbetween sm_ord and record their stored value.
9305 (hoist_memory_references): Adjust refs_not_supported propagation
9306 and prune sm_other from the end of the ordered sequences.
9308 2020-05-11 Felix Yang <felix.yang@huawei.com>
9311 * config/aarch64/aarch64.md (mov<mode>):
9312 Bitcasts to the equivalent integer mode using gen_lowpart
9313 instead of doing FAIL for scalar floating point move.
9315 2020-05-11 Alex Coplan <alex.coplan@arm.com>
9317 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
9318 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
9319 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
9320 (*csinv3_uxtw_insn2): New.
9321 (*csinv3_uxtw_insn3): New.
9322 * config/aarch64/iterators.md (neg_not_cs): New.
9324 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9327 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
9328 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
9329 (*mmx_addv2sf3): Ditto.
9330 (*mmx_subv2sf3): Ditto.
9331 (*mmx_mulv2sf3): Ditto.
9332 (*mmx_<code>v2sf3): Ditto.
9333 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
9335 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
9338 * config/i386/i386.c (ix86_vector_mode_supported_p):
9339 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
9340 * config/i386/mmx.md (*mov<mode>_internal): Do not set
9341 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
9343 (mmx_addv2sf3): Change operand predicates from
9344 nonimmediate_operand to register_mmxmem_operand.
9345 (addv2sf3): New expander.
9346 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
9347 predicates from nonimmediate_operand to register_mmxmem_operand.
9348 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9350 (mmx_subv2sf3): Change operand predicate from
9351 nonimmediate_operand to register_mmxmem_operand.
9352 (mmx_subrv2sf3): Ditto.
9353 (subv2sf3): New expander.
9354 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
9355 predicates from nonimmediate_operand to register_mmxmem_operand.
9356 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9358 (mmx_mulv2sf3): Change operand predicates from
9359 nonimmediate_operand to register_mmxmem_operand.
9360 (mulv2sf3): New expander.
9361 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
9362 predicates from nonimmediate_operand to register_mmxmem_operand.
9363 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9365 (mmx_<code>v2sf3): Change operand predicates from
9366 nonimmediate_operand to register_mmxmem_operand.
9367 (<code>v2sf3): New expander.
9368 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
9369 predicates from nonimmediate_operand to register_mmxmem_operand.
9370 Enable instruction pattern for TARGET_MMX_WITH_SSE.
9371 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
9373 2020-05-11 Martin Liska <mliska@suse.cz>
9376 * common.opt: Fix typo in option description.
9378 2020-05-11 Martin Liska <mliska@suse.cz>
9380 PR gcov-profile/94928
9381 * gcov-io.h: Add caveat about coverage format parsing and
9382 possible outdated documentation.
9384 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
9386 PR tree-optimization/83403
9387 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
9388 determine_value_range, Add fold conversion of MULT_EXPR, fix the
9391 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
9393 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
9394 __ILP32__ for 32-bit targets.
9396 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
9398 * tree.h (expr_align): Delete.
9399 * tree.c (expr_align): Likewise.
9401 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
9403 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
9404 from end_of_function_needs.
9406 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
9407 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
9409 * config/cris/t-elfmulti: Remove crisv32 multilib.
9410 * config/cris: Remove shared-library and CRIS v32 support.
9412 Move trivially from cc0 to reg:CC model, removing most optimizations.
9413 * config/cris/cris.md: Remove all side-effect patterns and their
9414 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
9415 to all but post-reload control-flow and movem insns. Remove
9416 constraints on all modified expanders. Remove obsoleted cc0-related
9418 (attr "cc"): Remove alternative "rev".
9419 (mode_iterator BWDD, DI_, SI_): New.
9420 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
9421 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
9422 ("mstep_shift", "mstep_mul"): Remove patterns.
9423 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
9424 * config/cris/cris.c: Change all non-condition-code,
9425 non-control-flow emitted insns to add a parallel with clobber of
9426 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
9427 emit_insn to use of emit_move_insn, gen_add2_insn or
9428 cris_emit_insn, as convenient.
9429 (cris_reg_overlap_mentioned_p)
9430 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
9431 (cris_movem_load_rest_p): Don't assume all elements in a
9433 (cris_store_multiple_op_p): Ditto.
9434 (cris_emit_insn): New function.
9435 * cris/cris-protos.h (cris_emit_insn): Declare.
9438 * config/cris/cris.md (zcond): New code_iterator.
9439 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
9441 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
9443 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
9445 * config/cris/cris.md ("movsi"): For memory destination
9446 post-reload, generate clobberless variant. Similarly for a
9447 zero-source post-reload.
9448 ("*mov_tomem<mode>_split"): New split.
9449 ("*mov_tomem<mode>"): New insn.
9450 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
9451 "Q>m" for less-than-SImode.
9452 ("*mov_fromzero<mode>_split"): New split.
9453 ("*mov_fromzero<mode>"): New insn.
9455 Prepare for cmpelim pass to eliminate redundant compare insns.
9456 * config/cris/cris-modes.def: New file.
9457 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
9458 (cris_notice_update_cc): Remove left-over declaration.
9459 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
9460 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
9461 * config/cris/cris.h (SELECT_CC_MODE): Define.
9462 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
9464 (cond): New code_iterator.
9465 (nzcond): Replacement for incorrect ncond. All callers changed.
9466 (nzvccond): Replacement for ocond. All callers changed.
9467 (rnzcond): Replacement for rcond. All callers changed.
9468 (xCC): New code_attr.
9469 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
9471 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
9472 CCmode with iteration over NZVCSET.
9473 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
9475 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
9476 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
9477 ("*btst<mode>"): Similarly, from "*btst".
9478 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
9479 iterating over cond instead of matching the comparison with
9480 ordered_comparison_operator.
9481 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
9482 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
9484 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
9485 NZVCUSE. Remove FIXME.
9486 ("*b<nzcond:code>_reversed<mode>"): Similarly from
9487 "*b<ncond:code>_reversed", over NZUSE.
9488 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
9489 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
9490 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
9491 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
9492 depending on CC_NZmode vs. CCmode. Remove FIXME.
9493 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
9494 "*b<rcond:code>_reversed", over NZUSE.
9495 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
9496 iterating over cond instead of matching the comparison with
9497 ordered_comparison_operator.
9498 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
9499 iterating over NZUSE.
9500 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
9501 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
9502 depending on CC_NZmode vs. CCmode.
9503 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
9504 NZVCUSE. Remove FIXME.
9505 ("cc"): Comment on new use.
9506 ("cc_enabled"): New attribute.
9507 ("enabled"): Make default fall back to cc_enabled.
9508 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
9509 default_subst_attrs.
9510 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
9511 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
9512 "*movsi_internal". Correct contents of, and rename attribute
9513 "cc" to "cc<cccc><ccnz><ccnzvc>".
9514 ("anz", "anzvc", "acc"): New define_subst_attrs.
9515 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
9516 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
9517 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
9518 "movqi". Correct contents of, and rename "cc" attribute to
9519 "cc<cccc><ccnz><ccnzvc>".
9520 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
9521 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
9522 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
9523 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
9524 Rename from "extend<mode>si2".
9525 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
9526 Similar, from "zero_extend<mode>si2".
9527 ("*adddi3<setnz>"): Rename from "*adddi3".
9528 ("*subdi3<setnz>"): Similarly from "*subdi3".
9529 ("*addsi3<setnz>"): Similarly from "*addsi3".
9530 ("*subsi3<setnz>"): Similarly from "*subsi3".
9531 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
9532 "cc" attribute to "cc<ccnz>".
9533 ("*addqi3<setnz>"): Similarly from "*addqi3".
9534 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
9535 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
9537 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
9538 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
9539 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
9540 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
9541 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
9542 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
9543 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
9544 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
9546 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
9548 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
9550 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
9552 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
9554 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
9556 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
9557 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
9558 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
9559 (znnCC, rznnCC): New code_attrs.
9560 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
9561 obseolete comment. Add belt-and-suspenders mode-test to condition.
9562 Add fixme regarding remaining matched-but-not-generated case.
9563 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
9564 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
9565 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
9566 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
9567 Handle output of CC_ZnNmode.
9568 ("*b<nzcond:code>_reversed<mode>"): Ditto.
9570 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
9571 NEG too. Correct comment.
9572 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
9575 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
9577 * ira-color.c (update_costs_from_allocno): Remove
9578 conflict_cost_update_p argument. Propagate costs only along
9579 threads. Always do conflict cost update. Add printing debugging
9581 (update_costs_from_copies): Add printing debugging info.
9582 (restore_costs_from_copies): Ditto.
9583 (assign_hard_reg): Improve debug info.
9584 (push_only_colorable): Ditto. Call update_costs_from_prefs.
9585 (color_allocnos): Remove update_costs_from_prefs.
9587 2020-05-08 Richard Biener <rguenther@suse.de>
9589 * tree-vectorizer.h (vec_info::slp_loads): New.
9590 (vect_optimize_slp): Declare.
9591 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
9592 nothing when there are no loads.
9593 (vect_gather_slp_loads): Gather loads into a vector.
9594 (vect_supported_load_permutation_p): Remove.
9595 (vect_analyze_slp_instance): Do not verify permutation
9597 (vect_analyze_slp): Optimize permutations of reductions
9598 after all SLP instances have been gathered and gather
9600 (vect_optimize_slp): New function split out from
9601 vect_supported_load_permutation_p. Elide some permutations.
9602 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
9603 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
9604 * tree-vect-stmts.c (vectorizable_load): Check whether
9605 the load can be permuted. When generating code assert we can.
9607 2020-05-08 Richard Biener <rguenther@suse.de>
9609 * tree-ssa-sccvn.c (rpo_avail): Change type to
9610 eliminate_dom_walker *.
9611 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
9612 use the DOM walker availability.
9613 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
9614 with vn_valueize as valueization callback.
9615 (vn_reference_maybe_forwprop_address): Likewise.
9616 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
9617 array_ref_low_bound.
9619 2020-05-08 Jakub Jelinek <jakub@redhat.com>
9621 PR tree-optimization/94786
9622 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
9626 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
9630 * tree.c (get_narrower): Reuse the op temporary instead of
9633 PR tree-optimization/94783
9634 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
9637 PR tree-optimization/94956
9638 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
9639 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
9641 PR tree-optimization/94913
9642 * match.pd (A - B + -1 >= A to B >= A): New simplification.
9643 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
9644 true for TYPE_UNSIGNED integral types.
9647 PR rtl-optimization/94516
9648 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
9650 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
9651 Call df_notes_rescan if that argument is not true and returning true.
9652 * combine.c (adjust_for_new_dest): Pass true as second argument to
9653 remove_reg_equal_equiv_notes.
9654 * postreload.c (reload_combine_recognize_pattern): Don't call
9657 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
9659 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
9661 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
9662 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
9663 (*neg_ne_<mode>): Likewise.
9665 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
9667 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
9669 (*setbcr_<un>signed_<GPR:mode>): Likewise.
9670 (cstore<mode>4): Use setbc[r] if available.
9671 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
9672 (eq<mode>3): Use setbc for TARGET_FUTURE.
9673 (*eq<mode>3): Avoid for TARGET_FUTURE.
9674 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
9675 else for non-Pmode, use gen_eq and gen_xor.
9676 (*ne<mode>3): Avoid for TARGET_FUTURE.
9677 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
9679 2020-05-07 Jeff Law <law@redhat.com>
9681 * config/h8300/h8300.md: Move expanders and patterns into
9682 files based on functionality.
9683 * config/h8300/addsub.md: New file.
9684 * config/h8300/bitfield.md: New file
9685 * config/h8300/combiner.md: New file
9686 * config/h8300/divmod.md: New file
9687 * config/h8300/extensions.md: New file
9688 * config/h8300/jumpcall.md: New file
9689 * config/h8300/logical.md: New file
9690 * config/h8300/movepush.md: New file
9691 * config/h8300/multiply.md: New file
9692 * config/h8300/other.md: New file
9693 * config/h8300/proepi.md: New file
9694 * config/h8300/shiftrotate.md: New file
9695 * config/h8300/testcompare.md: New file
9697 * config/h8300/h8300.md (adds/subs splitters): Merge into single
9699 (negation expanders and patterns): Simplify and combine using
9701 (one_cmpl expanders and patterns): Likewise.
9702 (tablejump, indirect_jump patterns ): Likewise.
9703 (shift and rotate expanders and patterns): Likewise.
9704 (absolute value expander and pattern): Drop expander, rename pattern
9706 (peephole2 patterns): Move into...
9707 * config/h8300/peepholes.md: New file.
9709 * config/h8300/constraints.md (L and N): Simplify now that we're not
9710 longer supporting the original H8/300 chip.
9711 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
9712 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
9713 (shift_alg_hi, shift_alg_si): Similarly.
9714 (h8300_option_overrides): Similarly. Default to H8/300H. If
9715 compiling for H8/S, then turn off H8/300H. Do not update the
9716 shift_alg tables for H8/300 port.
9717 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
9719 (push, split_adds_subs, h8300_rtx_costs): Likewise.
9720 (h8300_print_operand, compute_mov_length): Likewise.
9721 (output_plussi, compute_plussi_length): Likewise.
9722 (compute_plussi_cc, output_logical_op): Likewise.
9723 (compute_logical_op_length, compute_logical_op_cc): Likewise.
9724 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
9725 (output_a_shift, compute_a_shift_length): Likewise.
9726 (output_a_rotate, compute_a_rotate_length): Likewise.
9727 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
9728 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
9729 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
9730 (attr_cpu, TARGET_H8300): Remove.
9731 (TARGET_DEFAULT): Update.
9732 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
9733 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
9734 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
9735 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
9736 * config/h8300/h8300.md: Simplify patterns throughout.
9737 * config/h8300/t-h8300: Update multilib configuration.
9739 * config/h8300/h8300.h (LINK_SPEC): Remove.
9740 (USER_LABEL_PREFIX): Likewise.
9742 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
9743 (h8300_option_override): Remove remnants of COFF support.
9745 2020-05-07 Alan Modra <amodra@gmail.com>
9747 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
9748 set_rtx_cost with set_src_cost.
9749 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
9751 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
9753 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
9754 redundant half vector handlings for no peeling gaps.
9756 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
9758 * tree-ssa-operands.c (operands_scanner): New class.
9759 (operands_bitmap_obstack): Remove.
9760 (n_initialized): Remove.
9761 (build_uses): Move to operands_scanner class.
9762 (build_vuse): Same as above.
9763 (build_vdef): Same as above.
9764 (verify_ssa_operands): Same as above.
9765 (finalize_ssa_uses): Same as above.
9766 (cleanup_build_arrays): Same as above.
9767 (finalize_ssa_stmt_operands): Same as above.
9768 (start_ssa_stmt_operands): Same as above.
9769 (append_use): Same as above.
9770 (append_vdef): Same as above.
9771 (add_virtual_operand): Same as above.
9772 (add_stmt_operand): Same as above.
9773 (get_mem_ref_operands): Same as above.
9774 (get_tmr_operands): Same as above.
9775 (maybe_add_call_vops): Same as above.
9776 (get_asm_stmt_operands): Same as above.
9777 (get_expr_operands): Same as above.
9778 (parse_ssa_operands): Same as above.
9779 (finalize_ssa_defs): Same as above.
9780 (build_ssa_operands): Same as above, plus create a C-like wrapper.
9781 (update_stmt_operands): Create an instance of operands_scanner.
9783 2020-05-07 Richard Biener <rguenther@suse.de>
9786 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
9787 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
9788 (refered_from_nonlocal_var): Likewise.
9789 (ipa_pta_execute): Likewise.
9791 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
9793 * gcc/tree-ssa-struct-alias.c: Fix comments
9795 2020-05-07 Martin Liska <mliska@suse.cz>
9797 * doc/invoke.texi: Fix 2 optindex entries.
9799 2020-05-07 Richard Biener <rguenther@suse.de>
9802 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
9803 (tree_decl_common::not_gimple_reg_flag): ... to this.
9804 * tree.h (DECL_GIMPLE_REG_P): Rename ...
9805 (DECL_NOT_GIMPLE_REG_P): ... to this.
9806 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
9807 (create_tmp_reg): Simplify.
9808 (create_tmp_reg_fn): Likewise.
9809 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
9810 * gimplify.c (create_tmp_from_val): Simplify.
9811 (gimplify_bind_expr): Likewise.
9812 (gimplify_compound_literal_expr): Likewise.
9813 (gimplify_function_tree): Likewise.
9814 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
9815 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
9816 (asan_add_global): Copy it.
9817 * cgraphunit.c (cgraph_node::expand_thunk): Force args
9819 * function.c (gimplify_parameters): Copy
9820 DECL_NOT_GIMPLE_REG_P.
9821 * ipa-param-manipulation.c
9822 (ipa_param_body_adjustments::common_initialization): Simplify.
9823 (ipa_param_body_adjustments::reset_debug_stmts): Copy
9824 DECL_NOT_GIMPLE_REG_P.
9825 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
9826 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
9827 * tree-cfg.c (make_blocks_1): Simplify.
9828 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
9829 * tree-eh.c (lower_eh_constructs_2): Simplify.
9830 * tree-inline.c (declare_return_variable): Adjust and
9832 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
9833 (copy_result_decl_to_var): Likewise.
9834 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
9835 * tree-nested.c (create_tmp_var_for): Simplify.
9836 * tree-parloops.c (separate_decls_in_region_name): Copy
9837 DECL_NOT_GIMPLE_REG_P.
9838 * tree-sra.c (create_access_replacement): Adjust and
9839 generalize partial def support.
9840 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
9841 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
9842 * tree-ssa.c (maybe_optimize_var): Handle clearing of
9843 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
9845 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
9846 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
9847 DECL_NOT_GIMPLE_REG_P.
9848 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
9849 * cfgexpand.c (avoid_type_punning_on_regs): New.
9850 (discover_nonconstant_array_refs): Call
9851 avoid_type_punning_on_regs to avoid unsupported mode punning.
9853 2020-05-07 Alex Coplan <alex.coplan@arm.com>
9855 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
9858 2020-05-07 Richard Biener <rguenther@suse.de>
9860 PR tree-optimization/57359
9861 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
9862 (in_mem_ref::dep_loop): Repurpose.
9863 (LOOP_DEP_BIT): Remove.
9864 (enum dep_kind): New.
9865 (enum dep_state): Likewise.
9866 (record_loop_dependence): New function to populate the
9868 (query_loop_dependence): New function to query the dependence
9870 (memory_accesses::refs_in_loop): Rename to ...
9871 (memory_accesses::refs_loaded_in_loop): ... this and change to
9873 (outermost_indep_loop): Adjust.
9874 (mem_ref_alloc): Likewise.
9875 (gather_mem_refs_stmt): Likewise.
9876 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
9877 (struct sm_aux): New.
9878 (execute_sm): Split code generation on exits, record state
9880 (enum sm_kind): New.
9881 (execute_sm_exit): Exit code generation part.
9882 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
9883 dependence checking on stores reached from exits.
9884 (sm_seq_valid_bb): New function gathering SM stores on exits.
9885 (hoist_memory_references): Re-implement.
9886 (refs_independent_p): Add tbaa_p parameter and pass it down.
9887 (record_dep_loop): Remove.
9888 (ref_indep_loop_p_1): Fold into ...
9889 (ref_indep_loop_p): ... this and generalize for three kinds
9890 of dependence queries.
9891 (can_sm_ref_p): Adjust according to hoist_memory_references
9893 (store_motion_loop): Don't do anything if the set of SM
9894 candidates is empty.
9895 (tree_ssa_lim_initialize): Adjust.
9896 (tree_ssa_lim_finalize): Likewise.
9898 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
9899 Pierre-Marie de Rodat <derodat@adacore.com>
9901 * dwarf2out.c (add_data_member_location_attribute): Take into account
9902 the variant part offset in the computation of the data bit offset.
9903 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
9904 in the call to field_byte_offset.
9905 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
9906 confusing assertion.
9907 (analyze_variant_discr): Deal with boolean subtypes.
9909 2020-05-07 Martin Liska <mliska@suse.cz>
9911 * lto-wrapper.c: Split arguments of MAKE environment
9914 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
9916 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
9917 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
9918 fenv_var and new_fenv_var.
9920 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9923 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
9925 (avx512dq_vextract<shuffletype>64x2_1_maskm,
9926 avx512f_vextract<shuffletype>32x4_1_maskm,
9927 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
9928 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
9930 (*avx512dq_vextract<shuffletype>64x2_1,
9931 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
9932 define_insns. Even in the masked variant allow memory output but in
9933 that case use 0 rather than 0C constraint on the source of masked-out
9935 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
9937 (*avx512f_vextract<shuffletype>32x4_1,
9938 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
9939 Even in the masked variant allow memory output but in that case use
9940 0 rather than 0C constraint on the source of masked-out elts.
9941 (vec_extract_lo_<mode><mask_name>): Split into ...
9942 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
9943 define_insns. Even in the masked variant allow memory output but in
9944 that case use 0 rather than 0C constraint on the source of masked-out
9946 (vec_extract_hi_<mode><mask_name>): Split into ...
9947 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
9948 define_insns. Even in the masked variant allow memory output but in
9949 that case use 0 rather than 0C constraint on the source of masked-out
9952 2020-05-06 qing zhao <qing.zhao@oracle.com>
9955 * common.opt: Add -flarge-source-files.
9956 * doc/invoke.texi: Document it.
9957 * toplev.c (process_options): set line_table->default_range_bits
9958 to 0 when flag_large_source_files is true.
9960 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
9963 * config/i386/predicates.md (add_comparison_operator): New predicate.
9964 * config/i386/i386.md (compare->add splitter): New splitters.
9966 2020-05-06 Richard Biener <rguenther@suse.de>
9968 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
9969 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
9970 Remove slp_instance parameter, just iterate over all scalar stmts.
9971 (vect_slp_analyze_instance_dependence): Adjust and likewise.
9972 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
9974 (vect_schedule_slp): Just iterate over all scalar stmts.
9975 (vect_supported_load_permutation_p): Adjust.
9976 (vect_transform_slp_perm_load): Remove slp_instance parameter,
9977 instead use the number of lanes in the node as group size.
9978 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
9979 factor instead of slp_instance as parameter.
9980 (vectorizable_load): Adjust.
9982 2020-05-06 Andreas Schwab <schwab@suse.de>
9984 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
9985 (aarch64_get_extension_string_for_isa_flags): Don't declare.
9987 2020-05-06 Richard Biener <rguenther@suse.de>
9990 * cfgloopmanip.c (create_preheader): Require non-complex
9991 preheader edge for CP_SIMPLE_PREHEADERS.
9993 2020-05-06 Richard Biener <rguenther@suse.de>
9995 PR tree-optimization/94963
9996 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
9997 no-warning marking of the conditional store.
9998 (execute_sm): Instead mark the uninitialized state
9999 on loop entry to be not warned about.
10001 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
10003 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
10004 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
10005 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
10006 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
10008 * config/i386/i386-builtin.def: Add new builtins.
10009 * config/i386/i386-c.c (ix86_target_macros_internal): Define
10011 * config/i386/i386-options.c (ix86_target_string): Add
10013 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
10014 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
10016 * config/i386/i386.md (define_c_enum "unspec"): Add
10017 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
10018 (TSXLDTRK): New define_int_iterator.
10019 ("<tsxldtrk>"): New define_insn.
10020 * config/i386/i386.opt: Add -mtsxldtrk.
10021 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
10022 * config/i386/tsxldtrkintrin.h: New.
10023 * doc/invoke.texi: Document -mtsxldtrk.
10025 2020-05-06 Jakub Jelinek <jakub@redhat.com>
10027 PR tree-optimization/94921
10028 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
10031 2020-05-06 Richard Biener <rguenther@suse.de>
10033 PR tree-optimization/94965
10034 * tree-vect-stmts.c (vectorizable_load): Fix typo.
10036 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
10038 * doc/install.texi: Replace Sun with Solaris as appropriate.
10039 (Tools/packages necessary for building GCC, Perl version between
10040 5.6.1 and 5.6.24): Remove Solaris 8 reference.
10041 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
10043 (Specific, i?86-*-solaris2*): Update version references for
10044 Solaris 11.3 and later. Remove gas 2.26 caveat.
10045 (Specific, *-*-solaris2*): Update version references for
10046 Solaris 11.3 and later. Remove boehm-gc reference.
10047 Document GMP, MPFR caveats on Solaris 11.3.
10048 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
10049 (Specific, sparc64-*-solaris2*): Likewise.
10050 Document --build requirement.
10052 2020-05-06 Jakub Jelinek <jakub@redhat.com>
10055 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
10056 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
10058 PR rtl-optimization/94873
10059 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
10060 note if SET_SRC (set) has side-effects.
10062 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
10063 Wei Xiao <wei3.xiao@intel.com>
10065 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
10066 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
10067 (ix86_handle_option): Handle -mserialize.
10068 * config.gcc (serializeintrin.h): New header file.
10069 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
10070 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
10072 * config/i386/i386-builtin.def: Add new builtin.
10073 * config/i386/i386-c.c (__SERIALIZE__): New macro.
10074 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
10076 * (ix86_valid_target_attribute_inner_p): Add target attribute
10078 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
10080 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
10081 (serialize): New define_insn.
10082 * config/i386/i386.opt (mserialize): New option
10083 * config/i386/immintrin.h: Include serailizeintrin.h.
10084 * config/i386/serializeintrin.h: New header file.
10085 * doc/invoke.texi: Add documents for -mserialize.
10087 2020-05-06 Richard Biener <rguenther@suse.de>
10089 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
10090 to/from pointer conversion checking.
10092 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
10094 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
10096 * config/rs6000/rs6000-c.c: Likewise.
10097 * config/rs6000/rs6000-call.c: Likewise.
10098 * config/rs6000/rs6000.c: Likewise.
10100 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
10102 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
10103 (RTEMS_ENDFILE_SPEC): Likewise.
10104 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
10105 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
10106 (LIB_SPECS): Support -nodefaultlibs option.
10107 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
10108 (RTEMS_ENDFILE_SPEC): Likewise.
10109 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
10110 (RTEMS_ENDFILE_SPEC): Likewise.
10111 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
10112 (RTEMS_ENDFILE_SPEC): Likewise.
10114 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10116 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
10117 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
10119 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10121 * config/pru/pru.h: Mark R3.w0 as caller saved.
10123 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10125 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
10126 and gen_doloop_begin_internal.
10127 (pru_reorg_loop): Use gen_pruloop with mode.
10128 * config/pru/pru.md: Use new @insn syntax.
10130 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
10132 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
10134 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
10136 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
10137 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
10138 (addqi3_cconly_overflow): Ditto.
10139 (umulv<mode>4): Ditto.
10140 (<s>mul<mode>3_highpart): Ditto.
10141 (tls_global_dynamic_32): Ditto.
10142 (tls_local_dynamic_base_32): Ditto.
10149 (*adddi_4): Remove "m" constraint from scratch operand.
10150 (*add<mode>_4): Ditto.
10152 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10154 PR rtl-optimization/94516
10155 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
10156 with sp = reg, add REG_EQUAL note with sp + const.
10157 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
10158 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
10159 postreload sp = sp + const to sp = reg optimization if needed and
10161 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
10162 reg = sp insn with sp + const REG_EQUAL note. Adjust
10163 try_apply_stack_adjustment caller, call
10164 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
10165 (combine_stack_adjustments): Allocate and free LIVE bitmap,
10166 adjust combine_stack_adjustments_for_block caller.
10168 2020-05-05 Martin Liska <mliska@suse.cz>
10170 PR gcov-profile/93623
10171 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
10174 2020-05-05 Martin Liska <mliska@suse.cz>
10176 * opt-functions.awk (opt_args_non_empty): New function.
10177 * opt-read.awk: Use the function for various option arguments.
10179 2020-05-05 Martin Liska <mliska@suse.cz>
10182 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
10183 report warning when the jobserver is not detected.
10185 2020-05-05 Martin Liska <mliska@suse.cz>
10187 PR gcov-profile/94636
10188 * gcov.c (main): Print total lines summary at the end.
10189 (generate_results): Expect file_name always being non-null.
10190 Print newline after intermediate file is printed in order to align with
10191 what we do for normal files.
10193 2020-05-05 Martin Liska <mliska@suse.cz>
10195 * dumpfile.c (dump_switch_p): Change return type
10196 and print option suggestion.
10197 * dumpfile.h: Change return type.
10198 * opts-global.c (handle_common_deferred_options):
10199 Move error into dump_switch_p function.
10201 2020-05-05 Martin Liska <mliska@suse.cz>
10204 * alloc-pool.h: Use const for some arguments.
10205 * bitmap.h: Likewise.
10206 * mem-stats.h: Likewise.
10207 * sese.h (get_entry_bb): Likewise.
10208 (get_exit_bb): Likewise.
10210 2020-05-05 Richard Biener <rguenther@suse.de>
10212 * tree-vect-slp.c (struct vdhs_data): New.
10213 (vect_detect_hybrid_slp): New walker.
10214 (vect_detect_hybrid_slp): Rewrite.
10216 2020-05-05 Richard Biener <rguenther@suse.de>
10219 * tree-ssa-structalias.c (ipa_pta_execute): Use
10220 varpool_node::externally_visible_p ().
10221 (refered_from_nonlocal_var): Likewise.
10223 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
10225 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
10226 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
10227 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
10229 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
10231 * gimplify.c (gimplify_init_constructor): Do not put the constructor
10232 into static memory if it is not complete.
10234 2020-05-05 Richard Biener <rguenther@suse.de>
10236 PR tree-optimization/94949
10237 * tree-ssa-loop-im.c (execute_sm): Check whether we use
10238 the multithreaded model or always compute the stored value
10239 before eliding a load.
10241 2020-05-05 Alex Coplan <alex.coplan@arm.com>
10243 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
10245 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10247 PR tree-optimization/94800
10248 * match.pd (X + (X << C) to X * (1 + (1 << C)),
10249 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
10253 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
10255 PR tree-optimization/94914
10256 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
10257 New simplification.
10259 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
10261 * config/i386/i386.md (*testqi_ext_3): Use
10262 int_nonimmediate_operand instead of manual mode checks.
10263 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
10264 Use int_nonimmediate_operand predicate. Rewrite
10265 define_insn_and_split pattern to a combine pass splitter.
10267 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
10269 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
10270 * configure: Regenerate.
10272 2020-05-05 Jakub Jelinek <jakub@redhat.com>
10275 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
10276 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
10277 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
10278 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
10280 2020-05-04 Clement Chigot <clement.chigot@atos.net>
10281 David Edelsohn <dje.gcc@gmail.com>
10283 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
10284 for fmodl, frexpl, ldexpl and modfl builtins.
10286 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
10288 PR middle-end/94941
10289 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
10290 chosen lhs is different from the gcall lhs.
10291 (expand_mask_load_optab_fn): Likewise.
10292 (expand_gather_load_optab_fn): Likewise.
10294 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
10297 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
10298 (EQ compare->LTU compare splitter): New splitter.
10299 (NE compare->NEG splitter): Ditto.
10301 2020-05-04 Marek Polacek <polacek@redhat.com>
10304 2020-04-30 Marek Polacek <polacek@redhat.com>
10307 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
10308 (check_aligned_type): Check if TYPE_USER_ALIGN match.
10310 2020-05-04 Richard Biener <rguenther@suse.de>
10312 PR tree-optimization/93891
10313 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
10314 the original reference tree for assessing access alignment.
10316 2020-05-04 Richard Biener <rguenther@suse.de>
10318 PR tree-optimization/39612
10319 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
10320 (set_ref_loaded_in_loop): New.
10321 (mark_ref_loaded): Likewise.
10322 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
10323 (execute_sm): Avoid issueing a load when it was not there.
10324 (execute_sm_if_changed): Avoid issueing warnings for the
10327 2020-05-04 Martin Jambor <mjambor@suse.cz>
10330 * tree-inline.c (tree_function_versioning): Leave any type conversion
10331 of replacements to setup_one_parameter and its friend
10332 force_value_to_type.
10334 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
10337 * config/i386/predicates.md (shr_comparison_operator): New predicate.
10338 * config/i386/i386.md (compare->shr splitter): New splitters.
10340 2020-05-04 Jakub Jelinek <jakub@redhat.com>
10342 PR tree-optimization/94718
10343 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
10345 PR tree-optimization/94718
10346 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
10347 replace two nop conversions on bit_{and,ior,xor} argument
10348 and result with just one conversion on the result or another argument.
10350 PR tree-optimization/94718
10351 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
10352 -> (X ^ Y) & C eqne 0 optimization to ...
10353 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
10355 * opts.c (get_option_html_page): Instead of hardcoding a list of
10356 options common between C/C++ and Fortran only use gfortran/
10357 documentation for warnings that have CL_Fortran set but not
10360 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
10362 * config/i386/i386-expand.c (ix86_expand_int_movcc):
10363 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
10364 (emit_memmov): Ditto.
10365 (emit_memset): Ditto.
10366 (ix86_expand_strlensi_unroll_1): Ditto.
10367 (release_scratch_register_on_entry): Ditto.
10368 (gen_frame_set): Ditto.
10369 (ix86_emit_restore_reg_using_pop): Ditto.
10370 (ix86_emit_outlined_ms2sysv_restore): Ditto.
10371 (ix86_expand_epilogue): Ditto.
10372 (ix86_expand_split_stack_prologue): Ditto.
10373 * config/i386/i386.md (push immediate splitter): Ditto.
10377 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
10379 PR translation/93861
10380 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
10383 2020-05-02 Jakub Jelinek <jakub@redhat.com>
10385 * config/tilegx/tilegx.md
10386 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
10387 rather than just <n>.
10389 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
10392 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
10393 and crtl->patch_area_entry.
10394 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
10395 * opts.c (common_handle_option): Limit
10396 function_entry_patch_area_size and function_entry_patch_area_start
10397 to USHRT_MAX. Fix a typo in error message.
10398 * varasm.c (assemble_start_function): Use crtl->patch_area_size
10399 and crtl->patch_area_entry.
10400 * doc/invoke.texi: Document the maximum value for
10401 -fpatchable-function-entry.
10403 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
10405 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
10406 Override SUBTARGET_SHADOW_OFFSET macro.
10408 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
10410 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
10411 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
10412 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
10413 * config/i386/freebsd.h: Likewise.
10414 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
10415 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
10417 2020-04-30 Alexandre Oliva <oliva@adacore.com>
10419 * doc/sourcebuild.texi (Effective-Target Keywords): Document
10420 the newly-introduced fileio effective target.
10422 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
10424 PR rtl-optimization/94740
10425 * cse.c (cse_process_notes_1): Replace with...
10426 (cse_process_note_1): ...this new function, acting as a
10427 simplify_replace_fn_rtx callback to process_note. Handle only
10428 REGs and MEMs directly. Validate the MEM if cse_process_note
10429 changes its address.
10430 (cse_process_notes): Replace with...
10431 (cse_process_note): ...this new function.
10432 (cse_extended_basic_block): Update accordingly, iterating over
10433 the register notes and passing individual notes to cse_process_note.
10435 2020-04-30 Carl Love <cel@us.ibm.com>
10437 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
10439 2020-04-30 Martin Jambor <mjambor@suse.cz>
10442 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
10443 saved by the inliner and thunks which had their call inlined.
10444 * ipa-inline-transform.c (save_inline_function_body): Fill in
10445 former_clone_of of new body holders.
10447 2020-04-30 Jakub Jelinek <jakub@redhat.com>
10449 * BASE-VER: Set to 11.0.0.
10451 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
10453 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
10455 2020-04-30 Marek Polacek <polacek@redhat.com>
10458 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
10459 (check_aligned_type): Check if TYPE_USER_ALIGN match.
10461 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10463 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
10464 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
10465 * doc/invoke.texi (moutline-atomics): Document as on by default.
10467 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
10470 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
10471 the check for NOTE_INSN_DELETED_LABEL.
10473 2020-04-30 Jakub Jelinek <jakub@redhat.com>
10475 * configure.ac (--with-documentation-root-url,
10476 --with-changes-root-url): Diagnose URL not ending with /,
10477 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
10478 * opts.h (get_changes_url): Remove.
10479 * opts.c (get_changes_url): Remove.
10480 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
10481 or -DCHANGES_ROOT_URL.
10482 * doc/install.texi (--with-documentation-root-url,
10483 --with-changes-root-url): Document.
10484 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
10485 get_changes_url and free, change url variable type to const char * and
10486 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
10487 * config/s390/s390.c (s390_function_arg_vector,
10488 s390_function_arg_float): Likewise.
10489 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
10491 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
10493 * config.in: Regenerate.
10494 * configure: Regenerate.
10496 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
10499 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
10501 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
10503 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
10504 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
10506 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
10508 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
10509 Change constraint for vlrl/vstrl to jb4.
10511 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10513 * var-tracking.c (vt_initialize): Move variables pre and post
10514 into inner block and initialize both in order to fix warning
10515 about uninitialized use. Remove unnecessary checks for
10516 frame_pointer_needed.
10518 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10520 * toplev.c (output_stack_usage_1): Ensure that first
10521 argument to fprintf is not null.
10523 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10525 * configure.ac (-with-changes-root-url): New configure option,
10526 defaulting to https://gcc.gnu.org/.
10527 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
10529 * pretty-print.c (get_end_url_string): New function.
10530 (pp_format): Handle %{ and %} for URLs.
10531 (pp_begin_url): Use pp_string instead of pp_printf.
10532 (pp_end_url): Use get_end_url_string.
10533 * opts.h (get_changes_url): Declare.
10534 * opts.c (get_changes_url): New function.
10535 * config/rs6000/rs6000-call.c: Include opts.h.
10536 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
10537 of just in GCC 10.1 in diagnostics and add URL.
10538 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
10539 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
10541 * config/s390/s390.c (s390_function_arg_vector,
10542 s390_function_arg_float): Likewise.
10543 * configure: Regenerated.
10546 * config/s390/s390.c (s390_function_arg_vector,
10547 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
10548 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
10549 passed to the function rather than the type of the single element.
10550 Rename cxx17_empty_base_seen variable to empty_base_seen, change
10551 type to int, and adjust diagnostics depending on if the field
10552 has [[no_unique_attribute]] or not.
10555 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
10556 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
10557 used in casts into parens.
10558 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
10559 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
10560 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
10561 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
10562 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
10563 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
10564 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
10565 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
10566 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
10567 _mm256_mask_cmp_epu8_mask): Likewise.
10568 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
10569 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
10570 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
10571 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
10574 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
10575 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
10576 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
10577 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
10578 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
10579 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
10580 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
10581 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
10582 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
10583 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
10584 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
10585 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
10586 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
10588 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
10589 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
10590 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
10591 as mask vector containing -1.0 or -1.0f elts, but instead vector
10592 with all bits set using _mm*_cmpeq_p? with zero operands.
10593 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
10594 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
10595 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
10596 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
10597 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
10598 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
10599 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
10600 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
10601 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
10602 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
10603 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
10604 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
10605 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
10606 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
10607 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
10608 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
10609 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
10611 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
10612 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
10613 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
10614 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
10615 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
10616 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
10617 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
10618 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
10619 _mm512_mask_prefetch_i64scatter_ps): Likewise.
10620 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
10621 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
10622 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
10623 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
10624 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
10625 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
10626 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
10627 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
10628 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
10629 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
10630 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
10631 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
10632 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
10633 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
10634 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
10635 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
10636 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
10637 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
10638 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
10639 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
10640 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
10641 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
10642 _mm_mask_i64scatter_epi64): Likewise.
10644 2020-04-29 Jeff Law <law@redhat.com>
10646 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
10647 division instructions are 4 bytes long.
10649 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10652 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
10653 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
10654 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
10655 take address of TARGET_EXPR of fenv_var with void_node initializer.
10658 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10660 PR tree-optimization/94774
10661 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
10664 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10666 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
10667 * calls.c (cxx17_empty_base_field_p): New function. Check
10668 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
10671 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
10674 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
10675 Allow -fcf-protection with -mindirect-branch=thunk-extern and
10676 -mfunction-return=thunk-extern.
10677 * doc/invoke.texi: Update notes for -fcf-protection=branch with
10678 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
10680 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10682 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
10684 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10686 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
10687 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
10688 fenv_var and new_fenv_var.
10690 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10692 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
10693 effective-target keyword.
10694 (arm_arch_v8a_hard_multilib): Likewise.
10695 (arm_arch_v8a_hard): Document new dg-add-options keyword.
10696 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
10697 code is deprecated and has not been updated to handle
10698 DECL_FIELD_ABI_IGNORED.
10699 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
10700 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
10701 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
10702 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
10703 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
10704 something actually is a HFA or HVA. Record whether we see a
10705 [[no_unique_address]] field that previous GCCs would not have
10706 ignored in this way.
10707 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
10708 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
10709 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
10710 diagnostic messages.
10711 (arm_needs_doubleword_align): Add a comment explaining why we
10712 consider even zero-sized fields.
10714 2020-04-29 Richard Biener <rguenther@suse.de>
10715 Li Zekun <lizekun1@huawei.com>
10718 * tree.c (component_ref_size): Guard against error_mark_node
10719 DECL_INITIAL as it happens with LTO.
10721 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10723 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
10724 comment explaining why we consider even zero-sized fields.
10725 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
10726 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
10727 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
10728 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
10729 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
10730 something actually is a HFA or HVA. Record whether we see a
10731 [[no_unique_address]] field that previous GCCs would not have
10732 ignored in this way.
10733 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
10734 whether diagnostics should be suppressed. Update the calls to
10735 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
10736 [[no_unique_address]] case.
10737 (aarch64_return_in_msb): Update call accordingly, never silencing
10739 (aarch64_function_value): Likewise.
10740 (aarch64_return_in_memory_1): Likewise.
10741 (aarch64_init_cumulative_args): Likewise.
10742 (aarch64_gimplify_va_arg_expr): Likewise.
10743 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
10744 use it to decide whether arch64_vfp_is_call_or_return_candidate
10746 (aarch64_pass_by_reference): Update calls accordingly.
10747 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
10748 to decide whether arch64_vfp_is_call_or_return_candidate should be
10751 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
10754 * config/aarch64/aarch64-builtins.c
10755 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
10756 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
10759 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
10761 * configure.ac <$enable_offload_targets>: Do parsing as done
10763 * configure: Regenerate.
10765 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
10766 * configure: Regenerate.
10769 * rtlanal.c (set_noop_p): Handle non-constant selectors.
10772 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
10774 (TARGET_EXCEPT_UNWIND_INFO): Define.
10776 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10779 * config/gcn/gcn.md (*mov<mode>_insn): Use
10780 'reg_overlap_mentioned_p' to check for overlap.
10783 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
10784 instead of cxx17_empty_base_field_p.
10787 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
10788 DECL_FIELD_ABI_IGNORED.
10789 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
10790 * calls.h (cxx17_empty_base_field_p): Change into a temporary
10791 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
10793 * calls.c (cxx17_empty_base_field_p): Remove.
10794 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
10795 DECL_FIELD_ABI_IGNORED.
10796 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
10797 * lto-streamer-out.c (hash_tree): Likewise.
10798 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
10799 cxx17_empty_base_seen to empty_base_seen, change type to int *,
10800 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
10801 cxx17_empty_base_field_p, if "no_unique_address" attribute is
10802 present, propagate that to the caller too.
10803 (rs6000_discover_homogeneous_aggregate): Adjust
10804 rs6000_aggregate_candidate caller, emit different diagnostics
10805 when c++17 empty base fields are present and when empty
10806 [[no_unique_address]] fields are present.
10807 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
10808 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
10811 2020-04-29 Richard Biener <rguenther@suse.de>
10813 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
10814 Just check whether the stmt stores.
10816 2020-04-28 Alexandre Oliva <oliva@adacore.com>
10819 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
10820 output operand in emulation. Don't overwrite pseudos.
10822 2020-04-28 Jeff Law <law@redhat.com>
10824 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
10825 multiply patterns are 4 bytes long.
10827 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10829 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
10830 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
10832 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
10833 Jakub Jelinek <jakub@redhat.com>
10836 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
10837 base class artificial fields.
10838 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
10839 decision is different after this fix.
10841 2020-04-28 David Malcolm <dmalcolm@redhat.com>
10847 * doc/invoke.texi (Static Analyzer Options): Remove
10848 -Wanalyzer-use-of-uninitialized-value.
10849 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
10851 2020-04-28 Jakub Jelinek <jakub@redhat.com>
10853 PR tree-optimization/94809
10854 * tree.c (build_call_expr_internal_loc_array): Call
10855 process_call_operands.
10857 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
10859 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
10860 * config/aarch64/aarch64-tune.md: Regenerate.
10861 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
10862 (thunderx3t110_regmove_cost): Likewise.
10863 (thunderx3t110_vector_cost): Likewise.
10864 (thunderx3t110_prefetch_tune): Likewise.
10865 (thunderx3t110_tunings): Likewise.
10866 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
10868 * config/aarch64/thunderx3t110.md: New file.
10869 * config/aarch64/aarch64.md: Include thunderx3t110.md.
10870 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
10872 2020-04-28 Jakub Jelinek <jakub@redhat.com>
10875 * config/s390/s390.c (s390_function_arg_vector,
10876 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
10878 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
10880 PR tree-optimization/94727
10881 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
10882 operands are invariant booleans, use the mask type associated with the
10883 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
10884 (vectorizable_condition): Pass vectype unconditionally to
10885 vect_is_simple_cond.
10887 2020-04-27 Jakub Jelinek <jakub@redhat.com>
10890 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
10891 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
10892 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
10894 2020-04-27 David Malcolm <dmalcolm@redhat.com>
10897 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
10898 default value, so that it can by supplied by get_option_html_page.
10899 * configure: Regenerate.
10900 * opts.c: Include "selftest.h".
10901 (get_option_html_page): New function.
10902 (get_option_url): Use it. Reformat to place comments next to the
10903 expressions they refer to.
10904 (selftest::test_get_option_html_page): New.
10905 (selftest::opts_c_tests): New.
10906 * selftest-run-tests.c (selftest::run_tests): Call
10907 selftest::opts_c_tests.
10908 * selftest.h (selftest::opts_c_tests): New decl.
10910 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
10912 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
10913 UINTVAL to CONST_INTs.
10915 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10917 * config/arm/constraints.md (e): Remove constraint.
10918 (Te): Define constraint.
10919 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
10920 operand 0 from "e" to "Te".
10921 (vaddvaq_<supf><mode>): Likewise.
10922 (vaddvq_p_<supf><mode>): Likewise.
10923 (vmladavq_<supf><mode>): Likewise.
10924 (vmladavxq_s<mode>): Likewise.
10925 (vmlsdavq_s<mode>): Likewise.
10926 (vmlsdavxq_s<mode>): Likewise.
10927 (vaddvaq_p_<supf><mode>): Likewise.
10928 (vmladavaq_<supf><mode>): Likewise.
10929 (vmladavq_p_<supf><mode>): Likewise.
10930 (vmladavxq_p_s<mode>): Likewise.
10931 (vmlsdavq_p_s<mode>): Likewise.
10932 (vmlsdavxq_p_s<mode>): Likewise.
10933 (vmlsdavaxq_s<mode>): Likewise.
10934 (vmlsdavaq_s<mode>): Likewise.
10935 (vmladavaxq_s<mode>): Likewise.
10936 (vmladavaq_p_<supf><mode>): Likewise.
10937 (vmladavaxq_p_s<mode>): Likewise.
10938 (vmlsdavaq_p_s<mode>): Likewise.
10939 (vmlsdavaxq_p_s<mode>): Likewise.
10941 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
10943 * config/arm/arm.c (output_move_neon): Only get the first operand if
10946 2020-04-27 Felix Yang <felix.yang@huawei.com>
10948 PR tree-optimization/94784
10949 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
10950 assert around so that it checks that the two vectors have equal
10951 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
10952 types is a useless_type_conversion_p.
10954 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
10957 * dwarf2cfi.c (struct GTY): Add ra_mangled.
10958 (cfi_row_equal_p): Check ra_mangled.
10959 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
10960 this only handles the sparc logic now.
10961 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
10962 the aarch64 specific logic.
10963 (dwarf2out_frame_debug): Update to use the new subroutines.
10964 (change_cfi_row): Check ra_mangled.
10966 2020-04-27 Jakub Jelinek <jakub@redhat.com>
10969 * config/s390/s390.c (s390_function_arg_vector,
10970 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
10972 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
10974 * common/config/rs6000/rs6000-common.c
10975 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
10977 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
10980 2020-04-27 Martin Liska <mliska@suse.cz>
10983 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
10984 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
10986 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
10989 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
10991 (rs6000_emit_prologue_components):
10992 Check with frame_pointer_needed_indeed.
10993 (rs6000_emit_epilogue_components): Likewise.
10994 (rs6000_emit_prologue): Likewise.
10995 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
10997 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
10999 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
11000 stack frame when debugging and flag_compare_debug is enabled.
11002 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
11004 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
11005 enable PC-relative addressing for -mcpu=future.
11006 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
11007 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
11008 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
11009 suppress PC-relative addressing.
11010 (rs6000_option_override_internal): Split up error messages
11011 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
11012 system supports it.
11014 2020-04-25 Jakub Jelinek <jakub@redhat.com>
11015 Richard Biener <rguenther@suse.de>
11017 PR tree-optimization/94734
11018 PR tree-optimization/89430
11019 * tree-ssa-phiopt.c: Include tree-eh.h.
11020 (cond_store_replacement): Return false if an automatic variable
11021 access could trap. If -fstore-data-races, don't return false
11022 just because an automatic variable is addressable.
11024 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
11026 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
11028 (add<mode>_sext_dup2_exec): Likewise.
11030 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
11033 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
11034 endian byteshift_val calculation.
11036 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
11038 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
11040 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
11042 * config/aarch64/arm_sve.h: Add a comment.
11044 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
11046 PR rtl-optimization/94708
11047 * combine.c (simplify_if_then_else): Add check for
11048 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
11050 2020-04-23 Martin Sebor <msebor@redhat.com>
11053 * common.opt (-Wno-frame-larger-than): New option.
11054 (-Wno-larger-than, -Wno-stack-usage): Same.
11056 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
11058 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
11060 (mov<mode>_exec): Likewise.
11061 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
11062 (<convop><mode><vndi>2_exec): Likewise.
11064 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
11066 PR tree-optimization/94717
11067 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
11068 of the stores doesn't have the same landing pad number as the first.
11069 (coalesce_immediate_stores): Do not try to coalesce the store using
11070 bswap if it doesn't have the same landing pad number as the first.
11072 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
11074 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
11075 Replace outdated link to ELFv2 ABI.
11077 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11080 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
11083 PR middle-end/94724
11084 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
11085 temporarily with non-final second operand and updating it later,
11086 push COMPOUND_EXPRs into a vector and process it in reverse,
11087 creating COMPOUND_EXPRs with the final operands.
11089 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
11092 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
11093 bti c and bti j handling.
11095 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
11096 Thomas Schwinge <thomas@codesourcery.com>
11098 PR middle-end/93488
11100 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
11101 t_async and the wait arguments.
11103 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
11105 PR tree-optimization/94727
11106 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
11107 comparing invariant scalar booleans.
11109 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
11110 Jakub Jelinek <jakub@redhat.com>
11113 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
11114 empty base class artificial fields.
11115 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
11116 different after this fix.
11118 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11121 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
11122 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
11123 if the same type has been diagnosed most recently already.
11125 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11127 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
11129 (__arm_vbicq_n_s16): Likewise.
11130 (__arm_vbicq_n_u32): Likewise.
11131 (__arm_vbicq_n_s32): Likewise.
11132 (__arm_vbicq): Likewise.
11133 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
11134 (__arm_vbicq_n_s32): Likewise.
11135 (__arm_vbicq_n_u16): Likewise.
11136 (__arm_vbicq_n_u32): Likewise.
11137 (__arm_vdupq_m_n_s8): Likewise.
11138 (__arm_vdupq_m_n_s16): Likewise.
11139 (__arm_vdupq_m_n_s32): Likewise.
11140 (__arm_vdupq_m_n_u8): Likewise.
11141 (__arm_vdupq_m_n_u16): Likewise.
11142 (__arm_vdupq_m_n_u32): Likewise.
11143 (__arm_vdupq_m_n_f16): Likewise.
11144 (__arm_vdupq_m_n_f32): Likewise.
11145 (__arm_vldrhq_gather_offset_s16): Likewise.
11146 (__arm_vldrhq_gather_offset_s32): Likewise.
11147 (__arm_vldrhq_gather_offset_u16): Likewise.
11148 (__arm_vldrhq_gather_offset_u32): Likewise.
11149 (__arm_vldrhq_gather_offset_f16): Likewise.
11150 (__arm_vldrhq_gather_offset_z_s16): Likewise.
11151 (__arm_vldrhq_gather_offset_z_s32): Likewise.
11152 (__arm_vldrhq_gather_offset_z_u16): Likewise.
11153 (__arm_vldrhq_gather_offset_z_u32): Likewise.
11154 (__arm_vldrhq_gather_offset_z_f16): Likewise.
11155 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
11156 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
11157 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
11158 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
11159 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
11160 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
11161 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
11162 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
11163 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
11164 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
11165 (__arm_vldrwq_gather_offset_s32): Likewise.
11166 (__arm_vldrwq_gather_offset_u32): Likewise.
11167 (__arm_vldrwq_gather_offset_f32): Likewise.
11168 (__arm_vldrwq_gather_offset_z_s32): Likewise.
11169 (__arm_vldrwq_gather_offset_z_u32): Likewise.
11170 (__arm_vldrwq_gather_offset_z_f32): Likewise.
11171 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
11172 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
11173 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
11174 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
11175 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
11176 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
11177 (__arm_vdwdupq_x_n_u8): Likewise.
11178 (__arm_vdwdupq_x_n_u16): Likewise.
11179 (__arm_vdwdupq_x_n_u32): Likewise.
11180 (__arm_viwdupq_x_n_u8): Likewise.
11181 (__arm_viwdupq_x_n_u16): Likewise.
11182 (__arm_viwdupq_x_n_u32): Likewise.
11183 (__arm_vidupq_x_n_u8): Likewise.
11184 (__arm_vddupq_x_n_u8): Likewise.
11185 (__arm_vidupq_x_n_u16): Likewise.
11186 (__arm_vddupq_x_n_u16): Likewise.
11187 (__arm_vidupq_x_n_u32): Likewise.
11188 (__arm_vddupq_x_n_u32): Likewise.
11189 (__arm_vldrdq_gather_offset_s64): Likewise.
11190 (__arm_vldrdq_gather_offset_u64): Likewise.
11191 (__arm_vldrdq_gather_offset_z_s64): Likewise.
11192 (__arm_vldrdq_gather_offset_z_u64): Likewise.
11193 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
11194 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
11195 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
11196 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
11197 (__arm_vidupq_m_n_u8): Likewise.
11198 (__arm_vidupq_m_n_u16): Likewise.
11199 (__arm_vidupq_m_n_u32): Likewise.
11200 (__arm_vddupq_m_n_u8): Likewise.
11201 (__arm_vddupq_m_n_u16): Likewise.
11202 (__arm_vddupq_m_n_u32): Likewise.
11203 (__arm_vidupq_n_u16): Likewise.
11204 (__arm_vidupq_n_u32): Likewise.
11205 (__arm_vidupq_n_u8): Likewise.
11206 (__arm_vddupq_n_u16): Likewise.
11207 (__arm_vddupq_n_u32): Likewise.
11208 (__arm_vddupq_n_u8): Likewise.
11210 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
11212 * doc/install.texi (D-Specific Options): Document
11213 --enable-libphobos-checking and --with-libphobos-druntime-only.
11215 2020-04-23 Jakub Jelinek <jakub@redhat.com>
11218 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
11219 cxx17_empty_base_seen argument. Pass it to recursive calls.
11220 Ignore cxx17_empty_base_field_p fields after setting
11221 *cxx17_empty_base_seen to true.
11222 (rs6000_discover_homogeneous_aggregate): Adjust
11223 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
11224 aggregates with C++17 empty base fields.
11227 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
11228 if last_decl is error_mark_node or has such a TREE_TYPE.
11231 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
11232 if last_decl is error_mark_node or has such a TREE_TYPE.
11234 2020-04-22 Felix Yang <felix.yang@huawei.com>
11237 * config/aarch64/aarch64.h (TARGET_SVE):
11238 Add && !TARGET_GENERAL_REGS_ONLY.
11239 (TARGET_SVE2): Add && TARGET_SVE.
11240 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
11241 TARGET_SVE2_SM4): Add && TARGET_SVE2.
11242 * config/aarch64/aarch64-sve-builtins.h
11243 (sve_switcher::m_old_general_regs_only): New member.
11244 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
11246 (reported_missing_registers_p): New variable.
11247 (check_required_extensions): Call check_required_registers before
11248 return if all required extenstions are present.
11249 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
11250 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
11251 global_options.x_target_flags.
11252 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
11253 global_options.x_target_flags if m_old_general_regs_only is true.
11255 2020-04-22 Zackery Spytz <zspytz@gmail.com>
11257 * doc/extend.exi: Add "free" to list of other builtin functions
11260 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
11263 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
11264 if TARGET_PREFIXED.
11265 (store_quadpti): Ditto.
11266 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
11267 plq will be used and doesn't need it.
11268 (atomic_store<mode>): Ditto, for pstq.
11270 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
11272 * doc/invoke.texi: Update flags turned on by -O3.
11274 2020-04-22 Jakub Jelinek <jakub@redhat.com>
11277 * config/ia64/ia64.c (hfa_element_mode): Ignore
11278 cxx17_empty_base_field_p fields.
11281 * calls.h (cxx17_empty_base_field_p): Declare.
11282 * calls.c (cxx17_empty_base_field_p): Define.
11284 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
11286 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
11288 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11289 Andre Vieira <andre.simoesdiasvieira@arm.com>
11290 Mihail Ionescu <mihail.ionescu@arm.com>
11292 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
11293 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
11294 (ALL_QUIRKS): Add quirk_no_asmcpu.
11295 (cortex-m55): Define new cpu.
11296 * config/arm/arm-tables.opt: Regenerate.
11297 * config/arm/arm-tune.md: Likewise.
11298 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
11300 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
11302 PR tree-optimization/94700
11303 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
11304 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
11305 of similarly-structured but distinct vector types.
11307 2020-04-21 Martin Sebor <msebor@redhat.com>
11309 PR middle-end/94647
11310 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
11311 the computation of the lower bound of the source access size.
11312 (builtin_access::generic_overlap): Remove a hack for setting ranges
11313 of overlap offsets.
11315 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
11317 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
11318 (ASM_WEAKEN_DECL): New define.
11319 (HAVE_GAS_WEAKREF): Undefine.
11321 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
11323 PR tree-optimization/94683
11324 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
11325 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
11326 but distinct vector types.
11328 2020-04-21 Jakub Jelinek <jakub@redhat.com>
11331 * stor-layout.c (place_field, finalize_record_size): Don't emit
11332 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
11333 * ubsan.c (ubsan_get_type_descriptor_type,
11334 ubsan_get_source_location_type, ubsan_create_data): Set
11336 * asan.c (asan_global_struct): Likewise.
11338 2020-04-21 Duan bo <duanbo3@huawei.com>
11341 * config/aarch64/aarch64.c: Add an error message for option conflict.
11342 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
11343 incompatible with -fpic, -fPIC and -mabi=ilp32.
11345 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
11348 * omp-low.c (new_omp_context): Remove assignments to
11349 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
11351 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
11353 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
11354 ("popcountv2di2_vx"): Use simplify_gen_subreg.
11356 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
11359 * config/s390/s390-builtin-types.def: Add 3 new function modes.
11360 * config/s390/s390-builtins.def: Add mode dependent low-level
11361 builtin and map the overloaded builtins to these.
11362 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
11363 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
11365 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
11367 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
11368 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
11369 estimated VF and is no worse at double the estimated VF.
11371 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
11374 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
11375 order of arguments to rtx_vector_builder.
11376 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
11377 When extending the trailing constants to a full vector, replace any
11378 variables with zeros.
11380 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
11383 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
11386 2020-04-20 Martin Liska <mliska@suse.cz>
11388 * symtab.c (symtab_node::dump_references): Add space after
11390 (symtab_node::dump_referring): Likewise.
11392 2020-04-18 Jeff Law <law@redhat.com>
11395 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
11398 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
11400 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
11401 attributes): Document d_runtime_has_std_library.
11403 2020-04-17 Jeff Law <law@redhat.com>
11405 PR rtl-optimization/90275
11406 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
11407 when the destination has a REG_UNUSED note.
11409 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
11411 PR middle-end/94635
11412 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
11415 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
11417 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
11418 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
11419 cost of load and store insns if one loop iteration has enough scalar
11420 elements to use an Advanced SIMD LDP or STP.
11421 (aarch64_add_stmt_cost): Update call accordingly.
11423 2020-04-17 Jakub Jelinek <jakub@redhat.com>
11424 Jeff Law <law@redhat.com>
11427 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
11428 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
11429 or pos + len >= 32, or pos + len is equal to operands[2] precision
11430 and operands[2] is not a register operand. During splitting perform
11431 SImode AND if operands[0] doesn't have CCZmode and pos + len is
11432 equal to mode precision.
11434 2020-04-17 Richard Biener <rguenther@suse.de>
11437 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
11439 * dwarf2out.c (dw_val_equal_p): Fix pasto in
11440 dw_val_class_vms_delta comparison.
11441 * optabs.c (expand_binop_directly): Fix pasto in commutation
11443 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
11446 2020-04-17 Jakub Jelinek <jakub@redhat.com>
11448 PR rtl-optimization/94618
11449 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
11450 insn is the BB_END of its block, but also when it is only followed
11451 by DEBUG_INSNs in its block.
11453 PR tree-optimization/94621
11454 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
11455 Move id->adjust_array_error_bounds check first in the condition.
11457 2020-04-17 Martin Liska <mliska@suse.cz>
11458 Jonathan Yong <10walls@gmail.com>
11460 PR gcov-profile/94570
11461 * coverage.c (coverage_init): Use separator properly.
11463 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
11465 PR rtl-optimization/93974
11466 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
11467 (rs6000_cannot_substitute_mem_equiv_p): New function.
11469 2020-04-16 Martin Jambor <mjambor@suse.cz>
11472 * ipa-inline.h (ipa_saved_clone_sources): Declare.
11473 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
11474 (save_inline_function_body): Link the new body holder with the
11476 * cgraph.c: Include ipa-inline.h.
11477 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
11478 the statement in ipa_saved_clone_sources.
11479 * cgraphunit.c: Include ipa-inline.h.
11480 (expand_all_functions): Free ipa_saved_clone_sources.
11482 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
11485 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
11486 the VNx16BI lowpart of the recursively-generated constant.
11488 2020-04-16 Martin Liska <mliska@suse.cz>
11489 Jakub Jelinek <jakub@redhat.com>
11492 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
11493 DECL_IS_REPLACEABLE_OPERATOR during cloning.
11494 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
11495 (propagate_necessity): Check operator names.
11497 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
11499 PR rtl-optimization/94605
11500 * early-remat.c (early_remat::process_block): Handle insns that
11501 set multiple candidate registers.
11502 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
11504 PR gcov-profile/93401
11505 * common.opt (profile-prefix-path): New option.
11506 * coverae.c: Include diagnostics.h.
11507 (coverage_init): Strip profile prefix path.
11508 * doc/invoke.texi (-fprofile-prefix-path): Document.
11510 2020-04-16 Richard Biener <rguenther@suse.de>
11512 PR middle-end/94614
11513 * expr.c (emit_move_multi_word): Do not generate code when
11514 the destination part is undefined_operand_subword_p.
11515 * lower-subreg.c (resolve_clobber): Look through a paradoxica
11518 2020-04-16 Martin Jambor <mjambor@suse.cz>
11520 PR tree-optimization/94598
11521 * tree-sra.c (verify_sra_access_forest): Fix verification of total
11522 scalarization accesses under access to one-element arrays.
11524 2020-04-16 Jakub Jelinek <jakub@redhat.com>
11527 * function.c (assign_parm_find_data_types): Add workaround for
11528 BROKEN_VALUE_INITIALIZATION compilers.
11530 2020-04-16 Richard Biener <rguenther@suse.de>
11532 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
11535 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
11538 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
11539 Require OPTION_MASK_ISA_SSE2.
11541 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
11544 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
11545 Don't construct a dump_context temporary to call static method.
11547 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
11549 * config/aarch64/falkor-tag-collision-avoidance.c
11550 (valid_src_p): Check for aarch64_address_info type before
11551 accessing base field.
11553 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
11555 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
11556 (V_sz_elem2): Remove unused mode attribute.
11558 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
11560 * config/arm/arm.md (arm_movdi): Disallow for MVE.
11562 2020-04-15 Richard Biener <rguenther@suse.de>
11564 PR middle-end/94539
11565 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
11566 alias_sets_conflict_p for pointers.
11568 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
11571 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
11572 (extendhisi2_internal): Add %v1 before the load instructions.
11574 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
11577 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
11578 use PC-relative addressing for TLS references.
11580 2020-04-14 Martin Jambor <mjambor@suse.cz>
11583 * ipa-sra.c: Include internal-fn.h.
11584 (enum isra_scan_context): Update comment.
11585 (scan_function): Treat calls to internal_functions like loads or stores.
11587 2020-04-14 Yang Yang <yangyang305@huawei.com>
11589 PR tree-optimization/94574
11590 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
11591 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
11593 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
11596 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
11598 2020-04-13 Martin Sebor <msebor@redhat.com>
11600 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
11601 -Wformat-truncation. Move -Wzero-length-bounds last.
11602 (-Wrestrict): Document positive form of option enabled by -Wall.
11604 2020-04-13 Zachary Spytz <zspytz@gmail.com>
11606 * doc/extend.texi: Add realloc to list of built-in functions
11607 are recognized by the compiler.
11609 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
11612 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
11613 pointer in word_mode for eh_return epilogues.
11615 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11617 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
11618 memory references in %B, %C and %D operand selectors when the inner
11619 operand is a post increment address.
11621 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11623 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
11624 reference by 4 bytes, and %D memory reference by 6 bytes.
11626 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
11629 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
11630 condition for V4SI, V8HI and V16QI modes.
11632 2020-04-11 Jakub Jelinek <jakub@redhat.com>
11636 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
11639 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
11641 PR middle-end/89433
11642 PR middle-end/93465
11643 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
11644 "#pragma omp declare target" has also been applied.
11646 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11648 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
11649 when to emit the epilogue_helper insn.
11650 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
11653 2020-04-09 Jakub Jelinek <jakub@redhat.com>
11656 * cselib.h (cselib_record_sp_cfa_base_equiv,
11657 cselib_sp_derived_value_p): Declare.
11658 * cselib.c (cselib_record_sp_cfa_base_equiv,
11659 cselib_sp_derived_value_p): New functions.
11660 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
11661 cselib_sp_derived_value_p values.
11662 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
11663 start of extended basic blocks other than the first one
11664 for !frame_pointer_needed functions.
11666 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11668 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
11669 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
11670 (aarch64_sve2048_hw): Document.
11671 * config/aarch64/aarch64-protos.h
11672 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
11673 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
11674 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
11675 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
11677 (find_type_suffix_for_scalar_type): Use it instead of comparing
11678 TYPE_MAIN_VARIANTs.
11679 (function_resolver::infer_vector_or_tuple_type): Likewise.
11680 (function_resolver::require_vector_type): Likewise.
11681 (handle_arm_sve_vector_bits_attribute): New function.
11682 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
11683 (aarch64_attribute_table): Add arm_sve_vector_bits.
11684 (aarch64_return_in_memory_1):
11685 (pure_scalable_type_info::piece::get_rtx): New function.
11686 (pure_scalable_type_info::num_zr): Likewise.
11687 (pure_scalable_type_info::num_pr): Likewise.
11688 (pure_scalable_type_info::get_rtx): Likewise.
11689 (pure_scalable_type_info::analyze): Likewise.
11690 (pure_scalable_type_info::analyze_registers): Likewise.
11691 (pure_scalable_type_info::analyze_array): Likewise.
11692 (pure_scalable_type_info::analyze_record): Likewise.
11693 (pure_scalable_type_info::add_piece): Likewise.
11694 (aarch64_some_values_include_pst_objects_p): Likewise.
11695 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
11696 to analyze whether the type is returned in SVE registers.
11697 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
11698 is passed in SVE registers.
11699 (aarch64_pass_by_reference_1): New function, extracted from...
11700 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
11701 to analyze whether the type is a pure scalable type and, if so,
11702 whether it should be passed by reference.
11703 (aarch64_return_in_msb): Return false for pure scalable types.
11704 (aarch64_function_value_1): Fold back into...
11705 (aarch64_function_value): ...this function. Use
11706 pure_scalable_type_info to analyze whether the type is a pure
11707 scalable type and, if so, which registers it should use. Handle
11708 types that include pure scalable types but are not themselves
11709 pure scalable types.
11710 (aarch64_return_in_memory_1): New function, split out from...
11711 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
11712 to analyze whether the type is a pure scalable type and, if so,
11713 whether it should be returned by reference.
11714 (aarch64_layout_arg): Remove orig_mode argument. Use
11715 pure_scalable_type_info to analyze whether the type is a pure
11716 scalable type and, if so, which registers it should use. Handle
11717 types that include pure scalable types but are not themselves
11718 pure scalable types.
11719 (aarch64_function_arg): Update call accordingly.
11720 (aarch64_function_arg_advance): Likewise.
11721 (aarch64_pad_reg_upward): On big-endian targets, return false for
11722 pure scalable types that are smaller than 16 bytes.
11723 (aarch64_member_type_forces_blk): New function.
11724 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
11725 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
11726 correspond to built-in SVE types. Do not rely on a vector mode
11727 if the type includes an pure scalable type. When returning true,
11728 assert that the mode is not an SVE mode.
11729 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
11730 built-in types here. When returning true, assert that the type
11731 does not have an SVE mode.
11732 (aarch64_can_change_mode_class): Don't allow anything to change
11733 between a predicate mode and a non-predicate mode. Also don't
11734 allow changes between SVE vector modes and other modes that
11735 might be bigger than 128 bits.
11736 (aarch64_invalid_binary_op): Reject binary operations that mix
11737 SVE and GNU vector types.
11738 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
11740 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11742 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
11743 "SVE sizeless type".
11744 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
11745 (sizeless_type_p): New functions.
11746 (register_builtin_types): Apply make_type_sizeless to the type.
11747 (register_tuple_type): Likewise.
11748 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
11750 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
11752 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
11755 2020-04-09 Martin Jambor <mjambor@suse.cz>
11756 Richard Biener <rguenther@suse.de>
11758 PR tree-optimization/94482
11759 * tree-sra.c (create_access_replacement): Dump new replacement with
11761 (sra_modify_expr): Fix handling of cases when the original EXPR writes
11762 to only part of the replacement.
11763 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
11764 the first operand of combinations into REAL/IMAGPART_EXPR and
11767 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11769 * doc/sourcebuild.texi (check-function-bodies): Treat the third
11770 parameter as a list of option regexps and require each regexp
11773 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
11776 * config/aarch64/falkor-tag-collision-avoidance.c
11777 (valid_src_p): Fix missing rtx type check.
11779 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
11780 Richard Biener <rguenther@suse.de>
11782 PR tree-optimization/93674
11783 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
11784 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
11785 or non-mode precision type, add candidate in unsigned type with the
11788 2020-04-08 Clement Chigot <clement.chigot@atos.net>
11790 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
11791 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
11792 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
11794 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11796 PR middle-end/94526
11797 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
11799 * reload1.c (eliminate_regs_1): Avoid creating
11800 (plus (reg) (const_int 0)) in DEBUG_INSNs.
11802 PR tree-optimization/94524
11803 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
11804 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
11805 op1 rather than op1 itself at the end. Punt for signed modulo by
11806 most negative constant.
11807 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
11808 modulo by most negative constant.
11810 2020-04-08 Richard Biener <rguenther@suse.de>
11812 PR rtl-optimization/93946
11813 * cse.c (cse_insn): Record the tabled expression in
11814 src_related. Verify a redundant store removal is valid.
11816 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
11819 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
11820 ENDBR at function entry if function will be called indirectly.
11822 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11825 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
11828 2020-04-08 Martin Liska <mliska@suse.cz>
11831 * gimple.c (gimple_call_operator_delete_p): Rename to...
11832 (gimple_call_replaceable_operator_delete_p): ... this.
11833 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
11834 * gimple.h (gimple_call_operator_delete_p): Rename to ...
11835 (gimple_call_replaceable_operator_delete_p): ... this.
11836 * tree-core.h (tree_function_decl): Add replaceable_operator
11838 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
11839 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
11840 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
11841 (eliminate_unnecessary_stmts): Likewise.
11842 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
11843 Pack DECL_IS_REPLACEABLE_OPERATOR.
11844 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
11845 Unpack the field here.
11846 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
11847 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
11848 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
11849 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
11850 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
11851 replaceable operator flags.
11853 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
11854 Matthew Malcomson <matthew.malcomson@arm.com>
11856 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
11857 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
11858 (CX_TERNARY_QUALIFIERS): Likewise.
11859 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
11860 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
11861 (arm_init_acle_builtins): Initialize CDE builtins.
11862 (arm_expand_acle_builtin): Check CDE constant operands.
11863 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
11864 of CDE constant operand.
11865 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
11867 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
11868 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
11869 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
11870 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
11871 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
11872 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
11873 * config/arm/arm_cde_builtins.def: New file.
11874 * config/arm/iterators.md (V_reg): New attribute of SI.
11875 * config/arm/predicates.md (const_int_coproc_operand): New.
11876 (const_int_vcde1_operand, const_int_vcde2_operand): New.
11877 (const_int_vcde3_operand): New.
11878 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
11879 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
11880 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
11881 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
11883 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
11885 * config.gcc: Add arm_cde.h.
11886 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
11887 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
11888 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
11889 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
11890 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
11891 * config/arm/arm.h (TARGET_CDE): New macro.
11892 * config/arm/arm_cde.h: New file.
11893 * doc/invoke.texi: Document CDE options +cdecp[0-7].
11894 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
11896 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
11898 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11900 PR rtl-optimization/94516
11901 * postreload.c: Include rtl-iter.h.
11902 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
11903 looking for all MEMs with RTX_AUTOINC operand.
11904 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
11906 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
11908 * omp-grid.c (grid_eliminate_combined_simd_part): Use
11909 OMP_CLAUSE_CODE to access the omp clause code.
11911 2020-04-07 Jeff Law <law@redhat.com>
11913 PR rtl-optimization/92264
11914 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
11915 the destination is the stack pointer.
11917 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11919 PR rtl-optimization/94291
11920 PR rtl-optimization/84169
11921 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
11922 must be a REG or SUBREG of REG; if it is not one of these, don't
11925 2020-04-07 Richard Biener <rguenther@suse.de>
11927 PR middle-end/94479
11928 * gimplify.c (gimplify_addr_expr): Also consider generated
11931 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11933 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
11935 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11937 * config/arm/arm_mve.h: Cast some pointers to expected types.
11939 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11941 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
11942 same with '__arm_' prefix.
11944 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11946 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
11948 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11950 * config/arm/arm.c (arm_mve_immediate_check): Removed.
11951 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
11952 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
11953 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
11954 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
11955 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
11956 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
11958 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11960 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
11962 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11964 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
11965 * config/arm/mve/md: Fix v[id]wdup patterns.
11967 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11969 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
11970 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
11972 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11974 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
11975 and remove const_ptr enums.
11977 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11979 * config/arm/arm_mve.h (vsubq_n): Merge with...
11981 (vmulq_n): Merge with...
11983 (__ARM_mve_typeid): Simplify scalar and constant detection.
11985 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11988 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
11989 for inter-lane permutation for 64-byte modes.
11992 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
11993 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
11994 Assume it is a REG after that instead of testing it and doing FAIL
11995 otherwise. Formatting fix.
11997 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
11999 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
12001 2020-04-07 Jakub Jelinek <jakub@redhat.com>
12004 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
12005 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
12007 2020-04-06 Jakub Jelinek <jakub@redhat.com>
12009 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
12010 + const0_rtx return the SP_DERIVED_VALUE_P.
12012 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
12014 PR rtl-optimization/92989
12015 * lra-lives.c (process_bb_lives): Do not treat eh_return data
12016 registers as being live at the beginning of the EH receiver.
12018 2020-04-05 Zachary Spytz <zspytz@gmail.com>
12020 * extend.texi: Add free to list of ISO C90 functions that
12021 are recognized by the compiler.
12023 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
12025 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
12026 for fast_interrupt.
12028 * config/microblaze/microblaze.md (trap): Update output pattern.
12030 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
12031 Jakub Jelinek <jakub@redhat.com>
12034 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
12035 arrays, pointer-to-members, function types and qualifiers when
12036 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
12037 to emit type again on definition.
12039 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
12042 * ipa-fnsummary.c (vrp_will_run_p): New function.
12043 (fre_will_run_p): New function.
12044 (evaluate_properties_for_edge): Use it.
12045 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
12046 !optimize_debug to optimize_debug.
12048 2020-04-04 Jakub Jelinek <jakub@redhat.com>
12050 PR rtl-optimization/94468
12051 * cselib.c (references_value_p): Formatting fix.
12052 (cselib_useless_value_p): New function.
12053 (discard_useless_locs, discard_useless_values,
12054 cselib_invalidate_regno_val, cselib_invalidate_mem,
12055 cselib_record_set): Use it instead of
12056 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
12059 * tree-iterator.h (expr_single): Declare.
12060 * tree-iterator.c (expr_single): New function.
12061 * tree.h (protected_set_expr_location_if_unset): Declare.
12062 * tree.c (protected_set_expr_location): Use expr_single.
12063 (protected_set_expr_location_if_unset): New function.
12065 2020-04-03 Jeff Law <law@redhat.com>
12067 PR rtl-optimization/92264
12068 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
12069 reloading of auto-increment addressing modes.
12071 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
12074 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
12077 2020-04-03 Jeff Law <law@redhat.com>
12079 PR rtl-optimization/92264
12080 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
12081 post-increment addressing of source operands as well as residuals
12082 when computing any adjustments to the input pointer.
12084 2020-04-03 Jakub Jelinek <jakub@redhat.com>
12087 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
12088 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
12089 second half of first lane from first lane of second operand and
12090 first half of second lane from second lane of first operand.
12092 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
12094 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
12096 2020-04-03 Tamar Christina <tamar.christina@arm.com>
12099 * common/config/aarch64/aarch64-common.c
12100 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
12102 2020-04-03 Richard Biener <rguenther@suse.de>
12104 PR middle-end/94465
12105 * tree.c (array_ref_low_bound): Deal with released SSA names
12108 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
12110 * config/gcn/gcn.c (print_operand): Handle unordered comparison
12112 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
12113 comparison operators.
12115 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
12117 PR tree-optimization/94443
12118 * tree-vect-loop.c (vectorizable_live_operation): Use
12119 gsi_insert_seq_before to replace gsi_insert_before.
12121 2020-04-03 Martin Liska <mliska@suse.cz>
12124 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
12125 Compare type attributes for gimple_call_fntypes.
12127 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
12129 * alias.c (get_alias_set): Fix comment typos.
12131 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
12134 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
12135 attribute checking used by TYPE.
12137 2020-04-02 Martin Jambor <mjambor@suse.cz>
12140 * ipa-sra.c (struct caller_issues): New fields candidate and
12141 call_from_outside_comdat.
12142 (check_for_caller_issues): Check for calls from outsied of
12143 candidate's same_comdat_group.
12144 (check_all_callers_for_issues): Set up issues.candidate, check result
12146 (mark_callers_calls_comdat_local): New function.
12147 (process_isra_node_results): Set calls_comdat_local of callers if
12150 2020-04-02 Richard Biener <rguenther@suse.de>
12153 * common.opt (ffinite-loops): Initialize to zero.
12154 * opts.c (default_options_table): Remove OPT_ffinite_loops
12156 * cfgloop.h (loop::finite_p): New member.
12157 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
12158 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
12160 * lto-streamer-in.c (input_cfg): Stream finite_p.
12161 * lto-streamer-out.c (output_cfg): Likewise.
12162 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
12163 from flag_finite_loops at CFG build time.
12164 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
12165 finite_p flag instead of flag_finite_loops.
12166 * doc/invoke.texi (ffinite-loops): Adjust documentation of
12169 2020-04-02 Richard Biener <rguenther@suse.de>
12172 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
12173 DW_TAG_imported_unit.
12175 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
12177 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
12178 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
12181 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
12183 PR tree-optimization/94401
12184 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
12185 access type when loading halves of vector to avoid peeling for gaps.
12187 2020-04-02 Jakub Jelinek <jakub@redhat.com>
12189 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
12190 between a string literal and MIPS_SYSVERSION_SPEC macro.
12192 2020-04-02 Martin Jambor <mjambor@suse.cz>
12194 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
12196 2020-04-02 Jakub Jelinek <jakub@redhat.com>
12198 PR rtl-optimization/92264
12199 * params.opt (-param=max-find-base-term-values=): Decrease default
12202 PR rtl-optimization/92264
12203 * rtl.h (struct rtx_def): Mention that call bit is used as
12204 SP_DERIVED_VALUE_P in cselib.c.
12205 * cselib.c (SP_DERIVED_VALUE_P): Define.
12206 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
12207 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
12208 val_rtx and sp based expression where offsets cancel each other.
12209 (preserve_constants_and_equivs): Formatting fix.
12210 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
12211 locs list for cfa_base_preserved_val if needed. Formatting fix.
12212 (autoinc_split): If the to be returned value is a REG, MEM or
12213 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
12214 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
12215 (rtx_equal_for_cselib_1): Call autoinc_split even if both
12216 expressions are PLUS in Pmode with CONST_INT second operands.
12217 Handle SP_DERIVED_VALUE_P cases.
12218 (cselib_hash_plus_const_int): New function.
12219 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
12220 second operand, as well as for PRE_DEC etc. that ought to be
12221 hashed the same way.
12222 (cselib_subst_to_values): Substitute PLUS with Pmode and
12223 CONST_INT operand if the first operand is a VALUE which has
12224 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
12225 SP_DERIVED_VALUE_P + adjusted offset.
12226 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
12227 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
12228 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
12229 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
12230 on the sp value before calling cselib_add_permanent_equiv on the
12232 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
12233 in the insn without REG_INC note.
12234 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
12235 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
12238 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
12239 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
12241 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12244 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
12245 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
12246 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
12247 intrinsic defintion by adding a new builtin call to writeback into base
12249 (__arm_vldrdq_gather_base_wb_u64): Likewise.
12250 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
12251 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
12252 (__arm_vldrwq_gather_base_wb_s32): Likewise.
12253 (__arm_vldrwq_gather_base_wb_u32): Likewise.
12254 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
12255 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
12256 (__arm_vldrwq_gather_base_wb_f32): Likewise.
12257 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
12258 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
12259 builtin's qualifier.
12260 (vldrdq_gather_base_wb_z_u): Likewise.
12261 (vldrwq_gather_base_wb_u): Likewise.
12262 (vldrdq_gather_base_wb_u): Likewise.
12263 (vldrwq_gather_base_wb_z_s): Likewise.
12264 (vldrwq_gather_base_wb_z_f): Likewise.
12265 (vldrdq_gather_base_wb_z_s): Likewise.
12266 (vldrwq_gather_base_wb_s): Likewise.
12267 (vldrwq_gather_base_wb_f): Likewise.
12268 (vldrdq_gather_base_wb_s): Likewise.
12269 (vldrwq_gather_base_nowb_z_u): Define builtin.
12270 (vldrdq_gather_base_nowb_z_u): Likewise.
12271 (vldrwq_gather_base_nowb_u): Likewise.
12272 (vldrdq_gather_base_nowb_u): Likewise.
12273 (vldrwq_gather_base_nowb_z_s): Likewise.
12274 (vldrwq_gather_base_nowb_z_f): Likewise.
12275 (vldrdq_gather_base_nowb_z_s): Likewise.
12276 (vldrwq_gather_base_nowb_s): Likewise.
12277 (vldrwq_gather_base_nowb_f): Likewise.
12278 (vldrdq_gather_base_nowb_s): Likewise.
12279 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
12281 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
12282 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
12283 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
12284 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
12285 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
12286 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
12287 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
12288 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
12289 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
12290 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
12291 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
12293 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
12295 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
12296 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
12297 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
12298 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
12299 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
12300 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
12301 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
12302 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
12303 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
12305 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
12306 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
12307 Remove constraints from expander.
12308 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
12309 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
12310 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
12311 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
12312 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
12313 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
12315 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
12317 PR rtl-optimization/94123
12318 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
12319 flag_split_wide_types_early.
12321 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
12323 * doc/extend.texi (Common Function Attributes): Fix typo.
12325 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
12328 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
12331 2020-04-01 Zackery Spytz <zspytz@gmail.com>
12333 * doc/extend.texi: Fix a typo in the documentation of the
12334 copy function attribute.
12336 2020-04-01 Jakub Jelinek <jakub@redhat.com>
12338 PR middle-end/94423
12339 * tree-object-size.c (pass_object_sizes::execute): Don't call
12340 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
12341 call replace_call_with_value.
12343 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
12345 PR tree-optimization/94043
12346 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
12347 phi for vec_lhs and use it for lane extraction.
12349 2020-03-31 Felix Yang <felix.yang@huawei.com>
12351 PR tree-optimization/94398
12352 * tree-vect-stmts.c (vectorizable_store): Instead of calling
12353 vect_supportable_dr_alignment, set alignment_support_scheme to
12354 dr_unaligned_supported for gather-scatter accesses.
12355 (vectorizable_load): Likewise.
12357 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
12359 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
12360 New mode iterators.
12361 (vnsi, VnSI, vndi, VnDI): New mode attributes.
12362 (mov<mode>): Use <VnDI> in place of V64DI.
12363 (mov<mode>_exec): Likewise.
12364 (mov<mode>_sgprbase): Likewise.
12365 (reload_out<mode>): Likewise.
12366 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
12367 (gather_load<mode>v64si): Rename to ...
12368 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
12369 and <VnDI> in place of V64DI.
12370 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
12371 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
12372 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
12373 (scatter_store<mode>v64si): Rename to ...
12374 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12375 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
12376 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
12377 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
12378 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
12379 (ds_bpermute<mode>): Use <VnSI>.
12380 (addv64si3_vcc<exec_vcc>): Rename to ...
12381 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
12382 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
12383 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
12384 (addcv64si3<exec_vcc>): Rename to ...
12385 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
12386 (subv64si3_vcc<exec_vcc>): Rename to ...
12387 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
12388 (subcv64si3<exec_vcc>): Rename to ...
12389 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
12390 (addv64di3): Rename to ...
12391 (add<mode>3): ... this, and use V_DI.
12392 (addv64di3_exec): Rename to ...
12393 (add<mode>3_exec): ... this, and use V_DI.
12394 (subv64di3): Rename to ...
12395 (sub<mode>3): ... this, and use V_DI.
12396 (subv64di3_exec): Rename to ...
12397 (sub<mode>3_exec): ... this, and use V_DI.
12398 (addv64di3_zext): Rename to ...
12399 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
12400 (addv64di3_zext_exec): Rename to ...
12401 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
12402 (addv64di3_zext_dup): Rename to ...
12403 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
12404 (addv64di3_zext_dup_exec): Rename to ...
12405 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
12406 (addv64di3_zext_dup2): Rename to ...
12407 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
12408 (addv64di3_zext_dup2_exec): Rename to ...
12409 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
12410 (addv64di3_sext_dup2): Rename to ...
12411 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
12412 (addv64di3_sext_dup2_exec): Rename to ...
12413 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
12414 (<su>mulv64si3_highpart<exec>): Rename to ...
12415 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
12416 (mulv64di3): Rename to ...
12417 (mul<mode>3): ... this, and use V_DI and <VnSI>.
12418 (mulv64di3_exec): Rename to ...
12419 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
12420 (mulv64di3_zext): Rename to ...
12421 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
12422 (mulv64di3_zext_exec): Rename to ...
12423 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
12424 (mulv64di3_zext_dup2): Rename to ...
12425 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
12426 (mulv64di3_zext_dup2_exec): Rename to ...
12427 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
12428 (<expander>v64di3): Rename to ...
12429 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
12430 (<expander>v64di3_exec): Rename to ...
12431 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
12432 (<expander>v64si3<exec>): Rename to ...
12433 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
12434 (v<expander>v64si3<exec>): Rename to ...
12435 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
12436 (<expander>v64si3<exec>): Rename to ...
12437 (<expander><vnsi>3<exec>): ... this, and use V_SI.
12438 (subv64df3<exec>): Rename to ...
12439 (sub<mode>3<exec>): ... this, and use V_DF.
12440 (truncv64di<mode>2): Rename to ...
12441 (trunc<vndi><mode>2): ... this, and use <VnDI>.
12442 (truncv64di<mode>2_exec): Rename to ...
12443 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
12444 (<convop><mode>v64di2): Rename to ...
12445 (<convop><mode><vndi>2): ... this, and use <VnDI>.
12446 (<convop><mode>v64di2_exec): Rename to ...
12447 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
12448 (vec_cmp<u>v64qidi): Rename to ...
12449 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
12450 (vec_cmp<u>v64qidi_exec): Rename to ...
12451 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
12452 (vcond_mask_<mode>di): Use <VnDI>.
12453 (maskload<mode>di): Likewise.
12454 (maskstore<mode>di): Likewise.
12455 (mask_gather_load<mode>v64si): Rename to ...
12456 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12457 (mask_scatter_store<mode>v64si): Rename to ...
12458 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12459 (*<reduc_op>_dpp_shr_v64di): Rename to ...
12460 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
12461 (*plus_carry_in_dpp_shr_v64si): Rename to ...
12462 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
12463 (*plus_carry_dpp_shr_v64di): Rename to ...
12464 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
12465 (vec_seriesv64si): Rename to ...
12466 (vec_series<mode>): ... this, and use V_SI.
12467 (vec_seriesv64di): Rename to ...
12468 (vec_series<mode>): ... this, and use V_DI.
12470 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
12472 * config/arc/arc.c (arc_print_operand): Use
12473 HOST_WIDE_INT_PRINT_DEC macro.
12475 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
12477 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
12479 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12481 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
12483 (__arm_vbicq): Likewise.
12485 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
12487 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
12489 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12491 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
12492 common section of both MVE Integer and MVE Floating Point.
12493 (vaddvq): Likewise.
12494 (vaddlvq_p): Likewise.
12495 (vaddvaq): Likewise.
12496 (vaddvq_p): Likewise.
12497 (vcmpcsq): Likewise.
12498 (vmlsdavxq): Likewise.
12499 (vmlsdavq): Likewise.
12500 (vmladavxq): Likewise.
12501 (vmladavq): Likewise.
12502 (vminvq): Likewise.
12503 (vminavq): Likewise.
12504 (vmaxvq): Likewise.
12505 (vmaxavq): Likewise.
12506 (vmlaldavq): Likewise.
12507 (vcmphiq): Likewise.
12508 (vaddlvaq): Likewise.
12509 (vrmlaldavhq): Likewise.
12510 (vrmlaldavhxq): Likewise.
12511 (vrmlsldavhq): Likewise.
12512 (vrmlsldavhxq): Likewise.
12513 (vmlsldavxq): Likewise.
12514 (vmlsldavq): Likewise.
12515 (vabavq): Likewise.
12516 (vrmlaldavhaq): Likewise.
12517 (vcmpgeq_m_n): Likewise.
12518 (vmlsdavxq_p): Likewise.
12519 (vmlsdavq_p): Likewise.
12520 (vmlsdavaxq): Likewise.
12521 (vmlsdavaq): Likewise.
12522 (vaddvaq_p): Likewise.
12523 (vcmpcsq_m_n): Likewise.
12524 (vcmpcsq_m): Likewise.
12525 (vmladavxq_p): Likewise.
12526 (vmladavq_p): Likewise.
12527 (vmladavaxq): Likewise.
12528 (vmladavaq): Likewise.
12529 (vminvq_p): Likewise.
12530 (vminavq_p): Likewise.
12531 (vmaxvq_p): Likewise.
12532 (vmaxavq_p): Likewise.
12533 (vcmphiq_m): Likewise.
12534 (vaddlvaq_p): Likewise.
12535 (vmlaldavaq): Likewise.
12536 (vmlaldavaxq): Likewise.
12537 (vmlaldavq_p): Likewise.
12538 (vmlaldavxq_p): Likewise.
12539 (vmlsldavaq): Likewise.
12540 (vmlsldavaxq): Likewise.
12541 (vmlsldavq_p): Likewise.
12542 (vmlsldavxq_p): Likewise.
12543 (vrmlaldavhaxq): Likewise.
12544 (vrmlaldavhq_p): Likewise.
12545 (vrmlaldavhxq_p): Likewise.
12546 (vrmlsldavhaq): Likewise.
12547 (vrmlsldavhaxq): Likewise.
12548 (vrmlsldavhq_p): Likewise.
12549 (vrmlsldavhxq_p): Likewise.
12550 (vabavq_p): Likewise.
12551 (vmladavaq_p): Likewise.
12552 (vstrbq_scatter_offset): Likewise.
12553 (vstrbq_p): Likewise.
12554 (vstrbq_scatter_offset_p): Likewise.
12555 (vstrdq_scatter_base_p): Likewise.
12556 (vstrdq_scatter_base): Likewise.
12557 (vstrdq_scatter_offset_p): Likewise.
12558 (vstrdq_scatter_offset): Likewise.
12559 (vstrdq_scatter_shifted_offset_p): Likewise.
12560 (vstrdq_scatter_shifted_offset): Likewise.
12561 (vmaxq_x): Likewise.
12562 (vminq_x): Likewise.
12563 (vmovlbq_x): Likewise.
12564 (vmovltq_x): Likewise.
12565 (vmulhq_x): Likewise.
12566 (vmullbq_int_x): Likewise.
12567 (vmullbq_poly_x): Likewise.
12568 (vmulltq_int_x): Likewise.
12569 (vmulltq_poly_x): Likewise.
12570 (vstrbq): Likewise.
12572 2020-03-31 Jakub Jelinek <jakub@redhat.com>
12575 * config/aarch64/constraints.md (Uph): New constraint.
12576 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
12577 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
12580 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
12581 Jakub Jelinek <jakub@redhat.com>
12583 PR middle-end/94412
12584 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
12585 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
12587 2020-03-31 Jakub Jelinek <jakub@redhat.com>
12589 PR tree-optimization/94403
12590 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
12591 ENUMERAL_TYPE lhs_type.
12593 PR rtl-optimization/94344
12594 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
12595 conversions, either on both operands of |^+ or just one. Handle
12596 also extra same precision conversion on RSHIFT_EXPR first operand
12597 provided RSHIFT_EXPR is performed in unsigned type.
12599 2020-03-30 David Malcolm <dmalcolm@redhat.com>
12601 * lra.c (finish_insn_code_data_once): Set the array elements
12602 to NULL after freeing them.
12604 2020-03-30 Andreas Schwab <schwab@suse.de>
12606 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
12609 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
12611 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
12612 to skip defining builtins based on builtin_mask.
12614 2020-03-30 Jakub Jelinek <jakub@redhat.com>
12617 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
12618 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
12619 operand is a register. Don't enable masked variants for V*[QH]Imode.
12622 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
12623 <store_mask_constraint> instead of m in output operand constraint.
12624 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
12627 2020-03-30 Alan Modra <amodra@gmail.com>
12629 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
12630 (rs6000_indirect_call_template_1): Adjust to suit.
12631 * config/rs6000/rs6000.md (call_local): Merge call_local32,
12632 call_local64, and call_local_aix.
12633 (call_value_local): Simlarly.
12634 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
12635 and disable pattern when CALL_LONG.
12636 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
12637 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
12638 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
12640 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
12643 * doc/invoke.texi: Update -falign-functions, -falign-loops and
12644 -falign-jumps documentation.
12646 2020-03-29 Martin Liska <mliska@suse.cz>
12649 * cgraphunit.c (process_function_and_variable_attributes): Remove
12650 double 'attribute' words.
12652 2020-03-29 John David Anglin <dave.anglin@bell.net>
12654 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
12657 2020-03-28 Jakub Jelinek <jakub@redhat.com>
12660 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
12661 to true after setting size to integer_one_node.
12663 PR tree-optimization/94329
12664 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
12665 on the last stmt in a bb, make sure gsi_prev isn't done immediately
12668 2020-03-27 Alan Modra <amodra@gmail.com>
12671 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
12672 for PLT16_LO and PLT_PCREL.
12673 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
12674 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
12675 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
12677 2020-03-27 Martin Sebor <msebor@redhat.com>
12680 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
12682 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
12684 * config/gcn/gcn-valu.md:
12685 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
12686 (VEC_1REG_MODE): Delete.
12687 (VEC_1REG_ALT): Delete.
12688 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
12689 (VEC_1REG_INT_MODE): Delete.
12690 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
12691 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
12692 (VEC_2REG_MODE): Rename to V_2REG throughout.
12693 (VEC_REG_MODE): Rename to V_noHI throughout.
12694 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
12695 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
12696 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
12697 (VEC_INT_MODE): Delete.
12698 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
12699 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
12700 (FP_MODE): Delete and replace with FP throughout.
12701 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
12702 (VCMP_MODE): Rename to V_noQI throughout and move to top.
12703 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
12704 * config/gcn/gcn.md (FP): New mode iterator.
12705 (FP_1REG): New mode iterator.
12707 2020-03-27 David Malcolm <dmalcolm@redhat.com>
12709 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
12710 now emits two .dot files.
12711 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
12712 (graphviz_out::end_tr): Only close a TR, not a TD.
12713 (graphviz_out::begin_td): New.
12714 (graphviz_out::end_td): New.
12715 (graphviz_out::begin_trtd): New, replacing the old implementation
12716 of graphviz_out::begin_tr.
12717 (graphviz_out::end_tdtr): New, replacing the old implementation
12718 of graphviz_out::end_tr.
12719 * graphviz.h (graphviz_out::begin_td): New decl.
12720 (graphviz_out::end_td): New decl.
12721 (graphviz_out::begin_trtd): New decl.
12722 (graphviz_out::end_tdtr): New decl.
12724 2020-03-27 Richard Biener <rguenther@suse.de>
12727 * dwarf2out.c (should_emit_struct_debug): Return false for
12730 2020-03-27 Richard Biener <rguenther@suse.de>
12732 PR tree-optimization/94352
12733 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
12735 (ssa_propagation_engine::ssa_propagate): ... here after
12736 initializing curr_order.
12738 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
12740 PR tree-optimization/90332
12741 * tree-vect-stmts.c (vector_vector_composition_type): New function.
12742 (get_group_load_store_type): Adjust to call
12743 vector_vector_composition_type, extend it to construct with scalar
12745 (vectorizable_load): Likewise.
12747 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
12749 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
12750 (create_ddg_dep_no_link): Likewise.
12751 (add_cross_iteration_register_deps): Move debug instruction check.
12752 Other minor refactoring.
12753 (add_intra_loop_mem_dep): Do not check for debug instructions.
12754 (add_inter_loop_mem_dep): Likewise.
12755 (build_intra_loop_deps): Likewise.
12756 (create_ddg): Do not include debug insns into the graph.
12757 * ddg.h (struct ddg): Remove num_debug field.
12758 * modulo-sched.c (doloop_register_get): Adjust condition.
12759 (res_MII): Remove DDG num_debug field usage.
12760 (sms_schedule_by_order): Use assertion against debug insns.
12761 (ps_has_conflicts): Drop debug insn check.
12763 2020-03-26 Jakub Jelinek <jakub@redhat.com>
12766 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
12767 that contains exactly one non-DEBUG_BEGIN_STMT statement.
12770 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
12771 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
12772 a single non-debug stmt followed by one or more debug stmts.
12773 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
12774 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
12775 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
12776 gimple_seq_last to check if outer_stmt gbind could be reused and
12777 if yes and it is surrounded by any debug stmts, move them into the
12780 PR rtl-optimization/92264
12781 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
12782 for sp based values in !frame_pointer_needed
12783 && !ACCUMULATE_OUTGOING_ARGS functions.
12785 2020-03-26 Felix Yang <felix.yang@huawei.com>
12787 PR tree-optimization/94269
12788 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
12790 operation to single basic block.
12792 2020-03-25 Jeff Law <law@redhat.com>
12794 PR rtl-optimization/90275
12795 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
12798 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12801 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
12802 mode rather than VOIDmode.
12804 2020-03-25 Martin Sebor <msebor@redhat.com>
12806 PR middle-end/94004
12807 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
12808 even for alloca calls resulting from system macro expansion.
12809 Include inlining context in all warnings.
12811 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
12814 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
12815 FPRs to change between SDmode and DDmode.
12817 2020-03-25 Martin Sebor <msebor@redhat.com>
12819 PR tree-optimization/94131
12820 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
12822 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
12823 types have constant sizes.
12825 2020-03-25 Martin Liska <mliska@suse.cz>
12828 * configure.ac: Report error only when --with-zstd
12830 * configure: Regenerate.
12832 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12835 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
12836 INSN_CODE (insn) to -1 when changing the pattern.
12838 2020-03-25 Martin Liska <mliska@suse.cz>
12842 * config/i386/i386-features.c (make_resolver_func): Drop
12843 public flag for resolver.
12844 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
12845 group for resolver and drop public flag if possible.
12846 * multiple_target.c (create_dispatcher_calls): Drop unique_name
12847 and resolution as we want to enable LTO privatization of the default
12850 2020-03-25 Martin Liska <mliska@suse.cz>
12853 * configure.ac: Respect --without-zstd and report
12854 error when we can't find header file with --with-zstd.
12855 * configure: Regenerate.
12857 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12859 PR middle-end/94303
12860 * varasm.c (output_constructor_array_range): If local->index
12861 RANGE_EXPR doesn't start at the current location in the constructor,
12862 skip needed number of bytes using assemble_zeros or assert we don't
12866 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
12867 counter instead of DECL_UID.
12869 PR tree-optimization/94300
12870 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
12871 is positive, make sure that off + size isn't larger than needed_len.
12873 2020-03-25 Richard Biener <rguenther@suse.de>
12874 Jakub Jelinek <jakub@redhat.com>
12877 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
12879 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
12881 * doc/sourcebuild.texi (ARM-specific attributes): Add
12883 (Features for dg-add-options): Add arm_fp_dp.
12885 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
12888 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
12890 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
12893 * omp-offload.c (omp_finish_file): Fix target-link handling if
12894 targetm_common.have_named_sections is false.
12896 2020-03-24 Jakub Jelinek <jakub@redhat.com>
12899 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
12900 instead of GEN_INT.
12903 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
12904 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
12905 If not after and at *incr_pos is a debug stmt, set stmt location to
12906 location of next non-debug stmt after it if any.
12909 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
12910 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
12911 worklist or set GF_PLF_2 just because it is used in a debug stmt in
12912 another bb. Formatting improvements.
12915 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
12916 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
12917 regardless of whether TREE_NO_WARNING is set on it or whether
12918 warn_unused_function is true or not.
12920 2020-03-23 Jeff Law <law@redhat.com>
12922 PR rtl-optimization/90275
12925 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
12926 (simplify_logical_relational_operation): Use it.
12928 2020-03-23 Jakub Jelinek <jakub@redhat.com>
12931 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
12932 ultimate rhs and if returned something different, reconstructing
12933 the COMPOUND_EXPRs.
12935 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
12937 * opts.c (print_filtered_help): Improve the help text for alias options.
12939 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12940 Andre Vieira <andre.simoesdiasvieira@arm.com>
12941 Mihail Ionescu <mihail.ionescu@arm.com>
12943 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
12944 (vshlcq_m_u8): Likewise.
12945 (vshlcq_m_s16): Likewise.
12946 (vshlcq_m_u16): Likewise.
12947 (vshlcq_m_s32): Likewise.
12948 (vshlcq_m_u32): Likewise.
12949 (__arm_vshlcq_m_s8): Define intrinsic.
12950 (__arm_vshlcq_m_u8): Likewise.
12951 (__arm_vshlcq_m_s16): Likewise.
12952 (__arm_vshlcq_m_u16): Likewise.
12953 (__arm_vshlcq_m_s32): Likewise.
12954 (__arm_vshlcq_m_u32): Likewise.
12955 (vshlcq_m): Define polymorphic variant.
12956 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
12957 Use builtin qualifier.
12958 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
12959 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
12960 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
12961 (mve_vshlcq_m_<supf><mode>): Likewise.
12963 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12965 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
12966 (UQSHL_QUALIFIERS): Likewise.
12967 (ASRL_QUALIFIERS): Likewise.
12968 (SQSHL_QUALIFIERS): Likewise.
12969 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
12971 (sqrshr): Define macro.
12972 (sqrshrl): Likewise.
12973 (sqrshrl_sat48): Likewise.
12975 (sqshll): Likewise.
12977 (srshrl): Likewise.
12978 (uqrshl): Likewise.
12979 (uqrshll): Likewise.
12980 (uqrshll_sat48): Likewise.
12982 (uqshll): Likewise.
12984 (urshrl): Likewise.
12987 (__arm_lsll): Define intrinsic.
12988 (__arm_asrl): Likewise.
12989 (__arm_uqrshll): Likewise.
12990 (__arm_uqrshll_sat48): Likewise.
12991 (__arm_sqrshrl): Likewise.
12992 (__arm_sqrshrl_sat48): Likewise.
12993 (__arm_uqshll): Likewise.
12994 (__arm_urshrl): Likewise.
12995 (__arm_srshrl): Likewise.
12996 (__arm_sqshll): Likewise.
12997 (__arm_uqrshl): Likewise.
12998 (__arm_sqrshr): Likewise.
12999 (__arm_uqshl): Likewise.
13000 (__arm_urshr): Likewise.
13001 (__arm_sqshl): Likewise.
13002 (__arm_srshr): Likewise.
13003 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
13005 (UQSHL_QUALIFIERS): Likewise.
13006 (ASRL_QUALIFIERS): Likewise.
13007 (SQSHL_QUALIFIERS): Likewise.
13008 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
13009 (mve_sqrshrl_sat<supf>_di): Likewise.
13010 (mve_uqrshl_si): Likewise.
13011 (mve_sqrshr_si): Likewise.
13012 (mve_uqshll_di): Likewise.
13013 (mve_urshrl_di): Likewise.
13014 (mve_uqshl_si): Likewise.
13015 (mve_urshr_si): Likewise.
13016 (mve_sqshl_si): Likewise.
13017 (mve_srshr_si): Likewise.
13018 (mve_srshrl_di): Likewise.
13019 (mve_sqshll_di): Likewise.
13021 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13022 Andre Vieira <andre.simoesdiasvieira@arm.com>
13023 Mihail Ionescu <mihail.ionescu@arm.com>
13025 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
13026 (vsetq_lane_f32): Likewise.
13027 (vsetq_lane_s16): Likewise.
13028 (vsetq_lane_s32): Likewise.
13029 (vsetq_lane_s8): Likewise.
13030 (vsetq_lane_s64): Likewise.
13031 (vsetq_lane_u8): Likewise.
13032 (vsetq_lane_u16): Likewise.
13033 (vsetq_lane_u32): Likewise.
13034 (vsetq_lane_u64): Likewise.
13035 (vgetq_lane_f16): Likewise.
13036 (vgetq_lane_f32): Likewise.
13037 (vgetq_lane_s16): Likewise.
13038 (vgetq_lane_s32): Likewise.
13039 (vgetq_lane_s8): Likewise.
13040 (vgetq_lane_s64): Likewise.
13041 (vgetq_lane_u8): Likewise.
13042 (vgetq_lane_u16): Likewise.
13043 (vgetq_lane_u32): Likewise.
13044 (vgetq_lane_u64): Likewise.
13045 (__ARM_NUM_LANES): Likewise.
13046 (__ARM_LANEQ): Likewise.
13047 (__ARM_CHECK_LANEQ): Likewise.
13048 (__arm_vsetq_lane_s16): Define intrinsic.
13049 (__arm_vsetq_lane_s32): Likewise.
13050 (__arm_vsetq_lane_s8): Likewise.
13051 (__arm_vsetq_lane_s64): Likewise.
13052 (__arm_vsetq_lane_u8): Likewise.
13053 (__arm_vsetq_lane_u16): Likewise.
13054 (__arm_vsetq_lane_u32): Likewise.
13055 (__arm_vsetq_lane_u64): Likewise.
13056 (__arm_vgetq_lane_s16): Likewise.
13057 (__arm_vgetq_lane_s32): Likewise.
13058 (__arm_vgetq_lane_s8): Likewise.
13059 (__arm_vgetq_lane_s64): Likewise.
13060 (__arm_vgetq_lane_u8): Likewise.
13061 (__arm_vgetq_lane_u16): Likewise.
13062 (__arm_vgetq_lane_u32): Likewise.
13063 (__arm_vgetq_lane_u64): Likewise.
13064 (__arm_vsetq_lane_f16): Likewise.
13065 (__arm_vsetq_lane_f32): Likewise.
13066 (__arm_vgetq_lane_f16): Likewise.
13067 (__arm_vgetq_lane_f32): Likewise.
13068 (vgetq_lane): Define polymorphic variant.
13069 (vsetq_lane): Likewise.
13070 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
13072 (mve_vec_extractv2didi): Likewise.
13073 (mve_vec_extract_sext_internal<mode>): Likewise.
13074 (mve_vec_extract_zext_internal<mode>): Likewise.
13075 (mve_vec_set<mode>_internal): Likewise.
13076 (mve_vec_setv2di_internal): Likewise.
13077 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
13079 (vec_extract<mode><V_elem_l>): Rename to
13080 "neon_vec_extract<mode><V_elem_l>".
13081 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
13082 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
13083 pattern common for MVE and NEON.
13084 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
13087 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
13089 * config/arm/mve.md (earlyclobber_32): New mode attribute.
13090 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
13091 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
13093 2020-03-23 Richard Biener <rguenther@suse.de>
13095 PR tree-optimization/94261
13096 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
13097 IL operand swapping code.
13098 (vect_slp_rearrange_stmts): Do not arrange isomorphic
13099 nodes that would need operation code adjustments.
13101 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
13103 * doc/install.texi (amdgcn-*-amdhsa): Renamed
13104 from amdgcn-unknown-amdhsa; change
13105 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
13107 2020-03-23 Richard Biener <rguenther@suse.de>
13110 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
13111 directly rather than also folding it via build_fold_addr_expr.
13113 2020-03-23 Richard Biener <rguenther@suse.de>
13115 PR tree-optimization/94266
13116 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
13117 addresses of TARGET_MEM_REFs.
13119 2020-03-23 Martin Liska <mliska@suse.cz>
13122 * symtab.c (symtab_node::clone_references): Save speculative_id
13123 as ref may be overwritten by create_reference.
13124 (symtab_node::clone_referring): Likewise.
13125 (symtab_node::clone_reference): Likewise.
13127 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
13129 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
13130 references to Darwin.
13131 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
13132 unconditionally and comment on why.
13134 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
13136 * config/darwin.c (darwin_mergeable_constant_section): Collect
13137 section anchor checks into the caller.
13138 (machopic_select_section): Collect section anchor checks into
13139 the determination of 'effective zero-size' objects. When the
13140 size is unknown, assume it is non-zero, and thus return the
13141 'generic' section for the DECL.
13143 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
13146 * config/darwin.opt: Amend options descriptions.
13148 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
13150 PR rtl-optimization/94052
13151 * lra-constraints.c (simplify_operand_subreg): Reload the inner
13152 register of a paradoxical subreg if simplify_subreg_regno fails
13153 to give a valid hard register for the outer mode.
13155 2020-03-20 Martin Jambor <mjambor@suse.cz>
13157 PR tree-optimization/93435
13158 * params.opt (sra-max-propagations): New parameter.
13159 * tree-sra.c (propagation_budget): New variable.
13160 (budget_for_propagation_access): New function.
13161 (propagate_subaccesses_from_rhs): Use it.
13162 (propagate_subaccesses_from_lhs): Likewise.
13163 (propagate_all_subaccesses): Set up and destroy propagation_budget.
13165 2020-03-20 Carl Love <cel@us.ibm.com>
13168 * config/rs6000/rs6000.c (rs6000_option_override_internal):
13169 Add check for TARGET_FPRND for Power 7 or newer.
13171 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
13174 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
13175 (cgraph_edge::redirect_callee): Move here; likewise.
13176 (cgraph_node::remove_callees): Update calls_comdat_local flag.
13177 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
13179 (cgraph_node::check_calls_comdat_local_p): New member function.
13180 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
13181 (cgraph_edge::redirect_callee): Move offline.
13182 * ipa-fnsummary.c (compute_fn_summary): Do not compute
13183 calls_comdat_local flag here.
13184 * ipa-inline-transform.c (inline_call): Fix updating of
13185 calls_comdat_local flag.
13186 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
13187 * symtab.c (symtab_node::add_to_same_comdat_group): Update
13188 calls_comdat_local flag.
13190 2020-03-20 Richard Biener <rguenther@suse.de>
13192 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
13193 from the possibly modified root.
13195 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13196 Andre Vieira <andre.simoesdiasvieira@arm.com>
13197 Mihail Ionescu <mihail.ionescu@arm.com>
13199 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
13200 (vst1q_p_s8): Likewise.
13201 (vst2q_s8): Likewise.
13202 (vst2q_u8): Likewise.
13203 (vld1q_z_u8): Likewise.
13204 (vld1q_z_s8): Likewise.
13205 (vld2q_s8): Likewise.
13206 (vld2q_u8): Likewise.
13207 (vld4q_s8): Likewise.
13208 (vld4q_u8): Likewise.
13209 (vst1q_p_u16): Likewise.
13210 (vst1q_p_s16): Likewise.
13211 (vst2q_s16): Likewise.
13212 (vst2q_u16): Likewise.
13213 (vld1q_z_u16): Likewise.
13214 (vld1q_z_s16): Likewise.
13215 (vld2q_s16): Likewise.
13216 (vld2q_u16): Likewise.
13217 (vld4q_s16): Likewise.
13218 (vld4q_u16): Likewise.
13219 (vst1q_p_u32): Likewise.
13220 (vst1q_p_s32): Likewise.
13221 (vst2q_s32): Likewise.
13222 (vst2q_u32): Likewise.
13223 (vld1q_z_u32): Likewise.
13224 (vld1q_z_s32): Likewise.
13225 (vld2q_s32): Likewise.
13226 (vld2q_u32): Likewise.
13227 (vld4q_s32): Likewise.
13228 (vld4q_u32): Likewise.
13229 (vld4q_f16): Likewise.
13230 (vld2q_f16): Likewise.
13231 (vld1q_z_f16): Likewise.
13232 (vst2q_f16): Likewise.
13233 (vst1q_p_f16): Likewise.
13234 (vld4q_f32): Likewise.
13235 (vld2q_f32): Likewise.
13236 (vld1q_z_f32): Likewise.
13237 (vst2q_f32): Likewise.
13238 (vst1q_p_f32): Likewise.
13239 (__arm_vst1q_p_u8): Define intrinsic.
13240 (__arm_vst1q_p_s8): Likewise.
13241 (__arm_vst2q_s8): Likewise.
13242 (__arm_vst2q_u8): Likewise.
13243 (__arm_vld1q_z_u8): Likewise.
13244 (__arm_vld1q_z_s8): Likewise.
13245 (__arm_vld2q_s8): Likewise.
13246 (__arm_vld2q_u8): Likewise.
13247 (__arm_vld4q_s8): Likewise.
13248 (__arm_vld4q_u8): Likewise.
13249 (__arm_vst1q_p_u16): Likewise.
13250 (__arm_vst1q_p_s16): Likewise.
13251 (__arm_vst2q_s16): Likewise.
13252 (__arm_vst2q_u16): Likewise.
13253 (__arm_vld1q_z_u16): Likewise.
13254 (__arm_vld1q_z_s16): Likewise.
13255 (__arm_vld2q_s16): Likewise.
13256 (__arm_vld2q_u16): Likewise.
13257 (__arm_vld4q_s16): Likewise.
13258 (__arm_vld4q_u16): Likewise.
13259 (__arm_vst1q_p_u32): Likewise.
13260 (__arm_vst1q_p_s32): Likewise.
13261 (__arm_vst2q_s32): Likewise.
13262 (__arm_vst2q_u32): Likewise.
13263 (__arm_vld1q_z_u32): Likewise.
13264 (__arm_vld1q_z_s32): Likewise.
13265 (__arm_vld2q_s32): Likewise.
13266 (__arm_vld2q_u32): Likewise.
13267 (__arm_vld4q_s32): Likewise.
13268 (__arm_vld4q_u32): Likewise.
13269 (__arm_vld4q_f16): Likewise.
13270 (__arm_vld2q_f16): Likewise.
13271 (__arm_vld1q_z_f16): Likewise.
13272 (__arm_vst2q_f16): Likewise.
13273 (__arm_vst1q_p_f16): Likewise.
13274 (__arm_vld4q_f32): Likewise.
13275 (__arm_vld2q_f32): Likewise.
13276 (__arm_vld1q_z_f32): Likewise.
13277 (__arm_vst2q_f32): Likewise.
13278 (__arm_vst1q_p_f32): Likewise.
13279 (vld1q_z): Define polymorphic variant.
13282 (vst1q_p): Likewise.
13284 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
13286 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
13287 (mve_vld2q<mode>): Likewise.
13288 (mve_vld4q<mode>): Likewise.
13290 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13291 Andre Vieira <andre.simoesdiasvieira@arm.com>
13292 Mihail Ionescu <mihail.ionescu@arm.com>
13294 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
13295 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
13296 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
13297 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
13298 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
13299 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
13300 * config/arm/arm_mve.h (vadciq_s32): Define macro.
13301 (vadciq_u32): Likewise.
13302 (vadciq_m_s32): Likewise.
13303 (vadciq_m_u32): Likewise.
13304 (vadcq_s32): Likewise.
13305 (vadcq_u32): Likewise.
13306 (vadcq_m_s32): Likewise.
13307 (vadcq_m_u32): Likewise.
13308 (vsbciq_s32): Likewise.
13309 (vsbciq_u32): Likewise.
13310 (vsbciq_m_s32): Likewise.
13311 (vsbciq_m_u32): Likewise.
13312 (vsbcq_s32): Likewise.
13313 (vsbcq_u32): Likewise.
13314 (vsbcq_m_s32): Likewise.
13315 (vsbcq_m_u32): Likewise.
13316 (__arm_vadciq_s32): Define intrinsic.
13317 (__arm_vadciq_u32): Likewise.
13318 (__arm_vadciq_m_s32): Likewise.
13319 (__arm_vadciq_m_u32): Likewise.
13320 (__arm_vadcq_s32): Likewise.
13321 (__arm_vadcq_u32): Likewise.
13322 (__arm_vadcq_m_s32): Likewise.
13323 (__arm_vadcq_m_u32): Likewise.
13324 (__arm_vsbciq_s32): Likewise.
13325 (__arm_vsbciq_u32): Likewise.
13326 (__arm_vsbciq_m_s32): Likewise.
13327 (__arm_vsbciq_m_u32): Likewise.
13328 (__arm_vsbcq_s32): Likewise.
13329 (__arm_vsbcq_u32): Likewise.
13330 (__arm_vsbcq_m_s32): Likewise.
13331 (__arm_vsbcq_m_u32): Likewise.
13332 (vadciq_m): Define polymorphic variant.
13333 (vadciq): Likewise.
13334 (vadcq_m): Likewise.
13336 (vsbciq_m): Likewise.
13337 (vsbciq): Likewise.
13338 (vsbcq_m): Likewise.
13340 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
13342 (BINOP_UNONE_UNONE_UNONE): Likewise.
13343 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13344 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
13345 * config/arm/mve.md (VADCIQ): Define iterator.
13346 (VADCIQ_M): Likewise.
13348 (VSBCQ_M): Likewise.
13349 (VSBCIQ): Likewise.
13350 (VSBCIQ_M): Likewise.
13352 (VADCQ_M): Likewise.
13353 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
13354 (mve_vadciq_<supf>v4si): Likewise.
13355 (mve_vadcq_m_<supf>v4si): Likewise.
13356 (mve_vadcq_<supf>v4si): Likewise.
13357 (mve_vsbciq_m_<supf>v4si): Likewise.
13358 (mve_vsbciq_<supf>v4si): Likewise.
13359 (mve_vsbcq_m_<supf>v4si): Likewise.
13360 (mve_vsbcq_<supf>v4si): Likewise.
13361 (get_fpscr_nzcvqc): Define isns.
13362 (set_fpscr_nzcvqc): Define isns.
13363 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
13364 (UNSPEC_SET_FPSCR_NZCVQC): Define.
13366 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13368 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
13369 (vddupq_x_n_u16): Likewise.
13370 (vddupq_x_n_u32): Likewise.
13371 (vddupq_x_wb_u8): Likewise.
13372 (vddupq_x_wb_u16): Likewise.
13373 (vddupq_x_wb_u32): Likewise.
13374 (vdwdupq_x_n_u8): Likewise.
13375 (vdwdupq_x_n_u16): Likewise.
13376 (vdwdupq_x_n_u32): Likewise.
13377 (vdwdupq_x_wb_u8): Likewise.
13378 (vdwdupq_x_wb_u16): Likewise.
13379 (vdwdupq_x_wb_u32): Likewise.
13380 (vidupq_x_n_u8): Likewise.
13381 (vidupq_x_n_u16): Likewise.
13382 (vidupq_x_n_u32): Likewise.
13383 (vidupq_x_wb_u8): Likewise.
13384 (vidupq_x_wb_u16): Likewise.
13385 (vidupq_x_wb_u32): Likewise.
13386 (viwdupq_x_n_u8): Likewise.
13387 (viwdupq_x_n_u16): Likewise.
13388 (viwdupq_x_n_u32): Likewise.
13389 (viwdupq_x_wb_u8): Likewise.
13390 (viwdupq_x_wb_u16): Likewise.
13391 (viwdupq_x_wb_u32): Likewise.
13392 (vdupq_x_n_s8): Likewise.
13393 (vdupq_x_n_s16): Likewise.
13394 (vdupq_x_n_s32): Likewise.
13395 (vdupq_x_n_u8): Likewise.
13396 (vdupq_x_n_u16): Likewise.
13397 (vdupq_x_n_u32): Likewise.
13398 (vminq_x_s8): Likewise.
13399 (vminq_x_s16): Likewise.
13400 (vminq_x_s32): Likewise.
13401 (vminq_x_u8): Likewise.
13402 (vminq_x_u16): Likewise.
13403 (vminq_x_u32): Likewise.
13404 (vmaxq_x_s8): Likewise.
13405 (vmaxq_x_s16): Likewise.
13406 (vmaxq_x_s32): Likewise.
13407 (vmaxq_x_u8): Likewise.
13408 (vmaxq_x_u16): Likewise.
13409 (vmaxq_x_u32): Likewise.
13410 (vabdq_x_s8): Likewise.
13411 (vabdq_x_s16): Likewise.
13412 (vabdq_x_s32): Likewise.
13413 (vabdq_x_u8): Likewise.
13414 (vabdq_x_u16): Likewise.
13415 (vabdq_x_u32): Likewise.
13416 (vabsq_x_s8): Likewise.
13417 (vabsq_x_s16): Likewise.
13418 (vabsq_x_s32): Likewise.
13419 (vaddq_x_s8): Likewise.
13420 (vaddq_x_s16): Likewise.
13421 (vaddq_x_s32): Likewise.
13422 (vaddq_x_n_s8): Likewise.
13423 (vaddq_x_n_s16): Likewise.
13424 (vaddq_x_n_s32): Likewise.
13425 (vaddq_x_u8): Likewise.
13426 (vaddq_x_u16): Likewise.
13427 (vaddq_x_u32): Likewise.
13428 (vaddq_x_n_u8): Likewise.
13429 (vaddq_x_n_u16): Likewise.
13430 (vaddq_x_n_u32): Likewise.
13431 (vclsq_x_s8): Likewise.
13432 (vclsq_x_s16): Likewise.
13433 (vclsq_x_s32): Likewise.
13434 (vclzq_x_s8): Likewise.
13435 (vclzq_x_s16): Likewise.
13436 (vclzq_x_s32): Likewise.
13437 (vclzq_x_u8): Likewise.
13438 (vclzq_x_u16): Likewise.
13439 (vclzq_x_u32): Likewise.
13440 (vnegq_x_s8): Likewise.
13441 (vnegq_x_s16): Likewise.
13442 (vnegq_x_s32): Likewise.
13443 (vmulhq_x_s8): Likewise.
13444 (vmulhq_x_s16): Likewise.
13445 (vmulhq_x_s32): Likewise.
13446 (vmulhq_x_u8): Likewise.
13447 (vmulhq_x_u16): Likewise.
13448 (vmulhq_x_u32): Likewise.
13449 (vmullbq_poly_x_p8): Likewise.
13450 (vmullbq_poly_x_p16): Likewise.
13451 (vmullbq_int_x_s8): Likewise.
13452 (vmullbq_int_x_s16): Likewise.
13453 (vmullbq_int_x_s32): Likewise.
13454 (vmullbq_int_x_u8): Likewise.
13455 (vmullbq_int_x_u16): Likewise.
13456 (vmullbq_int_x_u32): Likewise.
13457 (vmulltq_poly_x_p8): Likewise.
13458 (vmulltq_poly_x_p16): Likewise.
13459 (vmulltq_int_x_s8): Likewise.
13460 (vmulltq_int_x_s16): Likewise.
13461 (vmulltq_int_x_s32): Likewise.
13462 (vmulltq_int_x_u8): Likewise.
13463 (vmulltq_int_x_u16): Likewise.
13464 (vmulltq_int_x_u32): Likewise.
13465 (vmulq_x_s8): Likewise.
13466 (vmulq_x_s16): Likewise.
13467 (vmulq_x_s32): Likewise.
13468 (vmulq_x_n_s8): Likewise.
13469 (vmulq_x_n_s16): Likewise.
13470 (vmulq_x_n_s32): Likewise.
13471 (vmulq_x_u8): Likewise.
13472 (vmulq_x_u16): Likewise.
13473 (vmulq_x_u32): Likewise.
13474 (vmulq_x_n_u8): Likewise.
13475 (vmulq_x_n_u16): Likewise.
13476 (vmulq_x_n_u32): Likewise.
13477 (vsubq_x_s8): Likewise.
13478 (vsubq_x_s16): Likewise.
13479 (vsubq_x_s32): Likewise.
13480 (vsubq_x_n_s8): Likewise.
13481 (vsubq_x_n_s16): Likewise.
13482 (vsubq_x_n_s32): Likewise.
13483 (vsubq_x_u8): Likewise.
13484 (vsubq_x_u16): Likewise.
13485 (vsubq_x_u32): Likewise.
13486 (vsubq_x_n_u8): Likewise.
13487 (vsubq_x_n_u16): Likewise.
13488 (vsubq_x_n_u32): Likewise.
13489 (vcaddq_rot90_x_s8): Likewise.
13490 (vcaddq_rot90_x_s16): Likewise.
13491 (vcaddq_rot90_x_s32): Likewise.
13492 (vcaddq_rot90_x_u8): Likewise.
13493 (vcaddq_rot90_x_u16): Likewise.
13494 (vcaddq_rot90_x_u32): Likewise.
13495 (vcaddq_rot270_x_s8): Likewise.
13496 (vcaddq_rot270_x_s16): Likewise.
13497 (vcaddq_rot270_x_s32): Likewise.
13498 (vcaddq_rot270_x_u8): Likewise.
13499 (vcaddq_rot270_x_u16): Likewise.
13500 (vcaddq_rot270_x_u32): Likewise.
13501 (vhaddq_x_n_s8): Likewise.
13502 (vhaddq_x_n_s16): Likewise.
13503 (vhaddq_x_n_s32): Likewise.
13504 (vhaddq_x_n_u8): Likewise.
13505 (vhaddq_x_n_u16): Likewise.
13506 (vhaddq_x_n_u32): Likewise.
13507 (vhaddq_x_s8): Likewise.
13508 (vhaddq_x_s16): Likewise.
13509 (vhaddq_x_s32): Likewise.
13510 (vhaddq_x_u8): Likewise.
13511 (vhaddq_x_u16): Likewise.
13512 (vhaddq_x_u32): Likewise.
13513 (vhcaddq_rot90_x_s8): Likewise.
13514 (vhcaddq_rot90_x_s16): Likewise.
13515 (vhcaddq_rot90_x_s32): Likewise.
13516 (vhcaddq_rot270_x_s8): Likewise.
13517 (vhcaddq_rot270_x_s16): Likewise.
13518 (vhcaddq_rot270_x_s32): Likewise.
13519 (vhsubq_x_n_s8): Likewise.
13520 (vhsubq_x_n_s16): Likewise.
13521 (vhsubq_x_n_s32): Likewise.
13522 (vhsubq_x_n_u8): Likewise.
13523 (vhsubq_x_n_u16): Likewise.
13524 (vhsubq_x_n_u32): Likewise.
13525 (vhsubq_x_s8): Likewise.
13526 (vhsubq_x_s16): Likewise.
13527 (vhsubq_x_s32): Likewise.
13528 (vhsubq_x_u8): Likewise.
13529 (vhsubq_x_u16): Likewise.
13530 (vhsubq_x_u32): Likewise.
13531 (vrhaddq_x_s8): Likewise.
13532 (vrhaddq_x_s16): Likewise.
13533 (vrhaddq_x_s32): Likewise.
13534 (vrhaddq_x_u8): Likewise.
13535 (vrhaddq_x_u16): Likewise.
13536 (vrhaddq_x_u32): Likewise.
13537 (vrmulhq_x_s8): Likewise.
13538 (vrmulhq_x_s16): Likewise.
13539 (vrmulhq_x_s32): Likewise.
13540 (vrmulhq_x_u8): Likewise.
13541 (vrmulhq_x_u16): Likewise.
13542 (vrmulhq_x_u32): Likewise.
13543 (vandq_x_s8): Likewise.
13544 (vandq_x_s16): Likewise.
13545 (vandq_x_s32): Likewise.
13546 (vandq_x_u8): Likewise.
13547 (vandq_x_u16): Likewise.
13548 (vandq_x_u32): Likewise.
13549 (vbicq_x_s8): Likewise.
13550 (vbicq_x_s16): Likewise.
13551 (vbicq_x_s32): Likewise.
13552 (vbicq_x_u8): Likewise.
13553 (vbicq_x_u16): Likewise.
13554 (vbicq_x_u32): Likewise.
13555 (vbrsrq_x_n_s8): Likewise.
13556 (vbrsrq_x_n_s16): Likewise.
13557 (vbrsrq_x_n_s32): Likewise.
13558 (vbrsrq_x_n_u8): Likewise.
13559 (vbrsrq_x_n_u16): Likewise.
13560 (vbrsrq_x_n_u32): Likewise.
13561 (veorq_x_s8): Likewise.
13562 (veorq_x_s16): Likewise.
13563 (veorq_x_s32): Likewise.
13564 (veorq_x_u8): Likewise.
13565 (veorq_x_u16): Likewise.
13566 (veorq_x_u32): Likewise.
13567 (vmovlbq_x_s8): Likewise.
13568 (vmovlbq_x_s16): Likewise.
13569 (vmovlbq_x_u8): Likewise.
13570 (vmovlbq_x_u16): Likewise.
13571 (vmovltq_x_s8): Likewise.
13572 (vmovltq_x_s16): Likewise.
13573 (vmovltq_x_u8): Likewise.
13574 (vmovltq_x_u16): Likewise.
13575 (vmvnq_x_s8): Likewise.
13576 (vmvnq_x_s16): Likewise.
13577 (vmvnq_x_s32): Likewise.
13578 (vmvnq_x_u8): Likewise.
13579 (vmvnq_x_u16): Likewise.
13580 (vmvnq_x_u32): Likewise.
13581 (vmvnq_x_n_s16): Likewise.
13582 (vmvnq_x_n_s32): Likewise.
13583 (vmvnq_x_n_u16): Likewise.
13584 (vmvnq_x_n_u32): Likewise.
13585 (vornq_x_s8): Likewise.
13586 (vornq_x_s16): Likewise.
13587 (vornq_x_s32): Likewise.
13588 (vornq_x_u8): Likewise.
13589 (vornq_x_u16): Likewise.
13590 (vornq_x_u32): Likewise.
13591 (vorrq_x_s8): Likewise.
13592 (vorrq_x_s16): Likewise.
13593 (vorrq_x_s32): Likewise.
13594 (vorrq_x_u8): Likewise.
13595 (vorrq_x_u16): Likewise.
13596 (vorrq_x_u32): Likewise.
13597 (vrev16q_x_s8): Likewise.
13598 (vrev16q_x_u8): Likewise.
13599 (vrev32q_x_s8): Likewise.
13600 (vrev32q_x_s16): Likewise.
13601 (vrev32q_x_u8): Likewise.
13602 (vrev32q_x_u16): Likewise.
13603 (vrev64q_x_s8): Likewise.
13604 (vrev64q_x_s16): Likewise.
13605 (vrev64q_x_s32): Likewise.
13606 (vrev64q_x_u8): Likewise.
13607 (vrev64q_x_u16): Likewise.
13608 (vrev64q_x_u32): Likewise.
13609 (vrshlq_x_s8): Likewise.
13610 (vrshlq_x_s16): Likewise.
13611 (vrshlq_x_s32): Likewise.
13612 (vrshlq_x_u8): Likewise.
13613 (vrshlq_x_u16): Likewise.
13614 (vrshlq_x_u32): Likewise.
13615 (vshllbq_x_n_s8): Likewise.
13616 (vshllbq_x_n_s16): Likewise.
13617 (vshllbq_x_n_u8): Likewise.
13618 (vshllbq_x_n_u16): Likewise.
13619 (vshlltq_x_n_s8): Likewise.
13620 (vshlltq_x_n_s16): Likewise.
13621 (vshlltq_x_n_u8): Likewise.
13622 (vshlltq_x_n_u16): Likewise.
13623 (vshlq_x_s8): Likewise.
13624 (vshlq_x_s16): Likewise.
13625 (vshlq_x_s32): Likewise.
13626 (vshlq_x_u8): Likewise.
13627 (vshlq_x_u16): Likewise.
13628 (vshlq_x_u32): Likewise.
13629 (vshlq_x_n_s8): Likewise.
13630 (vshlq_x_n_s16): Likewise.
13631 (vshlq_x_n_s32): Likewise.
13632 (vshlq_x_n_u8): Likewise.
13633 (vshlq_x_n_u16): Likewise.
13634 (vshlq_x_n_u32): Likewise.
13635 (vrshrq_x_n_s8): Likewise.
13636 (vrshrq_x_n_s16): Likewise.
13637 (vrshrq_x_n_s32): Likewise.
13638 (vrshrq_x_n_u8): Likewise.
13639 (vrshrq_x_n_u16): Likewise.
13640 (vrshrq_x_n_u32): Likewise.
13641 (vshrq_x_n_s8): Likewise.
13642 (vshrq_x_n_s16): Likewise.
13643 (vshrq_x_n_s32): Likewise.
13644 (vshrq_x_n_u8): Likewise.
13645 (vshrq_x_n_u16): Likewise.
13646 (vshrq_x_n_u32): Likewise.
13647 (vdupq_x_n_f16): Likewise.
13648 (vdupq_x_n_f32): Likewise.
13649 (vminnmq_x_f16): Likewise.
13650 (vminnmq_x_f32): Likewise.
13651 (vmaxnmq_x_f16): Likewise.
13652 (vmaxnmq_x_f32): Likewise.
13653 (vabdq_x_f16): Likewise.
13654 (vabdq_x_f32): Likewise.
13655 (vabsq_x_f16): Likewise.
13656 (vabsq_x_f32): Likewise.
13657 (vaddq_x_f16): Likewise.
13658 (vaddq_x_f32): Likewise.
13659 (vaddq_x_n_f16): Likewise.
13660 (vaddq_x_n_f32): Likewise.
13661 (vnegq_x_f16): Likewise.
13662 (vnegq_x_f32): Likewise.
13663 (vmulq_x_f16): Likewise.
13664 (vmulq_x_f32): Likewise.
13665 (vmulq_x_n_f16): Likewise.
13666 (vmulq_x_n_f32): Likewise.
13667 (vsubq_x_f16): Likewise.
13668 (vsubq_x_f32): Likewise.
13669 (vsubq_x_n_f16): Likewise.
13670 (vsubq_x_n_f32): Likewise.
13671 (vcaddq_rot90_x_f16): Likewise.
13672 (vcaddq_rot90_x_f32): Likewise.
13673 (vcaddq_rot270_x_f16): Likewise.
13674 (vcaddq_rot270_x_f32): Likewise.
13675 (vcmulq_x_f16): Likewise.
13676 (vcmulq_x_f32): Likewise.
13677 (vcmulq_rot90_x_f16): Likewise.
13678 (vcmulq_rot90_x_f32): Likewise.
13679 (vcmulq_rot180_x_f16): Likewise.
13680 (vcmulq_rot180_x_f32): Likewise.
13681 (vcmulq_rot270_x_f16): Likewise.
13682 (vcmulq_rot270_x_f32): Likewise.
13683 (vcvtaq_x_s16_f16): Likewise.
13684 (vcvtaq_x_s32_f32): Likewise.
13685 (vcvtaq_x_u16_f16): Likewise.
13686 (vcvtaq_x_u32_f32): Likewise.
13687 (vcvtnq_x_s16_f16): Likewise.
13688 (vcvtnq_x_s32_f32): Likewise.
13689 (vcvtnq_x_u16_f16): Likewise.
13690 (vcvtnq_x_u32_f32): Likewise.
13691 (vcvtpq_x_s16_f16): Likewise.
13692 (vcvtpq_x_s32_f32): Likewise.
13693 (vcvtpq_x_u16_f16): Likewise.
13694 (vcvtpq_x_u32_f32): Likewise.
13695 (vcvtmq_x_s16_f16): Likewise.
13696 (vcvtmq_x_s32_f32): Likewise.
13697 (vcvtmq_x_u16_f16): Likewise.
13698 (vcvtmq_x_u32_f32): Likewise.
13699 (vcvtbq_x_f32_f16): Likewise.
13700 (vcvttq_x_f32_f16): Likewise.
13701 (vcvtq_x_f16_u16): Likewise.
13702 (vcvtq_x_f16_s16): Likewise.
13703 (vcvtq_x_f32_s32): Likewise.
13704 (vcvtq_x_f32_u32): Likewise.
13705 (vcvtq_x_n_f16_s16): Likewise.
13706 (vcvtq_x_n_f16_u16): Likewise.
13707 (vcvtq_x_n_f32_s32): Likewise.
13708 (vcvtq_x_n_f32_u32): Likewise.
13709 (vcvtq_x_s16_f16): Likewise.
13710 (vcvtq_x_s32_f32): Likewise.
13711 (vcvtq_x_u16_f16): Likewise.
13712 (vcvtq_x_u32_f32): Likewise.
13713 (vcvtq_x_n_s16_f16): Likewise.
13714 (vcvtq_x_n_s32_f32): Likewise.
13715 (vcvtq_x_n_u16_f16): Likewise.
13716 (vcvtq_x_n_u32_f32): Likewise.
13717 (vrndq_x_f16): Likewise.
13718 (vrndq_x_f32): Likewise.
13719 (vrndnq_x_f16): Likewise.
13720 (vrndnq_x_f32): Likewise.
13721 (vrndmq_x_f16): Likewise.
13722 (vrndmq_x_f32): Likewise.
13723 (vrndpq_x_f16): Likewise.
13724 (vrndpq_x_f32): Likewise.
13725 (vrndaq_x_f16): Likewise.
13726 (vrndaq_x_f32): Likewise.
13727 (vrndxq_x_f16): Likewise.
13728 (vrndxq_x_f32): Likewise.
13729 (vandq_x_f16): Likewise.
13730 (vandq_x_f32): Likewise.
13731 (vbicq_x_f16): Likewise.
13732 (vbicq_x_f32): Likewise.
13733 (vbrsrq_x_n_f16): Likewise.
13734 (vbrsrq_x_n_f32): Likewise.
13735 (veorq_x_f16): Likewise.
13736 (veorq_x_f32): Likewise.
13737 (vornq_x_f16): Likewise.
13738 (vornq_x_f32): Likewise.
13739 (vorrq_x_f16): Likewise.
13740 (vorrq_x_f32): Likewise.
13741 (vrev32q_x_f16): Likewise.
13742 (vrev64q_x_f16): Likewise.
13743 (vrev64q_x_f32): Likewise.
13744 (__arm_vddupq_x_n_u8): Define intrinsic.
13745 (__arm_vddupq_x_n_u16): Likewise.
13746 (__arm_vddupq_x_n_u32): Likewise.
13747 (__arm_vddupq_x_wb_u8): Likewise.
13748 (__arm_vddupq_x_wb_u16): Likewise.
13749 (__arm_vddupq_x_wb_u32): Likewise.
13750 (__arm_vdwdupq_x_n_u8): Likewise.
13751 (__arm_vdwdupq_x_n_u16): Likewise.
13752 (__arm_vdwdupq_x_n_u32): Likewise.
13753 (__arm_vdwdupq_x_wb_u8): Likewise.
13754 (__arm_vdwdupq_x_wb_u16): Likewise.
13755 (__arm_vdwdupq_x_wb_u32): Likewise.
13756 (__arm_vidupq_x_n_u8): Likewise.
13757 (__arm_vidupq_x_n_u16): Likewise.
13758 (__arm_vidupq_x_n_u32): Likewise.
13759 (__arm_vidupq_x_wb_u8): Likewise.
13760 (__arm_vidupq_x_wb_u16): Likewise.
13761 (__arm_vidupq_x_wb_u32): Likewise.
13762 (__arm_viwdupq_x_n_u8): Likewise.
13763 (__arm_viwdupq_x_n_u16): Likewise.
13764 (__arm_viwdupq_x_n_u32): Likewise.
13765 (__arm_viwdupq_x_wb_u8): Likewise.
13766 (__arm_viwdupq_x_wb_u16): Likewise.
13767 (__arm_viwdupq_x_wb_u32): Likewise.
13768 (__arm_vdupq_x_n_s8): Likewise.
13769 (__arm_vdupq_x_n_s16): Likewise.
13770 (__arm_vdupq_x_n_s32): Likewise.
13771 (__arm_vdupq_x_n_u8): Likewise.
13772 (__arm_vdupq_x_n_u16): Likewise.
13773 (__arm_vdupq_x_n_u32): Likewise.
13774 (__arm_vminq_x_s8): Likewise.
13775 (__arm_vminq_x_s16): Likewise.
13776 (__arm_vminq_x_s32): Likewise.
13777 (__arm_vminq_x_u8): Likewise.
13778 (__arm_vminq_x_u16): Likewise.
13779 (__arm_vminq_x_u32): Likewise.
13780 (__arm_vmaxq_x_s8): Likewise.
13781 (__arm_vmaxq_x_s16): Likewise.
13782 (__arm_vmaxq_x_s32): Likewise.
13783 (__arm_vmaxq_x_u8): Likewise.
13784 (__arm_vmaxq_x_u16): Likewise.
13785 (__arm_vmaxq_x_u32): Likewise.
13786 (__arm_vabdq_x_s8): Likewise.
13787 (__arm_vabdq_x_s16): Likewise.
13788 (__arm_vabdq_x_s32): Likewise.
13789 (__arm_vabdq_x_u8): Likewise.
13790 (__arm_vabdq_x_u16): Likewise.
13791 (__arm_vabdq_x_u32): Likewise.
13792 (__arm_vabsq_x_s8): Likewise.
13793 (__arm_vabsq_x_s16): Likewise.
13794 (__arm_vabsq_x_s32): Likewise.
13795 (__arm_vaddq_x_s8): Likewise.
13796 (__arm_vaddq_x_s16): Likewise.
13797 (__arm_vaddq_x_s32): Likewise.
13798 (__arm_vaddq_x_n_s8): Likewise.
13799 (__arm_vaddq_x_n_s16): Likewise.
13800 (__arm_vaddq_x_n_s32): Likewise.
13801 (__arm_vaddq_x_u8): Likewise.
13802 (__arm_vaddq_x_u16): Likewise.
13803 (__arm_vaddq_x_u32): Likewise.
13804 (__arm_vaddq_x_n_u8): Likewise.
13805 (__arm_vaddq_x_n_u16): Likewise.
13806 (__arm_vaddq_x_n_u32): Likewise.
13807 (__arm_vclsq_x_s8): Likewise.
13808 (__arm_vclsq_x_s16): Likewise.
13809 (__arm_vclsq_x_s32): Likewise.
13810 (__arm_vclzq_x_s8): Likewise.
13811 (__arm_vclzq_x_s16): Likewise.
13812 (__arm_vclzq_x_s32): Likewise.
13813 (__arm_vclzq_x_u8): Likewise.
13814 (__arm_vclzq_x_u16): Likewise.
13815 (__arm_vclzq_x_u32): Likewise.
13816 (__arm_vnegq_x_s8): Likewise.
13817 (__arm_vnegq_x_s16): Likewise.
13818 (__arm_vnegq_x_s32): Likewise.
13819 (__arm_vmulhq_x_s8): Likewise.
13820 (__arm_vmulhq_x_s16): Likewise.
13821 (__arm_vmulhq_x_s32): Likewise.
13822 (__arm_vmulhq_x_u8): Likewise.
13823 (__arm_vmulhq_x_u16): Likewise.
13824 (__arm_vmulhq_x_u32): Likewise.
13825 (__arm_vmullbq_poly_x_p8): Likewise.
13826 (__arm_vmullbq_poly_x_p16): Likewise.
13827 (__arm_vmullbq_int_x_s8): Likewise.
13828 (__arm_vmullbq_int_x_s16): Likewise.
13829 (__arm_vmullbq_int_x_s32): Likewise.
13830 (__arm_vmullbq_int_x_u8): Likewise.
13831 (__arm_vmullbq_int_x_u16): Likewise.
13832 (__arm_vmullbq_int_x_u32): Likewise.
13833 (__arm_vmulltq_poly_x_p8): Likewise.
13834 (__arm_vmulltq_poly_x_p16): Likewise.
13835 (__arm_vmulltq_int_x_s8): Likewise.
13836 (__arm_vmulltq_int_x_s16): Likewise.
13837 (__arm_vmulltq_int_x_s32): Likewise.
13838 (__arm_vmulltq_int_x_u8): Likewise.
13839 (__arm_vmulltq_int_x_u16): Likewise.
13840 (__arm_vmulltq_int_x_u32): Likewise.
13841 (__arm_vmulq_x_s8): Likewise.
13842 (__arm_vmulq_x_s16): Likewise.
13843 (__arm_vmulq_x_s32): Likewise.
13844 (__arm_vmulq_x_n_s8): Likewise.
13845 (__arm_vmulq_x_n_s16): Likewise.
13846 (__arm_vmulq_x_n_s32): Likewise.
13847 (__arm_vmulq_x_u8): Likewise.
13848 (__arm_vmulq_x_u16): Likewise.
13849 (__arm_vmulq_x_u32): Likewise.
13850 (__arm_vmulq_x_n_u8): Likewise.
13851 (__arm_vmulq_x_n_u16): Likewise.
13852 (__arm_vmulq_x_n_u32): Likewise.
13853 (__arm_vsubq_x_s8): Likewise.
13854 (__arm_vsubq_x_s16): Likewise.
13855 (__arm_vsubq_x_s32): Likewise.
13856 (__arm_vsubq_x_n_s8): Likewise.
13857 (__arm_vsubq_x_n_s16): Likewise.
13858 (__arm_vsubq_x_n_s32): Likewise.
13859 (__arm_vsubq_x_u8): Likewise.
13860 (__arm_vsubq_x_u16): Likewise.
13861 (__arm_vsubq_x_u32): Likewise.
13862 (__arm_vsubq_x_n_u8): Likewise.
13863 (__arm_vsubq_x_n_u16): Likewise.
13864 (__arm_vsubq_x_n_u32): Likewise.
13865 (__arm_vcaddq_rot90_x_s8): Likewise.
13866 (__arm_vcaddq_rot90_x_s16): Likewise.
13867 (__arm_vcaddq_rot90_x_s32): Likewise.
13868 (__arm_vcaddq_rot90_x_u8): Likewise.
13869 (__arm_vcaddq_rot90_x_u16): Likewise.
13870 (__arm_vcaddq_rot90_x_u32): Likewise.
13871 (__arm_vcaddq_rot270_x_s8): Likewise.
13872 (__arm_vcaddq_rot270_x_s16): Likewise.
13873 (__arm_vcaddq_rot270_x_s32): Likewise.
13874 (__arm_vcaddq_rot270_x_u8): Likewise.
13875 (__arm_vcaddq_rot270_x_u16): Likewise.
13876 (__arm_vcaddq_rot270_x_u32): Likewise.
13877 (__arm_vhaddq_x_n_s8): Likewise.
13878 (__arm_vhaddq_x_n_s16): Likewise.
13879 (__arm_vhaddq_x_n_s32): Likewise.
13880 (__arm_vhaddq_x_n_u8): Likewise.
13881 (__arm_vhaddq_x_n_u16): Likewise.
13882 (__arm_vhaddq_x_n_u32): Likewise.
13883 (__arm_vhaddq_x_s8): Likewise.
13884 (__arm_vhaddq_x_s16): Likewise.
13885 (__arm_vhaddq_x_s32): Likewise.
13886 (__arm_vhaddq_x_u8): Likewise.
13887 (__arm_vhaddq_x_u16): Likewise.
13888 (__arm_vhaddq_x_u32): Likewise.
13889 (__arm_vhcaddq_rot90_x_s8): Likewise.
13890 (__arm_vhcaddq_rot90_x_s16): Likewise.
13891 (__arm_vhcaddq_rot90_x_s32): Likewise.
13892 (__arm_vhcaddq_rot270_x_s8): Likewise.
13893 (__arm_vhcaddq_rot270_x_s16): Likewise.
13894 (__arm_vhcaddq_rot270_x_s32): Likewise.
13895 (__arm_vhsubq_x_n_s8): Likewise.
13896 (__arm_vhsubq_x_n_s16): Likewise.
13897 (__arm_vhsubq_x_n_s32): Likewise.
13898 (__arm_vhsubq_x_n_u8): Likewise.
13899 (__arm_vhsubq_x_n_u16): Likewise.
13900 (__arm_vhsubq_x_n_u32): Likewise.
13901 (__arm_vhsubq_x_s8): Likewise.
13902 (__arm_vhsubq_x_s16): Likewise.
13903 (__arm_vhsubq_x_s32): Likewise.
13904 (__arm_vhsubq_x_u8): Likewise.
13905 (__arm_vhsubq_x_u16): Likewise.
13906 (__arm_vhsubq_x_u32): Likewise.
13907 (__arm_vrhaddq_x_s8): Likewise.
13908 (__arm_vrhaddq_x_s16): Likewise.
13909 (__arm_vrhaddq_x_s32): Likewise.
13910 (__arm_vrhaddq_x_u8): Likewise.
13911 (__arm_vrhaddq_x_u16): Likewise.
13912 (__arm_vrhaddq_x_u32): Likewise.
13913 (__arm_vrmulhq_x_s8): Likewise.
13914 (__arm_vrmulhq_x_s16): Likewise.
13915 (__arm_vrmulhq_x_s32): Likewise.
13916 (__arm_vrmulhq_x_u8): Likewise.
13917 (__arm_vrmulhq_x_u16): Likewise.
13918 (__arm_vrmulhq_x_u32): Likewise.
13919 (__arm_vandq_x_s8): Likewise.
13920 (__arm_vandq_x_s16): Likewise.
13921 (__arm_vandq_x_s32): Likewise.
13922 (__arm_vandq_x_u8): Likewise.
13923 (__arm_vandq_x_u16): Likewise.
13924 (__arm_vandq_x_u32): Likewise.
13925 (__arm_vbicq_x_s8): Likewise.
13926 (__arm_vbicq_x_s16): Likewise.
13927 (__arm_vbicq_x_s32): Likewise.
13928 (__arm_vbicq_x_u8): Likewise.
13929 (__arm_vbicq_x_u16): Likewise.
13930 (__arm_vbicq_x_u32): Likewise.
13931 (__arm_vbrsrq_x_n_s8): Likewise.
13932 (__arm_vbrsrq_x_n_s16): Likewise.
13933 (__arm_vbrsrq_x_n_s32): Likewise.
13934 (__arm_vbrsrq_x_n_u8): Likewise.
13935 (__arm_vbrsrq_x_n_u16): Likewise.
13936 (__arm_vbrsrq_x_n_u32): Likewise.
13937 (__arm_veorq_x_s8): Likewise.
13938 (__arm_veorq_x_s16): Likewise.
13939 (__arm_veorq_x_s32): Likewise.
13940 (__arm_veorq_x_u8): Likewise.
13941 (__arm_veorq_x_u16): Likewise.
13942 (__arm_veorq_x_u32): Likewise.
13943 (__arm_vmovlbq_x_s8): Likewise.
13944 (__arm_vmovlbq_x_s16): Likewise.
13945 (__arm_vmovlbq_x_u8): Likewise.
13946 (__arm_vmovlbq_x_u16): Likewise.
13947 (__arm_vmovltq_x_s8): Likewise.
13948 (__arm_vmovltq_x_s16): Likewise.
13949 (__arm_vmovltq_x_u8): Likewise.
13950 (__arm_vmovltq_x_u16): Likewise.
13951 (__arm_vmvnq_x_s8): Likewise.
13952 (__arm_vmvnq_x_s16): Likewise.
13953 (__arm_vmvnq_x_s32): Likewise.
13954 (__arm_vmvnq_x_u8): Likewise.
13955 (__arm_vmvnq_x_u16): Likewise.
13956 (__arm_vmvnq_x_u32): Likewise.
13957 (__arm_vmvnq_x_n_s16): Likewise.
13958 (__arm_vmvnq_x_n_s32): Likewise.
13959 (__arm_vmvnq_x_n_u16): Likewise.
13960 (__arm_vmvnq_x_n_u32): Likewise.
13961 (__arm_vornq_x_s8): Likewise.
13962 (__arm_vornq_x_s16): Likewise.
13963 (__arm_vornq_x_s32): Likewise.
13964 (__arm_vornq_x_u8): Likewise.
13965 (__arm_vornq_x_u16): Likewise.
13966 (__arm_vornq_x_u32): Likewise.
13967 (__arm_vorrq_x_s8): Likewise.
13968 (__arm_vorrq_x_s16): Likewise.
13969 (__arm_vorrq_x_s32): Likewise.
13970 (__arm_vorrq_x_u8): Likewise.
13971 (__arm_vorrq_x_u16): Likewise.
13972 (__arm_vorrq_x_u32): Likewise.
13973 (__arm_vrev16q_x_s8): Likewise.
13974 (__arm_vrev16q_x_u8): Likewise.
13975 (__arm_vrev32q_x_s8): Likewise.
13976 (__arm_vrev32q_x_s16): Likewise.
13977 (__arm_vrev32q_x_u8): Likewise.
13978 (__arm_vrev32q_x_u16): Likewise.
13979 (__arm_vrev64q_x_s8): Likewise.
13980 (__arm_vrev64q_x_s16): Likewise.
13981 (__arm_vrev64q_x_s32): Likewise.
13982 (__arm_vrev64q_x_u8): Likewise.
13983 (__arm_vrev64q_x_u16): Likewise.
13984 (__arm_vrev64q_x_u32): Likewise.
13985 (__arm_vrshlq_x_s8): Likewise.
13986 (__arm_vrshlq_x_s16): Likewise.
13987 (__arm_vrshlq_x_s32): Likewise.
13988 (__arm_vrshlq_x_u8): Likewise.
13989 (__arm_vrshlq_x_u16): Likewise.
13990 (__arm_vrshlq_x_u32): Likewise.
13991 (__arm_vshllbq_x_n_s8): Likewise.
13992 (__arm_vshllbq_x_n_s16): Likewise.
13993 (__arm_vshllbq_x_n_u8): Likewise.
13994 (__arm_vshllbq_x_n_u16): Likewise.
13995 (__arm_vshlltq_x_n_s8): Likewise.
13996 (__arm_vshlltq_x_n_s16): Likewise.
13997 (__arm_vshlltq_x_n_u8): Likewise.
13998 (__arm_vshlltq_x_n_u16): Likewise.
13999 (__arm_vshlq_x_s8): Likewise.
14000 (__arm_vshlq_x_s16): Likewise.
14001 (__arm_vshlq_x_s32): Likewise.
14002 (__arm_vshlq_x_u8): Likewise.
14003 (__arm_vshlq_x_u16): Likewise.
14004 (__arm_vshlq_x_u32): Likewise.
14005 (__arm_vshlq_x_n_s8): Likewise.
14006 (__arm_vshlq_x_n_s16): Likewise.
14007 (__arm_vshlq_x_n_s32): Likewise.
14008 (__arm_vshlq_x_n_u8): Likewise.
14009 (__arm_vshlq_x_n_u16): Likewise.
14010 (__arm_vshlq_x_n_u32): Likewise.
14011 (__arm_vrshrq_x_n_s8): Likewise.
14012 (__arm_vrshrq_x_n_s16): Likewise.
14013 (__arm_vrshrq_x_n_s32): Likewise.
14014 (__arm_vrshrq_x_n_u8): Likewise.
14015 (__arm_vrshrq_x_n_u16): Likewise.
14016 (__arm_vrshrq_x_n_u32): Likewise.
14017 (__arm_vshrq_x_n_s8): Likewise.
14018 (__arm_vshrq_x_n_s16): Likewise.
14019 (__arm_vshrq_x_n_s32): Likewise.
14020 (__arm_vshrq_x_n_u8): Likewise.
14021 (__arm_vshrq_x_n_u16): Likewise.
14022 (__arm_vshrq_x_n_u32): Likewise.
14023 (__arm_vdupq_x_n_f16): Likewise.
14024 (__arm_vdupq_x_n_f32): Likewise.
14025 (__arm_vminnmq_x_f16): Likewise.
14026 (__arm_vminnmq_x_f32): Likewise.
14027 (__arm_vmaxnmq_x_f16): Likewise.
14028 (__arm_vmaxnmq_x_f32): Likewise.
14029 (__arm_vabdq_x_f16): Likewise.
14030 (__arm_vabdq_x_f32): Likewise.
14031 (__arm_vabsq_x_f16): Likewise.
14032 (__arm_vabsq_x_f32): Likewise.
14033 (__arm_vaddq_x_f16): Likewise.
14034 (__arm_vaddq_x_f32): Likewise.
14035 (__arm_vaddq_x_n_f16): Likewise.
14036 (__arm_vaddq_x_n_f32): Likewise.
14037 (__arm_vnegq_x_f16): Likewise.
14038 (__arm_vnegq_x_f32): Likewise.
14039 (__arm_vmulq_x_f16): Likewise.
14040 (__arm_vmulq_x_f32): Likewise.
14041 (__arm_vmulq_x_n_f16): Likewise.
14042 (__arm_vmulq_x_n_f32): Likewise.
14043 (__arm_vsubq_x_f16): Likewise.
14044 (__arm_vsubq_x_f32): Likewise.
14045 (__arm_vsubq_x_n_f16): Likewise.
14046 (__arm_vsubq_x_n_f32): Likewise.
14047 (__arm_vcaddq_rot90_x_f16): Likewise.
14048 (__arm_vcaddq_rot90_x_f32): Likewise.
14049 (__arm_vcaddq_rot270_x_f16): Likewise.
14050 (__arm_vcaddq_rot270_x_f32): Likewise.
14051 (__arm_vcmulq_x_f16): Likewise.
14052 (__arm_vcmulq_x_f32): Likewise.
14053 (__arm_vcmulq_rot90_x_f16): Likewise.
14054 (__arm_vcmulq_rot90_x_f32): Likewise.
14055 (__arm_vcmulq_rot180_x_f16): Likewise.
14056 (__arm_vcmulq_rot180_x_f32): Likewise.
14057 (__arm_vcmulq_rot270_x_f16): Likewise.
14058 (__arm_vcmulq_rot270_x_f32): Likewise.
14059 (__arm_vcvtaq_x_s16_f16): Likewise.
14060 (__arm_vcvtaq_x_s32_f32): Likewise.
14061 (__arm_vcvtaq_x_u16_f16): Likewise.
14062 (__arm_vcvtaq_x_u32_f32): Likewise.
14063 (__arm_vcvtnq_x_s16_f16): Likewise.
14064 (__arm_vcvtnq_x_s32_f32): Likewise.
14065 (__arm_vcvtnq_x_u16_f16): Likewise.
14066 (__arm_vcvtnq_x_u32_f32): Likewise.
14067 (__arm_vcvtpq_x_s16_f16): Likewise.
14068 (__arm_vcvtpq_x_s32_f32): Likewise.
14069 (__arm_vcvtpq_x_u16_f16): Likewise.
14070 (__arm_vcvtpq_x_u32_f32): Likewise.
14071 (__arm_vcvtmq_x_s16_f16): Likewise.
14072 (__arm_vcvtmq_x_s32_f32): Likewise.
14073 (__arm_vcvtmq_x_u16_f16): Likewise.
14074 (__arm_vcvtmq_x_u32_f32): Likewise.
14075 (__arm_vcvtbq_x_f32_f16): Likewise.
14076 (__arm_vcvttq_x_f32_f16): Likewise.
14077 (__arm_vcvtq_x_f16_u16): Likewise.
14078 (__arm_vcvtq_x_f16_s16): Likewise.
14079 (__arm_vcvtq_x_f32_s32): Likewise.
14080 (__arm_vcvtq_x_f32_u32): Likewise.
14081 (__arm_vcvtq_x_n_f16_s16): Likewise.
14082 (__arm_vcvtq_x_n_f16_u16): Likewise.
14083 (__arm_vcvtq_x_n_f32_s32): Likewise.
14084 (__arm_vcvtq_x_n_f32_u32): Likewise.
14085 (__arm_vcvtq_x_s16_f16): Likewise.
14086 (__arm_vcvtq_x_s32_f32): Likewise.
14087 (__arm_vcvtq_x_u16_f16): Likewise.
14088 (__arm_vcvtq_x_u32_f32): Likewise.
14089 (__arm_vcvtq_x_n_s16_f16): Likewise.
14090 (__arm_vcvtq_x_n_s32_f32): Likewise.
14091 (__arm_vcvtq_x_n_u16_f16): Likewise.
14092 (__arm_vcvtq_x_n_u32_f32): Likewise.
14093 (__arm_vrndq_x_f16): Likewise.
14094 (__arm_vrndq_x_f32): Likewise.
14095 (__arm_vrndnq_x_f16): Likewise.
14096 (__arm_vrndnq_x_f32): Likewise.
14097 (__arm_vrndmq_x_f16): Likewise.
14098 (__arm_vrndmq_x_f32): Likewise.
14099 (__arm_vrndpq_x_f16): Likewise.
14100 (__arm_vrndpq_x_f32): Likewise.
14101 (__arm_vrndaq_x_f16): Likewise.
14102 (__arm_vrndaq_x_f32): Likewise.
14103 (__arm_vrndxq_x_f16): Likewise.
14104 (__arm_vrndxq_x_f32): Likewise.
14105 (__arm_vandq_x_f16): Likewise.
14106 (__arm_vandq_x_f32): Likewise.
14107 (__arm_vbicq_x_f16): Likewise.
14108 (__arm_vbicq_x_f32): Likewise.
14109 (__arm_vbrsrq_x_n_f16): Likewise.
14110 (__arm_vbrsrq_x_n_f32): Likewise.
14111 (__arm_veorq_x_f16): Likewise.
14112 (__arm_veorq_x_f32): Likewise.
14113 (__arm_vornq_x_f16): Likewise.
14114 (__arm_vornq_x_f32): Likewise.
14115 (__arm_vorrq_x_f16): Likewise.
14116 (__arm_vorrq_x_f32): Likewise.
14117 (__arm_vrev32q_x_f16): Likewise.
14118 (__arm_vrev64q_x_f16): Likewise.
14119 (__arm_vrev64q_x_f32): Likewise.
14120 (vabdq_x): Define polymorphic variant.
14121 (vabsq_x): Likewise.
14122 (vaddq_x): Likewise.
14123 (vandq_x): Likewise.
14124 (vbicq_x): Likewise.
14125 (vbrsrq_x): Likewise.
14126 (vcaddq_rot270_x): Likewise.
14127 (vcaddq_rot90_x): Likewise.
14128 (vcmulq_rot180_x): Likewise.
14129 (vcmulq_rot270_x): Likewise.
14130 (vcmulq_x): Likewise.
14131 (vcvtq_x): Likewise.
14132 (vcvtq_x_n): Likewise.
14133 (vcvtnq_m): Likewise.
14134 (veorq_x): Likewise.
14135 (vmaxnmq_x): Likewise.
14136 (vminnmq_x): Likewise.
14137 (vmulq_x): Likewise.
14138 (vnegq_x): Likewise.
14139 (vornq_x): Likewise.
14140 (vorrq_x): Likewise.
14141 (vrev32q_x): Likewise.
14142 (vrev64q_x): Likewise.
14143 (vrndaq_x): Likewise.
14144 (vrndmq_x): Likewise.
14145 (vrndnq_x): Likewise.
14146 (vrndpq_x): Likewise.
14147 (vrndq_x): Likewise.
14148 (vrndxq_x): Likewise.
14149 (vsubq_x): Likewise.
14150 (vcmulq_rot90_x): Likewise.
14151 (vadciq): Likewise.
14152 (vclsq_x): Likewise.
14153 (vclzq_x): Likewise.
14154 (vhaddq_x): Likewise.
14155 (vhcaddq_rot270_x): Likewise.
14156 (vhcaddq_rot90_x): Likewise.
14157 (vhsubq_x): Likewise.
14158 (vmaxq_x): Likewise.
14159 (vminq_x): Likewise.
14160 (vmovlbq_x): Likewise.
14161 (vmovltq_x): Likewise.
14162 (vmulhq_x): Likewise.
14163 (vmullbq_int_x): Likewise.
14164 (vmullbq_poly_x): Likewise.
14165 (vmulltq_int_x): Likewise.
14166 (vmulltq_poly_x): Likewise.
14167 (vmvnq_x): Likewise.
14168 (vrev16q_x): Likewise.
14169 (vrhaddq_x): Likewise.
14170 (vrmulhq_x): Likewise.
14171 (vrshlq_x): Likewise.
14172 (vrshrq_x): Likewise.
14173 (vshllbq_x): Likewise.
14174 (vshlltq_x): Likewise.
14175 (vshlq_x_n): Likewise.
14176 (vshlq_x): Likewise.
14177 (vdwdupq_x_u8): Likewise.
14178 (vdwdupq_x_u16): Likewise.
14179 (vdwdupq_x_u32): Likewise.
14180 (viwdupq_x_u8): Likewise.
14181 (viwdupq_x_u16): Likewise.
14182 (viwdupq_x_u32): Likewise.
14183 (vidupq_x_u8): Likewise.
14184 (vddupq_x_u8): Likewise.
14185 (vidupq_x_u16): Likewise.
14186 (vddupq_x_u16): Likewise.
14187 (vidupq_x_u32): Likewise.
14188 (vddupq_x_u32): Likewise.
14189 (vshrq_x): Likewise.
14191 2020-03-20 Richard Biener <rguenther@suse.de>
14193 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
14194 to vectorize for CTOR defs.
14196 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14197 Andre Vieira <andre.simoesdiasvieira@arm.com>
14198 Mihail Ionescu <mihail.ionescu@arm.com>
14200 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
14202 (LDRGBWBU_QUALIFIERS): Likewise.
14203 (LDRGBWBS_Z_QUALIFIERS): Likewise.
14204 (LDRGBWBU_Z_QUALIFIERS): Likewise.
14205 (STRSBWBS_QUALIFIERS): Likewise.
14206 (STRSBWBU_QUALIFIERS): Likewise.
14207 (STRSBWBS_P_QUALIFIERS): Likewise.
14208 (STRSBWBU_P_QUALIFIERS): Likewise.
14209 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
14210 (vldrdq_gather_base_wb_u64): Likewise.
14211 (vldrdq_gather_base_wb_z_s64): Likewise.
14212 (vldrdq_gather_base_wb_z_u64): Likewise.
14213 (vldrwq_gather_base_wb_f32): Likewise.
14214 (vldrwq_gather_base_wb_s32): Likewise.
14215 (vldrwq_gather_base_wb_u32): Likewise.
14216 (vldrwq_gather_base_wb_z_f32): Likewise.
14217 (vldrwq_gather_base_wb_z_s32): Likewise.
14218 (vldrwq_gather_base_wb_z_u32): Likewise.
14219 (vstrdq_scatter_base_wb_p_s64): Likewise.
14220 (vstrdq_scatter_base_wb_p_u64): Likewise.
14221 (vstrdq_scatter_base_wb_s64): Likewise.
14222 (vstrdq_scatter_base_wb_u64): Likewise.
14223 (vstrwq_scatter_base_wb_p_s32): Likewise.
14224 (vstrwq_scatter_base_wb_p_f32): Likewise.
14225 (vstrwq_scatter_base_wb_p_u32): Likewise.
14226 (vstrwq_scatter_base_wb_s32): Likewise.
14227 (vstrwq_scatter_base_wb_u32): Likewise.
14228 (vstrwq_scatter_base_wb_f32): Likewise.
14229 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
14230 (__arm_vldrdq_gather_base_wb_u64): Likewise.
14231 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
14232 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
14233 (__arm_vldrwq_gather_base_wb_s32): Likewise.
14234 (__arm_vldrwq_gather_base_wb_u32): Likewise.
14235 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
14236 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
14237 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
14238 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
14239 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
14240 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
14241 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
14242 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
14243 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
14244 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
14245 (__arm_vldrwq_gather_base_wb_f32): Likewise.
14246 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
14247 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
14248 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
14249 (vstrwq_scatter_base_wb): Define polymorphic variant.
14250 (vstrwq_scatter_base_wb_p): Likewise.
14251 (vstrdq_scatter_base_wb_p): Likewise.
14252 (vstrdq_scatter_base_wb): Likewise.
14253 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
14255 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
14257 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
14258 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
14259 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
14260 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
14261 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
14262 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
14263 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
14264 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
14265 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
14266 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
14267 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
14268 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
14269 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
14270 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
14271 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
14272 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
14273 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
14274 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
14275 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
14276 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
14277 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
14278 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
14279 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
14280 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
14281 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
14282 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
14283 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
14284 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
14285 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
14287 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14288 Andre Vieira <andre.simoesdiasvieira@arm.com>
14289 Mihail Ionescu <mihail.ionescu@arm.com>
14291 * config/arm/arm-builtins.c
14292 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
14294 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
14295 (vddupq_m_n_u32): Likewise.
14296 (vddupq_m_n_u16): Likewise.
14297 (vddupq_m_wb_u8): Likewise.
14298 (vddupq_m_wb_u16): Likewise.
14299 (vddupq_m_wb_u32): Likewise.
14300 (vddupq_n_u8): Likewise.
14301 (vddupq_n_u32): Likewise.
14302 (vddupq_n_u16): Likewise.
14303 (vddupq_wb_u8): Likewise.
14304 (vddupq_wb_u16): Likewise.
14305 (vddupq_wb_u32): Likewise.
14306 (vdwdupq_m_n_u8): Likewise.
14307 (vdwdupq_m_n_u32): Likewise.
14308 (vdwdupq_m_n_u16): Likewise.
14309 (vdwdupq_m_wb_u8): Likewise.
14310 (vdwdupq_m_wb_u32): Likewise.
14311 (vdwdupq_m_wb_u16): Likewise.
14312 (vdwdupq_n_u8): Likewise.
14313 (vdwdupq_n_u32): Likewise.
14314 (vdwdupq_n_u16): Likewise.
14315 (vdwdupq_wb_u8): Likewise.
14316 (vdwdupq_wb_u32): Likewise.
14317 (vdwdupq_wb_u16): Likewise.
14318 (vidupq_m_n_u8): Likewise.
14319 (vidupq_m_n_u32): Likewise.
14320 (vidupq_m_n_u16): Likewise.
14321 (vidupq_m_wb_u8): Likewise.
14322 (vidupq_m_wb_u16): Likewise.
14323 (vidupq_m_wb_u32): Likewise.
14324 (vidupq_n_u8): Likewise.
14325 (vidupq_n_u32): Likewise.
14326 (vidupq_n_u16): Likewise.
14327 (vidupq_wb_u8): Likewise.
14328 (vidupq_wb_u16): Likewise.
14329 (vidupq_wb_u32): Likewise.
14330 (viwdupq_m_n_u8): Likewise.
14331 (viwdupq_m_n_u32): Likewise.
14332 (viwdupq_m_n_u16): Likewise.
14333 (viwdupq_m_wb_u8): Likewise.
14334 (viwdupq_m_wb_u32): Likewise.
14335 (viwdupq_m_wb_u16): Likewise.
14336 (viwdupq_n_u8): Likewise.
14337 (viwdupq_n_u32): Likewise.
14338 (viwdupq_n_u16): Likewise.
14339 (viwdupq_wb_u8): Likewise.
14340 (viwdupq_wb_u32): Likewise.
14341 (viwdupq_wb_u16): Likewise.
14342 (__arm_vddupq_m_n_u8): Define intrinsic.
14343 (__arm_vddupq_m_n_u32): Likewise.
14344 (__arm_vddupq_m_n_u16): Likewise.
14345 (__arm_vddupq_m_wb_u8): Likewise.
14346 (__arm_vddupq_m_wb_u16): Likewise.
14347 (__arm_vddupq_m_wb_u32): Likewise.
14348 (__arm_vddupq_n_u8): Likewise.
14349 (__arm_vddupq_n_u32): Likewise.
14350 (__arm_vddupq_n_u16): Likewise.
14351 (__arm_vdwdupq_m_n_u8): Likewise.
14352 (__arm_vdwdupq_m_n_u32): Likewise.
14353 (__arm_vdwdupq_m_n_u16): Likewise.
14354 (__arm_vdwdupq_m_wb_u8): Likewise.
14355 (__arm_vdwdupq_m_wb_u32): Likewise.
14356 (__arm_vdwdupq_m_wb_u16): Likewise.
14357 (__arm_vdwdupq_n_u8): Likewise.
14358 (__arm_vdwdupq_n_u32): Likewise.
14359 (__arm_vdwdupq_n_u16): Likewise.
14360 (__arm_vdwdupq_wb_u8): Likewise.
14361 (__arm_vdwdupq_wb_u32): Likewise.
14362 (__arm_vdwdupq_wb_u16): Likewise.
14363 (__arm_vidupq_m_n_u8): Likewise.
14364 (__arm_vidupq_m_n_u32): Likewise.
14365 (__arm_vidupq_m_n_u16): Likewise.
14366 (__arm_vidupq_n_u8): Likewise.
14367 (__arm_vidupq_m_wb_u8): Likewise.
14368 (__arm_vidupq_m_wb_u16): Likewise.
14369 (__arm_vidupq_m_wb_u32): Likewise.
14370 (__arm_vidupq_n_u32): Likewise.
14371 (__arm_vidupq_n_u16): Likewise.
14372 (__arm_vidupq_wb_u8): Likewise.
14373 (__arm_vidupq_wb_u16): Likewise.
14374 (__arm_vidupq_wb_u32): Likewise.
14375 (__arm_vddupq_wb_u8): Likewise.
14376 (__arm_vddupq_wb_u16): Likewise.
14377 (__arm_vddupq_wb_u32): Likewise.
14378 (__arm_viwdupq_m_n_u8): Likewise.
14379 (__arm_viwdupq_m_n_u32): Likewise.
14380 (__arm_viwdupq_m_n_u16): Likewise.
14381 (__arm_viwdupq_m_wb_u8): Likewise.
14382 (__arm_viwdupq_m_wb_u32): Likewise.
14383 (__arm_viwdupq_m_wb_u16): Likewise.
14384 (__arm_viwdupq_n_u8): Likewise.
14385 (__arm_viwdupq_n_u32): Likewise.
14386 (__arm_viwdupq_n_u16): Likewise.
14387 (__arm_viwdupq_wb_u8): Likewise.
14388 (__arm_viwdupq_wb_u32): Likewise.
14389 (__arm_viwdupq_wb_u16): Likewise.
14390 (vidupq_m): Define polymorphic variant.
14391 (vddupq_m): Likewise.
14392 (vidupq_u16): Likewise.
14393 (vidupq_u32): Likewise.
14394 (vidupq_u8): Likewise.
14395 (vddupq_u16): Likewise.
14396 (vddupq_u32): Likewise.
14397 (vddupq_u8): Likewise.
14398 (viwdupq_m): Likewise.
14399 (viwdupq_u16): Likewise.
14400 (viwdupq_u32): Likewise.
14401 (viwdupq_u8): Likewise.
14402 (vdwdupq_m): Likewise.
14403 (vdwdupq_u16): Likewise.
14404 (vdwdupq_u32): Likewise.
14405 (vdwdupq_u8): Likewise.
14406 * config/arm/arm_mve_builtins.def
14407 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
14409 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
14410 (mve_vidupq_u<mode>_insn): Likewise.
14411 (mve_vidupq_m_n_u<mode>): Likewise.
14412 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
14413 (mve_vddupq_n_u<mode>): Likewise.
14414 (mve_vddupq_u<mode>_insn): Likewise.
14415 (mve_vddupq_m_n_u<mode>): Likewise.
14416 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
14417 (mve_vdwdupq_n_u<mode>): Likewise.
14418 (mve_vdwdupq_wb_u<mode>): Likewise.
14419 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
14420 (mve_vdwdupq_m_n_u<mode>): Likewise.
14421 (mve_vdwdupq_m_wb_u<mode>): Likewise.
14422 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
14423 (mve_viwdupq_n_u<mode>): Likewise.
14424 (mve_viwdupq_wb_u<mode>): Likewise.
14425 (mve_viwdupq_wb_u<mode>_insn): Likewise.
14426 (mve_viwdupq_m_n_u<mode>): Likewise.
14427 (mve_viwdupq_m_wb_u<mode>): Likewise.
14428 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
14430 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14432 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
14433 (vreinterpretq_s16_s64): Likewise.
14434 (vreinterpretq_s16_s8): Likewise.
14435 (vreinterpretq_s16_u16): Likewise.
14436 (vreinterpretq_s16_u32): Likewise.
14437 (vreinterpretq_s16_u64): Likewise.
14438 (vreinterpretq_s16_u8): Likewise.
14439 (vreinterpretq_s32_s16): Likewise.
14440 (vreinterpretq_s32_s64): Likewise.
14441 (vreinterpretq_s32_s8): Likewise.
14442 (vreinterpretq_s32_u16): Likewise.
14443 (vreinterpretq_s32_u32): Likewise.
14444 (vreinterpretq_s32_u64): Likewise.
14445 (vreinterpretq_s32_u8): Likewise.
14446 (vreinterpretq_s64_s16): Likewise.
14447 (vreinterpretq_s64_s32): Likewise.
14448 (vreinterpretq_s64_s8): Likewise.
14449 (vreinterpretq_s64_u16): Likewise.
14450 (vreinterpretq_s64_u32): Likewise.
14451 (vreinterpretq_s64_u64): Likewise.
14452 (vreinterpretq_s64_u8): Likewise.
14453 (vreinterpretq_s8_s16): Likewise.
14454 (vreinterpretq_s8_s32): Likewise.
14455 (vreinterpretq_s8_s64): Likewise.
14456 (vreinterpretq_s8_u16): Likewise.
14457 (vreinterpretq_s8_u32): Likewise.
14458 (vreinterpretq_s8_u64): Likewise.
14459 (vreinterpretq_s8_u8): Likewise.
14460 (vreinterpretq_u16_s16): Likewise.
14461 (vreinterpretq_u16_s32): Likewise.
14462 (vreinterpretq_u16_s64): Likewise.
14463 (vreinterpretq_u16_s8): Likewise.
14464 (vreinterpretq_u16_u32): Likewise.
14465 (vreinterpretq_u16_u64): Likewise.
14466 (vreinterpretq_u16_u8): Likewise.
14467 (vreinterpretq_u32_s16): Likewise.
14468 (vreinterpretq_u32_s32): Likewise.
14469 (vreinterpretq_u32_s64): Likewise.
14470 (vreinterpretq_u32_s8): Likewise.
14471 (vreinterpretq_u32_u16): Likewise.
14472 (vreinterpretq_u32_u64): Likewise.
14473 (vreinterpretq_u32_u8): Likewise.
14474 (vreinterpretq_u64_s16): Likewise.
14475 (vreinterpretq_u64_s32): Likewise.
14476 (vreinterpretq_u64_s64): Likewise.
14477 (vreinterpretq_u64_s8): Likewise.
14478 (vreinterpretq_u64_u16): Likewise.
14479 (vreinterpretq_u64_u32): Likewise.
14480 (vreinterpretq_u64_u8): Likewise.
14481 (vreinterpretq_u8_s16): Likewise.
14482 (vreinterpretq_u8_s32): Likewise.
14483 (vreinterpretq_u8_s64): Likewise.
14484 (vreinterpretq_u8_s8): Likewise.
14485 (vreinterpretq_u8_u16): Likewise.
14486 (vreinterpretq_u8_u32): Likewise.
14487 (vreinterpretq_u8_u64): Likewise.
14488 (vreinterpretq_s32_f16): Likewise.
14489 (vreinterpretq_s32_f32): Likewise.
14490 (vreinterpretq_u16_f16): Likewise.
14491 (vreinterpretq_u16_f32): Likewise.
14492 (vreinterpretq_u32_f16): Likewise.
14493 (vreinterpretq_u32_f32): Likewise.
14494 (vreinterpretq_u64_f16): Likewise.
14495 (vreinterpretq_u64_f32): Likewise.
14496 (vreinterpretq_u8_f16): Likewise.
14497 (vreinterpretq_u8_f32): Likewise.
14498 (vreinterpretq_f16_f32): Likewise.
14499 (vreinterpretq_f16_s16): Likewise.
14500 (vreinterpretq_f16_s32): Likewise.
14501 (vreinterpretq_f16_s64): Likewise.
14502 (vreinterpretq_f16_s8): Likewise.
14503 (vreinterpretq_f16_u16): Likewise.
14504 (vreinterpretq_f16_u32): Likewise.
14505 (vreinterpretq_f16_u64): Likewise.
14506 (vreinterpretq_f16_u8): Likewise.
14507 (vreinterpretq_f32_f16): Likewise.
14508 (vreinterpretq_f32_s16): Likewise.
14509 (vreinterpretq_f32_s32): Likewise.
14510 (vreinterpretq_f32_s64): Likewise.
14511 (vreinterpretq_f32_s8): Likewise.
14512 (vreinterpretq_f32_u16): Likewise.
14513 (vreinterpretq_f32_u32): Likewise.
14514 (vreinterpretq_f32_u64): Likewise.
14515 (vreinterpretq_f32_u8): Likewise.
14516 (vreinterpretq_s16_f16): Likewise.
14517 (vreinterpretq_s16_f32): Likewise.
14518 (vreinterpretq_s64_f16): Likewise.
14519 (vreinterpretq_s64_f32): Likewise.
14520 (vreinterpretq_s8_f16): Likewise.
14521 (vreinterpretq_s8_f32): Likewise.
14522 (vuninitializedq_u8): Likewise.
14523 (vuninitializedq_u16): Likewise.
14524 (vuninitializedq_u32): Likewise.
14525 (vuninitializedq_u64): Likewise.
14526 (vuninitializedq_s8): Likewise.
14527 (vuninitializedq_s16): Likewise.
14528 (vuninitializedq_s32): Likewise.
14529 (vuninitializedq_s64): Likewise.
14530 (vuninitializedq_f16): Likewise.
14531 (vuninitializedq_f32): Likewise.
14532 (__arm_vuninitializedq_u8): Define intrinsic.
14533 (__arm_vuninitializedq_u16): Likewise.
14534 (__arm_vuninitializedq_u32): Likewise.
14535 (__arm_vuninitializedq_u64): Likewise.
14536 (__arm_vuninitializedq_s8): Likewise.
14537 (__arm_vuninitializedq_s16): Likewise.
14538 (__arm_vuninitializedq_s32): Likewise.
14539 (__arm_vuninitializedq_s64): Likewise.
14540 (__arm_vreinterpretq_s16_s32): Likewise.
14541 (__arm_vreinterpretq_s16_s64): Likewise.
14542 (__arm_vreinterpretq_s16_s8): Likewise.
14543 (__arm_vreinterpretq_s16_u16): Likewise.
14544 (__arm_vreinterpretq_s16_u32): Likewise.
14545 (__arm_vreinterpretq_s16_u64): Likewise.
14546 (__arm_vreinterpretq_s16_u8): Likewise.
14547 (__arm_vreinterpretq_s32_s16): Likewise.
14548 (__arm_vreinterpretq_s32_s64): Likewise.
14549 (__arm_vreinterpretq_s32_s8): Likewise.
14550 (__arm_vreinterpretq_s32_u16): Likewise.
14551 (__arm_vreinterpretq_s32_u32): Likewise.
14552 (__arm_vreinterpretq_s32_u64): Likewise.
14553 (__arm_vreinterpretq_s32_u8): Likewise.
14554 (__arm_vreinterpretq_s64_s16): Likewise.
14555 (__arm_vreinterpretq_s64_s32): Likewise.
14556 (__arm_vreinterpretq_s64_s8): Likewise.
14557 (__arm_vreinterpretq_s64_u16): Likewise.
14558 (__arm_vreinterpretq_s64_u32): Likewise.
14559 (__arm_vreinterpretq_s64_u64): Likewise.
14560 (__arm_vreinterpretq_s64_u8): Likewise.
14561 (__arm_vreinterpretq_s8_s16): Likewise.
14562 (__arm_vreinterpretq_s8_s32): Likewise.
14563 (__arm_vreinterpretq_s8_s64): Likewise.
14564 (__arm_vreinterpretq_s8_u16): Likewise.
14565 (__arm_vreinterpretq_s8_u32): Likewise.
14566 (__arm_vreinterpretq_s8_u64): Likewise.
14567 (__arm_vreinterpretq_s8_u8): Likewise.
14568 (__arm_vreinterpretq_u16_s16): Likewise.
14569 (__arm_vreinterpretq_u16_s32): Likewise.
14570 (__arm_vreinterpretq_u16_s64): Likewise.
14571 (__arm_vreinterpretq_u16_s8): Likewise.
14572 (__arm_vreinterpretq_u16_u32): Likewise.
14573 (__arm_vreinterpretq_u16_u64): Likewise.
14574 (__arm_vreinterpretq_u16_u8): Likewise.
14575 (__arm_vreinterpretq_u32_s16): Likewise.
14576 (__arm_vreinterpretq_u32_s32): Likewise.
14577 (__arm_vreinterpretq_u32_s64): Likewise.
14578 (__arm_vreinterpretq_u32_s8): Likewise.
14579 (__arm_vreinterpretq_u32_u16): Likewise.
14580 (__arm_vreinterpretq_u32_u64): Likewise.
14581 (__arm_vreinterpretq_u32_u8): Likewise.
14582 (__arm_vreinterpretq_u64_s16): Likewise.
14583 (__arm_vreinterpretq_u64_s32): Likewise.
14584 (__arm_vreinterpretq_u64_s64): Likewise.
14585 (__arm_vreinterpretq_u64_s8): Likewise.
14586 (__arm_vreinterpretq_u64_u16): Likewise.
14587 (__arm_vreinterpretq_u64_u32): Likewise.
14588 (__arm_vreinterpretq_u64_u8): Likewise.
14589 (__arm_vreinterpretq_u8_s16): Likewise.
14590 (__arm_vreinterpretq_u8_s32): Likewise.
14591 (__arm_vreinterpretq_u8_s64): Likewise.
14592 (__arm_vreinterpretq_u8_s8): Likewise.
14593 (__arm_vreinterpretq_u8_u16): Likewise.
14594 (__arm_vreinterpretq_u8_u32): Likewise.
14595 (__arm_vreinterpretq_u8_u64): Likewise.
14596 (__arm_vuninitializedq_f16): Likewise.
14597 (__arm_vuninitializedq_f32): Likewise.
14598 (__arm_vreinterpretq_s32_f16): Likewise.
14599 (__arm_vreinterpretq_s32_f32): Likewise.
14600 (__arm_vreinterpretq_s16_f16): Likewise.
14601 (__arm_vreinterpretq_s16_f32): Likewise.
14602 (__arm_vreinterpretq_s64_f16): Likewise.
14603 (__arm_vreinterpretq_s64_f32): Likewise.
14604 (__arm_vreinterpretq_s8_f16): Likewise.
14605 (__arm_vreinterpretq_s8_f32): Likewise.
14606 (__arm_vreinterpretq_u16_f16): Likewise.
14607 (__arm_vreinterpretq_u16_f32): Likewise.
14608 (__arm_vreinterpretq_u32_f16): Likewise.
14609 (__arm_vreinterpretq_u32_f32): Likewise.
14610 (__arm_vreinterpretq_u64_f16): Likewise.
14611 (__arm_vreinterpretq_u64_f32): Likewise.
14612 (__arm_vreinterpretq_u8_f16): Likewise.
14613 (__arm_vreinterpretq_u8_f32): Likewise.
14614 (__arm_vreinterpretq_f16_f32): Likewise.
14615 (__arm_vreinterpretq_f16_s16): Likewise.
14616 (__arm_vreinterpretq_f16_s32): Likewise.
14617 (__arm_vreinterpretq_f16_s64): Likewise.
14618 (__arm_vreinterpretq_f16_s8): Likewise.
14619 (__arm_vreinterpretq_f16_u16): Likewise.
14620 (__arm_vreinterpretq_f16_u32): Likewise.
14621 (__arm_vreinterpretq_f16_u64): Likewise.
14622 (__arm_vreinterpretq_f16_u8): Likewise.
14623 (__arm_vreinterpretq_f32_f16): Likewise.
14624 (__arm_vreinterpretq_f32_s16): Likewise.
14625 (__arm_vreinterpretq_f32_s32): Likewise.
14626 (__arm_vreinterpretq_f32_s64): Likewise.
14627 (__arm_vreinterpretq_f32_s8): Likewise.
14628 (__arm_vreinterpretq_f32_u16): Likewise.
14629 (__arm_vreinterpretq_f32_u32): Likewise.
14630 (__arm_vreinterpretq_f32_u64): Likewise.
14631 (__arm_vreinterpretq_f32_u8): Likewise.
14632 (vuninitializedq): Define polymorphic variant.
14633 (vreinterpretq_f16): Likewise.
14634 (vreinterpretq_f32): Likewise.
14635 (vreinterpretq_s16): Likewise.
14636 (vreinterpretq_s32): Likewise.
14637 (vreinterpretq_s64): Likewise.
14638 (vreinterpretq_s8): Likewise.
14639 (vreinterpretq_u16): Likewise.
14640 (vreinterpretq_u32): Likewise.
14641 (vreinterpretq_u64): Likewise.
14642 (vreinterpretq_u8): Likewise.
14644 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14645 Andre Vieira <andre.simoesdiasvieira@arm.com>
14646 Mihail Ionescu <mihail.ionescu@arm.com>
14648 * config/arm/arm_mve.h (vaddq_s8): Define macro.
14649 (vaddq_s16): Likewise.
14650 (vaddq_s32): Likewise.
14651 (vaddq_u8): Likewise.
14652 (vaddq_u16): Likewise.
14653 (vaddq_u32): Likewise.
14654 (vaddq_f16): Likewise.
14655 (vaddq_f32): Likewise.
14656 (__arm_vaddq_s8): Define intrinsic.
14657 (__arm_vaddq_s16): Likewise.
14658 (__arm_vaddq_s32): Likewise.
14659 (__arm_vaddq_u8): Likewise.
14660 (__arm_vaddq_u16): Likewise.
14661 (__arm_vaddq_u32): Likewise.
14662 (__arm_vaddq_f16): Likewise.
14663 (__arm_vaddq_f32): Likewise.
14664 (vaddq): Define polymorphic variant.
14665 * config/arm/iterators.md (VNIM): Define mode iterator for common types
14666 Neon, IWMMXT and MVE.
14667 (VNINOTM): Likewise.
14668 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
14669 (mve_vaddq_f<mode>): Define RTL pattern.
14670 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
14671 (addv8hf3_neon): Define RTL pattern.
14672 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
14674 (addv8hf3): Define standard RTL pattern for MVE and Neon.
14675 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
14677 2020-03-20 Martin Liska <mliska@suse.cz>
14680 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
14681 build_ref_for_offset function was used and it transforms off to bytes
14684 2020-03-20 Richard Biener <rguenther@suse.de>
14686 PR tree-optimization/94266
14687 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
14688 type of the underlying object to adjust for the containing
14689 field if available.
14691 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14693 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
14694 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
14695 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
14697 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14699 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
14701 2020-03-20 Jakub Jelinek <jakub@redhat.com>
14703 PR tree-optimization/94224
14704 * gimple-ssa-store-merging.c
14705 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
14706 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
14709 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14711 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
14713 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
14716 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
14717 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
14719 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
14722 * cgraphunit.c (process_function_and_variable_attributes): warn
14723 for flatten attribute on alias.
14724 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
14726 2020-03-19 Martin Liska <mliska@suse.cz>
14728 * lto-section-in.c: Add ext_symtab.
14729 * lto-streamer-out.c (write_symbol_extension_info): New.
14730 (produce_symtab_extension): New.
14731 (produce_asm_for_decls): Stream also produce_symtab_extension.
14732 * lto-streamer.h (enum lto_section_type): New section.
14734 2020-03-19 Jakub Jelinek <jakub@redhat.com>
14736 PR tree-optimization/94211
14737 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
14738 instead of estimate_num_insns for bb_seq (middle_bb). Rename
14739 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
14742 2020-03-19 Richard Biener <rguenther@suse.de>
14745 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
14746 and build_ref_for_offset.
14748 2020-03-19 Richard Biener <rguenther@suse.de>
14750 PR middle-end/94216
14751 * fold-const.c (fold_binary_loc): Avoid using
14752 build_fold_addr_expr when we really want an ADDR_EXPR.
14754 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
14756 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
14759 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
14761 PR rtl-optimization/90275
14762 * cse.c (cse_insn): Delete no-op register moves too.
14764 2020-03-18 Martin Sebor <msebor@redhat.com>
14767 * cgraphunit.c (process_function_and_variable_attributes): Also
14768 complain about weakref function definitions and drop all effects
14771 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14772 Mihail Ionescu <mihail.ionescu@arm.com>
14773 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14775 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
14776 (vstrdq_scatter_base_p_u64): Likewise.
14777 (vstrdq_scatter_base_s64): Likewise.
14778 (vstrdq_scatter_base_u64): Likewise.
14779 (vstrdq_scatter_offset_p_s64): Likewise.
14780 (vstrdq_scatter_offset_p_u64): Likewise.
14781 (vstrdq_scatter_offset_s64): Likewise.
14782 (vstrdq_scatter_offset_u64): Likewise.
14783 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
14784 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
14785 (vstrdq_scatter_shifted_offset_s64): Likewise.
14786 (vstrdq_scatter_shifted_offset_u64): Likewise.
14787 (vstrhq_scatter_offset_f16): Likewise.
14788 (vstrhq_scatter_offset_p_f16): Likewise.
14789 (vstrhq_scatter_shifted_offset_f16): Likewise.
14790 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
14791 (vstrwq_scatter_base_f32): Likewise.
14792 (vstrwq_scatter_base_p_f32): Likewise.
14793 (vstrwq_scatter_offset_f32): Likewise.
14794 (vstrwq_scatter_offset_p_f32): Likewise.
14795 (vstrwq_scatter_offset_p_s32): Likewise.
14796 (vstrwq_scatter_offset_p_u32): Likewise.
14797 (vstrwq_scatter_offset_s32): Likewise.
14798 (vstrwq_scatter_offset_u32): Likewise.
14799 (vstrwq_scatter_shifted_offset_f32): Likewise.
14800 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
14801 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
14802 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
14803 (vstrwq_scatter_shifted_offset_s32): Likewise.
14804 (vstrwq_scatter_shifted_offset_u32): Likewise.
14805 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
14806 (__arm_vstrdq_scatter_base_p_u64): Likewise.
14807 (__arm_vstrdq_scatter_base_s64): Likewise.
14808 (__arm_vstrdq_scatter_base_u64): Likewise.
14809 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
14810 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
14811 (__arm_vstrdq_scatter_offset_s64): Likewise.
14812 (__arm_vstrdq_scatter_offset_u64): Likewise.
14813 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
14814 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
14815 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
14816 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
14817 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
14818 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
14819 (__arm_vstrwq_scatter_offset_s32): Likewise.
14820 (__arm_vstrwq_scatter_offset_u32): Likewise.
14821 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
14822 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
14823 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
14824 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
14825 (__arm_vstrhq_scatter_offset_f16): Likewise.
14826 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
14827 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
14828 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
14829 (__arm_vstrwq_scatter_base_f32): Likewise.
14830 (__arm_vstrwq_scatter_base_p_f32): Likewise.
14831 (__arm_vstrwq_scatter_offset_f32): Likewise.
14832 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
14833 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
14834 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
14835 (vstrhq_scatter_offset): Define polymorphic variant.
14836 (vstrhq_scatter_offset_p): Likewise.
14837 (vstrhq_scatter_shifted_offset): Likewise.
14838 (vstrhq_scatter_shifted_offset_p): Likewise.
14839 (vstrwq_scatter_base): Likewise.
14840 (vstrwq_scatter_base_p): Likewise.
14841 (vstrwq_scatter_offset): Likewise.
14842 (vstrwq_scatter_offset_p): Likewise.
14843 (vstrwq_scatter_shifted_offset): Likewise.
14844 (vstrwq_scatter_shifted_offset_p): Likewise.
14845 (vstrdq_scatter_base_p): Likewise.
14846 (vstrdq_scatter_base): Likewise.
14847 (vstrdq_scatter_offset_p): Likewise.
14848 (vstrdq_scatter_offset): Likewise.
14849 (vstrdq_scatter_shifted_offset_p): Likewise.
14850 (vstrdq_scatter_shifted_offset): Likewise.
14851 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
14852 (STRSBS_P): Likewise.
14853 (STRSBU): Likewise.
14854 (STRSBU_P): Likewise.
14856 (STRSS_P): Likewise.
14858 (STRSU_P): Likewise.
14859 * config/arm/constraints.md (Ri): Define.
14860 * config/arm/mve.md (VSTRDSBQ): Define iterator.
14861 (VSTRDSOQ): Likewise.
14862 (VSTRDSSOQ): Likewise.
14863 (VSTRWSOQ): Likewise.
14864 (VSTRWSSOQ): Likewise.
14865 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
14866 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
14867 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
14868 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
14869 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
14870 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
14871 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
14872 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
14873 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
14874 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
14875 (mve_vstrwq_scatter_base_fv4sf): Likewise.
14876 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
14877 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
14878 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
14879 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
14880 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
14881 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
14882 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
14883 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
14884 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
14885 * config/arm/predicates.md (Ri): Define predicate to check immediate
14886 is the range +/-1016 and multiple of 8.
14888 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14889 Mihail Ionescu <mihail.ionescu@arm.com>
14890 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14892 * config/arm/arm_mve.h (vst1q_f32): Define macro.
14893 (vst1q_f16): Likewise.
14894 (vst1q_s8): Likewise.
14895 (vst1q_s32): Likewise.
14896 (vst1q_s16): Likewise.
14897 (vst1q_u8): Likewise.
14898 (vst1q_u32): Likewise.
14899 (vst1q_u16): Likewise.
14900 (vstrhq_f16): Likewise.
14901 (vstrhq_scatter_offset_s32): Likewise.
14902 (vstrhq_scatter_offset_s16): Likewise.
14903 (vstrhq_scatter_offset_u32): Likewise.
14904 (vstrhq_scatter_offset_u16): Likewise.
14905 (vstrhq_scatter_offset_p_s32): Likewise.
14906 (vstrhq_scatter_offset_p_s16): Likewise.
14907 (vstrhq_scatter_offset_p_u32): Likewise.
14908 (vstrhq_scatter_offset_p_u16): Likewise.
14909 (vstrhq_scatter_shifted_offset_s32): Likewise.
14910 (vstrhq_scatter_shifted_offset_s16): Likewise.
14911 (vstrhq_scatter_shifted_offset_u32): Likewise.
14912 (vstrhq_scatter_shifted_offset_u16): Likewise.
14913 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
14914 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
14915 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
14916 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
14917 (vstrhq_s32): Likewise.
14918 (vstrhq_s16): Likewise.
14919 (vstrhq_u32): Likewise.
14920 (vstrhq_u16): Likewise.
14921 (vstrhq_p_f16): Likewise.
14922 (vstrhq_p_s32): Likewise.
14923 (vstrhq_p_s16): Likewise.
14924 (vstrhq_p_u32): Likewise.
14925 (vstrhq_p_u16): Likewise.
14926 (vstrwq_f32): Likewise.
14927 (vstrwq_s32): Likewise.
14928 (vstrwq_u32): Likewise.
14929 (vstrwq_p_f32): Likewise.
14930 (vstrwq_p_s32): Likewise.
14931 (vstrwq_p_u32): Likewise.
14932 (__arm_vst1q_s8): Define intrinsic.
14933 (__arm_vst1q_s32): Likewise.
14934 (__arm_vst1q_s16): Likewise.
14935 (__arm_vst1q_u8): Likewise.
14936 (__arm_vst1q_u32): Likewise.
14937 (__arm_vst1q_u16): Likewise.
14938 (__arm_vstrhq_scatter_offset_s32): Likewise.
14939 (__arm_vstrhq_scatter_offset_s16): Likewise.
14940 (__arm_vstrhq_scatter_offset_u32): Likewise.
14941 (__arm_vstrhq_scatter_offset_u16): Likewise.
14942 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
14943 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
14944 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
14945 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
14946 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
14947 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
14948 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
14949 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
14950 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
14951 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
14952 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
14953 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
14954 (__arm_vstrhq_s32): Likewise.
14955 (__arm_vstrhq_s16): Likewise.
14956 (__arm_vstrhq_u32): Likewise.
14957 (__arm_vstrhq_u16): Likewise.
14958 (__arm_vstrhq_p_s32): Likewise.
14959 (__arm_vstrhq_p_s16): Likewise.
14960 (__arm_vstrhq_p_u32): Likewise.
14961 (__arm_vstrhq_p_u16): Likewise.
14962 (__arm_vstrwq_s32): Likewise.
14963 (__arm_vstrwq_u32): Likewise.
14964 (__arm_vstrwq_p_s32): Likewise.
14965 (__arm_vstrwq_p_u32): Likewise.
14966 (__arm_vstrwq_p_f32): Likewise.
14967 (__arm_vstrwq_f32): Likewise.
14968 (__arm_vst1q_f32): Likewise.
14969 (__arm_vst1q_f16): Likewise.
14970 (__arm_vstrhq_f16): Likewise.
14971 (__arm_vstrhq_p_f16): Likewise.
14972 (vst1q): Define polymorphic variant.
14973 (vstrhq): Likewise.
14974 (vstrhq_p): Likewise.
14975 (vstrhq_scatter_offset_p): Likewise.
14976 (vstrhq_scatter_offset): Likewise.
14977 (vstrhq_scatter_shifted_offset_p): Likewise.
14978 (vstrhq_scatter_shifted_offset): Likewise.
14979 (vstrwq_p): Likewise.
14980 (vstrwq): Likewise.
14981 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
14982 (STRS_P): Likewise.
14984 (STRSS_P): Likewise.
14986 (STRSU_P): Likewise.
14988 (STRU_P): Likewise.
14989 * config/arm/mve.md (VST1Q): Define iterator.
14990 (VSTRHSOQ): Likewise.
14991 (VSTRHSSOQ): Likewise.
14992 (VSTRHQ): Likewise.
14993 (VSTRWQ): Likewise.
14994 (mve_vstrhq_fv8hf): Define RTL pattern.
14995 (mve_vstrhq_p_fv8hf): Likewise.
14996 (mve_vstrhq_p_<supf><mode>): Likewise.
14997 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
14998 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
14999 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
15000 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
15001 (mve_vstrhq_<supf><mode>): Likewise.
15002 (mve_vstrwq_fv4sf): Likewise.
15003 (mve_vstrwq_p_fv4sf): Likewise.
15004 (mve_vstrwq_p_<supf>v4si): Likewise.
15005 (mve_vstrwq_<supf>v4si): Likewise.
15006 (mve_vst1q_f<mode>): Define expand.
15007 (mve_vst1q_<supf><mode>): Likewise.
15009 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15010 Mihail Ionescu <mihail.ionescu@arm.com>
15011 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15013 * config/arm/arm_mve.h (vld1q_s8): Define macro.
15014 (vld1q_s32): Likewise.
15015 (vld1q_s16): Likewise.
15016 (vld1q_u8): Likewise.
15017 (vld1q_u32): Likewise.
15018 (vld1q_u16): Likewise.
15019 (vldrhq_gather_offset_s32): Likewise.
15020 (vldrhq_gather_offset_s16): Likewise.
15021 (vldrhq_gather_offset_u32): Likewise.
15022 (vldrhq_gather_offset_u16): Likewise.
15023 (vldrhq_gather_offset_z_s32): Likewise.
15024 (vldrhq_gather_offset_z_s16): Likewise.
15025 (vldrhq_gather_offset_z_u32): Likewise.
15026 (vldrhq_gather_offset_z_u16): Likewise.
15027 (vldrhq_gather_shifted_offset_s32): Likewise.
15028 (vldrhq_gather_shifted_offset_s16): Likewise.
15029 (vldrhq_gather_shifted_offset_u32): Likewise.
15030 (vldrhq_gather_shifted_offset_u16): Likewise.
15031 (vldrhq_gather_shifted_offset_z_s32): Likewise.
15032 (vldrhq_gather_shifted_offset_z_s16): Likewise.
15033 (vldrhq_gather_shifted_offset_z_u32): Likewise.
15034 (vldrhq_gather_shifted_offset_z_u16): Likewise.
15035 (vldrhq_s32): Likewise.
15036 (vldrhq_s16): Likewise.
15037 (vldrhq_u32): Likewise.
15038 (vldrhq_u16): Likewise.
15039 (vldrhq_z_s32): Likewise.
15040 (vldrhq_z_s16): Likewise.
15041 (vldrhq_z_u32): Likewise.
15042 (vldrhq_z_u16): Likewise.
15043 (vldrwq_s32): Likewise.
15044 (vldrwq_u32): Likewise.
15045 (vldrwq_z_s32): Likewise.
15046 (vldrwq_z_u32): Likewise.
15047 (vld1q_f32): Likewise.
15048 (vld1q_f16): Likewise.
15049 (vldrhq_f16): Likewise.
15050 (vldrhq_z_f16): Likewise.
15051 (vldrwq_f32): Likewise.
15052 (vldrwq_z_f32): Likewise.
15053 (__arm_vld1q_s8): Define intrinsic.
15054 (__arm_vld1q_s32): Likewise.
15055 (__arm_vld1q_s16): Likewise.
15056 (__arm_vld1q_u8): Likewise.
15057 (__arm_vld1q_u32): Likewise.
15058 (__arm_vld1q_u16): Likewise.
15059 (__arm_vldrhq_gather_offset_s32): Likewise.
15060 (__arm_vldrhq_gather_offset_s16): Likewise.
15061 (__arm_vldrhq_gather_offset_u32): Likewise.
15062 (__arm_vldrhq_gather_offset_u16): Likewise.
15063 (__arm_vldrhq_gather_offset_z_s32): Likewise.
15064 (__arm_vldrhq_gather_offset_z_s16): Likewise.
15065 (__arm_vldrhq_gather_offset_z_u32): Likewise.
15066 (__arm_vldrhq_gather_offset_z_u16): Likewise.
15067 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
15068 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
15069 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
15070 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
15071 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
15072 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
15073 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
15074 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
15075 (__arm_vldrhq_s32): Likewise.
15076 (__arm_vldrhq_s16): Likewise.
15077 (__arm_vldrhq_u32): Likewise.
15078 (__arm_vldrhq_u16): Likewise.
15079 (__arm_vldrhq_z_s32): Likewise.
15080 (__arm_vldrhq_z_s16): Likewise.
15081 (__arm_vldrhq_z_u32): Likewise.
15082 (__arm_vldrhq_z_u16): Likewise.
15083 (__arm_vldrwq_s32): Likewise.
15084 (__arm_vldrwq_u32): Likewise.
15085 (__arm_vldrwq_z_s32): Likewise.
15086 (__arm_vldrwq_z_u32): Likewise.
15087 (__arm_vld1q_f32): Likewise.
15088 (__arm_vld1q_f16): Likewise.
15089 (__arm_vldrwq_f32): Likewise.
15090 (__arm_vldrwq_z_f32): Likewise.
15091 (__arm_vldrhq_z_f16): Likewise.
15092 (__arm_vldrhq_f16): Likewise.
15093 (vld1q): Define polymorphic variant.
15094 (vldrhq_gather_offset): Likewise.
15095 (vldrhq_gather_offset_z): Likewise.
15096 (vldrhq_gather_shifted_offset): Likewise.
15097 (vldrhq_gather_shifted_offset_z): Likewise.
15098 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
15100 (LDRU_Z): Likewise.
15101 (LDRS_Z): Likewise.
15102 (LDRGU_Z): Likewise.
15104 (LDRGS_Z): Likewise.
15106 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
15107 (V_sz_elem1): Likewise.
15108 (VLD1Q): Define iterator.
15109 (VLDRHGOQ): Likewise.
15110 (VLDRHGSOQ): Likewise.
15111 (VLDRHQ): Likewise.
15112 (VLDRWQ): Likewise.
15113 (mve_vldrhq_fv8hf): Define RTL pattern.
15114 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
15115 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
15116 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
15117 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
15118 (mve_vldrhq_<supf><mode>): Likewise.
15119 (mve_vldrhq_z_fv8hf): Likewise.
15120 (mve_vldrhq_z_<supf><mode>): Likewise.
15121 (mve_vldrwq_fv4sf): Likewise.
15122 (mve_vldrwq_<supf>v4si): Likewise.
15123 (mve_vldrwq_z_fv4sf): Likewise.
15124 (mve_vldrwq_z_<supf>v4si): Likewise.
15125 (mve_vld1q_f<mode>): Define RTL expand pattern.
15126 (mve_vld1q_<supf><mode>): Likewise.
15128 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15129 Mihail Ionescu <mihail.ionescu@arm.com>
15130 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15132 * config/arm/arm_mve.h (vld1q_s8): Define macro.
15133 (vld1q_s32): Likewise.
15134 (vld1q_s16): Likewise.
15135 (vld1q_u8): Likewise.
15136 (vld1q_u32): Likewise.
15137 (vld1q_u16): Likewise.
15138 (vldrhq_gather_offset_s32): Likewise.
15139 (vldrhq_gather_offset_s16): Likewise.
15140 (vldrhq_gather_offset_u32): Likewise.
15141 (vldrhq_gather_offset_u16): Likewise.
15142 (vldrhq_gather_offset_z_s32): Likewise.
15143 (vldrhq_gather_offset_z_s16): Likewise.
15144 (vldrhq_gather_offset_z_u32): Likewise.
15145 (vldrhq_gather_offset_z_u16): Likewise.
15146 (vldrhq_gather_shifted_offset_s32): Likewise.
15147 (vldrhq_gather_shifted_offset_s16): Likewise.
15148 (vldrhq_gather_shifted_offset_u32): Likewise.
15149 (vldrhq_gather_shifted_offset_u16): Likewise.
15150 (vldrhq_gather_shifted_offset_z_s32): Likewise.
15151 (vldrhq_gather_shifted_offset_z_s16): Likewise.
15152 (vldrhq_gather_shifted_offset_z_u32): Likewise.
15153 (vldrhq_gather_shifted_offset_z_u16): Likewise.
15154 (vldrhq_s32): Likewise.
15155 (vldrhq_s16): Likewise.
15156 (vldrhq_u32): Likewise.
15157 (vldrhq_u16): Likewise.
15158 (vldrhq_z_s32): Likewise.
15159 (vldrhq_z_s16): Likewise.
15160 (vldrhq_z_u32): Likewise.
15161 (vldrhq_z_u16): Likewise.
15162 (vldrwq_s32): Likewise.
15163 (vldrwq_u32): Likewise.
15164 (vldrwq_z_s32): Likewise.
15165 (vldrwq_z_u32): Likewise.
15166 (vld1q_f32): Likewise.
15167 (vld1q_f16): Likewise.
15168 (vldrhq_f16): Likewise.
15169 (vldrhq_z_f16): Likewise.
15170 (vldrwq_f32): Likewise.
15171 (vldrwq_z_f32): Likewise.
15172 (__arm_vld1q_s8): Define intrinsic.
15173 (__arm_vld1q_s32): Likewise.
15174 (__arm_vld1q_s16): Likewise.
15175 (__arm_vld1q_u8): Likewise.
15176 (__arm_vld1q_u32): Likewise.
15177 (__arm_vld1q_u16): Likewise.
15178 (__arm_vldrhq_gather_offset_s32): Likewise.
15179 (__arm_vldrhq_gather_offset_s16): Likewise.
15180 (__arm_vldrhq_gather_offset_u32): Likewise.
15181 (__arm_vldrhq_gather_offset_u16): Likewise.
15182 (__arm_vldrhq_gather_offset_z_s32): Likewise.
15183 (__arm_vldrhq_gather_offset_z_s16): Likewise.
15184 (__arm_vldrhq_gather_offset_z_u32): Likewise.
15185 (__arm_vldrhq_gather_offset_z_u16): Likewise.
15186 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
15187 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
15188 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
15189 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
15190 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
15191 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
15192 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
15193 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
15194 (__arm_vldrhq_s32): Likewise.
15195 (__arm_vldrhq_s16): Likewise.
15196 (__arm_vldrhq_u32): Likewise.
15197 (__arm_vldrhq_u16): Likewise.
15198 (__arm_vldrhq_z_s32): Likewise.
15199 (__arm_vldrhq_z_s16): Likewise.
15200 (__arm_vldrhq_z_u32): Likewise.
15201 (__arm_vldrhq_z_u16): Likewise.
15202 (__arm_vldrwq_s32): Likewise.
15203 (__arm_vldrwq_u32): Likewise.
15204 (__arm_vldrwq_z_s32): Likewise.
15205 (__arm_vldrwq_z_u32): Likewise.
15206 (__arm_vld1q_f32): Likewise.
15207 (__arm_vld1q_f16): Likewise.
15208 (__arm_vldrwq_f32): Likewise.
15209 (__arm_vldrwq_z_f32): Likewise.
15210 (__arm_vldrhq_z_f16): Likewise.
15211 (__arm_vldrhq_f16): Likewise.
15212 (vld1q): Define polymorphic variant.
15213 (vldrhq_gather_offset): Likewise.
15214 (vldrhq_gather_offset_z): Likewise.
15215 (vldrhq_gather_shifted_offset): Likewise.
15216 (vldrhq_gather_shifted_offset_z): Likewise.
15217 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
15219 (LDRU_Z): Likewise.
15220 (LDRS_Z): Likewise.
15221 (LDRGU_Z): Likewise.
15223 (LDRGS_Z): Likewise.
15225 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
15226 (V_sz_elem1): Likewise.
15227 (VLD1Q): Define iterator.
15228 (VLDRHGOQ): Likewise.
15229 (VLDRHGSOQ): Likewise.
15230 (VLDRHQ): Likewise.
15231 (VLDRWQ): Likewise.
15232 (mve_vldrhq_fv8hf): Define RTL pattern.
15233 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
15234 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
15235 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
15236 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
15237 (mve_vldrhq_<supf><mode>): Likewise.
15238 (mve_vldrhq_z_fv8hf): Likewise.
15239 (mve_vldrhq_z_<supf><mode>): Likewise.
15240 (mve_vldrwq_fv4sf): Likewise.
15241 (mve_vldrwq_<supf>v4si): Likewise.
15242 (mve_vldrwq_z_fv4sf): Likewise.
15243 (mve_vldrwq_z_<supf>v4si): Likewise.
15244 (mve_vld1q_f<mode>): Define RTL expand pattern.
15245 (mve_vld1q_<supf><mode>): Likewise.
15247 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15248 Mihail Ionescu <mihail.ionescu@arm.com>
15249 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15251 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
15253 (LDRGBU_Z_QUALIFIERS): Likewise.
15254 (LDRGS_Z_QUALIFIERS): Likewise.
15255 (LDRGU_Z_QUALIFIERS): Likewise.
15256 (LDRS_Z_QUALIFIERS): Likewise.
15257 (LDRU_Z_QUALIFIERS): Likewise.
15258 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
15259 (vldrbq_gather_offset_z_u8): Likewise.
15260 (vldrbq_gather_offset_z_s32): Likewise.
15261 (vldrbq_gather_offset_z_u16): Likewise.
15262 (vldrbq_gather_offset_z_u32): Likewise.
15263 (vldrbq_gather_offset_z_s8): Likewise.
15264 (vldrbq_z_s16): Likewise.
15265 (vldrbq_z_u8): Likewise.
15266 (vldrbq_z_s8): Likewise.
15267 (vldrbq_z_s32): Likewise.
15268 (vldrbq_z_u16): Likewise.
15269 (vldrbq_z_u32): Likewise.
15270 (vldrwq_gather_base_z_u32): Likewise.
15271 (vldrwq_gather_base_z_s32): Likewise.
15272 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
15273 (__arm_vldrbq_gather_offset_z_s32): Likewise.
15274 (__arm_vldrbq_gather_offset_z_s16): Likewise.
15275 (__arm_vldrbq_gather_offset_z_u8): Likewise.
15276 (__arm_vldrbq_gather_offset_z_u32): Likewise.
15277 (__arm_vldrbq_gather_offset_z_u16): Likewise.
15278 (__arm_vldrbq_z_s8): Likewise.
15279 (__arm_vldrbq_z_s32): Likewise.
15280 (__arm_vldrbq_z_s16): Likewise.
15281 (__arm_vldrbq_z_u8): Likewise.
15282 (__arm_vldrbq_z_u32): Likewise.
15283 (__arm_vldrbq_z_u16): Likewise.
15284 (__arm_vldrwq_gather_base_z_s32): Likewise.
15285 (__arm_vldrwq_gather_base_z_u32): Likewise.
15286 (vldrbq_gather_offset_z): Define polymorphic variant.
15287 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
15289 (LDRGBU_Z_QUALIFIERS): Likewise.
15290 (LDRGS_Z_QUALIFIERS): Likewise.
15291 (LDRGU_Z_QUALIFIERS): Likewise.
15292 (LDRS_Z_QUALIFIERS): Likewise.
15293 (LDRU_Z_QUALIFIERS): Likewise.
15294 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
15296 (mve_vldrbq_z_<supf><mode>): Likewise.
15297 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
15299 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15300 Mihail Ionescu <mihail.ionescu@arm.com>
15301 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15303 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
15305 (STRU_P_QUALIFIERS): Likewise.
15306 (STRSU_P_QUALIFIERS): Likewise.
15307 (STRSS_P_QUALIFIERS): Likewise.
15308 (STRSBS_P_QUALIFIERS): Likewise.
15309 (STRSBU_P_QUALIFIERS): Likewise.
15310 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
15311 (vstrbq_p_s32): Likewise.
15312 (vstrbq_p_s16): Likewise.
15313 (vstrbq_p_u8): Likewise.
15314 (vstrbq_p_u32): Likewise.
15315 (vstrbq_p_u16): Likewise.
15316 (vstrbq_scatter_offset_p_s8): Likewise.
15317 (vstrbq_scatter_offset_p_s32): Likewise.
15318 (vstrbq_scatter_offset_p_s16): Likewise.
15319 (vstrbq_scatter_offset_p_u8): Likewise.
15320 (vstrbq_scatter_offset_p_u32): Likewise.
15321 (vstrbq_scatter_offset_p_u16): Likewise.
15322 (vstrwq_scatter_base_p_s32): Likewise.
15323 (vstrwq_scatter_base_p_u32): Likewise.
15324 (__arm_vstrbq_p_s8): Define intrinsic.
15325 (__arm_vstrbq_p_s32): Likewise.
15326 (__arm_vstrbq_p_s16): Likewise.
15327 (__arm_vstrbq_p_u8): Likewise.
15328 (__arm_vstrbq_p_u32): Likewise.
15329 (__arm_vstrbq_p_u16): Likewise.
15330 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
15331 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
15332 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
15333 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
15334 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
15335 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
15336 (__arm_vstrwq_scatter_base_p_s32): Likewise.
15337 (__arm_vstrwq_scatter_base_p_u32): Likewise.
15338 (vstrbq_p): Define polymorphic variant.
15339 (vstrbq_scatter_offset_p): Likewise.
15340 (vstrwq_scatter_base_p): Likewise.
15341 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
15343 (STRU_P_QUALIFIERS): Likewise.
15344 (STRSU_P_QUALIFIERS): Likewise.
15345 (STRSS_P_QUALIFIERS): Likewise.
15346 (STRSBS_P_QUALIFIERS): Likewise.
15347 (STRSBU_P_QUALIFIERS): Likewise.
15348 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
15350 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
15351 (mve_vstrbq_p_<supf><mode>): Likewise.
15353 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15354 Mihail Ionescu <mihail.ionescu@arm.com>
15355 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15357 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
15359 (LDRGS_QUALIFIERS): Likewise.
15360 (LDRS_QUALIFIERS): Likewise.
15361 (LDRU_QUALIFIERS): Likewise.
15362 (LDRGBS_QUALIFIERS): Likewise.
15363 (LDRGBU_QUALIFIERS): Likewise.
15364 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
15365 (vldrbq_gather_offset_s8): Likewise.
15366 (vldrbq_s8): Likewise.
15367 (vldrbq_u8): Likewise.
15368 (vldrbq_gather_offset_u16): Likewise.
15369 (vldrbq_gather_offset_s16): Likewise.
15370 (vldrbq_s16): Likewise.
15371 (vldrbq_u16): Likewise.
15372 (vldrbq_gather_offset_u32): Likewise.
15373 (vldrbq_gather_offset_s32): Likewise.
15374 (vldrbq_s32): Likewise.
15375 (vldrbq_u32): Likewise.
15376 (vldrwq_gather_base_s32): Likewise.
15377 (vldrwq_gather_base_u32): Likewise.
15378 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
15379 (__arm_vldrbq_gather_offset_s8): Likewise.
15380 (__arm_vldrbq_s8): Likewise.
15381 (__arm_vldrbq_u8): Likewise.
15382 (__arm_vldrbq_gather_offset_u16): Likewise.
15383 (__arm_vldrbq_gather_offset_s16): Likewise.
15384 (__arm_vldrbq_s16): Likewise.
15385 (__arm_vldrbq_u16): Likewise.
15386 (__arm_vldrbq_gather_offset_u32): Likewise.
15387 (__arm_vldrbq_gather_offset_s32): Likewise.
15388 (__arm_vldrbq_s32): Likewise.
15389 (__arm_vldrbq_u32): Likewise.
15390 (__arm_vldrwq_gather_base_s32): Likewise.
15391 (__arm_vldrwq_gather_base_u32): Likewise.
15392 (vldrbq_gather_offset): Define polymorphic variant.
15393 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
15395 (LDRGS_QUALIFIERS): Likewise.
15396 (LDRS_QUALIFIERS): Likewise.
15397 (LDRU_QUALIFIERS): Likewise.
15398 (LDRGBS_QUALIFIERS): Likewise.
15399 (LDRGBU_QUALIFIERS): Likewise.
15400 * config/arm/mve.md (VLDRBGOQ): Define iterator.
15401 (VLDRBQ): Likewise.
15402 (VLDRWGBQ): Likewise.
15403 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
15404 (mve_vldrbq_<supf><mode>): Likewise.
15405 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
15407 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15408 Mihail Ionescu <mihail.ionescu@arm.com>
15409 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15411 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
15412 (STRU_QUALIFIERS): Likewise.
15413 (STRSS_QUALIFIERS): Likewise.
15414 (STRSU_QUALIFIERS): Likewise.
15415 (STRSBS_QUALIFIERS): Likewise.
15416 (STRSBU_QUALIFIERS): Likewise.
15417 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
15418 (vstrbq_u8): Likewise.
15419 (vstrbq_u16): Likewise.
15420 (vstrbq_scatter_offset_s8): Likewise.
15421 (vstrbq_scatter_offset_u8): Likewise.
15422 (vstrbq_scatter_offset_u16): Likewise.
15423 (vstrbq_s16): Likewise.
15424 (vstrbq_u32): Likewise.
15425 (vstrbq_scatter_offset_s16): Likewise.
15426 (vstrbq_scatter_offset_u32): Likewise.
15427 (vstrbq_s32): Likewise.
15428 (vstrbq_scatter_offset_s32): Likewise.
15429 (vstrwq_scatter_base_s32): Likewise.
15430 (vstrwq_scatter_base_u32): Likewise.
15431 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
15432 (__arm_vstrbq_scatter_offset_s32): Likewise.
15433 (__arm_vstrbq_scatter_offset_s16): Likewise.
15434 (__arm_vstrbq_scatter_offset_u8): Likewise.
15435 (__arm_vstrbq_scatter_offset_u32): Likewise.
15436 (__arm_vstrbq_scatter_offset_u16): Likewise.
15437 (__arm_vstrbq_s8): Likewise.
15438 (__arm_vstrbq_s32): Likewise.
15439 (__arm_vstrbq_s16): Likewise.
15440 (__arm_vstrbq_u8): Likewise.
15441 (__arm_vstrbq_u32): Likewise.
15442 (__arm_vstrbq_u16): Likewise.
15443 (__arm_vstrwq_scatter_base_s32): Likewise.
15444 (__arm_vstrwq_scatter_base_u32): Likewise.
15445 (vstrbq): Define polymorphic variant.
15446 (vstrbq_scatter_offset): Likewise.
15447 (vstrwq_scatter_base): Likewise.
15448 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
15450 (STRU_QUALIFIERS): Likewise.
15451 (STRSS_QUALIFIERS): Likewise.
15452 (STRSU_QUALIFIERS): Likewise.
15453 (STRSBS_QUALIFIERS): Likewise.
15454 (STRSBU_QUALIFIERS): Likewise.
15455 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
15456 (VSTRWSBQ): Define iterators.
15457 (VSTRBSOQ): Likewise.
15458 (VSTRBQ): Likewise.
15459 (mve_vstrbq_<supf><mode>): Define RTL pattern.
15460 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
15461 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
15463 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15464 Mihail Ionescu <mihail.ionescu@arm.com>
15465 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15467 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
15468 (vabdq_m_f16): Likewise.
15469 (vaddq_m_f32): Likewise.
15470 (vaddq_m_f16): Likewise.
15471 (vaddq_m_n_f32): Likewise.
15472 (vaddq_m_n_f16): Likewise.
15473 (vandq_m_f32): Likewise.
15474 (vandq_m_f16): Likewise.
15475 (vbicq_m_f32): Likewise.
15476 (vbicq_m_f16): Likewise.
15477 (vbrsrq_m_n_f32): Likewise.
15478 (vbrsrq_m_n_f16): Likewise.
15479 (vcaddq_rot270_m_f32): Likewise.
15480 (vcaddq_rot270_m_f16): Likewise.
15481 (vcaddq_rot90_m_f32): Likewise.
15482 (vcaddq_rot90_m_f16): Likewise.
15483 (vcmlaq_m_f32): Likewise.
15484 (vcmlaq_m_f16): Likewise.
15485 (vcmlaq_rot180_m_f32): Likewise.
15486 (vcmlaq_rot180_m_f16): Likewise.
15487 (vcmlaq_rot270_m_f32): Likewise.
15488 (vcmlaq_rot270_m_f16): Likewise.
15489 (vcmlaq_rot90_m_f32): Likewise.
15490 (vcmlaq_rot90_m_f16): Likewise.
15491 (vcmulq_m_f32): Likewise.
15492 (vcmulq_m_f16): Likewise.
15493 (vcmulq_rot180_m_f32): Likewise.
15494 (vcmulq_rot180_m_f16): Likewise.
15495 (vcmulq_rot270_m_f32): Likewise.
15496 (vcmulq_rot270_m_f16): Likewise.
15497 (vcmulq_rot90_m_f32): Likewise.
15498 (vcmulq_rot90_m_f16): Likewise.
15499 (vcvtq_m_n_s32_f32): Likewise.
15500 (vcvtq_m_n_s16_f16): Likewise.
15501 (vcvtq_m_n_u32_f32): Likewise.
15502 (vcvtq_m_n_u16_f16): Likewise.
15503 (veorq_m_f32): Likewise.
15504 (veorq_m_f16): Likewise.
15505 (vfmaq_m_f32): Likewise.
15506 (vfmaq_m_f16): Likewise.
15507 (vfmaq_m_n_f32): Likewise.
15508 (vfmaq_m_n_f16): Likewise.
15509 (vfmasq_m_n_f32): Likewise.
15510 (vfmasq_m_n_f16): Likewise.
15511 (vfmsq_m_f32): Likewise.
15512 (vfmsq_m_f16): Likewise.
15513 (vmaxnmq_m_f32): Likewise.
15514 (vmaxnmq_m_f16): Likewise.
15515 (vminnmq_m_f32): Likewise.
15516 (vminnmq_m_f16): Likewise.
15517 (vmulq_m_f32): Likewise.
15518 (vmulq_m_f16): Likewise.
15519 (vmulq_m_n_f32): Likewise.
15520 (vmulq_m_n_f16): Likewise.
15521 (vornq_m_f32): Likewise.
15522 (vornq_m_f16): Likewise.
15523 (vorrq_m_f32): Likewise.
15524 (vorrq_m_f16): Likewise.
15525 (vsubq_m_f32): Likewise.
15526 (vsubq_m_f16): Likewise.
15527 (vsubq_m_n_f32): Likewise.
15528 (vsubq_m_n_f16): Likewise.
15529 (__attribute__): Likewise.
15530 (__arm_vabdq_m_f32): Likewise.
15531 (__arm_vabdq_m_f16): Likewise.
15532 (__arm_vaddq_m_f32): Likewise.
15533 (__arm_vaddq_m_f16): Likewise.
15534 (__arm_vaddq_m_n_f32): Likewise.
15535 (__arm_vaddq_m_n_f16): Likewise.
15536 (__arm_vandq_m_f32): Likewise.
15537 (__arm_vandq_m_f16): Likewise.
15538 (__arm_vbicq_m_f32): Likewise.
15539 (__arm_vbicq_m_f16): Likewise.
15540 (__arm_vbrsrq_m_n_f32): Likewise.
15541 (__arm_vbrsrq_m_n_f16): Likewise.
15542 (__arm_vcaddq_rot270_m_f32): Likewise.
15543 (__arm_vcaddq_rot270_m_f16): Likewise.
15544 (__arm_vcaddq_rot90_m_f32): Likewise.
15545 (__arm_vcaddq_rot90_m_f16): Likewise.
15546 (__arm_vcmlaq_m_f32): Likewise.
15547 (__arm_vcmlaq_m_f16): Likewise.
15548 (__arm_vcmlaq_rot180_m_f32): Likewise.
15549 (__arm_vcmlaq_rot180_m_f16): Likewise.
15550 (__arm_vcmlaq_rot270_m_f32): Likewise.
15551 (__arm_vcmlaq_rot270_m_f16): Likewise.
15552 (__arm_vcmlaq_rot90_m_f32): Likewise.
15553 (__arm_vcmlaq_rot90_m_f16): Likewise.
15554 (__arm_vcmulq_m_f32): Likewise.
15555 (__arm_vcmulq_m_f16): Likewise.
15556 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
15557 (__arm_vcmulq_rot180_m_f16): Likewise.
15558 (__arm_vcmulq_rot270_m_f32): Likewise.
15559 (__arm_vcmulq_rot270_m_f16): Likewise.
15560 (__arm_vcmulq_rot90_m_f32): Likewise.
15561 (__arm_vcmulq_rot90_m_f16): Likewise.
15562 (__arm_vcvtq_m_n_s32_f32): Likewise.
15563 (__arm_vcvtq_m_n_s16_f16): Likewise.
15564 (__arm_vcvtq_m_n_u32_f32): Likewise.
15565 (__arm_vcvtq_m_n_u16_f16): Likewise.
15566 (__arm_veorq_m_f32): Likewise.
15567 (__arm_veorq_m_f16): Likewise.
15568 (__arm_vfmaq_m_f32): Likewise.
15569 (__arm_vfmaq_m_f16): Likewise.
15570 (__arm_vfmaq_m_n_f32): Likewise.
15571 (__arm_vfmaq_m_n_f16): Likewise.
15572 (__arm_vfmasq_m_n_f32): Likewise.
15573 (__arm_vfmasq_m_n_f16): Likewise.
15574 (__arm_vfmsq_m_f32): Likewise.
15575 (__arm_vfmsq_m_f16): Likewise.
15576 (__arm_vmaxnmq_m_f32): Likewise.
15577 (__arm_vmaxnmq_m_f16): Likewise.
15578 (__arm_vminnmq_m_f32): Likewise.
15579 (__arm_vminnmq_m_f16): Likewise.
15580 (__arm_vmulq_m_f32): Likewise.
15581 (__arm_vmulq_m_f16): Likewise.
15582 (__arm_vmulq_m_n_f32): Likewise.
15583 (__arm_vmulq_m_n_f16): Likewise.
15584 (__arm_vornq_m_f32): Likewise.
15585 (__arm_vornq_m_f16): Likewise.
15586 (__arm_vorrq_m_f32): Likewise.
15587 (__arm_vorrq_m_f16): Likewise.
15588 (__arm_vsubq_m_f32): Likewise.
15589 (__arm_vsubq_m_f16): Likewise.
15590 (__arm_vsubq_m_n_f32): Likewise.
15591 (__arm_vsubq_m_n_f16): Likewise.
15592 (vabdq_m): Define polymorphic variant.
15593 (vaddq_m): Likewise.
15594 (vaddq_m_n): Likewise.
15595 (vandq_m): Likewise.
15596 (vbicq_m): Likewise.
15597 (vbrsrq_m_n): Likewise.
15598 (vcaddq_rot270_m): Likewise.
15599 (vcaddq_rot90_m): Likewise.
15600 (vcmlaq_m): Likewise.
15601 (vcmlaq_rot180_m): Likewise.
15602 (vcmlaq_rot270_m): Likewise.
15603 (vcmlaq_rot90_m): Likewise.
15604 (vcmulq_m): Likewise.
15605 (vcmulq_rot180_m): Likewise.
15606 (vcmulq_rot270_m): Likewise.
15607 (vcmulq_rot90_m): Likewise.
15608 (veorq_m): Likewise.
15609 (vfmaq_m): Likewise.
15610 (vfmaq_m_n): Likewise.
15611 (vfmasq_m_n): Likewise.
15612 (vfmsq_m): Likewise.
15613 (vmaxnmq_m): Likewise.
15614 (vminnmq_m): Likewise.
15615 (vmulq_m): Likewise.
15616 (vmulq_m_n): Likewise.
15617 (vornq_m): Likewise.
15618 (vsubq_m): Likewise.
15619 (vsubq_m_n): Likewise.
15620 (vorrq_m): Likewise.
15621 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
15623 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
15624 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
15625 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
15626 (mve_vaddq_m_f<mode>): Likewise.
15627 (mve_vaddq_m_n_f<mode>): Likewise.
15628 (mve_vandq_m_f<mode>): Likewise.
15629 (mve_vbicq_m_f<mode>): Likewise.
15630 (mve_vbrsrq_m_n_f<mode>): Likewise.
15631 (mve_vcaddq_rot270_m_f<mode>): Likewise.
15632 (mve_vcaddq_rot90_m_f<mode>): Likewise.
15633 (mve_vcmlaq_m_f<mode>): Likewise.
15634 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
15635 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
15636 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
15637 (mve_vcmulq_m_f<mode>): Likewise.
15638 (mve_vcmulq_rot180_m_f<mode>): Likewise.
15639 (mve_vcmulq_rot270_m_f<mode>): Likewise.
15640 (mve_vcmulq_rot90_m_f<mode>): Likewise.
15641 (mve_veorq_m_f<mode>): Likewise.
15642 (mve_vfmaq_m_f<mode>): Likewise.
15643 (mve_vfmaq_m_n_f<mode>): Likewise.
15644 (mve_vfmasq_m_n_f<mode>): Likewise.
15645 (mve_vfmsq_m_f<mode>): Likewise.
15646 (mve_vmaxnmq_m_f<mode>): Likewise.
15647 (mve_vminnmq_m_f<mode>): Likewise.
15648 (mve_vmulq_m_f<mode>): Likewise.
15649 (mve_vmulq_m_n_f<mode>): Likewise.
15650 (mve_vornq_m_f<mode>): Likewise.
15651 (mve_vorrq_m_f<mode>): Likewise.
15652 (mve_vsubq_m_f<mode>): Likewise.
15653 (mve_vsubq_m_n_f<mode>): Likewise.
15655 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15656 Mihail Ionescu <mihail.ionescu@arm.com>
15657 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15659 * config/arm/arm-protos.h (arm_mve_immediate_check):
15660 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
15661 mode and interger value.
15662 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
15663 (vmlaldavaq_p_s16): Likewise.
15664 (vmlaldavaq_p_u32): Likewise.
15665 (vmlaldavaq_p_u16): Likewise.
15666 (vmlaldavaxq_p_s32): Likewise.
15667 (vmlaldavaxq_p_s16): Likewise.
15668 (vmlaldavaxq_p_u32): Likewise.
15669 (vmlaldavaxq_p_u16): Likewise.
15670 (vmlsldavaq_p_s32): Likewise.
15671 (vmlsldavaq_p_s16): Likewise.
15672 (vmlsldavaxq_p_s32): Likewise.
15673 (vmlsldavaxq_p_s16): Likewise.
15674 (vmullbq_poly_m_p8): Likewise.
15675 (vmullbq_poly_m_p16): Likewise.
15676 (vmulltq_poly_m_p8): Likewise.
15677 (vmulltq_poly_m_p16): Likewise.
15678 (vqdmullbq_m_n_s32): Likewise.
15679 (vqdmullbq_m_n_s16): Likewise.
15680 (vqdmullbq_m_s32): Likewise.
15681 (vqdmullbq_m_s16): Likewise.
15682 (vqdmulltq_m_n_s32): Likewise.
15683 (vqdmulltq_m_n_s16): Likewise.
15684 (vqdmulltq_m_s32): Likewise.
15685 (vqdmulltq_m_s16): Likewise.
15686 (vqrshrnbq_m_n_s32): Likewise.
15687 (vqrshrnbq_m_n_s16): Likewise.
15688 (vqrshrnbq_m_n_u32): Likewise.
15689 (vqrshrnbq_m_n_u16): Likewise.
15690 (vqrshrntq_m_n_s32): Likewise.
15691 (vqrshrntq_m_n_s16): Likewise.
15692 (vqrshrntq_m_n_u32): Likewise.
15693 (vqrshrntq_m_n_u16): Likewise.
15694 (vqrshrunbq_m_n_s32): Likewise.
15695 (vqrshrunbq_m_n_s16): Likewise.
15696 (vqrshruntq_m_n_s32): Likewise.
15697 (vqrshruntq_m_n_s16): Likewise.
15698 (vqshrnbq_m_n_s32): Likewise.
15699 (vqshrnbq_m_n_s16): Likewise.
15700 (vqshrnbq_m_n_u32): Likewise.
15701 (vqshrnbq_m_n_u16): Likewise.
15702 (vqshrntq_m_n_s32): Likewise.
15703 (vqshrntq_m_n_s16): Likewise.
15704 (vqshrntq_m_n_u32): Likewise.
15705 (vqshrntq_m_n_u16): Likewise.
15706 (vqshrunbq_m_n_s32): Likewise.
15707 (vqshrunbq_m_n_s16): Likewise.
15708 (vqshruntq_m_n_s32): Likewise.
15709 (vqshruntq_m_n_s16): Likewise.
15710 (vrmlaldavhaq_p_s32): Likewise.
15711 (vrmlaldavhaq_p_u32): Likewise.
15712 (vrmlaldavhaxq_p_s32): Likewise.
15713 (vrmlsldavhaq_p_s32): Likewise.
15714 (vrmlsldavhaxq_p_s32): Likewise.
15715 (vrshrnbq_m_n_s32): Likewise.
15716 (vrshrnbq_m_n_s16): Likewise.
15717 (vrshrnbq_m_n_u32): Likewise.
15718 (vrshrnbq_m_n_u16): Likewise.
15719 (vrshrntq_m_n_s32): Likewise.
15720 (vrshrntq_m_n_s16): Likewise.
15721 (vrshrntq_m_n_u32): Likewise.
15722 (vrshrntq_m_n_u16): Likewise.
15723 (vshllbq_m_n_s8): Likewise.
15724 (vshllbq_m_n_s16): Likewise.
15725 (vshllbq_m_n_u8): Likewise.
15726 (vshllbq_m_n_u16): Likewise.
15727 (vshlltq_m_n_s8): Likewise.
15728 (vshlltq_m_n_s16): Likewise.
15729 (vshlltq_m_n_u8): Likewise.
15730 (vshlltq_m_n_u16): Likewise.
15731 (vshrnbq_m_n_s32): Likewise.
15732 (vshrnbq_m_n_s16): Likewise.
15733 (vshrnbq_m_n_u32): Likewise.
15734 (vshrnbq_m_n_u16): Likewise.
15735 (vshrntq_m_n_s32): Likewise.
15736 (vshrntq_m_n_s16): Likewise.
15737 (vshrntq_m_n_u32): Likewise.
15738 (vshrntq_m_n_u16): Likewise.
15739 (__arm_vmlaldavaq_p_s32): Define intrinsic.
15740 (__arm_vmlaldavaq_p_s16): Likewise.
15741 (__arm_vmlaldavaq_p_u32): Likewise.
15742 (__arm_vmlaldavaq_p_u16): Likewise.
15743 (__arm_vmlaldavaxq_p_s32): Likewise.
15744 (__arm_vmlaldavaxq_p_s16): Likewise.
15745 (__arm_vmlaldavaxq_p_u32): Likewise.
15746 (__arm_vmlaldavaxq_p_u16): Likewise.
15747 (__arm_vmlsldavaq_p_s32): Likewise.
15748 (__arm_vmlsldavaq_p_s16): Likewise.
15749 (__arm_vmlsldavaxq_p_s32): Likewise.
15750 (__arm_vmlsldavaxq_p_s16): Likewise.
15751 (__arm_vmullbq_poly_m_p8): Likewise.
15752 (__arm_vmullbq_poly_m_p16): Likewise.
15753 (__arm_vmulltq_poly_m_p8): Likewise.
15754 (__arm_vmulltq_poly_m_p16): Likewise.
15755 (__arm_vqdmullbq_m_n_s32): Likewise.
15756 (__arm_vqdmullbq_m_n_s16): Likewise.
15757 (__arm_vqdmullbq_m_s32): Likewise.
15758 (__arm_vqdmullbq_m_s16): Likewise.
15759 (__arm_vqdmulltq_m_n_s32): Likewise.
15760 (__arm_vqdmulltq_m_n_s16): Likewise.
15761 (__arm_vqdmulltq_m_s32): Likewise.
15762 (__arm_vqdmulltq_m_s16): Likewise.
15763 (__arm_vqrshrnbq_m_n_s32): Likewise.
15764 (__arm_vqrshrnbq_m_n_s16): Likewise.
15765 (__arm_vqrshrnbq_m_n_u32): Likewise.
15766 (__arm_vqrshrnbq_m_n_u16): Likewise.
15767 (__arm_vqrshrntq_m_n_s32): Likewise.
15768 (__arm_vqrshrntq_m_n_s16): Likewise.
15769 (__arm_vqrshrntq_m_n_u32): Likewise.
15770 (__arm_vqrshrntq_m_n_u16): Likewise.
15771 (__arm_vqrshrunbq_m_n_s32): Likewise.
15772 (__arm_vqrshrunbq_m_n_s16): Likewise.
15773 (__arm_vqrshruntq_m_n_s32): Likewise.
15774 (__arm_vqrshruntq_m_n_s16): Likewise.
15775 (__arm_vqshrnbq_m_n_s32): Likewise.
15776 (__arm_vqshrnbq_m_n_s16): Likewise.
15777 (__arm_vqshrnbq_m_n_u32): Likewise.
15778 (__arm_vqshrnbq_m_n_u16): Likewise.
15779 (__arm_vqshrntq_m_n_s32): Likewise.
15780 (__arm_vqshrntq_m_n_s16): Likewise.
15781 (__arm_vqshrntq_m_n_u32): Likewise.
15782 (__arm_vqshrntq_m_n_u16): Likewise.
15783 (__arm_vqshrunbq_m_n_s32): Likewise.
15784 (__arm_vqshrunbq_m_n_s16): Likewise.
15785 (__arm_vqshruntq_m_n_s32): Likewise.
15786 (__arm_vqshruntq_m_n_s16): Likewise.
15787 (__arm_vrmlaldavhaq_p_s32): Likewise.
15788 (__arm_vrmlaldavhaq_p_u32): Likewise.
15789 (__arm_vrmlaldavhaxq_p_s32): Likewise.
15790 (__arm_vrmlsldavhaq_p_s32): Likewise.
15791 (__arm_vrmlsldavhaxq_p_s32): Likewise.
15792 (__arm_vrshrnbq_m_n_s32): Likewise.
15793 (__arm_vrshrnbq_m_n_s16): Likewise.
15794 (__arm_vrshrnbq_m_n_u32): Likewise.
15795 (__arm_vrshrnbq_m_n_u16): Likewise.
15796 (__arm_vrshrntq_m_n_s32): Likewise.
15797 (__arm_vrshrntq_m_n_s16): Likewise.
15798 (__arm_vrshrntq_m_n_u32): Likewise.
15799 (__arm_vrshrntq_m_n_u16): Likewise.
15800 (__arm_vshllbq_m_n_s8): Likewise.
15801 (__arm_vshllbq_m_n_s16): Likewise.
15802 (__arm_vshllbq_m_n_u8): Likewise.
15803 (__arm_vshllbq_m_n_u16): Likewise.
15804 (__arm_vshlltq_m_n_s8): Likewise.
15805 (__arm_vshlltq_m_n_s16): Likewise.
15806 (__arm_vshlltq_m_n_u8): Likewise.
15807 (__arm_vshlltq_m_n_u16): Likewise.
15808 (__arm_vshrnbq_m_n_s32): Likewise.
15809 (__arm_vshrnbq_m_n_s16): Likewise.
15810 (__arm_vshrnbq_m_n_u32): Likewise.
15811 (__arm_vshrnbq_m_n_u16): Likewise.
15812 (__arm_vshrntq_m_n_s32): Likewise.
15813 (__arm_vshrntq_m_n_s16): Likewise.
15814 (__arm_vshrntq_m_n_u32): Likewise.
15815 (__arm_vshrntq_m_n_u16): Likewise.
15816 (vmullbq_poly_m): Define polymorphic variant.
15817 (vmulltq_poly_m): Likewise.
15818 (vshllbq_m): Likewise.
15819 (vshrntq_m_n): Likewise.
15820 (vshrnbq_m_n): Likewise.
15821 (vshlltq_m_n): Likewise.
15822 (vshllbq_m_n): Likewise.
15823 (vrshrntq_m_n): Likewise.
15824 (vrshrnbq_m_n): Likewise.
15825 (vqshruntq_m_n): Likewise.
15826 (vqshrunbq_m_n): Likewise.
15827 (vqdmullbq_m_n): Likewise.
15828 (vqdmullbq_m): Likewise.
15829 (vqdmulltq_m_n): Likewise.
15830 (vqdmulltq_m): Likewise.
15831 (vqrshrnbq_m_n): Likewise.
15832 (vqrshrntq_m_n): Likewise.
15833 (vqrshrunbq_m_n): Likewise.
15834 (vqrshruntq_m_n): Likewise.
15835 (vqshrnbq_m_n): Likewise.
15836 (vqshrntq_m_n): Likewise.
15837 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
15838 builtin qualifiers.
15839 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
15840 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
15841 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
15842 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
15843 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
15844 (VMLALDAVAXQ_P): Likewise.
15845 (VQRSHRNBQ_M_N): Likewise.
15846 (VQRSHRNTQ_M_N): Likewise.
15847 (VQSHRNBQ_M_N): Likewise.
15848 (VQSHRNTQ_M_N): Likewise.
15849 (VRSHRNBQ_M_N): Likewise.
15850 (VRSHRNTQ_M_N): Likewise.
15851 (VSHLLBQ_M_N): Likewise.
15852 (VSHLLTQ_M_N): Likewise.
15853 (VSHRNBQ_M_N): Likewise.
15854 (VSHRNTQ_M_N): Likewise.
15855 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
15856 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
15857 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
15858 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
15859 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
15860 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
15861 (mve_vrmlaldavhaq_p_sv4si): Likewise.
15862 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
15863 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
15864 (mve_vshllbq_m_n_<supf><mode>): Likewise.
15865 (mve_vshlltq_m_n_<supf><mode>): Likewise.
15866 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
15867 (mve_vshrntq_m_n_<supf><mode>): Likewise.
15868 (mve_vmlsldavaq_p_s<mode>): Likewise.
15869 (mve_vmlsldavaxq_p_s<mode>): Likewise.
15870 (mve_vmullbq_poly_m_p<mode>): Likewise.
15871 (mve_vmulltq_poly_m_p<mode>): Likewise.
15872 (mve_vqdmullbq_m_n_s<mode>): Likewise.
15873 (mve_vqdmullbq_m_s<mode>): Likewise.
15874 (mve_vqdmulltq_m_n_s<mode>): Likewise.
15875 (mve_vqdmulltq_m_s<mode>): Likewise.
15876 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
15877 (mve_vqrshruntq_m_n_s<mode>): Likewise.
15878 (mve_vqshrunbq_m_n_s<mode>): Likewise.
15879 (mve_vqshruntq_m_n_s<mode>): Likewise.
15880 (mve_vrmlaldavhaq_p_uv4si): Likewise.
15881 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
15882 (mve_vrmlsldavhaq_p_sv4si): Likewise.
15883 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
15885 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15886 Mihail Ionescu <mihail.ionescu@arm.com>
15887 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15889 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
15890 (vabdq_m_s32): Likewise.
15891 (vabdq_m_s16): Likewise.
15892 (vabdq_m_u8): Likewise.
15893 (vabdq_m_u32): Likewise.
15894 (vabdq_m_u16): Likewise.
15895 (vaddq_m_n_s8): Likewise.
15896 (vaddq_m_n_s32): Likewise.
15897 (vaddq_m_n_s16): Likewise.
15898 (vaddq_m_n_u8): Likewise.
15899 (vaddq_m_n_u32): Likewise.
15900 (vaddq_m_n_u16): Likewise.
15901 (vaddq_m_s8): Likewise.
15902 (vaddq_m_s32): Likewise.
15903 (vaddq_m_s16): Likewise.
15904 (vaddq_m_u8): Likewise.
15905 (vaddq_m_u32): Likewise.
15906 (vaddq_m_u16): Likewise.
15907 (vandq_m_s8): Likewise.
15908 (vandq_m_s32): Likewise.
15909 (vandq_m_s16): Likewise.
15910 (vandq_m_u8): Likewise.
15911 (vandq_m_u32): Likewise.
15912 (vandq_m_u16): Likewise.
15913 (vbicq_m_s8): Likewise.
15914 (vbicq_m_s32): Likewise.
15915 (vbicq_m_s16): Likewise.
15916 (vbicq_m_u8): Likewise.
15917 (vbicq_m_u32): Likewise.
15918 (vbicq_m_u16): Likewise.
15919 (vbrsrq_m_n_s8): Likewise.
15920 (vbrsrq_m_n_s32): Likewise.
15921 (vbrsrq_m_n_s16): Likewise.
15922 (vbrsrq_m_n_u8): Likewise.
15923 (vbrsrq_m_n_u32): Likewise.
15924 (vbrsrq_m_n_u16): Likewise.
15925 (vcaddq_rot270_m_s8): Likewise.
15926 (vcaddq_rot270_m_s32): Likewise.
15927 (vcaddq_rot270_m_s16): Likewise.
15928 (vcaddq_rot270_m_u8): Likewise.
15929 (vcaddq_rot270_m_u32): Likewise.
15930 (vcaddq_rot270_m_u16): Likewise.
15931 (vcaddq_rot90_m_s8): Likewise.
15932 (vcaddq_rot90_m_s32): Likewise.
15933 (vcaddq_rot90_m_s16): Likewise.
15934 (vcaddq_rot90_m_u8): Likewise.
15935 (vcaddq_rot90_m_u32): Likewise.
15936 (vcaddq_rot90_m_u16): Likewise.
15937 (veorq_m_s8): Likewise.
15938 (veorq_m_s32): Likewise.
15939 (veorq_m_s16): Likewise.
15940 (veorq_m_u8): Likewise.
15941 (veorq_m_u32): Likewise.
15942 (veorq_m_u16): Likewise.
15943 (vhaddq_m_n_s8): Likewise.
15944 (vhaddq_m_n_s32): Likewise.
15945 (vhaddq_m_n_s16): Likewise.
15946 (vhaddq_m_n_u8): Likewise.
15947 (vhaddq_m_n_u32): Likewise.
15948 (vhaddq_m_n_u16): Likewise.
15949 (vhaddq_m_s8): Likewise.
15950 (vhaddq_m_s32): Likewise.
15951 (vhaddq_m_s16): Likewise.
15952 (vhaddq_m_u8): Likewise.
15953 (vhaddq_m_u32): Likewise.
15954 (vhaddq_m_u16): Likewise.
15955 (vhcaddq_rot270_m_s8): Likewise.
15956 (vhcaddq_rot270_m_s32): Likewise.
15957 (vhcaddq_rot270_m_s16): Likewise.
15958 (vhcaddq_rot90_m_s8): Likewise.
15959 (vhcaddq_rot90_m_s32): Likewise.
15960 (vhcaddq_rot90_m_s16): Likewise.
15961 (vhsubq_m_n_s8): Likewise.
15962 (vhsubq_m_n_s32): Likewise.
15963 (vhsubq_m_n_s16): Likewise.
15964 (vhsubq_m_n_u8): Likewise.
15965 (vhsubq_m_n_u32): Likewise.
15966 (vhsubq_m_n_u16): Likewise.
15967 (vhsubq_m_s8): Likewise.
15968 (vhsubq_m_s32): Likewise.
15969 (vhsubq_m_s16): Likewise.
15970 (vhsubq_m_u8): Likewise.
15971 (vhsubq_m_u32): Likewise.
15972 (vhsubq_m_u16): Likewise.
15973 (vmaxq_m_s8): Likewise.
15974 (vmaxq_m_s32): Likewise.
15975 (vmaxq_m_s16): Likewise.
15976 (vmaxq_m_u8): Likewise.
15977 (vmaxq_m_u32): Likewise.
15978 (vmaxq_m_u16): Likewise.
15979 (vminq_m_s8): Likewise.
15980 (vminq_m_s32): Likewise.
15981 (vminq_m_s16): Likewise.
15982 (vminq_m_u8): Likewise.
15983 (vminq_m_u32): Likewise.
15984 (vminq_m_u16): Likewise.
15985 (vmladavaq_p_s8): Likewise.
15986 (vmladavaq_p_s32): Likewise.
15987 (vmladavaq_p_s16): Likewise.
15988 (vmladavaq_p_u8): Likewise.
15989 (vmladavaq_p_u32): Likewise.
15990 (vmladavaq_p_u16): Likewise.
15991 (vmladavaxq_p_s8): Likewise.
15992 (vmladavaxq_p_s32): Likewise.
15993 (vmladavaxq_p_s16): Likewise.
15994 (vmlaq_m_n_s8): Likewise.
15995 (vmlaq_m_n_s32): Likewise.
15996 (vmlaq_m_n_s16): Likewise.
15997 (vmlaq_m_n_u8): Likewise.
15998 (vmlaq_m_n_u32): Likewise.
15999 (vmlaq_m_n_u16): Likewise.
16000 (vmlasq_m_n_s8): Likewise.
16001 (vmlasq_m_n_s32): Likewise.
16002 (vmlasq_m_n_s16): Likewise.
16003 (vmlasq_m_n_u8): Likewise.
16004 (vmlasq_m_n_u32): Likewise.
16005 (vmlasq_m_n_u16): Likewise.
16006 (vmlsdavaq_p_s8): Likewise.
16007 (vmlsdavaq_p_s32): Likewise.
16008 (vmlsdavaq_p_s16): Likewise.
16009 (vmlsdavaxq_p_s8): Likewise.
16010 (vmlsdavaxq_p_s32): Likewise.
16011 (vmlsdavaxq_p_s16): Likewise.
16012 (vmulhq_m_s8): Likewise.
16013 (vmulhq_m_s32): Likewise.
16014 (vmulhq_m_s16): Likewise.
16015 (vmulhq_m_u8): Likewise.
16016 (vmulhq_m_u32): Likewise.
16017 (vmulhq_m_u16): Likewise.
16018 (vmullbq_int_m_s8): Likewise.
16019 (vmullbq_int_m_s32): Likewise.
16020 (vmullbq_int_m_s16): Likewise.
16021 (vmullbq_int_m_u8): Likewise.
16022 (vmullbq_int_m_u32): Likewise.
16023 (vmullbq_int_m_u16): Likewise.
16024 (vmulltq_int_m_s8): Likewise.
16025 (vmulltq_int_m_s32): Likewise.
16026 (vmulltq_int_m_s16): Likewise.
16027 (vmulltq_int_m_u8): Likewise.
16028 (vmulltq_int_m_u32): Likewise.
16029 (vmulltq_int_m_u16): Likewise.
16030 (vmulq_m_n_s8): Likewise.
16031 (vmulq_m_n_s32): Likewise.
16032 (vmulq_m_n_s16): Likewise.
16033 (vmulq_m_n_u8): Likewise.
16034 (vmulq_m_n_u32): Likewise.
16035 (vmulq_m_n_u16): Likewise.
16036 (vmulq_m_s8): Likewise.
16037 (vmulq_m_s32): Likewise.
16038 (vmulq_m_s16): Likewise.
16039 (vmulq_m_u8): Likewise.
16040 (vmulq_m_u32): Likewise.
16041 (vmulq_m_u16): Likewise.
16042 (vornq_m_s8): Likewise.
16043 (vornq_m_s32): Likewise.
16044 (vornq_m_s16): Likewise.
16045 (vornq_m_u8): Likewise.
16046 (vornq_m_u32): Likewise.
16047 (vornq_m_u16): Likewise.
16048 (vorrq_m_s8): Likewise.
16049 (vorrq_m_s32): Likewise.
16050 (vorrq_m_s16): Likewise.
16051 (vorrq_m_u8): Likewise.
16052 (vorrq_m_u32): Likewise.
16053 (vorrq_m_u16): Likewise.
16054 (vqaddq_m_n_s8): Likewise.
16055 (vqaddq_m_n_s32): Likewise.
16056 (vqaddq_m_n_s16): Likewise.
16057 (vqaddq_m_n_u8): Likewise.
16058 (vqaddq_m_n_u32): Likewise.
16059 (vqaddq_m_n_u16): Likewise.
16060 (vqaddq_m_s8): Likewise.
16061 (vqaddq_m_s32): Likewise.
16062 (vqaddq_m_s16): Likewise.
16063 (vqaddq_m_u8): Likewise.
16064 (vqaddq_m_u32): Likewise.
16065 (vqaddq_m_u16): Likewise.
16066 (vqdmladhq_m_s8): Likewise.
16067 (vqdmladhq_m_s32): Likewise.
16068 (vqdmladhq_m_s16): Likewise.
16069 (vqdmladhxq_m_s8): Likewise.
16070 (vqdmladhxq_m_s32): Likewise.
16071 (vqdmladhxq_m_s16): Likewise.
16072 (vqdmlahq_m_n_s8): Likewise.
16073 (vqdmlahq_m_n_s32): Likewise.
16074 (vqdmlahq_m_n_s16): Likewise.
16075 (vqdmlahq_m_n_u8): Likewise.
16076 (vqdmlahq_m_n_u32): Likewise.
16077 (vqdmlahq_m_n_u16): Likewise.
16078 (vqdmlsdhq_m_s8): Likewise.
16079 (vqdmlsdhq_m_s32): Likewise.
16080 (vqdmlsdhq_m_s16): Likewise.
16081 (vqdmlsdhxq_m_s8): Likewise.
16082 (vqdmlsdhxq_m_s32): Likewise.
16083 (vqdmlsdhxq_m_s16): Likewise.
16084 (vqdmulhq_m_n_s8): Likewise.
16085 (vqdmulhq_m_n_s32): Likewise.
16086 (vqdmulhq_m_n_s16): Likewise.
16087 (vqdmulhq_m_s8): Likewise.
16088 (vqdmulhq_m_s32): Likewise.
16089 (vqdmulhq_m_s16): Likewise.
16090 (vqrdmladhq_m_s8): Likewise.
16091 (vqrdmladhq_m_s32): Likewise.
16092 (vqrdmladhq_m_s16): Likewise.
16093 (vqrdmladhxq_m_s8): Likewise.
16094 (vqrdmladhxq_m_s32): Likewise.
16095 (vqrdmladhxq_m_s16): Likewise.
16096 (vqrdmlahq_m_n_s8): Likewise.
16097 (vqrdmlahq_m_n_s32): Likewise.
16098 (vqrdmlahq_m_n_s16): Likewise.
16099 (vqrdmlahq_m_n_u8): Likewise.
16100 (vqrdmlahq_m_n_u32): Likewise.
16101 (vqrdmlahq_m_n_u16): Likewise.
16102 (vqrdmlashq_m_n_s8): Likewise.
16103 (vqrdmlashq_m_n_s32): Likewise.
16104 (vqrdmlashq_m_n_s16): Likewise.
16105 (vqrdmlashq_m_n_u8): Likewise.
16106 (vqrdmlashq_m_n_u32): Likewise.
16107 (vqrdmlashq_m_n_u16): Likewise.
16108 (vqrdmlsdhq_m_s8): Likewise.
16109 (vqrdmlsdhq_m_s32): Likewise.
16110 (vqrdmlsdhq_m_s16): Likewise.
16111 (vqrdmlsdhxq_m_s8): Likewise.
16112 (vqrdmlsdhxq_m_s32): Likewise.
16113 (vqrdmlsdhxq_m_s16): Likewise.
16114 (vqrdmulhq_m_n_s8): Likewise.
16115 (vqrdmulhq_m_n_s32): Likewise.
16116 (vqrdmulhq_m_n_s16): Likewise.
16117 (vqrdmulhq_m_s8): Likewise.
16118 (vqrdmulhq_m_s32): Likewise.
16119 (vqrdmulhq_m_s16): Likewise.
16120 (vqrshlq_m_s8): Likewise.
16121 (vqrshlq_m_s32): Likewise.
16122 (vqrshlq_m_s16): Likewise.
16123 (vqrshlq_m_u8): Likewise.
16124 (vqrshlq_m_u32): Likewise.
16125 (vqrshlq_m_u16): Likewise.
16126 (vqshlq_m_n_s8): Likewise.
16127 (vqshlq_m_n_s32): Likewise.
16128 (vqshlq_m_n_s16): Likewise.
16129 (vqshlq_m_n_u8): Likewise.
16130 (vqshlq_m_n_u32): Likewise.
16131 (vqshlq_m_n_u16): Likewise.
16132 (vqshlq_m_s8): Likewise.
16133 (vqshlq_m_s32): Likewise.
16134 (vqshlq_m_s16): Likewise.
16135 (vqshlq_m_u8): Likewise.
16136 (vqshlq_m_u32): Likewise.
16137 (vqshlq_m_u16): Likewise.
16138 (vqsubq_m_n_s8): Likewise.
16139 (vqsubq_m_n_s32): Likewise.
16140 (vqsubq_m_n_s16): Likewise.
16141 (vqsubq_m_n_u8): Likewise.
16142 (vqsubq_m_n_u32): Likewise.
16143 (vqsubq_m_n_u16): Likewise.
16144 (vqsubq_m_s8): Likewise.
16145 (vqsubq_m_s32): Likewise.
16146 (vqsubq_m_s16): Likewise.
16147 (vqsubq_m_u8): Likewise.
16148 (vqsubq_m_u32): Likewise.
16149 (vqsubq_m_u16): Likewise.
16150 (vrhaddq_m_s8): Likewise.
16151 (vrhaddq_m_s32): Likewise.
16152 (vrhaddq_m_s16): Likewise.
16153 (vrhaddq_m_u8): Likewise.
16154 (vrhaddq_m_u32): Likewise.
16155 (vrhaddq_m_u16): Likewise.
16156 (vrmulhq_m_s8): Likewise.
16157 (vrmulhq_m_s32): Likewise.
16158 (vrmulhq_m_s16): Likewise.
16159 (vrmulhq_m_u8): Likewise.
16160 (vrmulhq_m_u32): Likewise.
16161 (vrmulhq_m_u16): Likewise.
16162 (vrshlq_m_s8): Likewise.
16163 (vrshlq_m_s32): Likewise.
16164 (vrshlq_m_s16): Likewise.
16165 (vrshlq_m_u8): Likewise.
16166 (vrshlq_m_u32): Likewise.
16167 (vrshlq_m_u16): Likewise.
16168 (vrshrq_m_n_s8): Likewise.
16169 (vrshrq_m_n_s32): Likewise.
16170 (vrshrq_m_n_s16): Likewise.
16171 (vrshrq_m_n_u8): Likewise.
16172 (vrshrq_m_n_u32): Likewise.
16173 (vrshrq_m_n_u16): Likewise.
16174 (vshlq_m_n_s8): Likewise.
16175 (vshlq_m_n_s32): Likewise.
16176 (vshlq_m_n_s16): Likewise.
16177 (vshlq_m_n_u8): Likewise.
16178 (vshlq_m_n_u32): Likewise.
16179 (vshlq_m_n_u16): Likewise.
16180 (vshrq_m_n_s8): Likewise.
16181 (vshrq_m_n_s32): Likewise.
16182 (vshrq_m_n_s16): Likewise.
16183 (vshrq_m_n_u8): Likewise.
16184 (vshrq_m_n_u32): Likewise.
16185 (vshrq_m_n_u16): Likewise.
16186 (vsliq_m_n_s8): Likewise.
16187 (vsliq_m_n_s32): Likewise.
16188 (vsliq_m_n_s16): Likewise.
16189 (vsliq_m_n_u8): Likewise.
16190 (vsliq_m_n_u32): Likewise.
16191 (vsliq_m_n_u16): Likewise.
16192 (vsubq_m_n_s8): Likewise.
16193 (vsubq_m_n_s32): Likewise.
16194 (vsubq_m_n_s16): Likewise.
16195 (vsubq_m_n_u8): Likewise.
16196 (vsubq_m_n_u32): Likewise.
16197 (vsubq_m_n_u16): Likewise.
16198 (__arm_vabdq_m_s8): Define intrinsic.
16199 (__arm_vabdq_m_s32): Likewise.
16200 (__arm_vabdq_m_s16): Likewise.
16201 (__arm_vabdq_m_u8): Likewise.
16202 (__arm_vabdq_m_u32): Likewise.
16203 (__arm_vabdq_m_u16): Likewise.
16204 (__arm_vaddq_m_n_s8): Likewise.
16205 (__arm_vaddq_m_n_s32): Likewise.
16206 (__arm_vaddq_m_n_s16): Likewise.
16207 (__arm_vaddq_m_n_u8): Likewise.
16208 (__arm_vaddq_m_n_u32): Likewise.
16209 (__arm_vaddq_m_n_u16): Likewise.
16210 (__arm_vaddq_m_s8): Likewise.
16211 (__arm_vaddq_m_s32): Likewise.
16212 (__arm_vaddq_m_s16): Likewise.
16213 (__arm_vaddq_m_u8): Likewise.
16214 (__arm_vaddq_m_u32): Likewise.
16215 (__arm_vaddq_m_u16): Likewise.
16216 (__arm_vandq_m_s8): Likewise.
16217 (__arm_vandq_m_s32): Likewise.
16218 (__arm_vandq_m_s16): Likewise.
16219 (__arm_vandq_m_u8): Likewise.
16220 (__arm_vandq_m_u32): Likewise.
16221 (__arm_vandq_m_u16): Likewise.
16222 (__arm_vbicq_m_s8): Likewise.
16223 (__arm_vbicq_m_s32): Likewise.
16224 (__arm_vbicq_m_s16): Likewise.
16225 (__arm_vbicq_m_u8): Likewise.
16226 (__arm_vbicq_m_u32): Likewise.
16227 (__arm_vbicq_m_u16): Likewise.
16228 (__arm_vbrsrq_m_n_s8): Likewise.
16229 (__arm_vbrsrq_m_n_s32): Likewise.
16230 (__arm_vbrsrq_m_n_s16): Likewise.
16231 (__arm_vbrsrq_m_n_u8): Likewise.
16232 (__arm_vbrsrq_m_n_u32): Likewise.
16233 (__arm_vbrsrq_m_n_u16): Likewise.
16234 (__arm_vcaddq_rot270_m_s8): Likewise.
16235 (__arm_vcaddq_rot270_m_s32): Likewise.
16236 (__arm_vcaddq_rot270_m_s16): Likewise.
16237 (__arm_vcaddq_rot270_m_u8): Likewise.
16238 (__arm_vcaddq_rot270_m_u32): Likewise.
16239 (__arm_vcaddq_rot270_m_u16): Likewise.
16240 (__arm_vcaddq_rot90_m_s8): Likewise.
16241 (__arm_vcaddq_rot90_m_s32): Likewise.
16242 (__arm_vcaddq_rot90_m_s16): Likewise.
16243 (__arm_vcaddq_rot90_m_u8): Likewise.
16244 (__arm_vcaddq_rot90_m_u32): Likewise.
16245 (__arm_vcaddq_rot90_m_u16): Likewise.
16246 (__arm_veorq_m_s8): Likewise.
16247 (__arm_veorq_m_s32): Likewise.
16248 (__arm_veorq_m_s16): Likewise.
16249 (__arm_veorq_m_u8): Likewise.
16250 (__arm_veorq_m_u32): Likewise.
16251 (__arm_veorq_m_u16): Likewise.
16252 (__arm_vhaddq_m_n_s8): Likewise.
16253 (__arm_vhaddq_m_n_s32): Likewise.
16254 (__arm_vhaddq_m_n_s16): Likewise.
16255 (__arm_vhaddq_m_n_u8): Likewise.
16256 (__arm_vhaddq_m_n_u32): Likewise.
16257 (__arm_vhaddq_m_n_u16): Likewise.
16258 (__arm_vhaddq_m_s8): Likewise.
16259 (__arm_vhaddq_m_s32): Likewise.
16260 (__arm_vhaddq_m_s16): Likewise.
16261 (__arm_vhaddq_m_u8): Likewise.
16262 (__arm_vhaddq_m_u32): Likewise.
16263 (__arm_vhaddq_m_u16): Likewise.
16264 (__arm_vhcaddq_rot270_m_s8): Likewise.
16265 (__arm_vhcaddq_rot270_m_s32): Likewise.
16266 (__arm_vhcaddq_rot270_m_s16): Likewise.
16267 (__arm_vhcaddq_rot90_m_s8): Likewise.
16268 (__arm_vhcaddq_rot90_m_s32): Likewise.
16269 (__arm_vhcaddq_rot90_m_s16): Likewise.
16270 (__arm_vhsubq_m_n_s8): Likewise.
16271 (__arm_vhsubq_m_n_s32): Likewise.
16272 (__arm_vhsubq_m_n_s16): Likewise.
16273 (__arm_vhsubq_m_n_u8): Likewise.
16274 (__arm_vhsubq_m_n_u32): Likewise.
16275 (__arm_vhsubq_m_n_u16): Likewise.
16276 (__arm_vhsubq_m_s8): Likewise.
16277 (__arm_vhsubq_m_s32): Likewise.
16278 (__arm_vhsubq_m_s16): Likewise.
16279 (__arm_vhsubq_m_u8): Likewise.
16280 (__arm_vhsubq_m_u32): Likewise.
16281 (__arm_vhsubq_m_u16): Likewise.
16282 (__arm_vmaxq_m_s8): Likewise.
16283 (__arm_vmaxq_m_s32): Likewise.
16284 (__arm_vmaxq_m_s16): Likewise.
16285 (__arm_vmaxq_m_u8): Likewise.
16286 (__arm_vmaxq_m_u32): Likewise.
16287 (__arm_vmaxq_m_u16): Likewise.
16288 (__arm_vminq_m_s8): Likewise.
16289 (__arm_vminq_m_s32): Likewise.
16290 (__arm_vminq_m_s16): Likewise.
16291 (__arm_vminq_m_u8): Likewise.
16292 (__arm_vminq_m_u32): Likewise.
16293 (__arm_vminq_m_u16): Likewise.
16294 (__arm_vmladavaq_p_s8): Likewise.
16295 (__arm_vmladavaq_p_s32): Likewise.
16296 (__arm_vmladavaq_p_s16): Likewise.
16297 (__arm_vmladavaq_p_u8): Likewise.
16298 (__arm_vmladavaq_p_u32): Likewise.
16299 (__arm_vmladavaq_p_u16): Likewise.
16300 (__arm_vmladavaxq_p_s8): Likewise.
16301 (__arm_vmladavaxq_p_s32): Likewise.
16302 (__arm_vmladavaxq_p_s16): Likewise.
16303 (__arm_vmlaq_m_n_s8): Likewise.
16304 (__arm_vmlaq_m_n_s32): Likewise.
16305 (__arm_vmlaq_m_n_s16): Likewise.
16306 (__arm_vmlaq_m_n_u8): Likewise.
16307 (__arm_vmlaq_m_n_u32): Likewise.
16308 (__arm_vmlaq_m_n_u16): Likewise.
16309 (__arm_vmlasq_m_n_s8): Likewise.
16310 (__arm_vmlasq_m_n_s32): Likewise.
16311 (__arm_vmlasq_m_n_s16): Likewise.
16312 (__arm_vmlasq_m_n_u8): Likewise.
16313 (__arm_vmlasq_m_n_u32): Likewise.
16314 (__arm_vmlasq_m_n_u16): Likewise.
16315 (__arm_vmlsdavaq_p_s8): Likewise.
16316 (__arm_vmlsdavaq_p_s32): Likewise.
16317 (__arm_vmlsdavaq_p_s16): Likewise.
16318 (__arm_vmlsdavaxq_p_s8): Likewise.
16319 (__arm_vmlsdavaxq_p_s32): Likewise.
16320 (__arm_vmlsdavaxq_p_s16): Likewise.
16321 (__arm_vmulhq_m_s8): Likewise.
16322 (__arm_vmulhq_m_s32): Likewise.
16323 (__arm_vmulhq_m_s16): Likewise.
16324 (__arm_vmulhq_m_u8): Likewise.
16325 (__arm_vmulhq_m_u32): Likewise.
16326 (__arm_vmulhq_m_u16): Likewise.
16327 (__arm_vmullbq_int_m_s8): Likewise.
16328 (__arm_vmullbq_int_m_s32): Likewise.
16329 (__arm_vmullbq_int_m_s16): Likewise.
16330 (__arm_vmullbq_int_m_u8): Likewise.
16331 (__arm_vmullbq_int_m_u32): Likewise.
16332 (__arm_vmullbq_int_m_u16): Likewise.
16333 (__arm_vmulltq_int_m_s8): Likewise.
16334 (__arm_vmulltq_int_m_s32): Likewise.
16335 (__arm_vmulltq_int_m_s16): Likewise.
16336 (__arm_vmulltq_int_m_u8): Likewise.
16337 (__arm_vmulltq_int_m_u32): Likewise.
16338 (__arm_vmulltq_int_m_u16): Likewise.
16339 (__arm_vmulq_m_n_s8): Likewise.
16340 (__arm_vmulq_m_n_s32): Likewise.
16341 (__arm_vmulq_m_n_s16): Likewise.
16342 (__arm_vmulq_m_n_u8): Likewise.
16343 (__arm_vmulq_m_n_u32): Likewise.
16344 (__arm_vmulq_m_n_u16): Likewise.
16345 (__arm_vmulq_m_s8): Likewise.
16346 (__arm_vmulq_m_s32): Likewise.
16347 (__arm_vmulq_m_s16): Likewise.
16348 (__arm_vmulq_m_u8): Likewise.
16349 (__arm_vmulq_m_u32): Likewise.
16350 (__arm_vmulq_m_u16): Likewise.
16351 (__arm_vornq_m_s8): Likewise.
16352 (__arm_vornq_m_s32): Likewise.
16353 (__arm_vornq_m_s16): Likewise.
16354 (__arm_vornq_m_u8): Likewise.
16355 (__arm_vornq_m_u32): Likewise.
16356 (__arm_vornq_m_u16): Likewise.
16357 (__arm_vorrq_m_s8): Likewise.
16358 (__arm_vorrq_m_s32): Likewise.
16359 (__arm_vorrq_m_s16): Likewise.
16360 (__arm_vorrq_m_u8): Likewise.
16361 (__arm_vorrq_m_u32): Likewise.
16362 (__arm_vorrq_m_u16): Likewise.
16363 (__arm_vqaddq_m_n_s8): Likewise.
16364 (__arm_vqaddq_m_n_s32): Likewise.
16365 (__arm_vqaddq_m_n_s16): Likewise.
16366 (__arm_vqaddq_m_n_u8): Likewise.
16367 (__arm_vqaddq_m_n_u32): Likewise.
16368 (__arm_vqaddq_m_n_u16): Likewise.
16369 (__arm_vqaddq_m_s8): Likewise.
16370 (__arm_vqaddq_m_s32): Likewise.
16371 (__arm_vqaddq_m_s16): Likewise.
16372 (__arm_vqaddq_m_u8): Likewise.
16373 (__arm_vqaddq_m_u32): Likewise.
16374 (__arm_vqaddq_m_u16): Likewise.
16375 (__arm_vqdmladhq_m_s8): Likewise.
16376 (__arm_vqdmladhq_m_s32): Likewise.
16377 (__arm_vqdmladhq_m_s16): Likewise.
16378 (__arm_vqdmladhxq_m_s8): Likewise.
16379 (__arm_vqdmladhxq_m_s32): Likewise.
16380 (__arm_vqdmladhxq_m_s16): Likewise.
16381 (__arm_vqdmlahq_m_n_s8): Likewise.
16382 (__arm_vqdmlahq_m_n_s32): Likewise.
16383 (__arm_vqdmlahq_m_n_s16): Likewise.
16384 (__arm_vqdmlahq_m_n_u8): Likewise.
16385 (__arm_vqdmlahq_m_n_u32): Likewise.
16386 (__arm_vqdmlahq_m_n_u16): Likewise.
16387 (__arm_vqdmlsdhq_m_s8): Likewise.
16388 (__arm_vqdmlsdhq_m_s32): Likewise.
16389 (__arm_vqdmlsdhq_m_s16): Likewise.
16390 (__arm_vqdmlsdhxq_m_s8): Likewise.
16391 (__arm_vqdmlsdhxq_m_s32): Likewise.
16392 (__arm_vqdmlsdhxq_m_s16): Likewise.
16393 (__arm_vqdmulhq_m_n_s8): Likewise.
16394 (__arm_vqdmulhq_m_n_s32): Likewise.
16395 (__arm_vqdmulhq_m_n_s16): Likewise.
16396 (__arm_vqdmulhq_m_s8): Likewise.
16397 (__arm_vqdmulhq_m_s32): Likewise.
16398 (__arm_vqdmulhq_m_s16): Likewise.
16399 (__arm_vqrdmladhq_m_s8): Likewise.
16400 (__arm_vqrdmladhq_m_s32): Likewise.
16401 (__arm_vqrdmladhq_m_s16): Likewise.
16402 (__arm_vqrdmladhxq_m_s8): Likewise.
16403 (__arm_vqrdmladhxq_m_s32): Likewise.
16404 (__arm_vqrdmladhxq_m_s16): Likewise.
16405 (__arm_vqrdmlahq_m_n_s8): Likewise.
16406 (__arm_vqrdmlahq_m_n_s32): Likewise.
16407 (__arm_vqrdmlahq_m_n_s16): Likewise.
16408 (__arm_vqrdmlahq_m_n_u8): Likewise.
16409 (__arm_vqrdmlahq_m_n_u32): Likewise.
16410 (__arm_vqrdmlahq_m_n_u16): Likewise.
16411 (__arm_vqrdmlashq_m_n_s8): Likewise.
16412 (__arm_vqrdmlashq_m_n_s32): Likewise.
16413 (__arm_vqrdmlashq_m_n_s16): Likewise.
16414 (__arm_vqrdmlashq_m_n_u8): Likewise.
16415 (__arm_vqrdmlashq_m_n_u32): Likewise.
16416 (__arm_vqrdmlashq_m_n_u16): Likewise.
16417 (__arm_vqrdmlsdhq_m_s8): Likewise.
16418 (__arm_vqrdmlsdhq_m_s32): Likewise.
16419 (__arm_vqrdmlsdhq_m_s16): Likewise.
16420 (__arm_vqrdmlsdhxq_m_s8): Likewise.
16421 (__arm_vqrdmlsdhxq_m_s32): Likewise.
16422 (__arm_vqrdmlsdhxq_m_s16): Likewise.
16423 (__arm_vqrdmulhq_m_n_s8): Likewise.
16424 (__arm_vqrdmulhq_m_n_s32): Likewise.
16425 (__arm_vqrdmulhq_m_n_s16): Likewise.
16426 (__arm_vqrdmulhq_m_s8): Likewise.
16427 (__arm_vqrdmulhq_m_s32): Likewise.
16428 (__arm_vqrdmulhq_m_s16): Likewise.
16429 (__arm_vqrshlq_m_s8): Likewise.
16430 (__arm_vqrshlq_m_s32): Likewise.
16431 (__arm_vqrshlq_m_s16): Likewise.
16432 (__arm_vqrshlq_m_u8): Likewise.
16433 (__arm_vqrshlq_m_u32): Likewise.
16434 (__arm_vqrshlq_m_u16): Likewise.
16435 (__arm_vqshlq_m_n_s8): Likewise.
16436 (__arm_vqshlq_m_n_s32): Likewise.
16437 (__arm_vqshlq_m_n_s16): Likewise.
16438 (__arm_vqshlq_m_n_u8): Likewise.
16439 (__arm_vqshlq_m_n_u32): Likewise.
16440 (__arm_vqshlq_m_n_u16): Likewise.
16441 (__arm_vqshlq_m_s8): Likewise.
16442 (__arm_vqshlq_m_s32): Likewise.
16443 (__arm_vqshlq_m_s16): Likewise.
16444 (__arm_vqshlq_m_u8): Likewise.
16445 (__arm_vqshlq_m_u32): Likewise.
16446 (__arm_vqshlq_m_u16): Likewise.
16447 (__arm_vqsubq_m_n_s8): Likewise.
16448 (__arm_vqsubq_m_n_s32): Likewise.
16449 (__arm_vqsubq_m_n_s16): Likewise.
16450 (__arm_vqsubq_m_n_u8): Likewise.
16451 (__arm_vqsubq_m_n_u32): Likewise.
16452 (__arm_vqsubq_m_n_u16): Likewise.
16453 (__arm_vqsubq_m_s8): Likewise.
16454 (__arm_vqsubq_m_s32): Likewise.
16455 (__arm_vqsubq_m_s16): Likewise.
16456 (__arm_vqsubq_m_u8): Likewise.
16457 (__arm_vqsubq_m_u32): Likewise.
16458 (__arm_vqsubq_m_u16): Likewise.
16459 (__arm_vrhaddq_m_s8): Likewise.
16460 (__arm_vrhaddq_m_s32): Likewise.
16461 (__arm_vrhaddq_m_s16): Likewise.
16462 (__arm_vrhaddq_m_u8): Likewise.
16463 (__arm_vrhaddq_m_u32): Likewise.
16464 (__arm_vrhaddq_m_u16): Likewise.
16465 (__arm_vrmulhq_m_s8): Likewise.
16466 (__arm_vrmulhq_m_s32): Likewise.
16467 (__arm_vrmulhq_m_s16): Likewise.
16468 (__arm_vrmulhq_m_u8): Likewise.
16469 (__arm_vrmulhq_m_u32): Likewise.
16470 (__arm_vrmulhq_m_u16): Likewise.
16471 (__arm_vrshlq_m_s8): Likewise.
16472 (__arm_vrshlq_m_s32): Likewise.
16473 (__arm_vrshlq_m_s16): Likewise.
16474 (__arm_vrshlq_m_u8): Likewise.
16475 (__arm_vrshlq_m_u32): Likewise.
16476 (__arm_vrshlq_m_u16): Likewise.
16477 (__arm_vrshrq_m_n_s8): Likewise.
16478 (__arm_vrshrq_m_n_s32): Likewise.
16479 (__arm_vrshrq_m_n_s16): Likewise.
16480 (__arm_vrshrq_m_n_u8): Likewise.
16481 (__arm_vrshrq_m_n_u32): Likewise.
16482 (__arm_vrshrq_m_n_u16): Likewise.
16483 (__arm_vshlq_m_n_s8): Likewise.
16484 (__arm_vshlq_m_n_s32): Likewise.
16485 (__arm_vshlq_m_n_s16): Likewise.
16486 (__arm_vshlq_m_n_u8): Likewise.
16487 (__arm_vshlq_m_n_u32): Likewise.
16488 (__arm_vshlq_m_n_u16): Likewise.
16489 (__arm_vshrq_m_n_s8): Likewise.
16490 (__arm_vshrq_m_n_s32): Likewise.
16491 (__arm_vshrq_m_n_s16): Likewise.
16492 (__arm_vshrq_m_n_u8): Likewise.
16493 (__arm_vshrq_m_n_u32): Likewise.
16494 (__arm_vshrq_m_n_u16): Likewise.
16495 (__arm_vsliq_m_n_s8): Likewise.
16496 (__arm_vsliq_m_n_s32): Likewise.
16497 (__arm_vsliq_m_n_s16): Likewise.
16498 (__arm_vsliq_m_n_u8): Likewise.
16499 (__arm_vsliq_m_n_u32): Likewise.
16500 (__arm_vsliq_m_n_u16): Likewise.
16501 (__arm_vsubq_m_n_s8): Likewise.
16502 (__arm_vsubq_m_n_s32): Likewise.
16503 (__arm_vsubq_m_n_s16): Likewise.
16504 (__arm_vsubq_m_n_u8): Likewise.
16505 (__arm_vsubq_m_n_u32): Likewise.
16506 (__arm_vsubq_m_n_u16): Likewise.
16507 (vqdmladhq_m): Define polymorphic variant.
16508 (vqdmladhxq_m): Likewise.
16509 (vqdmlsdhq_m): Likewise.
16510 (vqdmlsdhxq_m): Likewise.
16511 (vabdq_m): Likewise.
16512 (vandq_m): Likewise.
16513 (vbicq_m): Likewise.
16514 (vbrsrq_m_n): Likewise.
16515 (vcaddq_rot270_m): Likewise.
16516 (vcaddq_rot90_m): Likewise.
16517 (veorq_m): Likewise.
16518 (vmaxq_m): Likewise.
16519 (vminq_m): Likewise.
16520 (vmladavaq_p): Likewise.
16521 (vmlaq_m_n): Likewise.
16522 (vmlasq_m_n): Likewise.
16523 (vmulhq_m): Likewise.
16524 (vmullbq_int_m): Likewise.
16525 (vmulltq_int_m): Likewise.
16526 (vornq_m): Likewise.
16527 (vorrq_m): Likewise.
16528 (vqdmlahq_m_n): Likewise.
16529 (vqrdmlahq_m_n): Likewise.
16530 (vqrdmlashq_m_n): Likewise.
16531 (vqrshlq_m): Likewise.
16532 (vqshlq_m_n): Likewise.
16533 (vqshlq_m): Likewise.
16534 (vrhaddq_m): Likewise.
16535 (vrmulhq_m): Likewise.
16536 (vrshlq_m): Likewise.
16537 (vrshrq_m_n): Likewise.
16538 (vshlq_m_n): Likewise.
16539 (vshrq_m_n): Likewise.
16540 (vsliq_m): Likewise.
16541 (vaddq_m_n): Likewise.
16542 (vaddq_m): Likewise.
16543 (vhaddq_m_n): Likewise.
16544 (vhaddq_m): Likewise.
16545 (vhcaddq_rot270_m): Likewise.
16546 (vhcaddq_rot90_m): Likewise.
16547 (vhsubq_m): Likewise.
16548 (vhsubq_m_n): Likewise.
16549 (vmulq_m_n): Likewise.
16550 (vmulq_m): Likewise.
16551 (vqaddq_m_n): Likewise.
16552 (vqaddq_m): Likewise.
16553 (vqdmulhq_m_n): Likewise.
16554 (vqdmulhq_m): Likewise.
16555 (vsubq_m_n): Likewise.
16556 (vsliq_m_n): Likewise.
16557 (vqsubq_m_n): Likewise.
16558 (vqsubq_m): Likewise.
16559 (vqrdmulhq_m): Likewise.
16560 (vqrdmulhq_m_n): Likewise.
16561 (vqrdmlsdhxq_m): Likewise.
16562 (vqrdmlsdhq_m): Likewise.
16563 (vqrdmladhq_m): Likewise.
16564 (vqrdmladhxq_m): Likewise.
16565 (vmlsdavaxq_p): Likewise.
16566 (vmlsdavaq_p): Likewise.
16567 (vmladavaxq_p): Likewise.
16568 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
16570 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
16571 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
16572 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
16573 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
16574 * config/arm/mve.md (VHSUBQ_M): Define iterators.
16575 (VSLIQ_M_N): Likewise.
16576 (VQRDMLAHQ_M_N): Likewise.
16577 (VRSHLQ_M): Likewise.
16578 (VMINQ_M): Likewise.
16579 (VMULLBQ_INT_M): Likewise.
16580 (VMULHQ_M): Likewise.
16581 (VMULQ_M): Likewise.
16582 (VHSUBQ_M_N): Likewise.
16583 (VHADDQ_M_N): Likewise.
16584 (VORRQ_M): Likewise.
16585 (VRMULHQ_M): Likewise.
16586 (VQADDQ_M): Likewise.
16587 (VRSHRQ_M_N): Likewise.
16588 (VQSUBQ_M_N): Likewise.
16589 (VADDQ_M): Likewise.
16590 (VORNQ_M): Likewise.
16591 (VQDMLAHQ_M_N): Likewise.
16592 (VRHADDQ_M): Likewise.
16593 (VQSHLQ_M): Likewise.
16594 (VANDQ_M): Likewise.
16595 (VBICQ_M): Likewise.
16596 (VSHLQ_M_N): Likewise.
16597 (VCADDQ_ROT270_M): Likewise.
16598 (VQRSHLQ_M): Likewise.
16599 (VQADDQ_M_N): Likewise.
16600 (VADDQ_M_N): Likewise.
16601 (VMAXQ_M): Likewise.
16602 (VQSUBQ_M): Likewise.
16603 (VMLASQ_M_N): Likewise.
16604 (VMLADAVAQ_P): Likewise.
16605 (VBRSRQ_M_N): Likewise.
16606 (VMULQ_M_N): Likewise.
16607 (VCADDQ_ROT90_M): Likewise.
16608 (VMULLTQ_INT_M): Likewise.
16609 (VEORQ_M): Likewise.
16610 (VSHRQ_M_N): Likewise.
16611 (VSUBQ_M_N): Likewise.
16612 (VHADDQ_M): Likewise.
16613 (VABDQ_M): Likewise.
16614 (VQRDMLASHQ_M_N): Likewise.
16615 (VMLAQ_M_N): Likewise.
16616 (VQSHLQ_M_N): Likewise.
16617 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
16618 (mve_vaddq_m_n_<supf><mode>): Likewise.
16619 (mve_vaddq_m_<supf><mode>): Likewise.
16620 (mve_vandq_m_<supf><mode>): Likewise.
16621 (mve_vbicq_m_<supf><mode>): Likewise.
16622 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
16623 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
16624 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
16625 (mve_veorq_m_<supf><mode>): Likewise.
16626 (mve_vhaddq_m_n_<supf><mode>): Likewise.
16627 (mve_vhaddq_m_<supf><mode>): Likewise.
16628 (mve_vhsubq_m_n_<supf><mode>): Likewise.
16629 (mve_vhsubq_m_<supf><mode>): Likewise.
16630 (mve_vmaxq_m_<supf><mode>): Likewise.
16631 (mve_vminq_m_<supf><mode>): Likewise.
16632 (mve_vmladavaq_p_<supf><mode>): Likewise.
16633 (mve_vmlaq_m_n_<supf><mode>): Likewise.
16634 (mve_vmlasq_m_n_<supf><mode>): Likewise.
16635 (mve_vmulhq_m_<supf><mode>): Likewise.
16636 (mve_vmullbq_int_m_<supf><mode>): Likewise.
16637 (mve_vmulltq_int_m_<supf><mode>): Likewise.
16638 (mve_vmulq_m_n_<supf><mode>): Likewise.
16639 (mve_vmulq_m_<supf><mode>): Likewise.
16640 (mve_vornq_m_<supf><mode>): Likewise.
16641 (mve_vorrq_m_<supf><mode>): Likewise.
16642 (mve_vqaddq_m_n_<supf><mode>): Likewise.
16643 (mve_vqaddq_m_<supf><mode>): Likewise.
16644 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
16645 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
16646 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
16647 (mve_vqrshlq_m_<supf><mode>): Likewise.
16648 (mve_vqshlq_m_n_<supf><mode>): Likewise.
16649 (mve_vqshlq_m_<supf><mode>): Likewise.
16650 (mve_vqsubq_m_n_<supf><mode>): Likewise.
16651 (mve_vqsubq_m_<supf><mode>): Likewise.
16652 (mve_vrhaddq_m_<supf><mode>): Likewise.
16653 (mve_vrmulhq_m_<supf><mode>): Likewise.
16654 (mve_vrshlq_m_<supf><mode>): Likewise.
16655 (mve_vrshrq_m_n_<supf><mode>): Likewise.
16656 (mve_vshlq_m_n_<supf><mode>): Likewise.
16657 (mve_vshrq_m_n_<supf><mode>): Likewise.
16658 (mve_vsliq_m_n_<supf><mode>): Likewise.
16659 (mve_vsubq_m_n_<supf><mode>): Likewise.
16660 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
16661 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
16662 (mve_vmladavaxq_p_s<mode>): Likewise.
16663 (mve_vmlsdavaq_p_s<mode>): Likewise.
16664 (mve_vmlsdavaxq_p_s<mode>): Likewise.
16665 (mve_vqdmladhq_m_s<mode>): Likewise.
16666 (mve_vqdmladhxq_m_s<mode>): Likewise.
16667 (mve_vqdmlsdhq_m_s<mode>): Likewise.
16668 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
16669 (mve_vqdmulhq_m_n_s<mode>): Likewise.
16670 (mve_vqdmulhq_m_s<mode>): Likewise.
16671 (mve_vqrdmladhq_m_s<mode>): Likewise.
16672 (mve_vqrdmladhxq_m_s<mode>): Likewise.
16673 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
16674 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
16675 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
16676 (mve_vqrdmulhq_m_s<mode>): Likewise.
16678 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16679 Mihail Ionescu <mihail.ionescu@arm.com>
16680 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16682 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
16683 Define builtin qualifier.
16684 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16685 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16686 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16687 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16688 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16689 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16690 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16691 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
16692 (vsubq_m_s8): Likewise.
16693 (vcvtq_m_n_f16_u16): Likewise.
16694 (vqshluq_m_n_s8): Likewise.
16695 (vabavq_p_s8): Likewise.
16696 (vsriq_m_n_u8): Likewise.
16697 (vshlq_m_u8): Likewise.
16698 (vsubq_m_u8): Likewise.
16699 (vabavq_p_u8): Likewise.
16700 (vshlq_m_s8): Likewise.
16701 (vcvtq_m_n_f16_s16): Likewise.
16702 (vsriq_m_n_s16): Likewise.
16703 (vsubq_m_s16): Likewise.
16704 (vcvtq_m_n_f32_u32): Likewise.
16705 (vqshluq_m_n_s16): Likewise.
16706 (vabavq_p_s16): Likewise.
16707 (vsriq_m_n_u16): Likewise.
16708 (vshlq_m_u16): Likewise.
16709 (vsubq_m_u16): Likewise.
16710 (vabavq_p_u16): Likewise.
16711 (vshlq_m_s16): Likewise.
16712 (vcvtq_m_n_f32_s32): Likewise.
16713 (vsriq_m_n_s32): Likewise.
16714 (vsubq_m_s32): Likewise.
16715 (vqshluq_m_n_s32): Likewise.
16716 (vabavq_p_s32): Likewise.
16717 (vsriq_m_n_u32): Likewise.
16718 (vshlq_m_u32): Likewise.
16719 (vsubq_m_u32): Likewise.
16720 (vabavq_p_u32): Likewise.
16721 (vshlq_m_s32): Likewise.
16722 (__arm_vsriq_m_n_s8): Define intrinsic.
16723 (__arm_vsubq_m_s8): Likewise.
16724 (__arm_vqshluq_m_n_s8): Likewise.
16725 (__arm_vabavq_p_s8): Likewise.
16726 (__arm_vsriq_m_n_u8): Likewise.
16727 (__arm_vshlq_m_u8): Likewise.
16728 (__arm_vsubq_m_u8): Likewise.
16729 (__arm_vabavq_p_u8): Likewise.
16730 (__arm_vshlq_m_s8): Likewise.
16731 (__arm_vsriq_m_n_s16): Likewise.
16732 (__arm_vsubq_m_s16): Likewise.
16733 (__arm_vqshluq_m_n_s16): Likewise.
16734 (__arm_vabavq_p_s16): Likewise.
16735 (__arm_vsriq_m_n_u16): Likewise.
16736 (__arm_vshlq_m_u16): Likewise.
16737 (__arm_vsubq_m_u16): Likewise.
16738 (__arm_vabavq_p_u16): Likewise.
16739 (__arm_vshlq_m_s16): Likewise.
16740 (__arm_vsriq_m_n_s32): Likewise.
16741 (__arm_vsubq_m_s32): Likewise.
16742 (__arm_vqshluq_m_n_s32): Likewise.
16743 (__arm_vabavq_p_s32): Likewise.
16744 (__arm_vsriq_m_n_u32): Likewise.
16745 (__arm_vshlq_m_u32): Likewise.
16746 (__arm_vsubq_m_u32): Likewise.
16747 (__arm_vabavq_p_u32): Likewise.
16748 (__arm_vshlq_m_s32): Likewise.
16749 (__arm_vcvtq_m_n_f16_u16): Likewise.
16750 (__arm_vcvtq_m_n_f16_s16): Likewise.
16751 (__arm_vcvtq_m_n_f32_u32): Likewise.
16752 (__arm_vcvtq_m_n_f32_s32): Likewise.
16753 (vcvtq_m_n): Define polymorphic variant.
16754 (vqshluq_m_n): Likewise.
16755 (vshlq_m): Likewise.
16756 (vsriq_m_n): Likewise.
16757 (vsubq_m): Likewise.
16758 (vabavq_p): Likewise.
16759 * config/arm/arm_mve_builtins.def
16760 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
16761 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16762 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16763 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16764 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16765 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16766 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16767 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16768 * config/arm/mve.md (VABAVQ_P): Define iterator.
16769 (VSHLQ_M): Likewise.
16770 (VSRIQ_M_N): Likewise.
16771 (VSUBQ_M): Likewise.
16772 (VCVTQ_M_N_TO_F): Likewise.
16773 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
16774 (mve_vqshluq_m_n_s<mode>): Likewise.
16775 (mve_vshlq_m_<supf><mode>): Likewise.
16776 (mve_vsriq_m_n_<supf><mode>): Likewise.
16777 (mve_vsubq_m_<supf><mode>): Likewise.
16778 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
16780 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16781 Mihail Ionescu <mihail.ionescu@arm.com>
16782 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16784 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
16785 (vrmlsldavhaq_s32): Likewise.
16786 (vrmlsldavhaxq_s32): Likewise.
16787 (vaddlvaq_p_s32): Likewise.
16788 (vcvtbq_m_f16_f32): Likewise.
16789 (vcvtbq_m_f32_f16): Likewise.
16790 (vcvttq_m_f16_f32): Likewise.
16791 (vcvttq_m_f32_f16): Likewise.
16792 (vrev16q_m_s8): Likewise.
16793 (vrev32q_m_f16): Likewise.
16794 (vrmlaldavhq_p_s32): Likewise.
16795 (vrmlaldavhxq_p_s32): Likewise.
16796 (vrmlsldavhq_p_s32): Likewise.
16797 (vrmlsldavhxq_p_s32): Likewise.
16798 (vaddlvaq_p_u32): Likewise.
16799 (vrev16q_m_u8): Likewise.
16800 (vrmlaldavhq_p_u32): Likewise.
16801 (vmvnq_m_n_s16): Likewise.
16802 (vorrq_m_n_s16): Likewise.
16803 (vqrshrntq_n_s16): Likewise.
16804 (vqshrnbq_n_s16): Likewise.
16805 (vqshrntq_n_s16): Likewise.
16806 (vrshrnbq_n_s16): Likewise.
16807 (vrshrntq_n_s16): Likewise.
16808 (vshrnbq_n_s16): Likewise.
16809 (vshrntq_n_s16): Likewise.
16810 (vcmlaq_f16): Likewise.
16811 (vcmlaq_rot180_f16): Likewise.
16812 (vcmlaq_rot270_f16): Likewise.
16813 (vcmlaq_rot90_f16): Likewise.
16814 (vfmaq_f16): Likewise.
16815 (vfmaq_n_f16): Likewise.
16816 (vfmasq_n_f16): Likewise.
16817 (vfmsq_f16): Likewise.
16818 (vmlaldavaq_s16): Likewise.
16819 (vmlaldavaxq_s16): Likewise.
16820 (vmlsldavaq_s16): Likewise.
16821 (vmlsldavaxq_s16): Likewise.
16822 (vabsq_m_f16): Likewise.
16823 (vcvtmq_m_s16_f16): Likewise.
16824 (vcvtnq_m_s16_f16): Likewise.
16825 (vcvtpq_m_s16_f16): Likewise.
16826 (vcvtq_m_s16_f16): Likewise.
16827 (vdupq_m_n_f16): Likewise.
16828 (vmaxnmaq_m_f16): Likewise.
16829 (vmaxnmavq_p_f16): Likewise.
16830 (vmaxnmvq_p_f16): Likewise.
16831 (vminnmaq_m_f16): Likewise.
16832 (vminnmavq_p_f16): Likewise.
16833 (vminnmvq_p_f16): Likewise.
16834 (vmlaldavq_p_s16): Likewise.
16835 (vmlaldavxq_p_s16): Likewise.
16836 (vmlsldavq_p_s16): Likewise.
16837 (vmlsldavxq_p_s16): Likewise.
16838 (vmovlbq_m_s8): Likewise.
16839 (vmovltq_m_s8): Likewise.
16840 (vmovnbq_m_s16): Likewise.
16841 (vmovntq_m_s16): Likewise.
16842 (vnegq_m_f16): Likewise.
16843 (vpselq_f16): Likewise.
16844 (vqmovnbq_m_s16): Likewise.
16845 (vqmovntq_m_s16): Likewise.
16846 (vrev32q_m_s8): Likewise.
16847 (vrev64q_m_f16): Likewise.
16848 (vrndaq_m_f16): Likewise.
16849 (vrndmq_m_f16): Likewise.
16850 (vrndnq_m_f16): Likewise.
16851 (vrndpq_m_f16): Likewise.
16852 (vrndq_m_f16): Likewise.
16853 (vrndxq_m_f16): Likewise.
16854 (vcmpeqq_m_n_f16): Likewise.
16855 (vcmpgeq_m_f16): Likewise.
16856 (vcmpgeq_m_n_f16): Likewise.
16857 (vcmpgtq_m_f16): Likewise.
16858 (vcmpgtq_m_n_f16): Likewise.
16859 (vcmpleq_m_f16): Likewise.
16860 (vcmpleq_m_n_f16): Likewise.
16861 (vcmpltq_m_f16): Likewise.
16862 (vcmpltq_m_n_f16): Likewise.
16863 (vcmpneq_m_f16): Likewise.
16864 (vcmpneq_m_n_f16): Likewise.
16865 (vmvnq_m_n_u16): Likewise.
16866 (vorrq_m_n_u16): Likewise.
16867 (vqrshruntq_n_s16): Likewise.
16868 (vqshrunbq_n_s16): Likewise.
16869 (vqshruntq_n_s16): Likewise.
16870 (vcvtmq_m_u16_f16): Likewise.
16871 (vcvtnq_m_u16_f16): Likewise.
16872 (vcvtpq_m_u16_f16): Likewise.
16873 (vcvtq_m_u16_f16): Likewise.
16874 (vqmovunbq_m_s16): Likewise.
16875 (vqmovuntq_m_s16): Likewise.
16876 (vqrshrntq_n_u16): Likewise.
16877 (vqshrnbq_n_u16): Likewise.
16878 (vqshrntq_n_u16): Likewise.
16879 (vrshrnbq_n_u16): Likewise.
16880 (vrshrntq_n_u16): Likewise.
16881 (vshrnbq_n_u16): Likewise.
16882 (vshrntq_n_u16): Likewise.
16883 (vmlaldavaq_u16): Likewise.
16884 (vmlaldavaxq_u16): Likewise.
16885 (vmlaldavq_p_u16): Likewise.
16886 (vmlaldavxq_p_u16): Likewise.
16887 (vmovlbq_m_u8): Likewise.
16888 (vmovltq_m_u8): Likewise.
16889 (vmovnbq_m_u16): Likewise.
16890 (vmovntq_m_u16): Likewise.
16891 (vqmovnbq_m_u16): Likewise.
16892 (vqmovntq_m_u16): Likewise.
16893 (vrev32q_m_u8): Likewise.
16894 (vmvnq_m_n_s32): Likewise.
16895 (vorrq_m_n_s32): Likewise.
16896 (vqrshrntq_n_s32): Likewise.
16897 (vqshrnbq_n_s32): Likewise.
16898 (vqshrntq_n_s32): Likewise.
16899 (vrshrnbq_n_s32): Likewise.
16900 (vrshrntq_n_s32): Likewise.
16901 (vshrnbq_n_s32): Likewise.
16902 (vshrntq_n_s32): Likewise.
16903 (vcmlaq_f32): Likewise.
16904 (vcmlaq_rot180_f32): Likewise.
16905 (vcmlaq_rot270_f32): Likewise.
16906 (vcmlaq_rot90_f32): Likewise.
16907 (vfmaq_f32): Likewise.
16908 (vfmaq_n_f32): Likewise.
16909 (vfmasq_n_f32): Likewise.
16910 (vfmsq_f32): Likewise.
16911 (vmlaldavaq_s32): Likewise.
16912 (vmlaldavaxq_s32): Likewise.
16913 (vmlsldavaq_s32): Likewise.
16914 (vmlsldavaxq_s32): Likewise.
16915 (vabsq_m_f32): Likewise.
16916 (vcvtmq_m_s32_f32): Likewise.
16917 (vcvtnq_m_s32_f32): Likewise.
16918 (vcvtpq_m_s32_f32): Likewise.
16919 (vcvtq_m_s32_f32): Likewise.
16920 (vdupq_m_n_f32): Likewise.
16921 (vmaxnmaq_m_f32): Likewise.
16922 (vmaxnmavq_p_f32): Likewise.
16923 (vmaxnmvq_p_f32): Likewise.
16924 (vminnmaq_m_f32): Likewise.
16925 (vminnmavq_p_f32): Likewise.
16926 (vminnmvq_p_f32): Likewise.
16927 (vmlaldavq_p_s32): Likewise.
16928 (vmlaldavxq_p_s32): Likewise.
16929 (vmlsldavq_p_s32): Likewise.
16930 (vmlsldavxq_p_s32): Likewise.
16931 (vmovlbq_m_s16): Likewise.
16932 (vmovltq_m_s16): Likewise.
16933 (vmovnbq_m_s32): Likewise.
16934 (vmovntq_m_s32): Likewise.
16935 (vnegq_m_f32): Likewise.
16936 (vpselq_f32): Likewise.
16937 (vqmovnbq_m_s32): Likewise.
16938 (vqmovntq_m_s32): Likewise.
16939 (vrev32q_m_s16): Likewise.
16940 (vrev64q_m_f32): Likewise.
16941 (vrndaq_m_f32): Likewise.
16942 (vrndmq_m_f32): Likewise.
16943 (vrndnq_m_f32): Likewise.
16944 (vrndpq_m_f32): Likewise.
16945 (vrndq_m_f32): Likewise.
16946 (vrndxq_m_f32): Likewise.
16947 (vcmpeqq_m_n_f32): Likewise.
16948 (vcmpgeq_m_f32): Likewise.
16949 (vcmpgeq_m_n_f32): Likewise.
16950 (vcmpgtq_m_f32): Likewise.
16951 (vcmpgtq_m_n_f32): Likewise.
16952 (vcmpleq_m_f32): Likewise.
16953 (vcmpleq_m_n_f32): Likewise.
16954 (vcmpltq_m_f32): Likewise.
16955 (vcmpltq_m_n_f32): Likewise.
16956 (vcmpneq_m_f32): Likewise.
16957 (vcmpneq_m_n_f32): Likewise.
16958 (vmvnq_m_n_u32): Likewise.
16959 (vorrq_m_n_u32): Likewise.
16960 (vqrshruntq_n_s32): Likewise.
16961 (vqshrunbq_n_s32): Likewise.
16962 (vqshruntq_n_s32): Likewise.
16963 (vcvtmq_m_u32_f32): Likewise.
16964 (vcvtnq_m_u32_f32): Likewise.
16965 (vcvtpq_m_u32_f32): Likewise.
16966 (vcvtq_m_u32_f32): Likewise.
16967 (vqmovunbq_m_s32): Likewise.
16968 (vqmovuntq_m_s32): Likewise.
16969 (vqrshrntq_n_u32): Likewise.
16970 (vqshrnbq_n_u32): Likewise.
16971 (vqshrntq_n_u32): Likewise.
16972 (vrshrnbq_n_u32): Likewise.
16973 (vrshrntq_n_u32): Likewise.
16974 (vshrnbq_n_u32): Likewise.
16975 (vshrntq_n_u32): Likewise.
16976 (vmlaldavaq_u32): Likewise.
16977 (vmlaldavaxq_u32): Likewise.
16978 (vmlaldavq_p_u32): Likewise.
16979 (vmlaldavxq_p_u32): Likewise.
16980 (vmovlbq_m_u16): Likewise.
16981 (vmovltq_m_u16): Likewise.
16982 (vmovnbq_m_u32): Likewise.
16983 (vmovntq_m_u32): Likewise.
16984 (vqmovnbq_m_u32): Likewise.
16985 (vqmovntq_m_u32): Likewise.
16986 (vrev32q_m_u16): Likewise.
16987 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
16988 (__arm_vrmlsldavhaq_s32): Likewise.
16989 (__arm_vrmlsldavhaxq_s32): Likewise.
16990 (__arm_vaddlvaq_p_s32): Likewise.
16991 (__arm_vrev16q_m_s8): Likewise.
16992 (__arm_vrmlaldavhq_p_s32): Likewise.
16993 (__arm_vrmlaldavhxq_p_s32): Likewise.
16994 (__arm_vrmlsldavhq_p_s32): Likewise.
16995 (__arm_vrmlsldavhxq_p_s32): Likewise.
16996 (__arm_vaddlvaq_p_u32): Likewise.
16997 (__arm_vrev16q_m_u8): Likewise.
16998 (__arm_vrmlaldavhq_p_u32): Likewise.
16999 (__arm_vmvnq_m_n_s16): Likewise.
17000 (__arm_vorrq_m_n_s16): Likewise.
17001 (__arm_vqrshrntq_n_s16): Likewise.
17002 (__arm_vqshrnbq_n_s16): Likewise.
17003 (__arm_vqshrntq_n_s16): Likewise.
17004 (__arm_vrshrnbq_n_s16): Likewise.
17005 (__arm_vrshrntq_n_s16): Likewise.
17006 (__arm_vshrnbq_n_s16): Likewise.
17007 (__arm_vshrntq_n_s16): Likewise.
17008 (__arm_vmlaldavaq_s16): Likewise.
17009 (__arm_vmlaldavaxq_s16): Likewise.
17010 (__arm_vmlsldavaq_s16): Likewise.
17011 (__arm_vmlsldavaxq_s16): Likewise.
17012 (__arm_vmlaldavq_p_s16): Likewise.
17013 (__arm_vmlaldavxq_p_s16): Likewise.
17014 (__arm_vmlsldavq_p_s16): Likewise.
17015 (__arm_vmlsldavxq_p_s16): Likewise.
17016 (__arm_vmovlbq_m_s8): Likewise.
17017 (__arm_vmovltq_m_s8): Likewise.
17018 (__arm_vmovnbq_m_s16): Likewise.
17019 (__arm_vmovntq_m_s16): Likewise.
17020 (__arm_vqmovnbq_m_s16): Likewise.
17021 (__arm_vqmovntq_m_s16): Likewise.
17022 (__arm_vrev32q_m_s8): Likewise.
17023 (__arm_vmvnq_m_n_u16): Likewise.
17024 (__arm_vorrq_m_n_u16): Likewise.
17025 (__arm_vqrshruntq_n_s16): Likewise.
17026 (__arm_vqshrunbq_n_s16): Likewise.
17027 (__arm_vqshruntq_n_s16): Likewise.
17028 (__arm_vqmovunbq_m_s16): Likewise.
17029 (__arm_vqmovuntq_m_s16): Likewise.
17030 (__arm_vqrshrntq_n_u16): Likewise.
17031 (__arm_vqshrnbq_n_u16): Likewise.
17032 (__arm_vqshrntq_n_u16): Likewise.
17033 (__arm_vrshrnbq_n_u16): Likewise.
17034 (__arm_vrshrntq_n_u16): Likewise.
17035 (__arm_vshrnbq_n_u16): Likewise.
17036 (__arm_vshrntq_n_u16): Likewise.
17037 (__arm_vmlaldavaq_u16): Likewise.
17038 (__arm_vmlaldavaxq_u16): Likewise.
17039 (__arm_vmlaldavq_p_u16): Likewise.
17040 (__arm_vmlaldavxq_p_u16): Likewise.
17041 (__arm_vmovlbq_m_u8): Likewise.
17042 (__arm_vmovltq_m_u8): Likewise.
17043 (__arm_vmovnbq_m_u16): Likewise.
17044 (__arm_vmovntq_m_u16): Likewise.
17045 (__arm_vqmovnbq_m_u16): Likewise.
17046 (__arm_vqmovntq_m_u16): Likewise.
17047 (__arm_vrev32q_m_u8): Likewise.
17048 (__arm_vmvnq_m_n_s32): Likewise.
17049 (__arm_vorrq_m_n_s32): Likewise.
17050 (__arm_vqrshrntq_n_s32): Likewise.
17051 (__arm_vqshrnbq_n_s32): Likewise.
17052 (__arm_vqshrntq_n_s32): Likewise.
17053 (__arm_vrshrnbq_n_s32): Likewise.
17054 (__arm_vrshrntq_n_s32): Likewise.
17055 (__arm_vshrnbq_n_s32): Likewise.
17056 (__arm_vshrntq_n_s32): Likewise.
17057 (__arm_vmlaldavaq_s32): Likewise.
17058 (__arm_vmlaldavaxq_s32): Likewise.
17059 (__arm_vmlsldavaq_s32): Likewise.
17060 (__arm_vmlsldavaxq_s32): Likewise.
17061 (__arm_vmlaldavq_p_s32): Likewise.
17062 (__arm_vmlaldavxq_p_s32): Likewise.
17063 (__arm_vmlsldavq_p_s32): Likewise.
17064 (__arm_vmlsldavxq_p_s32): Likewise.
17065 (__arm_vmovlbq_m_s16): Likewise.
17066 (__arm_vmovltq_m_s16): Likewise.
17067 (__arm_vmovnbq_m_s32): Likewise.
17068 (__arm_vmovntq_m_s32): Likewise.
17069 (__arm_vqmovnbq_m_s32): Likewise.
17070 (__arm_vqmovntq_m_s32): Likewise.
17071 (__arm_vrev32q_m_s16): Likewise.
17072 (__arm_vmvnq_m_n_u32): Likewise.
17073 (__arm_vorrq_m_n_u32): Likewise.
17074 (__arm_vqrshruntq_n_s32): Likewise.
17075 (__arm_vqshrunbq_n_s32): Likewise.
17076 (__arm_vqshruntq_n_s32): Likewise.
17077 (__arm_vqmovunbq_m_s32): Likewise.
17078 (__arm_vqmovuntq_m_s32): Likewise.
17079 (__arm_vqrshrntq_n_u32): Likewise.
17080 (__arm_vqshrnbq_n_u32): Likewise.
17081 (__arm_vqshrntq_n_u32): Likewise.
17082 (__arm_vrshrnbq_n_u32): Likewise.
17083 (__arm_vrshrntq_n_u32): Likewise.
17084 (__arm_vshrnbq_n_u32): Likewise.
17085 (__arm_vshrntq_n_u32): Likewise.
17086 (__arm_vmlaldavaq_u32): Likewise.
17087 (__arm_vmlaldavaxq_u32): Likewise.
17088 (__arm_vmlaldavq_p_u32): Likewise.
17089 (__arm_vmlaldavxq_p_u32): Likewise.
17090 (__arm_vmovlbq_m_u16): Likewise.
17091 (__arm_vmovltq_m_u16): Likewise.
17092 (__arm_vmovnbq_m_u32): Likewise.
17093 (__arm_vmovntq_m_u32): Likewise.
17094 (__arm_vqmovnbq_m_u32): Likewise.
17095 (__arm_vqmovntq_m_u32): Likewise.
17096 (__arm_vrev32q_m_u16): Likewise.
17097 (__arm_vcvtbq_m_f16_f32): Likewise.
17098 (__arm_vcvtbq_m_f32_f16): Likewise.
17099 (__arm_vcvttq_m_f16_f32): Likewise.
17100 (__arm_vcvttq_m_f32_f16): Likewise.
17101 (__arm_vrev32q_m_f16): Likewise.
17102 (__arm_vcmlaq_f16): Likewise.
17103 (__arm_vcmlaq_rot180_f16): Likewise.
17104 (__arm_vcmlaq_rot270_f16): Likewise.
17105 (__arm_vcmlaq_rot90_f16): Likewise.
17106 (__arm_vfmaq_f16): Likewise.
17107 (__arm_vfmaq_n_f16): Likewise.
17108 (__arm_vfmasq_n_f16): Likewise.
17109 (__arm_vfmsq_f16): Likewise.
17110 (__arm_vabsq_m_f16): Likewise.
17111 (__arm_vcvtmq_m_s16_f16): Likewise.
17112 (__arm_vcvtnq_m_s16_f16): Likewise.
17113 (__arm_vcvtpq_m_s16_f16): Likewise.
17114 (__arm_vcvtq_m_s16_f16): Likewise.
17115 (__arm_vdupq_m_n_f16): Likewise.
17116 (__arm_vmaxnmaq_m_f16): Likewise.
17117 (__arm_vmaxnmavq_p_f16): Likewise.
17118 (__arm_vmaxnmvq_p_f16): Likewise.
17119 (__arm_vminnmaq_m_f16): Likewise.
17120 (__arm_vminnmavq_p_f16): Likewise.
17121 (__arm_vminnmvq_p_f16): Likewise.
17122 (__arm_vnegq_m_f16): Likewise.
17123 (__arm_vpselq_f16): Likewise.
17124 (__arm_vrev64q_m_f16): Likewise.
17125 (__arm_vrndaq_m_f16): Likewise.
17126 (__arm_vrndmq_m_f16): Likewise.
17127 (__arm_vrndnq_m_f16): Likewise.
17128 (__arm_vrndpq_m_f16): Likewise.
17129 (__arm_vrndq_m_f16): Likewise.
17130 (__arm_vrndxq_m_f16): Likewise.
17131 (__arm_vcmpeqq_m_n_f16): Likewise.
17132 (__arm_vcmpgeq_m_f16): Likewise.
17133 (__arm_vcmpgeq_m_n_f16): Likewise.
17134 (__arm_vcmpgtq_m_f16): Likewise.
17135 (__arm_vcmpgtq_m_n_f16): Likewise.
17136 (__arm_vcmpleq_m_f16): Likewise.
17137 (__arm_vcmpleq_m_n_f16): Likewise.
17138 (__arm_vcmpltq_m_f16): Likewise.
17139 (__arm_vcmpltq_m_n_f16): Likewise.
17140 (__arm_vcmpneq_m_f16): Likewise.
17141 (__arm_vcmpneq_m_n_f16): Likewise.
17142 (__arm_vcvtmq_m_u16_f16): Likewise.
17143 (__arm_vcvtnq_m_u16_f16): Likewise.
17144 (__arm_vcvtpq_m_u16_f16): Likewise.
17145 (__arm_vcvtq_m_u16_f16): Likewise.
17146 (__arm_vcmlaq_f32): Likewise.
17147 (__arm_vcmlaq_rot180_f32): Likewise.
17148 (__arm_vcmlaq_rot270_f32): Likewise.
17149 (__arm_vcmlaq_rot90_f32): Likewise.
17150 (__arm_vfmaq_f32): Likewise.
17151 (__arm_vfmaq_n_f32): Likewise.
17152 (__arm_vfmasq_n_f32): Likewise.
17153 (__arm_vfmsq_f32): Likewise.
17154 (__arm_vabsq_m_f32): Likewise.
17155 (__arm_vcvtmq_m_s32_f32): Likewise.
17156 (__arm_vcvtnq_m_s32_f32): Likewise.
17157 (__arm_vcvtpq_m_s32_f32): Likewise.
17158 (__arm_vcvtq_m_s32_f32): Likewise.
17159 (__arm_vdupq_m_n_f32): Likewise.
17160 (__arm_vmaxnmaq_m_f32): Likewise.
17161 (__arm_vmaxnmavq_p_f32): Likewise.
17162 (__arm_vmaxnmvq_p_f32): Likewise.
17163 (__arm_vminnmaq_m_f32): Likewise.
17164 (__arm_vminnmavq_p_f32): Likewise.
17165 (__arm_vminnmvq_p_f32): Likewise.
17166 (__arm_vnegq_m_f32): Likewise.
17167 (__arm_vpselq_f32): Likewise.
17168 (__arm_vrev64q_m_f32): Likewise.
17169 (__arm_vrndaq_m_f32): Likewise.
17170 (__arm_vrndmq_m_f32): Likewise.
17171 (__arm_vrndnq_m_f32): Likewise.
17172 (__arm_vrndpq_m_f32): Likewise.
17173 (__arm_vrndq_m_f32): Likewise.
17174 (__arm_vrndxq_m_f32): Likewise.
17175 (__arm_vcmpeqq_m_n_f32): Likewise.
17176 (__arm_vcmpgeq_m_f32): Likewise.
17177 (__arm_vcmpgeq_m_n_f32): Likewise.
17178 (__arm_vcmpgtq_m_f32): Likewise.
17179 (__arm_vcmpgtq_m_n_f32): Likewise.
17180 (__arm_vcmpleq_m_f32): Likewise.
17181 (__arm_vcmpleq_m_n_f32): Likewise.
17182 (__arm_vcmpltq_m_f32): Likewise.
17183 (__arm_vcmpltq_m_n_f32): Likewise.
17184 (__arm_vcmpneq_m_f32): Likewise.
17185 (__arm_vcmpneq_m_n_f32): Likewise.
17186 (__arm_vcvtmq_m_u32_f32): Likewise.
17187 (__arm_vcvtnq_m_u32_f32): Likewise.
17188 (__arm_vcvtpq_m_u32_f32): Likewise.
17189 (__arm_vcvtq_m_u32_f32): Likewise.
17190 (vcvtq_m): Define polymorphic variant.
17191 (vabsq_m): Likewise.
17192 (vcmlaq): Likewise.
17193 (vcmlaq_rot180): Likewise.
17194 (vcmlaq_rot270): Likewise.
17195 (vcmlaq_rot90): Likewise.
17196 (vcmpeqq_m_n): Likewise.
17197 (vcmpgeq_m_n): Likewise.
17198 (vrndxq_m): Likewise.
17199 (vrndq_m): Likewise.
17200 (vrndpq_m): Likewise.
17201 (vcmpgtq_m_n): Likewise.
17202 (vcmpgtq_m): Likewise.
17203 (vcmpleq_m): Likewise.
17204 (vcmpleq_m_n): Likewise.
17205 (vcmpltq_m_n): Likewise.
17206 (vcmpltq_m): Likewise.
17207 (vcmpneq_m): Likewise.
17208 (vcmpneq_m_n): Likewise.
17209 (vcvtbq_m): Likewise.
17210 (vcvttq_m): Likewise.
17211 (vcvtmq_m): Likewise.
17212 (vcvtnq_m): Likewise.
17213 (vcvtpq_m): Likewise.
17214 (vdupq_m_n): Likewise.
17215 (vfmaq_n): Likewise.
17217 (vfmasq_n): Likewise.
17219 (vmaxnmaq_m): Likewise.
17220 (vmaxnmavq_m): Likewise.
17221 (vmaxnmvq_m): Likewise.
17222 (vmaxnmavq_p): Likewise.
17223 (vmaxnmvq_p): Likewise.
17224 (vminnmaq_m): Likewise.
17225 (vminnmavq_p): Likewise.
17226 (vminnmvq_p): Likewise.
17227 (vrndnq_m): Likewise.
17228 (vrndaq_m): Likewise.
17229 (vrndmq_m): Likewise.
17230 (vrev64q_m): Likewise.
17231 (vrev32q_m): Likewise.
17232 (vpselq): Likewise.
17233 (vnegq_m): Likewise.
17234 (vcmpgeq_m): Likewise.
17235 (vshrntq_n): Likewise.
17236 (vrshrntq_n): Likewise.
17237 (vmovlbq_m): Likewise.
17238 (vmovnbq_m): Likewise.
17239 (vmovntq_m): Likewise.
17240 (vmvnq_m_n): Likewise.
17241 (vmvnq_m): Likewise.
17242 (vshrnbq_n): Likewise.
17243 (vrshrnbq_n): Likewise.
17244 (vqshruntq_n): Likewise.
17245 (vrev16q_m): Likewise.
17246 (vqshrunbq_n): Likewise.
17247 (vqshrntq_n): Likewise.
17248 (vqrshruntq_n): Likewise.
17249 (vqrshrntq_n): Likewise.
17250 (vqshrnbq_n): Likewise.
17251 (vqmovuntq_m): Likewise.
17252 (vqmovntq_m): Likewise.
17253 (vqmovnbq_m): Likewise.
17254 (vorrq_m_n): Likewise.
17255 (vmovltq_m): Likewise.
17256 (vqmovunbq_m): Likewise.
17257 (vaddlvaq_p): Likewise.
17258 (vmlaldavaq): Likewise.
17259 (vmlaldavaxq): Likewise.
17260 (vmlaldavq_p): Likewise.
17261 (vmlaldavxq_p): Likewise.
17262 (vmlsldavaq): Likewise.
17263 (vmlsldavaxq): Likewise.
17264 (vmlsldavq_p): Likewise.
17265 (vmlsldavxq_p): Likewise.
17266 (vrmlaldavhaxq): Likewise.
17267 (vrmlaldavhq_p): Likewise.
17268 (vrmlaldavhxq_p): Likewise.
17269 (vrmlsldavhaq): Likewise.
17270 (vrmlsldavhaxq): Likewise.
17271 (vrmlsldavhq_p): Likewise.
17272 (vrmlsldavhxq_p): Likewise.
17273 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
17275 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
17276 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
17277 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
17278 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
17279 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
17280 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
17281 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
17282 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
17283 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
17284 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
17285 (MVE_pred3): Likewise.
17286 (MVE_constraint1): Likewise.
17287 (MVE_pred1): Likewise.
17288 (VMLALDAVQ_P): Define iterator.
17289 (VQMOVNBQ_M): Likewise.
17290 (VMOVLTQ_M): Likewise.
17291 (VMOVNBQ_M): Likewise.
17292 (VRSHRNTQ_N): Likewise.
17293 (VORRQ_M_N): Likewise.
17294 (VREV32Q_M): Likewise.
17295 (VREV16Q_M): Likewise.
17296 (VQRSHRNTQ_N): Likewise.
17297 (VMOVNTQ_M): Likewise.
17298 (VMOVLBQ_M): Likewise.
17299 (VMLALDAVAQ): Likewise.
17300 (VQSHRNBQ_N): Likewise.
17301 (VSHRNBQ_N): Likewise.
17302 (VRSHRNBQ_N): Likewise.
17303 (VMLALDAVXQ_P): Likewise.
17304 (VQMOVNTQ_M): Likewise.
17305 (VMVNQ_M_N): Likewise.
17306 (VQSHRNTQ_N): Likewise.
17307 (VMLALDAVAXQ): Likewise.
17308 (VSHRNTQ_N): Likewise.
17309 (VCVTMQ_M): Likewise.
17310 (VCVTNQ_M): Likewise.
17311 (VCVTPQ_M): Likewise.
17312 (VCVTQ_M_N_FROM_F): Likewise.
17313 (VCVTQ_M_FROM_F): Likewise.
17314 (VRMLALDAVHQ_P): Likewise.
17315 (VADDLVAQ_P): Likewise.
17316 (mve_vrndq_m_f<mode>): Define RTL pattern.
17317 (mve_vabsq_m_f<mode>): Likewise.
17318 (mve_vaddlvaq_p_<supf>v4si): Likewise.
17319 (mve_vcmlaq_f<mode>): Likewise.
17320 (mve_vcmlaq_rot180_f<mode>): Likewise.
17321 (mve_vcmlaq_rot270_f<mode>): Likewise.
17322 (mve_vcmlaq_rot90_f<mode>): Likewise.
17323 (mve_vcmpeqq_m_n_f<mode>): Likewise.
17324 (mve_vcmpgeq_m_f<mode>): Likewise.
17325 (mve_vcmpgeq_m_n_f<mode>): Likewise.
17326 (mve_vcmpgtq_m_f<mode>): Likewise.
17327 (mve_vcmpgtq_m_n_f<mode>): Likewise.
17328 (mve_vcmpleq_m_f<mode>): Likewise.
17329 (mve_vcmpleq_m_n_f<mode>): Likewise.
17330 (mve_vcmpltq_m_f<mode>): Likewise.
17331 (mve_vcmpltq_m_n_f<mode>): Likewise.
17332 (mve_vcmpneq_m_f<mode>): Likewise.
17333 (mve_vcmpneq_m_n_f<mode>): Likewise.
17334 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
17335 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
17336 (mve_vcvttq_m_f16_f32v8hf): Likewise.
17337 (mve_vcvttq_m_f32_f16v4sf): Likewise.
17338 (mve_vdupq_m_n_f<mode>): Likewise.
17339 (mve_vfmaq_f<mode>): Likewise.
17340 (mve_vfmaq_n_f<mode>): Likewise.
17341 (mve_vfmasq_n_f<mode>): Likewise.
17342 (mve_vfmsq_f<mode>): Likewise.
17343 (mve_vmaxnmaq_m_f<mode>): Likewise.
17344 (mve_vmaxnmavq_p_f<mode>): Likewise.
17345 (mve_vmaxnmvq_p_f<mode>): Likewise.
17346 (mve_vminnmaq_m_f<mode>): Likewise.
17347 (mve_vminnmavq_p_f<mode>): Likewise.
17348 (mve_vminnmvq_p_f<mode>): Likewise.
17349 (mve_vmlaldavaq_<supf><mode>): Likewise.
17350 (mve_vmlaldavaxq_<supf><mode>): Likewise.
17351 (mve_vmlaldavq_p_<supf><mode>): Likewise.
17352 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
17353 (mve_vmlsldavaq_s<mode>): Likewise.
17354 (mve_vmlsldavaxq_s<mode>): Likewise.
17355 (mve_vmlsldavq_p_s<mode>): Likewise.
17356 (mve_vmlsldavxq_p_s<mode>): Likewise.
17357 (mve_vmovlbq_m_<supf><mode>): Likewise.
17358 (mve_vmovltq_m_<supf><mode>): Likewise.
17359 (mve_vmovnbq_m_<supf><mode>): Likewise.
17360 (mve_vmovntq_m_<supf><mode>): Likewise.
17361 (mve_vmvnq_m_n_<supf><mode>): Likewise.
17362 (mve_vnegq_m_f<mode>): Likewise.
17363 (mve_vorrq_m_n_<supf><mode>): Likewise.
17364 (mve_vpselq_f<mode>): Likewise.
17365 (mve_vqmovnbq_m_<supf><mode>): Likewise.
17366 (mve_vqmovntq_m_<supf><mode>): Likewise.
17367 (mve_vqmovunbq_m_s<mode>): Likewise.
17368 (mve_vqmovuntq_m_s<mode>): Likewise.
17369 (mve_vqrshrntq_n_<supf><mode>): Likewise.
17370 (mve_vqrshruntq_n_s<mode>): Likewise.
17371 (mve_vqshrnbq_n_<supf><mode>): Likewise.
17372 (mve_vqshrntq_n_<supf><mode>): Likewise.
17373 (mve_vqshrunbq_n_s<mode>): Likewise.
17374 (mve_vqshruntq_n_s<mode>): Likewise.
17375 (mve_vrev32q_m_fv8hf): Likewise.
17376 (mve_vrev32q_m_<supf><mode>): Likewise.
17377 (mve_vrev64q_m_f<mode>): Likewise.
17378 (mve_vrmlaldavhaxq_sv4si): Likewise.
17379 (mve_vrmlaldavhxq_p_sv4si): Likewise.
17380 (mve_vrmlsldavhaxq_sv4si): Likewise.
17381 (mve_vrmlsldavhq_p_sv4si): Likewise.
17382 (mve_vrmlsldavhxq_p_sv4si): Likewise.
17383 (mve_vrndaq_m_f<mode>): Likewise.
17384 (mve_vrndmq_m_f<mode>): Likewise.
17385 (mve_vrndnq_m_f<mode>): Likewise.
17386 (mve_vrndpq_m_f<mode>): Likewise.
17387 (mve_vrndxq_m_f<mode>): Likewise.
17388 (mve_vrshrnbq_n_<supf><mode>): Likewise.
17389 (mve_vrshrntq_n_<supf><mode>): Likewise.
17390 (mve_vshrnbq_n_<supf><mode>): Likewise.
17391 (mve_vshrntq_n_<supf><mode>): Likewise.
17392 (mve_vcvtmq_m_<supf><mode>): Likewise.
17393 (mve_vcvtpq_m_<supf><mode>): Likewise.
17394 (mve_vcvtnq_m_<supf><mode>): Likewise.
17395 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
17396 (mve_vrev16q_m_<supf>v16qi): Likewise.
17397 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
17398 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
17399 (mve_vrmlsldavhaq_sv4si): Likewise.
17401 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
17402 Mihail Ionescu <mihail.ionescu@arm.com>
17403 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17405 * config/arm/arm_mve.h (vpselq_u8): Define macro.
17406 (vpselq_s8): Likewise.
17407 (vrev64q_m_u8): Likewise.
17408 (vqrdmlashq_n_u8): Likewise.
17409 (vqrdmlahq_n_u8): Likewise.
17410 (vqdmlahq_n_u8): Likewise.
17411 (vmvnq_m_u8): Likewise.
17412 (vmlasq_n_u8): Likewise.
17413 (vmlaq_n_u8): Likewise.
17414 (vmladavq_p_u8): Likewise.
17415 (vmladavaq_u8): Likewise.
17416 (vminvq_p_u8): Likewise.
17417 (vmaxvq_p_u8): Likewise.
17418 (vdupq_m_n_u8): Likewise.
17419 (vcmpneq_m_u8): Likewise.
17420 (vcmpneq_m_n_u8): Likewise.
17421 (vcmphiq_m_u8): Likewise.
17422 (vcmphiq_m_n_u8): Likewise.
17423 (vcmpeqq_m_u8): Likewise.
17424 (vcmpeqq_m_n_u8): Likewise.
17425 (vcmpcsq_m_u8): Likewise.
17426 (vcmpcsq_m_n_u8): Likewise.
17427 (vclzq_m_u8): Likewise.
17428 (vaddvaq_p_u8): Likewise.
17429 (vsriq_n_u8): Likewise.
17430 (vsliq_n_u8): Likewise.
17431 (vshlq_m_r_u8): Likewise.
17432 (vrshlq_m_n_u8): Likewise.
17433 (vqshlq_m_r_u8): Likewise.
17434 (vqrshlq_m_n_u8): Likewise.
17435 (vminavq_p_s8): Likewise.
17436 (vminaq_m_s8): Likewise.
17437 (vmaxavq_p_s8): Likewise.
17438 (vmaxaq_m_s8): Likewise.
17439 (vcmpneq_m_s8): Likewise.
17440 (vcmpneq_m_n_s8): Likewise.
17441 (vcmpltq_m_s8): Likewise.
17442 (vcmpltq_m_n_s8): Likewise.
17443 (vcmpleq_m_s8): Likewise.
17444 (vcmpleq_m_n_s8): Likewise.
17445 (vcmpgtq_m_s8): Likewise.
17446 (vcmpgtq_m_n_s8): Likewise.
17447 (vcmpgeq_m_s8): Likewise.
17448 (vcmpgeq_m_n_s8): Likewise.
17449 (vcmpeqq_m_s8): Likewise.
17450 (vcmpeqq_m_n_s8): Likewise.
17451 (vshlq_m_r_s8): Likewise.
17452 (vrshlq_m_n_s8): Likewise.
17453 (vrev64q_m_s8): Likewise.
17454 (vqshlq_m_r_s8): Likewise.
17455 (vqrshlq_m_n_s8): Likewise.
17456 (vqnegq_m_s8): Likewise.
17457 (vqabsq_m_s8): Likewise.
17458 (vnegq_m_s8): Likewise.
17459 (vmvnq_m_s8): Likewise.
17460 (vmlsdavxq_p_s8): Likewise.
17461 (vmlsdavq_p_s8): Likewise.
17462 (vmladavxq_p_s8): Likewise.
17463 (vmladavq_p_s8): Likewise.
17464 (vminvq_p_s8): Likewise.
17465 (vmaxvq_p_s8): Likewise.
17466 (vdupq_m_n_s8): Likewise.
17467 (vclzq_m_s8): Likewise.
17468 (vclsq_m_s8): Likewise.
17469 (vaddvaq_p_s8): Likewise.
17470 (vabsq_m_s8): Likewise.
17471 (vqrdmlsdhxq_s8): Likewise.
17472 (vqrdmlsdhq_s8): Likewise.
17473 (vqrdmlashq_n_s8): Likewise.
17474 (vqrdmlahq_n_s8): Likewise.
17475 (vqrdmladhxq_s8): Likewise.
17476 (vqrdmladhq_s8): Likewise.
17477 (vqdmlsdhxq_s8): Likewise.
17478 (vqdmlsdhq_s8): Likewise.
17479 (vqdmlahq_n_s8): Likewise.
17480 (vqdmladhxq_s8): Likewise.
17481 (vqdmladhq_s8): Likewise.
17482 (vmlsdavaxq_s8): Likewise.
17483 (vmlsdavaq_s8): Likewise.
17484 (vmlasq_n_s8): Likewise.
17485 (vmlaq_n_s8): Likewise.
17486 (vmladavaxq_s8): Likewise.
17487 (vmladavaq_s8): Likewise.
17488 (vsriq_n_s8): Likewise.
17489 (vsliq_n_s8): Likewise.
17490 (vpselq_u16): Likewise.
17491 (vpselq_s16): Likewise.
17492 (vrev64q_m_u16): Likewise.
17493 (vqrdmlashq_n_u16): Likewise.
17494 (vqrdmlahq_n_u16): Likewise.
17495 (vqdmlahq_n_u16): Likewise.
17496 (vmvnq_m_u16): Likewise.
17497 (vmlasq_n_u16): Likewise.
17498 (vmlaq_n_u16): Likewise.
17499 (vmladavq_p_u16): Likewise.
17500 (vmladavaq_u16): Likewise.
17501 (vminvq_p_u16): Likewise.
17502 (vmaxvq_p_u16): Likewise.
17503 (vdupq_m_n_u16): Likewise.
17504 (vcmpneq_m_u16): Likewise.
17505 (vcmpneq_m_n_u16): Likewise.
17506 (vcmphiq_m_u16): Likewise.
17507 (vcmphiq_m_n_u16): Likewise.
17508 (vcmpeqq_m_u16): Likewise.
17509 (vcmpeqq_m_n_u16): Likewise.
17510 (vcmpcsq_m_u16): Likewise.
17511 (vcmpcsq_m_n_u16): Likewise.
17512 (vclzq_m_u16): Likewise.
17513 (vaddvaq_p_u16): Likewise.
17514 (vsriq_n_u16): Likewise.
17515 (vsliq_n_u16): Likewise.
17516 (vshlq_m_r_u16): Likewise.
17517 (vrshlq_m_n_u16): Likewise.
17518 (vqshlq_m_r_u16): Likewise.
17519 (vqrshlq_m_n_u16): Likewise.
17520 (vminavq_p_s16): Likewise.
17521 (vminaq_m_s16): Likewise.
17522 (vmaxavq_p_s16): Likewise.
17523 (vmaxaq_m_s16): Likewise.
17524 (vcmpneq_m_s16): Likewise.
17525 (vcmpneq_m_n_s16): Likewise.
17526 (vcmpltq_m_s16): Likewise.
17527 (vcmpltq_m_n_s16): Likewise.
17528 (vcmpleq_m_s16): Likewise.
17529 (vcmpleq_m_n_s16): Likewise.
17530 (vcmpgtq_m_s16): Likewise.
17531 (vcmpgtq_m_n_s16): Likewise.
17532 (vcmpgeq_m_s16): Likewise.
17533 (vcmpgeq_m_n_s16): Likewise.
17534 (vcmpeqq_m_s16): Likewise.
17535 (vcmpeqq_m_n_s16): Likewise.
17536 (vshlq_m_r_s16): Likewise.
17537 (vrshlq_m_n_s16): Likewise.
17538 (vrev64q_m_s16): Likewise.
17539 (vqshlq_m_r_s16): Likewise.
17540 (vqrshlq_m_n_s16): Likewise.
17541 (vqnegq_m_s16): Likewise.
17542 (vqabsq_m_s16): Likewise.
17543 (vnegq_m_s16): Likewise.
17544 (vmvnq_m_s16): Likewise.
17545 (vmlsdavxq_p_s16): Likewise.
17546 (vmlsdavq_p_s16): Likewise.
17547 (vmladavxq_p_s16): Likewise.
17548 (vmladavq_p_s16): Likewise.
17549 (vminvq_p_s16): Likewise.
17550 (vmaxvq_p_s16): Likewise.
17551 (vdupq_m_n_s16): Likewise.
17552 (vclzq_m_s16): Likewise.
17553 (vclsq_m_s16): Likewise.
17554 (vaddvaq_p_s16): Likewise.
17555 (vabsq_m_s16): Likewise.
17556 (vqrdmlsdhxq_s16): Likewise.
17557 (vqrdmlsdhq_s16): Likewise.
17558 (vqrdmlashq_n_s16): Likewise.
17559 (vqrdmlahq_n_s16): Likewise.
17560 (vqrdmladhxq_s16): Likewise.
17561 (vqrdmladhq_s16): Likewise.
17562 (vqdmlsdhxq_s16): Likewise.
17563 (vqdmlsdhq_s16): Likewise.
17564 (vqdmlahq_n_s16): Likewise.
17565 (vqdmladhxq_s16): Likewise.
17566 (vqdmladhq_s16): Likewise.
17567 (vmlsdavaxq_s16): Likewise.
17568 (vmlsdavaq_s16): Likewise.
17569 (vmlasq_n_s16): Likewise.
17570 (vmlaq_n_s16): Likewise.
17571 (vmladavaxq_s16): Likewise.
17572 (vmladavaq_s16): Likewise.
17573 (vsriq_n_s16): Likewise.
17574 (vsliq_n_s16): Likewise.
17575 (vpselq_u32): Likewise.
17576 (vpselq_s32): Likewise.
17577 (vrev64q_m_u32): Likewise.
17578 (vqrdmlashq_n_u32): Likewise.
17579 (vqrdmlahq_n_u32): Likewise.
17580 (vqdmlahq_n_u32): Likewise.
17581 (vmvnq_m_u32): Likewise.
17582 (vmlasq_n_u32): Likewise.
17583 (vmlaq_n_u32): Likewise.
17584 (vmladavq_p_u32): Likewise.
17585 (vmladavaq_u32): Likewise.
17586 (vminvq_p_u32): Likewise.
17587 (vmaxvq_p_u32): Likewise.
17588 (vdupq_m_n_u32): Likewise.
17589 (vcmpneq_m_u32): Likewise.
17590 (vcmpneq_m_n_u32): Likewise.
17591 (vcmphiq_m_u32): Likewise.
17592 (vcmphiq_m_n_u32): Likewise.
17593 (vcmpeqq_m_u32): Likewise.
17594 (vcmpeqq_m_n_u32): Likewise.
17595 (vcmpcsq_m_u32): Likewise.
17596 (vcmpcsq_m_n_u32): Likewise.
17597 (vclzq_m_u32): Likewise.
17598 (vaddvaq_p_u32): Likewise.
17599 (vsriq_n_u32): Likewise.
17600 (vsliq_n_u32): Likewise.
17601 (vshlq_m_r_u32): Likewise.
17602 (vrshlq_m_n_u32): Likewise.
17603 (vqshlq_m_r_u32): Likewise.
17604 (vqrshlq_m_n_u32): Likewise.
17605 (vminavq_p_s32): Likewise.
17606 (vminaq_m_s32): Likewise.
17607 (vmaxavq_p_s32): Likewise.
17608 (vmaxaq_m_s32): Likewise.
17609 (vcmpneq_m_s32): Likewise.
17610 (vcmpneq_m_n_s32): Likewise.
17611 (vcmpltq_m_s32): Likewise.
17612 (vcmpltq_m_n_s32): Likewise.
17613 (vcmpleq_m_s32): Likewise.
17614 (vcmpleq_m_n_s32): Likewise.
17615 (vcmpgtq_m_s32): Likewise.
17616 (vcmpgtq_m_n_s32): Likewise.
17617 (vcmpgeq_m_s32): Likewise.
17618 (vcmpgeq_m_n_s32): Likewise.
17619 (vcmpeqq_m_s32): Likewise.
17620 (vcmpeqq_m_n_s32): Likewise.
17621 (vshlq_m_r_s32): Likewise.
17622 (vrshlq_m_n_s32): Likewise.
17623 (vrev64q_m_s32): Likewise.
17624 (vqshlq_m_r_s32): Likewise.
17625 (vqrshlq_m_n_s32): Likewise.
17626 (vqnegq_m_s32): Likewise.
17627 (vqabsq_m_s32): Likewise.
17628 (vnegq_m_s32): Likewise.
17629 (vmvnq_m_s32): Likewise.
17630 (vmlsdavxq_p_s32): Likewise.
17631 (vmlsdavq_p_s32): Likewise.
17632 (vmladavxq_p_s32): Likewise.
17633 (vmladavq_p_s32): Likewise.
17634 (vminvq_p_s32): Likewise.
17635 (vmaxvq_p_s32): Likewise.
17636 (vdupq_m_n_s32): Likewise.
17637 (vclzq_m_s32): Likewise.
17638 (vclsq_m_s32): Likewise.
17639 (vaddvaq_p_s32): Likewise.
17640 (vabsq_m_s32): Likewise.
17641 (vqrdmlsdhxq_s32): Likewise.
17642 (vqrdmlsdhq_s32): Likewise.
17643 (vqrdmlashq_n_s32): Likewise.
17644 (vqrdmlahq_n_s32): Likewise.
17645 (vqrdmladhxq_s32): Likewise.
17646 (vqrdmladhq_s32): Likewise.
17647 (vqdmlsdhxq_s32): Likewise.
17648 (vqdmlsdhq_s32): Likewise.
17649 (vqdmlahq_n_s32): Likewise.
17650 (vqdmladhxq_s32): Likewise.
17651 (vqdmladhq_s32): Likewise.
17652 (vmlsdavaxq_s32): Likewise.
17653 (vmlsdavaq_s32): Likewise.
17654 (vmlasq_n_s32): Likewise.
17655 (vmlaq_n_s32): Likewise.
17656 (vmladavaxq_s32): Likewise.
17657 (vmladavaq_s32): Likewise.
17658 (vsriq_n_s32): Likewise.
17659 (vsliq_n_s32): Likewise.
17660 (vpselq_u64): Likewise.
17661 (vpselq_s64): Likewise.
17662 (__arm_vpselq_u8): Define intrinsic.
17663 (__arm_vpselq_s8): Likewise.
17664 (__arm_vrev64q_m_u8): Likewise.
17665 (__arm_vqrdmlashq_n_u8): Likewise.
17666 (__arm_vqrdmlahq_n_u8): Likewise.
17667 (__arm_vqdmlahq_n_u8): Likewise.
17668 (__arm_vmvnq_m_u8): Likewise.
17669 (__arm_vmlasq_n_u8): Likewise.
17670 (__arm_vmlaq_n_u8): Likewise.
17671 (__arm_vmladavq_p_u8): Likewise.
17672 (__arm_vmladavaq_u8): Likewise.
17673 (__arm_vminvq_p_u8): Likewise.
17674 (__arm_vmaxvq_p_u8): Likewise.
17675 (__arm_vdupq_m_n_u8): Likewise.
17676 (__arm_vcmpneq_m_u8): Likewise.
17677 (__arm_vcmpneq_m_n_u8): Likewise.
17678 (__arm_vcmphiq_m_u8): Likewise.
17679 (__arm_vcmphiq_m_n_u8): Likewise.
17680 (__arm_vcmpeqq_m_u8): Likewise.
17681 (__arm_vcmpeqq_m_n_u8): Likewise.
17682 (__arm_vcmpcsq_m_u8): Likewise.
17683 (__arm_vcmpcsq_m_n_u8): Likewise.
17684 (__arm_vclzq_m_u8): Likewise.
17685 (__arm_vaddvaq_p_u8): Likewise.
17686 (__arm_vsriq_n_u8): Likewise.
17687 (__arm_vsliq_n_u8): Likewise.
17688 (__arm_vshlq_m_r_u8): Likewise.
17689 (__arm_vrshlq_m_n_u8): Likewise.
17690 (__arm_vqshlq_m_r_u8): Likewise.
17691 (__arm_vqrshlq_m_n_u8): Likewise.
17692 (__arm_vminavq_p_s8): Likewise.
17693 (__arm_vminaq_m_s8): Likewise.
17694 (__arm_vmaxavq_p_s8): Likewise.
17695 (__arm_vmaxaq_m_s8): Likewise.
17696 (__arm_vcmpneq_m_s8): Likewise.
17697 (__arm_vcmpneq_m_n_s8): Likewise.
17698 (__arm_vcmpltq_m_s8): Likewise.
17699 (__arm_vcmpltq_m_n_s8): Likewise.
17700 (__arm_vcmpleq_m_s8): Likewise.
17701 (__arm_vcmpleq_m_n_s8): Likewise.
17702 (__arm_vcmpgtq_m_s8): Likewise.
17703 (__arm_vcmpgtq_m_n_s8): Likewise.
17704 (__arm_vcmpgeq_m_s8): Likewise.
17705 (__arm_vcmpgeq_m_n_s8): Likewise.
17706 (__arm_vcmpeqq_m_s8): Likewise.
17707 (__arm_vcmpeqq_m_n_s8): Likewise.
17708 (__arm_vshlq_m_r_s8): Likewise.
17709 (__arm_vrshlq_m_n_s8): Likewise.
17710 (__arm_vrev64q_m_s8): Likewise.
17711 (__arm_vqshlq_m_r_s8): Likewise.
17712 (__arm_vqrshlq_m_n_s8): Likewise.
17713 (__arm_vqnegq_m_s8): Likewise.
17714 (__arm_vqabsq_m_s8): Likewise.
17715 (__arm_vnegq_m_s8): Likewise.
17716 (__arm_vmvnq_m_s8): Likewise.
17717 (__arm_vmlsdavxq_p_s8): Likewise.
17718 (__arm_vmlsdavq_p_s8): Likewise.
17719 (__arm_vmladavxq_p_s8): Likewise.
17720 (__arm_vmladavq_p_s8): Likewise.
17721 (__arm_vminvq_p_s8): Likewise.
17722 (__arm_vmaxvq_p_s8): Likewise.
17723 (__arm_vdupq_m_n_s8): Likewise.
17724 (__arm_vclzq_m_s8): Likewise.
17725 (__arm_vclsq_m_s8): Likewise.
17726 (__arm_vaddvaq_p_s8): Likewise.
17727 (__arm_vabsq_m_s8): Likewise.
17728 (__arm_vqrdmlsdhxq_s8): Likewise.
17729 (__arm_vqrdmlsdhq_s8): Likewise.
17730 (__arm_vqrdmlashq_n_s8): Likewise.
17731 (__arm_vqrdmlahq_n_s8): Likewise.
17732 (__arm_vqrdmladhxq_s8): Likewise.
17733 (__arm_vqrdmladhq_s8): Likewise.
17734 (__arm_vqdmlsdhxq_s8): Likewise.
17735 (__arm_vqdmlsdhq_s8): Likewise.
17736 (__arm_vqdmlahq_n_s8): Likewise.
17737 (__arm_vqdmladhxq_s8): Likewise.
17738 (__arm_vqdmladhq_s8): Likewise.
17739 (__arm_vmlsdavaxq_s8): Likewise.
17740 (__arm_vmlsdavaq_s8): Likewise.
17741 (__arm_vmlasq_n_s8): Likewise.
17742 (__arm_vmlaq_n_s8): Likewise.
17743 (__arm_vmladavaxq_s8): Likewise.
17744 (__arm_vmladavaq_s8): Likewise.
17745 (__arm_vsriq_n_s8): Likewise.
17746 (__arm_vsliq_n_s8): Likewise.
17747 (__arm_vpselq_u16): Likewise.
17748 (__arm_vpselq_s16): Likewise.
17749 (__arm_vrev64q_m_u16): Likewise.
17750 (__arm_vqrdmlashq_n_u16): Likewise.
17751 (__arm_vqrdmlahq_n_u16): Likewise.
17752 (__arm_vqdmlahq_n_u16): Likewise.
17753 (__arm_vmvnq_m_u16): Likewise.
17754 (__arm_vmlasq_n_u16): Likewise.
17755 (__arm_vmlaq_n_u16): Likewise.
17756 (__arm_vmladavq_p_u16): Likewise.
17757 (__arm_vmladavaq_u16): Likewise.
17758 (__arm_vminvq_p_u16): Likewise.
17759 (__arm_vmaxvq_p_u16): Likewise.
17760 (__arm_vdupq_m_n_u16): Likewise.
17761 (__arm_vcmpneq_m_u16): Likewise.
17762 (__arm_vcmpneq_m_n_u16): Likewise.
17763 (__arm_vcmphiq_m_u16): Likewise.
17764 (__arm_vcmphiq_m_n_u16): Likewise.
17765 (__arm_vcmpeqq_m_u16): Likewise.
17766 (__arm_vcmpeqq_m_n_u16): Likewise.
17767 (__arm_vcmpcsq_m_u16): Likewise.
17768 (__arm_vcmpcsq_m_n_u16): Likewise.
17769 (__arm_vclzq_m_u16): Likewise.
17770 (__arm_vaddvaq_p_u16): Likewise.
17771 (__arm_vsriq_n_u16): Likewise.
17772 (__arm_vsliq_n_u16): Likewise.
17773 (__arm_vshlq_m_r_u16): Likewise.
17774 (__arm_vrshlq_m_n_u16): Likewise.
17775 (__arm_vqshlq_m_r_u16): Likewise.
17776 (__arm_vqrshlq_m_n_u16): Likewise.
17777 (__arm_vminavq_p_s16): Likewise.
17778 (__arm_vminaq_m_s16): Likewise.
17779 (__arm_vmaxavq_p_s16): Likewise.
17780 (__arm_vmaxaq_m_s16): Likewise.
17781 (__arm_vcmpneq_m_s16): Likewise.
17782 (__arm_vcmpneq_m_n_s16): Likewise.
17783 (__arm_vcmpltq_m_s16): Likewise.
17784 (__arm_vcmpltq_m_n_s16): Likewise.
17785 (__arm_vcmpleq_m_s16): Likewise.
17786 (__arm_vcmpleq_m_n_s16): Likewise.
17787 (__arm_vcmpgtq_m_s16): Likewise.
17788 (__arm_vcmpgtq_m_n_s16): Likewise.
17789 (__arm_vcmpgeq_m_s16): Likewise.
17790 (__arm_vcmpgeq_m_n_s16): Likewise.
17791 (__arm_vcmpeqq_m_s16): Likewise.
17792 (__arm_vcmpeqq_m_n_s16): Likewise.
17793 (__arm_vshlq_m_r_s16): Likewise.
17794 (__arm_vrshlq_m_n_s16): Likewise.
17795 (__arm_vrev64q_m_s16): Likewise.
17796 (__arm_vqshlq_m_r_s16): Likewise.
17797 (__arm_vqrshlq_m_n_s16): Likewise.
17798 (__arm_vqnegq_m_s16): Likewise.
17799 (__arm_vqabsq_m_s16): Likewise.
17800 (__arm_vnegq_m_s16): Likewise.
17801 (__arm_vmvnq_m_s16): Likewise.
17802 (__arm_vmlsdavxq_p_s16): Likewise.
17803 (__arm_vmlsdavq_p_s16): Likewise.
17804 (__arm_vmladavxq_p_s16): Likewise.
17805 (__arm_vmladavq_p_s16): Likewise.
17806 (__arm_vminvq_p_s16): Likewise.
17807 (__arm_vmaxvq_p_s16): Likewise.
17808 (__arm_vdupq_m_n_s16): Likewise.
17809 (__arm_vclzq_m_s16): Likewise.
17810 (__arm_vclsq_m_s16): Likewise.
17811 (__arm_vaddvaq_p_s16): Likewise.
17812 (__arm_vabsq_m_s16): Likewise.
17813 (__arm_vqrdmlsdhxq_s16): Likewise.
17814 (__arm_vqrdmlsdhq_s16): Likewise.
17815 (__arm_vqrdmlashq_n_s16): Likewise.
17816 (__arm_vqrdmlahq_n_s16): Likewise.
17817 (__arm_vqrdmladhxq_s16): Likewise.
17818 (__arm_vqrdmladhq_s16): Likewise.
17819 (__arm_vqdmlsdhxq_s16): Likewise.
17820 (__arm_vqdmlsdhq_s16): Likewise.
17821 (__arm_vqdmlahq_n_s16): Likewise.
17822 (__arm_vqdmladhxq_s16): Likewise.
17823 (__arm_vqdmladhq_s16): Likewise.
17824 (__arm_vmlsdavaxq_s16): Likewise.
17825 (__arm_vmlsdavaq_s16): Likewise.
17826 (__arm_vmlasq_n_s16): Likewise.
17827 (__arm_vmlaq_n_s16): Likewise.
17828 (__arm_vmladavaxq_s16): Likewise.
17829 (__arm_vmladavaq_s16): Likewise.
17830 (__arm_vsriq_n_s16): Likewise.
17831 (__arm_vsliq_n_s16): Likewise.
17832 (__arm_vpselq_u32): Likewise.
17833 (__arm_vpselq_s32): Likewise.
17834 (__arm_vrev64q_m_u32): Likewise.
17835 (__arm_vqrdmlashq_n_u32): Likewise.
17836 (__arm_vqrdmlahq_n_u32): Likewise.
17837 (__arm_vqdmlahq_n_u32): Likewise.
17838 (__arm_vmvnq_m_u32): Likewise.
17839 (__arm_vmlasq_n_u32): Likewise.
17840 (__arm_vmlaq_n_u32): Likewise.
17841 (__arm_vmladavq_p_u32): Likewise.
17842 (__arm_vmladavaq_u32): Likewise.
17843 (__arm_vminvq_p_u32): Likewise.
17844 (__arm_vmaxvq_p_u32): Likewise.
17845 (__arm_vdupq_m_n_u32): Likewise.
17846 (__arm_vcmpneq_m_u32): Likewise.
17847 (__arm_vcmpneq_m_n_u32): Likewise.
17848 (__arm_vcmphiq_m_u32): Likewise.
17849 (__arm_vcmphiq_m_n_u32): Likewise.
17850 (__arm_vcmpeqq_m_u32): Likewise.
17851 (__arm_vcmpeqq_m_n_u32): Likewise.
17852 (__arm_vcmpcsq_m_u32): Likewise.
17853 (__arm_vcmpcsq_m_n_u32): Likewise.
17854 (__arm_vclzq_m_u32): Likewise.
17855 (__arm_vaddvaq_p_u32): Likewise.
17856 (__arm_vsriq_n_u32): Likewise.
17857 (__arm_vsliq_n_u32): Likewise.
17858 (__arm_vshlq_m_r_u32): Likewise.
17859 (__arm_vrshlq_m_n_u32): Likewise.
17860 (__arm_vqshlq_m_r_u32): Likewise.
17861 (__arm_vqrshlq_m_n_u32): Likewise.
17862 (__arm_vminavq_p_s32): Likewise.
17863 (__arm_vminaq_m_s32): Likewise.
17864 (__arm_vmaxavq_p_s32): Likewise.
17865 (__arm_vmaxaq_m_s32): Likewise.
17866 (__arm_vcmpneq_m_s32): Likewise.
17867 (__arm_vcmpneq_m_n_s32): Likewise.
17868 (__arm_vcmpltq_m_s32): Likewise.
17869 (__arm_vcmpltq_m_n_s32): Likewise.
17870 (__arm_vcmpleq_m_s32): Likewise.
17871 (__arm_vcmpleq_m_n_s32): Likewise.
17872 (__arm_vcmpgtq_m_s32): Likewise.
17873 (__arm_vcmpgtq_m_n_s32): Likewise.
17874 (__arm_vcmpgeq_m_s32): Likewise.
17875 (__arm_vcmpgeq_m_n_s32): Likewise.
17876 (__arm_vcmpeqq_m_s32): Likewise.
17877 (__arm_vcmpeqq_m_n_s32): Likewise.
17878 (__arm_vshlq_m_r_s32): Likewise.
17879 (__arm_vrshlq_m_n_s32): Likewise.
17880 (__arm_vrev64q_m_s32): Likewise.
17881 (__arm_vqshlq_m_r_s32): Likewise.
17882 (__arm_vqrshlq_m_n_s32): Likewise.
17883 (__arm_vqnegq_m_s32): Likewise.
17884 (__arm_vqabsq_m_s32): Likewise.
17885 (__arm_vnegq_m_s32): Likewise.
17886 (__arm_vmvnq_m_s32): Likewise.
17887 (__arm_vmlsdavxq_p_s32): Likewise.
17888 (__arm_vmlsdavq_p_s32): Likewise.
17889 (__arm_vmladavxq_p_s32): Likewise.
17890 (__arm_vmladavq_p_s32): Likewise.
17891 (__arm_vminvq_p_s32): Likewise.
17892 (__arm_vmaxvq_p_s32): Likewise.
17893 (__arm_vdupq_m_n_s32): Likewise.
17894 (__arm_vclzq_m_s32): Likewise.
17895 (__arm_vclsq_m_s32): Likewise.
17896 (__arm_vaddvaq_p_s32): Likewise.
17897 (__arm_vabsq_m_s32): Likewise.
17898 (__arm_vqrdmlsdhxq_s32): Likewise.
17899 (__arm_vqrdmlsdhq_s32): Likewise.
17900 (__arm_vqrdmlashq_n_s32): Likewise.
17901 (__arm_vqrdmlahq_n_s32): Likewise.
17902 (__arm_vqrdmladhxq_s32): Likewise.
17903 (__arm_vqrdmladhq_s32): Likewise.
17904 (__arm_vqdmlsdhxq_s32): Likewise.
17905 (__arm_vqdmlsdhq_s32): Likewise.
17906 (__arm_vqdmlahq_n_s32): Likewise.
17907 (__arm_vqdmladhxq_s32): Likewise.
17908 (__arm_vqdmladhq_s32): Likewise.
17909 (__arm_vmlsdavaxq_s32): Likewise.
17910 (__arm_vmlsdavaq_s32): Likewise.
17911 (__arm_vmlasq_n_s32): Likewise.
17912 (__arm_vmlaq_n_s32): Likewise.
17913 (__arm_vmladavaxq_s32): Likewise.
17914 (__arm_vmladavaq_s32): Likewise.
17915 (__arm_vsriq_n_s32): Likewise.
17916 (__arm_vsliq_n_s32): Likewise.
17917 (__arm_vpselq_u64): Likewise.
17918 (__arm_vpselq_s64): Likewise.
17919 (vcmpneq_m_n): Define polymorphic variant.
17920 (vcmpneq_m): Likewise.
17921 (vqrdmlsdhq): Likewise.
17922 (vqrdmlsdhxq): Likewise.
17923 (vqrshlq_m_n): Likewise.
17924 (vqshlq_m_r): Likewise.
17925 (vrev64q_m): Likewise.
17926 (vrshlq_m_n): Likewise.
17927 (vshlq_m_r): Likewise.
17928 (vsliq_n): Likewise.
17929 (vsriq_n): Likewise.
17930 (vqrdmlashq_n): Likewise.
17931 (vqrdmlahq): Likewise.
17932 (vqrdmladhxq): Likewise.
17933 (vqrdmladhq): Likewise.
17934 (vqnegq_m): Likewise.
17935 (vqdmlsdhxq): Likewise.
17936 (vabsq_m): Likewise.
17937 (vclsq_m): Likewise.
17938 (vclzq_m): Likewise.
17939 (vcmpgeq_m): Likewise.
17940 (vcmpgeq_m_n): Likewise.
17941 (vdupq_m_n): Likewise.
17942 (vmaxaq_m): Likewise.
17943 (vmlaq_n): Likewise.
17944 (vmlasq_n): Likewise.
17945 (vmvnq_m): Likewise.
17946 (vnegq_m): Likewise.
17947 (vpselq): Likewise.
17948 (vqdmlahq_n): Likewise.
17949 (vqrdmlahq_n): Likewise.
17950 (vqdmlsdhq): Likewise.
17951 (vqdmladhq): Likewise.
17952 (vqabsq_m): Likewise.
17953 (vminaq_m): Likewise.
17954 (vrmlaldavhaq): Likewise.
17955 (vmlsdavxq_p): Likewise.
17956 (vmlsdavq_p): Likewise.
17957 (vmlsdavaxq): Likewise.
17958 (vmlsdavaq): Likewise.
17959 (vaddvaq_p): Likewise.
17960 (vcmpcsq_m_n): Likewise.
17961 (vcmpcsq_m): Likewise.
17962 (vcmpeqq_m_n): Likewise.
17963 (vcmpeqq_m): Likewise.
17964 (vmladavxq_p): Likewise.
17965 (vmladavq_p): Likewise.
17966 (vmladavaxq): Likewise.
17967 (vmladavaq): Likewise.
17968 (vminvq_p): Likewise.
17969 (vminavq_p): Likewise.
17970 (vmaxvq_p): Likewise.
17971 (vmaxavq_p): Likewise.
17972 (vcmpltq_m_n): Likewise.
17973 (vcmpltq_m): Likewise.
17974 (vcmpleq_m): Likewise.
17975 (vcmpleq_m_n): Likewise.
17976 (vcmphiq_m_n): Likewise.
17977 (vcmphiq_m): Likewise.
17978 (vcmpgtq_m_n): Likewise.
17979 (vcmpgtq_m): Likewise.
17980 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
17982 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
17983 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
17984 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
17985 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
17986 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
17987 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
17988 * config/arm/constraints.md (Rc): Define constraint to check constant is
17989 in the range of 0 to 15.
17990 (Re): Define constraint to check constant is in the range of 0 to 31.
17991 * config/arm/mve.md (VADDVAQ_P): Define iterator.
17992 (VCLZQ_M): Likewise.
17993 (VCMPEQQ_M_N): Likewise.
17994 (VCMPEQQ_M): Likewise.
17995 (VCMPNEQ_M_N): Likewise.
17996 (VCMPNEQ_M): Likewise.
17997 (VDUPQ_M_N): Likewise.
17998 (VMAXVQ_P): Likewise.
17999 (VMINVQ_P): Likewise.
18000 (VMLADAVAQ): Likewise.
18001 (VMLADAVQ_P): Likewise.
18002 (VMLAQ_N): Likewise.
18003 (VMLASQ_N): Likewise.
18004 (VMVNQ_M): Likewise.
18005 (VPSELQ): Likewise.
18006 (VQDMLAHQ_N): Likewise.
18007 (VQRDMLAHQ_N): Likewise.
18008 (VQRDMLASHQ_N): Likewise.
18009 (VQRSHLQ_M_N): Likewise.
18010 (VQSHLQ_M_R): Likewise.
18011 (VREV64Q_M): Likewise.
18012 (VRSHLQ_M_N): Likewise.
18013 (VSHLQ_M_R): Likewise.
18014 (VSLIQ_N): Likewise.
18015 (VSRIQ_N): Likewise.
18016 (mve_vabsq_m_s<mode>): Define RTL pattern.
18017 (mve_vaddvaq_p_<supf><mode>): Likewise.
18018 (mve_vclsq_m_s<mode>): Likewise.
18019 (mve_vclzq_m_<supf><mode>): Likewise.
18020 (mve_vcmpcsq_m_n_u<mode>): Likewise.
18021 (mve_vcmpcsq_m_u<mode>): Likewise.
18022 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
18023 (mve_vcmpeqq_m_<supf><mode>): Likewise.
18024 (mve_vcmpgeq_m_n_s<mode>): Likewise.
18025 (mve_vcmpgeq_m_s<mode>): Likewise.
18026 (mve_vcmpgtq_m_n_s<mode>): Likewise.
18027 (mve_vcmpgtq_m_s<mode>): Likewise.
18028 (mve_vcmphiq_m_n_u<mode>): Likewise.
18029 (mve_vcmphiq_m_u<mode>): Likewise.
18030 (mve_vcmpleq_m_n_s<mode>): Likewise.
18031 (mve_vcmpleq_m_s<mode>): Likewise.
18032 (mve_vcmpltq_m_n_s<mode>): Likewise.
18033 (mve_vcmpltq_m_s<mode>): Likewise.
18034 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
18035 (mve_vcmpneq_m_<supf><mode>): Likewise.
18036 (mve_vdupq_m_n_<supf><mode>): Likewise.
18037 (mve_vmaxaq_m_s<mode>): Likewise.
18038 (mve_vmaxavq_p_s<mode>): Likewise.
18039 (mve_vmaxvq_p_<supf><mode>): Likewise.
18040 (mve_vminaq_m_s<mode>): Likewise.
18041 (mve_vminavq_p_s<mode>): Likewise.
18042 (mve_vminvq_p_<supf><mode>): Likewise.
18043 (mve_vmladavaq_<supf><mode>): Likewise.
18044 (mve_vmladavq_p_<supf><mode>): Likewise.
18045 (mve_vmladavxq_p_s<mode>): Likewise.
18046 (mve_vmlaq_n_<supf><mode>): Likewise.
18047 (mve_vmlasq_n_<supf><mode>): Likewise.
18048 (mve_vmlsdavq_p_s<mode>): Likewise.
18049 (mve_vmlsdavxq_p_s<mode>): Likewise.
18050 (mve_vmvnq_m_<supf><mode>): Likewise.
18051 (mve_vnegq_m_s<mode>): Likewise.
18052 (mve_vpselq_<supf><mode>): Likewise.
18053 (mve_vqabsq_m_s<mode>): Likewise.
18054 (mve_vqdmlahq_n_<supf><mode>): Likewise.
18055 (mve_vqnegq_m_s<mode>): Likewise.
18056 (mve_vqrdmladhq_s<mode>): Likewise.
18057 (mve_vqrdmladhxq_s<mode>): Likewise.
18058 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
18059 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
18060 (mve_vqrdmlsdhq_s<mode>): Likewise.
18061 (mve_vqrdmlsdhxq_s<mode>): Likewise.
18062 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
18063 (mve_vqshlq_m_r_<supf><mode>): Likewise.
18064 (mve_vrev64q_m_<supf><mode>): Likewise.
18065 (mve_vrshlq_m_n_<supf><mode>): Likewise.
18066 (mve_vshlq_m_r_<supf><mode>): Likewise.
18067 (mve_vsliq_n_<supf><mode>): Likewise.
18068 (mve_vsriq_n_<supf><mode>): Likewise.
18069 (mve_vqdmlsdhxq_s<mode>): Likewise.
18070 (mve_vqdmlsdhq_s<mode>): Likewise.
18071 (mve_vqdmladhxq_s<mode>): Likewise.
18072 (mve_vqdmladhq_s<mode>): Likewise.
18073 (mve_vmlsdavaxq_s<mode>): Likewise.
18074 (mve_vmlsdavaq_s<mode>): Likewise.
18075 (mve_vmladavaxq_s<mode>): Likewise.
18076 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
18077 matching constraint Rc.
18078 (mve_imm_31): Define predicate to check the matching constraint Re.
18080 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
18082 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
18083 (vec_cmp<mode>di_dup): Likewise.
18084 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
18086 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
18088 * config/gcn/gcn-valu.md (COND_MODE): Delete.
18089 (COND_INT_MODE): Delete.
18090 (cond_op): Add "mult".
18091 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
18092 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
18094 2020-03-18 Richard Biener <rguenther@suse.de>
18096 PR middle-end/94206
18097 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
18098 partial int modes or not mode-precision integer types for
18101 2020-03-18 Jakub Jelinek <jakub@redhat.com>
18103 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
18105 * config/arc/arc.c (frame_stack_add): Likewise.
18106 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
18108 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
18109 * tree-ssa-strlen.h (handle_printf_call): Likewise.
18110 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
18111 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
18113 2020-03-18 Duan bo <duanbo3@huawei.com>
18116 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
18117 (@ldr_got_tiny_<mode>): New pattern.
18118 (ldr_got_tiny_sidi): Likewise.
18119 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
18120 them to handle SYMBOL_TINY_GOT for ILP32.
18122 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
18124 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
18125 call-preserved for SVE PCS functions.
18126 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
18127 Optimize the case in which there are no following vector save slots.
18129 2020-03-18 Richard Biener <rguenther@suse.de>
18131 PR middle-end/94188
18132 * fold-const.c (build_fold_addr_expr): Convert address to
18134 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
18135 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
18136 to build the ADDR_EXPR which we don't really want to simplify.
18137 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
18138 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
18139 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
18140 (simplify_builtin_call): Strip useless type conversions.
18141 * tree-ssa-strlen.c (new_strinfo): Likewise.
18143 2020-03-17 Alexey Neyman <stilor@att.net>
18146 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
18147 the debug level is terse and the declaration is public. Do not
18148 generate type info.
18149 (dwarf2out_decl): Same.
18150 (add_type_attribute): Return immediately if debug level is
18153 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
18155 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
18157 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18158 Mihail Ionescu <mihail.ionescu@arm.com>
18159 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18161 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
18162 Define qualifier for ternary operands.
18163 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
18164 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18165 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18166 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
18167 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
18168 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
18169 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18170 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
18171 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18172 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
18173 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
18174 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
18175 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
18176 * config/arm/arm_mve.h (vabavq_s8): Define macro.
18177 (vabavq_s16): Likewise.
18178 (vabavq_s32): Likewise.
18179 (vbicq_m_n_s16): Likewise.
18180 (vbicq_m_n_s32): Likewise.
18181 (vbicq_m_n_u16): Likewise.
18182 (vbicq_m_n_u32): Likewise.
18183 (vcmpeqq_m_f16): Likewise.
18184 (vcmpeqq_m_f32): Likewise.
18185 (vcvtaq_m_s16_f16): Likewise.
18186 (vcvtaq_m_u16_f16): Likewise.
18187 (vcvtaq_m_s32_f32): Likewise.
18188 (vcvtaq_m_u32_f32): Likewise.
18189 (vcvtq_m_f16_s16): Likewise.
18190 (vcvtq_m_f16_u16): Likewise.
18191 (vcvtq_m_f32_s32): Likewise.
18192 (vcvtq_m_f32_u32): Likewise.
18193 (vqrshrnbq_n_s16): Likewise.
18194 (vqrshrnbq_n_u16): Likewise.
18195 (vqrshrnbq_n_s32): Likewise.
18196 (vqrshrnbq_n_u32): Likewise.
18197 (vqrshrunbq_n_s16): Likewise.
18198 (vqrshrunbq_n_s32): Likewise.
18199 (vrmlaldavhaq_s32): Likewise.
18200 (vrmlaldavhaq_u32): Likewise.
18201 (vshlcq_s8): Likewise.
18202 (vshlcq_u8): Likewise.
18203 (vshlcq_s16): Likewise.
18204 (vshlcq_u16): Likewise.
18205 (vshlcq_s32): Likewise.
18206 (vshlcq_u32): Likewise.
18207 (vabavq_u8): Likewise.
18208 (vabavq_u16): Likewise.
18209 (vabavq_u32): Likewise.
18210 (__arm_vabavq_s8): Define intrinsic.
18211 (__arm_vabavq_s16): Likewise.
18212 (__arm_vabavq_s32): Likewise.
18213 (__arm_vabavq_u8): Likewise.
18214 (__arm_vabavq_u16): Likewise.
18215 (__arm_vabavq_u32): Likewise.
18216 (__arm_vbicq_m_n_s16): Likewise.
18217 (__arm_vbicq_m_n_s32): Likewise.
18218 (__arm_vbicq_m_n_u16): Likewise.
18219 (__arm_vbicq_m_n_u32): Likewise.
18220 (__arm_vqrshrnbq_n_s16): Likewise.
18221 (__arm_vqrshrnbq_n_u16): Likewise.
18222 (__arm_vqrshrnbq_n_s32): Likewise.
18223 (__arm_vqrshrnbq_n_u32): Likewise.
18224 (__arm_vqrshrunbq_n_s16): Likewise.
18225 (__arm_vqrshrunbq_n_s32): Likewise.
18226 (__arm_vrmlaldavhaq_s32): Likewise.
18227 (__arm_vrmlaldavhaq_u32): Likewise.
18228 (__arm_vshlcq_s8): Likewise.
18229 (__arm_vshlcq_u8): Likewise.
18230 (__arm_vshlcq_s16): Likewise.
18231 (__arm_vshlcq_u16): Likewise.
18232 (__arm_vshlcq_s32): Likewise.
18233 (__arm_vshlcq_u32): Likewise.
18234 (__arm_vcmpeqq_m_f16): Likewise.
18235 (__arm_vcmpeqq_m_f32): Likewise.
18236 (__arm_vcvtaq_m_s16_f16): Likewise.
18237 (__arm_vcvtaq_m_u16_f16): Likewise.
18238 (__arm_vcvtaq_m_s32_f32): Likewise.
18239 (__arm_vcvtaq_m_u32_f32): Likewise.
18240 (__arm_vcvtq_m_f16_s16): Likewise.
18241 (__arm_vcvtq_m_f16_u16): Likewise.
18242 (__arm_vcvtq_m_f32_s32): Likewise.
18243 (__arm_vcvtq_m_f32_u32): Likewise.
18244 (vcvtaq_m): Define polymorphic variant.
18245 (vcvtq_m): Likewise.
18246 (vabavq): Likewise.
18247 (vshlcq): Likewise.
18248 (vbicq_m_n): Likewise.
18249 (vqrshrnbq_n): Likewise.
18250 (vqrshrunbq_n): Likewise.
18251 * config/arm/arm_mve_builtins.def
18252 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
18253 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
18254 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18255 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
18256 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
18257 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
18258 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
18259 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18260 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
18261 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
18262 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
18263 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
18264 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
18265 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
18266 * config/arm/mve.md (VBICQ_M_N): Define iterator.
18267 (VCVTAQ_M): Likewise.
18268 (VCVTQ_M_TO_F): Likewise.
18269 (VQRSHRNBQ_N): Likewise.
18270 (VABAVQ): Likewise.
18271 (VSHLCQ): Likewise.
18272 (VRMLALDAVHAQ): Likewise.
18273 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
18274 (mve_vcmpeqq_m_f<mode>): Likewise.
18275 (mve_vcvtaq_m_<supf><mode>): Likewise.
18276 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
18277 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
18278 (mve_vqrshrunbq_n_s<mode>): Likewise.
18279 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
18280 (mve_vabavq_<supf><mode>): Likewise.
18281 (mve_vshlcq_<supf><mode>): Likewise.
18282 (mve_vshlcq_<supf><mode>): Likewise.
18283 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
18284 (mve_vshlcq_carry_<supf><mode>): Likewise.
18286 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18287 Mihail Ionescu <mihail.ionescu@arm.com>
18288 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18290 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
18291 (vqmovnbq_u16): Likewise.
18292 (vmulltq_poly_p8): Likewise.
18293 (vmullbq_poly_p8): Likewise.
18294 (vmovntq_u16): Likewise.
18295 (vmovnbq_u16): Likewise.
18296 (vmlaldavxq_u16): Likewise.
18297 (vmlaldavq_u16): Likewise.
18298 (vqmovuntq_s16): Likewise.
18299 (vqmovunbq_s16): Likewise.
18300 (vshlltq_n_u8): Likewise.
18301 (vshllbq_n_u8): Likewise.
18302 (vorrq_n_u16): Likewise.
18303 (vbicq_n_u16): Likewise.
18304 (vcmpneq_n_f16): Likewise.
18305 (vcmpneq_f16): Likewise.
18306 (vcmpltq_n_f16): Likewise.
18307 (vcmpltq_f16): Likewise.
18308 (vcmpleq_n_f16): Likewise.
18309 (vcmpleq_f16): Likewise.
18310 (vcmpgtq_n_f16): Likewise.
18311 (vcmpgtq_f16): Likewise.
18312 (vcmpgeq_n_f16): Likewise.
18313 (vcmpgeq_f16): Likewise.
18314 (vcmpeqq_n_f16): Likewise.
18315 (vcmpeqq_f16): Likewise.
18316 (vsubq_f16): Likewise.
18317 (vqmovntq_s16): Likewise.
18318 (vqmovnbq_s16): Likewise.
18319 (vqdmulltq_s16): Likewise.
18320 (vqdmulltq_n_s16): Likewise.
18321 (vqdmullbq_s16): Likewise.
18322 (vqdmullbq_n_s16): Likewise.
18323 (vorrq_f16): Likewise.
18324 (vornq_f16): Likewise.
18325 (vmulq_n_f16): Likewise.
18326 (vmulq_f16): Likewise.
18327 (vmovntq_s16): Likewise.
18328 (vmovnbq_s16): Likewise.
18329 (vmlsldavxq_s16): Likewise.
18330 (vmlsldavq_s16): Likewise.
18331 (vmlaldavxq_s16): Likewise.
18332 (vmlaldavq_s16): Likewise.
18333 (vminnmvq_f16): Likewise.
18334 (vminnmq_f16): Likewise.
18335 (vminnmavq_f16): Likewise.
18336 (vminnmaq_f16): Likewise.
18337 (vmaxnmvq_f16): Likewise.
18338 (vmaxnmq_f16): Likewise.
18339 (vmaxnmavq_f16): Likewise.
18340 (vmaxnmaq_f16): Likewise.
18341 (veorq_f16): Likewise.
18342 (vcmulq_rot90_f16): Likewise.
18343 (vcmulq_rot270_f16): Likewise.
18344 (vcmulq_rot180_f16): Likewise.
18345 (vcmulq_f16): Likewise.
18346 (vcaddq_rot90_f16): Likewise.
18347 (vcaddq_rot270_f16): Likewise.
18348 (vbicq_f16): Likewise.
18349 (vandq_f16): Likewise.
18350 (vaddq_n_f16): Likewise.
18351 (vabdq_f16): Likewise.
18352 (vshlltq_n_s8): Likewise.
18353 (vshllbq_n_s8): Likewise.
18354 (vorrq_n_s16): Likewise.
18355 (vbicq_n_s16): Likewise.
18356 (vqmovntq_u32): Likewise.
18357 (vqmovnbq_u32): Likewise.
18358 (vmulltq_poly_p16): Likewise.
18359 (vmullbq_poly_p16): Likewise.
18360 (vmovntq_u32): Likewise.
18361 (vmovnbq_u32): Likewise.
18362 (vmlaldavxq_u32): Likewise.
18363 (vmlaldavq_u32): Likewise.
18364 (vqmovuntq_s32): Likewise.
18365 (vqmovunbq_s32): Likewise.
18366 (vshlltq_n_u16): Likewise.
18367 (vshllbq_n_u16): Likewise.
18368 (vorrq_n_u32): Likewise.
18369 (vbicq_n_u32): Likewise.
18370 (vcmpneq_n_f32): Likewise.
18371 (vcmpneq_f32): Likewise.
18372 (vcmpltq_n_f32): Likewise.
18373 (vcmpltq_f32): Likewise.
18374 (vcmpleq_n_f32): Likewise.
18375 (vcmpleq_f32): Likewise.
18376 (vcmpgtq_n_f32): Likewise.
18377 (vcmpgtq_f32): Likewise.
18378 (vcmpgeq_n_f32): Likewise.
18379 (vcmpgeq_f32): Likewise.
18380 (vcmpeqq_n_f32): Likewise.
18381 (vcmpeqq_f32): Likewise.
18382 (vsubq_f32): Likewise.
18383 (vqmovntq_s32): Likewise.
18384 (vqmovnbq_s32): Likewise.
18385 (vqdmulltq_s32): Likewise.
18386 (vqdmulltq_n_s32): Likewise.
18387 (vqdmullbq_s32): Likewise.
18388 (vqdmullbq_n_s32): Likewise.
18389 (vorrq_f32): Likewise.
18390 (vornq_f32): Likewise.
18391 (vmulq_n_f32): Likewise.
18392 (vmulq_f32): Likewise.
18393 (vmovntq_s32): Likewise.
18394 (vmovnbq_s32): Likewise.
18395 (vmlsldavxq_s32): Likewise.
18396 (vmlsldavq_s32): Likewise.
18397 (vmlaldavxq_s32): Likewise.
18398 (vmlaldavq_s32): Likewise.
18399 (vminnmvq_f32): Likewise.
18400 (vminnmq_f32): Likewise.
18401 (vminnmavq_f32): Likewise.
18402 (vminnmaq_f32): Likewise.
18403 (vmaxnmvq_f32): Likewise.
18404 (vmaxnmq_f32): Likewise.
18405 (vmaxnmavq_f32): Likewise.
18406 (vmaxnmaq_f32): Likewise.
18407 (veorq_f32): Likewise.
18408 (vcmulq_rot90_f32): Likewise.
18409 (vcmulq_rot270_f32): Likewise.
18410 (vcmulq_rot180_f32): Likewise.
18411 (vcmulq_f32): Likewise.
18412 (vcaddq_rot90_f32): Likewise.
18413 (vcaddq_rot270_f32): Likewise.
18414 (vbicq_f32): Likewise.
18415 (vandq_f32): Likewise.
18416 (vaddq_n_f32): Likewise.
18417 (vabdq_f32): Likewise.
18418 (vshlltq_n_s16): Likewise.
18419 (vshllbq_n_s16): Likewise.
18420 (vorrq_n_s32): Likewise.
18421 (vbicq_n_s32): Likewise.
18422 (vrmlaldavhq_u32): Likewise.
18423 (vctp8q_m): Likewise.
18424 (vctp64q_m): Likewise.
18425 (vctp32q_m): Likewise.
18426 (vctp16q_m): Likewise.
18427 (vaddlvaq_u32): Likewise.
18428 (vrmlsldavhxq_s32): Likewise.
18429 (vrmlsldavhq_s32): Likewise.
18430 (vrmlaldavhxq_s32): Likewise.
18431 (vrmlaldavhq_s32): Likewise.
18432 (vcvttq_f16_f32): Likewise.
18433 (vcvtbq_f16_f32): Likewise.
18434 (vaddlvaq_s32): Likewise.
18435 (__arm_vqmovntq_u16): Define intrinsic.
18436 (__arm_vqmovnbq_u16): Likewise.
18437 (__arm_vmulltq_poly_p8): Likewise.
18438 (__arm_vmullbq_poly_p8): Likewise.
18439 (__arm_vmovntq_u16): Likewise.
18440 (__arm_vmovnbq_u16): Likewise.
18441 (__arm_vmlaldavxq_u16): Likewise.
18442 (__arm_vmlaldavq_u16): Likewise.
18443 (__arm_vqmovuntq_s16): Likewise.
18444 (__arm_vqmovunbq_s16): Likewise.
18445 (__arm_vshlltq_n_u8): Likewise.
18446 (__arm_vshllbq_n_u8): Likewise.
18447 (__arm_vorrq_n_u16): Likewise.
18448 (__arm_vbicq_n_u16): Likewise.
18449 (__arm_vcmpneq_n_f16): Likewise.
18450 (__arm_vcmpneq_f16): Likewise.
18451 (__arm_vcmpltq_n_f16): Likewise.
18452 (__arm_vcmpltq_f16): Likewise.
18453 (__arm_vcmpleq_n_f16): Likewise.
18454 (__arm_vcmpleq_f16): Likewise.
18455 (__arm_vcmpgtq_n_f16): Likewise.
18456 (__arm_vcmpgtq_f16): Likewise.
18457 (__arm_vcmpgeq_n_f16): Likewise.
18458 (__arm_vcmpgeq_f16): Likewise.
18459 (__arm_vcmpeqq_n_f16): Likewise.
18460 (__arm_vcmpeqq_f16): Likewise.
18461 (__arm_vsubq_f16): Likewise.
18462 (__arm_vqmovntq_s16): Likewise.
18463 (__arm_vqmovnbq_s16): Likewise.
18464 (__arm_vqdmulltq_s16): Likewise.
18465 (__arm_vqdmulltq_n_s16): Likewise.
18466 (__arm_vqdmullbq_s16): Likewise.
18467 (__arm_vqdmullbq_n_s16): Likewise.
18468 (__arm_vorrq_f16): Likewise.
18469 (__arm_vornq_f16): Likewise.
18470 (__arm_vmulq_n_f16): Likewise.
18471 (__arm_vmulq_f16): Likewise.
18472 (__arm_vmovntq_s16): Likewise.
18473 (__arm_vmovnbq_s16): Likewise.
18474 (__arm_vmlsldavxq_s16): Likewise.
18475 (__arm_vmlsldavq_s16): Likewise.
18476 (__arm_vmlaldavxq_s16): Likewise.
18477 (__arm_vmlaldavq_s16): Likewise.
18478 (__arm_vminnmvq_f16): Likewise.
18479 (__arm_vminnmq_f16): Likewise.
18480 (__arm_vminnmavq_f16): Likewise.
18481 (__arm_vminnmaq_f16): Likewise.
18482 (__arm_vmaxnmvq_f16): Likewise.
18483 (__arm_vmaxnmq_f16): Likewise.
18484 (__arm_vmaxnmavq_f16): Likewise.
18485 (__arm_vmaxnmaq_f16): Likewise.
18486 (__arm_veorq_f16): Likewise.
18487 (__arm_vcmulq_rot90_f16): Likewise.
18488 (__arm_vcmulq_rot270_f16): Likewise.
18489 (__arm_vcmulq_rot180_f16): Likewise.
18490 (__arm_vcmulq_f16): Likewise.
18491 (__arm_vcaddq_rot90_f16): Likewise.
18492 (__arm_vcaddq_rot270_f16): Likewise.
18493 (__arm_vbicq_f16): Likewise.
18494 (__arm_vandq_f16): Likewise.
18495 (__arm_vaddq_n_f16): Likewise.
18496 (__arm_vabdq_f16): Likewise.
18497 (__arm_vshlltq_n_s8): Likewise.
18498 (__arm_vshllbq_n_s8): Likewise.
18499 (__arm_vorrq_n_s16): Likewise.
18500 (__arm_vbicq_n_s16): Likewise.
18501 (__arm_vqmovntq_u32): Likewise.
18502 (__arm_vqmovnbq_u32): Likewise.
18503 (__arm_vmulltq_poly_p16): Likewise.
18504 (__arm_vmullbq_poly_p16): Likewise.
18505 (__arm_vmovntq_u32): Likewise.
18506 (__arm_vmovnbq_u32): Likewise.
18507 (__arm_vmlaldavxq_u32): Likewise.
18508 (__arm_vmlaldavq_u32): Likewise.
18509 (__arm_vqmovuntq_s32): Likewise.
18510 (__arm_vqmovunbq_s32): Likewise.
18511 (__arm_vshlltq_n_u16): Likewise.
18512 (__arm_vshllbq_n_u16): Likewise.
18513 (__arm_vorrq_n_u32): Likewise.
18514 (__arm_vbicq_n_u32): Likewise.
18515 (__arm_vcmpneq_n_f32): Likewise.
18516 (__arm_vcmpneq_f32): Likewise.
18517 (__arm_vcmpltq_n_f32): Likewise.
18518 (__arm_vcmpltq_f32): Likewise.
18519 (__arm_vcmpleq_n_f32): Likewise.
18520 (__arm_vcmpleq_f32): Likewise.
18521 (__arm_vcmpgtq_n_f32): Likewise.
18522 (__arm_vcmpgtq_f32): Likewise.
18523 (__arm_vcmpgeq_n_f32): Likewise.
18524 (__arm_vcmpgeq_f32): Likewise.
18525 (__arm_vcmpeqq_n_f32): Likewise.
18526 (__arm_vcmpeqq_f32): Likewise.
18527 (__arm_vsubq_f32): Likewise.
18528 (__arm_vqmovntq_s32): Likewise.
18529 (__arm_vqmovnbq_s32): Likewise.
18530 (__arm_vqdmulltq_s32): Likewise.
18531 (__arm_vqdmulltq_n_s32): Likewise.
18532 (__arm_vqdmullbq_s32): Likewise.
18533 (__arm_vqdmullbq_n_s32): Likewise.
18534 (__arm_vorrq_f32): Likewise.
18535 (__arm_vornq_f32): Likewise.
18536 (__arm_vmulq_n_f32): Likewise.
18537 (__arm_vmulq_f32): Likewise.
18538 (__arm_vmovntq_s32): Likewise.
18539 (__arm_vmovnbq_s32): Likewise.
18540 (__arm_vmlsldavxq_s32): Likewise.
18541 (__arm_vmlsldavq_s32): Likewise.
18542 (__arm_vmlaldavxq_s32): Likewise.
18543 (__arm_vmlaldavq_s32): Likewise.
18544 (__arm_vminnmvq_f32): Likewise.
18545 (__arm_vminnmq_f32): Likewise.
18546 (__arm_vminnmavq_f32): Likewise.
18547 (__arm_vminnmaq_f32): Likewise.
18548 (__arm_vmaxnmvq_f32): Likewise.
18549 (__arm_vmaxnmq_f32): Likewise.
18550 (__arm_vmaxnmavq_f32): Likewise.
18551 (__arm_vmaxnmaq_f32): Likewise.
18552 (__arm_veorq_f32): Likewise.
18553 (__arm_vcmulq_rot90_f32): Likewise.
18554 (__arm_vcmulq_rot270_f32): Likewise.
18555 (__arm_vcmulq_rot180_f32): Likewise.
18556 (__arm_vcmulq_f32): Likewise.
18557 (__arm_vcaddq_rot90_f32): Likewise.
18558 (__arm_vcaddq_rot270_f32): Likewise.
18559 (__arm_vbicq_f32): Likewise.
18560 (__arm_vandq_f32): Likewise.
18561 (__arm_vaddq_n_f32): Likewise.
18562 (__arm_vabdq_f32): Likewise.
18563 (__arm_vshlltq_n_s16): Likewise.
18564 (__arm_vshllbq_n_s16): Likewise.
18565 (__arm_vorrq_n_s32): Likewise.
18566 (__arm_vbicq_n_s32): Likewise.
18567 (__arm_vrmlaldavhq_u32): Likewise.
18568 (__arm_vctp8q_m): Likewise.
18569 (__arm_vctp64q_m): Likewise.
18570 (__arm_vctp32q_m): Likewise.
18571 (__arm_vctp16q_m): Likewise.
18572 (__arm_vaddlvaq_u32): Likewise.
18573 (__arm_vrmlsldavhxq_s32): Likewise.
18574 (__arm_vrmlsldavhq_s32): Likewise.
18575 (__arm_vrmlaldavhxq_s32): Likewise.
18576 (__arm_vrmlaldavhq_s32): Likewise.
18577 (__arm_vcvttq_f16_f32): Likewise.
18578 (__arm_vcvtbq_f16_f32): Likewise.
18579 (__arm_vaddlvaq_s32): Likewise.
18580 (vst4q): Define polymorphic variant.
18581 (vrndxq): Likewise.
18583 (vrndpq): Likewise.
18584 (vrndnq): Likewise.
18585 (vrndmq): Likewise.
18586 (vrndaq): Likewise.
18587 (vrev64q): Likewise.
18589 (vdupq_n): Likewise.
18591 (vrev32q): Likewise.
18592 (vcvtbq_f32): Likewise.
18593 (vcvttq_f32): Likewise.
18595 (vsubq_n): Likewise.
18596 (vbrsrq_n): Likewise.
18597 (vcvtq_n): Likewise.
18601 (vaddq_n): Likewise.
18605 (vmulq_n): Likewise.
18607 (vcaddq_rot270): Likewise.
18608 (vcmpeqq_n): Likewise.
18609 (vcmpeqq): Likewise.
18610 (vcaddq_rot90): Likewise.
18611 (vcmpgeq_n): Likewise.
18612 (vcmpgeq): Likewise.
18613 (vcmpgtq_n): Likewise.
18614 (vcmpgtq): Likewise.
18615 (vcmpgtq): Likewise.
18616 (vcmpleq_n): Likewise.
18617 (vcmpleq_n): Likewise.
18618 (vcmpleq): Likewise.
18619 (vcmpleq): Likewise.
18620 (vcmpltq_n): Likewise.
18621 (vcmpltq_n): Likewise.
18622 (vcmpltq): Likewise.
18623 (vcmpltq): Likewise.
18624 (vcmpneq_n): Likewise.
18625 (vcmpneq_n): Likewise.
18626 (vcmpneq): Likewise.
18627 (vcmpneq): Likewise.
18628 (vcmulq): Likewise.
18629 (vcmulq): Likewise.
18630 (vcmulq_rot180): Likewise.
18631 (vcmulq_rot180): Likewise.
18632 (vcmulq_rot270): Likewise.
18633 (vcmulq_rot270): Likewise.
18634 (vcmulq_rot90): Likewise.
18635 (vcmulq_rot90): Likewise.
18638 (vmaxnmaq): Likewise.
18639 (vmaxnmaq): Likewise.
18640 (vmaxnmavq): Likewise.
18641 (vmaxnmavq): Likewise.
18642 (vmaxnmq): Likewise.
18643 (vmaxnmq): Likewise.
18644 (vmaxnmvq): Likewise.
18645 (vmaxnmvq): Likewise.
18646 (vminnmaq): Likewise.
18647 (vminnmaq): Likewise.
18648 (vminnmavq): Likewise.
18649 (vminnmavq): Likewise.
18650 (vminnmq): Likewise.
18651 (vminnmq): Likewise.
18652 (vminnmvq): Likewise.
18653 (vminnmvq): Likewise.
18654 (vbicq_n): Likewise.
18655 (vqmovntq): Likewise.
18656 (vqmovntq): Likewise.
18657 (vqmovnbq): Likewise.
18658 (vqmovnbq): Likewise.
18659 (vmulltq_poly): Likewise.
18660 (vmulltq_poly): Likewise.
18661 (vmullbq_poly): Likewise.
18662 (vmullbq_poly): Likewise.
18663 (vmovntq): Likewise.
18664 (vmovntq): Likewise.
18665 (vmovnbq): Likewise.
18666 (vmovnbq): Likewise.
18667 (vmlaldavxq): Likewise.
18668 (vmlaldavxq): Likewise.
18669 (vqmovuntq): Likewise.
18670 (vqmovuntq): Likewise.
18671 (vshlltq_n): Likewise.
18672 (vshlltq_n): Likewise.
18673 (vshllbq_n): Likewise.
18674 (vshllbq_n): Likewise.
18675 (vorrq_n): Likewise.
18676 (vorrq_n): Likewise.
18677 (vmlaldavq): Likewise.
18678 (vmlaldavq): Likewise.
18679 (vqmovunbq): Likewise.
18680 (vqmovunbq): Likewise.
18681 (vqdmulltq_n): Likewise.
18682 (vqdmulltq_n): Likewise.
18683 (vqdmulltq): Likewise.
18684 (vqdmulltq): Likewise.
18685 (vqdmullbq_n): Likewise.
18686 (vqdmullbq_n): Likewise.
18687 (vqdmullbq): Likewise.
18688 (vqdmullbq): Likewise.
18689 (vaddlvaq): Likewise.
18690 (vaddlvaq): Likewise.
18691 (vrmlaldavhq): Likewise.
18692 (vrmlaldavhq): Likewise.
18693 (vrmlaldavhxq): Likewise.
18694 (vrmlaldavhxq): Likewise.
18695 (vrmlsldavhq): Likewise.
18696 (vrmlsldavhq): Likewise.
18697 (vrmlsldavhxq): Likewise.
18698 (vrmlsldavhxq): Likewise.
18699 (vmlsldavxq): Likewise.
18700 (vmlsldavxq): Likewise.
18701 (vmlsldavq): Likewise.
18702 (vmlsldavq): Likewise.
18703 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
18704 (BINOP_NONE_NONE_NONE): Likewise.
18705 (BINOP_UNONE_NONE_NONE): Likewise.
18706 (BINOP_UNONE_UNONE_IMM): Likewise.
18707 (BINOP_UNONE_UNONE_NONE): Likewise.
18708 (BINOP_UNONE_UNONE_UNONE): Likewise.
18709 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
18710 (mve_vaddlvaq_<supf>v4si): Likewise.
18711 (mve_vaddq_n_f<mode>): Likewise.
18712 (mve_vandq_f<mode>): Likewise.
18713 (mve_vbicq_f<mode>): Likewise.
18714 (mve_vbicq_n_<supf><mode>): Likewise.
18715 (mve_vcaddq_rot270_f<mode>): Likewise.
18716 (mve_vcaddq_rot90_f<mode>): Likewise.
18717 (mve_vcmpeqq_f<mode>): Likewise.
18718 (mve_vcmpeqq_n_f<mode>): Likewise.
18719 (mve_vcmpgeq_f<mode>): Likewise.
18720 (mve_vcmpgeq_n_f<mode>): Likewise.
18721 (mve_vcmpgtq_f<mode>): Likewise.
18722 (mve_vcmpgtq_n_f<mode>): Likewise.
18723 (mve_vcmpleq_f<mode>): Likewise.
18724 (mve_vcmpleq_n_f<mode>): Likewise.
18725 (mve_vcmpltq_f<mode>): Likewise.
18726 (mve_vcmpltq_n_f<mode>): Likewise.
18727 (mve_vcmpneq_f<mode>): Likewise.
18728 (mve_vcmpneq_n_f<mode>): Likewise.
18729 (mve_vcmulq_f<mode>): Likewise.
18730 (mve_vcmulq_rot180_f<mode>): Likewise.
18731 (mve_vcmulq_rot270_f<mode>): Likewise.
18732 (mve_vcmulq_rot90_f<mode>): Likewise.
18733 (mve_vctp<mode1>q_mhi): Likewise.
18734 (mve_vcvtbq_f16_f32v8hf): Likewise.
18735 (mve_vcvttq_f16_f32v8hf): Likewise.
18736 (mve_veorq_f<mode>): Likewise.
18737 (mve_vmaxnmaq_f<mode>): Likewise.
18738 (mve_vmaxnmavq_f<mode>): Likewise.
18739 (mve_vmaxnmq_f<mode>): Likewise.
18740 (mve_vmaxnmvq_f<mode>): Likewise.
18741 (mve_vminnmaq_f<mode>): Likewise.
18742 (mve_vminnmavq_f<mode>): Likewise.
18743 (mve_vminnmq_f<mode>): Likewise.
18744 (mve_vminnmvq_f<mode>): Likewise.
18745 (mve_vmlaldavq_<supf><mode>): Likewise.
18746 (mve_vmlaldavxq_<supf><mode>): Likewise.
18747 (mve_vmlsldavq_s<mode>): Likewise.
18748 (mve_vmlsldavxq_s<mode>): Likewise.
18749 (mve_vmovnbq_<supf><mode>): Likewise.
18750 (mve_vmovntq_<supf><mode>): Likewise.
18751 (mve_vmulq_f<mode>): Likewise.
18752 (mve_vmulq_n_f<mode>): Likewise.
18753 (mve_vornq_f<mode>): Likewise.
18754 (mve_vorrq_f<mode>): Likewise.
18755 (mve_vorrq_n_<supf><mode>): Likewise.
18756 (mve_vqdmullbq_n_s<mode>): Likewise.
18757 (mve_vqdmullbq_s<mode>): Likewise.
18758 (mve_vqdmulltq_n_s<mode>): Likewise.
18759 (mve_vqdmulltq_s<mode>): Likewise.
18760 (mve_vqmovnbq_<supf><mode>): Likewise.
18761 (mve_vqmovntq_<supf><mode>): Likewise.
18762 (mve_vqmovunbq_s<mode>): Likewise.
18763 (mve_vqmovuntq_s<mode>): Likewise.
18764 (mve_vrmlaldavhxq_sv4si): Likewise.
18765 (mve_vrmlsldavhq_sv4si): Likewise.
18766 (mve_vrmlsldavhxq_sv4si): Likewise.
18767 (mve_vshllbq_n_<supf><mode>): Likewise.
18768 (mve_vshlltq_n_<supf><mode>): Likewise.
18769 (mve_vsubq_f<mode>): Likewise.
18770 (mve_vmulltq_poly_p<mode>): Likewise.
18771 (mve_vmullbq_poly_p<mode>): Likewise.
18772 (mve_vrmlaldavhq_<supf>v4si): Likewise.
18774 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18775 Mihail Ionescu <mihail.ionescu@arm.com>
18776 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18778 * config/arm/arm_mve.h (vsubq_u8): Define macro.
18779 (vsubq_n_u8): Likewise.
18780 (vrmulhq_u8): Likewise.
18781 (vrhaddq_u8): Likewise.
18782 (vqsubq_u8): Likewise.
18783 (vqsubq_n_u8): Likewise.
18784 (vqaddq_u8): Likewise.
18785 (vqaddq_n_u8): Likewise.
18786 (vorrq_u8): Likewise.
18787 (vornq_u8): Likewise.
18788 (vmulq_u8): Likewise.
18789 (vmulq_n_u8): Likewise.
18790 (vmulltq_int_u8): Likewise.
18791 (vmullbq_int_u8): Likewise.
18792 (vmulhq_u8): Likewise.
18793 (vmladavq_u8): Likewise.
18794 (vminvq_u8): Likewise.
18795 (vminq_u8): Likewise.
18796 (vmaxvq_u8): Likewise.
18797 (vmaxq_u8): Likewise.
18798 (vhsubq_u8): Likewise.
18799 (vhsubq_n_u8): Likewise.
18800 (vhaddq_u8): Likewise.
18801 (vhaddq_n_u8): Likewise.
18802 (veorq_u8): Likewise.
18803 (vcmpneq_n_u8): Likewise.
18804 (vcmphiq_u8): Likewise.
18805 (vcmphiq_n_u8): Likewise.
18806 (vcmpeqq_u8): Likewise.
18807 (vcmpeqq_n_u8): Likewise.
18808 (vcmpcsq_u8): Likewise.
18809 (vcmpcsq_n_u8): Likewise.
18810 (vcaddq_rot90_u8): Likewise.
18811 (vcaddq_rot270_u8): Likewise.
18812 (vbicq_u8): Likewise.
18813 (vandq_u8): Likewise.
18814 (vaddvq_p_u8): Likewise.
18815 (vaddvaq_u8): Likewise.
18816 (vaddq_n_u8): Likewise.
18817 (vabdq_u8): Likewise.
18818 (vshlq_r_u8): Likewise.
18819 (vrshlq_u8): Likewise.
18820 (vrshlq_n_u8): Likewise.
18821 (vqshlq_u8): Likewise.
18822 (vqshlq_r_u8): Likewise.
18823 (vqrshlq_u8): Likewise.
18824 (vqrshlq_n_u8): Likewise.
18825 (vminavq_s8): Likewise.
18826 (vminaq_s8): Likewise.
18827 (vmaxavq_s8): Likewise.
18828 (vmaxaq_s8): Likewise.
18829 (vbrsrq_n_u8): Likewise.
18830 (vshlq_n_u8): Likewise.
18831 (vrshrq_n_u8): Likewise.
18832 (vqshlq_n_u8): Likewise.
18833 (vcmpneq_n_s8): Likewise.
18834 (vcmpltq_s8): Likewise.
18835 (vcmpltq_n_s8): Likewise.
18836 (vcmpleq_s8): Likewise.
18837 (vcmpleq_n_s8): Likewise.
18838 (vcmpgtq_s8): Likewise.
18839 (vcmpgtq_n_s8): Likewise.
18840 (vcmpgeq_s8): Likewise.
18841 (vcmpgeq_n_s8): Likewise.
18842 (vcmpeqq_s8): Likewise.
18843 (vcmpeqq_n_s8): Likewise.
18844 (vqshluq_n_s8): Likewise.
18845 (vaddvq_p_s8): Likewise.
18846 (vsubq_s8): Likewise.
18847 (vsubq_n_s8): Likewise.
18848 (vshlq_r_s8): Likewise.
18849 (vrshlq_s8): Likewise.
18850 (vrshlq_n_s8): Likewise.
18851 (vrmulhq_s8): Likewise.
18852 (vrhaddq_s8): Likewise.
18853 (vqsubq_s8): Likewise.
18854 (vqsubq_n_s8): Likewise.
18855 (vqshlq_s8): Likewise.
18856 (vqshlq_r_s8): Likewise.
18857 (vqrshlq_s8): Likewise.
18858 (vqrshlq_n_s8): Likewise.
18859 (vqrdmulhq_s8): Likewise.
18860 (vqrdmulhq_n_s8): Likewise.
18861 (vqdmulhq_s8): Likewise.
18862 (vqdmulhq_n_s8): Likewise.
18863 (vqaddq_s8): Likewise.
18864 (vqaddq_n_s8): Likewise.
18865 (vorrq_s8): Likewise.
18866 (vornq_s8): Likewise.
18867 (vmulq_s8): Likewise.
18868 (vmulq_n_s8): Likewise.
18869 (vmulltq_int_s8): Likewise.
18870 (vmullbq_int_s8): Likewise.
18871 (vmulhq_s8): Likewise.
18872 (vmlsdavxq_s8): Likewise.
18873 (vmlsdavq_s8): Likewise.
18874 (vmladavxq_s8): Likewise.
18875 (vmladavq_s8): Likewise.
18876 (vminvq_s8): Likewise.
18877 (vminq_s8): Likewise.
18878 (vmaxvq_s8): Likewise.
18879 (vmaxq_s8): Likewise.
18880 (vhsubq_s8): Likewise.
18881 (vhsubq_n_s8): Likewise.
18882 (vhcaddq_rot90_s8): Likewise.
18883 (vhcaddq_rot270_s8): Likewise.
18884 (vhaddq_s8): Likewise.
18885 (vhaddq_n_s8): Likewise.
18886 (veorq_s8): Likewise.
18887 (vcaddq_rot90_s8): Likewise.
18888 (vcaddq_rot270_s8): Likewise.
18889 (vbrsrq_n_s8): Likewise.
18890 (vbicq_s8): Likewise.
18891 (vandq_s8): Likewise.
18892 (vaddvaq_s8): Likewise.
18893 (vaddq_n_s8): Likewise.
18894 (vabdq_s8): Likewise.
18895 (vshlq_n_s8): Likewise.
18896 (vrshrq_n_s8): Likewise.
18897 (vqshlq_n_s8): Likewise.
18898 (vsubq_u16): Likewise.
18899 (vsubq_n_u16): Likewise.
18900 (vrmulhq_u16): Likewise.
18901 (vrhaddq_u16): Likewise.
18902 (vqsubq_u16): Likewise.
18903 (vqsubq_n_u16): Likewise.
18904 (vqaddq_u16): Likewise.
18905 (vqaddq_n_u16): Likewise.
18906 (vorrq_u16): Likewise.
18907 (vornq_u16): Likewise.
18908 (vmulq_u16): Likewise.
18909 (vmulq_n_u16): Likewise.
18910 (vmulltq_int_u16): Likewise.
18911 (vmullbq_int_u16): Likewise.
18912 (vmulhq_u16): Likewise.
18913 (vmladavq_u16): Likewise.
18914 (vminvq_u16): Likewise.
18915 (vminq_u16): Likewise.
18916 (vmaxvq_u16): Likewise.
18917 (vmaxq_u16): Likewise.
18918 (vhsubq_u16): Likewise.
18919 (vhsubq_n_u16): Likewise.
18920 (vhaddq_u16): Likewise.
18921 (vhaddq_n_u16): Likewise.
18922 (veorq_u16): Likewise.
18923 (vcmpneq_n_u16): Likewise.
18924 (vcmphiq_u16): Likewise.
18925 (vcmphiq_n_u16): Likewise.
18926 (vcmpeqq_u16): Likewise.
18927 (vcmpeqq_n_u16): Likewise.
18928 (vcmpcsq_u16): Likewise.
18929 (vcmpcsq_n_u16): Likewise.
18930 (vcaddq_rot90_u16): Likewise.
18931 (vcaddq_rot270_u16): Likewise.
18932 (vbicq_u16): Likewise.
18933 (vandq_u16): Likewise.
18934 (vaddvq_p_u16): Likewise.
18935 (vaddvaq_u16): Likewise.
18936 (vaddq_n_u16): Likewise.
18937 (vabdq_u16): Likewise.
18938 (vshlq_r_u16): Likewise.
18939 (vrshlq_u16): Likewise.
18940 (vrshlq_n_u16): Likewise.
18941 (vqshlq_u16): Likewise.
18942 (vqshlq_r_u16): Likewise.
18943 (vqrshlq_u16): Likewise.
18944 (vqrshlq_n_u16): Likewise.
18945 (vminavq_s16): Likewise.
18946 (vminaq_s16): Likewise.
18947 (vmaxavq_s16): Likewise.
18948 (vmaxaq_s16): Likewise.
18949 (vbrsrq_n_u16): Likewise.
18950 (vshlq_n_u16): Likewise.
18951 (vrshrq_n_u16): Likewise.
18952 (vqshlq_n_u16): Likewise.
18953 (vcmpneq_n_s16): Likewise.
18954 (vcmpltq_s16): Likewise.
18955 (vcmpltq_n_s16): Likewise.
18956 (vcmpleq_s16): Likewise.
18957 (vcmpleq_n_s16): Likewise.
18958 (vcmpgtq_s16): Likewise.
18959 (vcmpgtq_n_s16): Likewise.
18960 (vcmpgeq_s16): Likewise.
18961 (vcmpgeq_n_s16): Likewise.
18962 (vcmpeqq_s16): Likewise.
18963 (vcmpeqq_n_s16): Likewise.
18964 (vqshluq_n_s16): Likewise.
18965 (vaddvq_p_s16): Likewise.
18966 (vsubq_s16): Likewise.
18967 (vsubq_n_s16): Likewise.
18968 (vshlq_r_s16): Likewise.
18969 (vrshlq_s16): Likewise.
18970 (vrshlq_n_s16): Likewise.
18971 (vrmulhq_s16): Likewise.
18972 (vrhaddq_s16): Likewise.
18973 (vqsubq_s16): Likewise.
18974 (vqsubq_n_s16): Likewise.
18975 (vqshlq_s16): Likewise.
18976 (vqshlq_r_s16): Likewise.
18977 (vqrshlq_s16): Likewise.
18978 (vqrshlq_n_s16): Likewise.
18979 (vqrdmulhq_s16): Likewise.
18980 (vqrdmulhq_n_s16): Likewise.
18981 (vqdmulhq_s16): Likewise.
18982 (vqdmulhq_n_s16): Likewise.
18983 (vqaddq_s16): Likewise.
18984 (vqaddq_n_s16): Likewise.
18985 (vorrq_s16): Likewise.
18986 (vornq_s16): Likewise.
18987 (vmulq_s16): Likewise.
18988 (vmulq_n_s16): Likewise.
18989 (vmulltq_int_s16): Likewise.
18990 (vmullbq_int_s16): Likewise.
18991 (vmulhq_s16): Likewise.
18992 (vmlsdavxq_s16): Likewise.
18993 (vmlsdavq_s16): Likewise.
18994 (vmladavxq_s16): Likewise.
18995 (vmladavq_s16): Likewise.
18996 (vminvq_s16): Likewise.
18997 (vminq_s16): Likewise.
18998 (vmaxvq_s16): Likewise.
18999 (vmaxq_s16): Likewise.
19000 (vhsubq_s16): Likewise.
19001 (vhsubq_n_s16): Likewise.
19002 (vhcaddq_rot90_s16): Likewise.
19003 (vhcaddq_rot270_s16): Likewise.
19004 (vhaddq_s16): Likewise.
19005 (vhaddq_n_s16): Likewise.
19006 (veorq_s16): Likewise.
19007 (vcaddq_rot90_s16): Likewise.
19008 (vcaddq_rot270_s16): Likewise.
19009 (vbrsrq_n_s16): Likewise.
19010 (vbicq_s16): Likewise.
19011 (vandq_s16): Likewise.
19012 (vaddvaq_s16): Likewise.
19013 (vaddq_n_s16): Likewise.
19014 (vabdq_s16): Likewise.
19015 (vshlq_n_s16): Likewise.
19016 (vrshrq_n_s16): Likewise.
19017 (vqshlq_n_s16): Likewise.
19018 (vsubq_u32): Likewise.
19019 (vsubq_n_u32): Likewise.
19020 (vrmulhq_u32): Likewise.
19021 (vrhaddq_u32): Likewise.
19022 (vqsubq_u32): Likewise.
19023 (vqsubq_n_u32): Likewise.
19024 (vqaddq_u32): Likewise.
19025 (vqaddq_n_u32): Likewise.
19026 (vorrq_u32): Likewise.
19027 (vornq_u32): Likewise.
19028 (vmulq_u32): Likewise.
19029 (vmulq_n_u32): Likewise.
19030 (vmulltq_int_u32): Likewise.
19031 (vmullbq_int_u32): Likewise.
19032 (vmulhq_u32): Likewise.
19033 (vmladavq_u32): Likewise.
19034 (vminvq_u32): Likewise.
19035 (vminq_u32): Likewise.
19036 (vmaxvq_u32): Likewise.
19037 (vmaxq_u32): Likewise.
19038 (vhsubq_u32): Likewise.
19039 (vhsubq_n_u32): Likewise.
19040 (vhaddq_u32): Likewise.
19041 (vhaddq_n_u32): Likewise.
19042 (veorq_u32): Likewise.
19043 (vcmpneq_n_u32): Likewise.
19044 (vcmphiq_u32): Likewise.
19045 (vcmphiq_n_u32): Likewise.
19046 (vcmpeqq_u32): Likewise.
19047 (vcmpeqq_n_u32): Likewise.
19048 (vcmpcsq_u32): Likewise.
19049 (vcmpcsq_n_u32): Likewise.
19050 (vcaddq_rot90_u32): Likewise.
19051 (vcaddq_rot270_u32): Likewise.
19052 (vbicq_u32): Likewise.
19053 (vandq_u32): Likewise.
19054 (vaddvq_p_u32): Likewise.
19055 (vaddvaq_u32): Likewise.
19056 (vaddq_n_u32): Likewise.
19057 (vabdq_u32): Likewise.
19058 (vshlq_r_u32): Likewise.
19059 (vrshlq_u32): Likewise.
19060 (vrshlq_n_u32): Likewise.
19061 (vqshlq_u32): Likewise.
19062 (vqshlq_r_u32): Likewise.
19063 (vqrshlq_u32): Likewise.
19064 (vqrshlq_n_u32): Likewise.
19065 (vminavq_s32): Likewise.
19066 (vminaq_s32): Likewise.
19067 (vmaxavq_s32): Likewise.
19068 (vmaxaq_s32): Likewise.
19069 (vbrsrq_n_u32): Likewise.
19070 (vshlq_n_u32): Likewise.
19071 (vrshrq_n_u32): Likewise.
19072 (vqshlq_n_u32): Likewise.
19073 (vcmpneq_n_s32): Likewise.
19074 (vcmpltq_s32): Likewise.
19075 (vcmpltq_n_s32): Likewise.
19076 (vcmpleq_s32): Likewise.
19077 (vcmpleq_n_s32): Likewise.
19078 (vcmpgtq_s32): Likewise.
19079 (vcmpgtq_n_s32): Likewise.
19080 (vcmpgeq_s32): Likewise.
19081 (vcmpgeq_n_s32): Likewise.
19082 (vcmpeqq_s32): Likewise.
19083 (vcmpeqq_n_s32): Likewise.
19084 (vqshluq_n_s32): Likewise.
19085 (vaddvq_p_s32): Likewise.
19086 (vsubq_s32): Likewise.
19087 (vsubq_n_s32): Likewise.
19088 (vshlq_r_s32): Likewise.
19089 (vrshlq_s32): Likewise.
19090 (vrshlq_n_s32): Likewise.
19091 (vrmulhq_s32): Likewise.
19092 (vrhaddq_s32): Likewise.
19093 (vqsubq_s32): Likewise.
19094 (vqsubq_n_s32): Likewise.
19095 (vqshlq_s32): Likewise.
19096 (vqshlq_r_s32): Likewise.
19097 (vqrshlq_s32): Likewise.
19098 (vqrshlq_n_s32): Likewise.
19099 (vqrdmulhq_s32): Likewise.
19100 (vqrdmulhq_n_s32): Likewise.
19101 (vqdmulhq_s32): Likewise.
19102 (vqdmulhq_n_s32): Likewise.
19103 (vqaddq_s32): Likewise.
19104 (vqaddq_n_s32): Likewise.
19105 (vorrq_s32): Likewise.
19106 (vornq_s32): Likewise.
19107 (vmulq_s32): Likewise.
19108 (vmulq_n_s32): Likewise.
19109 (vmulltq_int_s32): Likewise.
19110 (vmullbq_int_s32): Likewise.
19111 (vmulhq_s32): Likewise.
19112 (vmlsdavxq_s32): Likewise.
19113 (vmlsdavq_s32): Likewise.
19114 (vmladavxq_s32): Likewise.
19115 (vmladavq_s32): Likewise.
19116 (vminvq_s32): Likewise.
19117 (vminq_s32): Likewise.
19118 (vmaxvq_s32): Likewise.
19119 (vmaxq_s32): Likewise.
19120 (vhsubq_s32): Likewise.
19121 (vhsubq_n_s32): Likewise.
19122 (vhcaddq_rot90_s32): Likewise.
19123 (vhcaddq_rot270_s32): Likewise.
19124 (vhaddq_s32): Likewise.
19125 (vhaddq_n_s32): Likewise.
19126 (veorq_s32): Likewise.
19127 (vcaddq_rot90_s32): Likewise.
19128 (vcaddq_rot270_s32): Likewise.
19129 (vbrsrq_n_s32): Likewise.
19130 (vbicq_s32): Likewise.
19131 (vandq_s32): Likewise.
19132 (vaddvaq_s32): Likewise.
19133 (vaddq_n_s32): Likewise.
19134 (vabdq_s32): Likewise.
19135 (vshlq_n_s32): Likewise.
19136 (vrshrq_n_s32): Likewise.
19137 (vqshlq_n_s32): Likewise.
19138 (__arm_vsubq_u8): Define intrinsic.
19139 (__arm_vsubq_n_u8): Likewise.
19140 (__arm_vrmulhq_u8): Likewise.
19141 (__arm_vrhaddq_u8): Likewise.
19142 (__arm_vqsubq_u8): Likewise.
19143 (__arm_vqsubq_n_u8): Likewise.
19144 (__arm_vqaddq_u8): Likewise.
19145 (__arm_vqaddq_n_u8): Likewise.
19146 (__arm_vorrq_u8): Likewise.
19147 (__arm_vornq_u8): Likewise.
19148 (__arm_vmulq_u8): Likewise.
19149 (__arm_vmulq_n_u8): Likewise.
19150 (__arm_vmulltq_int_u8): Likewise.
19151 (__arm_vmullbq_int_u8): Likewise.
19152 (__arm_vmulhq_u8): Likewise.
19153 (__arm_vmladavq_u8): Likewise.
19154 (__arm_vminvq_u8): Likewise.
19155 (__arm_vminq_u8): Likewise.
19156 (__arm_vmaxvq_u8): Likewise.
19157 (__arm_vmaxq_u8): Likewise.
19158 (__arm_vhsubq_u8): Likewise.
19159 (__arm_vhsubq_n_u8): Likewise.
19160 (__arm_vhaddq_u8): Likewise.
19161 (__arm_vhaddq_n_u8): Likewise.
19162 (__arm_veorq_u8): Likewise.
19163 (__arm_vcmpneq_n_u8): Likewise.
19164 (__arm_vcmphiq_u8): Likewise.
19165 (__arm_vcmphiq_n_u8): Likewise.
19166 (__arm_vcmpeqq_u8): Likewise.
19167 (__arm_vcmpeqq_n_u8): Likewise.
19168 (__arm_vcmpcsq_u8): Likewise.
19169 (__arm_vcmpcsq_n_u8): Likewise.
19170 (__arm_vcaddq_rot90_u8): Likewise.
19171 (__arm_vcaddq_rot270_u8): Likewise.
19172 (__arm_vbicq_u8): Likewise.
19173 (__arm_vandq_u8): Likewise.
19174 (__arm_vaddvq_p_u8): Likewise.
19175 (__arm_vaddvaq_u8): Likewise.
19176 (__arm_vaddq_n_u8): Likewise.
19177 (__arm_vabdq_u8): Likewise.
19178 (__arm_vshlq_r_u8): Likewise.
19179 (__arm_vrshlq_u8): Likewise.
19180 (__arm_vrshlq_n_u8): Likewise.
19181 (__arm_vqshlq_u8): Likewise.
19182 (__arm_vqshlq_r_u8): Likewise.
19183 (__arm_vqrshlq_u8): Likewise.
19184 (__arm_vqrshlq_n_u8): Likewise.
19185 (__arm_vminavq_s8): Likewise.
19186 (__arm_vminaq_s8): Likewise.
19187 (__arm_vmaxavq_s8): Likewise.
19188 (__arm_vmaxaq_s8): Likewise.
19189 (__arm_vbrsrq_n_u8): Likewise.
19190 (__arm_vshlq_n_u8): Likewise.
19191 (__arm_vrshrq_n_u8): Likewise.
19192 (__arm_vqshlq_n_u8): Likewise.
19193 (__arm_vcmpneq_n_s8): Likewise.
19194 (__arm_vcmpltq_s8): Likewise.
19195 (__arm_vcmpltq_n_s8): Likewise.
19196 (__arm_vcmpleq_s8): Likewise.
19197 (__arm_vcmpleq_n_s8): Likewise.
19198 (__arm_vcmpgtq_s8): Likewise.
19199 (__arm_vcmpgtq_n_s8): Likewise.
19200 (__arm_vcmpgeq_s8): Likewise.
19201 (__arm_vcmpgeq_n_s8): Likewise.
19202 (__arm_vcmpeqq_s8): Likewise.
19203 (__arm_vcmpeqq_n_s8): Likewise.
19204 (__arm_vqshluq_n_s8): Likewise.
19205 (__arm_vaddvq_p_s8): Likewise.
19206 (__arm_vsubq_s8): Likewise.
19207 (__arm_vsubq_n_s8): Likewise.
19208 (__arm_vshlq_r_s8): Likewise.
19209 (__arm_vrshlq_s8): Likewise.
19210 (__arm_vrshlq_n_s8): Likewise.
19211 (__arm_vrmulhq_s8): Likewise.
19212 (__arm_vrhaddq_s8): Likewise.
19213 (__arm_vqsubq_s8): Likewise.
19214 (__arm_vqsubq_n_s8): Likewise.
19215 (__arm_vqshlq_s8): Likewise.
19216 (__arm_vqshlq_r_s8): Likewise.
19217 (__arm_vqrshlq_s8): Likewise.
19218 (__arm_vqrshlq_n_s8): Likewise.
19219 (__arm_vqrdmulhq_s8): Likewise.
19220 (__arm_vqrdmulhq_n_s8): Likewise.
19221 (__arm_vqdmulhq_s8): Likewise.
19222 (__arm_vqdmulhq_n_s8): Likewise.
19223 (__arm_vqaddq_s8): Likewise.
19224 (__arm_vqaddq_n_s8): Likewise.
19225 (__arm_vorrq_s8): Likewise.
19226 (__arm_vornq_s8): Likewise.
19227 (__arm_vmulq_s8): Likewise.
19228 (__arm_vmulq_n_s8): Likewise.
19229 (__arm_vmulltq_int_s8): Likewise.
19230 (__arm_vmullbq_int_s8): Likewise.
19231 (__arm_vmulhq_s8): Likewise.
19232 (__arm_vmlsdavxq_s8): Likewise.
19233 (__arm_vmlsdavq_s8): Likewise.
19234 (__arm_vmladavxq_s8): Likewise.
19235 (__arm_vmladavq_s8): Likewise.
19236 (__arm_vminvq_s8): Likewise.
19237 (__arm_vminq_s8): Likewise.
19238 (__arm_vmaxvq_s8): Likewise.
19239 (__arm_vmaxq_s8): Likewise.
19240 (__arm_vhsubq_s8): Likewise.
19241 (__arm_vhsubq_n_s8): Likewise.
19242 (__arm_vhcaddq_rot90_s8): Likewise.
19243 (__arm_vhcaddq_rot270_s8): Likewise.
19244 (__arm_vhaddq_s8): Likewise.
19245 (__arm_vhaddq_n_s8): Likewise.
19246 (__arm_veorq_s8): Likewise.
19247 (__arm_vcaddq_rot90_s8): Likewise.
19248 (__arm_vcaddq_rot270_s8): Likewise.
19249 (__arm_vbrsrq_n_s8): Likewise.
19250 (__arm_vbicq_s8): Likewise.
19251 (__arm_vandq_s8): Likewise.
19252 (__arm_vaddvaq_s8): Likewise.
19253 (__arm_vaddq_n_s8): Likewise.
19254 (__arm_vabdq_s8): Likewise.
19255 (__arm_vshlq_n_s8): Likewise.
19256 (__arm_vrshrq_n_s8): Likewise.
19257 (__arm_vqshlq_n_s8): Likewise.
19258 (__arm_vsubq_u16): Likewise.
19259 (__arm_vsubq_n_u16): Likewise.
19260 (__arm_vrmulhq_u16): Likewise.
19261 (__arm_vrhaddq_u16): Likewise.
19262 (__arm_vqsubq_u16): Likewise.
19263 (__arm_vqsubq_n_u16): Likewise.
19264 (__arm_vqaddq_u16): Likewise.
19265 (__arm_vqaddq_n_u16): Likewise.
19266 (__arm_vorrq_u16): Likewise.
19267 (__arm_vornq_u16): Likewise.
19268 (__arm_vmulq_u16): Likewise.
19269 (__arm_vmulq_n_u16): Likewise.
19270 (__arm_vmulltq_int_u16): Likewise.
19271 (__arm_vmullbq_int_u16): Likewise.
19272 (__arm_vmulhq_u16): Likewise.
19273 (__arm_vmladavq_u16): Likewise.
19274 (__arm_vminvq_u16): Likewise.
19275 (__arm_vminq_u16): Likewise.
19276 (__arm_vmaxvq_u16): Likewise.
19277 (__arm_vmaxq_u16): Likewise.
19278 (__arm_vhsubq_u16): Likewise.
19279 (__arm_vhsubq_n_u16): Likewise.
19280 (__arm_vhaddq_u16): Likewise.
19281 (__arm_vhaddq_n_u16): Likewise.
19282 (__arm_veorq_u16): Likewise.
19283 (__arm_vcmpneq_n_u16): Likewise.
19284 (__arm_vcmphiq_u16): Likewise.
19285 (__arm_vcmphiq_n_u16): Likewise.
19286 (__arm_vcmpeqq_u16): Likewise.
19287 (__arm_vcmpeqq_n_u16): Likewise.
19288 (__arm_vcmpcsq_u16): Likewise.
19289 (__arm_vcmpcsq_n_u16): Likewise.
19290 (__arm_vcaddq_rot90_u16): Likewise.
19291 (__arm_vcaddq_rot270_u16): Likewise.
19292 (__arm_vbicq_u16): Likewise.
19293 (__arm_vandq_u16): Likewise.
19294 (__arm_vaddvq_p_u16): Likewise.
19295 (__arm_vaddvaq_u16): Likewise.
19296 (__arm_vaddq_n_u16): Likewise.
19297 (__arm_vabdq_u16): Likewise.
19298 (__arm_vshlq_r_u16): Likewise.
19299 (__arm_vrshlq_u16): Likewise.
19300 (__arm_vrshlq_n_u16): Likewise.
19301 (__arm_vqshlq_u16): Likewise.
19302 (__arm_vqshlq_r_u16): Likewise.
19303 (__arm_vqrshlq_u16): Likewise.
19304 (__arm_vqrshlq_n_u16): Likewise.
19305 (__arm_vminavq_s16): Likewise.
19306 (__arm_vminaq_s16): Likewise.
19307 (__arm_vmaxavq_s16): Likewise.
19308 (__arm_vmaxaq_s16): Likewise.
19309 (__arm_vbrsrq_n_u16): Likewise.
19310 (__arm_vshlq_n_u16): Likewise.
19311 (__arm_vrshrq_n_u16): Likewise.
19312 (__arm_vqshlq_n_u16): Likewise.
19313 (__arm_vcmpneq_n_s16): Likewise.
19314 (__arm_vcmpltq_s16): Likewise.
19315 (__arm_vcmpltq_n_s16): Likewise.
19316 (__arm_vcmpleq_s16): Likewise.
19317 (__arm_vcmpleq_n_s16): Likewise.
19318 (__arm_vcmpgtq_s16): Likewise.
19319 (__arm_vcmpgtq_n_s16): Likewise.
19320 (__arm_vcmpgeq_s16): Likewise.
19321 (__arm_vcmpgeq_n_s16): Likewise.
19322 (__arm_vcmpeqq_s16): Likewise.
19323 (__arm_vcmpeqq_n_s16): Likewise.
19324 (__arm_vqshluq_n_s16): Likewise.
19325 (__arm_vaddvq_p_s16): Likewise.
19326 (__arm_vsubq_s16): Likewise.
19327 (__arm_vsubq_n_s16): Likewise.
19328 (__arm_vshlq_r_s16): Likewise.
19329 (__arm_vrshlq_s16): Likewise.
19330 (__arm_vrshlq_n_s16): Likewise.
19331 (__arm_vrmulhq_s16): Likewise.
19332 (__arm_vrhaddq_s16): Likewise.
19333 (__arm_vqsubq_s16): Likewise.
19334 (__arm_vqsubq_n_s16): Likewise.
19335 (__arm_vqshlq_s16): Likewise.
19336 (__arm_vqshlq_r_s16): Likewise.
19337 (__arm_vqrshlq_s16): Likewise.
19338 (__arm_vqrshlq_n_s16): Likewise.
19339 (__arm_vqrdmulhq_s16): Likewise.
19340 (__arm_vqrdmulhq_n_s16): Likewise.
19341 (__arm_vqdmulhq_s16): Likewise.
19342 (__arm_vqdmulhq_n_s16): Likewise.
19343 (__arm_vqaddq_s16): Likewise.
19344 (__arm_vqaddq_n_s16): Likewise.
19345 (__arm_vorrq_s16): Likewise.
19346 (__arm_vornq_s16): Likewise.
19347 (__arm_vmulq_s16): Likewise.
19348 (__arm_vmulq_n_s16): Likewise.
19349 (__arm_vmulltq_int_s16): Likewise.
19350 (__arm_vmullbq_int_s16): Likewise.
19351 (__arm_vmulhq_s16): Likewise.
19352 (__arm_vmlsdavxq_s16): Likewise.
19353 (__arm_vmlsdavq_s16): Likewise.
19354 (__arm_vmladavxq_s16): Likewise.
19355 (__arm_vmladavq_s16): Likewise.
19356 (__arm_vminvq_s16): Likewise.
19357 (__arm_vminq_s16): Likewise.
19358 (__arm_vmaxvq_s16): Likewise.
19359 (__arm_vmaxq_s16): Likewise.
19360 (__arm_vhsubq_s16): Likewise.
19361 (__arm_vhsubq_n_s16): Likewise.
19362 (__arm_vhcaddq_rot90_s16): Likewise.
19363 (__arm_vhcaddq_rot270_s16): Likewise.
19364 (__arm_vhaddq_s16): Likewise.
19365 (__arm_vhaddq_n_s16): Likewise.
19366 (__arm_veorq_s16): Likewise.
19367 (__arm_vcaddq_rot90_s16): Likewise.
19368 (__arm_vcaddq_rot270_s16): Likewise.
19369 (__arm_vbrsrq_n_s16): Likewise.
19370 (__arm_vbicq_s16): Likewise.
19371 (__arm_vandq_s16): Likewise.
19372 (__arm_vaddvaq_s16): Likewise.
19373 (__arm_vaddq_n_s16): Likewise.
19374 (__arm_vabdq_s16): Likewise.
19375 (__arm_vshlq_n_s16): Likewise.
19376 (__arm_vrshrq_n_s16): Likewise.
19377 (__arm_vqshlq_n_s16): Likewise.
19378 (__arm_vsubq_u32): Likewise.
19379 (__arm_vsubq_n_u32): Likewise.
19380 (__arm_vrmulhq_u32): Likewise.
19381 (__arm_vrhaddq_u32): Likewise.
19382 (__arm_vqsubq_u32): Likewise.
19383 (__arm_vqsubq_n_u32): Likewise.
19384 (__arm_vqaddq_u32): Likewise.
19385 (__arm_vqaddq_n_u32): Likewise.
19386 (__arm_vorrq_u32): Likewise.
19387 (__arm_vornq_u32): Likewise.
19388 (__arm_vmulq_u32): Likewise.
19389 (__arm_vmulq_n_u32): Likewise.
19390 (__arm_vmulltq_int_u32): Likewise.
19391 (__arm_vmullbq_int_u32): Likewise.
19392 (__arm_vmulhq_u32): Likewise.
19393 (__arm_vmladavq_u32): Likewise.
19394 (__arm_vminvq_u32): Likewise.
19395 (__arm_vminq_u32): Likewise.
19396 (__arm_vmaxvq_u32): Likewise.
19397 (__arm_vmaxq_u32): Likewise.
19398 (__arm_vhsubq_u32): Likewise.
19399 (__arm_vhsubq_n_u32): Likewise.
19400 (__arm_vhaddq_u32): Likewise.
19401 (__arm_vhaddq_n_u32): Likewise.
19402 (__arm_veorq_u32): Likewise.
19403 (__arm_vcmpneq_n_u32): Likewise.
19404 (__arm_vcmphiq_u32): Likewise.
19405 (__arm_vcmphiq_n_u32): Likewise.
19406 (__arm_vcmpeqq_u32): Likewise.
19407 (__arm_vcmpeqq_n_u32): Likewise.
19408 (__arm_vcmpcsq_u32): Likewise.
19409 (__arm_vcmpcsq_n_u32): Likewise.
19410 (__arm_vcaddq_rot90_u32): Likewise.
19411 (__arm_vcaddq_rot270_u32): Likewise.
19412 (__arm_vbicq_u32): Likewise.
19413 (__arm_vandq_u32): Likewise.
19414 (__arm_vaddvq_p_u32): Likewise.
19415 (__arm_vaddvaq_u32): Likewise.
19416 (__arm_vaddq_n_u32): Likewise.
19417 (__arm_vabdq_u32): Likewise.
19418 (__arm_vshlq_r_u32): Likewise.
19419 (__arm_vrshlq_u32): Likewise.
19420 (__arm_vrshlq_n_u32): Likewise.
19421 (__arm_vqshlq_u32): Likewise.
19422 (__arm_vqshlq_r_u32): Likewise.
19423 (__arm_vqrshlq_u32): Likewise.
19424 (__arm_vqrshlq_n_u32): Likewise.
19425 (__arm_vminavq_s32): Likewise.
19426 (__arm_vminaq_s32): Likewise.
19427 (__arm_vmaxavq_s32): Likewise.
19428 (__arm_vmaxaq_s32): Likewise.
19429 (__arm_vbrsrq_n_u32): Likewise.
19430 (__arm_vshlq_n_u32): Likewise.
19431 (__arm_vrshrq_n_u32): Likewise.
19432 (__arm_vqshlq_n_u32): Likewise.
19433 (__arm_vcmpneq_n_s32): Likewise.
19434 (__arm_vcmpltq_s32): Likewise.
19435 (__arm_vcmpltq_n_s32): Likewise.
19436 (__arm_vcmpleq_s32): Likewise.
19437 (__arm_vcmpleq_n_s32): Likewise.
19438 (__arm_vcmpgtq_s32): Likewise.
19439 (__arm_vcmpgtq_n_s32): Likewise.
19440 (__arm_vcmpgeq_s32): Likewise.
19441 (__arm_vcmpgeq_n_s32): Likewise.
19442 (__arm_vcmpeqq_s32): Likewise.
19443 (__arm_vcmpeqq_n_s32): Likewise.
19444 (__arm_vqshluq_n_s32): Likewise.
19445 (__arm_vaddvq_p_s32): Likewise.
19446 (__arm_vsubq_s32): Likewise.
19447 (__arm_vsubq_n_s32): Likewise.
19448 (__arm_vshlq_r_s32): Likewise.
19449 (__arm_vrshlq_s32): Likewise.
19450 (__arm_vrshlq_n_s32): Likewise.
19451 (__arm_vrmulhq_s32): Likewise.
19452 (__arm_vrhaddq_s32): Likewise.
19453 (__arm_vqsubq_s32): Likewise.
19454 (__arm_vqsubq_n_s32): Likewise.
19455 (__arm_vqshlq_s32): Likewise.
19456 (__arm_vqshlq_r_s32): Likewise.
19457 (__arm_vqrshlq_s32): Likewise.
19458 (__arm_vqrshlq_n_s32): Likewise.
19459 (__arm_vqrdmulhq_s32): Likewise.
19460 (__arm_vqrdmulhq_n_s32): Likewise.
19461 (__arm_vqdmulhq_s32): Likewise.
19462 (__arm_vqdmulhq_n_s32): Likewise.
19463 (__arm_vqaddq_s32): Likewise.
19464 (__arm_vqaddq_n_s32): Likewise.
19465 (__arm_vorrq_s32): Likewise.
19466 (__arm_vornq_s32): Likewise.
19467 (__arm_vmulq_s32): Likewise.
19468 (__arm_vmulq_n_s32): Likewise.
19469 (__arm_vmulltq_int_s32): Likewise.
19470 (__arm_vmullbq_int_s32): Likewise.
19471 (__arm_vmulhq_s32): Likewise.
19472 (__arm_vmlsdavxq_s32): Likewise.
19473 (__arm_vmlsdavq_s32): Likewise.
19474 (__arm_vmladavxq_s32): Likewise.
19475 (__arm_vmladavq_s32): Likewise.
19476 (__arm_vminvq_s32): Likewise.
19477 (__arm_vminq_s32): Likewise.
19478 (__arm_vmaxvq_s32): Likewise.
19479 (__arm_vmaxq_s32): Likewise.
19480 (__arm_vhsubq_s32): Likewise.
19481 (__arm_vhsubq_n_s32): Likewise.
19482 (__arm_vhcaddq_rot90_s32): Likewise.
19483 (__arm_vhcaddq_rot270_s32): Likewise.
19484 (__arm_vhaddq_s32): Likewise.
19485 (__arm_vhaddq_n_s32): Likewise.
19486 (__arm_veorq_s32): Likewise.
19487 (__arm_vcaddq_rot90_s32): Likewise.
19488 (__arm_vcaddq_rot270_s32): Likewise.
19489 (__arm_vbrsrq_n_s32): Likewise.
19490 (__arm_vbicq_s32): Likewise.
19491 (__arm_vandq_s32): Likewise.
19492 (__arm_vaddvaq_s32): Likewise.
19493 (__arm_vaddq_n_s32): Likewise.
19494 (__arm_vabdq_s32): Likewise.
19495 (__arm_vshlq_n_s32): Likewise.
19496 (__arm_vrshrq_n_s32): Likewise.
19497 (__arm_vqshlq_n_s32): Likewise.
19498 (vsubq): Define polymorphic variant.
19499 (vsubq_n): Likewise.
19500 (vshlq_r): Likewise.
19501 (vrshlq_n): Likewise.
19502 (vrshlq): Likewise.
19503 (vrmulhq): Likewise.
19504 (vrhaddq): Likewise.
19505 (vqsubq_n): Likewise.
19506 (vqsubq): Likewise.
19507 (vqshlq): Likewise.
19508 (vqshlq_r): Likewise.
19509 (vqshluq): Likewise.
19510 (vrshrq_n): Likewise.
19511 (vshlq_n): Likewise.
19512 (vqshluq_n): Likewise.
19513 (vqshlq_n): Likewise.
19514 (vqrshlq_n): Likewise.
19515 (vqrshlq): Likewise.
19516 (vqrdmulhq_n): Likewise.
19517 (vqrdmulhq): Likewise.
19518 (vqdmulhq_n): Likewise.
19519 (vqdmulhq): Likewise.
19520 (vqaddq_n): Likewise.
19521 (vqaddq): Likewise.
19522 (vorrq_n): Likewise.
19525 (vmulq_n): Likewise.
19527 (vmulltq_int): Likewise.
19528 (vmullbq_int): Likewise.
19529 (vmulhq): Likewise.
19531 (vminaq): Likewise.
19533 (vmaxaq): Likewise.
19534 (vhsubq_n): Likewise.
19535 (vhsubq): Likewise.
19536 (vhcaddq_rot90): Likewise.
19537 (vhcaddq_rot270): Likewise.
19538 (vhaddq_n): Likewise.
19539 (vhaddq): Likewise.
19541 (vcaddq_rot90): Likewise.
19542 (vcaddq_rot270): Likewise.
19543 (vbrsrq_n): Likewise.
19544 (vbicq_n): Likewise.
19547 (vaddq_n): Likewise.
19550 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
19551 (BINOP_NONE_NONE_NONE): Likewise.
19552 (BINOP_NONE_NONE_UNONE): Likewise.
19553 (BINOP_UNONE_NONE_IMM): Likewise.
19554 (BINOP_UNONE_NONE_NONE): Likewise.
19555 (BINOP_UNONE_UNONE_IMM): Likewise.
19556 (BINOP_UNONE_UNONE_NONE): Likewise.
19557 (BINOP_UNONE_UNONE_UNONE): Likewise.
19558 * config/arm/constraints.md (Ra): Define constraint to check constant is
19559 in the range of 0 to 7.
19560 (Rg): Define constriant to check the constant is one among 1, 2, 4
19562 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
19563 (mve_vaddq_n_<supf>): Likewise.
19564 (mve_vaddvaq_<supf>): Likewise.
19565 (mve_vaddvq_p_<supf>): Likewise.
19566 (mve_vandq_<supf>): Likewise.
19567 (mve_vbicq_<supf>): Likewise.
19568 (mve_vbrsrq_n_<supf>): Likewise.
19569 (mve_vcaddq_rot270_<supf>): Likewise.
19570 (mve_vcaddq_rot90_<supf>): Likewise.
19571 (mve_vcmpcsq_n_u): Likewise.
19572 (mve_vcmpcsq_u): Likewise.
19573 (mve_vcmpeqq_n_<supf>): Likewise.
19574 (mve_vcmpeqq_<supf>): Likewise.
19575 (mve_vcmpgeq_n_s): Likewise.
19576 (mve_vcmpgeq_s): Likewise.
19577 (mve_vcmpgtq_n_s): Likewise.
19578 (mve_vcmpgtq_s): Likewise.
19579 (mve_vcmphiq_n_u): Likewise.
19580 (mve_vcmphiq_u): Likewise.
19581 (mve_vcmpleq_n_s): Likewise.
19582 (mve_vcmpleq_s): Likewise.
19583 (mve_vcmpltq_n_s): Likewise.
19584 (mve_vcmpltq_s): Likewise.
19585 (mve_vcmpneq_n_<supf>): Likewise.
19586 (mve_vddupq_n_u): Likewise.
19587 (mve_veorq_<supf>): Likewise.
19588 (mve_vhaddq_n_<supf>): Likewise.
19589 (mve_vhaddq_<supf>): Likewise.
19590 (mve_vhcaddq_rot270_s): Likewise.
19591 (mve_vhcaddq_rot90_s): Likewise.
19592 (mve_vhsubq_n_<supf>): Likewise.
19593 (mve_vhsubq_<supf>): Likewise.
19594 (mve_vidupq_n_u): Likewise.
19595 (mve_vmaxaq_s): Likewise.
19596 (mve_vmaxavq_s): Likewise.
19597 (mve_vmaxq_<supf>): Likewise.
19598 (mve_vmaxvq_<supf>): Likewise.
19599 (mve_vminaq_s): Likewise.
19600 (mve_vminavq_s): Likewise.
19601 (mve_vminq_<supf>): Likewise.
19602 (mve_vminvq_<supf>): Likewise.
19603 (mve_vmladavq_<supf>): Likewise.
19604 (mve_vmladavxq_s): Likewise.
19605 (mve_vmlsdavq_s): Likewise.
19606 (mve_vmlsdavxq_s): Likewise.
19607 (mve_vmulhq_<supf>): Likewise.
19608 (mve_vmullbq_int_<supf>): Likewise.
19609 (mve_vmulltq_int_<supf>): Likewise.
19610 (mve_vmulq_n_<supf>): Likewise.
19611 (mve_vmulq_<supf>): Likewise.
19612 (mve_vornq_<supf>): Likewise.
19613 (mve_vorrq_<supf>): Likewise.
19614 (mve_vqaddq_n_<supf>): Likewise.
19615 (mve_vqaddq_<supf>): Likewise.
19616 (mve_vqdmulhq_n_s): Likewise.
19617 (mve_vqdmulhq_s): Likewise.
19618 (mve_vqrdmulhq_n_s): Likewise.
19619 (mve_vqrdmulhq_s): Likewise.
19620 (mve_vqrshlq_n_<supf>): Likewise.
19621 (mve_vqrshlq_<supf>): Likewise.
19622 (mve_vqshlq_n_<supf>): Likewise.
19623 (mve_vqshlq_r_<supf>): Likewise.
19624 (mve_vqshlq_<supf>): Likewise.
19625 (mve_vqshluq_n_s): Likewise.
19626 (mve_vqsubq_n_<supf>): Likewise.
19627 (mve_vqsubq_<supf>): Likewise.
19628 (mve_vrhaddq_<supf>): Likewise.
19629 (mve_vrmulhq_<supf>): Likewise.
19630 (mve_vrshlq_n_<supf>): Likewise.
19631 (mve_vrshlq_<supf>): Likewise.
19632 (mve_vrshrq_n_<supf>): Likewise.
19633 (mve_vshlq_n_<supf>): Likewise.
19634 (mve_vshlq_r_<supf>): Likewise.
19635 (mve_vsubq_n_<supf>): Likewise.
19636 (mve_vsubq_<supf>): Likewise.
19637 * config/arm/predicates.md (mve_imm_7): Define predicate to check
19638 the matching constraint Ra.
19639 (mve_imm_selective_upto_8): Define predicate to check the matching
19642 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19643 Mihail Ionescu <mihail.ionescu@arm.com>
19644 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19646 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
19647 qualifier for binary operands.
19648 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
19649 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
19650 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
19651 (vaddlvq_p_u32): Likewise.
19652 (vcmpneq_s8): Likewise.
19653 (vcmpneq_s16): Likewise.
19654 (vcmpneq_s32): Likewise.
19655 (vcmpneq_u8): Likewise.
19656 (vcmpneq_u16): Likewise.
19657 (vcmpneq_u32): Likewise.
19658 (vshlq_s8): Likewise.
19659 (vshlq_s16): Likewise.
19660 (vshlq_s32): Likewise.
19661 (vshlq_u8): Likewise.
19662 (vshlq_u16): Likewise.
19663 (vshlq_u32): Likewise.
19664 (__arm_vaddlvq_p_s32): Define intrinsic.
19665 (__arm_vaddlvq_p_u32): Likewise.
19666 (__arm_vcmpneq_s8): Likewise.
19667 (__arm_vcmpneq_s16): Likewise.
19668 (__arm_vcmpneq_s32): Likewise.
19669 (__arm_vcmpneq_u8): Likewise.
19670 (__arm_vcmpneq_u16): Likewise.
19671 (__arm_vcmpneq_u32): Likewise.
19672 (__arm_vshlq_s8): Likewise.
19673 (__arm_vshlq_s16): Likewise.
19674 (__arm_vshlq_s32): Likewise.
19675 (__arm_vshlq_u8): Likewise.
19676 (__arm_vshlq_u16): Likewise.
19677 (__arm_vshlq_u32): Likewise.
19678 (vaddlvq_p): Define polymorphic variant.
19679 (vcmpneq): Likewise.
19681 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
19683 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
19684 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
19685 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
19686 (mve_vcmpneq_<supf><mode>): Likewise.
19687 (mve_vshlq_<supf><mode>): Likewise.
19689 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19690 Mihail Ionescu <mihail.ionescu@arm.com>
19691 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19693 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
19694 qualifier for binary operands.
19695 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
19696 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
19697 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
19698 (vcvtq_n_s32_f32): Likewise.
19699 (vcvtq_n_u16_f16): Likewise.
19700 (vcvtq_n_u32_f32): Likewise.
19701 (vcreateq_u8): Likewise.
19702 (vcreateq_u16): Likewise.
19703 (vcreateq_u32): Likewise.
19704 (vcreateq_u64): Likewise.
19705 (vcreateq_s8): Likewise.
19706 (vcreateq_s16): Likewise.
19707 (vcreateq_s32): Likewise.
19708 (vcreateq_s64): Likewise.
19709 (vshrq_n_s8): Likewise.
19710 (vshrq_n_s16): Likewise.
19711 (vshrq_n_s32): Likewise.
19712 (vshrq_n_u8): Likewise.
19713 (vshrq_n_u16): Likewise.
19714 (vshrq_n_u32): Likewise.
19715 (__arm_vcreateq_u8): Define intrinsic.
19716 (__arm_vcreateq_u16): Likewise.
19717 (__arm_vcreateq_u32): Likewise.
19718 (__arm_vcreateq_u64): Likewise.
19719 (__arm_vcreateq_s8): Likewise.
19720 (__arm_vcreateq_s16): Likewise.
19721 (__arm_vcreateq_s32): Likewise.
19722 (__arm_vcreateq_s64): Likewise.
19723 (__arm_vshrq_n_s8): Likewise.
19724 (__arm_vshrq_n_s16): Likewise.
19725 (__arm_vshrq_n_s32): Likewise.
19726 (__arm_vshrq_n_u8): Likewise.
19727 (__arm_vshrq_n_u16): Likewise.
19728 (__arm_vshrq_n_u32): Likewise.
19729 (__arm_vcvtq_n_s16_f16): Likewise.
19730 (__arm_vcvtq_n_s32_f32): Likewise.
19731 (__arm_vcvtq_n_u16_f16): Likewise.
19732 (__arm_vcvtq_n_u32_f32): Likewise.
19733 (vshrq_n): Define polymorphic variant.
19734 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
19736 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
19737 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
19738 * config/arm/constraints.md (Rb): Define constraint to check constant is
19739 in the range of 1 to 8.
19740 (Rf): Define constraint to check constant is in the range of 1 to 32.
19741 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
19742 (mve_vshrq_n_<supf><mode>): Likewise.
19743 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
19744 * config/arm/predicates.md (mve_imm_8): Define predicate to check
19745 the matching constraint Rb.
19746 (mve_imm_32): Define predicate to check the matching constraint Rf.
19748 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19749 Mihail Ionescu <mihail.ionescu@arm.com>
19750 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19752 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
19753 qualifier for binary operands.
19754 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
19755 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
19756 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
19757 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
19758 (vsubq_n_f32): Likewise.
19759 (vbrsrq_n_f16): Likewise.
19760 (vbrsrq_n_f32): Likewise.
19761 (vcvtq_n_f16_s16): Likewise.
19762 (vcvtq_n_f32_s32): Likewise.
19763 (vcvtq_n_f16_u16): Likewise.
19764 (vcvtq_n_f32_u32): Likewise.
19765 (vcreateq_f16): Likewise.
19766 (vcreateq_f32): Likewise.
19767 (__arm_vsubq_n_f16): Define intrinsic.
19768 (__arm_vsubq_n_f32): Likewise.
19769 (__arm_vbrsrq_n_f16): Likewise.
19770 (__arm_vbrsrq_n_f32): Likewise.
19771 (__arm_vcvtq_n_f16_s16): Likewise.
19772 (__arm_vcvtq_n_f32_s32): Likewise.
19773 (__arm_vcvtq_n_f16_u16): Likewise.
19774 (__arm_vcvtq_n_f32_u32): Likewise.
19775 (__arm_vcreateq_f16): Likewise.
19776 (__arm_vcreateq_f32): Likewise.
19777 (vsubq): Define polymorphic variant.
19778 (vbrsrq): Likewise.
19779 (vcvtq_n): Likewise.
19780 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
19782 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
19783 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
19784 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
19785 * config/arm/constraints.md (Rd): Define constraint to check constant is
19786 in the range of 1 to 16.
19787 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
19788 mve_vbrsrq_n_f<mode>: Likewise.
19789 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
19790 mve_vcreateq_f<mode>: Likewise.
19791 * config/arm/predicates.md (mve_imm_16): Define predicate to check
19792 the matching constraint Rd.
19794 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19795 Mihail Ionescu <mihail.ionescu@arm.com>
19796 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19798 * config/arm/arm-builtins.c (hi_UP): Define mode.
19799 * config/arm/arm.h (IS_VPR_REGNUM): Move.
19800 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
19801 (APSRQ_REGNUM): Modify.
19802 (APSRGE_REGNUM): Modify.
19803 * config/arm/arm_mve.h (vctp16q): Define macro.
19804 (vctp32q): Likewise.
19805 (vctp64q): Likewise.
19806 (vctp8q): Likewise.
19808 (__arm_vctp16q): Define intrinsic.
19809 (__arm_vctp32q): Likewise.
19810 (__arm_vctp64q): Likewise.
19811 (__arm_vctp8q): Likewise.
19812 (__arm_vpnot): Likewise.
19813 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
19815 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
19816 (mve_vpnothi): Likewise.
19818 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19819 Mihail Ionescu <mihail.ionescu@arm.com>
19820 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19822 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
19823 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
19824 (vdupq_n_s16): Likewise.
19825 (vdupq_n_s32): Likewise.
19826 (vabsq_s8): Likewise.
19827 (vabsq_s16): Likewise.
19828 (vabsq_s32): Likewise.
19829 (vclsq_s8): Likewise.
19830 (vclsq_s16): Likewise.
19831 (vclsq_s32): Likewise.
19832 (vclzq_s8): Likewise.
19833 (vclzq_s16): Likewise.
19834 (vclzq_s32): Likewise.
19835 (vnegq_s8): Likewise.
19836 (vnegq_s16): Likewise.
19837 (vnegq_s32): Likewise.
19838 (vaddlvq_s32): Likewise.
19839 (vaddvq_s8): Likewise.
19840 (vaddvq_s16): Likewise.
19841 (vaddvq_s32): Likewise.
19842 (vmovlbq_s8): Likewise.
19843 (vmovlbq_s16): Likewise.
19844 (vmovltq_s8): Likewise.
19845 (vmovltq_s16): Likewise.
19846 (vmvnq_s8): Likewise.
19847 (vmvnq_s16): Likewise.
19848 (vmvnq_s32): Likewise.
19849 (vrev16q_s8): Likewise.
19850 (vrev32q_s8): Likewise.
19851 (vrev32q_s16): Likewise.
19852 (vqabsq_s8): Likewise.
19853 (vqabsq_s16): Likewise.
19854 (vqabsq_s32): Likewise.
19855 (vqnegq_s8): Likewise.
19856 (vqnegq_s16): Likewise.
19857 (vqnegq_s32): Likewise.
19858 (vcvtaq_s16_f16): Likewise.
19859 (vcvtaq_s32_f32): Likewise.
19860 (vcvtnq_s16_f16): Likewise.
19861 (vcvtnq_s32_f32): Likewise.
19862 (vcvtpq_s16_f16): Likewise.
19863 (vcvtpq_s32_f32): Likewise.
19864 (vcvtmq_s16_f16): Likewise.
19865 (vcvtmq_s32_f32): Likewise.
19866 (vmvnq_u8): Likewise.
19867 (vmvnq_u16): Likewise.
19868 (vmvnq_u32): Likewise.
19869 (vdupq_n_u8): Likewise.
19870 (vdupq_n_u16): Likewise.
19871 (vdupq_n_u32): Likewise.
19872 (vclzq_u8): Likewise.
19873 (vclzq_u16): Likewise.
19874 (vclzq_u32): Likewise.
19875 (vaddvq_u8): Likewise.
19876 (vaddvq_u16): Likewise.
19877 (vaddvq_u32): Likewise.
19878 (vrev32q_u8): Likewise.
19879 (vrev32q_u16): Likewise.
19880 (vmovltq_u8): Likewise.
19881 (vmovltq_u16): Likewise.
19882 (vmovlbq_u8): Likewise.
19883 (vmovlbq_u16): Likewise.
19884 (vrev16q_u8): Likewise.
19885 (vaddlvq_u32): Likewise.
19886 (vcvtpq_u16_f16): Likewise.
19887 (vcvtpq_u32_f32): Likewise.
19888 (vcvtnq_u16_f16): Likewise.
19889 (vcvtmq_u16_f16): Likewise.
19890 (vcvtmq_u32_f32): Likewise.
19891 (vcvtaq_u16_f16): Likewise.
19892 (vcvtaq_u32_f32): Likewise.
19893 (__arm_vdupq_n_s8): Define intrinsic.
19894 (__arm_vdupq_n_s16): Likewise.
19895 (__arm_vdupq_n_s32): Likewise.
19896 (__arm_vabsq_s8): Likewise.
19897 (__arm_vabsq_s16): Likewise.
19898 (__arm_vabsq_s32): Likewise.
19899 (__arm_vclsq_s8): Likewise.
19900 (__arm_vclsq_s16): Likewise.
19901 (__arm_vclsq_s32): Likewise.
19902 (__arm_vclzq_s8): Likewise.
19903 (__arm_vclzq_s16): Likewise.
19904 (__arm_vclzq_s32): Likewise.
19905 (__arm_vnegq_s8): Likewise.
19906 (__arm_vnegq_s16): Likewise.
19907 (__arm_vnegq_s32): Likewise.
19908 (__arm_vaddlvq_s32): Likewise.
19909 (__arm_vaddvq_s8): Likewise.
19910 (__arm_vaddvq_s16): Likewise.
19911 (__arm_vaddvq_s32): Likewise.
19912 (__arm_vmovlbq_s8): Likewise.
19913 (__arm_vmovlbq_s16): Likewise.
19914 (__arm_vmovltq_s8): Likewise.
19915 (__arm_vmovltq_s16): Likewise.
19916 (__arm_vmvnq_s8): Likewise.
19917 (__arm_vmvnq_s16): Likewise.
19918 (__arm_vmvnq_s32): Likewise.
19919 (__arm_vrev16q_s8): Likewise.
19920 (__arm_vrev32q_s8): Likewise.
19921 (__arm_vrev32q_s16): Likewise.
19922 (__arm_vqabsq_s8): Likewise.
19923 (__arm_vqabsq_s16): Likewise.
19924 (__arm_vqabsq_s32): Likewise.
19925 (__arm_vqnegq_s8): Likewise.
19926 (__arm_vqnegq_s16): Likewise.
19927 (__arm_vqnegq_s32): Likewise.
19928 (__arm_vmvnq_u8): Likewise.
19929 (__arm_vmvnq_u16): Likewise.
19930 (__arm_vmvnq_u32): Likewise.
19931 (__arm_vdupq_n_u8): Likewise.
19932 (__arm_vdupq_n_u16): Likewise.
19933 (__arm_vdupq_n_u32): Likewise.
19934 (__arm_vclzq_u8): Likewise.
19935 (__arm_vclzq_u16): Likewise.
19936 (__arm_vclzq_u32): Likewise.
19937 (__arm_vaddvq_u8): Likewise.
19938 (__arm_vaddvq_u16): Likewise.
19939 (__arm_vaddvq_u32): Likewise.
19940 (__arm_vrev32q_u8): Likewise.
19941 (__arm_vrev32q_u16): Likewise.
19942 (__arm_vmovltq_u8): Likewise.
19943 (__arm_vmovltq_u16): Likewise.
19944 (__arm_vmovlbq_u8): Likewise.
19945 (__arm_vmovlbq_u16): Likewise.
19946 (__arm_vrev16q_u8): Likewise.
19947 (__arm_vaddlvq_u32): Likewise.
19948 (__arm_vcvtpq_u16_f16): Likewise.
19949 (__arm_vcvtpq_u32_f32): Likewise.
19950 (__arm_vcvtnq_u16_f16): Likewise.
19951 (__arm_vcvtmq_u16_f16): Likewise.
19952 (__arm_vcvtmq_u32_f32): Likewise.
19953 (__arm_vcvtaq_u16_f16): Likewise.
19954 (__arm_vcvtaq_u32_f32): Likewise.
19955 (__arm_vcvtaq_s16_f16): Likewise.
19956 (__arm_vcvtaq_s32_f32): Likewise.
19957 (__arm_vcvtnq_s16_f16): Likewise.
19958 (__arm_vcvtnq_s32_f32): Likewise.
19959 (__arm_vcvtpq_s16_f16): Likewise.
19960 (__arm_vcvtpq_s32_f32): Likewise.
19961 (__arm_vcvtmq_s16_f16): Likewise.
19962 (__arm_vcvtmq_s32_f32): Likewise.
19963 (vdupq_n): Define polymorphic variant.
19968 (vaddlvq): Likewise.
19969 (vaddvq): Likewise.
19970 (vmovlbq): Likewise.
19971 (vmovltq): Likewise.
19973 (vrev16q): Likewise.
19974 (vrev32q): Likewise.
19975 (vqabsq): Likewise.
19976 (vqnegq): Likewise.
19977 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
19978 (UNOP_SNONE_NONE): Likewise.
19979 (UNOP_UNONE_UNONE): Likewise.
19980 (UNOP_UNONE_NONE): Likewise.
19981 * config/arm/constraints.md (e): Define new constriant to allow only
19983 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
19984 (mve_vnegq_s<mode>): Likewise.
19985 (mve_vmvnq_<supf><mode>): Likewise.
19986 (mve_vdupq_n_<supf><mode>): Likewise.
19987 (mve_vclzq_<supf><mode>): Likewise.
19988 (mve_vclsq_s<mode>): Likewise.
19989 (mve_vaddvq_<supf><mode>): Likewise.
19990 (mve_vabsq_s<mode>): Likewise.
19991 (mve_vrev32q_<supf><mode>): Likewise.
19992 (mve_vmovltq_<supf><mode>): Likewise.
19993 (mve_vmovlbq_<supf><mode>): Likewise.
19994 (mve_vcvtpq_<supf><mode>): Likewise.
19995 (mve_vcvtnq_<supf><mode>): Likewise.
19996 (mve_vcvtmq_<supf><mode>): Likewise.
19997 (mve_vcvtaq_<supf><mode>): Likewise.
19998 (mve_vrev16q_<supf>v16qi): Likewise.
19999 (mve_vaddlvq_<supf>v4si): Likewise.
20001 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20003 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
20005 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
20007 * read-rtl-function.c (find_param_by_name,
20008 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
20010 * spellcheck.c (get_edit_distance_cutoff): Likewise.
20011 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
20012 * tree.def (SWITCH_EXPR): Likewise.
20013 * selftest.c (assert_str_contains): Likewise.
20014 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
20016 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
20017 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
20018 * langhooks.h (struct lang_hooks_for_decls): Likewise.
20019 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
20020 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
20022 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
20023 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
20024 * tree.c (component_ref_size): Likewise.
20025 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
20026 * gimple-ssa-sprintf.c (get_string_length, format_string,
20027 format_directive): Likewise.
20028 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
20029 * input.c (string_concat_db::get_string_concatenation,
20030 test_lexer_string_locations_ucn4): Likewise.
20031 * cfgexpand.c (pass_expand::execute): Likewise.
20032 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
20033 maybe_diag_overlap): Likewise.
20034 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
20035 * shrink-wrap.c (spread_components): Likewise.
20036 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
20038 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
20040 * dwarf2out.c (dwarf2out_early_finish): Likewise.
20041 * gimple-ssa-store-merging.c: Likewise.
20042 * ira-costs.c (record_operand_costs): Likewise.
20043 * tree-vect-loop.c (vectorizable_reduction): Likewise.
20044 * target.def (dispatch): Likewise.
20045 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
20046 in documentation text.
20047 * doc/tm.texi: Regenerated.
20048 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
20049 duplicated word issue in a comment.
20050 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
20051 * config/i386/i386-features.c (remove_partial_avx_dependency):
20053 * config/msp430/msp430.c (msp430_select_section): Likewise.
20054 * config/gcn/gcn-run.c (load_image): Likewise.
20055 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
20056 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
20057 * config/aarch64/falkor-tag-collision-avoidance.c
20058 (single_dest_per_chain): Likewise.
20059 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
20060 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
20061 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
20062 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
20064 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
20065 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
20066 * config/rs6000/rs6000-logue.c
20067 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
20068 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
20069 Fix various other issues in the comment.
20071 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
20073 * config/arm/t-rmprofile: create new multilib for
20074 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
20077 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20079 PR tree-optimization/94015
20080 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
20081 function where EXP is address of the bytes being stored rather than
20082 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
20083 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
20084 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
20085 calling native_encode_expr if host or target doesn't have 8-bit
20086 chars. Formatting fixes.
20087 (count_nonzero_bytes_addr): New function.
20089 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20090 Mihail Ionescu <mihail.ionescu@arm.com>
20091 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20093 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
20094 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
20095 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
20096 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
20097 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
20098 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
20099 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
20100 (vmvnq_n_s32): Likewise.
20101 (vrev64q_s8): Likewise.
20102 (vrev64q_s16): Likewise.
20103 (vrev64q_s32): Likewise.
20104 (vcvtq_s16_f16): Likewise.
20105 (vcvtq_s32_f32): Likewise.
20106 (vrev64q_u8): Likewise.
20107 (vrev64q_u16): Likewise.
20108 (vrev64q_u32): Likewise.
20109 (vmvnq_n_u16): Likewise.
20110 (vmvnq_n_u32): Likewise.
20111 (vcvtq_u16_f16): Likewise.
20112 (vcvtq_u32_f32): Likewise.
20113 (__arm_vmvnq_n_s16): Define intrinsic.
20114 (__arm_vmvnq_n_s32): Likewise.
20115 (__arm_vrev64q_s8): Likewise.
20116 (__arm_vrev64q_s16): Likewise.
20117 (__arm_vrev64q_s32): Likewise.
20118 (__arm_vrev64q_u8): Likewise.
20119 (__arm_vrev64q_u16): Likewise.
20120 (__arm_vrev64q_u32): Likewise.
20121 (__arm_vmvnq_n_u16): Likewise.
20122 (__arm_vmvnq_n_u32): Likewise.
20123 (__arm_vcvtq_s16_f16): Likewise.
20124 (__arm_vcvtq_s32_f32): Likewise.
20125 (__arm_vcvtq_u16_f16): Likewise.
20126 (__arm_vcvtq_u32_f32): Likewise.
20127 (vrev64q): Define polymorphic variant.
20128 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
20129 (UNOP_SNONE_NONE): Likewise.
20130 (UNOP_SNONE_IMM): Likewise.
20131 (UNOP_UNONE_UNONE): Likewise.
20132 (UNOP_UNONE_NONE): Likewise.
20133 (UNOP_UNONE_IMM): Likewise.
20134 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
20135 (mve_vcvtq_from_f_<supf><mode>): Likewise.
20136 (mve_vmvnq_n_<supf><mode>): Likewise.
20138 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20139 Mihail Ionescu <mihail.ionescu@arm.com>
20140 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20142 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
20143 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
20144 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
20145 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
20146 (vrndxq_f32): Likewise.
20147 (vrndq_f16) Likewise.
20148 (vrndq_f32): Likewise.
20149 (vrndpq_f16): Likewise.
20150 (vrndpq_f32): Likewise.
20151 (vrndnq_f16): Likewise.
20152 (vrndnq_f32): Likewise.
20153 (vrndmq_f16): Likewise.
20154 (vrndmq_f32): Likewise.
20155 (vrndaq_f16): Likewise.
20156 (vrndaq_f32): Likewise.
20157 (vrev64q_f16): Likewise.
20158 (vrev64q_f32): Likewise.
20159 (vnegq_f16): Likewise.
20160 (vnegq_f32): Likewise.
20161 (vdupq_n_f16): Likewise.
20162 (vdupq_n_f32): Likewise.
20163 (vabsq_f16): Likewise.
20164 (vabsq_f32): Likewise.
20165 (vrev32q_f16): Likewise.
20166 (vcvttq_f32_f16): Likewise.
20167 (vcvtbq_f32_f16): Likewise.
20168 (vcvtq_f16_s16): Likewise.
20169 (vcvtq_f32_s32): Likewise.
20170 (vcvtq_f16_u16): Likewise.
20171 (vcvtq_f32_u32): Likewise.
20172 (__arm_vrndxq_f16): Define intrinsic.
20173 (__arm_vrndxq_f32): Likewise.
20174 (__arm_vrndq_f16): Likewise.
20175 (__arm_vrndq_f32): Likewise.
20176 (__arm_vrndpq_f16): Likewise.
20177 (__arm_vrndpq_f32): Likewise.
20178 (__arm_vrndnq_f16): Likewise.
20179 (__arm_vrndnq_f32): Likewise.
20180 (__arm_vrndmq_f16): Likewise.
20181 (__arm_vrndmq_f32): Likewise.
20182 (__arm_vrndaq_f16): Likewise.
20183 (__arm_vrndaq_f32): Likewise.
20184 (__arm_vrev64q_f16): Likewise.
20185 (__arm_vrev64q_f32): Likewise.
20186 (__arm_vnegq_f16): Likewise.
20187 (__arm_vnegq_f32): Likewise.
20188 (__arm_vdupq_n_f16): Likewise.
20189 (__arm_vdupq_n_f32): Likewise.
20190 (__arm_vabsq_f16): Likewise.
20191 (__arm_vabsq_f32): Likewise.
20192 (__arm_vrev32q_f16): Likewise.
20193 (__arm_vcvttq_f32_f16): Likewise.
20194 (__arm_vcvtbq_f32_f16): Likewise.
20195 (__arm_vcvtq_f16_s16): Likewise.
20196 (__arm_vcvtq_f32_s32): Likewise.
20197 (__arm_vcvtq_f16_u16): Likewise.
20198 (__arm_vcvtq_f32_u32): Likewise.
20199 (vrndxq): Define polymorphic variants.
20201 (vrndpq): Likewise.
20202 (vrndnq): Likewise.
20203 (vrndmq): Likewise.
20204 (vrndaq): Likewise.
20205 (vrev64q): Likewise.
20208 (vrev32q): Likewise.
20209 (vcvtbq_f32): Likewise.
20210 (vcvttq_f32): Likewise.
20212 * config/arm/arm_mve_builtins.def (VAR2): Define.
20214 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
20215 (mve_vrndq_f<mode>): Likewise.
20216 (mve_vrndpq_f<mode>): Likewise.
20217 (mve_vrndnq_f<mode>): Likewise.
20218 (mve_vrndmq_f<mode>): Likewise.
20219 (mve_vrndaq_f<mode>): Likewise.
20220 (mve_vrev64q_f<mode>): Likewise.
20221 (mve_vnegq_f<mode>): Likewise.
20222 (mve_vdupq_n_f<mode>): Likewise.
20223 (mve_vabsq_f<mode>): Likewise.
20224 (mve_vrev32q_fv8hf): Likewise.
20225 (mve_vcvttq_f32_f16v4sf): Likewise.
20226 (mve_vcvtbq_f32_f16v4sf): Likewise.
20227 (mve_vcvtq_to_f_<supf><mode>): Likewise.
20229 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20230 Mihail Ionescu <mihail.ionescu@arm.com>
20231 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20233 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
20235 (ARM_BUILTIN_MVE_PATTERN_START): Define.
20236 (arm_init_mve_builtins): Define function.
20237 (arm_init_builtins): Add TARGET_HAVE_MVE check.
20238 (arm_expand_builtin_1): Check the range of fcode.
20239 (arm_expand_mve_builtin): Define function to expand MVE builtins.
20240 (arm_expand_builtin): Check the range of fcode.
20241 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
20243 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
20244 (vst4q_s8): Define macro.
20245 (vst4q_s16): Likewise.
20246 (vst4q_s32): Likewise.
20247 (vst4q_u8): Likewise.
20248 (vst4q_u16): Likewise.
20249 (vst4q_u32): Likewise.
20250 (vst4q_f16): Likewise.
20251 (vst4q_f32): Likewise.
20252 (__arm_vst4q_s8): Define inline builtin.
20253 (__arm_vst4q_s16): Likewise.
20254 (__arm_vst4q_s32): Likewise.
20255 (__arm_vst4q_u8): Likewise.
20256 (__arm_vst4q_u16): Likewise.
20257 (__arm_vst4q_u32): Likewise.
20258 (__arm_vst4q_f16): Likewise.
20259 (__arm_vst4q_f32): Likewise.
20260 (__ARM_mve_typeid): Define macro with MVE types.
20261 (__ARM_mve_coerce): Define macro with _Generic feature.
20262 (vst4q): Define polymorphic variant for different vst4q builtins.
20263 * config/arm/arm_mve_builtins.def: New file.
20264 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
20266 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
20267 (unspec): Define unspec.
20268 (mve_vst4q<mode>): Define RTL pattern.
20269 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
20271 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
20273 (define_split): Allow OI mode split for MVE after reload.
20274 (define_split): Allow XI mode split for MVE after reload.
20275 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
20276 (arm-builtins.o): Likewise.
20278 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
20280 * c-typeck.c (process_init_element): Handle constructor_type with
20281 type size represented by POLY_INT_CST.
20283 2020-03-17 Jakub Jelinek <jakub@redhat.com>
20285 PR tree-optimization/94187
20286 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
20287 nchars - offset < nbytes.
20289 PR middle-end/94189
20290 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
20291 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
20292 for code-generation.
20294 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
20297 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
20298 after changing memory subreg.
20300 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20301 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20303 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
20304 emulator calls for dobule precision arithmetic operations for MVE.
20306 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20307 Mihail Ionescu <mihail.ionescu@arm.com>
20308 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20310 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
20311 feature bit is on and -mfpu=auto is passed as compiler option, do not
20312 generate error on not finding any matching fpu. Because in this case
20313 fpu is not required.
20314 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
20315 enabled for MVE and also for all VFP extensions.
20316 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
20318 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
20319 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
20320 along with feature bits mve_float.
20321 (mve): Modify add options in armv8.1-m.main arch for MVE.
20322 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
20324 * config/arm/arm.c (use_return_insn): Replace the
20325 check with TARGET_VFP_BASE.
20326 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
20328 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
20329 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
20331 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
20332 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
20334 (arm_compute_frame_layout): Likewise.
20335 (arm_save_coproc_regs): Likewise.
20336 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
20338 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
20339 with equivalent macro TARGET_VFP_BASE.
20340 (arm_expand_epilogue_apcs_frame): Likewise.
20341 (arm_expand_epilogue): Likewise.
20342 (arm_conditional_register_usage): Likewise.
20343 (arm_declare_function_name): Add check to skip printing .fpu directive
20344 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
20346 * config/arm/arm.h (TARGET_VFP_BASE): Define.
20347 * config/arm/arm.md (arch): Add "mve" to arch.
20348 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
20349 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
20350 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
20351 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
20353 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
20354 to not allow for MVE.
20355 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
20357 (VUNSPEC_GET_FPSCR): Define.
20358 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
20359 instructions which move to general-purpose Register from Floating-point
20360 Special register and vice-versa.
20361 (thumb2_movhi_fp16): Likewise.
20362 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
20363 with MCR and MRC instructions which set and get Floating-point Status
20364 and Control Register (FPSCR).
20365 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
20367 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
20368 float move patterns in MVE.
20369 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
20370 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
20371 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
20372 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
20373 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
20374 TARGET_VFP_BASE check.
20375 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
20376 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
20378 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
20379 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
20383 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
20384 Mihail Ionescu <mihail.ionescu@arm.com>
20385 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
20387 * config.gcc (arm_mve.h): Include mve intrinsics header file.
20388 * config/arm/aout.h (p0): Add new register name for MVE predicated
20390 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
20391 common to Neon and MVE.
20392 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
20393 (arm_init_simd_builtin_types): Disable poly types for MVE.
20394 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
20395 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
20396 ARM_BUILTIN_NEON_LANE_CHECK.
20397 (mve_dereference_pointer): Add function.
20398 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
20400 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
20401 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
20402 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
20403 with floating point enabled.
20404 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
20405 simd_immediate_valid_for_move.
20406 (simd_immediate_valid_for_move): Renamed from
20407 neon_immediate_valid_for_move function.
20408 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
20409 error if vfpv2 feature bit is disabled and mve feature bit is also
20410 disabled for HARD_FLOAT_ABI.
20411 (use_return_insn): Check to not push VFP regs for MVE.
20412 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
20414 (aapcs_vfp_allocate_return_reg): Likewise.
20415 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
20416 address operand for MVE.
20417 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
20418 (neon_valid_immediate): Rename to simd_valid_immediate.
20419 (simd_valid_immediate): Rename from neon_valid_immediate.
20420 (simd_valid_immediate): MVE check on size of vector is 128 bits.
20421 (neon_immediate_valid_for_move): Rename to
20422 simd_immediate_valid_for_move.
20423 (simd_immediate_valid_for_move): Rename from
20424 neon_immediate_valid_for_move.
20425 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
20427 (neon_make_constant): Modify call to neon_valid_immediate function.
20428 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
20430 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
20431 (arm_compute_frame_layout): Calculate space for saved VFP registers for
20433 (arm_save_coproc_regs): Save coproc registers for MVE.
20434 (arm_print_operand): Add case 'E' to print memory operands for MVE.
20435 (arm_print_operand_address): Check to print register number for MVE.
20436 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
20437 (arm_modes_tieable_p): Check to allow structure mode for MVE.
20438 (arm_regno_class): Add VPR_REGNUM check.
20439 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
20441 (arm_expand_epilogue): MVE check for enabling pop instructions in
20443 (arm_print_asm_arch_directives): Modify function to disable print of
20444 .arch_extension "mve" and "fp" for cases where MVE is enabled with
20446 (arm_vector_mode_supported_p): Check for modes available in MVE interger
20447 and MVE floating point.
20448 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
20450 (arm_conditional_register_usage): Enable usage of conditional regsiter
20452 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
20453 (arm_declare_function_name): Modify function to disable print of
20454 .arch_extension "mve" and "fp" for cases where MVE is enabled with
20456 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
20457 when target general registers are required.
20458 (TARGET_HAVE_MVE_FLOAT): Likewise.
20459 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
20461 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
20462 which indicate this is not available for across function calls.
20463 (FIRST_PSEUDO_REGISTER): Modify.
20464 (VALID_MVE_MODE): Define valid MVE mode.
20465 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
20466 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
20467 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
20468 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
20470 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
20471 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
20472 (enum reg_class): Add VPR_REG entry.
20473 (REG_CLASS_NAMES): Add VPR_REG entry.
20474 * config/arm/arm.md (VPR_REGNUM): Define.
20475 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
20476 "unconditional" instructions.
20477 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
20478 (movdf_soft_insn): Modify RTL to not allow for MVE.
20479 (vfp_pop_multiple_with_writeback): Enable for MVE.
20480 (include "mve.md"): Include mve.md file.
20481 * config/arm/arm_mve.h: Add MVE intrinsics head file.
20482 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
20483 for vector predicated operands.
20484 * config/arm/iterators.md (VNIM1): Define.
20485 (VNINOTM1): Define.
20486 (VHFBF_split): Define
20487 * config/arm/mve.md: New file.
20488 (mve_mov<mode>): Define RTL for move, store and load in MVE.
20489 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
20491 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
20492 simd_immediate_valid_for_move.
20493 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
20494 is common to MVE and NEON to vec-common.md file.
20495 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
20496 * config/arm/predicates.md (vpr_register_operand): Define.
20497 * config/arm/t-arm: Add mve.md file.
20498 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
20500 (mve_store): Add MVE instructions mve_store to attribute "type".
20501 (mve_load): Add MVE instructions mve_load to attribute "type".
20502 (is_mve_type): Define attribute.
20503 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
20504 standard move patterns in MVE along with NEON and IWMMXT with mode
20506 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
20507 and IWMMXT with mode iterator V8HF.
20508 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
20510 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
20511 simd_immediate_valid_for_move.
20514 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
20517 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
20518 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
20520 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
20522 2020-03-16 Jakub Jelinek <jakub@redhat.com>
20525 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
20528 PR tree-optimization/94166
20529 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
20530 as secondary comparison key.
20532 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
20534 PR tree-optimization/94125
20535 * tree-loop-distribution.c
20536 (loop_distribution::break_alias_scc_partitions): Update post order
20537 number for merged scc.
20539 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
20542 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
20544 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
20545 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
20546 and ext_sse_reg_operand check.
20548 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
20550 * common.opt: Avoid redundancy in the help text.
20551 * config/arc/arc.opt: Likewise.
20552 * config/cr16/cr16.opt: Likewise.
20554 2020-03-14 Jakub Jelinek <jakub@redhat.com>
20556 PR middle-end/93566
20557 * tree-nested.c (convert_nonlocal_omp_clauses,
20558 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
20559 with C/C++ array sections.
20561 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
20564 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
20565 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
20568 2020-03-14 Jakub Jelinek <jakub@redhat.com>
20570 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
20571 "a an" to "an" in a comment.
20572 * hsa-common.h (is_a_helper): Likewise.
20573 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
20574 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
20575 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
20577 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
20580 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
20581 64-bit value by 64 bits (UB).
20583 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
20585 PR rtl-optimization/92303
20586 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
20588 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
20590 PR rtl-optimization/94148
20591 PR rtl-optimization/94042
20592 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
20593 (df_worklist_propagate_forward): New parameter last_change_age, use
20594 that instead of bb->aux.
20595 (df_worklist_propagate_backward): Ditto.
20596 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
20598 2020-03-13 Richard Biener <rguenther@suse.de>
20600 PR tree-optimization/94163
20601 * tree-ssa-pre.c (create_expression_by_pieces): Check
20602 whether alignment would be zero.
20604 2020-03-13 Martin Liska <mliska@suse.cz>
20607 * lto-wrapper.c (run_gcc): Use concat for appending
20608 to collect_gcc_options.
20610 2020-03-13 Jakub Jelinek <jakub@redhat.com>
20613 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
20614 instead of GEN_INT.
20616 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
20619 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
20620 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
20621 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
20622 TARGET_AVX512VL and ext_sse_reg_operand check.
20624 2020-03-13 Bu Le <bule1@huawei.com>
20627 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
20628 (-param=aarch64-double-recp-precision=): New options.
20629 * doc/invoke.texi: Document them.
20630 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
20631 instead of hard-coding the choice of 1 for float and 2 for double.
20633 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
20635 PR rtl-optimization/94119
20636 * resource.h (clear_hashed_info_until_next_barrier): Declare.
20637 * resource.c (clear_hashed_info_until_next_barrier): New function.
20638 * reorg.c (add_to_delay_list): Fix formatting.
20639 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
20640 the next instruction after removing a BARRIER.
20642 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
20644 PR middle-end/92071
20645 * expmed.c (store_integral_bit_field): For fields larger than a word,
20646 call extract_bit_field on the value if the mode is BLKmode. Remove
20647 specific path for big-endian targets and tidy things up a little bit.
20649 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
20651 PR rtl-optimization/90275
20652 * cse.c (cse_insn): Delete no-op register moves too.
20654 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
20656 * config/rx/rx.md (CTRLREG_CPEN): Remove.
20657 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
20659 2020-03-12 Richard Biener <rguenther@suse.de>
20661 PR tree-optimization/94103
20662 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
20663 punning when the mode precision is not sufficient.
20665 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
20668 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
20669 MODE_V1DF and MODE_V2SF.
20670 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
20671 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
20674 2020-03-12 Jakub Jelinek <jakub@redhat.com>
20676 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
20677 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
20678 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
20679 * doc/tm.texi: Regenerated.
20681 PR tree-optimization/94130
20682 * tree-ssa-dse.c: Include gimplify.h.
20683 (increment_start_addr): If stmt has lhs, drop the lhs from call and
20684 set it after the call to the original value of the first argument.
20686 (decrement_count): Formatting fix.
20688 2020-03-11 Delia Burduv <delia.burduv@arm.com>
20690 * config/arm/arm-builtins.c
20691 (arm_init_simd_builtin_scalar_types): New.
20692 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
20693 (vld2q_bf16): Used new builtin type.
20694 (vld3_bf16): Used new builtin type.
20695 (vld3q_bf16): Used new builtin type.
20696 (vld4_bf16): Used new builtin type.
20697 (vld4q_bf16): Used new builtin type.
20698 (vld2_dup_bf16): Used new builtin type.
20699 (vld2q_dup_bf16): Used new builtin type.
20700 (vld3_dup_bf16): Used new builtin type.
20701 (vld3q_dup_bf16): Used new builtin type.
20702 (vld4_dup_bf16): Used new builtin type.
20703 (vld4q_dup_bf16): Used new builtin type.
20705 2020-03-11 Jakub Jelinek <jakub@redhat.com>
20708 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
20709 at the start to switch to data section. Don't print extra newline if
20710 .globl directive has not been emitted.
20712 2020-03-11 Richard Biener <rguenther@suse.de>
20714 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
20717 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
20719 PR middle-end/93961
20720 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
20721 whose type is a qualified union.
20723 2020-03-11 Jakub Jelinek <jakub@redhat.com>
20726 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
20727 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
20730 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
20732 (get_nth_most_common_value): Use abs_hwi instead of abs.
20734 PR middle-end/94111
20735 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
20736 is rvc_normal, otherwise use real_to_decimal to print the number to
20739 PR tree-optimization/94114
20740 * tree-loop-distribution.c (generate_memset_builtin): Call
20741 rewrite_to_non_trapping_overflow even on mem.
20742 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
20745 2020-03-10 Jeff Law <law@redhat.com>
20747 * config/bfin/bfin.md (movsi_insv): Add length attribute.
20749 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
20752 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
20753 NAN and SIGNED_ZEROR for smax/smin.
20755 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
20758 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
20759 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
20761 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
20763 * loop-iv.c (find_simple_exit): Make it static.
20764 * cfgloop.h: Remove the corresponding prototype.
20766 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
20768 * ddg.c (create_ddg): Fix intendation.
20769 (set_recurrence_length): Likewise.
20770 (create_ddg_all_sccs): Likewise.
20772 2020-03-10 Jakub Jelinek <jakub@redhat.com>
20775 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
20776 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
20779 2020-03-09 Jason Merrill <jason@redhat.com>
20781 * gdbinit.in (pgs): Fix typo in documentation.
20783 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
20787 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
20789 PR rtl-optimization/93564
20790 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
20791 do not honor reg alloc order.
20793 2020-03-09 Andrew Pinski <apinski@marvell.com>
20795 PR inline-asm/94095
20796 * doc/extend.texi (x86 Operand Modifiers): Fix column
20799 2020-03-09 Martin Liska <mliska@suse.cz>
20802 * config/rs6000/rs6000.c (rs6000_option_override_internal):
20803 Remove set of str_align_loops and str_align_jumps as these
20804 should be set in previous 2 conditions in the function.
20806 2020-03-09 Jakub Jelinek <jakub@redhat.com>
20808 PR rtl-optimization/94045
20809 * params.opt (-param=max-find-base-term-values=): New option.
20810 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
20811 in a single toplevel find_base_term call.
20813 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
20816 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
20817 * config/aarch64/aarch64-simd.md
20818 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
20819 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
20820 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
20821 * config/aarch64/arm_neon.h:
20822 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
20823 (vmlal_lane_u16): Likewise.
20824 (vmlal_lane_s32): Likewise.
20825 (vmlal_lane_u32): Likewise.
20826 (vmlal_laneq_s16): Likewise.
20827 (vmlal_laneq_u16): Likewise.
20828 (vmlal_laneq_s32): Likewise.
20829 (vmlal_laneq_u32): Likewise.
20830 (vmull_lane_s16): Likewise.
20831 (vmull_lane_u16): Likewise.
20832 (vmull_lane_s32): Likewise.
20833 (vmull_lane_u32): Likewise.
20834 (vmull_laneq_s16): Likewise.
20835 (vmull_laneq_u16): Likewise.
20836 (vmull_laneq_s32): Likewise.
20837 (vmull_laneq_u32): Likewise.
20838 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
20841 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
20843 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
20844 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
20845 (aarch64_mls_elt<mode>): Likewise.
20846 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
20847 (aarch64_fma4_elt<mode>): Likewise.
20848 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
20849 (aarch64_fma4_elt_to_64v2df): Likewise.
20850 (aarch64_fnma4_elt<mode>): Likewise.
20851 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
20852 (aarch64_fnma4_elt_to_64v2df): Likewise.
20854 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20856 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
20857 Specify movprfx attribute.
20858 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
20860 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
20863 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
20865 (TARGET_NO_FP_IN_TOC): Same.
20866 * config/rs6000/aix71.h: Same.
20867 * config/rs6000/aix72.h: Same.
20869 2020-03-06 Andrew Pinski <apinski@marvell.com>
20870 Jeff Law <law@redhat.com>
20872 PR rtl-optimization/93996
20873 * haifa-sched.c (remove_notes): Be more careful when adding
20876 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20878 * config/arm/arm_neon.h (vld2_bf16): New.
20884 (vld2_dup_bf16): New.
20885 (vld2q_dup_bf16): New.
20886 (vld3_dup_bf16): New.
20887 (vld3q_dup_bf16): New.
20888 (vld4_dup_bf16): New.
20889 (vld4q_dup_bf16): New.
20890 * config/arm/arm_neon_builtins.def
20891 (vld2): Changed to VAR13 and added v4bf, v8bf
20892 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
20893 (vld3): Changed to VAR13 and added v4bf, v8bf
20894 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
20895 (vld4): Changed to VAR13 and added v4bf, v8bf
20896 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
20897 * config/arm/iterators.md (VDXBF2): New iterator.
20898 *config/arm/neon.md (neon_vld2): Use new iterators.
20899 (neon_vld2_dup<mode): Use new iterators.
20900 (neon_vld3<mode>): Likewise.
20901 (neon_vld3qa<mode>): Likewise.
20902 (neon_vld3qb<mode>): Likewise.
20903 (neon_vld3_dup<mode>): Likewise.
20904 (neon_vld4<mode>): Likewise.
20905 (neon_vld4qa<mode>): Likewise.
20906 (neon_vld4qb<mode>): Likewise.
20907 (neon_vld4_dup<mode>): Likewise.
20908 (neon_vld2_dupv8bf): New.
20909 (neon_vld3_dupv8bf): Likewise.
20910 (neon_vld4_dupv8bf): Likewise.
20912 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20914 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
20915 (bfloat16x8x2_t): New typedef.
20916 (bfloat16x4x3_t): New typedef.
20917 (bfloat16x8x3_t): New typedef.
20918 (bfloat16x4x4_t): New typedef.
20919 (bfloat16x8x4_t): New typedef.
20926 * config/arm/arm-builtins.c (v2bf_UP): Define.
20928 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
20929 * config/arm/arm-modes.def (V2BF): New mode.
20930 * config/arm/arm-simd-builtin-types.def
20931 (Bfloat16x2_t): New entry.
20932 * config/arm/arm_neon_builtins.def
20933 (vst2): Changed to VAR13 and added v4bf, v8bf
20934 (vst3): Changed to VAR13 and added v4bf, v8bf
20935 (vst4): Changed to VAR13 and added v4bf, v8bf
20936 * config/arm/iterators.md (VDXBF): New iterator.
20937 (VQ2BF): New iterator.
20938 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
20939 (neon_vst2<mode>): Used new iterators.
20940 (neon_vst3<mode>): Used new iterators.
20941 (neon_vst3<mode>): Used new iterators.
20942 (neon_vst3qa<mode>): Used new iterators.
20943 (neon_vst3qb<mode>): Used new iterators.
20944 (neon_vst4<mode>): Used new iterators.
20945 (neon_vst4<mode>): Used new iterators.
20946 (neon_vst4qa<mode>): Used new iterators.
20947 (neon_vst4qb<mode>): Used new iterators.
20949 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20951 * config/aarch64/aarch64-simd-builtins.def
20952 (bfcvtn): New built-in function.
20953 (bfcvtn_q): New built-in function.
20954 (bfcvtn2): New built-in function.
20955 (bfcvt): New built-in function.
20956 * config/aarch64/aarch64-simd.md
20957 (aarch64_bfcvtn<q><mode>): New pattern.
20958 (aarch64_bfcvtn2v8bf): New pattern.
20959 (aarch64_bfcvtbf): New pattern.
20960 * config/aarch64/arm_bf16.h (float32_t): New typedef.
20961 (vcvth_bf16_f32): New intrinsic.
20962 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
20963 (vcvtq_low_bf16_f32): New intrinsic.
20964 (vcvtq_high_bf16_f32): New intrinsic.
20965 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
20966 (UNSPEC_BFCVTN): New UNSPEC.
20967 (UNSPEC_BFCVTN2): New UNSPEC.
20968 (UNSPEC_BFCVT): New UNSPEC.
20969 * config/arm/types.md (bf_cvt): New type.
20971 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
20973 * config/s390/s390.md ("tabort"): Get rid of two consecutive
20974 blanks in format string.
20976 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
20980 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
20981 * config/i386/i386.c (ix86_get_ssemov): New function.
20982 (ix86_output_ssemov): Likewise.
20983 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
20984 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
20986 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
20987 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
20988 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
20989 (*movti_internal): Likewise.
20990 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
20992 2020-03-05 Jeff Law <law@redhat.com>
20994 PR tree-optimization/91890
20995 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
20996 Use gimple_or_expr_nonartificial_location.
20997 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
20998 Use gimple_or_expr_nonartificial_location.
20999 * gimple.c (gimple_or_expr_nonartificial_location): New function.
21000 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
21001 * tree-ssa-strlen.c (maybe_warn_overflow): Use
21002 gimple_or_expr_nonartificial_location.
21003 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
21004 (maybe_warn_pointless_strcmp): Likewise.
21006 2020-03-05 Jakub Jelinek <jakub@redhat.com>
21009 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
21010 SRC and MASK arguments to __m128 from __m128d.
21011 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
21013 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
21015 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
21016 argument to __m128i from __m128d.
21017 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
21019 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
21020 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
21023 2020-03-05 Delia Burduv <delia.burduv@arm.com>
21025 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
21026 (vbfmlalbq_f32): New.
21027 (vbfmlaltq_f32): New.
21028 (vbfmlalbq_lane_f32): New.
21029 (vbfmlaltq_lane_f32): New.
21030 (vbfmlalbq_laneq_f32): New.
21031 (vbfmlaltq_laneq_f32): New.
21032 * config/arm/arm_neon_builtins.def (vmmla): New.
21037 (vfmab_laneq): New.
21038 (vfmat_laneq): New.
21039 * config/arm/iterators.md (BF_MA): New int iterator.
21040 (bt): New int attribute.
21041 (VQXBF): Copy of VQX with V8BF.
21042 * config/arm/neon.md (neon_vmmlav8bf): New insn.
21043 (neon_vfma<bt>v8bf): New insn.
21044 (neon_vfma<bt>_lanev8bf): New insn.
21045 (neon_vfma<bt>_laneqv8bf): New expand.
21046 (neon_vget_high<mode>): Changed iterator to VQXBF.
21047 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
21048 (UNSPEC_BFMAB): New UNSPEC.
21049 (UNSPEC_BFMAT): New UNSPEC.
21051 2020-03-05 Jakub Jelinek <jakub@redhat.com>
21053 PR middle-end/93399
21054 * tree-pretty-print.h (pretty_print_string): Declare.
21055 * tree-pretty-print.c (pretty_print_string): Remove forward
21056 declaration, no longer static. Change nbytes parameter type
21057 from unsigned to size_t.
21058 * print-rtl.c (print_value) <case CONST_STRING>: Use
21059 pretty_print_string and for shrink way too long strings.
21061 2020-03-05 Richard Biener <rguenther@suse.de>
21062 Jakub Jelinek <jakub@redhat.com>
21064 PR tree-optimization/93582
21065 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
21066 last operand as signed when looking for memset offset. Formatting
21069 2020-03-04 Andrew Pinski <apinski@marvell.com>
21072 * value-prof.c (dump_histogram_value): Use std::abs.
21074 2020-03-04 Martin Sebor <msebor@redhat.com>
21076 PR tree-optimization/93986
21077 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
21078 operands to the same precision widest_int to avoid ICEs.
21080 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
21083 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
21084 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
21085 for OPTION_MASK_ALTIVEC.
21087 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21089 * config.gcc: Include the glibc-stdint.h header for zTPF.
21091 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21093 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
21094 direct FPR-GPR copies.
21095 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
21098 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
21100 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
21101 operands to the prologue_tpf expander.
21102 (s390_emit_epilogue): Likewise.
21103 (s390_option_override_internal): Do error checking and setup for
21105 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
21106 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
21107 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
21108 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
21109 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
21110 operands for the check flag and the branch target.
21111 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
21112 ("mtpf-trace-hook-prologue-target")
21113 ("mtpf-trace-hook-epilogue-check")
21114 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
21116 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
21117 options are for debugging purposes and will not be documented
21120 2020-03-04 Jakub Jelinek <jakub@redhat.com>
21123 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
21125 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
21126 argument. Change pd argument so that it can be modified. Turn
21127 constant non-CONSTRUCTOR store into non-constant if it is too large.
21128 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
21130 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
21133 2020-02-04 Richard Biener <rguenther@suse.de>
21135 PR tree-optimization/93964
21136 * graphite-isl-ast-to-gimple.c
21137 (gcc_expression_from_isl_ast_expr_id): Add intermediate
21138 conversion for pointer to integer converts.
21139 * graphite-scop-detection.c (assign_parameter_index_in_region):
21142 2020-03-04 Martin Liska <mliska@suse.cz>
21146 * doc/invoke.texi: Clarify --help=language and --help=common
21149 2020-03-04 Jakub Jelinek <jakub@redhat.com>
21151 PR tree-optimization/94001
21152 * tree-tailcall.c (process_assignment): Before comparing op1 to
21153 *ass_var, verify *ass_var is non-NULL.
21155 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
21158 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
21161 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
21163 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
21164 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
21165 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
21166 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
21167 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
21168 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
21169 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
21170 (V_bf_low, V_bf_cvt_m): New mode attributes.
21171 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
21172 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
21173 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
21174 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
21175 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
21177 2020-03-03 Jakub Jelinek <jakub@redhat.com>
21179 PR tree-optimization/93582
21180 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
21181 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
21182 members, initialize them in the constructor and if mask is non-NULL,
21183 artificially push_partial_def {} for the portions of the mask that
21185 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
21186 val and return (void *)-1. Formatting fix.
21187 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
21189 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
21190 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
21192 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
21194 (visit_stmt): Formatting fix.
21196 2020-03-03 Richard Biener <rguenther@suse.de>
21198 PR tree-optimization/93946
21199 * alias.h (refs_same_for_tbaa_p): Declare.
21200 * alias.c (refs_same_for_tbaa_p): New function.
21201 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
21203 * tree-ssa-scopedtables.h
21204 (avail_exprs_stack::lookup_avail_expr): Add output argument
21205 giving access to the hashtable entry.
21206 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
21208 * tree-ssa-dom.c: Include alias.h.
21209 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
21210 removing redundant store.
21211 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
21212 (ao_ref_init_from_vn_reference): Adjust prototype.
21213 (vn_reference_lookup_pieces): Likewise.
21214 (vn_reference_insert_pieces): Likewise.
21215 * tree-ssa-sccvn.c: Track base alias set in addition to alias
21217 (eliminate_dom_walker::eliminate_stmt): Also check base alias
21218 set when removing redundant stores.
21219 (visit_reference_op_store): Likewise.
21220 * dse.c (record_store): Adjust valdity check for redundant
21223 2020-03-03 Jakub Jelinek <jakub@redhat.com>
21226 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
21228 PR rtl-optimization/94002
21229 * explow.c (plus_constant): Punt if cst has VOIDmode and
21230 get_pool_mode is different from mode.
21232 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21234 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
21235 address has an offset which fits the scalling constraint for a
21236 load/store operation.
21237 (legitimate_scaled_address_p): Update use
21238 leigitimate_small_data_address_p.
21239 (arc_print_operand): Likewise.
21240 (arc_legitimate_address_p): Likewise.
21241 (legitimate_small_data_address_p): Likewise.
21243 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21245 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
21246 (fnmasf4_fpu): Likewise.
21248 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21250 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
21252 (subdi3): Likewise.
21253 (adddi3_i): Remove pattern.
21254 (subdi3_i): Likewise.
21256 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
21258 * config/arc/arc.md (eh_return): Add length info.
21260 2020-03-02 David Malcolm <dmalcolm@redhat.com>
21262 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
21264 2020-03-02 David Malcolm <dmalcolm@redhat.com>
21266 * doc/invoke.texi (Static Analyzer Options): Add
21267 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
21270 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
21273 * config/i386/i386.md (movstrict<mode>): Allow only
21274 registers with VALID_INT_MODE_P modes.
21276 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
21278 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
21279 (reduc_insn): Use 'U' and 'B' operand codes.
21280 (reduc_<reduc_op>_scal_<mode>): Allow all types.
21281 (reduc_<reduc_op>_scal_v64di): Delete.
21282 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
21283 (*plus_carry_dpp_shr_v64si): Change to ...
21284 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
21285 (mov_from_lane63_v64di): Change to ...
21286 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
21287 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
21288 Support UNSPEC_MOV_DPP_SHR output formats.
21289 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
21290 Add "use_extends" reductions.
21291 (print_operand_address): Add 'I' and 'U' codes.
21292 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
21294 2020-03-02 Martin Liska <mliska@suse.cz>
21296 * lto-wrapper.c: Fix typo in comment about
21297 C++ standard version.
21299 2020-03-01 Martin Sebor <msebor@redhat.com>
21302 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
21304 2020-03-01 Martin Sebor <msebor@redhat.com>
21306 PR middle-end/93829
21307 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
21308 of a pointer in the outermost ADDR_EXPRs.
21310 2020-02-28 Jeff Law <law@redhat.com>
21312 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
21313 * config/v850/v850.c (v850_asm_trampoline_template): Update
21316 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
21319 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
21322 2020-02-28 Martin Liska <mliska@suse.cz>
21325 * configure.ac: Improve detection of ld_date by requiring
21326 either two dashes or none.
21327 * configure: Regenerate.
21329 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
21331 PR rtl-optimization/93564
21332 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
21333 do not honor reg alloc order.
21335 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
21338 * config/aarch64/aarch64.c (aarch64_override_options): Fix
21339 misleading warning string.
21341 2020-02-27 Martin Sebor <msebor@redhat.com>
21343 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
21345 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
21348 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
21349 Split the insn into two parts. This insn only does variable
21350 extract from a register.
21351 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
21352 variable extract from memory.
21353 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
21354 only does variable extract from a register.
21355 (vsx_extract_v4sf_var_load): New insn, do variable extract from
21357 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
21358 into two parts. This insn only does variable extract from a
21360 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
21361 do variable extract from memory.
21363 2020-02-27 Martin Jambor <mjambor@suse.cz>
21364 Feng Xue <fxue@os.amperecomputing.com>
21367 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
21368 new function calls_same_node_or_its_all_contexts_clone_p.
21369 (cgraph_edge_brings_value_p): Use it.
21370 (cgraph_edge_brings_value_p): Likewise.
21371 (self_recursive_pass_through_p): Return false if caller is a clone.
21372 (self_recursive_agg_pass_through_p): Likewise.
21374 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
21376 PR middle-end/92152
21377 * alias.c (ends_tbaa_access_path_p): Break out from ...
21378 (component_uses_parent_alias_set_from): ... here.
21379 * alias.h (ends_tbaa_access_path_p): Declare.
21380 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
21381 handle trailing arrays past end of tbaa access path.
21382 (aliasing_component_refs_p): ... here; likewise.
21383 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
21384 path; disambiguate also past end of it.
21385 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
21388 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
21390 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
21391 beginning of the file.
21392 (vcreate_bf16, vcombine_bf16): New.
21393 (vdup_n_bf16, vdupq_n_bf16): New.
21394 (vdup_lane_bf16, vdup_laneq_bf16): New.
21395 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
21396 (vduph_lane_bf16, vduph_laneq_bf16): New.
21397 (vset_lane_bf16, vsetq_lane_bf16): New.
21398 (vget_lane_bf16, vgetq_lane_bf16): New.
21399 (vget_high_bf16, vget_low_bf16): New.
21400 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
21401 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
21402 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
21403 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
21404 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
21405 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
21406 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
21407 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
21408 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
21409 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
21410 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
21411 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
21412 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
21413 (vreinterpretq_bf16_p128): New.
21414 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
21415 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
21416 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
21417 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
21418 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
21419 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
21420 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
21421 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
21422 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
21423 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
21424 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
21425 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
21426 (vreinterpretq_p128_bf16): New.
21427 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
21428 (V_elem): Likewise.
21429 (V_elem_l): Likewise.
21430 (VD_LANE): Likewise.
21432 (V_DOUBLE): Likewise.
21433 (VDQX): Add V4BF and V8BF.
21434 (V_two_elem, V_three_elem, V_four_elem): Likewise.
21436 (V_HALF): Likewise.
21437 (V_double_vector_mode): Likewise.
21438 (V_cmp_result): Likewise.
21439 (V_uf_sclr): Likewise.
21440 (V_sz_elem): Likewise.
21441 (Is_d_reg): Likewise.
21442 (V_mode_nunits): Likewise.
21443 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
21445 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
21447 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
21448 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
21449 (<expander><mode>3<exec>): Likewise.
21450 (<expander><mode>3): New.
21451 (v<expander><mode>3): New.
21452 (<expander><mode>3): New.
21453 (<expander><mode>3<exec>): Rename to ...
21454 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
21455 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
21457 2020-02-27 Alexandre Oliva <oliva@adacore.com>
21459 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
21462 2020-02-27 Richard Biener <rguenther@suse.de>
21464 PR tree-optimization/93508
21465 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
21466 non-_CHK variants. Valueize their length arguments.
21468 2020-02-27 Richard Biener <rguenther@suse.de>
21470 PR tree-optimization/93953
21471 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
21472 to the hash-map entry.
21474 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
21476 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
21478 2020-02-27 Mark Williams <mwilliams@fb.com>
21480 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
21481 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
21482 -ffile-prefix-map and -fmacro-prefix-map.
21483 * lto-streamer-out.c: Include file-prefix-map.h.
21484 (lto_output_location): Remap the file part of locations.
21486 2020-02-27 Jakub Jelinek <jakub@redhat.com>
21489 * gimplify.c (gimplify_init_constructor): Don't promote readonly
21490 DECL_REGISTER variables to TREE_STATIC.
21492 PR tree-optimization/93582
21493 PR tree-optimization/93945
21494 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
21495 non-zero INTEGER_CST second argument and ref->offset or ref->size
21496 not a multiple of BITS_PER_UNIT.
21498 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
21500 * doc/install.texi (Binaries): Update description of BullFreeware.
21502 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
21506 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
21507 C++ Language Options, Warning Options, and Static Analyzer
21508 Options lists. Document negative form of options enabled by
21509 default. Move some things around to more accurately sort
21510 warnings by category.
21511 (C++ Dialect Options, Warning Options, Static Analyzer
21512 Options): Document negative form of options when enabled by
21513 default. Move some things around to more accurately sort
21514 warnings by category. Add some missing index entries.
21515 Light copy-editing.
21517 2020-02-26 Carl Love <cel@us.ibm.com>
21520 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
21521 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
21522 for the vector unsigned short arguments. It is also listed as the
21523 name of the built-in for arguments vector unsigned short,
21524 vector unsigned int and vector unsigned long long built-ins. The
21525 name of the builtins for these arguments should be:
21526 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
21527 __builtin_crypto_vpmsumd respectively.
21529 2020-02-26 Richard Biener <rguenther@suse.de>
21531 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
21532 and load permutation.
21534 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
21536 PR middle-end/93843
21537 * optabs-tree.c (supportable_convert_operation): Reject types with
21540 2020-02-26 David Malcolm <dmalcolm@redhat.com>
21542 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
21544 2020-02-26 Jakub Jelinek <jakub@redhat.com>
21546 PR tree-optimization/93820
21547 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
21548 argument to ALL_INTEGER_CST_P boolean.
21549 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
21550 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
21551 adjacent INTEGER_CST store into merged_store->only_constants like
21554 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21557 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
21559 * cfghooks.c (verify_flow_info): Likewise.
21560 * predict.c (combine_predictions_for_bb): Likewise.
21561 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
21562 sucessor -> successor.
21563 (find_traces_1_round): Fix comment typo, destinarion -> destination.
21564 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
21566 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
21567 message typo, sucessors -> successors.
21569 2020-02-25 Martin Sebor <msebor@redhat.com>
21571 * doc/extend.texi (attribute access): Correct an example.
21573 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
21575 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
21577 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
21578 (VAR15, VAR16): New.
21579 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
21580 (VD): Enable for V4BF.
21582 (VQ): Enable for V8BF.
21584 (VQ_NO2E): Likewise.
21585 (VDBL, Vdbl): Add V4BF.
21586 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
21587 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
21588 (bfloat16x8x2_t): Likewise.
21589 (bfloat16x4x3_t): Likewise.
21590 (bfloat16x8x3_t): Likewise.
21591 (bfloat16x4x4_t): Likewise.
21592 (bfloat16x8x4_t): Likewise.
21593 (vcombine_bf16): New.
21594 (vld1_bf16, vld1_bf16_x2): New.
21595 (vld1_bf16_x3, vld1_bf16_x4): New.
21596 (vld1q_bf16, vld1q_bf16_x2): New.
21597 (vld1q_bf16_x3, vld1q_bf16_x4): New.
21598 (vld1_lane_bf16): New.
21599 (vld1q_lane_bf16): New.
21600 (vld1_dup_bf16): New.
21601 (vld1q_dup_bf16): New.
21604 (vld2_dup_bf16): New.
21605 (vld2q_dup_bf16): New.
21608 (vld3_dup_bf16): New.
21609 (vld3q_dup_bf16): New.
21612 (vld4_dup_bf16): New.
21613 (vld4q_dup_bf16): New.
21614 (vst1_bf16, vst1_bf16_x2): New.
21615 (vst1_bf16_x3, vst1_bf16_x4): New.
21616 (vst1q_bf16, vst1q_bf16_x2): New.
21617 (vst1q_bf16_x3, vst1q_bf16_x4): New.
21618 (vst1_lane_bf16): New.
21619 (vst1q_lane_bf16): New.
21627 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
21629 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
21630 (VALL_F16): Likewise.
21631 (VALLDI_F16): Likewise.
21633 (Vetype): Likewise.
21634 (vswap_width_name): Likewise.
21635 (VSWAP_WIDTH): Likewise.
21639 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
21640 (vget_lane_bf16, vgetq_lane_bf16): New.
21641 (vcreate_bf16): New.
21642 (vdup_n_bf16, vdupq_n_bf16): New.
21643 (vdup_lane_bf16, vdup_laneq_bf16): New.
21644 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
21645 (vduph_lane_bf16, vduph_laneq_bf16): New.
21646 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
21647 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
21648 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
21649 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
21650 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
21651 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
21652 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
21653 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
21654 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
21655 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
21656 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
21657 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
21658 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
21659 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
21660 (vreinterpretq_bf16_p128): New.
21661 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
21662 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
21663 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
21664 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
21665 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
21666 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
21667 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
21668 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
21669 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
21670 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
21671 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
21672 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
21673 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
21674 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
21675 (vreinterpretq_p128_bf16): New.
21677 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
21679 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
21680 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
21681 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
21682 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
21683 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
21684 * config/arm/iterators.md (VSF2BF): New attribute.
21685 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
21686 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
21687 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
21689 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
21691 * config/arm/arm.md (required_for_purecode): New attribute.
21692 (enabled): Handle required_for_purecode.
21693 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
21694 work with -mpure-code.
21696 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21698 PR rtl-optimization/93908
21699 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
21702 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
21704 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
21706 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
21708 * doc/install.texi (--enable-checking): Adjust wording.
21710 2020-02-25 Richard Biener <rguenther@suse.de>
21712 PR tree-optimization/93868
21713 * tree-vect-slp.c (slp_copy_subtree): New function.
21714 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
21715 re-arranging stmts in it.
21717 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21719 PR middle-end/93874
21720 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
21721 dummy function and remove it at the end.
21723 PR translation/93864
21724 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
21725 paramter -> parameter.
21726 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
21727 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
21729 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
21731 * doc/install.texi (--enable-checking): Properly document current
21733 (--enable-stage1-checking): Minor clarification about bootstrap.
21735 2020-02-24 David Malcolm <dmalcolm@redhat.com>
21738 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
21739 -fanalyzer-checker=taint is also required.
21740 (-fanalyzer-checker=): Note that providing this option enables the
21741 given checker, and doing so may be required for checkers that are
21742 disabled by default.
21744 2020-02-24 David Malcolm <dmalcolm@redhat.com>
21746 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
21747 significant control flow events; add a "3" which shows all
21748 control flow events; the old "3" becomes "4".
21750 2020-02-24 Jakub Jelinek <jakub@redhat.com>
21752 PR tree-optimization/93582
21753 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
21754 pd.offset and pd.size to be counted in bits rather than bytes, add
21755 support for maxsizei that is not a multiple of BITS_PER_UNIT and
21756 handle bitfield stores and loads.
21757 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
21758 uncomparable quantities - bytes vs. bits. Allow push_partial_def
21759 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
21760 pd.offset/pd.size to be counted in bits rather than bytes.
21761 Formatting fix. Rename shadowed len variable to buflen.
21763 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
21764 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
21767 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
21768 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
21769 * opts-common.c (parse_options_from_collect_gcc_options): New function.
21770 (prepend_xassembler_to_collect_as_options): Likewise.
21771 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
21772 (prepend_xassembler_to_collect_as_options): Likewise.
21773 * lto-opts.c (lto_write_options): Stream assembler options
21774 in COLLECT_AS_OPTIONS.
21775 * lto-wrapper.c (xassembler_options_error): New static variable.
21776 (get_options_from_collect_gcc_options): Move parsing options code to
21777 parse_options_from_collect_gcc_options and call it.
21778 (merge_and_complain): Validate -Xassembler options.
21779 (append_compiler_options): Handle OPT_Xassembler.
21780 (run_gcc): Append command line -Xassembler options to
21781 collect_gcc_options.
21782 * doc/invoke.texi: Add documentation about using Xassembler
21785 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
21787 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
21789 (riscv_rtx_costs): Update cost model for LTGT.
21791 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
21793 PR rtl-optimization/93564
21794 * ira-color.c (struct update_cost_queue_elem): New member start.
21795 (queue_update_cost, get_next_update_cost): Add new arg start.
21796 (allocnos_conflict_p): New function.
21797 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
21798 Add checking conflicts with allocnos_conflict_p.
21799 (update_costs_from_prefs, restore_costs_from_copies): Adjust
21800 update_costs_from_allocno calls.
21801 (update_conflict_hard_regno_costs): Add checking conflicts with
21802 allocnos_conflict_p. Adjust calls of queue_update_cost and
21803 get_next_update_cost.
21804 (assign_hard_reg): Adjust calls of queue_update_cost. Add
21806 (bucket_allocno_compare_func): Restore previous version.
21808 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
21810 * config/pa/pa.c (pa_function_value): Fix check for word and
21811 double-word size when handling aggregate return values.
21812 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
21813 that homogeneous SFmode and DFmode aggregates are passed and returned
21814 in general registers.
21816 2020-02-21 Jakub Jelinek <jakub@redhat.com>
21818 PR translation/93759
21819 * opts.c (print_filtered_help): Translate help before appending
21820 messages to it rather than after that.
21822 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
21824 PR rtl-optimization/PR92989
21825 * lra-lives.c (process_bb_lives): Restore the original order
21826 of the bb liveness update. Call make_hard_regno_dead for each
21827 register clobbered at the start of an EH receiver.
21829 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
21832 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
21833 self-recursively generated.
21835 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
21838 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
21841 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
21843 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
21844 Document new target supports option.
21846 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
21848 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
21849 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
21850 * config/arm/iterators.md (MATMUL): New iterator.
21851 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
21852 (mmla_sfx): New attribute.
21853 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
21854 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
21855 (UNSPEC_MATMUL_US): New.
21857 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21859 * config/arm/arm.md: Prevent scalar shifts from being used when big
21862 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
21863 Richard Biener <rguenther@suse.de>
21865 PR tree-optimization/93586
21866 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
21867 after mismatched array refs; do not sure type size information to
21868 recover from unmatched referneces with !flag_strict_aliasing_p.
21870 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21872 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
21873 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
21874 (scatter_store<mode>): Rename to ...
21875 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
21876 (scatter<mode>_exec): Delete. Move contents ...
21877 (mask_scatter_store<mode>): ... here, and rename that to ...
21878 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
21879 Remove mode conversion.
21880 (mask_gather_load<mode>): Rename to ...
21881 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
21882 Remove mode conversion.
21883 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
21885 2020-02-21 Martin Jambor <mjambor@suse.cz>
21887 PR tree-optimization/93845
21888 * tree-sra.c (verify_sra_access_forest): Only test access size of
21891 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21893 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
21894 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
21895 (addv64di3_exec): Likewise.
21896 (subv64di3): Likewise.
21897 (subv64di3_exec): Likewise.
21898 (addv64di3_zext): Likewise.
21899 (addv64di3_zext_exec): Likewise.
21900 (addv64di3_zext_dup): Likewise.
21901 (addv64di3_zext_dup_exec): Likewise.
21902 (addv64di3_zext_dup2): Likewise.
21903 (addv64di3_zext_dup2_exec): Likewise.
21904 (addv64di3_sext_dup2): Likewise.
21905 (addv64di3_sext_dup2_exec): Likewise.
21906 (<expander>v64di3): Likewise.
21907 (<expander>v64di3_exec): Likewise.
21908 (*<reduc_op>_dpp_shr_v64di): Likewise.
21909 (*plus_carry_dpp_shr_v64di): Likewise.
21910 * config/gcn/gcn.md (adddi3): Likewise.
21911 (addptrdi3): Likewise.
21912 (<expander>di3): Likewise.
21914 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21916 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
21918 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21920 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
21921 support. Use aarch64_emit_mult instead of emitting multiplication
21922 instructions directly.
21923 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
21924 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
21926 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21928 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
21929 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
21930 instead of emitting multiplication instructions directly.
21931 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
21932 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
21933 (@aarch64_frecps<mode>): New expanders.
21935 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21937 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
21938 on and produce uint64_ts rather than ints.
21939 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
21940 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
21942 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21944 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
21945 an unused xmsk register when handling approximate rsqrt.
21947 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21949 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
21950 flag_finite_math_only condition.
21952 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
21955 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
21956 to destination operand for shufps alternative.
21957 (*vec_extractv2si_1): Ditto.
21959 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
21962 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
21965 2020-02-20 Martin Liska <mliska@suse.cz>
21967 PR translation/93831
21968 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
21970 2020-02-20 Martin Liska <mliska@suse.cz>
21972 PR translation/93830
21973 * common/config/avr/avr-common.c: Remote trailing "|".
21975 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
21977 * collect2.c (maybe_run_lto_and_relink): Fix typo in
21980 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
21982 PR tree-optimization/93767
21983 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
21984 access-size bias from the offset calculations for negative strides.
21986 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
21988 * collect2.c (c_file, o_file): Make const again.
21989 (ldout,lderrout, dump_ld_file): Remove.
21990 (tool_cleanup): Avoid calling not signal-safe functions.
21991 (maybe_run_lto_and_relink): Avoid possible signal handler
21992 access to unintialzed memory (lto_o_files).
21993 (main): Avoid leaking temp files in $TMPDIR.
21994 Initialize c_file/o_file with concat, which avoids exposing
21995 uninitialized memory to signal handler, which calls unlink(!).
21996 Avoid calling maybe_unlink when the main function returns,
21997 since the atexit handler is already doing this.
21998 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
22000 2020-02-19 Martin Jambor <mjambor@suse.cz>
22002 PR tree-optimization/93776
22003 * tree-sra.c (create_access): Do not create zero size accesses.
22004 (get_access_for_expr): Do not search for zero sized accesses.
22006 2020-02-19 Martin Jambor <mjambor@suse.cz>
22008 PR tree-optimization/93667
22009 * tree-sra.c (scalarizable_type_p): Return false if record fields
22010 do not follow wach other.
22012 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
22014 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
22015 rather than fmv.x.s/fmv.s.x.
22017 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
22019 * config/aarch64/aarch64-simd-builtins.def
22020 (intrinsic_vec_smult_lo_): New.
22021 (intrinsic_vec_umult_lo_): Likewise.
22022 (vec_widen_smult_hi_): Likewise.
22023 (vec_widen_umult_hi_): Likewise.
22024 * config/aarch64/aarch64-simd.md
22025 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
22026 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
22027 (vmull_high_s16): Likewise.
22028 (vmull_high_s32): Likewise.
22029 (vmull_high_u8): Likewise.
22030 (vmull_high_u16): Likewise.
22031 (vmull_high_u32): Likewise.
22032 (vmull_s8): Likewise.
22033 (vmull_s16): Likewise.
22034 (vmull_s32): Likewise.
22035 (vmull_u8): Likewise.
22036 (vmull_u16): Likewise.
22037 (vmull_u32): Likewise.
22039 2020-02-18 Martin Liska <mliska@suse.cz>
22041 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
22042 bootstrap by missing removal of invalid sanity check.
22044 2020-02-18 Martin Liska <mliska@suse.cz>
22047 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
22048 Always compare LHS of gimple_assign.
22050 2020-02-18 Martin Liska <mliska@suse.cz>
22053 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
22054 and return type of functions.
22055 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
22056 Drop MALLOC attribute for void functions.
22057 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
22058 malloc_state for a new VOID clone.
22060 2020-02-18 Martin Liska <mliska@suse.cz>
22063 * common.opt: Add -fprofile-reproducibility.
22064 * doc/invoke.texi: Document it.
22065 * value-prof.c (dump_histogram_value):
22066 Document and support behavior for counters[0]
22067 being a negative value.
22068 (get_nth_most_common_value): Handle negative
22069 counters[0] in respect to flag_profile_reproducible.
22071 2020-02-18 Jakub Jelinek <jakub@redhat.com>
22074 * cgraph.c (verify_speculative_call): Use speculative_id instead of
22075 speculative_uid in messages. Remove trailing whitespace from error
22076 message. Use num_speculative_call_targets instead of
22077 num_speculative_targets in a message.
22078 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
22079 edge messages and stmt instead of cal_stmt in reference message.
22081 PR tree-optimization/93780
22082 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
22083 before calling build_vector_type.
22084 (execute_update_addresses_taken): Likewise.
22087 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
22088 typo, functoin -> function.
22089 * tree.c (free_lang_data_in_decl): Fix comment typo,
22090 functoin -> function.
22091 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
22093 2020-02-17 David Malcolm <dmalcolm@redhat.com>
22095 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
22097 (print_option_information): Don't call get_option_url if URLs
22100 2020-02-17 Alexandre Oliva <oliva@adacore.com>
22102 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
22103 handling of register_common-less targets.
22105 2020-02-17 Martin Liska <mliska@suse.cz>
22108 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
22110 2020-02-17 Martin Liska <mliska@suse.cz>
22112 PR translation/93755
22113 * config/rs6000/rs6000.c (rs6000_option_override_internal):
22116 2020-02-17 Martin Liska <mliska@suse.cz>
22119 * config/rx/elf.opt: Fix typo.
22121 2020-02-17 Richard Biener <rguenther@suse.de>
22124 * opts-global.c (print_ignored_options): Use inform and
22127 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
22130 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
22132 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
22135 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
22136 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
22138 2020-02-15 Jason Merrill <jason@redhat.com>
22140 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
22142 2020-02-15 Jakub Jelinek <jakub@redhat.com>
22144 PR tree-optimization/93744
22145 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
22146 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
22147 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
22148 sure @2 in the first and @1 in the other patterns has no side-effects.
22150 2020-02-15 David Malcolm <dmalcolm@redhat.com>
22151 Bernd Edlinger <bernd.edlinger@hotmail.de>
22155 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
22156 * configure.ac (--with-diagnostics-urls): New configuration
22157 option, based on --with-diagnostics-color.
22158 (DIAGNOSTICS_URLS_DEFAULT): New define.
22159 * config.h: Regenerate.
22160 * configure: Regenerate.
22161 * diagnostic.c (diagnostic_urls_init): Handle -1 for
22162 DIAGNOSTICS_URLS_DEFAULT from configure-time
22163 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
22164 and TERM_URLS environment variable.
22165 * diagnostic-url.h (diagnostic_url_format): New enum type.
22166 (diagnostic_urls_enabled_p): rename to...
22167 (determine_url_format): ... this, and change return type.
22168 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
22169 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
22170 the linux console, and mingw.
22171 (diagnostic_urls_enabled_p): rename to...
22172 (determine_url_format): ... this, and adjust.
22173 * pretty-print.h (pretty_printer::show_urls): rename to...
22174 (pretty_printer::url_format): ... this, and change to enum.
22175 * pretty-print.c (pretty_printer::pretty_printer,
22176 pp_begin_url, pp_end_url, test_urls): Adjust.
22177 * doc/install.texi (--with-diagnostics-urls): Document the new
22178 configuration option.
22179 (--with-diagnostics-color): Document the existing interaction
22180 with GCC_COLORS better.
22181 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
22182 vindex reference. Update description of defaults based on the above.
22183 (-fdiagnostics-color): Update description of how -fdiagnostics-color
22184 interacts with GCC_COLORS.
22186 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
22189 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
22190 conjunction with TARGET_GNU_TLS in early return.
22192 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
22194 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
22195 the mode is not wider than UNITS_PER_WORD.
22197 2020-02-14 Martin Jambor <mjambor@suse.cz>
22199 PR tree-optimization/93516
22200 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
22201 access of the same type as the parent.
22202 (propagate_subaccesses_from_lhs): Likewise.
22204 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
22207 * config/i386/avx512vbmi2intrin.h
22208 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
22209 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
22210 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
22211 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
22212 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
22213 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
22214 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
22215 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
22216 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
22217 of lacking a closing parenthesis.
22218 * config/i386/avx512vbmi2vlintrin.h
22219 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
22220 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
22221 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
22222 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
22223 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
22224 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
22225 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
22226 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
22227 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
22228 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
22229 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
22230 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
22231 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
22232 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
22233 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
22234 _mm_shldi_epi32, _mm_mask_shldi_epi32,
22235 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
22236 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
22238 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
22241 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
22242 the target function entry.
22244 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22246 * common/config/arc/arc-common.c (arc_option_optimization_table):
22247 Disable if-conversion step when optimized for size.
22249 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22251 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
22252 R12-R15 are always in ARCOMPACT16_REGS register class.
22253 * config/arc/arc.opt (mq-class): Deprecate.
22254 * config/arc/constraint.md ("q"): Remove dependency on mq-class
22256 * doc/invoke.texi (mq-class): Update text.
22257 * common/config/arc/arc-common.c (arc_option_optimization_table):
22260 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22262 * config/arc/arc.c (arc_insn_cost): New function.
22263 (TARGET_INSN_COST): Define.
22264 * config/arc/arc.md (cost): New attribute.
22265 (add_n): Use arc_nonmemory_operand.
22266 (ashlsi3_insn): Likewise, also update constraints.
22267 (ashrsi3_insn): Likewise.
22268 (rotrsi3): Likewise.
22269 (add_shift): Likewise.
22270 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
22272 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
22274 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
22276 (umulsidi_600): Likewise.
22278 2020-02-13 Jakub Jelinek <jakub@redhat.com>
22281 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
22282 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
22283 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
22284 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
22285 pass __A to the builtin followed by __W instead of __A followed by
22287 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
22288 _mm512_mask_popcnt_epi64): Likewise.
22289 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
22290 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
22291 _mm256_mask_popcnt_epi64): Likewise.
22293 PR tree-optimization/93582
22294 * fold-const.h (shift_bytes_in_array_left,
22295 shift_bytes_in_array_right): Declare.
22296 * fold-const.c (shift_bytes_in_array_left,
22297 shift_bytes_in_array_right): New function, moved from
22298 gimple-ssa-store-merging.c, no longer static.
22299 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
22300 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
22301 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
22302 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
22303 shift_bytes_in_array.
22304 (verify_shift_bytes_in_array): Rename to ...
22305 (verify_shift_bytes_in_array_left): ... this. Use
22306 shift_bytes_in_array_left instead of shift_bytes_in_array.
22307 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
22308 instead of verify_shift_bytes_in_array.
22309 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
22310 / native_interpret_expr where the store covers all needed bits,
22311 punt on PDP-endian, otherwise allow all involved offsets and sizes
22312 not to be byte-aligned.
22315 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
22316 use const_0_to_255_operand predicate instead of immediate_operand.
22317 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
22318 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
22319 vgf2p8affineinvqb_<mode><mask_name>,
22320 vgf2p8affineqb_<mode><mask_name>): Drop mode from
22321 const_0_to_255_operand predicated operands.
22323 2020-02-12 Jeff Law <law@redhat.com>
22325 * config/h8300/h8300.md (comparison shortening peepholes): Use
22326 a mode iterator to merge the HImode and SImode peepholes.
22328 2020-02-12 Jakub Jelinek <jakub@redhat.com>
22330 PR middle-end/93663
22331 * real.c (is_even): Make static. Function comment fix.
22332 (is_halfway_below): Make static, don't assert R is not inf/nan,
22333 instead return false for those. Small formatting fixes.
22335 2020-02-12 Martin Sebor <msebor@redhat.com>
22337 PR middle-end/93646
22338 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
22339 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
22340 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
22341 (strlen_check_and_optimize_call): Adjust callee name.
22343 2020-02-12 Jeff Law <law@redhat.com>
22345 * config/h8300/h8300.md (comparison shortening peepholes): Drop
22346 (and (xor)) variant. Combine other two into single peephole.
22348 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
22350 PR rtl-optimization/93565
22351 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
22353 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
22355 * config/aarch64/aarch64-simd.md
22356 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
22357 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
22358 generating separate ADDV and zero_extend patterns.
22359 * config/aarch64/iterators.md (VDQV_E): New iterator.
22361 2020-02-12 Jeff Law <law@redhat.com>
22363 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
22364 expanders, splits, etc.
22365 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
22366 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
22367 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
22368 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
22369 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
22370 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
22371 function prototype.
22372 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
22374 2020-02-12 Jakub Jelinek <jakub@redhat.com>
22377 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
22378 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
22379 TARGET_AVX512DQ from condition.
22380 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
22381 instead of <mask_mode512bit_condition> in condition. If
22382 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
22384 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
22387 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
22390 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
22392 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
22394 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
22395 where strlen is more legible.
22396 (rs6000_builtin_vectorized_libmass): Ditto.
22397 (rs6000_print_options_internal): Ditto.
22399 2020-02-11 Martin Sebor <msebor@redhat.com>
22401 PR tree-optimization/93683
22402 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
22404 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
22406 * config/rs6000/predicates.md (cint34_operand): Rename the
22407 -mprefixed-addr option to be -mprefixed.
22408 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
22409 the -mprefixed-addr option to be -mprefixed.
22410 (OTHER_FUTURE_MASKS): Likewise.
22411 (POWERPC_MASKS): Likewise.
22412 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
22413 the -mprefixed-addr option to be -mprefixed. Change error
22414 messages to refer to -mprefixed.
22415 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
22417 (rs6000_legitimate_offset_address_p): Likewise.
22418 (rs6000_mode_dependent_address): Likewise.
22419 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
22420 "-mprefixed" for target attributes and pragmas.
22421 (address_to_insn_form): Rename the -mprefixed-addr option to be
22423 (rs6000_adjust_insn_length): Likewise.
22424 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
22425 -mprefixed-addr option to be -mprefixed.
22426 (ASM_OUTPUT_OPCODE): Likewise.
22427 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
22428 -mprefixed-addr option to be -mprefixed.
22429 * config/rs6000/rs6000.opt (-mprefixed): Rename the
22430 -mprefixed-addr option to be prefixed. Change the option from
22431 being undocumented to being documented.
22432 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
22433 -mprefixed option. Update the -mpcrel documentation to mention
22436 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
22438 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
22439 including FIRST_PSEUDO_REGISTER - 1.
22440 * ira-color.c (print_hard_reg_set): Ditto.
22442 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22444 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
22445 (USTERNOP_QUALIFIERS): New define.
22446 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
22447 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
22448 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
22449 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
22450 * config/arm/arm_neon.h (vusdot_s32): New.
22451 (vusdot_lane_s32): New.
22452 (vusdotq_lane_s32): New.
22453 (vsudot_lane_s32): New.
22454 (vsudotq_lane_s32): New.
22455 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
22456 * config/arm/iterators.md (DOTPROD_I8MM): New.
22457 (sup, opsuffix): Add <us/su>.
22458 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
22459 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
22461 2020-02-11 Richard Biener <rguenther@suse.de>
22463 PR tree-optimization/93661
22464 PR tree-optimization/93662
22465 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
22466 tree_to_poly_int64.
22467 * tree-sra.c (get_access_for_expr): Likewise.
22469 2020-02-10 Jakub Jelinek <jakub@redhat.com>
22472 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
22473 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
22474 Change condition from TARGET_AVX2 to TARGET_AVX.
22476 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
22479 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
22480 argument of strncmp.
22482 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
22484 Try to generate zero-based comparisons.
22485 * config/cris/cris.c (cris_reduce_compare): New function.
22486 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
22487 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
22488 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
22490 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
22493 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
22494 in Thumb state and also as a destination in Arm state. Add T16
22497 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
22499 * md.texi (Define Subst): Match closing paren in example.
22501 2020-02-10 Jakub Jelinek <jakub@redhat.com>
22505 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
22506 arguments of strncmp.
22508 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
22511 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
22512 but different source value.
22513 (adjust_callers_for_value_intersection): New function.
22514 (gather_edges_for_value): Adjust order of callers to let a
22515 non-self-recursive caller be the first element.
22516 (self_recursive_pass_through_p): Add a new parameter "simple", and
22517 check generalized self-recursive pass-through jump function.
22518 (self_recursive_agg_pass_through_p): Likewise.
22519 (find_more_scalar_values_for_callers_subset): Compute value from
22520 pass-through jump function for self-recursive.
22521 (intersect_with_plats): Cleanup previous implementation code for value
22522 itersection with self-recursive call edge.
22523 (intersect_with_agg_replacements): Likewise.
22524 (intersect_aggregates_with_edge): Deduce value from pass-through jump
22525 function for self-recursive call edge. Cleanup previous implementation
22526 code for value intersection with self-recursive call edge.
22527 (decide_whether_version_node): Remove dead callers and adjust order
22528 to let a non-self-recursive caller be the first element.
22530 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
22532 * recog.c: Move pass_split_before_sched2 code in front of
22533 pass_split_before_regstack.
22534 (pass_data_split_before_sched2): Rename pass to split3 from split4.
22535 (pass_data_split_before_regstack): Rename pass to split4 from split3.
22536 (rest_of_handle_split_before_sched2): Remove.
22537 (pass_split_before_sched2::execute): Unconditionally call
22539 (enable_split_before_sched2): New function.
22540 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
22541 (pass_split_before_regstack::gate): Ditto.
22542 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
22543 Update name check for renamed split4 pass.
22544 * config/sh/sh.c (register_sh_passes): Update pass insertion
22545 point for renamed split4 pass.
22547 2020-02-09 Jakub Jelinek <jakub@redhat.com>
22549 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
22550 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
22551 copying them around between host and target.
22553 2020-02-08 Andrew Pinski <apinski@marvell.com>
22556 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
22557 STRICT_ALIGNMENT also.
22559 2020-02-08 Jim Wilson <jimw@sifive.com>
22562 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
22564 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
22565 Jakub Jelinek <jakub@redhat.com>
22568 * config/i386/i386.h (CALL_USED_REGISTERS): Make
22569 xmm16-xmm31 call-used even in 64-bit ms-abi.
22571 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
22573 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
22574 (simd_ummla, simd_usmmla): Likewise.
22575 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
22576 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
22577 (vusmmlaq_s32): New.
22579 2020-02-07 Richard Biener <rguenther@suse.de>
22581 PR middle-end/93519
22582 * tree-inline.c (fold_marked_statements): Do a PRE walk,
22583 skipping unreachable regions.
22584 (optimize_inline_calls): Skip folding stmts when we didn't
22587 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
22590 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
22591 Don't return aggregates with only SFmode and DFmode in SSE
22593 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
22595 2020-02-07 Jakub Jelinek <jakub@redhat.com>
22598 * config/rs6000/rs6000-logue.c
22599 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
22600 if it fails, move rs into end_addr and retry. Add
22601 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
22602 the insn pattern doesn't describe well what exactly happens to
22606 * config/i386/predicates.md (avx_identity_operand): Remove.
22607 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
22608 (avx_<castmode><avxsizesuffix>_<castmode>,
22609 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
22610 a VEC_CONCAT of the operand and UNSPEC_CAST.
22611 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
22612 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
22616 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
22617 recog_data.insn if distance_non_agu_define changed it.
22619 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
22622 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
22623 we only had X-FORM (reg+reg) addressing for vectors. Also before
22624 ISA 3.0, we only had X-FORM addressing for scalars in the
22625 traditional Altivec registers.
22627 2020-02-06 <zhongyunde@huawei.com>
22628 Vladimir Makarov <vmakarov@redhat.com>
22630 PR rtl-optimization/93561
22631 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
22632 hard register range.
22634 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22636 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
22639 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
22641 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
22642 where the low and the high 32 bits are equal to each other specially,
22643 with an rldimi instruction.
22645 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
22647 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
22649 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
22651 * config/arm/arm-tables.opt: Regenerate.
22653 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22656 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
22657 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
22658 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
22660 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22662 PR rtl-optimization/87763
22663 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
22665 2020-02-06 Delia Burduv <delia.burduv@arm.com>
22667 * config/aarch64/aarch64-simd-builtins.def
22668 (bfmlaq): New built-in function.
22669 (bfmlalb): New built-in function.
22670 (bfmlalt): New built-in function.
22671 (bfmlalb_lane): New built-in function.
22672 (bfmlalt_lane): New built-in function.
22673 * config/aarch64/aarch64-simd.md
22674 (aarch64_bfmmlaqv4sf): New pattern.
22675 (aarch64_bfmlal<bt>v4sf): New pattern.
22676 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
22677 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
22678 (vbfmlalbq_f32): New intrinsic.
22679 (vbfmlaltq_f32): New intrinsic.
22680 (vbfmlalbq_lane_f32): New intrinsic.
22681 (vbfmlaltq_lane_f32): New intrinsic.
22682 (vbfmlalbq_laneq_f32): New intrinsic.
22683 (vbfmlaltq_laneq_f32): New intrinsic.
22684 * config/aarch64/iterators.md (BF_MLA): New int iterator.
22685 (bt): New int attribute.
22687 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
22689 * config/i386/i386.md (*pushtf): Emit "#" instead of
22690 calling gcc_unreachable in insn output.
22693 (*pushsf_rex64): Ditto for alternatives other than 1.
22694 (*pushsf): Ditto for alternatives other than 1.
22696 2020-02-06 Martin Liska <mliska@suse.cz>
22698 PR gcov-profile/91971
22699 PR gcov-profile/93466
22700 * coverage.c (coverage_init): Revert mangling of
22701 path into filename. It can lead to huge filename length.
22702 Creation of subfolders seem more natural.
22704 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22707 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
22708 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
22709 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
22711 2020-02-06 Jakub Jelinek <jakub@redhat.com>
22714 * config/i386/predicates.md (avx_identity_operand): New predicate.
22715 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
22716 define_insn_and_split.
22719 * omp-low.c (use_pointer_for_field): For nested constructs, also
22720 look for map clauses on target construct.
22721 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
22722 taskreg_nesting_level.
22725 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
22726 shared clause, call omp_notice_variable on outer context if any.
22728 2020-02-05 Jason Merrill <jason@redhat.com>
22731 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
22732 non-zero address even if weak and not yet defined.
22734 2020-02-05 Martin Sebor <msebor@redhat.com>
22736 PR tree-optimization/92765
22737 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
22738 * tree-ssa-strlen.c (compute_string_length): Remove.
22739 (determine_min_objsize): Remove.
22740 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
22741 Avoid using type size as the upper bound on string length.
22742 (handle_builtin_string_cmp): Add an argument. Adjust.
22743 (strlen_check_and_optimize_call): Pass additional argument to
22744 handle_builtin_string_cmp.
22746 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
22748 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
22749 (*pushdi2_rex64 peephole2): Unconditionally split after
22750 epilogue_completed.
22751 (*ashl<mode>3_doubleword): Ditto.
22752 (*<shift_insn><mode>3_doubleword): Ditto.
22754 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
22757 * config/rs6000/rs6000.c (get_vector_offset): Fix
22759 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
22761 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
22763 2020-02-05 David Malcolm <dmalcolm@redhat.com>
22765 * doc/analyzer.texi
22766 (Special Functions for Debugging the Analyzer): Update description
22767 of __analyzer_dump_exploded_nodes.
22769 2020-02-05 Jakub Jelinek <jakub@redhat.com>
22772 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
22773 include sets and not clobbers in the vzeroupper pattern.
22774 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
22775 the parallel has 17 (64-bit) or 9 (32-bit) elts.
22776 (*avx_vzeroupper_1): New define_insn_and_split.
22779 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
22780 don't run when !optimize.
22781 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
22784 2020-02-05 Richard Biener <rguenther@suse.de>
22786 PR middle-end/90648
22787 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
22788 checks before matching calls.
22790 2020-02-05 Jakub Jelinek <jakub@redhat.com>
22792 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
22793 function comment typo.
22795 PR middle-end/93555
22796 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
22797 simd_clone_create failed when i == 0, adjust clone->nargs by
22800 2020-02-05 Martin Liska <mliska@suse.cz>
22803 * doc/invoke.texi: Document that one should
22804 not combine ASLR and -fpch.
22806 2020-02-04 Richard Biener <rguenther@suse.de>
22808 PR tree-optimization/93538
22809 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
22811 2020-02-04 Richard Biener <rguenther@suse.de>
22813 PR tree-optimization/91123
22814 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
22815 (vn_walk_cb_data::last_vuse): New member.
22816 (vn_walk_cb_data::saved_operands): Likewsie.
22817 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
22818 (vn_walk_cb_data::push_partial_def): Use finish.
22819 (vn_reference_lookup_2): Update last_vuse and use finish if
22820 we've saved operands.
22821 (vn_reference_lookup_3): Use finish and update calls to
22822 push_partial_defs everywhere. When translating through
22823 memcpy or aggregate copies save off operands and alias-set.
22824 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
22825 operation for redundant store removal.
22827 2020-02-04 Richard Biener <rguenther@suse.de>
22829 PR tree-optimization/92819
22830 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
22831 generating more stmts than before.
22833 2020-02-04 Martin Liska <mliska@suse.cz>
22835 * config/arm/arm.c (arm_gen_far_branch): Move the function
22836 outside of selftests.
22838 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22840 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
22841 function to adjust PC-relative vector addresses.
22842 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
22843 handle vectors with PC-relative addresses.
22845 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22847 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
22849 (hard_reg_and_mode_to_addr_mask): Delete.
22850 (rs6000_adjust_vec_address): If the original vector address
22851 was REG+REG or REG+OFFSET and the element is not zero, do the add
22852 of the elements in the original address before adding the offset
22853 for the vector element. Use address_to_insn_form to validate the
22854 address using the register being loaded, rather than guessing
22855 whether the address is a DS-FORM or DQ-FORM address.
22857 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22859 * config/rs6000/rs6000.c (get_vector_offset): New helper function
22860 to calculate the offset in memory from the start of a vector of a
22861 particular element. Add code to keep the element number in
22862 bounds if the element number is variable.
22863 (rs6000_adjust_vec_address): Move calculation of offset of the
22864 vector element to get_vector_offset.
22865 (rs6000_split_vec_extract_var): Do not do the initial AND of
22866 element here, move the code to get_vector_offset.
22868 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22870 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
22873 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
22875 * config/rs6000/constraints.md: Improve documentation.
22877 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
22880 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
22881 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
22883 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
22885 * config.gcc: Remove "carrizo" support.
22886 * config/gcn/gcn-opts.h (processor_type): Likewise.
22887 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
22888 * config/gcn/gcn.opt (gpu_type): Likewise.
22889 * config/gcn/t-omp-device: Likewise.
22891 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22894 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
22895 * config/arm/arm.c (arm_gen_far_branch): New function
22896 arm_gen_far_branch.
22897 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
22899 2020-02-03 Julian Brown <julian@codesourcery.com>
22900 Tobias Burnus <tobias@codesourcery.com>
22902 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
22904 2020-02-03 Jakub Jelinek <jakub@redhat.com>
22907 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
22908 valid RTL to sum up the lowest and second lowest bytes of the popcnt
22911 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
22913 PR rtl-optimization/91333
22914 * ira-color.c (struct allocno_color_data): Add member
22916 (init_allocno_threads): Set the member up.
22917 (bucket_allocno_compare_func): Add compare hard reg
22920 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
22922 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
22924 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
22925 * config.in: Regenerated.
22926 * configure: Regenerated.
22927 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
22928 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
22929 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
22931 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
22933 * configure: Regenerate.
22935 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
22937 PR rtl-optimization/91333
22938 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
22939 reg preferences comparison up.
22941 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
22943 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
22944 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
22945 aarch64-sve-builtins-base.h.
22946 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
22947 aarch64-sve-builtins-base.cc.
22948 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
22949 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22950 (svcvtnt): Declare.
22951 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
22952 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22953 (svcvtnt): New functions.
22954 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
22955 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22956 (svcvtnt): New functions.
22957 (svcvt): Add a form that converts f32 to bf16.
22958 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
22959 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
22961 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
22962 Treat B as bfloat16_t.
22963 (ternary_bfloat_lane_base): New class.
22964 (ternary_bfloat_def): Likewise.
22965 (ternary_bfloat): New shape.
22966 (ternary_bfloat_lane_def): New class.
22967 (ternary_bfloat_lane): New shape.
22968 (ternary_bfloat_lanex2_def): New class.
22969 (ternary_bfloat_lanex2): New shape.
22970 (ternary_bfloat_opt_n_def): New class.
22971 (ternary_bfloat_opt_n): New shape.
22972 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
22973 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
22974 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
22975 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
22976 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
22977 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
22978 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
22979 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
22980 the pattern off the narrow mode instead of the wider one.
22981 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
22982 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
22983 (sve_fp_op): Handle them.
22984 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
22985 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
22987 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
22989 * config/aarch64/arm_sve.h: Include arm_bf16.h.
22990 * config/aarch64/aarch64-modes.def (BF): Move definition before
22991 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
22992 (SVE_MODES): Handle BF modes.
22993 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
22995 (aarch64_full_sve_mode): Likewise.
22996 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
22998 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
22999 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
23000 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
23001 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
23003 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
23005 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
23006 (TYPES_all_data): Add bf16.
23007 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
23008 (register_tuple_type): Increase buffer size.
23009 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
23010 (bf16): New type suffix.
23011 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
23012 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
23013 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
23014 Change type from all_data to all_arith.
23015 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
23016 (svminp): Likewise.
23018 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
23019 Matthew Malcomson <matthew.malcomson@arm.com>
23020 Richard Sandiford <richard.sandiford@arm.com>
23022 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
23023 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
23024 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
23025 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
23026 __ARM_FEATURE_MATMUL_FP64.
23027 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
23028 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
23029 be disabled at the same time.
23030 (f32mm): New extension.
23031 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
23032 (AARCH64_FL_F64MM): Bump to the next bit up.
23033 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
23034 (TARGET_SVE_F64MM): New macros.
23035 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
23036 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
23037 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
23038 (UNSPEC_ZIP2Q): New unspeccs.
23039 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
23040 (optab, sur, perm_insn): Handle the new unspecs.
23041 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
23042 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
23043 TARGET_SVE_F64MM instead of separate tests.
23044 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
23045 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
23046 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
23047 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
23048 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
23049 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
23050 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
23051 (TYPES_s_signed): New macro.
23052 (TYPES_s_integer): Use it.
23053 (TYPES_d_float): New macro.
23054 (TYPES_d_data): Use it.
23055 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
23056 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
23057 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
23058 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
23059 (svmmla): New shape.
23060 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
23061 template parameters.
23062 (ternary_resize2_lane_base): Likewise.
23063 (ternary_resize2_base): New class.
23064 (ternary_qq_lane_base): Likewise.
23065 (ternary_intq_uintq_lane_def): Likewise.
23066 (ternary_intq_uintq_lane): New shape.
23067 (ternary_intq_uintq_opt_n_def): New class
23068 (ternary_intq_uintq_opt_n): New shape.
23069 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
23070 (ternary_uintq_intq_def): New class.
23071 (ternary_uintq_intq): New shape.
23072 (ternary_uintq_intq_lane_def): New class.
23073 (ternary_uintq_intq_lane): New shape.
23074 (ternary_uintq_intq_opt_n_def): New class.
23075 (ternary_uintq_intq_opt_n): New shape.
23076 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
23077 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
23078 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
23079 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
23081 (svdotprod_lane_impl): ...this new class.
23082 (svmmla_impl, svusdot_impl): New classes.
23083 (svdot_lane): Update to use svdotprod_lane_impl.
23084 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
23085 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
23087 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
23088 function, with no types defined.
23089 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
23090 AARCH64_FL_I8MM functions.
23091 (svmmla): New AARCH64_FL_F32MM function.
23092 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
23093 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
23094 AARCH64_FL_F64MM function.
23095 (REQUIRED_EXTENSIONS):
23097 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
23099 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
23102 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
23104 * config/i386/i386.md (*movoi_internal_avx): Do not check for
23105 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
23106 (*movti_internal): Do not check for
23107 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
23108 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
23109 just after check for TARGET_AVX.
23110 (*movdf_internal): Ditto.
23111 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
23112 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
23113 * config/i386/sse.md (mov<mode>_internal): Only check
23114 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
23115 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
23116 (<sse>_andnot<mode>3<mask_name>): Move check for
23117 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
23118 (<code><mode>3<mask_name>): Ditto.
23119 (*andnot<mode>3): Ditto.
23120 (*andnottf3): Ditto.
23121 (*<code><mode>3): Ditto.
23122 (*<code>tf3): Ditto.
23123 (*andnot<VI:mode>3): Remove
23124 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
23125 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
23126 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
23127 (sse4_1_blendv<ssemodesuffix>): Ditto.
23128 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
23129 Explain that tune applies to 128bit instructions only.
23131 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
23133 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
23134 to definition of hsa_kernel_description. Parse assembly to find SGPR
23135 and VGPR count of kernel and store in hsa_kernel_description.
23137 2020-01-31 Tamar Christina <tamar.christina@arm.com>
23139 PR rtl-optimization/91838
23140 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
23141 to truncate if allowed or reject combination.
23143 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
23145 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
23146 (find_inv_vars_cb): Likewise.
23148 2020-01-31 David Malcolm <dmalcolm@redhat.com>
23150 * calls.c (special_function_p): Split out the check for DECL_NAME
23151 being non-NULL and fndecl being extern at file scope into a
23152 new maybe_special_function_p and call it. Drop check for fndecl
23153 being non-NULL that was after a usage of DECL_NAME (fndecl).
23154 * tree.h (maybe_special_function_p): New inline function.
23156 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
23158 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
23159 (mask_gather_load<mode>): ... here, and zero-initialize the
23161 (maskload<mode>di): Zero-initialize the destination.
23162 * config/gcn/gcn.c:
23164 2020-01-30 David Malcolm <dmalcolm@redhat.com>
23167 * doc/analyzer.texi (Limitations): Note that constraints on
23168 floating-point values are currently ignored.
23170 2020-01-30 Jakub Jelinek <jakub@redhat.com>
23173 * symtab.c (symtab_node::noninterposable_alias): If localalias
23174 already exists, but is not usable, append numbers after it until
23175 a unique name is found. Formatting fix.
23177 PR middle-end/93505
23178 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
23181 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
23183 * config/gcn/gcn.c (print_operand): Handle LTGT.
23184 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
23186 2020-01-30 Richard Biener <rguenther@suse.de>
23188 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
23189 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
23191 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
23193 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
23194 without a DECL in .data.rel.ro.local.
23196 2020-01-30 Jakub Jelinek <jakub@redhat.com>
23199 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
23203 * config/i386/sse.md
23204 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
23205 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
23206 any_extend code iterator instead of always zero_extend.
23207 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
23208 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
23209 Use any_extend code iterator instead of always zero_extend.
23210 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
23211 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
23212 Use any_extend code iterator instead of always zero_extend.
23213 (*sse2_pmovmskb_ext): New define_insn.
23214 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
23217 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
23218 (*popcountsi2_zext_falsedep): New define_insn.
23220 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23222 * config.in: Regenerated.
23223 * configure: Regenerated.
23225 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
23228 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
23229 LLVM's assembler changed the default in version 9.
23231 2020-01-24 Jeff Law <law@redhat.com>
23233 PR tree-optimization/89689
23234 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
23236 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
23240 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23242 PR rtl-optimization/87763
23243 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
23244 simplification to handle subregs as well as bare regs.
23245 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
23247 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
23250 * ira.c (ira): Revert use of simplified LRA algorithm.
23252 2020-01-29 Martin Jambor <mjambor@suse.cz>
23254 PR tree-optimization/92706
23255 * tree-sra.c (struct access): Fields first_link, last_link,
23256 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
23257 next_rhs_queued and grp_rhs_queued respectively, new fields
23258 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
23259 (struct assign_link): Field next renamed to next_rhs, new field
23260 next_lhs. Updated comment.
23261 (work_queue_head): Renamed to rhs_work_queue_head.
23262 (lhs_work_queue_head): New variable.
23263 (add_link_to_lhs): New function.
23264 (relink_to_new_repr): Also relink LHS lists.
23265 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
23266 (add_access_to_lhs_work_queue): New function.
23267 (pop_access_from_work_queue): Renamed to
23268 pop_access_from_rhs_work_queue.
23269 (pop_access_from_lhs_work_queue): New function.
23270 (build_accesses_from_assign): Also add links to LHS lists and to LHS
23272 (child_would_conflict_in_lacc): Renamed to
23273 child_would_conflict_in_acc. Adjusted parameter names.
23274 (create_artificial_child_access): New parameter set_grp_read, use it.
23275 (subtree_mark_written_and_enqueue): Renamed to
23276 subtree_mark_written_and_rhs_enqueue.
23277 (propagate_subaccesses_across_link): Renamed to
23278 propagate_subaccesses_from_rhs.
23279 (propagate_subaccesses_from_lhs): New function.
23280 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
23283 2020-01-29 Martin Jambor <mjambor@suse.cz>
23285 PR tree-optimization/92706
23286 * tree-sra.c (struct access): Adjust comment of
23287 grp_total_scalarization.
23288 (find_access_in_subtree): Look for single children spanning an entire
23290 (scalarizable_type_p): Allow register accesses, adjust callers.
23291 (completely_scalarize): Remove function.
23292 (scalarize_elem): Likewise.
23293 (create_total_scalarization_access): Likewise.
23294 (sort_and_splice_var_accesses): Do not track total scalarization
23296 (analyze_access_subtree): New parameter totally, adjust to new meaning
23297 of grp_total_scalarization.
23298 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
23299 (can_totally_scalarize_forest_p): New function.
23300 (create_total_scalarization_access): Likewise.
23301 (create_total_access_and_reshape): Likewise.
23302 (total_should_skip_creating_access): Likewise.
23303 (totally_scalarize_subtree): Likewise.
23304 (analyze_all_variable_accesses): Perform total scalarization after
23305 subaccess propagation using the new functions above.
23306 (initialize_constant_pool_replacements): Output initializers by
23307 traversing the access tree.
23309 2020-01-29 Martin Jambor <mjambor@suse.cz>
23311 * tree-sra.c (verify_sra_access_forest): New function.
23312 (verify_all_sra_access_forests): Likewise.
23313 (create_artificial_child_access): Set parent.
23314 (analyze_all_variable_accesses): Call the verifier.
23316 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23318 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
23319 if called on indirect edge.
23320 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
23321 speculative call if needed.
23323 2020-01-29 Richard Biener <rguenther@suse.de>
23325 PR tree-optimization/93428
23326 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
23327 permutation when the load node is created.
23328 (vect_analyze_slp_instance): Re-use it here.
23330 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23332 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
23334 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
23336 PR rtl-optimization/93272
23337 * ira-lives.c (process_out_of_region_eh_regs): New function.
23338 (process_bb_node_lives): Call it.
23340 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23342 * coverage.c (read_counts_file): Make error message lowercase.
23344 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23346 * profile-count.c (profile_quality_display_names): Fix ordering.
23348 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
23351 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
23352 hash only when edge is first within the sequence.
23353 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
23354 (symbol_table::create_edge): Do not set target_prob.
23355 (cgraph_edge::remove_caller): Watch for speculative calls when updating
23356 the call site hash.
23357 (cgraph_edge::make_speculative): Drop target_prob parameter.
23358 (cgraph_edge::speculative_call_info): Remove.
23359 (cgraph_edge::first_speculative_call_target): New member function.
23360 (update_call_stmt_hash_for_removing_direct_edge): New function.
23361 (cgraph_edge::resolve_speculation): Rewrite to new API.
23362 (cgraph_edge::speculative_call_for_target): New member function.
23363 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
23364 multiple speculation targets.
23365 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
23367 (verify_speculative_call): Verify that targets form an interval.
23368 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
23369 (cgraph_edge::first_speculative_call_target): New member function.
23370 (cgraph_edge::next_speculative_call_target): New member function.
23371 (cgraph_edge::speculative_call_target_ref): New member function.
23372 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
23373 (cgraph_edge): Remove target_prob.
23374 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
23375 Fix handling of speculative calls.
23376 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
23377 * ipa-fnsummary.c (analyze_function_body): Likewise.
23378 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
23379 * ipa-profile.c (dump_histogram): Fix formating.
23380 (ipa_profile_generate_summary): Watch for overflows.
23381 (ipa_profile): Do not require probablity to be 1/2; update to new API.
23382 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
23383 (update_indirect_edges_after_inlining): Update to new API.
23384 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
23386 * profile-count.h: (profile_probability::adjusted): New.
23387 * tree-inline.c (copy_bb): Update to new speculative call API; fix
23388 updating of profile.
23389 * value-prof.c (gimple_ic_transform): Rename to ...
23390 (dump_ic_profile): ... this one; update dumping.
23391 (stream_in_histogram_value): Fix formating.
23392 (gimple_value_profile_transformations): Update.
23394 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
23397 * config/i386/i386.md (*movoi_internal_avx): Remove
23398 TARGET_SSE_TYPELESS_STORES check.
23399 (*movti_internal): Prefer TARGET_AVX over
23400 TARGET_SSE_TYPELESS_STORES.
23401 (*movtf_internal): Likewise.
23402 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
23403 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
23404 from TARGET_SSE_TYPELESS_STORES.
23406 2020-01-28 David Malcolm <dmalcolm@redhat.com>
23408 * diagnostic-core.h (warning_at): Rename overload to...
23409 (warning_meta): ...this.
23410 (emit_diagnostic_valist): Delete decl of overload taking
23411 diagnostic_metadata.
23412 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
23413 (warning_at): Rename overload taking diagnostic_metadata to...
23414 (warning_meta): ...this.
23416 2020-01-28 Richard Biener <rguenther@suse.de>
23418 PR tree-optimization/93439
23419 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
23420 * tree-cfg.c (move_sese_region_to_fn): ... here.
23421 (verify_types_in_gimple_reference): Verify used cliques are
23424 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
23427 * config/i386/i386-options.c (set_ix86_tune_features): Add an
23428 argument of a pointer to struct gcc_options and pass it to
23429 parse_mtune_ctrl_str.
23430 (ix86_function_specific_restore): Pass opts to
23431 set_ix86_tune_features.
23432 (ix86_option_override_internal): Likewise.
23433 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
23434 gcc_options and use it for x_ix86_tune_ctrl_string.
23436 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23438 PR rtl-optimization/87763
23439 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
23440 simplification to handle subregs as well as bare regs.
23441 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
23443 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23445 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
23446 for reduction chains that (now) include a call.
23448 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23450 PR tree-optimization/92822
23451 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
23452 out the don't-care elements of a vector whose significant elements
23453 are duplicates, make the don't-care elements duplicates too.
23455 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23457 PR tree-optimization/93434
23458 * tree-predcom.c (split_data_refs_to_components): Record which
23459 components have had aliasing loads removed. Prevent store-store
23460 commoning for all such components.
23462 2020-01-28 Jakub Jelinek <jakub@redhat.com>
23465 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
23466 -1 or is_vshift is true, use new_vector with number of elts npatterns
23467 rather than new_unary_operation.
23469 PR tree-optimization/93454
23470 * gimple-fold.c (fold_array_ctor_reference): Perform
23471 elt_size.to_uhwi () just once, instead of calling it in every
23472 iteration. Punt if that value is above size of the temporary
23473 buffer. Decrease third native_encode_expr argument when
23474 bufoff + elt_sz is above size of buf.
23476 2020-01-27 Joseph Myers <joseph@codesourcery.com>
23478 * config/mips/mips.c (mips_declare_object_name)
23479 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
23481 2020-01-27 Martin Liska <mliska@suse.cz>
23483 PR gcov-profile/93403
23484 * tree-profile.c (gimple_init_gcov_profiler): Generate
23485 both __gcov_indirect_call_profiler_v4 and
23486 __gcov_indirect_call_profiler_v4_atomic.
23488 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23491 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
23493 (@aarch64_split_simd_mov<mode>): Use it.
23494 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
23495 Leave the vec_extract patterns to handle 2-element vectors.
23496 (aarch64_simd_mov_from_<mode>high): Likewise.
23497 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
23498 (vec_extractv2dfv1df): Likewise.
23500 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23502 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
23503 jump conditions for *compare_condjump<GPI:mode>.
23505 2020-01-27 David Malcolm <dmalcolm@redhat.com>
23508 * digraph.cc (test_edge::test_edge): Specify template for base
23511 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23513 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
23515 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23517 * config/arc/arc-protos.h (gen_mlo): Remove.
23518 (gen_mhi): Likewise.
23519 * config/arc/arc.c (AUX_MULHI): Define.
23520 (arc_must_save_reister): Special handling for r58/59.
23521 (arc_compute_frame_size): Consider mlo/mhi registers.
23522 (arc_save_callee_saves): Emit fp/sp move only when emit_move
23524 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
23525 mlo/mhi name selection.
23526 (arc_restore_callee_saves): Don't early restore blink when ISR.
23527 (arc_expand_prologue): Add mlo/mhi saving.
23528 (arc_expand_epilogue): Add mlo/mhi restoring.
23531 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
23532 numbering when MUL64 option is used.
23533 (DWARF2_FRAME_REG_OUT): Define.
23534 * config/arc/arc.md (arc600_stall): New pattern.
23535 (VUNSPEC_ARC_ARC600_STALL): Define.
23536 (mulsi64): Use correct mlo/mhi registers.
23537 (mulsi_600): Clean it up.
23538 * config/arc/predicates.md (mlo_operand): Remove any dependency on
23540 (mhi_operand): Likewise.
23542 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23543 Petro Karashchenko <petro.karashchenko@ring.com>
23545 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
23546 attributes if needed.
23547 (prepare_move_operands): Generate special unspec instruction for
23549 (arc_isuncached_mem_p): Propagate uncached attribute to each
23551 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
23552 (VUNSPEC_ARC_STDI): Likewise.
23553 (ALLI): New mode iterator.
23554 (mALLI): New mode attribute.
23555 (lddi): New instruction pattern.
23557 (stdidi_split): Split instruction for architectures which are not
23558 supporting ll64 option.
23559 (lddidi_split): Likewise.
23561 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23563 PR rtl-optimization/92989
23564 * lra-lives.c (process_bb_lives): Update the live-in set before
23565 processing additional clobbers.
23567 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23569 PR rtl-optimization/93170
23570 * cselib.c (cselib_invalidate_regno_val): New function, split out
23572 (cselib_invalidate_regno): ...here.
23573 (cselib_invalidated_by_call_p): New function.
23574 (cselib_process_insn): Iterate over all the hard-register entries in
23575 REG_VALUES and invalidate any that cross call-clobbered registers.
23577 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23579 * dojump.c (split_comparison): Use HONOR_NANS rather than
23580 HONOR_SNANS when splitting LTGT.
23582 2020-01-27 Martin Liska <mliska@suse.cz>
23585 * opts.c (print_filtered_help): Exclude language-specific
23586 options from --help=common unless enabled in all FEs.
23588 2020-01-27 Martin Liska <mliska@suse.cz>
23590 * opts.c (print_help): Exclude params from
23591 all except --help=param.
23593 2020-01-27 Martin Liska <mliska@suse.cz>
23596 * config/i386/i386-features.c (make_resolver_func):
23597 Align the code with ppc64 target implementation.
23598 Do not generate a unique name for resolver function.
23600 2020-01-27 Richard Biener <rguenther@suse.de>
23602 PR tree-optimization/93397
23603 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
23604 converted reduction chain SLP graph adjustment.
23606 2020-01-26 Marek Polacek <polacek@redhat.com>
23609 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
23612 2020-01-26 Jason Merrill <jason@redhat.com>
23615 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
23618 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
23620 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
23621 (rx_setmem): Likewise.
23623 2020-01-26 Jakub Jelinek <jakub@redhat.com>
23626 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
23627 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
23628 drop <di> from constraint of last operand.
23631 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
23632 TARGET_AVX2 and V4DFmode not in the split condition, but in the
23633 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
23635 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
23638 * ipa-cp.c (get_info_about_necessary_edges): Remove value
23641 2020-01-24 Jeff Law <law@redhat.com>
23643 PR tree-optimization/92788
23644 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
23647 2020-01-24 Jakub Jelinek <jakub@redhat.com>
23650 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
23651 *avx_vperm_broadcast_<mode>,
23652 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
23653 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
23654 Move before avx2_perm<mode>/avx512f_perm<mode>.
23657 * simplify-rtx.c (simplify_const_unary_operation,
23658 simplify_const_binary_operation): Punt for mode precision above
23659 MAX_BITSIZE_MODE_ANY_INT.
23661 2020-01-24 Andrew Pinski <apinski@marvell.com>
23663 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
23664 alu.shift_reg to 0.
23666 2020-01-24 Jeff Law <law@redhat.com>
23669 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
23670 for REGs. Call output_operand_lossage to get more reasonable
23673 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
23675 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
23676 gcn_fp_compare_operator.
23677 (vec_cmpu<mode>di): Use gcn_compare_operator.
23678 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
23679 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
23680 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
23681 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
23682 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
23683 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
23684 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
23685 gcn_fp_compare_operator.
23686 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
23687 gcn_fp_compare_operator.
23688 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
23689 gcn_fp_compare_operator.
23690 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
23691 gcn_fp_compare_operator.
23693 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
23695 * doc/install.texi (Cross-Compiler-Specific Options): Document
23696 `--with-toolexeclibdir' option.
23698 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
23700 * target.def (flags_regnum): Also mention effect on delay slot filling.
23701 * doc/tm.texi: Regenerate.
23703 2020-01-23 Jeff Law <law@redhat.com>
23705 PR translation/90162
23706 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
23708 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
23711 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
23714 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23716 PR rtl-optimization/93402
23717 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
23720 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23722 * config.in: Regenerated.
23723 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
23724 for TARGET_LIBC_GNUSTACK.
23725 * configure: Regenerated.
23726 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
23727 found to be 2.31 or greater.
23729 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23731 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
23733 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
23734 (mips_asm_file_end): New function. Delegate to
23735 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
23736 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
23738 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23741 * config/i386/i386-modes.def (POImode): New mode.
23742 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
23743 * config/i386/i386.md (DPWI): New mode attribute.
23744 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
23745 (QWI): Rename to...
23746 (QPWI): ... this. Use POI instead of OI for TImode.
23747 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
23748 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
23751 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23754 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
23756 (speculation_tracker_rev): New pattern.
23757 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
23758 Use speculation_tracker_rev to track the inverse condition.
23760 2020-01-23 Richard Biener <rguenther@suse.de>
23762 PR tree-optimization/93381
23763 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
23764 alias-set of the def as argument and record the first one.
23765 (vn_walk_cb_data::first_set): New member.
23766 (vn_reference_lookup_3): Pass the alias-set of the current def
23767 to push_partial_def. Fix alias-set used in the aggregate copy
23769 (vn_reference_lookup): Consistently set *last_vuse_ptr.
23770 * real.c (clear_significand_below): Fix out-of-bound access.
23772 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23775 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
23776 New define_insn patterns.
23778 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23780 * doc/sourcebuild.texi (check-function-bodies): Add an
23781 optional target/xfail selector.
23783 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23785 PR rtl-optimization/93124
23786 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
23787 bare USE and CLOBBER insns.
23789 2020-01-22 Andrew Pinski <apinski@marvell.com>
23791 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
23793 2020-01-22 David Malcolm <dmalcolm@redhat.com>
23796 * gdbinit.in (break-on-saved-diagnostic): Update for move of
23797 diagnostic_manager into "ana" namespace.
23798 * selftest-run-tests.c (selftest::run_tests): Update for move of
23799 selftest::run_analyzer_selftests to
23800 ana::selftest::run_analyzer_selftests.
23802 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
23804 * cfgexpand.c (union_stack_vars): Update the size.
23806 2020-01-22 Richard Biener <rguenther@suse.de>
23808 PR tree-optimization/93381
23809 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
23810 throughout, handle all conversions the same.
23812 2020-01-22 Jakub Jelinek <jakub@redhat.com>
23815 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
23816 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
23817 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
23818 Call force_reg on high_in2 unconditionally.
23820 2020-01-22 Martin Liska <mliska@suse.cz>
23822 PR tree-optimization/92924
23823 * profile.c (compute_value_histograms): Divide
23824 all counter values.
23826 2020-01-22 Jakub Jelinek <jakub@redhat.com>
23829 * output.h (assemble_name_resolve): Declare.
23830 * varasm.c (assemble_name_resolve): New function.
23831 (assemble_name): Use it.
23832 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
23834 2020-01-22 Joseph Myers <joseph@codesourcery.com>
23836 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
23837 update_web_docs_git instead of update_web_docs_svn.
23839 2020-01-21 Andrew Pinski <apinski@marvell.com>
23842 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
23843 as PTR mode. Have operand 1 as being modeless, it can be P mode.
23844 (*tlsgd_small_<mode>): Likewise.
23845 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
23846 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
23847 register. Convert that register back to dest using convert_mode.
23849 2020-01-21 Jim Wilson <jimw@sifive.com>
23851 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
23854 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
23855 Uros Bizjak <ubizjak@gmail.com>
23858 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
23860 (legitimize_tls_address): Do GNU2 TLS address computation in
23861 ptr_mode and zero-extend result to Pmode.
23862 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
23863 :P with :PTR and Pmode with ptr_mode.
23864 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
23865 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
23866 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
23868 2020-01-21 Jakub Jelinek <jakub@redhat.com>
23871 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
23872 the last two operands are CONST_INT_P before using them as such.
23874 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
23876 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
23877 to get the integer element types.
23879 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
23881 * config/aarch64/aarch64-sve-builtins.h
23882 (function_expander::convert_to_pmode): Declare.
23883 * config/aarch64/aarch64-sve-builtins.cc
23884 (function_expander::convert_to_pmode): New function.
23885 (function_expander::get_contiguous_base): Use it.
23886 (function_expander::prepare_gather_address_operands): Likewise.
23887 * config/aarch64/aarch64-sve-builtins-sve2.cc
23888 (svwhilerw_svwhilewr_impl::expand): Likewise.
23890 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
23893 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
23894 cfun->machine->label_is_assembled.
23895 (aarch64_print_patchable_function_entry): New.
23896 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
23897 * config/aarch64/aarch64.h (struct machine_function): New field,
23898 label_is_assembled.
23900 2020-01-21 David Malcolm <dmalcolm@redhat.com>
23903 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
23906 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23909 * cgraph.c (cgraph_edge::resolve_speculation,
23910 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
23911 call_stmt_site_hash.
23913 2020-01-21 Martin Liska <mliska@suse.cz>
23915 * config/rs6000/rs6000.c (common_mode_defined): Remove
23918 2020-01-21 Richard Biener <rguenther@suse.de>
23920 PR tree-optimization/92328
23921 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
23922 type when value-numbering same-sized store by inserting a
23924 (eliminate_dom_walker::eliminate_stmt): When eliminating
23925 a redundant store handle bit-reinterpretation of the same value.
23927 2020-01-21 Andrew Pinski <apinski@marvel.com>
23930 * tree-into-ssa.c (prepare_block_for_update_1): Split out
23932 (prepare_block_for_update): This. Use a worklist instead of
23935 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23937 * config/arm/arm.c (clear_operation_p):
23938 Initialise last_regno, skip first iteration
23939 based on the first_set value and use ints instead
23940 of the unnecessary HOST_WIDE_INTs.
23942 2020-01-21 Jakub Jelinek <jakub@redhat.com>
23945 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
23946 compare_mode other than SFmode or DFmode.
23948 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
23951 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
23952 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
23953 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
23955 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
23957 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
23959 2020-01-20 Andrew Pinski <apinski@marvell.com>
23961 PR middle-end/93242
23962 * targhooks.c (default_print_patchable_function_entry): Use
23963 output_asm_insn to emit the nop instruction.
23965 2020-01-20 Fangrui Song <maskray@google.com>
23967 PR middle-end/93194
23968 * targhooks.c (default_print_patchable_function_entry): Align to
23971 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
23974 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
23975 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
23976 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
23977 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
23978 (*tls_dynamic_gnu2_lea_64): Renamed to ...
23979 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
23980 Remove the {q} suffix from lea.
23981 (*tls_dynamic_gnu2_call_64): Renamed to ...
23982 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
23983 (*tls_dynamic_gnu2_combine_64): Renamed to ...
23984 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
23985 Pass Pmode to gen_tls_dynamic_gnu2_64.
23987 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
23989 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
23991 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
23993 * config/aarch64/aarch64-sve-builtins-base.cc
23994 (svld1ro_impl::memory_vector_mode): Remove parameter name.
23996 2020-01-20 Richard Biener <rguenther@suse.de>
23999 * dwarf2out.c (prune_unused_types): Unconditionally mark
24000 called function DIEs.
24002 2020-01-20 Martin Liska <mliska@suse.cz>
24004 PR tree-optimization/93199
24005 * tree-eh.c (struct leh_state): Add
24006 new field outer_non_cleanup.
24007 (cleanup_is_dead_in): Pass leh_state instead
24008 of eh_region. Add a checking that state->outer_non_cleanup
24009 points to outer non-clean up region.
24010 (lower_try_finally): Record outer_non_cleanup
24012 (lower_catch): Likewise.
24013 (lower_eh_filter): Likewise.
24014 (lower_eh_must_not_throw): Likewise.
24015 (lower_cleanup): Likewise.
24017 2020-01-20 Richard Biener <rguenther@suse.de>
24019 PR tree-optimization/93094
24020 * tree-vectorizer.h (vect_loop_versioning): Adjust.
24021 (vect_transform_loop): Likewise.
24022 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
24023 loop_vectorized_call to vect_transform_loop.
24024 * tree-vect-loop.c (vect_transform_loop): Pass down
24025 loop_vectorized_call to vect_loop_versioning.
24026 * tree-vect-loop-manip.c (vect_loop_versioning): Use
24027 the earlier discovered loop_vectorized_call.
24029 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
24031 * doc/contribute.texi: Update for SVN -> Git transition.
24032 * doc/install.texi: Likewise.
24034 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
24037 * cgraph.c (cgraph_edge::make_speculative): Increase number of
24038 speculative targets.
24039 (verify_speculative_call): New function
24040 (cgraph_node::verify_node): Use it.
24041 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
24044 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
24047 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
24048 (cgraph_edge::make_direct): Remove all indirect targets.
24049 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
24050 (cgraph_node::verify_node): Verify that only one call_stmt or
24051 lto_stmt_uid is set.
24052 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
24054 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
24055 (lto_output_ref): Simplify streaming of stmt.
24056 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
24058 2020-01-18 Tamar Christina <tamar.christina@arm.com>
24060 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
24061 Mark parameter unused.
24063 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
24065 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
24067 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
24069 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
24071 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
24073 * Makefile.in: Add coroutine-passes.o.
24074 * builtin-types.def (BT_CONST_SIZE): New.
24075 (BT_FN_BOOL_PTR): New.
24076 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
24077 * builtins.def (DEF_COROUTINE_BUILTIN): New.
24078 * coroutine-builtins.def: New file.
24079 * coroutine-passes.cc: New file.
24080 * function.h (struct GTY function): Add a bit to indicate that the
24081 function is a coroutine component.
24082 * internal-fn.c (expand_CO_FRAME): New.
24083 (expand_CO_YIELD): New.
24084 (expand_CO_SUSPN): New.
24085 (expand_CO_ACTOR): New.
24086 * internal-fn.def (CO_ACTOR): New.
24090 * passes.def: Add pass_coroutine_lower_builtins,
24091 pass_coroutine_early_expand_ifns.
24092 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
24093 (make_pass_coroutine_early_expand_ifns): New.
24094 * doc/invoke.texi: Document the fcoroutines command line
24097 2020-01-18 Jakub Jelinek <jakub@redhat.com>
24099 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
24102 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
24103 after checking the argument is a REG. Don't use REGNO (reg)
24104 again to set last_regno, reuse regno variable instead.
24106 2020-01-17 David Malcolm <dmalcolm@redhat.com>
24108 * doc/analyzer.texi (Limitations): Add note about NaN.
24110 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24111 Sudakshina Das <sudi.das@arm.com>
24113 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
24114 and valid immediate.
24115 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
24116 (lshrdi3): Generate thumb2_lsrl for valid immediates.
24117 * config/arm/constraints.md (Pg): New.
24118 * config/arm/predicates.md (long_shift_imm): New.
24119 (arm_reg_or_long_shift_imm): Likewise.
24120 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
24121 (thumb2_lsll): Likewise.
24122 (thumb2_lsrl): New.
24124 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24125 Sudakshina Das <sudi.das@arm.com>
24127 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
24128 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
24129 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
24130 register pairs for doubleword quantities for ARMv8.1M-Mainline.
24131 * config/arm/thumb2.md (thumb2_asrl): New.
24132 (thumb2_lsll): Likewise.
24134 2020-01-17 Jakub Jelinek <jakub@redhat.com>
24136 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
24139 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
24141 * gdbinit.in (help-gcc-hooks): New command.
24142 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
24143 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
24146 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24148 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
24149 correct target macro.
24151 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24153 * config/aarch64/aarch64-protos.h
24154 (aarch64_sve_ld1ro_operand_p): New.
24155 * config/aarch64/aarch64-sve-builtins-base.cc
24156 (class load_replicate): New.
24157 (class svld1ro_impl): New.
24158 (class svld1rq_impl): Change to inherit from load_replicate.
24159 (svld1ro): New sve intrinsic function base.
24160 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
24161 New DEF_SVE_FUNCTION.
24162 * config/aarch64/aarch64-sve-builtins-base.h
24163 (svld1ro): New decl.
24164 * config/aarch64/aarch64-sve-builtins.cc
24165 (function_expander::add_mem_operand): Modify assert to allow
24167 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
24169 * config/aarch64/aarch64.c
24170 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
24171 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
24172 (aarch64_sve_ld1ro_operand_p): New.
24173 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
24174 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
24175 * config/aarch64/predicates.md
24176 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
24178 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
24180 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
24181 Introduce this ACLE specified predefined macro.
24182 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
24183 (fp): Disabling this disables f64mm.
24184 (simd): Disabling this disables f64mm.
24185 (fp16): Disabling this disables f64mm.
24186 (sve): Disabling this disables f64mm.
24187 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
24188 (AARCH64_ISA_F64MM): New.
24189 (TARGET_F64MM): New.
24190 * doc/invoke.texi (f64mm): Document new option.
24192 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
24194 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
24195 (neoversen1_tunings): Likewise.
24197 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
24200 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
24201 Add assert to ensure prolog has been emitted.
24202 (aarch64_split_atomic_op): Likewise.
24203 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
24204 Use epilogue_completed rather than reload_completed.
24205 (aarch64_atomic_exchange<mode>): Likewise.
24206 (aarch64_atomic_<atomic_optab><mode>): Likewise.
24207 (atomic_nand<mode>): Likewise.
24208 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
24209 (atomic_fetch_nand<mode>): Likewise.
24210 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
24211 (atomic_nand_fetch<mode>): Likewise.
24213 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
24216 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
24218 (REVERSE_CONDITION): Delete.
24219 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
24220 (CCFP_CCFPE): Likewise.
24221 (e): New mode attribute.
24222 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
24223 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
24224 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
24225 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
24226 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
24227 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
24228 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
24229 name of generator from gen_ccmpdi to gen_ccmpccdi.
24230 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
24231 the previous comparison but aren't able to, use the new ccmp_rev
24234 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
24236 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
24237 than testing directly for INTEGER_CST.
24238 (gimplify_target_expr, gimplify_omp_depend): Likewise.
24240 2020-01-17 Jakub Jelinek <jakub@redhat.com>
24242 PR tree-optimization/93292
24243 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
24244 get_vectype_for_scalar_type returns NULL.
24246 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
24248 * params.opt (-param=max-predicted-iterations): Increase range from 0.
24249 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
24251 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
24253 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
24255 * params.opt: (max-predicted-iterations): Set bounds.
24256 * predict.c (real_almost_one, real_br_prob_base,
24257 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
24258 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
24259 probabilities; do not truncate to reg_br_prob_bases.
24260 (estimate_loops_at_level): Pass max_cyclic_prob.
24261 (estimate_loops): Compute max_cyclic_prob.
24262 (estimate_bb_frequencies): Do not initialize real_*; update calculation
24264 * profile-count.c (profile_probability::to_sreal): New.
24265 * profile-count.h (class sreal): Move up in file.
24266 (profile_probability::to_sreal): Declare.
24268 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24271 (arm_invalid_conversion): New function for target hook.
24272 (arm_invalid_unary_op): New function for target hook.
24273 (arm_invalid_binary_op): New function for target hook.
24275 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24277 * config.gcc: Add arm_bf16.h.
24278 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
24279 (arm_simd_builtin_std_type): Add BFmode.
24280 (arm_init_simd_builtin_types): Define element types for vector types.
24281 (arm_init_bf16_types): New function.
24282 (arm_init_builtins): Add arm_init_bf16_types function call.
24283 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
24284 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
24285 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
24286 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
24287 (arm_vector_mode_supported_p): Add V4BF, V8BF.
24288 (arm_mangle_type): Add __bf16.
24289 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
24290 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
24291 arm_bf16_ptr_type_node.
24292 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
24293 define_split between ARM registers.
24294 * config/arm/arm_bf16.h: New file.
24295 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
24296 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
24297 (VQXMOV): Add V8BF.
24298 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
24299 * config/arm/vfp.md: Add BFmode to movhf patterns.
24301 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
24302 Andre Vieira <andre.simoesdiasvieira@arm.com>
24304 * config/arm/arm-cpus.in (mve, mve_float): New features.
24305 (dsp, mve, mve.fp): New options.
24306 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
24307 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
24308 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
24310 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24311 Thomas Preud'homme <thomas.preudhomme@arm.com>
24313 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
24315 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
24316 error for using -mcmse when targeting Armv8.1-M Mainline.
24318 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24319 Thomas Preud'homme <thomas.preudhomme@arm.com>
24321 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
24322 address in r4 when targeting Armv8.1-M Mainline.
24323 (nonsecure_call_value_internal): Likewise.
24324 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
24325 a register match_operand again. Emit BLXNS when targeting
24326 Armv8.1-M Mainline.
24327 (nonsecure_call_value_reg_thumb2): Likewise.
24329 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24330 Thomas Preud'homme <thomas.preudhomme@arm.com>
24332 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
24333 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
24334 variable as true when floating-point ABI is not hard. Replace
24335 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
24336 Generate VLSTM and VLLDM instruction respectively before and
24337 after a function call to cmse_nonsecure_call function.
24338 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
24339 (VUNSPEC_VLLDM): Likewise.
24340 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
24341 (lazy_load_multiple_insn): Likewise.
24343 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24344 Thomas Preud'homme <thomas.preudhomme@arm.com>
24346 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
24347 (arm_emit_vfp_multi_reg_pop): Likewise.
24348 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
24349 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
24350 restore callee-saved VFP registers.
24352 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24353 Thomas Preud'homme <thomas.preudhomme@arm.com>
24355 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
24356 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
24357 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
24358 callee-saved GPRs as well as clear ip register before doing a nonsecure
24359 call then restore callee-saved GPRs after it when targeting
24360 Armv8.1-M Mainline.
24361 (arm_reorg): Adapt to function rename.
24363 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24364 Thomas Preud'homme <thomas.preudhomme@arm.com>
24366 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
24367 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
24368 clear_vfp_multiple pattern based on a new vfp parameter.
24369 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
24370 targeting Armv8.1-M Mainline.
24371 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
24372 unconditionally when targeting Armv8.1-M Mainline architecture. Check
24373 whether VFP registers are available before looking call_used_regs for a
24375 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
24376 of prototype of clear_operation_p.
24377 (clear_vfp_multiple_operation): New predicate.
24378 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
24379 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
24381 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24382 Thomas Preud'homme <thomas.preudhomme@arm.com>
24384 * config/arm/arm-protos.h (clear_operation_p): Declare.
24385 * config/arm/arm.c (clear_operation_p): New function.
24386 (cmse_clear_registers): Generate clear_multiple instruction pattern if
24387 targeting Armv8.1-M Mainline or successor.
24388 (output_return_instruction): Only output APSR register clearing if
24389 Armv8.1-M Mainline instructions not available.
24390 (thumb_exit): Likewise.
24391 * config/arm/predicates.md (clear_multiple_operation): New predicate.
24392 * config/arm/thumb2.md (clear_apsr): New define_insn.
24393 (clear_multiple): Likewise.
24394 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
24396 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24397 Thomas Preud'homme <thomas.preudhomme@arm.com>
24399 * config/arm/arm.c (fp_sysreg_names): Declare and define.
24400 (use_return_insn): Also return false for Armv8.1-M Mainline.
24401 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
24402 Mainline instructions are available.
24403 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
24404 when targeting Armv8.1-M Mainline Security Extensions.
24405 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
24406 Mainline entry function.
24407 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
24408 targeting Armv8.1-M Mainline or successor.
24409 (arm_expand_epilogue): Fix indentation of caller-saved register
24410 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
24412 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
24413 (FP_SYSREGS): Likewise.
24414 (enum vfp_sysregs_encoding): Define enum.
24415 (fp_sysreg_names): Declare.
24416 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
24417 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
24418 (pop_fpsysreg_insn): Likewise.
24420 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24421 Thomas Preud'homme <thomas.preudhomme@arm.com>
24423 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
24424 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
24425 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
24426 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
24427 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
24428 (ARMv8_1m_main): New feature group.
24429 (armv8.1-m.main): New architecture.
24430 * config/arm/arm-tables.opt: Regenerate.
24431 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
24432 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
24433 (arm_options_perform_arch_sanity_checks): Error out when targeting
24434 Armv8.1-M Mainline Security Extensions.
24435 * config/arm/arm.h (arm_arch8_1m_main): Declare.
24437 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24439 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
24440 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
24441 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
24442 aarch64_bfdot_laneq): New.
24443 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
24444 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
24445 vbfdotq_laneq_f32): New.
24446 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
24447 VBFMLA_W, VBF): New.
24448 (isquadop): Add V4BF, V8BF.
24450 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24452 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
24453 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
24454 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
24455 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
24456 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
24457 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
24458 usdot_laneq, sudot_lane,sudot_laneq): New.
24459 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
24460 (aarch64_<sur>dot_lane): New.
24461 * config/aarch64/arm_neon.h (vusdot_s32): New.
24462 (vusdotq_s32): New.
24463 (vusdot_lane_s32): New.
24464 (vsudot_lane_s32): New.
24465 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
24466 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
24468 2020-01-16 Martin Liska <mliska@suse.cz>
24470 * value-prof.c (dump_histogram_value): Fix
24471 obvious spacing issue.
24473 2020-01-16 Andrew Pinski <apinski@marvell.com>
24475 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
24476 !storage_order_barrier_p.
24478 2020-01-16 Andrew Pinski <apinski@marvell.com>
24480 * sched-int.h (_dep): Add unused bit-field field for the padding.
24481 * sched-deps.c (init_dep_1): Init unused field.
24483 2020-01-16 Andrew Pinski <apinski@marvell.com>
24485 * optabs.h (create_expand_operand): Initialize target field also.
24487 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
24489 PR tree-optimization/92429
24490 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
24491 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
24493 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
24496 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
24498 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
24499 aarch64_sve_int_mode to each mode.
24501 2020-01-15 David Malcolm <dmalcolm@redhat.com>
24503 * doc/analyzer.texi (Overview): Add note about
24504 -fdump-ipa-analyzer.
24506 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
24508 PR tree-optimization/93231
24509 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
24510 input_type is unsigned. Use tree_to_shwi for shift constant.
24511 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
24512 (simplify_count_trailing_zeroes): Add test to handle known non-zero
24513 inputs more efficiently.
24515 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
24517 * config/i386/i386.md (*movsf_internal): Do not require
24518 SSE2 ISA for alternatives 14 and 15.
24520 2020-01-15 Richard Biener <rguenther@suse.de>
24522 PR middle-end/93273
24523 * tree-eh.c (sink_clobbers): If we already visited the destination
24524 block do not defer insertion.
24525 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
24526 the purpose of defered insertion.
24528 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24530 * BASE-VER: Bump to 10.0.1.
24532 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24534 PR tree-optimization/93247
24535 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
24536 type of the stmt that we're going to vectorize.
24538 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24540 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
24541 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
24544 2020-01-15 Martin Liska <mliska@suse.cz>
24546 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
24547 2 calls of streamer_read_hwi in a function call.
24549 2020-01-15 Richard Biener <rguenther@suse.de>
24551 * alias.c (record_alias_subset): Avoid redundant work when
24552 subset is already recorded.
24554 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24556 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
24557 the analyzer options provide CWE identifiers.
24559 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24561 * tree-diagnostic-path.cc (path_summary::event_range::print):
24562 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
24563 using get_pure_location.
24565 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24567 PR tree-optimization/93262
24568 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
24569 perform head trimming only if the last argument is constant,
24570 either all ones, or larger or equal to head trim, in the latter
24571 case decrease the last argument by head_trim.
24573 PR tree-optimization/93249
24574 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
24575 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
24576 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
24577 perform head trim unless we can prove there are no '\0' chars
24578 from the source among the first head_trim chars.
24580 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24582 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
24584 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24587 * config/i386/sse.md
24588 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
24589 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
24590 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
24591 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
24592 just a single alternative instead of two, make operands 1 and 2
24595 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
24598 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
24601 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24603 * Makefile.in (lang_opt_files): Add analyzer.opt.
24604 (ANALYZER_OBJS): New.
24605 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
24606 tristate.o and ANALYZER_OBJS.
24607 (TEXI_GCCINT_FILES): Add analyzer.texi.
24608 * common.opt (-fanalyzer): New driver option.
24609 * config.in: Regenerate.
24610 * configure: Regenerate.
24611 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
24612 (gccdepdir): Also create depdir for "analyzer" subdir.
24613 * digraph.cc: New file.
24614 * digraph.h: New file.
24615 * doc/analyzer.texi: New file.
24616 * doc/gccint.texi ("Static Analyzer") New menu item.
24617 (analyzer.texi): Include it.
24618 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
24619 ("Warning Options"): Add static analysis warnings to the list.
24620 (-Wno-analyzer-double-fclose): New option.
24621 (-Wno-analyzer-double-free): New option.
24622 (-Wno-analyzer-exposure-through-output-file): New option.
24623 (-Wno-analyzer-file-leak): New option.
24624 (-Wno-analyzer-free-of-non-heap): New option.
24625 (-Wno-analyzer-malloc-leak): New option.
24626 (-Wno-analyzer-possible-null-argument): New option.
24627 (-Wno-analyzer-possible-null-dereference): New option.
24628 (-Wno-analyzer-null-argument): New option.
24629 (-Wno-analyzer-null-dereference): New option.
24630 (-Wno-analyzer-stale-setjmp-buffer): New option.
24631 (-Wno-analyzer-tainted-array-index): New option.
24632 (-Wno-analyzer-use-after-free): New option.
24633 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
24634 (-Wno-analyzer-use-of-uninitialized-value): New option.
24635 (-Wanalyzer-too-complex): New option.
24636 (-fanalyzer-call-summaries): New warning.
24637 (-fanalyzer-checker=): New warning.
24638 (-fanalyzer-fine-grained): New warning.
24639 (-fno-analyzer-state-merge): New warning.
24640 (-fno-analyzer-state-purge): New warning.
24641 (-fanalyzer-transitivity): New warning.
24642 (-fanalyzer-verbose-edges): New warning.
24643 (-fanalyzer-verbose-state-changes): New warning.
24644 (-fanalyzer-verbosity=): New warning.
24645 (-fdump-analyzer): New warning.
24646 (-fdump-analyzer-callgraph): New warning.
24647 (-fdump-analyzer-exploded-graph): New warning.
24648 (-fdump-analyzer-exploded-nodes): New warning.
24649 (-fdump-analyzer-exploded-nodes-2): New warning.
24650 (-fdump-analyzer-exploded-nodes-3): New warning.
24651 (-fdump-analyzer-supergraph): New warning.
24652 * doc/sourcebuild.texi (dg-require-dot): New.
24653 (dg-check-dot): New.
24654 * gdbinit.in (break-on-saved-diagnostic): New command.
24655 * graphviz.cc: New file.
24656 * graphviz.h: New file.
24657 * ordered-hash-map-tests.cc: New file.
24658 * ordered-hash-map.h: New file.
24659 * passes.def (pass_analyzer): Add before
24660 pass_ipa_whole_program_visibility.
24661 * selftest-run-tests.c (selftest::run_tests): Call
24662 selftest::ordered_hash_map_tests_cc_tests.
24663 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
24665 * shortest-paths.h: New file.
24666 * timevar.def (TV_ANALYZER): New timevar.
24667 (TV_ANALYZER_SUPERGRAPH): Likewise.
24668 (TV_ANALYZER_STATE_PURGE): Likewise.
24669 (TV_ANALYZER_PLAN): Likewise.
24670 (TV_ANALYZER_SCC): Likewise.
24671 (TV_ANALYZER_WORKLIST): Likewise.
24672 (TV_ANALYZER_DUMP): Likewise.
24673 (TV_ANALYZER_DIAGNOSTICS): Likewise.
24674 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
24675 * tree-pass.h (make_pass_analyzer): New decl.
24676 * tristate.cc: New file.
24677 * tristate.h: New file.
24679 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
24682 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
24683 alternatives 9 and 10.
24685 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24687 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
24688 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
24689 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
24690 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
24691 (selftest::hash_map_tests_c_tests): Call it.
24692 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
24693 New static constant, using the value of = H::empty_zero_p.
24694 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
24695 from default_hash_traits <Value>.
24696 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
24698 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
24699 * hash-table.h (hash_table::alloc_entries): Guard the loop of
24700 calls to mark_empty with !Descriptor::empty_zero_p.
24701 (hash_table::empty_slow): Conditionalize the memset call with a
24702 check that Descriptor::empty_zero_p; otherwise, loop through the
24703 entries calling mark_empty on them.
24704 * hash-traits.h (int_hash::empty_zero_p): New static constant.
24705 (pointer_hash::empty_zero_p): Likewise.
24706 (pair_hash::empty_zero_p): Likewise.
24707 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
24709 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
24710 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
24711 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
24712 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
24713 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
24714 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
24715 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
24716 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
24717 * tree-vectorizer.h
24718 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
24721 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
24723 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
24724 fix typo on return value.
24726 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
24729 * cgraph.c (symbol_table::create_edge): Init speculative_id and
24731 (cgraph_edge::make_speculative): Add param for setting speculative_id
24733 (cgraph_edge::speculative_call_info): Update comments and find reference
24734 by speculative_id for multiple indirect targets.
24735 (cgraph_edge::resolve_speculation): Decrease the speculations
24736 for indirect edge, drop it's speculative if not direct target
24737 left. Update comments.
24738 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
24739 (cgraph_node::dump): Print num_speculative_call_targets.
24740 (cgraph_node::verify_node): Don't report error if speculative
24741 edge not include statement.
24742 (cgraph_edge::num_speculative_call_targets_p): New function.
24743 * cgraph.h (int common_target_id): Remove.
24744 (int common_target_probability): Remove.
24745 (num_speculative_call_targets): New variable.
24746 (make_speculative): Add param for setting speculative_id.
24747 (cgraph_edge::num_speculative_call_targets_p): New declare.
24748 (target_prob): New variable.
24749 (speculative_id): New variable.
24750 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
24751 call summaries for multiple speculative call targets.
24752 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
24753 * ipa-profile.c (struct speculative_call_target): New struct.
24754 (class speculative_call_summary): New class.
24755 (class speculative_call_summaries): New class.
24756 (call_sums): New variable.
24757 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
24758 (ipa_profile_write_edge_summary): New function.
24759 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
24760 (ipa_profile_dump_all_summaries): New function.
24761 (ipa_profile_read_edge_summary): New function.
24762 (ipa_profile_read_summary_section): New function.
24763 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
24764 (ipa_profile): Generate num_speculative_call_targets from
24766 * ipa-ref.h (speculative_id): New variable.
24767 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
24768 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
24769 common_target_probability. Stream out speculative_id and
24770 num_speculative_call_targets.
24771 (input_edge): Likewise.
24772 * predict.c (dump_prediction): Remove edges count assert to be
24774 * symtab.c (symtab_node::create_reference): Init speculative_id.
24775 (symtab_node::clone_references): Clone speculative_id.
24776 (symtab_node::clone_referring): Clone speculative_id.
24777 (symtab_node::clone_reference): Clone speculative_id.
24778 (symtab_node::clear_stmts_in_references): Clear speculative_id.
24779 * tree-inline.c (copy_bb): Duplicate all the speculative edges
24780 if indirect call contains multiple speculative targets.
24781 * value-prof.h (check_ic_target): Remove.
24782 * value-prof.c (gimple_value_profile_transformations):
24783 Use void function gimple_ic_transform.
24784 * value-prof.c (gimple_ic_transform): Handle topn case.
24785 Fix comment typos. Change it to a void function.
24787 2020-01-13 Andrew Pinski <apinski@marvell.com>
24789 * config/aarch64/aarch64-cores.def (octeontx2): New define.
24790 (octeontx2t98): New define.
24791 (octeontx2t96): New define.
24792 (octeontx2t93): New define.
24793 (octeontx2f95): New define.
24794 (octeontx2f95n): New define.
24795 (octeontx2f95mm): New define.
24796 * config/aarch64/aarch64-tune.md: Regenerate.
24797 * doc/invoke.texi (-mcpu=): Document the new cpu types.
24799 2020-01-13 Jason Merrill <jason@redhat.com>
24801 PR c++/33799 - destroy return value if local cleanup throws.
24802 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
24804 2020-01-13 Martin Liska <mliska@suse.cz>
24806 * ipa-cp.c (get_max_overall_size): Use newly
24807 renamed param param_ipa_cp_unit_growth.
24808 * params.opt: Remove legacy param name.
24810 2020-01-13 Martin Sebor <msebor@redhat.com>
24812 PR tree-optimization/93213
24813 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
24814 stores to be eliminated.
24816 2020-01-13 Martin Liska <mliska@suse.cz>
24818 * opts.c (print_help): Do not print CL_PARAM
24819 and CL_WARNING for CL_OPTIMIZATION.
24821 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
24824 * doc/invoke.texi (Warning Options): Add caveat about some warnings
24825 depending on optimization settings.
24827 2020-01-13 Jakub Jelinek <jakub@redhat.com>
24829 PR tree-optimization/90838
24830 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
24831 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
24832 argument rather than to initialize temporary for targets that
24833 don't use the mode argument at all. Initialize ctzval to avoid
24836 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
24838 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
24839 * tree-core.h: Document it.
24840 * gimplify.c (gimplify_omp_workshare): Set it.
24841 * omp-low.c (lower_omp_target): Use it.
24842 * tree-pretty-print.c (dump_omp_clause): Print it.
24844 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
24845 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
24847 2020-01-10 David Malcolm <dmalcolm@redhat.com>
24849 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
24850 * common.opt (fdiagnostics-path-format=): New option.
24851 (diagnostic_path_format): New enum.
24852 (fdiagnostics-show-path-depths): New option.
24853 * coretypes.h (diagnostic_event_id_t): New forward decl.
24854 * diagnostic-color.c (color_dict): Add "path".
24855 * diagnostic-event-id.h: New file.
24856 * diagnostic-format-json.cc (json_from_expanded_location): Make
24858 (json_end_diagnostic): Call context->make_json_for_path if it
24859 exists and the diagnostic has a path.
24860 (diagnostic_output_format_init): Clear context->print_path.
24861 * diagnostic-path.h: New file.
24862 * diagnostic-show-locus.c (colorizer::set_range): Special-case
24863 when printing a run of events in a diagnostic_path so that they
24864 all get the same color.
24865 (layout::m_diagnostic_path_p): New field.
24866 (layout::layout): Initialize it.
24867 (layout::print_any_labels): Don't colorize the label text for an
24868 event in a diagnostic_path.
24869 (gcc_rich_location::add_location_if_nearby): Add
24870 "restrict_to_current_line_spans" and "label" params. Pass the
24871 former to layout.maybe_add_location_range; pass the latter
24872 when calling add_range.
24873 * diagnostic.c: Include "diagnostic-path.h".
24874 (diagnostic_initialize): Initialize context->path_format and
24875 context->show_path_depths.
24876 (diagnostic_show_any_path): New function.
24877 (diagnostic_path::interprocedural_p): New function.
24878 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
24879 (simple_diagnostic_path::num_events): New function.
24880 (simple_diagnostic_path::get_event): New function.
24881 (simple_diagnostic_path::add_event): New function.
24882 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
24883 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
24884 (debug): New overload taking a diagnostic_path *.
24885 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
24886 * diagnostic.h (enum diagnostic_path_format): New enum.
24887 (json::value): New forward decl.
24888 (diagnostic_context::path_format): New field.
24889 (diagnostic_context::show_path_depths): New field.
24890 (diagnostic_context::print_path): New callback field.
24891 (diagnostic_context::make_json_for_path): New callback field.
24892 (diagnostic_show_any_path): New decl.
24893 (json_from_expanded_location): New decl.
24894 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
24895 (-fdiagnostics-show-path-depths): New option.
24896 (-fdiagnostics-color): Add "path" to description of default
24897 GCC_COLORS; describe it.
24898 (-fdiagnostics-format=json): Document how diagnostic paths are
24899 represented in the JSON output format.
24900 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
24901 Add optional params "restrict_to_current_line_spans" and "label".
24902 * opts.c (common_handle_option): Handle
24903 OPT_fdiagnostics_path_format_ and
24904 OPT_fdiagnostics_show_path_depths.
24905 * pretty-print.c: Include "diagnostic-event-id.h".
24906 (pp_format): Implement "%@" format code for printing
24907 diagnostic_event_id_t *.
24908 (selftest::test_pp_format): Add tests for "%@".
24909 * selftest-run-tests.c (selftest::run_tests): Call
24910 selftest::tree_diagnostic_path_cc_tests.
24911 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
24912 * toplev.c (general_init): Initialize global_dc->path_format and
24913 global_dc->show_path_depths.
24914 * tree-diagnostic-path.cc: New file.
24915 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
24916 non-static. Drop "diagnostic" param in favor of storing the
24917 original value of "where" and re-using it.
24918 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
24919 maybe_unwind_expanded_macro_loc.
24920 (tree_diagnostics_defaults): Initialize context->print_path and
24921 context->make_json_for_path.
24922 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
24924 (default_tree_make_json_for_path): New decl.
24925 (maybe_unwind_expanded_macro_loc): New decl.
24927 2020-01-10 Jakub Jelinek <jakub@redhat.com>
24929 PR tree-optimization/93210
24930 * fold-const.h (native_encode_initializer,
24931 can_native_interpret_type_p): Declare.
24932 * fold-const.c (native_encode_string): Fix up handling with off != -1,
24934 (native_encode_initializer): New function, moved from dwarf2out.c.
24935 Adjust to native_encode_expr compatible arguments, including dry-run
24936 and partial extraction modes. Don't handle STRING_CST.
24937 (can_native_interpret_type_p): No longer static.
24938 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
24939 offset / BITS_PER_UNIT fits into int and don't call it if
24940 can_native_interpret_type_p fails. If suboff is NULL and for
24941 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
24942 native_encode_initializer.
24943 (fold_const_aggregate_ref_1): Formatting fix.
24944 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
24945 (tree_add_const_value_attribute): Adjust caller.
24947 PR tree-optimization/90838
24948 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
24949 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
24950 CTZ_DEFINED_VALUE_AT_ZERO.
24952 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
24954 PR inline-asm/93027
24955 * lra-constraints.c (match_reload): Permit input operands have the
24956 same mode as output while other input operands have a different
24959 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
24961 PR tree-optimization/90838
24962 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
24963 (check_ctz_string): Likewise.
24964 (optimize_count_trailing_zeroes): Likewise.
24965 (simplify_count_trailing_zeroes): Likewise.
24966 (pass_forwprop::execute): Try ctz simplification.
24967 * match.pd: Add matching for ctz idioms.
24969 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24971 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
24973 (aarch64_invalid_unary_op): New function for target hook.
24974 (aarch64_invalid_binary_op): New function for target hook.
24976 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24978 * config.gcc: Add arm_bf16.h.
24979 * config/aarch64/aarch64-builtins.c
24980 (aarch64_simd_builtin_std_type): Add BFmode.
24981 (aarch64_init_simd_builtin_types): Define element types for vector
24983 (aarch64_init_bf16_types): New function.
24984 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
24985 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
24987 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
24988 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
24990 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
24991 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
24992 * config/aarch64/aarch64.c
24993 (aarch64_classify_vector_mode): Add support for BF types.
24994 (aarch64_gimplify_va_arg_expr): Add support for BF types.
24995 (aarch64_vq_mode): Add support for BF types.
24996 (aarch64_simd_container_mode): Add support for BF types.
24997 (aarch64_mangle_type): Add support for BF scalar type.
24998 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
24999 * config/aarch64/arm_bf16.h: New file.
25000 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
25001 * config/aarch64/iterators.md: Add BF types to mode attributes.
25002 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
25004 2020-01-10 Jason Merrill <jason@redhat.com>
25006 PR c++/93173 - incorrect tree sharing.
25007 * gimplify.c (copy_if_shared): No longer static.
25008 * gimplify.h: Declare it.
25010 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25012 * doc/invoke.texi (-msve-vector-bits=): Document that
25013 -msve-vector-bits=128 now generates VL-specific code for
25014 little-endian targets.
25015 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
25016 build_vector_type_for_mode to construct the data vector types.
25017 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
25018 VL-specific code for -msve-vector-bits=128 on little-endian targets.
25019 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
25020 for 128-bit vectors.
25022 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25024 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
25027 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25029 * config/aarch64/aarch64-builtins.c
25030 (aarch64_builtin_vectorized_function): Check for specific vector modes,
25031 rather than checking the number of elements and the element mode.
25033 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25035 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
25036 get_related_vectype_for_scalar_type rather than build_vector_type
25037 to create the index type for a conditional reduction.
25039 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
25041 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
25042 for any type of gather or scatter, including strided accesses.
25044 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
25046 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
25049 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
25051 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
25052 get_dr_vinfo_offset
25053 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
25054 parameter and its use to reset DR_OFFSET's.
25055 (vect_transform_loop): Remove orig_drs_init argument.
25056 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
25057 member of dr_vec_info rather than the offset of the associated
25058 data_reference's innermost_loop_behavior.
25059 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
25060 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
25061 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
25062 get_dr_vinfo_offset.
25063 (vectorizable_store): Likewise.
25064 (vectorizable_load): Likewise.
25066 2020-01-10 Richard Biener <rguenther@suse.de>
25068 * gimple-ssa-store-merging
25069 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
25071 2020-01-10 Martin Liska <mliska@suse.cz>
25074 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
25075 encapsulation that was there before r280040.
25077 2020-01-10 Richard Biener <rguenther@suse.de>
25079 PR middle-end/93199
25080 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
25081 sequences to avoid walking them again for secondary opportunities.
25082 (pass_lower_eh_dispatch::execute): Instead actually insert
25085 2020-01-10 Richard Biener <rguenther@suse.de>
25087 PR middle-end/93199
25088 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
25089 (cleanup_all_empty_eh): Walk landing pads in reverse order to
25090 avoid quadraticness.
25092 2020-01-10 Martin Jambor <mjambor@suse.cz>
25094 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
25095 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
25096 to get param_ipa_sra_max_replacements.
25097 (param_splitting_across_edge): Pass the caller to
25098 pull_accesses_from_callee.
25100 2020-01-10 Martin Jambor <mjambor@suse.cz>
25102 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
25103 * ipa-cp.c (max_new_size): Removed.
25104 (orig_overall_size): New variable.
25105 (get_max_overall_size): New function.
25106 (estimate_local_effects): Use it. Adjust dump.
25107 (decide_about_value): Likewise.
25108 (ipcp_propagate_stage): Do not calculate max_new_size, just store
25109 orig_overall_size. Adjust dump.
25110 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
25112 2020-01-10 Martin Jambor <mjambor@suse.cz>
25114 * params.opt (param_ipa_max_agg_items): Mark as Optimization
25115 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
25116 instead of param_ipa_max_agg_items.
25117 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
25118 optimization info for the callee.
25120 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
25122 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
25123 markers if debug_inline_points is false.
25125 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25127 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
25129 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
25130 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
25131 aarch64-sve-builtins-sve2.h.
25132 (aarch64-sve-builtins-sve2.o): New rule.
25133 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
25134 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
25135 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
25136 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
25137 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
25138 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
25140 * config/aarch64/aarch64-sve.md: Update comments with SVE2
25141 instructions that are handled here.
25142 (@cond_asrd<mode>): Generalize to...
25143 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
25144 (*cond_asrd<mode>_2): Generalize to...
25145 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
25146 (*cond_asrd<mode>_z): Generalize to...
25147 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
25148 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
25149 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
25150 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
25151 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
25153 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
25154 (@aarch64_scatter_stnt<mode>): Likewise.
25155 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
25156 (@aarch64_mul_lane_<mode>): Likewise.
25157 (@aarch64_sve_suqadd<mode>_const): Likewise.
25158 (*<sur>h<addsub><mode>): Generalize to...
25159 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
25161 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
25162 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
25163 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
25164 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
25165 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
25166 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
25167 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
25168 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
25169 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
25170 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
25171 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
25172 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
25173 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
25174 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
25175 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
25176 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
25177 (@aarch64_sve2_xar<mode>): Likewise.
25178 (@aarch64_sve2_bcax<mode>): Likewise.
25179 (*aarch64_sve2_eor3<mode>): Rename to...
25180 (@aarch64_sve2_eor3<mode>): ...this.
25181 (@aarch64_sve2_bsl<mode>): New expander.
25182 (@aarch64_sve2_nbsl<mode>): Likewise.
25183 (@aarch64_sve2_bsl1n<mode>): Likewise.
25184 (@aarch64_sve2_bsl2n<mode>): Likewise.
25185 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
25186 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
25187 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
25188 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
25189 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
25190 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
25191 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
25192 (<su>mull<bt><Vwide>): Generalize to...
25193 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
25195 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
25196 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
25197 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
25198 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25199 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
25200 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25201 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
25202 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25203 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
25204 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
25205 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
25206 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
25207 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
25208 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
25209 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
25210 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
25211 (<SHRNB:r>shrnb<mode>): Generalize to...
25212 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
25214 (<SHRNT:r>shrnt<mode>): Generalize to...
25215 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
25217 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
25218 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
25219 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
25220 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
25221 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
25222 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
25223 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
25224 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
25225 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
25226 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
25227 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
25228 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
25229 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
25230 (@aarch64_sve2_cvtnt<mode>): Likewise.
25231 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
25232 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
25233 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
25234 (@aarch64_sve2_cvtxnt<mode>): Likewise.
25235 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
25236 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
25237 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
25238 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
25239 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
25240 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
25241 (@aarch64_sve2_pmul<mode>): Likewise.
25242 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
25243 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
25244 (@aarch64_sve2_tbl2<mode>): Likewise.
25245 (@aarch64_sve2_tbx<mode>): Likewise.
25246 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
25247 (@aarch64_sve2_histcnt<mode>): Likewise.
25248 (@aarch64_sve2_histseg<mode>): Likewise.
25249 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
25250 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
25251 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
25252 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
25253 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
25254 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
25255 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
25256 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
25257 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
25258 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
25259 (SVE2_PMULL_PAIR_I): New mode iterators.
25260 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
25261 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
25262 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
25263 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
25264 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
25265 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
25266 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
25267 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
25268 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
25269 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
25270 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
25271 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
25272 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
25273 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
25274 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
25275 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
25276 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
25277 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
25278 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
25279 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
25280 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
25281 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
25282 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
25283 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
25284 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
25285 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
25286 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
25287 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
25288 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
25289 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
25290 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
25292 (VNARROW, Ventype): New mode attributes.
25293 (Vewtype): Handle VNx2DI. Fix typo in comment.
25294 (VDOUBLE): New mode attribute.
25295 (sve_lane_con): Handle VNx8HI.
25296 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
25297 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
25298 (sve_int_op, sve_int_op_rev): Handle the above codes.
25299 (sve_pred_int_rhs2_operand): Likewise.
25300 (MULLBT, SHRNB, SHRNT): Delete.
25301 (SVE_INT_SHIFT_IMM): New int iterator.
25302 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
25303 and UNSPEC_WHILEHS for TARGET_SVE2.
25304 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
25305 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
25306 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
25307 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
25308 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
25309 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
25310 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
25311 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
25312 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
25313 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
25314 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
25315 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
25316 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
25317 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
25318 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
25319 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
25320 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
25321 (optab): Handle the new unspecs.
25322 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
25324 (lr): Handle the new unspecs.
25326 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
25327 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
25328 (sve_int_qsub_op): New int attributes.
25329 (sve_fp_op, rot): Handle the new unspecs.
25330 * config/aarch64/aarch64-sve-builtins.h
25331 (function_resolver::require_matching_pointer_type): Declare.
25332 (function_resolver::resolve_unary): Add an optional boolean argument.
25333 (function_resolver::finish_opt_n_resolution): Add an optional
25334 type_suffix_index argument.
25335 (gimple_folder::redirect_call): Declare.
25336 (gimple_expander::prepare_gather_address_operands): Add an optional
25338 * config/aarch64/aarch64-sve-builtins.cc: Include
25339 aarch64-sve-builtins-sve2.h.
25340 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
25341 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
25342 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
25343 (TYPES_hsd_integer): Use TYPES_hsd_signed.
25344 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
25345 (TYPES_s_unsigned): Likewise.
25346 (TYPES_s_integer): Use TYPES_s_unsigned.
25347 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
25348 (TYPES_sd_integer): Use them.
25349 (TYPES_d_unsigned): New macro.
25350 (TYPES_d_integer): Use it.
25351 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
25352 (TYPES_cvt_narrow): Likewise.
25353 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
25354 (preds_mx): New variable.
25355 (function_builder::add_overloaded_function): Allow the new feature
25356 set to be more restrictive than the original one.
25357 (function_resolver::infer_pointer_type): Remove qualifiers from
25358 the pointer type before printing it.
25359 (function_resolver::require_matching_pointer_type): New function.
25360 (function_resolver::resolve_sv_displacement): Handle functions
25361 that don't support 32-bit vector indices or svint32_t vector offsets.
25362 (function_resolver::finish_opt_n_resolution): Take the inferred type
25363 as a separate argument.
25364 (function_resolver::resolve_unary): Optionally treat all forms in
25365 the same way as normal merging functions.
25366 (gimple_folder::redirect_call): New function.
25367 (function_expander::prepare_gather_address_operands): Add an argument
25368 that says whether scaled forms are available. If they aren't,
25369 handle scaling of vector indices and don't add the extension and
25371 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
25372 fall back to using cond_* instead.
25373 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
25374 Split out the member variables into...
25375 (rtx_code_function_base): ...this new base class.
25376 (rtx_code_function_rotated): Inherit rtx_code_function_base.
25377 (unspec_based_function): Split out the member variables into...
25378 (unspec_based_function_base): ...this new base class.
25379 (unspec_based_function_rotated): Inherit unspec_based_function_base.
25380 (unspec_based_function_exact_insn): New class.
25381 (unspec_based_add_function, unspec_based_add_lane_function)
25382 (unspec_based_lane_function, unspec_based_pred_function)
25383 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
25384 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
25385 (unspec_based_sub_function, unspec_based_sub_lane_function): New
25387 (unspec_based_fused_function): New class.
25388 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
25389 (unspec_based_fused_lane_function): New class.
25390 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
25392 (CODE_FOR_MODE1): New macro.
25393 (fixed_insn_function): New class.
25394 (while_comparison): Likewise.
25395 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
25396 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
25397 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
25398 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
25399 (load_gather_sv_restricted, shift_left_imm_long): Declare.
25400 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
25401 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
25402 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
25403 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
25404 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
25405 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
25406 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
25407 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
25408 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
25409 Also add an initial argument for unary_convert_narrowt, regardless
25410 of the predication type.
25411 (build_32_64): Allow loads and stores to specify MODE_none.
25412 (build_sv_index64, build_sv_uint_offset): New functions.
25413 (long_type_suffix): New function.
25414 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
25415 (binary_imm_long_base, load_gather_sv_base): Likewise.
25416 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
25417 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
25418 (unary_narrowb_base, unary_narrowt_base): Likewise.
25419 (binary_long_lane_def, binary_long_lane): New shape.
25420 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
25421 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
25422 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
25423 (binary_to_uint_def, binary_to_uint): Likewise.
25424 (binary_wide_def, binary_wide): Likewise.
25425 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
25426 (compare_def, compare): Likewise.
25427 (compare_ptr_def, compare_ptr): Likewise.
25428 (load_ext_gather_index_restricted_def,
25429 load_ext_gather_index_restricted): Likewise.
25430 (load_ext_gather_offset_restricted_def,
25431 load_ext_gather_offset_restricted): Likewise.
25432 (load_gather_sv_def): Inherit from load_gather_sv_base.
25433 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
25434 (shift_left_imm_def, shift_left_imm): Likewise.
25435 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
25436 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
25437 (store_scatter_index_restricted_def,
25438 store_scatter_index_restricted): Likewise.
25439 (store_scatter_offset_restricted_def,
25440 store_scatter_offset_restricted): Likewise.
25441 (tbl_tuple_def, tbl_tuple): Likewise.
25442 (ternary_long_lane_def, ternary_long_lane): Likewise.
25443 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
25444 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
25445 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
25446 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
25447 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
25448 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
25449 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
25450 (ternary_uint_def, ternary_uint): Likewise.
25451 (unary_convert): Fix typo in comment.
25452 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
25453 (unary_long_def, unary_long): Likewise.
25454 (unary_narrowb_def, unary_narrowb): Likewise.
25455 (unary_narrowt_def, unary_narrowt): Likewise.
25456 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
25457 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
25458 (unary_to_int_def, unary_to_int): Likewise.
25459 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
25460 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
25461 (svasrd_impl): Delete.
25462 (svcadd_impl::expand): Handle integer operations too.
25463 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
25464 new functions to derive the unspec numbers.
25465 (svmla_svmls_lane_impl): Replace with...
25466 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
25467 integer operations too.
25468 (svwhile_impl): Rename to...
25469 (svwhilelx_impl): ...this and inherit from while_comparison.
25470 (svasrd): Use unspec_based_function.
25471 (svmla_lane): Use svmla_lane_impl.
25472 (svmls_lane): Use svmls_lane_impl.
25473 (svrecpe, svrsqrte): Handle unsigned integer operations too.
25474 (svwhilele, svwhilelt): Use svwhilelx_impl.
25475 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
25476 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
25477 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
25478 * config/aarch64/aarch64-sve-builtins.def: Include
25479 aarch64-sve-builtins-sve2.def.
25481 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25483 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
25484 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
25485 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
25486 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
25487 immediates as well as vector ones.
25488 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
25489 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
25490 (aarch64_sve_qsub_immediate): Update calls accordingly.
25492 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25494 * config/aarch64/aarch64-sve2.md: Add banner comments.
25495 (<su>mulh<r>s<mode>3): Move further up file.
25496 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
25497 (*aarch64_sve2_sra<mode>): Move further down file.
25498 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
25500 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25502 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
25503 and UNSPEC_WHILEWR.
25504 (while_optab_cmp): Handle them.
25505 * config/aarch64/aarch64-sve.md
25506 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
25507 and add a "@" marker.
25508 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
25509 instead of gen_aarch64_sve2_while_ptest.
25510 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
25512 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25514 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
25515 (UNSPEC_WHILELE): ...this.
25516 (UNSPEC_WHILE_LO): Rename to...
25517 (UNSPEC_WHILELO): ...this.
25518 (UNSPEC_WHILE_LS): Rename to...
25519 (UNSPEC_WHILELS): ...this.
25520 (UNSPEC_WHILE_LT): Rename to...
25521 (UNSPEC_WHILELT): ...this.
25522 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
25523 (cmp_op, while_optab_cmp): Likewise.
25524 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
25525 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
25526 (svwhilelt): Likewise.
25528 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25530 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
25531 (unary_to_uint): Define.
25532 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
25533 (unary_count): Rename to...
25534 (unary_to_uint_def, unary_to_uint): ...this.
25535 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
25537 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25539 * config/aarch64/aarch64-sve-builtins-functions.h
25540 (code_for_mode_function): New class.
25541 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
25542 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
25543 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
25544 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
25545 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
25547 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25549 * config/aarch64/iterators.md (addsub): New code attribute.
25550 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
25552 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
25553 in the asm string and attributes. Fix indentation.
25554 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
25556 (@aarch64_sve_<optab><mode>): ...this.
25557 * config/aarch64/aarch64-sve-builtins.h
25558 (function_expander::expand_signed_unpred_op): Delete.
25559 * config/aarch64/aarch64-sve-builtins.cc
25560 (function_expander::expand_signed_unpred_op): Likewise.
25561 (function_expander::map_to_rtx_codes): If the optab isn't defined,
25562 try using code_for_aarch64_sve instead.
25563 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
25564 (svqsub_impl): Likewise.
25565 (svqadd, svqsub): Use rtx_code_function instead.
25567 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25569 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
25570 (HADDSUB, sur, addsub): Remove them.
25572 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25574 * tree-nrv.c (pass_return_slot::execute): Handle all internal
25575 functions the same way, rather than singling out those that
25576 aren't mapped directly to optabs.
25578 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25580 * target.def (compatible_vector_types_p): New target hook.
25581 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
25582 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
25583 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
25584 * doc/tm.texi: Regenerate.
25585 * gimple-expr.c: Include target.h.
25586 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
25587 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
25589 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
25590 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
25591 Use the original predicate if it already has a suitable type.
25593 2020-01-09 Martin Jambor <mjambor@suse.cz>
25595 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
25596 resolve_speculation and redirect_call_stmt_to_callee static. Change
25597 return type of set_call_stmt to cgraph_edge *.
25598 * auto-profile.c (afdo_indirect_call): Adjust call to
25599 redirect_call_stmt_to_callee.
25600 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
25601 make the this pointer explicit, adjust self-recursive calls and the
25602 call top make_direct. Return the resulting edge.
25603 (cgraph_edge::remove): Make this pointer explicit.
25604 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
25605 (cgraph_edge::make_direct): Likewise, adjust call to
25606 resolve_speculation.
25607 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
25608 call to set_call_stmt.
25609 (cgraph_update_edges_for_call_stmt_node): Update call to
25610 set_call_stmt and remove.
25611 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
25612 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
25613 (cgraph_node::create_edge_including_clones): Moved "first" definition
25614 of edge to the block where it was used. Adjusted calls to
25616 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
25617 cgraph_edge::remove.
25618 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
25619 make_direct and redirect_call_stmt_to_callee.
25620 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
25621 resolve_speculation and make_direct.
25622 * ipa-inline-transform.c (inline_transform): Adjust call to
25623 redirect_call_stmt_to_callee.
25624 (check_speculations_1):: Adjust call to resolve_speculation.
25625 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
25626 resolve-speculation.
25627 (inline_small_functions): Adjust call to resolve_speculation.
25628 (ipa_inline): Likewise.
25629 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
25631 * ipa-visibility.c (function_and_variable_visibility): Make iteration
25632 safe with regards to edge removal, adjust calls to
25633 redirect_call_stmt_to_callee.
25634 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
25635 and redirect_call_stmt_to_callee.
25636 * multiple_target.c (create_dispatcher_calls): Adjust call to
25637 redirect_call_stmt_to_callee
25638 (redirect_to_specific_clone): Likewise.
25639 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
25640 Adjust calls to cgraph_edge::remove.
25641 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
25642 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
25643 (expand_call_inline): Adjust call to cgraph_edge::remove.
25645 2020-01-09 Martin Liska <mliska@suse.cz>
25647 * params.opt: Set Optimization for
25648 param_max_speculative_devirt_maydefs.
25650 2020-01-09 Martin Sebor <msebor@redhat.com>
25652 PR middle-end/93200
25654 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
25656 2020-01-09 Martin Liska <mliska@suse.cz>
25658 * auto-profile.c (auto_profile): Use opt_for_fn
25660 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
25661 (propagate_vals_across_arith_jfunc): Likewise.
25662 (hint_time_bonus): Likewise.
25663 (incorporate_penalties): Likewise.
25664 (good_cloning_opportunity_p): Likewise.
25665 (perform_estimation_of_a_value): Likewise.
25666 (estimate_local_effects): Likewise.
25667 (ipcp_propagate_stage): Likewise.
25668 * ipa-fnsummary.c (decompose_param_expr): Likewise.
25669 (set_switch_stmt_execution_predicate): Likewise.
25670 (analyze_function_body): Likewise.
25671 * ipa-inline-analysis.c (offline_size): Likewise.
25672 * ipa-inline.c (early_inliner): Likewise.
25673 * ipa-prop.c (ipa_analyze_node): Likewise.
25674 (ipcp_transform_function): Likewise.
25675 * ipa-sra.c (process_scan_results): Likewise.
25676 (ipa_sra_summarize_function): Likewise.
25677 * params.opt: Rename ipcp-unit-growth to
25678 ipa-cp-unit-growth. Add Optimization for various
25679 IPA-related parameters.
25681 2020-01-09 Richard Biener <rguenther@suse.de>
25683 PR middle-end/93054
25684 * gimplify.c (gimplify_expr): Deal with NOP definitions.
25686 2020-01-09 Richard Biener <rguenther@suse.de>
25688 PR tree-optimization/93040
25689 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
25691 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
25693 * common/config/avr/avr-common.c (avr_option_optimization_table)
25694 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
25696 2020-01-09 Martin Liska <mliska@suse.cz>
25698 * cgraphclones.c (symbol_table::materialize_all_clones):
25699 Use cgraph_node::dump_name.
25701 2020-01-09 Jakub Jelinek <jakub@redhat.com>
25703 PR inline-asm/93202
25704 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
25705 output_operand_lossage instead of gcc_unreachable.
25706 * doc/md.texi (riscv f constraint): Fix typo.
25709 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
25710 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
25711 CONST_SCALAR_INT_P instead of CONST_INT_P.
25712 (*subv<mode>4_1): Rename to ...
25713 (subv<mode>4_1): ... this.
25714 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
25715 define_insn_and_split patterns.
25716 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
25719 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25721 * vec.c (class selftest::count_dtor): New class.
25722 (selftest::test_auto_delete_vec): New test.
25723 (selftest::vec_c_tests): Call it.
25724 * vec.h (class auto_delete_vec): New class template.
25725 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
25727 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25729 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
25731 2020-01-08 Jim Wilson <jimw@sifive.com>
25733 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
25734 use of TLS_MODEL_LOCAL_EXEC when not pic.
25736 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25738 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
25741 2020-01-08 Jakub Jelinek <jakub@redhat.com>
25744 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
25745 *stack_protect_set_3 peephole2): Also check that the second
25746 insns source is general_operand.
25749 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
25750 predicate for output operand instead of register_operand.
25751 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
25752 memory destination and non-memory operands[2].
25754 2020-01-08 Martin Liska <mliska@suse.cz>
25756 * cgraph.c (cgraph_node::dump): Use ::dump_name or
25757 ::dump_asm_name instead of (::name or ::asm_name).
25758 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
25759 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
25760 (analyze_functions): Likewise.
25761 (expand_all_functions): Likewise.
25762 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
25763 (propagate_bits_across_jump_function): Likewise.
25764 (dump_profile_updates): Likewise.
25765 (ipcp_store_bits_results): Likewise.
25766 (ipcp_store_vr_results): Likewise.
25767 * ipa-devirt.c (dump_targets): Likewise.
25768 * ipa-fnsummary.c (analyze_function_body): Likewise.
25769 * ipa-hsa.c (check_warn_node_versionable): Likewise.
25770 (process_hsa_functions): Likewise.
25771 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
25772 (set_alias_uids): Likewise.
25773 * ipa-inline-transform.c (save_inline_function_body): Likewise.
25774 * ipa-inline.c (recursive_inlining): Likewise.
25775 (inline_to_all_callers_1): Likewise.
25776 (ipa_inline): Likewise.
25777 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
25778 (ipa_propagate_frequency): Likewise.
25779 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
25780 (remove_described_reference): Likewise.
25781 * ipa-pure-const.c (worse_state): Likewise.
25782 (check_retval_uses): Likewise.
25783 (analyze_function): Likewise.
25784 (propagate_pure_const): Likewise.
25785 (propagate_nothrow): Likewise.
25786 (dump_malloc_lattice): Likewise.
25787 (propagate_malloc): Likewise.
25788 (pass_local_pure_const::execute): Likewise.
25789 * ipa-visibility.c (optimize_weakref): Likewise.
25790 (function_and_variable_visibility): Likewise.
25791 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
25792 (ipa_discover_variable_flags): Likewise.
25793 * lto-streamer-out.c (output_function): Likewise.
25794 (output_constructor): Likewise.
25795 * tree-inline.c (copy_bb): Likewise.
25796 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
25797 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
25799 2020-01-08 Richard Biener <rguenther@suse.de>
25801 PR middle-end/93199
25802 * tree-eh.c (sink_clobbers): Update virtual operands for
25803 the first and last stmt only. Add a dry-run capability.
25804 (pass_lower_eh_dispatch::execute): Perform clobber sinking
25805 after CFG manipulations and in RPO order to catch all
25806 secondary opportunities reliably.
25808 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25811 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
25813 2019-01-08 Richard Biener <rguenther@suse.de>
25815 PR middle-end/93199
25816 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
25817 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
25818 virtual operand, also updating SSA use.
25819 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
25820 Update stmt after resetting virtual operand.
25821 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
25822 * gimple-iterator.c (gsi_remove): When not removing the stmt
25823 permanently do not delink immediate uses or mark the stmt modified.
25825 2020-01-08 Martin Liska <mliska@suse.cz>
25827 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
25828 (ipa_call_context::estimate_size_and_time): Likewise.
25829 (inline_analyze_function): Likewise.
25831 2020-01-08 Martin Liska <mliska@suse.cz>
25833 * cgraph.c (cgraph_node::dump): Use systematically
25836 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25838 Add -nodevicespecs option for avr.
25841 * config/avr/avr.opt (-nodevicespecs): New driver option.
25842 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
25843 "-specs=device-specs/..." if that option is not set.
25844 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
25846 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25848 Implement 64-bit double functions for avr.
25851 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
25852 --with-double-comparison.
25853 * doc/install.texi: Document them.
25854 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
25855 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
25856 <WITH_DOUBLE_COMPARISON>: New built-in defines.
25857 * doc/invoke.texi (AVR Built-in Macros): Document them.
25858 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
25859 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
25860 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
25862 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
25865 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
25866 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
25867 when only building rm-profile multilibs.
25869 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
25872 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
25873 lattice for a value to check.
25874 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
25875 finite propagation in self-recursive scc.
25877 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
25879 * ipa-inline.c (caller_growth_limits): Restore the AND.
25881 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
25883 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
25884 (VEC_ALLREG_ALT): New iterator.
25885 (VEC_ALLREG_INT_MODE): New iterator.
25886 (VCMP_MODE): New iterator.
25887 (VCMP_MODE_INT): New iterator.
25888 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
25889 (vec_cmp<u>v64qidi): New define_expand.
25890 (vec_cmp<mode>di_exec): Use VCMP_MODE.
25891 (vec_cmpu<mode>di_exec): New define_expand.
25892 (vec_cmp<u>v64qidi_exec): New define_expand.
25893 (vec_cmp<mode>di_dup): Use VCMP_MODE.
25894 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
25895 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
25896 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
25897 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
25898 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
25899 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
25900 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
25901 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
25902 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
25904 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
25905 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
25907 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
25909 * config/gcn/constraints.md (DA): Update description and match.
25911 (Db): New constraint.
25912 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
25914 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
25915 Implement 'Db' mixed immediate type.
25916 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
25917 (addcv64si3_dup<exec_vcc>): Delete.
25918 (subcv64si3<exec_vcc>): Rework constraints.
25919 (addv64di3): Rework constraints.
25920 (addv64di3_exec): Rework constraints.
25921 (subv64di3): Rework constraints.
25922 (addv64di3_dup): Delete.
25923 (addv64di3_dup_exec): Delete.
25924 (addv64di3_zext): Rework constraints.
25925 (addv64di3_zext_exec): Rework constraints.
25926 (addv64di3_zext_dup): Rework constraints.
25927 (addv64di3_zext_dup_exec): Rework constraints.
25928 (addv64di3_zext_dup2): Rework constraints.
25929 (addv64di3_zext_dup2_exec): Rework constraints.
25930 (addv64di3_sext_dup2): Rework constraints.
25931 (addv64di3_sext_dup2_exec): Rework constraints.
25933 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
25935 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
25936 existing target checks.
25938 2020-01-07 Richard Biener <rguenther@suse.de>
25940 * doc/install.texi: Bump minimal supported MPC version.
25942 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
25944 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
25945 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
25946 * langhooks.c: Include stor-layout.h.
25947 (lhd_simulate_enum_decl): New function.
25948 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
25949 handle_arm_sve_h for the LTO frontend.
25950 (register_vector_type): Cope with null returns from pushdecl.
25952 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
25954 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
25955 (aarch64_sve::nvectors_if_data_type): Replace with...
25956 (aarch64_sve::builtin_type_p): ...this.
25957 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
25958 (find_vector_type): Delete.
25959 (add_sve_type_attribute): New function.
25960 (lookup_sve_type_attribute): Likewise.
25961 (register_builtin_types): Add an "SVE type" attribute to each type.
25962 (register_tuple_type): Likewise.
25963 (svbool_type_p, nvectors_if_data_type): Delete.
25964 (mangle_builtin_type): Use lookup_sve_type_attribute.
25965 (builtin_type_p): Likewise. Add an overload that returns the
25966 number of constituent vector and predicate registers.
25967 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
25968 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
25969 instead of aarch64_sve_argument_p.
25970 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
25971 (aarch64_pass_by_reference): Likewise.
25972 (aarch64_function_value_1): Likewise.
25973 (aarch64_return_in_memory): Likewise.
25974 (aarch64_layout_arg): Likewise.
25976 2020-01-07 Jakub Jelinek <jakub@redhat.com>
25978 PR tree-optimization/93156
25979 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
25980 least significant bit is always clear.
25982 PR tree-optimization/93118
25983 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
25984 simplifier with two intermediate conversions.
25986 2020-01-07 Martin Liska <mliska@suse.cz>
25988 * params.opt: Add Optimization for various parameters.
25990 2020-01-07 Martin Liska <mliska@suse.cz>
25993 * doc/extend.texi: Explain cloning for target_clone
25996 2020-01-07 Martin Liska <mliska@suse.cz>
25998 PR tree-optimization/92860
25999 * common.opt: Make in Optimization option
26000 as it is affected by -O0, which is an Optimization
26002 * tree-inline.c (tree_inlinable_function_p):
26003 Use opt_for_fn for warn_inline.
26004 (expand_call_inline): Likewise.
26006 2020-01-07 Martin Liska <mliska@suse.cz>
26008 PR tree-optimization/92860
26009 * common.opt: Make flag_ree as optimization
26012 2020-01-07 Martin Liska <mliska@suse.cz>
26014 PR optimization/92860
26015 * params.opt: Mark param_min_crossjump_insns with Optimization
26018 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
26020 * ipa-inline-analysis.c (estimate_growth): Fix typo.
26021 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
26023 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
26025 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
26026 helper function to return the valid addressing formats for a given
26027 hard register and mode.
26028 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
26030 * config/rs6000/constraints.md (Q constraint): Update
26032 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
26035 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
26036 Use 'Q' for doing vector extract from memory.
26037 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
26039 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
26040 doing vector extract from memory.
26041 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
26042 extract from memory.
26044 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
26045 for the offset being 34-bits when -mcpu=future is used.
26047 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
26049 * config/pa/pa.md: Revert change to use ordered_comparison_operator
26050 instead of cmpib_comparison_operator in cmpib patterns.
26051 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
26052 of cmpib_comparison_operator. Revise comment.
26054 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26056 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
26057 in an IFN_DIV_POW2 node to be equal.
26059 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26061 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
26062 (vect_check_scalar_mask): ...this.
26063 (vectorizable_store, vectorizable_load): Update call accordingly.
26064 (vectorizable_call): Use vect_check_scalar_mask to check the mask
26065 argument in calls to conditional internal functions.
26067 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26069 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
26070 '0' matching inputs.
26071 (subv64di3_exec): Likewise.
26073 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
26075 * config/mips/mips.c (vr4130_align_insns): Fix typo.
26076 * doc/md.texi (movstr): Likewise.
26078 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26080 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
26083 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26085 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
26087 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
26088 to a temporary file and use move-if-change to update the real
26089 file where necessary.
26091 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
26093 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
26094 rather than Upa for CPY /M.
26096 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
26098 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
26101 2020-01-06 Martin Liska <mliska@suse.cz>
26103 PR tree-optimization/92860
26104 * params.opt: Mark param_max_combine_insns with Optimization
26107 2020-01-05 Jakub Jelinek <jakub@redhat.com>
26110 * config/i386/i386.md (SWIDWI): New mode iterator.
26111 (DWI, dwi): Add TImode variants.
26112 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
26113 <general_hilo_operand> instead of <general_operand>. Use
26114 CONST_SCALAR_INT_P instead of CONST_INT_P.
26115 (*addv<mode>4_1): Rename to ...
26116 (addv<mode>4_1): ... this.
26117 (QWI): New mode attribute.
26118 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
26119 define_insn_and_split patterns.
26120 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
26122 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
26123 <general_hilo_operand> instead of <general_operand>.
26124 (*addcarry<mode>_1): New define_insn.
26125 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
26127 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
26129 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
26130 Use "call" instead of "set".
26132 2020-01-03 Martin Jambor <mjambor@suse.cz>
26135 * ipa-cp.c (print_all_lattices): Skip functions without info.
26137 2020-01-03 Jakub Jelinek <jakub@redhat.com>
26140 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
26141 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
26142 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
26143 for 'e' simd clones.
26146 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
26148 (mprefer-vector-width=): Add Save.
26149 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
26150 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
26151 (ix86_debug_options, ix86_function_specific_print): Adjust
26152 ix86_target_string callers.
26153 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
26154 (ix86_valid_target_attribute_tree): Likewise.
26155 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
26156 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
26157 ix86_target_string caller.
26160 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
26161 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
26162 instead of gen_int_shift_amount + convert_modes.
26164 PR rtl-optimization/93088
26165 * loop-iv.c (find_single_def_src): Punt after looking through
26166 128 reg copies for regs with single definitions. Move definitions
26169 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
26171 * config/arm/arm-c.c (arm_cpu_builtins): Define
26172 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
26173 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
26174 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
26175 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
26176 * config/arm/arm-tables.opt: Regenerated.
26177 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
26178 arm_arch_i8mm and arm_arch_bf16 when enabled.
26179 * config/arm/arm.h (TARGET_I8MM): New macro.
26180 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
26181 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
26182 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
26183 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
26184 (v8_6_a_simd_variants): New.
26185 (v8_*_a_simd_variants): Add i8mm and bf16.
26186 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
26188 2020-01-02 Jakub Jelinek <jakub@redhat.com>
26191 * predict.c (compute_function_frequency): Don't call
26192 warn_function_cold on functions that already have cold attribute.
26194 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
26197 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
26198 COMDAT group function labels in .data.rel.ro.local section.
26199 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
26202 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
26203 comparison_operator in B and S integer comparisons. Likewise, use
26204 ordered_comparison_operator instead of cmpib_comparison_operator in
26206 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
26208 2020-01-01 Jakub Jelinek <jakub@redhat.com>
26210 Update copyright years.
26212 * gcc.c (process_command): Update copyright notice dates.
26213 * gcov-dump.c (print_version): Ditto.
26214 * gcov.c (print_version): Ditto.
26215 * gcov-tool.c (print_version): Ditto.
26216 * gengtype.c (create_file): Ditto.
26217 * doc/cpp.texi: Bump @copying's copyright year.
26218 * doc/cppinternals.texi: Ditto.
26219 * doc/gcc.texi: Ditto.
26220 * doc/gccint.texi: Ditto.
26221 * doc/gcov.texi: Ditto.
26222 * doc/install.texi: Ditto.
26223 * doc/invoke.texi: Ditto.
26225 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
26227 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
26230 2020-01-01 Jakub Jelinek <jakub@redhat.com>
26232 PR tree-optimization/93098
26233 * match.pd (popcount): For shift amounts, use integer_onep
26234 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
26235 tests. Make sure that precision is power of two larger than or equal
26236 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
26237 instead of ULL suffixed constants. Formatting fixes.
26239 Copyright (C) 2020 Free Software Foundation, Inc.
26241 Copying and distribution of this file, with or without modification,
26242 are permitted in any medium without royalty provided the copyright
26243 notice and this notice are preserved.