1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 #ifdef DBX_DEBUGGING_INFO
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
111 #define HAVE_READONLY_DATA_SECTION 0
114 /* Last insn processed by final_scan_insn. */
115 static rtx debug_insn
;
116 rtx current_output_insn
;
118 /* Line number of last NOTE. */
119 static int last_linenum
;
121 /* Highest line number in current block. */
122 static int high_block_linenum
;
124 /* Likewise for function. */
125 static int high_function_linenum
;
127 /* Filename of last NOTE. */
128 static const char *last_filename
;
130 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
132 /* Nonzero while outputting an `asm' with operands.
133 This means that inconsistencies are the user's fault, so don't abort.
134 The precise value is the insn being output, to pass to error_for_asm. */
135 rtx this_is_asm_operands
;
137 /* Number of operands of this insn, for an `asm' with operands. */
138 static unsigned int insn_noperands
;
140 /* Compare optimization flag. */
142 static rtx last_ignored_compare
= 0;
144 /* Assign a unique number to each insn that is output.
145 This can be used to generate unique local labels. */
147 static int insn_counter
= 0;
150 /* This variable contains machine-dependent flags (defined in tm.h)
151 set and examined by output routines
152 that describe how to interpret the condition codes properly. */
156 /* During output of an insn, this contains a copy of cc_status
157 from before the insn. */
159 CC_STATUS cc_prev_status
;
162 /* Indexed by hardware reg number, is 1 if that register is ever
163 used in the current function.
165 In life_analysis, or in stupid_life_analysis, this is set
166 up to record the hard regs used explicitly. Reload adds
167 in the hard regs used for holding pseudo regs. Final uses
168 it to generate the code in the function prologue and epilogue
169 to save and restore registers as needed. */
171 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
173 /* Nonzero means current function must be given a frame pointer.
174 Set in stmt.c if anything is allocated on the stack there.
175 Set in reload1.c if anything is allocated on the stack there. */
177 int frame_pointer_needed
;
179 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
181 static int block_depth
;
183 /* Nonzero if have enabled APP processing of our assembler output. */
187 /* If we are outputting an insn sequence, this contains the sequence rtx.
192 #ifdef ASSEMBLER_DIALECT
194 /* Number of the assembler dialect to use, starting at 0. */
195 static int dialect_number
;
198 /* Indexed by line number, nonzero if there is a note for that line. */
200 static char *line_note_exists
;
202 #ifdef HAVE_conditional_execution
203 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
204 rtx current_insn_predicate
;
207 #ifdef HAVE_ATTR_length
208 static int asm_insn_count
PARAMS ((rtx
));
210 static void profile_function
PARAMS ((FILE *));
211 static void profile_after_prologue
PARAMS ((FILE *));
212 static bool notice_source_line
PARAMS ((rtx
));
213 static rtx walk_alter_subreg
PARAMS ((rtx
*));
214 static void output_asm_name
PARAMS ((void));
215 static void output_alternate_entry_point
PARAMS ((FILE *, rtx
));
216 static tree get_mem_expr_from_op
PARAMS ((rtx
, int *));
217 static void output_asm_operand_names
PARAMS ((rtx
*, int *, int));
218 static void output_operand
PARAMS ((rtx
, int));
219 #ifdef LEAF_REGISTERS
220 static void leaf_renumber_regs
PARAMS ((rtx
));
223 static int alter_cond
PARAMS ((rtx
));
225 #ifndef ADDR_VEC_ALIGN
226 static int final_addr_vec_align
PARAMS ((rtx
));
228 #ifdef HAVE_ATTR_length
229 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
232 /* Initialize data in final at the beginning of a compilation. */
235 init_final (filename
)
236 const char *filename ATTRIBUTE_UNUSED
;
241 #ifdef ASSEMBLER_DIALECT
242 dialect_number
= ASSEMBLER_DIALECT
;
246 /* Default target function prologue and epilogue assembler output.
248 If not overridden for epilogue code, then the function body itself
249 contains return instructions wherever needed. */
251 default_function_pro_epilogue (file
, size
)
252 FILE *file ATTRIBUTE_UNUSED
;
253 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
257 /* Default target hook that outputs nothing to a stream. */
259 no_asm_to_stream (file
)
260 FILE *file ATTRIBUTE_UNUSED
;
264 /* Enable APP processing of subsequent output.
265 Used before the output from an `asm' statement. */
272 fputs (ASM_APP_ON
, asm_out_file
);
277 /* Disable APP processing of subsequent output.
278 Called from varasm.c before most kinds of output. */
285 fputs (ASM_APP_OFF
, asm_out_file
);
290 /* Return the number of slots filled in the current
291 delayed branch sequence (we don't count the insn needing the
292 delay slot). Zero if not in a delayed branch sequence. */
296 dbr_sequence_length ()
298 if (final_sequence
!= 0)
299 return XVECLEN (final_sequence
, 0) - 1;
305 /* The next two pages contain routines used to compute the length of an insn
306 and to shorten branches. */
308 /* Arrays for insn lengths, and addresses. The latter is referenced by
309 `insn_current_length'. */
311 static int *insn_lengths
;
313 varray_type insn_addresses_
;
315 /* Max uid for which the above arrays are valid. */
316 static int insn_lengths_max_uid
;
318 /* Address of insn being processed. Used by `insn_current_length'. */
319 int insn_current_address
;
321 /* Address of insn being processed in previous iteration. */
322 int insn_last_address
;
324 /* known invariant alignment of insn being processed. */
325 int insn_current_align
;
327 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
328 gives the next following alignment insn that increases the known
329 alignment, or NULL_RTX if there is no such insn.
330 For any alignment obtained this way, we can again index uid_align with
331 its uid to obtain the next following align that in turn increases the
332 alignment, till we reach NULL_RTX; the sequence obtained this way
333 for each insn we'll call the alignment chain of this insn in the following
336 struct label_alignment
342 static rtx
*uid_align
;
343 static int *uid_shuid
;
344 static struct label_alignment
*label_align
;
346 /* Indicate that branch shortening hasn't yet been done. */
360 insn_lengths_max_uid
= 0;
362 #ifdef HAVE_ATTR_length
363 INSN_ADDRESSES_FREE ();
372 /* Obtain the current length of an insn. If branch shortening has been done,
373 get its actual length. Otherwise, get its maximum length. */
376 get_attr_length (insn
)
377 rtx insn ATTRIBUTE_UNUSED
;
379 #ifdef HAVE_ATTR_length
384 if (insn_lengths_max_uid
> INSN_UID (insn
))
385 return insn_lengths
[INSN_UID (insn
)];
387 switch (GET_CODE (insn
))
395 length
= insn_default_length (insn
);
399 body
= PATTERN (insn
);
400 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
402 /* Alignment is machine-dependent and should be handled by
406 length
= insn_default_length (insn
);
410 body
= PATTERN (insn
);
411 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
414 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
415 length
= asm_insn_count (body
) * insn_default_length (insn
);
416 else if (GET_CODE (body
) == SEQUENCE
)
417 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
418 length
+= get_attr_length (XVECEXP (body
, 0, i
));
420 length
= insn_default_length (insn
);
427 #ifdef ADJUST_INSN_LENGTH
428 ADJUST_INSN_LENGTH (insn
, length
);
431 #else /* not HAVE_ATTR_length */
433 #endif /* not HAVE_ATTR_length */
436 /* Code to handle alignment inside shorten_branches. */
438 /* Here is an explanation how the algorithm in align_fuzz can give
441 Call a sequence of instructions beginning with alignment point X
442 and continuing until the next alignment point `block X'. When `X'
443 is used in an expression, it means the alignment value of the
446 Call the distance between the start of the first insn of block X, and
447 the end of the last insn of block X `IX', for the `inner size of X'.
448 This is clearly the sum of the instruction lengths.
450 Likewise with the next alignment-delimited block following X, which we
453 Call the distance between the start of the first insn of block X, and
454 the start of the first insn of block Y `OX', for the `outer size of X'.
456 The estimated padding is then OX - IX.
458 OX can be safely estimated as
463 OX = round_up(IX, X) + Y - X
465 Clearly est(IX) >= real(IX), because that only depends on the
466 instruction lengths, and those being overestimated is a given.
468 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
469 we needn't worry about that when thinking about OX.
471 When X >= Y, the alignment provided by Y adds no uncertainty factor
472 for branch ranges starting before X, so we can just round what we have.
473 But when X < Y, we don't know anything about the, so to speak,
474 `middle bits', so we have to assume the worst when aligning up from an
475 address mod X to one mod Y, which is Y - X. */
478 #define LABEL_ALIGN(LABEL) align_labels_log
481 #ifndef LABEL_ALIGN_MAX_SKIP
482 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
486 #define LOOP_ALIGN(LABEL) align_loops_log
489 #ifndef LOOP_ALIGN_MAX_SKIP
490 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
493 #ifndef LABEL_ALIGN_AFTER_BARRIER
494 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
497 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
498 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
502 #define JUMP_ALIGN(LABEL) align_jumps_log
505 #ifndef JUMP_ALIGN_MAX_SKIP
506 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
509 #ifndef ADDR_VEC_ALIGN
511 final_addr_vec_align (addr_vec
)
514 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
516 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
517 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
518 return exact_log2 (align
);
522 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
525 #ifndef INSN_LENGTH_ALIGNMENT
526 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
529 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
531 static int min_labelno
, max_labelno
;
533 #define LABEL_TO_ALIGNMENT(LABEL) \
534 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
536 #define LABEL_TO_MAX_SKIP(LABEL) \
537 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
539 /* For the benefit of port specific code do this also as a function. */
542 label_to_alignment (label
)
545 return LABEL_TO_ALIGNMENT (label
);
548 #ifdef HAVE_ATTR_length
549 /* The differences in addresses
550 between a branch and its target might grow or shrink depending on
551 the alignment the start insn of the range (the branch for a forward
552 branch or the label for a backward branch) starts out on; if these
553 differences are used naively, they can even oscillate infinitely.
554 We therefore want to compute a 'worst case' address difference that
555 is independent of the alignment the start insn of the range end
556 up on, and that is at least as large as the actual difference.
557 The function align_fuzz calculates the amount we have to add to the
558 naively computed difference, by traversing the part of the alignment
559 chain of the start insn of the range that is in front of the end insn
560 of the range, and considering for each alignment the maximum amount
561 that it might contribute to a size increase.
563 For casesi tables, we also want to know worst case minimum amounts of
564 address difference, in case a machine description wants to introduce
565 some common offset that is added to all offsets in a table.
566 For this purpose, align_fuzz with a growth argument of 0 computes the
567 appropriate adjustment. */
569 /* Compute the maximum delta by which the difference of the addresses of
570 START and END might grow / shrink due to a different address for start
571 which changes the size of alignment insns between START and END.
572 KNOWN_ALIGN_LOG is the alignment known for START.
573 GROWTH should be ~0 if the objective is to compute potential code size
574 increase, and 0 if the objective is to compute potential shrink.
575 The return value is undefined for any other value of GROWTH. */
578 align_fuzz (start
, end
, known_align_log
, growth
)
583 int uid
= INSN_UID (start
);
585 int known_align
= 1 << known_align_log
;
586 int end_shuid
= INSN_SHUID (end
);
589 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
591 int align_addr
, new_align
;
593 uid
= INSN_UID (align_label
);
594 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
595 if (uid_shuid
[uid
] > end_shuid
)
597 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
598 new_align
= 1 << known_align_log
;
599 if (new_align
< known_align
)
601 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
602 known_align
= new_align
;
607 /* Compute a worst-case reference address of a branch so that it
608 can be safely used in the presence of aligned labels. Since the
609 size of the branch itself is unknown, the size of the branch is
610 not included in the range. I.e. for a forward branch, the reference
611 address is the end address of the branch as known from the previous
612 branch shortening pass, minus a value to account for possible size
613 increase due to alignment. For a backward branch, it is the start
614 address of the branch as known from the current pass, plus a value
615 to account for possible size increase due to alignment.
616 NB.: Therefore, the maximum offset allowed for backward branches needs
617 to exclude the branch size. */
620 insn_current_reference_address (branch
)
626 if (! INSN_ADDRESSES_SET_P ())
629 seq
= NEXT_INSN (PREV_INSN (branch
));
630 seq_uid
= INSN_UID (seq
);
631 if (GET_CODE (branch
) != JUMP_INSN
)
632 /* This can happen for example on the PA; the objective is to know the
633 offset to address something in front of the start of the function.
634 Thus, we can treat it like a backward branch.
635 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
636 any alignment we'd encounter, so we skip the call to align_fuzz. */
637 return insn_current_address
;
638 dest
= JUMP_LABEL (branch
);
640 /* BRANCH has no proper alignment chain set, so use SEQ.
641 BRANCH also has no INSN_SHUID. */
642 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
644 /* Forward branch. */
645 return (insn_last_address
+ insn_lengths
[seq_uid
]
646 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
650 /* Backward branch. */
651 return (insn_current_address
652 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
655 #endif /* HAVE_ATTR_length */
658 compute_alignments ()
660 int log
, max_skip
, max_log
;
669 max_labelno
= max_label_num ();
670 min_labelno
= get_first_label_num ();
671 label_align
= (struct label_alignment
*)
672 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
674 /* If not optimizing or optimizing for size, don't assign any alignments. */
675 if (! optimize
|| optimize_size
)
680 rtx label
= bb
->head
;
681 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
684 if (GET_CODE (label
) != CODE_LABEL
685 || probably_never_executed_bb_p (bb
))
687 max_log
= LABEL_ALIGN (label
);
688 max_skip
= LABEL_ALIGN_MAX_SKIP
;
690 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
692 if (e
->flags
& EDGE_FALLTHRU
)
693 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
695 branch_frequency
+= EDGE_FREQUENCY (e
);
698 /* There are two purposes to align block with no fallthru incoming edge:
699 1) to avoid fetch stalls when branch destination is near cache boundary
700 2) to improve cache efficiency in case the previous block is not executed
701 (so it does not need to be in the cache).
703 We to catch first case, we align frequently executed blocks.
704 To catch the second, we align blocks that are executed more frequently
705 than the predecessor and the predecessor is likely to not be executed
706 when function is called. */
709 && (branch_frequency
> BB_FREQ_MAX
/ 10
710 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
711 && (bb
->prev_bb
->frequency
712 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
714 log
= JUMP_ALIGN (label
);
718 max_skip
= JUMP_ALIGN_MAX_SKIP
;
721 /* In case block is frequent and reached mostly by non-fallthru edge,
722 align it. It is most likely a first block of loop. */
724 && maybe_hot_bb_p (bb
)
725 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
726 && branch_frequency
> fallthru_frequency
* 2)
728 log
= LOOP_ALIGN (label
);
732 max_skip
= LOOP_ALIGN_MAX_SKIP
;
735 LABEL_TO_ALIGNMENT (label
) = max_log
;
736 LABEL_TO_MAX_SKIP (label
) = max_skip
;
740 /* Make a pass over all insns and compute their actual lengths by shortening
741 any branches of variable length if possible. */
743 /* Give a default value for the lowest address in a function. */
745 #ifndef FIRST_INSN_ADDRESS
746 #define FIRST_INSN_ADDRESS 0
749 /* shorten_branches might be called multiple times: for example, the SH
750 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
751 In order to do this, it needs proper length information, which it obtains
752 by calling shorten_branches. This cannot be collapsed with
753 shorten_branches itself into a single pass unless we also want to integrate
754 reorg.c, since the branch splitting exposes new instructions with delay
758 shorten_branches (first
)
759 rtx first ATTRIBUTE_UNUSED
;
766 #ifdef HAVE_ATTR_length
767 #define MAX_CODE_ALIGN 16
769 int something_changed
= 1;
770 char *varying_length
;
773 rtx align_tab
[MAX_CODE_ALIGN
];
777 /* Compute maximum UID and allocate label_align / uid_shuid. */
778 max_uid
= get_max_uid ();
780 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
782 if (max_labelno
!= max_label_num ())
784 int old
= max_labelno
;
788 max_labelno
= max_label_num ();
790 n_labels
= max_labelno
- min_labelno
+ 1;
791 n_old_labels
= old
- min_labelno
+ 1;
793 label_align
= (struct label_alignment
*) xrealloc
794 (label_align
, n_labels
* sizeof (struct label_alignment
));
796 /* Range of labels grows monotonically in the function. Abort here
797 means that the initialization of array got lost. */
798 if (n_old_labels
> n_labels
)
801 memset (label_align
+ n_old_labels
, 0,
802 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
805 /* Initialize label_align and set up uid_shuid to be strictly
806 monotonically rising with insn order. */
807 /* We use max_log here to keep track of the maximum alignment we want to
808 impose on the next CODE_LABEL (or the current one if we are processing
809 the CODE_LABEL itself). */
814 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
818 INSN_SHUID (insn
) = i
++;
821 /* reorg might make the first insn of a loop being run once only,
822 and delete the label in front of it. Then we want to apply
823 the loop alignment to the new label created by reorg, which
824 is separated by the former loop start insn from the
825 NOTE_INSN_LOOP_BEG. */
827 else if (GET_CODE (insn
) == CODE_LABEL
)
831 /* Merge in alignments computed by compute_alignments. */
832 log
= LABEL_TO_ALIGNMENT (insn
);
836 max_skip
= LABEL_TO_MAX_SKIP (insn
);
839 log
= LABEL_ALIGN (insn
);
843 max_skip
= LABEL_ALIGN_MAX_SKIP
;
845 next
= NEXT_INSN (insn
);
846 /* ADDR_VECs only take room if read-only data goes into the text
848 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
849 if (next
&& GET_CODE (next
) == JUMP_INSN
)
851 rtx nextbody
= PATTERN (next
);
852 if (GET_CODE (nextbody
) == ADDR_VEC
853 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
855 log
= ADDR_VEC_ALIGN (next
);
859 max_skip
= LABEL_ALIGN_MAX_SKIP
;
863 LABEL_TO_ALIGNMENT (insn
) = max_log
;
864 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
868 else if (GET_CODE (insn
) == BARRIER
)
872 for (label
= insn
; label
&& ! INSN_P (label
);
873 label
= NEXT_INSN (label
))
874 if (GET_CODE (label
) == CODE_LABEL
)
876 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
880 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
886 #ifdef HAVE_ATTR_length
888 /* Allocate the rest of the arrays. */
889 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
890 insn_lengths_max_uid
= max_uid
;
891 /* Syntax errors can lead to labels being outside of the main insn stream.
892 Initialize insn_addresses, so that we get reproducible results. */
893 INSN_ADDRESSES_ALLOC (max_uid
);
895 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
897 /* Initialize uid_align. We scan instructions
898 from end to start, and keep in align_tab[n] the last seen insn
899 that does an alignment of at least n+1, i.e. the successor
900 in the alignment chain for an insn that does / has a known
902 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
904 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
905 align_tab
[i
] = NULL_RTX
;
906 seq
= get_last_insn ();
907 for (; seq
; seq
= PREV_INSN (seq
))
909 int uid
= INSN_UID (seq
);
911 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
912 uid_align
[uid
] = align_tab
[0];
915 /* Found an alignment label. */
916 uid_align
[uid
] = align_tab
[log
];
917 for (i
= log
- 1; i
>= 0; i
--)
921 #ifdef CASE_VECTOR_SHORTEN_MODE
924 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
927 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
928 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
931 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
933 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
934 int len
, i
, min
, max
, insn_shuid
;
936 addr_diff_vec_flags flags
;
938 if (GET_CODE (insn
) != JUMP_INSN
939 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
941 pat
= PATTERN (insn
);
942 len
= XVECLEN (pat
, 1);
945 min_align
= MAX_CODE_ALIGN
;
946 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
948 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
949 int shuid
= INSN_SHUID (lab
);
960 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
961 min_align
= LABEL_TO_ALIGNMENT (lab
);
963 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
964 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
965 insn_shuid
= INSN_SHUID (insn
);
966 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
967 flags
.min_align
= min_align
;
968 flags
.base_after_vec
= rel
> insn_shuid
;
969 flags
.min_after_vec
= min
> insn_shuid
;
970 flags
.max_after_vec
= max
> insn_shuid
;
971 flags
.min_after_base
= min
> rel
;
972 flags
.max_after_base
= max
> rel
;
973 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
976 #endif /* CASE_VECTOR_SHORTEN_MODE */
978 /* Compute initial lengths, addresses, and varying flags for each insn. */
979 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
981 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
983 uid
= INSN_UID (insn
);
985 insn_lengths
[uid
] = 0;
987 if (GET_CODE (insn
) == CODE_LABEL
)
989 int log
= LABEL_TO_ALIGNMENT (insn
);
992 int align
= 1 << log
;
993 int new_address
= (insn_current_address
+ align
- 1) & -align
;
994 insn_lengths
[uid
] = new_address
- insn_current_address
;
998 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1000 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1001 || GET_CODE (insn
) == CODE_LABEL
)
1003 if (INSN_DELETED_P (insn
))
1006 body
= PATTERN (insn
);
1007 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1009 /* This only takes room if read-only data goes into the text
1011 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1012 insn_lengths
[uid
] = (XVECLEN (body
,
1013 GET_CODE (body
) == ADDR_DIFF_VEC
)
1014 * GET_MODE_SIZE (GET_MODE (body
)));
1015 /* Alignment is handled by ADDR_VEC_ALIGN. */
1017 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1018 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1019 else if (GET_CODE (body
) == SEQUENCE
)
1022 int const_delay_slots
;
1024 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1026 const_delay_slots
= 0;
1028 /* Inside a delay slot sequence, we do not do any branch shortening
1029 if the shortening could change the number of delay slots
1031 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1033 rtx inner_insn
= XVECEXP (body
, 0, i
);
1034 int inner_uid
= INSN_UID (inner_insn
);
1037 if (GET_CODE (body
) == ASM_INPUT
1038 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1039 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1040 * insn_default_length (inner_insn
));
1042 inner_length
= insn_default_length (inner_insn
);
1044 insn_lengths
[inner_uid
] = inner_length
;
1045 if (const_delay_slots
)
1047 if ((varying_length
[inner_uid
]
1048 = insn_variable_length_p (inner_insn
)) != 0)
1049 varying_length
[uid
] = 1;
1050 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1051 + insn_lengths
[uid
]);
1054 varying_length
[inner_uid
] = 0;
1055 insn_lengths
[uid
] += inner_length
;
1058 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1060 insn_lengths
[uid
] = insn_default_length (insn
);
1061 varying_length
[uid
] = insn_variable_length_p (insn
);
1064 /* If needed, do any adjustment. */
1065 #ifdef ADJUST_INSN_LENGTH
1066 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1067 if (insn_lengths
[uid
] < 0)
1068 fatal_insn ("negative insn length", insn
);
1072 /* Now loop over all the insns finding varying length insns. For each,
1073 get the current insn length. If it has changed, reflect the change.
1074 When nothing changes for a full pass, we are done. */
1076 while (something_changed
)
1078 something_changed
= 0;
1079 insn_current_align
= MAX_CODE_ALIGN
- 1;
1080 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1082 insn
= NEXT_INSN (insn
))
1085 #ifdef ADJUST_INSN_LENGTH
1090 uid
= INSN_UID (insn
);
1092 if (GET_CODE (insn
) == CODE_LABEL
)
1094 int log
= LABEL_TO_ALIGNMENT (insn
);
1095 if (log
> insn_current_align
)
1097 int align
= 1 << log
;
1098 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1099 insn_lengths
[uid
] = new_address
- insn_current_address
;
1100 insn_current_align
= log
;
1101 insn_current_address
= new_address
;
1104 insn_lengths
[uid
] = 0;
1105 INSN_ADDRESSES (uid
) = insn_current_address
;
1109 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1110 if (length_align
< insn_current_align
)
1111 insn_current_align
= length_align
;
1113 insn_last_address
= INSN_ADDRESSES (uid
);
1114 INSN_ADDRESSES (uid
) = insn_current_address
;
1116 #ifdef CASE_VECTOR_SHORTEN_MODE
1117 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1118 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1120 rtx body
= PATTERN (insn
);
1121 int old_length
= insn_lengths
[uid
];
1122 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1123 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1124 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1125 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1126 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1127 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1130 addr_diff_vec_flags flags
;
1132 /* Avoid automatic aggregate initialization. */
1133 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1135 /* Try to find a known alignment for rel_lab. */
1136 for (prev
= rel_lab
;
1138 && ! insn_lengths
[INSN_UID (prev
)]
1139 && ! (varying_length
[INSN_UID (prev
)] & 1);
1140 prev
= PREV_INSN (prev
))
1141 if (varying_length
[INSN_UID (prev
)] & 2)
1143 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1147 /* See the comment on addr_diff_vec_flags in rtl.h for the
1148 meaning of the flags values. base: REL_LAB vec: INSN */
1149 /* Anything after INSN has still addresses from the last
1150 pass; adjust these so that they reflect our current
1151 estimate for this pass. */
1152 if (flags
.base_after_vec
)
1153 rel_addr
+= insn_current_address
- insn_last_address
;
1154 if (flags
.min_after_vec
)
1155 min_addr
+= insn_current_address
- insn_last_address
;
1156 if (flags
.max_after_vec
)
1157 max_addr
+= insn_current_address
- insn_last_address
;
1158 /* We want to know the worst case, i.e. lowest possible value
1159 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1160 its offset is positive, and we have to be wary of code shrink;
1161 otherwise, it is negative, and we have to be vary of code
1163 if (flags
.min_after_base
)
1165 /* If INSN is between REL_LAB and MIN_LAB, the size
1166 changes we are about to make can change the alignment
1167 within the observed offset, therefore we have to break
1168 it up into two parts that are independent. */
1169 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1171 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1172 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1175 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1179 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1181 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1182 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1185 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1187 /* Likewise, determine the highest lowest possible value
1188 for the offset of MAX_LAB. */
1189 if (flags
.max_after_base
)
1191 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1193 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1194 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1197 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1201 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1203 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1204 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1207 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1209 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1210 max_addr
- rel_addr
,
1212 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1215 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1216 insn_current_address
+= insn_lengths
[uid
];
1217 if (insn_lengths
[uid
] != old_length
)
1218 something_changed
= 1;
1223 #endif /* CASE_VECTOR_SHORTEN_MODE */
1225 if (! (varying_length
[uid
]))
1227 if (GET_CODE (insn
) == INSN
1228 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1232 body
= PATTERN (insn
);
1233 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1235 rtx inner_insn
= XVECEXP (body
, 0, i
);
1236 int inner_uid
= INSN_UID (inner_insn
);
1238 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1240 insn_current_address
+= insn_lengths
[inner_uid
];
1244 insn_current_address
+= insn_lengths
[uid
];
1249 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1253 body
= PATTERN (insn
);
1255 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1257 rtx inner_insn
= XVECEXP (body
, 0, i
);
1258 int inner_uid
= INSN_UID (inner_insn
);
1261 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1263 /* insn_current_length returns 0 for insns with a
1264 non-varying length. */
1265 if (! varying_length
[inner_uid
])
1266 inner_length
= insn_lengths
[inner_uid
];
1268 inner_length
= insn_current_length (inner_insn
);
1270 if (inner_length
!= insn_lengths
[inner_uid
])
1272 insn_lengths
[inner_uid
] = inner_length
;
1273 something_changed
= 1;
1275 insn_current_address
+= insn_lengths
[inner_uid
];
1276 new_length
+= inner_length
;
1281 new_length
= insn_current_length (insn
);
1282 insn_current_address
+= new_length
;
1285 #ifdef ADJUST_INSN_LENGTH
1286 /* If needed, do any adjustment. */
1287 tmp_length
= new_length
;
1288 ADJUST_INSN_LENGTH (insn
, new_length
);
1289 insn_current_address
+= (new_length
- tmp_length
);
1292 if (new_length
!= insn_lengths
[uid
])
1294 insn_lengths
[uid
] = new_length
;
1295 something_changed
= 1;
1298 /* For a non-optimizing compile, do only a single pass. */
1303 free (varying_length
);
1305 #endif /* HAVE_ATTR_length */
1308 #ifdef HAVE_ATTR_length
1309 /* Given the body of an INSN known to be generated by an ASM statement, return
1310 the number of machine instructions likely to be generated for this insn.
1311 This is used to compute its length. */
1314 asm_insn_count (body
)
1317 const char *template;
1320 if (GET_CODE (body
) == ASM_INPUT
)
1321 template = XSTR (body
, 0);
1323 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1325 for (; *template; template++)
1326 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1333 /* Output assembler code for the start of a function,
1334 and initialize some of the variables in this file
1335 for the new function. The label for the function and associated
1336 assembler pseudo-ops have already been output in `assemble_start_function'.
1338 FIRST is the first insn of the rtl for the function being compiled.
1339 FILE is the file to write assembler code to.
1340 OPTIMIZE is nonzero if we should eliminate redundant
1341 test and compare insns. */
1344 final_start_function (first
, file
, optimize
)
1345 rtx first ATTRIBUTE_UNUSED
;
1347 int optimize ATTRIBUTE_UNUSED
;
1351 this_is_asm_operands
= 0;
1353 #ifdef NON_SAVING_SETJMP
1354 /* A function that calls setjmp should save and restore all the
1355 call-saved registers on a system where longjmp clobbers them. */
1356 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1360 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1361 if (!call_used_regs
[i
])
1362 regs_ever_live
[i
] = 1;
1368 high_block_linenum
= high_function_linenum
= last_linenum
;
1370 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1372 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1373 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1374 dwarf2out_begin_prologue (0, NULL
);
1377 #ifdef LEAF_REG_REMAP
1378 if (current_function_uses_only_leaf_regs
)
1379 leaf_renumber_regs (first
);
1382 /* The Sun386i and perhaps other machines don't work right
1383 if the profiling code comes after the prologue. */
1384 #ifdef PROFILE_BEFORE_PROLOGUE
1385 if (current_function_profile
)
1386 profile_function (file
);
1387 #endif /* PROFILE_BEFORE_PROLOGUE */
1389 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1390 if (dwarf2out_do_frame ())
1391 dwarf2out_frame_debug (NULL_RTX
);
1394 /* If debugging, assign block numbers to all of the blocks in this
1398 remove_unnecessary_notes ();
1399 reemit_insn_block_notes ();
1400 number_blocks (current_function_decl
);
1401 /* We never actually put out begin/end notes for the top-level
1402 block in the function. But, conceptually, that block is
1404 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1407 /* First output the function prologue: code to set up the stack frame. */
1408 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1410 /* If the machine represents the prologue as RTL, the profiling code must
1411 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1412 #ifdef HAVE_prologue
1413 if (! HAVE_prologue
)
1415 profile_after_prologue (file
);
1419 profile_after_prologue (file
)
1420 FILE *file ATTRIBUTE_UNUSED
;
1422 #ifndef PROFILE_BEFORE_PROLOGUE
1423 if (current_function_profile
)
1424 profile_function (file
);
1425 #endif /* not PROFILE_BEFORE_PROLOGUE */
1429 profile_function (file
)
1430 FILE *file ATTRIBUTE_UNUSED
;
1432 #ifndef NO_PROFILE_COUNTERS
1433 # define NO_PROFILE_COUNTERS 0
1435 #if defined(ASM_OUTPUT_REG_PUSH)
1436 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1437 int sval
= current_function_returns_struct
;
1439 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1440 int cxt
= current_function_needs_context
;
1442 #endif /* ASM_OUTPUT_REG_PUSH */
1444 if (! NO_PROFILE_COUNTERS
)
1446 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1448 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1449 (*targetm
.asm_out
.internal_label
) (file
, "LP", current_function_funcdef_no
);
1450 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1453 function_section (current_function_decl
);
1455 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1457 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1459 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1462 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1467 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1469 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1471 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1474 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1479 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1481 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1483 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1485 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1488 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1493 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1495 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1497 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1500 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1506 /* Output assembler code for the end of a function.
1507 For clarity, args are same as those of `final_start_function'
1508 even though not all of them are needed. */
1511 final_end_function ()
1515 (*debug_hooks
->end_function
) (high_function_linenum
);
1517 /* Finally, output the function epilogue:
1518 code to restore the stack frame and return to the caller. */
1519 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1521 /* And debug output. */
1522 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1524 #if defined (DWARF2_UNWIND_INFO)
1525 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1526 && dwarf2out_do_frame ())
1527 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1531 /* Output assembler code for some insns: all or part of a function.
1532 For description of args, see `final_start_function', above.
1534 PRESCAN is 1 if we are not really outputting,
1535 just scanning as if we were outputting.
1536 Prescanning deletes and rearranges insns just like ordinary output.
1537 PRESCAN is -2 if we are outputting after having prescanned.
1538 In this case, don't try to delete or rearrange insns
1539 because that has already been done.
1540 Prescanning is done only on certain machines. */
1543 final (first
, file
, optimize
, prescan
)
1553 last_ignored_compare
= 0;
1555 /* Make a map indicating which line numbers appear in this function.
1556 When producing SDB debugging info, delete troublesome line number
1557 notes from inlined functions in other files as well as duplicate
1558 line number notes. */
1559 #ifdef SDB_DEBUGGING_INFO
1560 if (write_symbols
== SDB_DEBUG
)
1563 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1564 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1566 if ((RTX_INTEGRATED_P (insn
)
1567 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1569 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1570 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1572 delete_insn (insn
); /* Use delete_note. */
1576 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1577 max_line
= NOTE_LINE_NUMBER (insn
);
1583 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1584 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1585 max_line
= NOTE_LINE_NUMBER (insn
);
1588 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1590 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1592 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1593 max_uid
= INSN_UID (insn
);
1594 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1595 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1597 /* If CC tracking across branches is enabled, record the insn which
1598 jumps to each branch only reached from one place. */
1599 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1601 rtx lab
= JUMP_LABEL (insn
);
1602 if (lab
&& LABEL_NUSES (lab
) == 1)
1604 LABEL_REFS (lab
) = insn
;
1614 /* Output the insns. */
1615 for (insn
= NEXT_INSN (first
); insn
;)
1617 #ifdef HAVE_ATTR_length
1618 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1620 /* This can be triggered by bugs elsewhere in the compiler if
1621 new insns are created after init_insn_lengths is called. */
1622 if (GET_CODE (insn
) == NOTE
)
1623 insn_current_address
= -1;
1628 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1629 #endif /* HAVE_ATTR_length */
1631 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1634 free (line_note_exists
);
1635 line_note_exists
= NULL
;
1639 get_insn_template (code
, insn
)
1643 const void *output
= insn_data
[code
].output
;
1644 switch (insn_data
[code
].output_format
)
1646 case INSN_OUTPUT_FORMAT_SINGLE
:
1647 return (const char *) output
;
1648 case INSN_OUTPUT_FORMAT_MULTI
:
1649 return ((const char *const *) output
)[which_alternative
];
1650 case INSN_OUTPUT_FORMAT_FUNCTION
:
1653 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1660 /* Emit the appropriate declaration for an alternate-entry-point
1661 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1662 LABEL_KIND != LABEL_NORMAL.
1664 The case fall-through in this function is intentional. */
1666 output_alternate_entry_point (file
, insn
)
1670 const char *name
= LABEL_NAME (insn
);
1672 switch (LABEL_KIND (insn
))
1674 case LABEL_WEAK_ENTRY
:
1675 #ifdef ASM_WEAKEN_LABEL
1676 ASM_WEAKEN_LABEL (file
, name
);
1678 case LABEL_GLOBAL_ENTRY
:
1679 (*targetm
.asm_out
.globalize_label
) (file
, name
);
1680 case LABEL_STATIC_ENTRY
:
1681 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1682 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1684 ASM_OUTPUT_LABEL (file
, name
);
1693 /* The final scan for one insn, INSN.
1694 Args are same as in `final', except that INSN
1695 is the insn being scanned.
1696 Value returned is the next insn to be scanned.
1698 NOPEEPHOLES is the flag to disallow peephole processing (currently
1699 used for within delayed branch sequence output). */
1702 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
1705 int optimize ATTRIBUTE_UNUSED
;
1707 int nopeepholes ATTRIBUTE_UNUSED
;
1715 /* Ignore deleted insns. These can occur when we split insns (due to a
1716 template of "#") while not optimizing. */
1717 if (INSN_DELETED_P (insn
))
1718 return NEXT_INSN (insn
);
1720 switch (GET_CODE (insn
))
1726 switch (NOTE_LINE_NUMBER (insn
))
1728 case NOTE_INSN_DELETED
:
1729 case NOTE_INSN_LOOP_BEG
:
1730 case NOTE_INSN_LOOP_END
:
1731 case NOTE_INSN_LOOP_END_TOP_COND
:
1732 case NOTE_INSN_LOOP_CONT
:
1733 case NOTE_INSN_LOOP_VTOP
:
1734 case NOTE_INSN_FUNCTION_END
:
1735 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1736 case NOTE_INSN_EXPECTED_VALUE
:
1739 case NOTE_INSN_BASIC_BLOCK
:
1740 #ifdef IA64_UNWIND_INFO
1741 IA64_UNWIND_EMIT (asm_out_file
, insn
);
1744 fprintf (asm_out_file
, "\t%s basic block %d\n",
1745 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1748 case NOTE_INSN_EH_REGION_BEG
:
1749 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1750 NOTE_EH_HANDLER (insn
));
1753 case NOTE_INSN_EH_REGION_END
:
1754 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1755 NOTE_EH_HANDLER (insn
));
1758 case NOTE_INSN_PROLOGUE_END
:
1759 (*targetm
.asm_out
.function_end_prologue
) (file
);
1760 profile_after_prologue (file
);
1763 case NOTE_INSN_EPILOGUE_BEG
:
1764 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
1767 case NOTE_INSN_FUNCTION_BEG
:
1769 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1772 case NOTE_INSN_BLOCK_BEG
:
1773 if (debug_info_level
== DINFO_LEVEL_NORMAL
1774 || debug_info_level
== DINFO_LEVEL_VERBOSE
1775 || write_symbols
== DWARF_DEBUG
1776 || write_symbols
== DWARF2_DEBUG
1777 || write_symbols
== VMS_AND_DWARF2_DEBUG
1778 || write_symbols
== VMS_DEBUG
)
1780 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1784 high_block_linenum
= last_linenum
;
1786 /* Output debugging info about the symbol-block beginning. */
1787 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1789 /* Mark this block as output. */
1790 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1794 case NOTE_INSN_BLOCK_END
:
1795 if (debug_info_level
== DINFO_LEVEL_NORMAL
1796 || debug_info_level
== DINFO_LEVEL_VERBOSE
1797 || write_symbols
== DWARF_DEBUG
1798 || write_symbols
== DWARF2_DEBUG
1799 || write_symbols
== VMS_AND_DWARF2_DEBUG
1800 || write_symbols
== VMS_DEBUG
)
1802 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1806 /* End of a symbol-block. */
1808 if (block_depth
< 0)
1811 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1815 case NOTE_INSN_DELETED_LABEL
:
1816 /* Emit the label. We may have deleted the CODE_LABEL because
1817 the label could be proved to be unreachable, though still
1818 referenced (in the form of having its address taken. */
1819 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1826 if (NOTE_LINE_NUMBER (insn
) <= 0)
1833 #if defined (DWARF2_UNWIND_INFO)
1834 if (dwarf2out_do_frame ())
1835 dwarf2out_frame_debug (insn
);
1840 /* The target port might emit labels in the output function for
1841 some insn, e.g. sh.c output_branchy_insn. */
1842 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1844 int align
= LABEL_TO_ALIGNMENT (insn
);
1845 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1846 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1849 if (align
&& NEXT_INSN (insn
))
1851 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1852 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1854 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1855 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1857 ASM_OUTPUT_ALIGN (file
, align
);
1864 /* If this label is reached from only one place, set the condition
1865 codes from the instruction just before the branch. */
1867 /* Disabled because some insns set cc_status in the C output code
1868 and NOTICE_UPDATE_CC alone can set incorrect status. */
1869 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1871 rtx jump
= LABEL_REFS (insn
);
1872 rtx barrier
= prev_nonnote_insn (insn
);
1874 /* If the LABEL_REFS field of this label has been set to point
1875 at a branch, the predecessor of the branch is a regular
1876 insn, and that branch is the only way to reach this label,
1877 set the condition codes based on the branch and its
1879 if (barrier
&& GET_CODE (barrier
) == BARRIER
1880 && jump
&& GET_CODE (jump
) == JUMP_INSN
1881 && (prev
= prev_nonnote_insn (jump
))
1882 && GET_CODE (prev
) == INSN
)
1884 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1885 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1892 #ifdef FINAL_PRESCAN_LABEL
1893 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
1896 if (LABEL_NAME (insn
))
1897 (*debug_hooks
->label
) (insn
);
1901 fputs (ASM_APP_OFF
, file
);
1904 if (NEXT_INSN (insn
) != 0
1905 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
1907 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
1909 /* If this label is followed by a jump-table,
1910 make sure we put the label in the read-only section. Also
1911 possibly write the label and jump table together. */
1913 if (GET_CODE (nextbody
) == ADDR_VEC
1914 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1916 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1917 /* In this case, the case vector is being moved by the
1918 target, so don't output the label at all. Leave that
1919 to the back end macros. */
1921 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1925 readonly_data_section ();
1927 #ifdef ADDR_VEC_ALIGN
1928 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
1930 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1932 ASM_OUTPUT_ALIGN (file
, log_align
);
1935 function_section (current_function_decl
);
1937 #ifdef ASM_OUTPUT_CASE_LABEL
1938 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1941 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1947 if (LABEL_ALT_ENTRY_P (insn
))
1948 output_alternate_entry_point (file
, insn
);
1950 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1955 rtx body
= PATTERN (insn
);
1956 int insn_code_number
;
1957 const char *template;
1960 /* An INSN, JUMP_INSN or CALL_INSN.
1961 First check for special kinds that recog doesn't recognize. */
1963 if (GET_CODE (body
) == USE
/* These are just declarations */
1964 || GET_CODE (body
) == CLOBBER
)
1968 /* If there is a REG_CC_SETTER note on this insn, it means that
1969 the setting of the condition code was done in the delay slot
1970 of the insn that branched here. So recover the cc status
1971 from the insn that set it. */
1973 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1976 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
1977 cc_prev_status
= cc_status
;
1981 /* Detect insns that are really jump-tables
1982 and output them as such. */
1984 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1986 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1995 fputs (ASM_APP_OFF
, file
);
1999 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2000 if (GET_CODE (body
) == ADDR_VEC
)
2002 #ifdef ASM_OUTPUT_ADDR_VEC
2003 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2010 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2011 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2017 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2018 for (idx
= 0; idx
< vlen
; idx
++)
2020 if (GET_CODE (body
) == ADDR_VEC
)
2022 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2023 ASM_OUTPUT_ADDR_VEC_ELT
2024 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2031 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2032 ASM_OUTPUT_ADDR_DIFF_ELT
2035 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2036 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2042 #ifdef ASM_OUTPUT_CASE_END
2043 ASM_OUTPUT_CASE_END (file
,
2044 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2049 function_section (current_function_decl
);
2053 /* Output this line note if it is the first or the last line
2055 if (notice_source_line (insn
))
2057 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2060 if (GET_CODE (body
) == ASM_INPUT
)
2062 const char *string
= XSTR (body
, 0);
2064 /* There's no telling what that did to the condition codes. */
2073 fputs (ASM_APP_ON
, file
);
2076 fprintf (asm_out_file
, "\t%s\n", string
);
2081 /* Detect `asm' construct with operands. */
2082 if (asm_noperands (body
) >= 0)
2084 unsigned int noperands
= asm_noperands (body
);
2085 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2088 /* There's no telling what that did to the condition codes. */
2093 /* Get out the operand values. */
2094 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2095 /* Inhibit aborts on what would otherwise be compiler bugs. */
2096 insn_noperands
= noperands
;
2097 this_is_asm_operands
= insn
;
2099 /* Output the insn using them. */
2104 fputs (ASM_APP_ON
, file
);
2107 output_asm_insn (string
, ops
);
2110 this_is_asm_operands
= 0;
2114 if (prescan
<= 0 && app_on
)
2116 fputs (ASM_APP_OFF
, file
);
2120 if (GET_CODE (body
) == SEQUENCE
)
2122 /* A delayed-branch sequence */
2128 final_sequence
= body
;
2130 /* Record the delay slots' frame information before the branch.
2131 This is needed for delayed calls: see execute_cfa_program(). */
2132 #if defined (DWARF2_UNWIND_INFO)
2133 if (dwarf2out_do_frame ())
2134 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2135 dwarf2out_frame_debug (XVECEXP (body
, 0, i
));
2138 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2139 force the restoration of a comparison that was previously
2140 thought unnecessary. If that happens, cancel this sequence
2141 and cause that insn to be restored. */
2143 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2144 if (next
!= XVECEXP (body
, 0, 1))
2150 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2152 rtx insn
= XVECEXP (body
, 0, i
);
2153 rtx next
= NEXT_INSN (insn
);
2154 /* We loop in case any instruction in a delay slot gets
2157 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2158 while (insn
!= next
);
2160 #ifdef DBR_OUTPUT_SEQEND
2161 DBR_OUTPUT_SEQEND (file
);
2165 /* If the insn requiring the delay slot was a CALL_INSN, the
2166 insns in the delay slot are actually executed before the
2167 called function. Hence we don't preserve any CC-setting
2168 actions in these insns and the CC must be marked as being
2169 clobbered by the function. */
2170 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2177 /* We have a real machine instruction as rtl. */
2179 body
= PATTERN (insn
);
2182 set
= single_set (insn
);
2184 /* Check for redundant test and compare instructions
2185 (when the condition codes are already set up as desired).
2186 This is done only when optimizing; if not optimizing,
2187 it should be possible for the user to alter a variable
2188 with the debugger in between statements
2189 and the next statement should reexamine the variable
2190 to compute the condition codes. */
2195 rtx set
= single_set (insn
);
2199 && GET_CODE (SET_DEST (set
)) == CC0
2200 && insn
!= last_ignored_compare
)
2202 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2203 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2204 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2206 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2207 XEXP (SET_SRC (set
), 0)
2208 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2209 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2210 XEXP (SET_SRC (set
), 1)
2211 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2213 if ((cc_status
.value1
!= 0
2214 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2215 || (cc_status
.value2
!= 0
2216 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2218 /* Don't delete insn if it has an addressing side-effect. */
2219 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2220 /* or if anything in it is volatile. */
2221 && ! volatile_refs_p (PATTERN (insn
)))
2223 /* We don't really delete the insn; just ignore it. */
2224 last_ignored_compare
= insn
;
2233 /* Don't bother outputting obvious no-ops, even without -O.
2234 This optimization is fast and doesn't interfere with debugging.
2235 Don't do this if the insn is in a delay slot, since this
2236 will cause an improper number of delay insns to be written. */
2237 if (final_sequence
== 0
2239 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2240 && GET_CODE (SET_SRC (body
)) == REG
2241 && GET_CODE (SET_DEST (body
)) == REG
2242 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2247 /* If this is a conditional branch, maybe modify it
2248 if the cc's are in a nonstandard state
2249 so that it accomplishes the same thing that it would
2250 do straightforwardly if the cc's were set up normally. */
2252 if (cc_status
.flags
!= 0
2253 && GET_CODE (insn
) == JUMP_INSN
2254 && GET_CODE (body
) == SET
2255 && SET_DEST (body
) == pc_rtx
2256 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2257 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2258 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2259 /* This is done during prescan; it is not done again
2260 in final scan when prescan has been done. */
2263 /* This function may alter the contents of its argument
2264 and clear some of the cc_status.flags bits.
2265 It may also return 1 meaning condition now always true
2266 or -1 meaning condition now always false
2267 or 2 meaning condition nontrivial but altered. */
2268 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2269 /* If condition now has fixed value, replace the IF_THEN_ELSE
2270 with its then-operand or its else-operand. */
2272 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2274 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2276 /* The jump is now either unconditional or a no-op.
2277 If it has become a no-op, don't try to output it.
2278 (It would not be recognized.) */
2279 if (SET_SRC (body
) == pc_rtx
)
2284 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2285 /* Replace (set (pc) (return)) with (return). */
2286 PATTERN (insn
) = body
= SET_SRC (body
);
2288 /* Rerecognize the instruction if it has changed. */
2290 INSN_CODE (insn
) = -1;
2293 /* Make same adjustments to instructions that examine the
2294 condition codes without jumping and instructions that
2295 handle conditional moves (if this machine has either one). */
2297 if (cc_status
.flags
!= 0
2300 rtx cond_rtx
, then_rtx
, else_rtx
;
2302 if (GET_CODE (insn
) != JUMP_INSN
2303 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2305 cond_rtx
= XEXP (SET_SRC (set
), 0);
2306 then_rtx
= XEXP (SET_SRC (set
), 1);
2307 else_rtx
= XEXP (SET_SRC (set
), 2);
2311 cond_rtx
= SET_SRC (set
);
2312 then_rtx
= const_true_rtx
;
2313 else_rtx
= const0_rtx
;
2316 switch (GET_CODE (cond_rtx
))
2330 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2332 result
= alter_cond (cond_rtx
);
2334 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2335 else if (result
== -1)
2336 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2337 else if (result
== 2)
2338 INSN_CODE (insn
) = -1;
2339 if (SET_DEST (set
) == SET_SRC (set
))
2351 #ifdef HAVE_peephole
2352 /* Do machine-specific peephole optimizations if desired. */
2354 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2356 rtx next
= peephole (insn
);
2357 /* When peepholing, if there were notes within the peephole,
2358 emit them before the peephole. */
2359 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2361 rtx prev
= PREV_INSN (insn
);
2363 for (note
= NEXT_INSN (insn
); note
!= next
;
2364 note
= NEXT_INSN (note
))
2365 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2367 /* In case this is prescan, put the notes
2368 in proper position for later rescan. */
2369 note
= NEXT_INSN (insn
);
2370 PREV_INSN (note
) = prev
;
2371 NEXT_INSN (prev
) = note
;
2372 NEXT_INSN (PREV_INSN (next
)) = insn
;
2373 PREV_INSN (insn
) = PREV_INSN (next
);
2374 NEXT_INSN (insn
) = next
;
2375 PREV_INSN (next
) = insn
;
2378 /* PEEPHOLE might have changed this. */
2379 body
= PATTERN (insn
);
2383 /* Try to recognize the instruction.
2384 If successful, verify that the operands satisfy the
2385 constraints for the instruction. Crash if they don't,
2386 since `reload' should have changed them so that they do. */
2388 insn_code_number
= recog_memoized (insn
);
2389 cleanup_subreg_operands (insn
);
2391 /* Dump the insn in the assembly for debugging. */
2392 if (flag_dump_rtl_in_asm
)
2394 print_rtx_head
= ASM_COMMENT_START
;
2395 print_rtl_single (asm_out_file
, insn
);
2396 print_rtx_head
= "";
2399 if (! constrain_operands_cached (1))
2400 fatal_insn_not_found (insn
);
2402 /* Some target machines need to prescan each insn before
2405 #ifdef FINAL_PRESCAN_INSN
2406 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2409 #ifdef HAVE_conditional_execution
2410 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2411 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2413 current_insn_predicate
= NULL_RTX
;
2417 cc_prev_status
= cc_status
;
2419 /* Update `cc_status' for this instruction.
2420 The instruction's output routine may change it further.
2421 If the output routine for a jump insn needs to depend
2422 on the cc status, it should look at cc_prev_status. */
2424 NOTICE_UPDATE_CC (body
, insn
);
2427 current_output_insn
= debug_insn
= insn
;
2429 #if defined (DWARF2_UNWIND_INFO)
2430 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2431 dwarf2out_frame_debug (insn
);
2434 /* Find the proper template for this insn. */
2435 template = get_insn_template (insn_code_number
, insn
);
2437 /* If the C code returns 0, it means that it is a jump insn
2438 which follows a deleted test insn, and that test insn
2439 needs to be reinserted. */
2444 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2447 /* We have already processed the notes between the setter and
2448 the user. Make sure we don't process them again, this is
2449 particularly important if one of the notes is a block
2450 scope note or an EH note. */
2452 prev
!= last_ignored_compare
;
2453 prev
= PREV_INSN (prev
))
2455 if (GET_CODE (prev
) == NOTE
)
2456 delete_insn (prev
); /* Use delete_note. */
2462 /* If the template is the string "#", it means that this insn must
2464 if (template[0] == '#' && template[1] == '\0')
2466 rtx
new = try_split (body
, insn
, 0);
2468 /* If we didn't split the insn, go away. */
2469 if (new == insn
&& PATTERN (new) == body
)
2470 fatal_insn ("could not split insn", insn
);
2472 #ifdef HAVE_ATTR_length
2473 /* This instruction should have been split in shorten_branches,
2474 to ensure that we would have valid length info for the
2485 #ifdef IA64_UNWIND_INFO
2486 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2488 /* Output assembler code from the template. */
2490 output_asm_insn (template, recog_data
.operand
);
2492 /* If necessary, report the effect that the instruction has on
2493 the unwind info. We've already done this for delay slots
2494 and call instructions. */
2495 #if defined (DWARF2_UNWIND_INFO)
2496 if (GET_CODE (insn
) == INSN
2497 #if !defined (HAVE_prologue)
2498 && !ACCUMULATE_OUTGOING_ARGS
2500 && final_sequence
== 0
2501 && dwarf2out_do_frame ())
2502 dwarf2out_frame_debug (insn
);
2506 /* It's not at all clear why we did this and doing so interferes
2507 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2510 /* Mark this insn as having been output. */
2511 INSN_DELETED_P (insn
) = 1;
2514 /* Emit information for vtable gc. */
2515 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2517 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2518 INTVAL (XEXP (XEXP (note
, 0), 1)));
2520 current_output_insn
= debug_insn
= 0;
2523 return NEXT_INSN (insn
);
2526 /* Output debugging info to the assembler file FILE
2527 based on the NOTE-insn INSN, assumed to be a line number. */
2530 notice_source_line (insn
)
2533 const char *filename
= insn_file (insn
);
2534 int linenum
= insn_line (insn
);
2536 if (filename
&& (filename
!= last_filename
|| last_linenum
!= linenum
))
2538 last_filename
= filename
;
2539 last_linenum
= linenum
;
2540 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2541 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2547 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2548 directly to the desired hard register. */
2551 cleanup_subreg_operands (insn
)
2555 extract_insn_cached (insn
);
2556 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2558 /* The following test cannot use recog_data.operand when tesing
2559 for a SUBREG: the underlying object might have been changed
2560 already if we are inside a match_operator expression that
2561 matches the else clause. Instead we test the underlying
2562 expression directly. */
2563 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2564 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2565 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2566 || GET_CODE (recog_data
.operand
[i
]) == MULT
2567 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2568 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2571 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2573 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2574 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2575 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2576 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2577 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2578 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2582 /* If X is a SUBREG, replace it with a REG or a MEM,
2583 based on the thing it is a subreg of. */
2590 rtx y
= SUBREG_REG (x
);
2592 /* simplify_subreg does not remove subreg from volatile references.
2593 We are required to. */
2594 if (GET_CODE (y
) == MEM
)
2595 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2598 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2603 /* Simplify_subreg can't handle some REG cases, but we have to. */
2604 else if (GET_CODE (y
) == REG
)
2606 unsigned int regno
= subreg_hard_regno (x
, 1);
2607 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2616 /* Do alter_subreg on all the SUBREGs contained in X. */
2619 walk_alter_subreg (xp
)
2623 switch (GET_CODE (x
))
2627 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2628 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2632 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2636 return alter_subreg (xp
);
2647 /* Given BODY, the body of a jump instruction, alter the jump condition
2648 as required by the bits that are set in cc_status.flags.
2649 Not all of the bits there can be handled at this level in all cases.
2651 The value is normally 0.
2652 1 means that the condition has become always true.
2653 -1 means that the condition has become always false.
2654 2 means that COND has been altered. */
2662 if (cc_status
.flags
& CC_REVERSED
)
2665 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2668 if (cc_status
.flags
& CC_INVERTED
)
2671 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2674 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2675 switch (GET_CODE (cond
))
2680 /* Jump becomes unconditional. */
2686 /* Jump becomes no-op. */
2690 PUT_CODE (cond
, EQ
);
2695 PUT_CODE (cond
, NE
);
2703 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2704 switch (GET_CODE (cond
))
2708 /* Jump becomes unconditional. */
2713 /* Jump becomes no-op. */
2718 PUT_CODE (cond
, EQ
);
2724 PUT_CODE (cond
, NE
);
2732 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2733 switch (GET_CODE (cond
))
2736 /* Jump becomes unconditional. */
2740 PUT_CODE (cond
, EQ
);
2745 PUT_CODE (cond
, NE
);
2750 /* Jump becomes no-op. */
2757 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2758 switch (GET_CODE (cond
))
2764 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2769 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2774 if (cc_status
.flags
& CC_NOT_SIGNED
)
2775 /* The flags are valid if signed condition operators are converted
2777 switch (GET_CODE (cond
))
2780 PUT_CODE (cond
, LEU
);
2785 PUT_CODE (cond
, LTU
);
2790 PUT_CODE (cond
, GTU
);
2795 PUT_CODE (cond
, GEU
);
2807 /* Report inconsistency between the assembler template and the operands.
2808 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2811 output_operand_lossage (const char *msgid
, ...)
2815 const char *pfx_str
;
2818 va_start (ap
, msgid
);
2820 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
2821 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
2822 vasprintf (&new_message
, fmt_string
, ap
);
2824 if (this_is_asm_operands
)
2825 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2827 internal_error ("%s", new_message
);
2834 /* Output of assembler code from a template, and its subroutines. */
2836 /* Annotate the assembly with a comment describing the pattern and
2837 alternative used. */
2844 int num
= INSN_CODE (debug_insn
);
2845 fprintf (asm_out_file
, "\t%s %d\t%s",
2846 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2847 insn_data
[num
].name
);
2848 if (insn_data
[num
].n_alternatives
> 1)
2849 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2850 #ifdef HAVE_ATTR_length
2851 fprintf (asm_out_file
, "\t[length = %d]",
2852 get_attr_length (debug_insn
));
2854 /* Clear this so only the first assembler insn
2855 of any rtl insn will get the special comment for -dp. */
2860 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2861 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2862 corresponds to the address of the object and 0 if to the object. */
2865 get_mem_expr_from_op (op
, paddressp
)
2874 if (GET_CODE (op
) == REG
)
2875 return REG_EXPR (op
);
2876 else if (GET_CODE (op
) != MEM
)
2879 if (MEM_EXPR (op
) != 0)
2880 return MEM_EXPR (op
);
2882 /* Otherwise we have an address, so indicate it and look at the address. */
2886 /* First check if we have a decl for the address, then look at the right side
2887 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2888 But don't allow the address to itself be indirect. */
2889 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2891 else if (GET_CODE (op
) == PLUS
2892 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2895 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
2896 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
2899 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2900 return inner_addressp
? 0 : expr
;
2903 /* Output operand names for assembler instructions. OPERANDS is the
2904 operand vector, OPORDER is the order to write the operands, and NOPS
2905 is the number of operands to write. */
2908 output_asm_operand_names (operands
, oporder
, nops
)
2916 for (i
= 0; i
< nops
; i
++)
2919 rtx op
= operands
[oporder
[i
]];
2920 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2922 fprintf (asm_out_file
, "%c%s",
2923 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2927 fprintf (asm_out_file
, "%s",
2928 addressp
? "*" : "");
2929 print_mem_expr (asm_out_file
, expr
);
2932 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2933 && ORIGINAL_REGNO (op
) != REGNO (op
))
2934 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2938 /* Output text from TEMPLATE to the assembler output file,
2939 obeying %-directions to substitute operands taken from
2940 the vector OPERANDS.
2942 %N (for N a digit) means print operand N in usual manner.
2943 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2944 and print the label name with no punctuation.
2945 %cN means require operand N to be a constant
2946 and print the constant expression with no punctuation.
2947 %aN means expect operand N to be a memory address
2948 (not a memory reference!) and print a reference
2950 %nN means expect operand N to be a constant
2951 and print a constant expression for minus the value
2952 of the operand, with no other punctuation. */
2955 output_asm_insn (template, operands
)
2956 const char *template;
2961 #ifdef ASSEMBLER_DIALECT
2964 int oporder
[MAX_RECOG_OPERANDS
];
2965 char opoutput
[MAX_RECOG_OPERANDS
];
2968 /* An insn may return a null string template
2969 in a case where no assembler code is needed. */
2973 memset (opoutput
, 0, sizeof opoutput
);
2975 putc ('\t', asm_out_file
);
2977 #ifdef ASM_OUTPUT_OPCODE
2978 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2985 if (flag_verbose_asm
)
2986 output_asm_operand_names (operands
, oporder
, ops
);
2987 if (flag_print_asm_name
)
2991 memset (opoutput
, 0, sizeof opoutput
);
2993 putc (c
, asm_out_file
);
2994 #ifdef ASM_OUTPUT_OPCODE
2995 while ((c
= *p
) == '\t')
2997 putc (c
, asm_out_file
);
3000 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3004 #ifdef ASSEMBLER_DIALECT
3010 output_operand_lossage ("nested assembly dialect alternatives");
3014 /* If we want the first dialect, do nothing. Otherwise, skip
3015 DIALECT_NUMBER of strings ending with '|'. */
3016 for (i
= 0; i
< dialect_number
; i
++)
3018 while (*p
&& *p
!= '}' && *p
++ != '|')
3027 output_operand_lossage ("unterminated assembly dialect alternative");
3034 /* Skip to close brace. */
3039 output_operand_lossage ("unterminated assembly dialect alternative");
3043 while (*p
++ != '}');
3047 putc (c
, asm_out_file
);
3052 putc (c
, asm_out_file
);
3058 /* %% outputs a single %. */
3062 putc (c
, asm_out_file
);
3064 /* %= outputs a number which is unique to each insn in the entire
3065 compilation. This is useful for making local labels that are
3066 referred to more than once in a given insn. */
3070 fprintf (asm_out_file
, "%d", insn_counter
);
3072 /* % followed by a letter and some digits
3073 outputs an operand in a special way depending on the letter.
3074 Letters `acln' are implemented directly.
3075 Other letters are passed to `output_operand' so that
3076 the PRINT_OPERAND macro can define them. */
3077 else if (ISALPHA (*p
))
3083 output_operand_lossage ("operand number missing after %%-letter");
3084 else if (this_is_asm_operands
3085 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3086 output_operand_lossage ("operand number out of range");
3087 else if (letter
== 'l')
3088 output_asm_label (operands
[c
]);
3089 else if (letter
== 'a')
3090 output_address (operands
[c
]);
3091 else if (letter
== 'c')
3093 if (CONSTANT_ADDRESS_P (operands
[c
]))
3094 output_addr_const (asm_out_file
, operands
[c
]);
3096 output_operand (operands
[c
], 'c');
3098 else if (letter
== 'n')
3100 if (GET_CODE (operands
[c
]) == CONST_INT
)
3101 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3102 - INTVAL (operands
[c
]));
3105 putc ('-', asm_out_file
);
3106 output_addr_const (asm_out_file
, operands
[c
]);
3110 output_operand (operands
[c
], letter
);
3116 while (ISDIGIT (c
= *p
))
3119 /* % followed by a digit outputs an operand the default way. */
3120 else if (ISDIGIT (*p
))
3123 if (this_is_asm_operands
3124 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3125 output_operand_lossage ("operand number out of range");
3127 output_operand (operands
[c
], 0);
3133 while (ISDIGIT (c
= *p
))
3136 /* % followed by punctuation: output something for that
3137 punctuation character alone, with no operand.
3138 The PRINT_OPERAND macro decides what is actually done. */
3139 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3140 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3141 output_operand (NULL_RTX
, *p
++);
3144 output_operand_lossage ("invalid %%-code");
3148 putc (c
, asm_out_file
);
3151 /* Write out the variable names for operands, if we know them. */
3152 if (flag_verbose_asm
)
3153 output_asm_operand_names (operands
, oporder
, ops
);
3154 if (flag_print_asm_name
)
3157 putc ('\n', asm_out_file
);
3160 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3163 output_asm_label (x
)
3168 if (GET_CODE (x
) == LABEL_REF
)
3170 if (GET_CODE (x
) == CODE_LABEL
3171 || (GET_CODE (x
) == NOTE
3172 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3173 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3175 output_operand_lossage ("`%%l' operand isn't a label");
3177 assemble_name (asm_out_file
, buf
);
3180 /* Print operand X using machine-dependent assembler syntax.
3181 The macro PRINT_OPERAND is defined just to control this function.
3182 CODE is a non-digit that preceded the operand-number in the % spec,
3183 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3184 between the % and the digits.
3185 When CODE is a non-letter, X is 0.
3187 The meanings of the letters are machine-dependent and controlled
3188 by PRINT_OPERAND. */
3191 output_operand (x
, code
)
3193 int code ATTRIBUTE_UNUSED
;
3195 if (x
&& GET_CODE (x
) == SUBREG
)
3196 x
= alter_subreg (&x
);
3198 /* If X is a pseudo-register, abort now rather than writing trash to the
3201 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3204 PRINT_OPERAND (asm_out_file
, x
, code
);
3207 /* Print a memory reference operand for address X
3208 using machine-dependent assembler syntax.
3209 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3215 walk_alter_subreg (&x
);
3216 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3219 /* Print an integer constant expression in assembler syntax.
3220 Addition and subtraction are the only arithmetic
3221 that may appear in these expressions. */
3224 output_addr_const (file
, x
)
3231 switch (GET_CODE (x
))
3238 #ifdef ASM_OUTPUT_SYMBOL_REF
3239 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3241 assemble_name (file
, XSTR (x
, 0));
3249 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3250 #ifdef ASM_OUTPUT_LABEL_REF
3251 ASM_OUTPUT_LABEL_REF (file
, buf
);
3253 assemble_name (file
, buf
);
3258 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3262 /* This used to output parentheses around the expression,
3263 but that does not work on the 386 (either ATT or BSD assembler). */
3264 output_addr_const (file
, XEXP (x
, 0));
3268 if (GET_MODE (x
) == VOIDmode
)
3270 /* We can use %d if the number is one word and positive. */
3271 if (CONST_DOUBLE_HIGH (x
))
3272 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3273 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3274 else if (CONST_DOUBLE_LOW (x
) < 0)
3275 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3277 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3280 /* We can't handle floating point constants;
3281 PRINT_OPERAND must handle them. */
3282 output_operand_lossage ("floating constant misused");
3286 /* Some assemblers need integer constants to appear last (eg masm). */
3287 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3289 output_addr_const (file
, XEXP (x
, 1));
3290 if (INTVAL (XEXP (x
, 0)) >= 0)
3291 fprintf (file
, "+");
3292 output_addr_const (file
, XEXP (x
, 0));
3296 output_addr_const (file
, XEXP (x
, 0));
3297 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3298 || INTVAL (XEXP (x
, 1)) >= 0)
3299 fprintf (file
, "+");
3300 output_addr_const (file
, XEXP (x
, 1));
3305 /* Avoid outputting things like x-x or x+5-x,
3306 since some assemblers can't handle that. */
3307 x
= simplify_subtraction (x
);
3308 if (GET_CODE (x
) != MINUS
)
3311 output_addr_const (file
, XEXP (x
, 0));
3312 fprintf (file
, "-");
3313 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3314 || GET_CODE (XEXP (x
, 1)) == PC
3315 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3316 output_addr_const (file
, XEXP (x
, 1));
3319 fputs (targetm
.asm_out
.open_paren
, file
);
3320 output_addr_const (file
, XEXP (x
, 1));
3321 fputs (targetm
.asm_out
.close_paren
, file
);
3328 output_addr_const (file
, XEXP (x
, 0));
3332 #ifdef OUTPUT_ADDR_CONST_EXTRA
3333 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3338 output_operand_lossage ("invalid expression as operand");
3342 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3343 %R prints the value of REGISTER_PREFIX.
3344 %L prints the value of LOCAL_LABEL_PREFIX.
3345 %U prints the value of USER_LABEL_PREFIX.
3346 %I prints the value of IMMEDIATE_PREFIX.
3347 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3348 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3350 We handle alternate assembler dialects here, just like output_asm_insn. */
3353 asm_fprintf (FILE *file
, const char *p
, ...)
3359 va_start (argptr
, p
);
3366 #ifdef ASSEMBLER_DIALECT
3371 /* If we want the first dialect, do nothing. Otherwise, skip
3372 DIALECT_NUMBER of strings ending with '|'. */
3373 for (i
= 0; i
< dialect_number
; i
++)
3375 while (*p
&& *p
++ != '|')
3385 /* Skip to close brace. */
3386 while (*p
&& *p
++ != '}')
3397 while (strchr ("-+ #0", c
))
3402 while (ISDIGIT (c
) || c
== '.')
3413 case 'd': case 'i': case 'u':
3414 case 'x': case 'X': case 'o':
3418 fprintf (file
, buf
, va_arg (argptr
, int));
3422 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3423 'o' cases, but we do not check for those cases. It
3424 means that the value is a HOST_WIDE_INT, which may be
3425 either `long' or `long long'. */
3426 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3427 q
+= strlen (HOST_WIDE_INT_PRINT
);
3430 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3435 #ifdef HAVE_LONG_LONG
3441 fprintf (file
, buf
, va_arg (argptr
, long long));
3448 fprintf (file
, buf
, va_arg (argptr
, long));
3456 fprintf (file
, buf
, va_arg (argptr
, char *));
3460 #ifdef ASM_OUTPUT_OPCODE
3461 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3466 #ifdef REGISTER_PREFIX
3467 fprintf (file
, "%s", REGISTER_PREFIX
);
3472 #ifdef IMMEDIATE_PREFIX
3473 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3478 #ifdef LOCAL_LABEL_PREFIX
3479 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3484 fputs (user_label_prefix
, file
);
3487 #ifdef ASM_FPRINTF_EXTENSIONS
3488 /* Upper case letters are reserved for general use by asm_fprintf
3489 and so are not available to target specific code. In order to
3490 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3491 they are defined here. As they get turned into real extensions
3492 to asm_fprintf they should be removed from this list. */
3493 case 'A': case 'B': case 'C': case 'D': case 'E':
3494 case 'F': case 'G': case 'H': case 'J': case 'K':
3495 case 'M': case 'N': case 'P': case 'Q': case 'S':
3496 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3499 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3512 /* Split up a CONST_DOUBLE or integer constant rtx
3513 into two rtx's for single words,
3514 storing in *FIRST the word that comes first in memory in the target
3515 and in *SECOND the other. */
3518 split_double (value
, first
, second
)
3520 rtx
*first
, *second
;
3522 if (GET_CODE (value
) == CONST_INT
)
3524 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3526 /* In this case the CONST_INT holds both target words.
3527 Extract the bits from it into two word-sized pieces.
3528 Sign extend each half to HOST_WIDE_INT. */
3529 unsigned HOST_WIDE_INT low
, high
;
3530 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3532 /* Set sign_bit to the most significant bit of a word. */
3534 sign_bit
<<= BITS_PER_WORD
- 1;
3536 /* Set mask so that all bits of the word are set. We could
3537 have used 1 << BITS_PER_WORD instead of basing the
3538 calculation on sign_bit. However, on machines where
3539 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3540 compiler warning, even though the code would never be
3542 mask
= sign_bit
<< 1;
3545 /* Set sign_extend as any remaining bits. */
3546 sign_extend
= ~mask
;
3548 /* Pick the lower word and sign-extend it. */
3549 low
= INTVAL (value
);
3554 /* Pick the higher word, shifted to the least significant
3555 bits, and sign-extend it. */
3556 high
= INTVAL (value
);
3557 high
>>= BITS_PER_WORD
- 1;
3560 if (high
& sign_bit
)
3561 high
|= sign_extend
;
3563 /* Store the words in the target machine order. */
3564 if (WORDS_BIG_ENDIAN
)
3566 *first
= GEN_INT (high
);
3567 *second
= GEN_INT (low
);
3571 *first
= GEN_INT (low
);
3572 *second
= GEN_INT (high
);
3577 /* The rule for using CONST_INT for a wider mode
3578 is that we regard the value as signed.
3579 So sign-extend it. */
3580 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3581 if (WORDS_BIG_ENDIAN
)
3593 else if (GET_CODE (value
) != CONST_DOUBLE
)
3595 if (WORDS_BIG_ENDIAN
)
3597 *first
= const0_rtx
;
3603 *second
= const0_rtx
;
3606 else if (GET_MODE (value
) == VOIDmode
3607 /* This is the old way we did CONST_DOUBLE integers. */
3608 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3610 /* In an integer, the words are defined as most and least significant.
3611 So order them by the target's convention. */
3612 if (WORDS_BIG_ENDIAN
)
3614 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3615 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3619 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3620 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3627 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3629 /* Note, this converts the REAL_VALUE_TYPE to the target's
3630 format, splits up the floating point double and outputs
3631 exactly 32 bits of it into each of l[0] and l[1] --
3632 not necessarily BITS_PER_WORD bits. */
3633 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3635 /* If 32 bits is an entire word for the target, but not for the host,
3636 then sign-extend on the host so that the number will look the same
3637 way on the host that it would on the target. See for instance
3638 simplify_unary_operation. The #if is needed to avoid compiler
3641 #if HOST_BITS_PER_LONG > 32
3642 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3644 if (l
[0] & ((long) 1 << 31))
3645 l
[0] |= ((long) (-1) << 32);
3646 if (l
[1] & ((long) 1 << 31))
3647 l
[1] |= ((long) (-1) << 32);
3651 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3652 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3656 /* Return nonzero if this function has no function calls. */
3664 if (current_function_profile
|| profile_arc_flag
)
3667 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3669 if (GET_CODE (insn
) == CALL_INSN
3670 && ! SIBLING_CALL_P (insn
))
3672 if (GET_CODE (insn
) == INSN
3673 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3674 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3675 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3678 for (link
= current_function_epilogue_delay_list
;
3680 link
= XEXP (link
, 1))
3682 insn
= XEXP (link
, 0);
3684 if (GET_CODE (insn
) == CALL_INSN
3685 && ! SIBLING_CALL_P (insn
))
3687 if (GET_CODE (insn
) == INSN
3688 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3689 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3690 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3697 /* Return 1 if branch is a forward branch.
3698 Uses insn_shuid array, so it works only in the final pass. May be used by
3699 output templates to customary add branch prediction hints.
3702 final_forward_branch_p (insn
)
3705 int insn_id
, label_id
;
3708 insn_id
= INSN_SHUID (insn
);
3709 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3710 /* We've hit some insns that does not have id information available. */
3711 if (!insn_id
|| !label_id
)
3713 return insn_id
< label_id
;
3716 /* On some machines, a function with no call insns
3717 can run faster if it doesn't create its own register window.
3718 When output, the leaf function should use only the "output"
3719 registers. Ordinarily, the function would be compiled to use
3720 the "input" registers to find its arguments; it is a candidate
3721 for leaf treatment if it uses only the "input" registers.
3722 Leaf function treatment means renumbering so the function
3723 uses the "output" registers instead. */
3725 #ifdef LEAF_REGISTERS
3727 /* Return 1 if this function uses only the registers that can be
3728 safely renumbered. */
3731 only_leaf_regs_used ()
3734 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3736 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3737 if ((regs_ever_live
[i
] || global_regs
[i
])
3738 && ! permitted_reg_in_leaf_functions
[i
])
3741 if (current_function_uses_pic_offset_table
3742 && pic_offset_table_rtx
!= 0
3743 && GET_CODE (pic_offset_table_rtx
) == REG
3744 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3750 /* Scan all instructions and renumber all registers into those
3751 available in leaf functions. */
3754 leaf_renumber_regs (first
)
3759 /* Renumber only the actual patterns.
3760 The reg-notes can contain frame pointer refs,
3761 and renumbering them could crash, and should not be needed. */
3762 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3764 leaf_renumber_regs_insn (PATTERN (insn
));
3765 for (insn
= current_function_epilogue_delay_list
;
3767 insn
= XEXP (insn
, 1))
3768 if (INSN_P (XEXP (insn
, 0)))
3769 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3772 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3773 available in leaf functions. */
3776 leaf_renumber_regs_insn (in_rtx
)
3780 const char *format_ptr
;
3785 /* Renumber all input-registers into output-registers.
3786 renumbered_regs would be 1 for an output-register;
3789 if (GET_CODE (in_rtx
) == REG
)
3793 /* Don't renumber the same reg twice. */
3797 newreg
= REGNO (in_rtx
);
3798 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3799 to reach here as part of a REG_NOTE. */
3800 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3805 newreg
= LEAF_REG_REMAP (newreg
);
3808 regs_ever_live
[REGNO (in_rtx
)] = 0;
3809 regs_ever_live
[newreg
] = 1;
3810 REGNO (in_rtx
) = newreg
;
3814 if (INSN_P (in_rtx
))
3816 /* Inside a SEQUENCE, we find insns.
3817 Renumber just the patterns of these insns,
3818 just as we do for the top-level insns. */
3819 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3823 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3825 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3826 switch (*format_ptr
++)
3829 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3833 if (NULL
!= XVEC (in_rtx
, i
))
3835 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3836 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3856 /* When -gused is used, emit debug info for only used symbols. But in
3857 addition to the standard intercepted debug_hooks there are some direct
3858 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3859 Those routines may also be called from a higher level intercepted routine. So
3860 to prevent recording data for an inner call to one of these for an intercept,
3861 we maintain a intercept nesting counter (debug_nesting). We only save the
3862 intercepted arguments if the nesting is 1. */
3863 int debug_nesting
= 0;
3865 static tree
*symbol_queue
;
3866 int symbol_queue_index
= 0;
3867 static int symbol_queue_size
= 0;
3869 /* Generate the symbols for any queued up type symbols we encountered
3870 while generating the type info for some originally used symbol.
3871 This might generate additional entries in the queue. Only when
3872 the nesting depth goes to 0 is this routine called. */
3875 debug_flush_symbol_queue ()
3879 /* Make sure that additionally queued items are not flushed
3884 for (i
= 0; i
< symbol_queue_index
; ++i
)
3886 /* If we pushed queued symbols then such symbols are must be
3887 output no matter what anyone else says. Specifically,
3888 we need to make sure dbxout_symbol() thinks the symbol was
3889 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3890 which may be set for outside reasons. */
3891 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3892 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3893 TREE_USED (symbol_queue
[i
]) = 1;
3894 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3896 #ifdef DBX_DEBUGGING_INFO
3897 dbxout_symbol (symbol_queue
[i
], 0);
3900 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3901 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3904 symbol_queue_index
= 0;
3908 /* Queue a type symbol needed as part of the definition of a decl
3909 symbol. These symbols are generated when debug_flush_symbol_queue()
3913 debug_queue_symbol (tree decl
)
3915 if (symbol_queue_index
>= symbol_queue_size
)
3917 symbol_queue_size
+= 10;
3918 symbol_queue
= (tree
*) xrealloc (symbol_queue
,
3919 symbol_queue_size
* sizeof (tree
));
3922 symbol_queue
[symbol_queue_index
++] = decl
;
3925 /* Free symbol queue */
3931 free (symbol_queue
);
3932 symbol_queue
= NULL
;
3933 symbol_queue_size
= 0;