gcc/testsuite/gcc.target/riscv/shift-shift-1.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-march=rv32gc -mabi=ilp32 -O" } */
   3
   4 /* Test for lshrsi3_zero_extend_3+1 pattern that uses p2m1_shift_operand.  */
   5 unsigned int
   6 sub1 (unsigned int i)
   7 {
   8   return (i << 1) >> 1;
   9 }
  10
  11 unsigned int
  12 sub2 (unsigned int i)
  13 {
  14   return (i << 20) >> 20;
  15 }
  16 /* { dg-final { scan-assembler-times "slli" 2 } } */
  17 /* { dg-final { scan-assembler-times "srli" 2 } } */