[AArch64] Improve scheduling model for X-Gene
[official-gcc.git] / gcc / config / arm / arm-protos.h
blob10c96390ea6cc584a5bb055096ff1aef6871507c
1 /* Prototypes for exported functions defined in arm.c and pe.c
2 Copyright (C) 1999-2017 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rearnsha@arm.com)
4 Minor hacks by Nick Clifton (nickc@cygnus.com)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #ifndef GCC_ARM_PROTOS_H
23 #define GCC_ARM_PROTOS_H
25 #include "sbitmap.h"
27 extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *);
28 extern int use_return_insn (int, rtx);
29 extern bool use_simple_return_p (void);
30 extern enum reg_class arm_regno_class (int);
31 extern void arm_load_pic_register (unsigned long);
32 extern int arm_volatile_func (void);
33 extern void arm_expand_prologue (void);
34 extern void arm_expand_epilogue (bool);
35 extern void arm_declare_function_name (FILE *, const char *, tree);
36 extern void arm_asm_declare_function_name (FILE *, const char *, tree);
37 extern void thumb2_expand_return (bool);
38 extern const char *arm_strip_name_encoding (const char *);
39 extern void arm_asm_output_labelref (FILE *, const char *);
40 extern void thumb2_asm_output_opcode (FILE *);
41 extern unsigned long arm_current_func_type (void);
42 extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
43 unsigned int);
44 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
45 unsigned int);
46 extern unsigned int arm_dbx_register_number (unsigned int);
47 extern void arm_output_fn_unwind (FILE *, bool);
49 extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget
50 ATTRIBUTE_UNUSED, machine_mode mode
51 ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED);
52 extern tree arm_builtin_decl (unsigned code, bool initialize_p
53 ATTRIBUTE_UNUSED);
54 extern void arm_init_builtins (void);
55 extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update);
56 extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
57 extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
58 bool high);
59 #ifdef RTX_CODE
60 extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
61 rtx label_ref);
62 extern bool arm_vector_mode_supported_p (machine_mode);
63 extern bool arm_small_register_classes_for_mode_p (machine_mode);
64 extern int const_ok_for_arm (HOST_WIDE_INT);
65 extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
66 extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
67 extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
68 HOST_WIDE_INT, rtx, rtx, int);
69 extern int legitimate_pic_operand_p (rtx);
70 extern rtx legitimize_pic_address (rtx, machine_mode, rtx);
71 extern rtx legitimize_tls_address (rtx, rtx);
72 extern bool arm_legitimate_address_p (machine_mode, rtx, bool);
73 extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
74 extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
75 extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
76 extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
77 bool, bool);
78 extern int arm_const_double_rtx (rtx);
79 extern int vfp3_const_double_rtx (rtx);
80 extern int neon_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
81 extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
82 int *);
83 extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
84 int *, bool);
85 extern char *neon_output_logic_immediate (const char *, rtx *,
86 machine_mode, int, int);
87 extern char *neon_output_shift_immediate (const char *, char, rtx *,
88 machine_mode, int, bool);
89 extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
90 rtx (*) (rtx, rtx, rtx));
91 extern rtx neon_make_constant (rtx);
92 extern tree arm_builtin_vectorized_function (unsigned int, tree, tree);
93 extern void neon_expand_vector_init (rtx, rtx);
94 extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
95 extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
96 extern HOST_WIDE_INT neon_element_bits (machine_mode);
97 extern void neon_emit_pair_result_insn (machine_mode,
98 rtx (*) (rtx, rtx, rtx, rtx),
99 rtx, rtx, rtx);
100 extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
101 extern void neon_split_vcombine (rtx op[3]);
102 extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx,
103 bool);
104 extern bool arm_tls_referenced_p (rtx);
106 extern int arm_coproc_mem_operand (rtx, bool);
107 extern int neon_vector_mem_operand (rtx, int, bool);
108 extern int neon_struct_mem_operand (rtx);
110 extern int tls_mentioned_p (rtx);
111 extern int symbol_mentioned_p (rtx);
112 extern int label_mentioned_p (rtx);
113 extern RTX_CODE minmax_code (rtx);
114 extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
115 extern int adjacent_mem_locations (rtx, rtx);
116 extern bool gen_ldm_seq (rtx *, int, bool);
117 extern bool gen_stm_seq (rtx *, int);
118 extern bool gen_const_stm_seq (rtx *, int);
119 extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
120 extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
121 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
122 extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
123 extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
124 extern int arm_gen_movmemqi (rtx *);
125 extern bool gen_movmem_ldrd_strd (rtx *);
126 extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
127 extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
128 HOST_WIDE_INT);
129 extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
130 extern rtx arm_gen_return_addr_mask (void);
131 extern void arm_reload_in_hi (rtx *);
132 extern void arm_reload_out_hi (rtx *);
133 extern int arm_max_const_double_inline_cost (void);
134 extern int arm_const_double_inline_cost (rtx);
135 extern bool arm_const_double_by_parts (rtx);
136 extern bool arm_const_double_by_immediates (rtx);
137 extern void arm_emit_call_insn (rtx, rtx, bool);
138 bool detect_cmse_nonsecure_call (tree);
139 extern const char *output_call (rtx *);
140 void arm_emit_movpair (rtx, rtx);
141 extern const char *output_mov_long_double_arm_from_arm (rtx *);
142 extern const char *output_move_double (rtx *, bool, int *count);
143 extern const char *output_move_quad (rtx *);
144 extern int arm_count_output_move_double_insns (rtx *);
145 extern const char *output_move_vfp (rtx *operands);
146 extern const char *output_move_neon (rtx *operands);
147 extern int arm_attr_length_move_neon (rtx_insn *);
148 extern int arm_address_offset_is_imm (rtx_insn *);
149 extern const char *output_add_immediate (rtx *);
150 extern const char *arithmetic_instr (rtx, int);
151 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
152 extern const char *output_return_instruction (rtx, bool, bool, bool);
153 extern const char *output_probe_stack_range (rtx, rtx);
154 extern void arm_poke_function_name (FILE *, const char *);
155 extern void arm_final_prescan_insn (rtx_insn *);
156 extern int arm_debugger_arg_offset (int, rtx);
157 extern bool arm_is_long_call_p (tree);
158 extern int arm_emit_vector_const (FILE *, rtx);
159 extern void arm_emit_fp16_const (rtx c);
160 extern const char * arm_output_load_gr (rtx *);
161 extern const char *vfp_output_vstmd (rtx *);
162 extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
163 extern void arm_set_return_address (rtx, rtx);
164 extern int arm_eliminable_register (rtx);
165 extern const char *arm_output_shift(rtx *, int);
166 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool);
167 extern const char *arm_output_iwmmxt_tinsr (rtx *);
168 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
169 extern int arm_attr_length_push_multi(rtx, rtx);
170 extern int arm_attr_length_pop_multi(rtx *, bool, bool);
171 extern void arm_expand_compare_and_swap (rtx op[]);
172 extern void arm_split_compare_and_swap (rtx op[]);
173 extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
174 extern rtx arm_load_tp (rtx);
175 extern bool arm_coproc_builtin_available (enum unspecv);
176 extern bool arm_coproc_ldc_stc_legitimate_address (rtx);
178 #if defined TREE_CODE
179 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
180 extern bool arm_pad_reg_upward (machine_mode, tree, int);
181 #endif
182 extern int arm_apply_result_size (void);
184 #endif /* RTX_CODE */
186 /* Thumb functions. */
187 extern void arm_init_expanders (void);
188 extern const char *thumb1_unexpanded_epilogue (void);
189 extern void thumb1_expand_prologue (void);
190 extern void thumb1_expand_epilogue (void);
191 extern const char *thumb1_output_interwork (void);
192 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
193 #ifdef RTX_CODE
194 extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
195 extern void thumb1_final_prescan_insn (rtx_insn *);
196 extern void thumb2_final_prescan_insn (rtx_insn *);
197 extern const char *thumb_load_double_from_address (rtx *);
198 extern const char *thumb_output_move_mem_multiple (int, rtx *);
199 extern const char *thumb_call_via_reg (rtx);
200 extern void thumb_expand_movmemqi (rtx *);
201 extern rtx arm_return_addr (int, rtx);
202 extern void thumb_reload_out_hi (rtx *);
203 extern void thumb_set_return_address (rtx, rtx);
204 extern const char *thumb1_output_casesi (rtx *);
205 extern const char *thumb2_output_casesi (rtx *);
206 #endif
208 /* Defined in pe.c. */
209 extern int arm_dllexport_name_p (const char *);
210 extern int arm_dllimport_name_p (const char *);
212 #ifdef TREE_CODE
213 extern void arm_pe_unique_section (tree, int);
214 extern void arm_pe_encode_section_info (tree, rtx, int);
215 extern int arm_dllexport_p (tree);
216 extern int arm_dllimport_p (tree);
217 extern void arm_mark_dllexport (tree);
218 extern void arm_mark_dllimport (tree);
219 extern bool arm_change_mode_p (tree);
220 #endif
222 extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
223 struct gcc_options *);
224 extern void arm_configure_build_target (struct arm_build_target *,
225 struct cl_target_option *,
226 struct gcc_options *, bool);
227 extern void arm_option_reconfigure_globals (void);
228 extern void arm_options_perform_arch_sanity_checks (void);
229 extern void arm_pr_long_calls (struct cpp_reader *);
230 extern void arm_pr_no_long_calls (struct cpp_reader *);
231 extern void arm_pr_long_calls_off (struct cpp_reader *);
233 extern const char *arm_mangle_type (const_tree);
234 extern const char *arm_mangle_builtin_type (const_tree);
236 extern void arm_order_regs_for_local_alloc (void);
238 extern int arm_max_conditional_execute ();
240 /* Vectorizer cost model implementation. */
241 struct cpu_vec_costs {
242 const int scalar_stmt_cost; /* Cost of any scalar operation, excluding
243 load and store. */
244 const int scalar_load_cost; /* Cost of scalar load. */
245 const int scalar_store_cost; /* Cost of scalar store. */
246 const int vec_stmt_cost; /* Cost of any vector operation, excluding
247 load, store, vector-to-scalar and
248 scalar-to-vector operation. */
249 const int vec_to_scalar_cost; /* Cost of vect-to-scalar operation. */
250 const int scalar_to_vec_cost; /* Cost of scalar-to-vector operation. */
251 const int vec_align_load_cost; /* Cost of aligned vector load. */
252 const int vec_unalign_load_cost; /* Cost of unaligned vector load. */
253 const int vec_unalign_store_cost; /* Cost of unaligned vector load. */
254 const int vec_store_cost; /* Cost of vector store. */
255 const int cond_taken_branch_cost; /* Cost of taken branch for vectorizer
256 cost model. */
257 const int cond_not_taken_branch_cost;/* Cost of not taken branch for
258 vectorizer cost model. */
261 #ifdef RTX_CODE
262 /* This needs to be here because we need RTX_CODE and similar. */
264 struct cpu_cost_table;
266 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
267 structure is modified. */
269 struct tune_params
271 const struct cpu_cost_table *insn_extra_cost;
272 bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
273 int (*branch_cost) (bool, bool);
274 /* Vectorizer costs. */
275 const struct cpu_vec_costs* vec_costs;
276 int constant_limit;
277 /* Maximum number of instructions to conditionalise. */
278 int max_insns_skipped;
279 /* Maximum number of instructions to inline calls to memset. */
280 int max_insns_inline_memset;
281 /* Issue rate of the processor. */
282 unsigned int issue_rate;
283 /* Explicit prefetch data. */
284 struct
286 int num_slots;
287 int l1_cache_size;
288 int l1_cache_line_size;
289 } prefetch;
290 enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
291 prefer_constant_pool: 1;
292 /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM. */
293 enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
294 /* The preference for non short cirtcuit operation when optimizing for
295 performance. The first element covers Thumb state and the second one
296 is for ARM state. */
297 enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
298 LOG_OP_NON_SHORT_CIRCUIT_TRUE};
299 log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
300 log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
301 /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding. */
302 enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
303 disparage_flag_setting_t16_encodings: 2;
304 enum {PREF_NEON_64_FALSE, PREF_NEON_64_TRUE} prefer_neon_for_64bits: 1;
305 /* Prefer to inline string operations like memset by using Neon. */
306 enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
307 string_ops_prefer_neon: 1;
308 /* Bitfield encoding the fusible pairs of instructions. Use FUSE_OPS
309 in an initializer if multiple fusion operations are supported on a
310 target. */
311 enum fuse_ops
313 FUSE_NOTHING = 0,
314 FUSE_MOVW_MOVT = 1 << 0,
315 FUSE_AES_AESMC = 1 << 1
316 } fusible_ops: 2;
317 /* Depth of scheduling queue to check for L2 autoprefetcher. */
318 enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
319 sched_autopref: 2;
322 /* Smash multiple fusion operations into a type that can be used for an
323 initializer. */
324 #define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
326 extern const struct tune_params *current_tune;
327 extern int vfp3_const_double_for_fract_bits (rtx);
328 /* return power of two from operand, otherwise 0. */
329 extern int vfp3_const_double_for_bits (rtx);
331 extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
332 rtx);
333 extern bool arm_fusion_enabled_p (tune_params::fuse_ops);
334 extern bool arm_valid_symbolic_address_p (rtx);
335 extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
336 #endif /* RTX_CODE */
338 extern bool arm_gen_setmem (rtx *);
339 extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
340 extern bool arm_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel);
342 extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
344 extern void arm_emit_eabi_attribute (const char *, int, int);
346 extern void arm_reset_previous_fndecl (void);
347 extern void save_restore_target_globals (tree);
349 /* Defined in gcc/common/config/arm-common.c. */
350 extern const char *arm_rewrite_selected_cpu (const char *name);
352 /* Defined in gcc/common/config/arm-c.c. */
353 extern void arm_lang_object_attributes_init (void);
354 extern void arm_register_target_pragmas (void);
355 extern void arm_cpu_cpp_builtins (struct cpp_reader *);
357 extern bool arm_is_constant_pool_ref (rtx);
359 /* The bits in this mask specify which instruction scheduling options should
360 be used. */
361 extern unsigned int tune_flags;
363 /* Nonzero if this chip supports the ARM Architecture 3M extensions. */
364 extern int arm_arch3m;
366 /* Nonzero if this chip supports the ARM Architecture 4 extensions. */
367 extern int arm_arch4;
369 /* Nonzero if this chip supports the ARM Architecture 4t extensions. */
370 extern int arm_arch4t;
372 /* Nonzero if this chip supports the ARM Architecture 5 extensions. */
373 extern int arm_arch5;
375 /* Nonzero if this chip supports the ARM Architecture 5E extensions. */
376 extern int arm_arch5e;
378 /* Nonzero if this chip supports the ARM Architecture 6 extensions. */
379 extern int arm_arch6;
381 /* Nonzero if this chip supports the ARM 6K extensions. */
382 extern int arm_arch6k;
384 /* Nonzero if this chip supports the ARM 6KZ extensions. */
385 extern int arm_arch6kz;
387 /* Nonzero if instructions present in ARMv6-M can be used. */
388 extern int arm_arch6m;
390 /* Nonzero if this chip supports the ARM 7 extensions. */
391 extern int arm_arch7;
393 /* Nonzero if this chip supports the Large Physical Address Extension. */
394 extern int arm_arch_lpae;
396 /* Nonzero if instructions not present in the 'M' profile can be used. */
397 extern int arm_arch_notm;
399 /* Nonzero if instructions present in ARMv7E-M can be used. */
400 extern int arm_arch7em;
402 /* Nonzero if instructions present in ARMv8 can be used. */
403 extern int arm_arch8;
405 /* Nonzero if this chip can benefit from load scheduling. */
406 extern int arm_ld_sched;
408 /* Nonzero if this chip is a StrongARM. */
409 extern int arm_tune_strongarm;
411 /* Nonzero if this chip supports Intel Wireless MMX technology. */
412 extern int arm_arch_iwmmxt;
414 /* Nonzero if this chip supports Intel Wireless MMX2 technology. */
415 extern int arm_arch_iwmmxt2;
417 /* Nonzero if this chip is an XScale. */
418 extern int arm_arch_xscale;
420 /* Nonzero if tuning for XScale */
421 extern int arm_tune_xscale;
423 /* Nonzero if we want to tune for stores that access the write-buffer.
424 This typically means an ARM6 or ARM7 with MMU or MPU. */
425 extern int arm_tune_wbuf;
427 /* Nonzero if tuning for Cortex-A9. */
428 extern int arm_tune_cortex_a9;
430 /* Nonzero if we should define __THUMB_INTERWORK__ in the
431 preprocessor.
432 XXX This is a bit of a hack, it's intended to help work around
433 problems in GLD which doesn't understand that armv5t code is
434 interworking clean. */
435 extern int arm_cpp_interwork;
437 /* Nonzero if chip supports Thumb 1. */
438 extern int arm_arch_thumb1;
440 /* Nonzero if chip supports Thumb 2. */
441 extern int arm_arch_thumb2;
443 /* Nonzero if chip supports integer division instruction. */
444 extern int arm_arch_arm_hwdiv;
445 extern int arm_arch_thumb_hwdiv;
447 /* Nonzero if chip disallows volatile memory access in IT block. */
448 extern int arm_arch_no_volatile_ce;
450 /* Nonzero if we should use Neon to handle 64-bits operations rather
451 than core registers. */
452 extern int prefer_neon_for_64bits;
454 /* Structure defining the current overall architectural target and tuning. */
455 struct arm_build_target
457 /* Name of the target CPU, if known, or NULL if the target CPU was not
458 specified by the user (and inferred from the -march option). */
459 const char *core_name;
460 /* Name of the target ARCH. NULL if there is a selected CPU. */
461 const char *arch_name;
462 /* Preprocessor substring (never NULL). */
463 const char *arch_pp_name;
464 /* The base architecture value. */
465 enum base_architecture base_arch;
466 /* The profile letter for the architecture, upper case by convention. */
467 char profile;
468 /* Bitmap encapsulating the isa_bits for the target environment. */
469 sbitmap isa;
470 /* Flags used for tuning. Long term, these move into tune_params. */
471 unsigned int tune_flags;
472 /* Tables with more detailed tuning information. */
473 const struct tune_params *tune;
474 /* CPU identifier for the tuning target. */
475 enum processor_type tune_core;
478 extern struct arm_build_target arm_active_target;
480 struct cpu_arch_extension
482 /* Feature name. */
483 const char *const name;
484 /* True if the option is negative (removes extensions). */
485 bool remove;
486 /* True if the option is an alias for another option with identical effect;
487 the option will be ignored for canonicalization. */
488 bool alias;
489 /* The modifier bits. */
490 const enum isa_feature isa_bits[isa_num_bits];
493 struct cpu_arch_option
495 /* Name for this option. */
496 const char *name;
497 /* List of feature extensions permitted. */
498 const struct cpu_arch_extension *extensions;
499 /* Standard feature bits. */
500 enum isa_feature isa_bits[isa_num_bits];
503 struct arch_option
505 /* Common option fields. */
506 cpu_arch_option common;
507 /* Short string for this architecture. */
508 const char *arch;
509 /* Base architecture, from which this specific architecture is derived. */
510 enum base_architecture base_arch;
511 /* The profile letter for the architecture, upper case by convention. */
512 const char profile;
513 /* Default tune target (in the absence of any more specific data). */
514 enum processor_type tune_id;
517 struct cpu_option
519 /* Common option fields. */
520 cpu_arch_option common;
521 /* Architecture upon which this CPU is based. */
522 enum arch_type arch;
525 extern const arch_option all_architectures[];
526 extern const cpu_option all_cores[];
528 const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *,
529 const char *);
530 const arch_option *arm_parse_arch_option_name (const arch_option *,
531 const char *, const char *);
532 void arm_parse_option_features (sbitmap, const cpu_arch_option *,
533 const char *);
535 void arm_initialize_isa (sbitmap, const enum isa_feature *);
537 #endif /* ! GCC_ARM_PROTOS_H */