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[official-gcc.git] / gcc / config / rx / rx.h
blob7da4de1d6eae2ce4d1a40203f75f4653b7267710
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 builtin_assert ("machine=RX610"); \
29 else \
30 builtin_assert ("machine=RX600"); \
31 \
32 if (TARGET_BIG_ENDIAN_DATA) \
33 builtin_define ("__RX_BIG_ENDIAN__"); \
34 else \
35 builtin_define ("__RX_LITTLE_ENDIAN__");\
36 \
37 if (TARGET_64BIT_DOUBLES) \
38 builtin_define ("__RX_64BIT_DOUBLES__");\
39 else \
40 builtin_define ("__RX_32BIT_DOUBLES__");\
41 \
42 if (ALLOW_RX_FPU_INSNS) \
43 builtin_define ("__RX_FPU_INSNS__"); \
44 \
45 if (TARGET_AS100_SYNTAX) \
46 builtin_define ("__RX_AS100_SYNTAX__"); \
47 else \
48 builtin_define ("__RX_GAS_SYNTAX__"); \
49 } \
50 while (0)
51
52 enum rx_cpu_types
53 {
54 RX600,
55 RX610,
56 RX200
57 };
58
59 extern enum rx_cpu_types rx_cpu_type;
60
61 #undef CC1_SPEC
62 #define CC1_SPEC "\
63 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
64 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
65
66 #undef STARTFILE_SPEC
67 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
68
69 #undef ENDFILE_SPEC
70 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
71
72 #undef ASM_SPEC
73 #define ASM_SPEC "\
74 %{mbig-endian-data:-mbig-endian-data} \
75 %{m64bit-doubles:-m64bit-doubles} \
76 %{!m64bit-doubles:-m32bit-doubles} \
77 %{msmall-data-limit*:-msmall-data-limit} \
78 %{mrelax:-relax} \
79 "
80
81 #undef LIB_SPEC
82 #define LIB_SPEC " \
83 --start-group \
84 -lc \
85 %{msim*:-lsim}%{!msim*:-lnosys} \
86 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
87 --end-group \
88 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
89 "
90
91 #undef LINK_SPEC
92 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
93 \f
94
95 #define BITS_BIG_ENDIAN 0
96 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
97 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
98
99 #ifdef __RX_BIG_ENDIAN__
100 #define LIBGCC2_WORDS_BIG_ENDIAN 1
101 #else
102 #define LIBGCC2_WORDS_BIG_ENDIAN 0
103 #endif
104
105 #define UNITS_PER_WORD 4
106
107 #define INT_TYPE_SIZE 32
108 #define LONG_TYPE_SIZE 32
109 #define LONG_LONG_TYPE_SIZE 64
110
111 #define FLOAT_TYPE_SIZE 32
112 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
113 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
114
115 #ifdef __RX_32BIT_DOUBLES__
116 #define LIBGCC2_HAS_DF_MODE 0
117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
118 #else
119 #define LIBGCC2_HAS_DF_MODE 1
120 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
121 #endif
122
123 #define DEFAULT_SIGNED_CHAR 0
124
125 #define STRICT_ALIGNMENT 1
126 #define FUNCTION_BOUNDARY 8
127 #define BIGGEST_ALIGNMENT 32
128 #define STACK_BOUNDARY 32
129 #define PARM_BOUNDARY 8
130
131 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32
132
133 #define STACK_GROWS_DOWNWARD 1
134 #define FRAME_GROWS_DOWNWARD 0
135 #define FIRST_PARM_OFFSET(FNDECL) 0
136
137 #define MAX_REGS_PER_ADDRESS 2
138
139 #define Pmode SImode
140 #define POINTER_SIZE 32
141 #undef SIZE_TYPE
142 #define SIZE_TYPE "long unsigned int"
143 #undef PTRDIFF_TYPE
144 #define PTRDIFF_TYPE "long int"
145 #define POINTERS_EXTEND_UNSIGNED 1
146 #define FUNCTION_MODE QImode
147 #define CASE_VECTOR_MODE Pmode
148 #define WORD_REGISTER_OPERATIONS 1
149 #define HAS_LONG_COND_BRANCH 0
150 #define HAS_LONG_UNCOND_BRANCH 0
151
152 #define MOVE_MAX 4
153 #define STARTING_FRAME_OFFSET 0
154
155 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
156
157 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
158
159 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
160
161 #define HAVE_PRE_DECCREMENT 1
162 #define HAVE_POST_INCREMENT 1
163
164 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
165 #define SLOW_BYTE_ACCESS 1
166
167 #define STORE_FLAG_VALUE 1
168 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
169 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
170 \f
171 enum reg_class
172 {
173 NO_REGS, /* No registers in set. */
174 GR_REGS, /* Integer registers. */
175 ALL_REGS, /* All registers. */
176 LIM_REG_CLASSES /* Max value + 1. */
177 };
178
179 #define REG_CLASS_NAMES \
180 { \
181 "NO_REGS", \
182 "GR_REGS", \
183 "ALL_REGS" \
184 }
185
186 #define REG_CLASS_CONTENTS \
187 { \
188 { 0x00000000 }, /* No registers, */ \
189 { 0x0000ffff }, /* Integer registers. */ \
190 { 0x0000ffff } /* All registers. */ \
191 }
192
193 #define IRA_COVER_CLASSES \
194 { \
195 GR_REGS, LIM_REG_CLASSES \
196 }
197
198 #define SMALL_REGISTER_CLASSES 0
199 #define N_REG_CLASSES (int) LIM_REG_CLASSES
200 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
201 + UNITS_PER_WORD - 1) \
202 / UNITS_PER_WORD)
203
204 #define GENERAL_REGS GR_REGS
205 #define BASE_REG_CLASS GR_REGS
206 #define INDEX_REG_CLASS GR_REGS
207
208 #define FIRST_PSEUDO_REGISTER 17
209
210 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
211 ? GR_REGS : NO_REGS)
212
213 #define STACK_POINTER_REGNUM 0
214 #define FUNC_RETURN_REGNUM 1
215 #define FRAME_POINTER_REGNUM 6
216 #define ARG_POINTER_REGNUM 7
217 #define STATIC_CHAIN_REGNUM 8
218 #define TRAMPOLINE_TEMP_REGNUM 9
219 #define STRUCT_VAL_REGNUM 15
220 #define CC_REGNUM 16
221
222 /* This is the register which is used to hold the address of the start
223 of the small data area, if that feature is being used. Note - this
224 register must not be call_used because otherwise library functions
225 that are compiled without small data support might clobber it.
226
227 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
228 built in copy of this register's name, rather than constructing the
229 name from this #define. */
230 #define GP_BASE_REGNUM 13
231
232 #define ELIMINABLE_REGS \
233 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
234 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
235 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
236
237 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
238 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
239
240
241 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
242 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
243 #define DEFAULT_PCC_STRUCT_RETURN 0
244
245 #define FIXED_REGISTERS \
246 { \
247 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
248 }
249
250 #define CALL_USED_REGISTERS \
251 { \
252 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
253 }
254
255 #define CONDITIONAL_REGISTER_USAGE \
256 rx_conditional_register_usage ()
257
258 #define LIBCALL_VALUE(MODE) \
259 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
260 || GET_MODE_SIZE (MODE) >= 4) \
261 ? (MODE) \
262 : SImode), \
263 FUNC_RETURN_REGNUM)
264
265 /* Order of allocation of registers. */
266
267 #define REG_ALLOC_ORDER \
268 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
269 }
270
271 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
272
273 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
274 (IN_RANGE ((REGNO), (MIN), (MAX)) \
275 || (reg_renumber != NULL \
276 && reg_renumber[(REGNO)] >= (MIN) \
277 && reg_renumber[(REGNO)] <= (MAX)))
278
279 #ifdef REG_OK_STRICT
280 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
281 #else
282 #define REGNO_OK_FOR_BASE_P(regno) 1
283 #endif
284
285 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
286
287 #define RTX_OK_FOR_BASE(X, STRICT) \
288 ((STRICT) ? \
289 ( (REG_P (X) \
290 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
291 || (GET_CODE (X) == SUBREG \
292 && REG_P (SUBREG_REG (X)) \
293 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
294 : \
295 ( (REG_P (X) \
296 || (GET_CODE (X) == SUBREG \
297 && REG_P (SUBREG_REG (X))))))
298
299 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
300 do \
301 { \
302 if (rx_is_mode_dependent_addr (ADDR)) \
303 goto LABEL; \
304 } \
305 while (0)
306 \f
307
308 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
309 ((COUNT) == 0 \
310 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
311 : NULL_RTX)
312
313 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
314
315 #define ACCUMULATE_OUTGOING_ARGS 1
316
317 typedef unsigned int CUMULATIVE_ARGS;
318
319 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
320 (CUM) = 0
321
322 \f
323 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
324 #define TRAMPOLINE_ALIGNMENT 32
325 \f
326 #define NO_PROFILE_COUNTERS 1
327 #define PROFILE_BEFORE_PROLOGUE 1
328
329 #define FUNCTION_PROFILER(FILE, LABELNO) \
330 fprintf (FILE, "\tbsr\t__mcount\n");
331 \f
332
333 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
334
335 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
336 REGNO_REG_CLASS (REGNO) == GR_REGS
337
338 #define MODES_TIEABLE_P(MODE1, MODE2) \
339 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
340 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
341 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
342 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
343 \f
344
345 #define REGISTER_NAMES \
346 { \
347 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
348 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
349 };
350
351 #define ADDITIONAL_REGISTER_NAMES \
352 { \
353 { "sp", STACK_POINTER_REGNUM } \
354 , { "fp", FRAME_POINTER_REGNUM } \
355 , { "arg", ARG_POINTER_REGNUM } \
356 , { "chain", STATIC_CHAIN_REGNUM } \
357 }
358
359 #define DATA_SECTION_ASM_OP \
360 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
361 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
362
363 #define SDATA_SECTION_ASM_OP \
364 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
365 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
366
367 #undef READONLY_DATA_SECTION_ASM_OP
368 #define READONLY_DATA_SECTION_ASM_OP \
369 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
370 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
371
372 #define BSS_SECTION_ASM_OP \
373 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
374 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
375
376 #define SBSS_SECTION_ASM_OP \
377 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
378 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
379
380 /* The following definitions are conditional depending upon whether the
381 compiler is being built or crtstuff.c is being compiled by the built
382 compiler. */
383 #if defined CRT_BEGIN || defined CRT_END
384 # ifdef __RX_AS100_SYNTAX
385 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
386 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
387 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
388 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
389 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
390 # else
391 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
392 # define CTORS_SECTION_ASM_OP \
393 "\t.section\t.init_array,\"aw\",@init_array"
394 # define DTORS_SECTION_ASM_OP \
395 "\t.section\t.fini_array,\"aw\",@fini_array"
396 # define INIT_ARRAY_SECTION_ASM_OP \
397 "\t.section\t.init_array,\"aw\",@init_array"
398 # define FINI_ARRAY_SECTION_ASM_OP \
399 "\t.section\t.fini_array,\"aw\",@fini_array"
400 # endif
401 #else
402 # define TEXT_SECTION_ASM_OP \
403 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
404
405 # define CTORS_SECTION_ASM_OP \
406 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
407 : "\t.section\t.init_array,\"aw\",@init_array")
408
409 # define DTORS_SECTION_ASM_OP \
410 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
411 : "\t.section\t.fini_array,\"aw\",@fini_array")
412
413 # define INIT_ARRAY_SECTION_ASM_OP \
414 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
415 : "\t.section\t.init_array,\"aw\",@init_array")
416
417 # define FINI_ARRAY_SECTION_ASM_OP \
418 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
419 : "\t.section\t.fini_array,\"aw\",@fini_array")
420 #endif
421
422 #define GLOBAL_ASM_OP \
423 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
424 #define ASM_COMMENT_START " ;"
425 #define ASM_APP_ON ""
426 #define ASM_APP_OFF ""
427 #define LOCAL_LABEL_PREFIX "L"
428 #undef USER_LABEL_PREFIX
429 #define USER_LABEL_PREFIX "_"
430
431 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
432 do \
433 { \
434 if ((LOG) == 0) \
435 break; \
436 if (TARGET_AS100_SYNTAX) \
437 { \
438 if ((LOG) >= 2) \
439 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
440 else \
441 fprintf (STREAM, "\t.ALIGN 2\n"); \
442 } \
443 else \
444 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
445 } \
446 while (0)
447
448 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
449 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
450 VALUE)
451
452 /* This is how to output an element of a case-vector that is relative.
453 Note: The local label referenced by the "3b" below is emitted by
454 the tablejump insn. */
455
456 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
457 fprintf (FILE, TARGET_AS100_SYNTAX \
458 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
459
460 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
461 do \
462 { \
463 HOST_WIDE_INT size_ = (SIZE); \
464 \
465 /* The as100 assembler does not have an equivalent of the SVR4 \
466 .size pseudo-op. */ \
467 if (TARGET_AS100_SYNTAX) \
468 break; \
469 \
470 fputs (SIZE_ASM_OP, STREAM); \
471 assemble_name (STREAM, NAME); \
472 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
473 } \
474 while (0)
475
476 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
477 do \
478 { \
479 /* The as100 assembler does not have an equivalent of the SVR4 \
480 .size pseudo-op. */ \
481 if (TARGET_AS100_SYNTAX) \
482 break; \
483 fputs (SIZE_ASM_OP, STREAM); \
484 assemble_name (STREAM, NAME); \
485 fputs (", .-", STREAM); \
486 assemble_name (STREAM, NAME); \
487 putc ('\n', STREAM); \
488 } \
489 while (0)
490
491 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
492 do \
493 { \
494 /* The as100 assembler does not have an equivalent of the SVR4 \
495 .size pseudo-op. */ \
496 if (TARGET_AS100_SYNTAX) \
497 break; \
498 fputs (TYPE_ASM_OP, STREAM); \
499 assemble_name (STREAM, NAME); \
500 fputs (", ", STREAM); \
501 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
502 putc ('\n', STREAM); \
503 } \
504 while (0)
505
506 #undef ASM_GENERATE_INTERNAL_LABEL
507 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
508 do \
509 { \
510 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
511 PREFIX, (unsigned) (NUM)); \
512 } \
513 while (0)
514
515 #undef ASM_OUTPUT_EXTERNAL
516 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
517 do \
518 { \
519 if (TARGET_AS100_SYNTAX) \
520 targetm.asm_out.globalize_label (FILE, NAME); \
521 default_elf_asm_output_external (FILE, DECL, NAME); \
522 } \
523 while (0)
524
525 #undef ASM_OUTPUT_ALIGNED_COMMON
526 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
527 do \
528 { \
529 if (TARGET_AS100_SYNTAX) \
530 { \
531 fprintf ((FILE), "\t.GLB\t"); \
532 assemble_name ((FILE), (NAME)); \
533 fprintf ((FILE), "\n"); \
534 assemble_name ((FILE), (NAME)); \
535 switch ((ALIGN) / BITS_PER_UNIT) \
536 { \
537 case 4: \
538 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
539 (SIZE) / 4); \
540 break; \
541 case 2: \
542 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
543 (SIZE) / 2); \
544 break; \
545 default: \
546 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
547 (SIZE)); \
548 break; \
549 } \
550 } \
551 else \
552 { \
553 fprintf ((FILE), "%s", COMMON_ASM_OP); \
554 assemble_name ((FILE), (NAME)); \
555 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
556 (SIZE), (ALIGN) / BITS_PER_UNIT); \
557 } \
558 } \
559 while (0)
560
561 #undef SKIP_ASM_OP
562 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
563
564 #undef ASM_OUTPUT_LIMITED_STRING
565 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
566 do \
567 { \
568 const unsigned char *_limited_str = \
569 (const unsigned char *) (STR); \
570 unsigned ch; \
571 \
572 fprintf ((FILE), TARGET_AS100_SYNTAX \
573 ? "\t.BYTE\t\"" : "\t.string\t\""); \
574 \
575 for (; (ch = *_limited_str); _limited_str++) \
576 { \
577 int escape; \
578 \
579 switch (escape = ESCAPES[ch]) \
580 { \
581 case 0: \
582 putc (ch, (FILE)); \
583 break; \
584 case 1: \
585 fprintf ((FILE), "\\%03o", ch); \
586 break; \
587 default: \
588 putc ('\\', (FILE)); \
589 putc (escape, (FILE)); \
590 break; \
591 } \
592 } \
593 \
594 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
595 } \
596 while (0)
597
598 #undef IDENT_ASM_OP
599 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
600 ? "\t.END\t; Built by: ": "\t.ident\t")
601
602 /* For PIC put jump tables into the text section so that the offsets that
603 they contain are always computed between two same-section symbols. */
604 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
605 \f
606 extern int rx_float_compare_mode;
607 \f
608 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
609 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
610
611 /* Like REG_P except that this macro is true for SET expressions. */
612 #define SET_P(rtl) (GET_CODE (rtl) == SET)
613 \f
614 #define CAN_DEBUG_WITHOUT_FP 1
615
616 /* The AS100 assembler does not support .leb128 and .uleb128, but
617 the compiler-build-time configure tests will have enabled their
618 use because GAS supports them. So default to generating STABS
619 debug information instead of DWARF2 when generating AS100
620 compatible output. */
621 #undef PREFERRED_DEBUGGING_TYPE
622 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
623 ? DBX_DEBUG : DWARF2_DEBUG)
624
625 #define INCOMING_FRAME_SP_OFFSET 4
626 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
627 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
628 \f
629 /* Translate -nofpu into -mnofpu so that it gets passed from gcc to cc1. */
630 #define TARGET_OPTION_TRANSLATE_TABLE \
631 {"-nofpu", "-mnofpu" }
632
633 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
634
635 /* This macro is used to decide when RX FPU instructions can be used. */
636 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
637
638 #define BRANCH_COST(SPEED,PREDICT) 1
639 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
640
641 #define SELECT_CC_MODE(OP,X,Y) \
642 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_ZSmode : \
643 (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS ? CC_ZSCmode : \
644 (GET_CODE (X) == ABS ? CC_ZSOmode : \
645 (GET_CODE (X) == AND || GET_CODE (X) == NOT || GET_CODE (X) == IOR \
646 || GET_CODE (X) == XOR || GET_CODE (X) == ROTATE \
647 || GET_CODE (X) == ROTATERT || GET_CODE (X) == ASHIFTRT \
648 || GET_CODE (X) == LSHIFTRT || GET_CODE (X) == ASHIFT ? CC_ZSmode : \
649 CCmode))))
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