New testcase
[official-gcc.git] / gcc / resource.c
blob4faaedf9a81f928bc6b8e084001fa25ef890bb43
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 #include "config.h"
22 #include "system.h"
23 #include "toplev.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "except.h"
34 #include "insn-attr.h"
36 /* This structure is used to record liveness information at the targets or
37 fallthrough insns of branches. We will most likely need the information
38 at targets again, so save them in a hash table rather than recomputing them
39 each time. */
41 struct target_info
43 int uid; /* INSN_UID of target. */
44 struct target_info *next; /* Next info for same hash bucket. */
45 HARD_REG_SET live_regs; /* Registers live at target. */
46 int block; /* Basic block number containing target. */
47 int bb_tick; /* Generation count of basic block info. */
50 #define TARGET_HASH_PRIME 257
52 /* Indicates what resources are required at the beginning of the epilogue. */
53 static struct resources start_of_epilogue_needs;
55 /* Indicates what resources are required at function end. */
56 static struct resources end_of_function_needs;
58 /* Define the hash table itself. */
59 static struct target_info **target_hash_table = NULL;
61 /* For each basic block, we maintain a generation number of its basic
62 block info, which is updated each time we move an insn from the
63 target of a jump. This is the generation number indexed by block
64 number. */
66 static int *bb_ticks;
68 /* Marks registers possibly live at the current place being scanned by
69 mark_target_live_regs. Used only by next two function. */
71 static HARD_REG_SET current_live_regs;
73 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
74 Also only used by the next two functions. */
76 static HARD_REG_SET pending_dead_regs;
78 static void update_live_status PARAMS ((rtx, rtx, void *));
79 static int find_basic_block PARAMS ((rtx));
80 static rtx next_insn_no_annul PARAMS ((rtx));
81 static rtx find_dead_or_set_registers PARAMS ((rtx, struct resources*,
82 rtx*, int, struct resources,
83 struct resources));
85 /* Utility function called from mark_target_live_regs via note_stores.
86 It deadens any CLOBBERed registers and livens any SET registers. */
88 static void
89 update_live_status (dest, x, data)
90 rtx dest;
91 rtx x;
92 void *data ATTRIBUTE_UNUSED;
94 int first_regno, last_regno;
95 int i;
97 if (GET_CODE (dest) != REG
98 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
99 return;
101 if (GET_CODE (dest) == SUBREG)
102 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
103 else
104 first_regno = REGNO (dest);
106 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
108 if (GET_CODE (x) == CLOBBER)
109 for (i = first_regno; i < last_regno; i++)
110 CLEAR_HARD_REG_BIT (current_live_regs, i);
111 else
112 for (i = first_regno; i < last_regno; i++)
114 SET_HARD_REG_BIT (current_live_regs, i);
115 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
118 /* Find the number of the basic block that starts closest to INSN. Return -1
119 if we couldn't find such a basic block. */
121 static int
122 find_basic_block (insn)
123 rtx insn;
125 int i;
127 /* Scan backwards to the previous BARRIER. Then see if we can find a
128 label that starts a basic block. Return the basic block number. */
130 for (insn = prev_nonnote_insn (insn);
131 insn && GET_CODE (insn) != BARRIER;
132 insn = prev_nonnote_insn (insn))
135 /* The start of the function is basic block zero. */
136 if (insn == 0)
137 return 0;
139 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
140 anything other than a CODE_LABEL or note, we can't find this code. */
141 for (insn = next_nonnote_insn (insn);
142 insn && GET_CODE (insn) == CODE_LABEL;
143 insn = next_nonnote_insn (insn))
145 for (i = 0; i < n_basic_blocks; i++)
146 if (insn == BLOCK_HEAD (i))
147 return i;
150 return -1;
153 /* Similar to next_insn, but ignores insns in the delay slots of
154 an annulled branch. */
156 static rtx
157 next_insn_no_annul (insn)
158 rtx insn;
160 if (insn)
162 /* If INSN is an annulled branch, skip any insns from the target
163 of the branch. */
164 if (INSN_ANNULLED_BRANCH_P (insn)
165 && NEXT_INSN (PREV_INSN (insn)) != insn)
166 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
167 insn = NEXT_INSN (insn);
169 insn = NEXT_INSN (insn);
170 if (insn && GET_CODE (insn) == INSN
171 && GET_CODE (PATTERN (insn)) == SEQUENCE)
172 insn = XVECEXP (PATTERN (insn), 0, 0);
175 return insn;
178 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
179 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
180 is TRUE, resources used by the called routine will be included for
181 CALL_INSNs. */
183 void
184 mark_referenced_resources (x, res, include_delayed_effects)
185 register rtx x;
186 register struct resources *res;
187 register int include_delayed_effects;
189 enum rtx_code code = GET_CODE (x);
190 int i, j;
191 unsigned int r;
192 register const char *format_ptr;
194 /* Handle leaf items for which we set resource flags. Also, special-case
195 CALL, SET and CLOBBER operators. */
196 switch (code)
198 case CONST:
199 case CONST_INT:
200 case CONST_DOUBLE:
201 case PC:
202 case SYMBOL_REF:
203 case LABEL_REF:
204 return;
206 case SUBREG:
207 if (GET_CODE (SUBREG_REG (x)) != REG)
208 mark_referenced_resources (SUBREG_REG (x), res, 0);
209 else
211 unsigned int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
212 unsigned int last_regno
213 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
215 for (r = regno; r < last_regno; r++)
216 SET_HARD_REG_BIT (res->regs, r);
218 return;
220 case REG:
221 for (r = 0; r < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); r++)
222 SET_HARD_REG_BIT (res->regs, REGNO (x) + r);
223 return;
225 case MEM:
226 /* If this memory shouldn't change, it really isn't referencing
227 memory. */
228 if (RTX_UNCHANGING_P (x))
229 res->unch_memory = 1;
230 else
231 res->memory = 1;
232 res->volatil |= MEM_VOLATILE_P (x);
234 /* Mark registers used to access memory. */
235 mark_referenced_resources (XEXP (x, 0), res, 0);
236 return;
238 case CC0:
239 res->cc = 1;
240 return;
242 case UNSPEC_VOLATILE:
243 case ASM_INPUT:
244 /* Traditional asm's are always volatile. */
245 res->volatil = 1;
246 return;
248 case TRAP_IF:
249 res->volatil = 1;
250 break;
252 case ASM_OPERANDS:
253 res->volatil |= MEM_VOLATILE_P (x);
255 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
256 We can not just fall through here since then we would be confused
257 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
258 traditional asms unlike their normal usage. */
260 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
261 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
262 return;
264 case CALL:
265 /* The first operand will be a (MEM (xxx)) but doesn't really reference
266 memory. The second operand may be referenced, though. */
267 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
268 mark_referenced_resources (XEXP (x, 1), res, 0);
269 return;
271 case SET:
272 /* Usually, the first operand of SET is set, not referenced. But
273 registers used to access memory are referenced. SET_DEST is
274 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
276 mark_referenced_resources (SET_SRC (x), res, 0);
278 x = SET_DEST (x);
279 if (GET_CODE (x) == SIGN_EXTRACT
280 || GET_CODE (x) == ZERO_EXTRACT
281 || GET_CODE (x) == STRICT_LOW_PART)
282 mark_referenced_resources (x, res, 0);
283 else if (GET_CODE (x) == SUBREG)
284 x = SUBREG_REG (x);
285 if (GET_CODE (x) == MEM)
286 mark_referenced_resources (XEXP (x, 0), res, 0);
287 return;
289 case CLOBBER:
290 return;
292 case CALL_INSN:
293 if (include_delayed_effects)
295 /* A CALL references memory, the frame pointer if it exists, the
296 stack pointer, any global registers and any registers given in
297 USE insns immediately in front of the CALL.
299 However, we may have moved some of the parameter loading insns
300 into the delay slot of this CALL. If so, the USE's for them
301 don't count and should be skipped. */
302 rtx insn = PREV_INSN (x);
303 rtx sequence = 0;
304 int seq_size = 0;
305 rtx next = NEXT_INSN (x);
306 int i;
308 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
309 if (NEXT_INSN (insn) != x)
311 next = NEXT_INSN (NEXT_INSN (insn));
312 sequence = PATTERN (NEXT_INSN (insn));
313 seq_size = XVECLEN (sequence, 0);
314 if (GET_CODE (sequence) != SEQUENCE)
315 abort ();
318 res->memory = 1;
319 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
320 if (frame_pointer_needed)
322 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
323 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
324 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
325 #endif
328 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
329 if (global_regs[i])
330 SET_HARD_REG_BIT (res->regs, i);
332 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
333 assume that this call can need any register.
335 This is done to be more conservative about how we handle setjmp.
336 We assume that they both use and set all registers. Using all
337 registers ensures that a register will not be considered dead
338 just because it crosses a setjmp call. A register should be
339 considered dead only if the setjmp call returns non-zero. */
340 if (next && GET_CODE (next) == NOTE
341 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
342 SET_HARD_REG_SET (res->regs);
345 rtx link;
347 for (link = CALL_INSN_FUNCTION_USAGE (x);
348 link;
349 link = XEXP (link, 1))
350 if (GET_CODE (XEXP (link, 0)) == USE)
352 for (i = 1; i < seq_size; i++)
354 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
355 if (GET_CODE (slot_pat) == SET
356 && rtx_equal_p (SET_DEST (slot_pat),
357 XEXP (XEXP (link, 0), 0)))
358 break;
360 if (i >= seq_size)
361 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
362 res, 0);
367 /* ... fall through to other INSN processing ... */
369 case INSN:
370 case JUMP_INSN:
372 #ifdef INSN_REFERENCES_ARE_DELAYED
373 if (! include_delayed_effects
374 && INSN_REFERENCES_ARE_DELAYED (x))
375 return;
376 #endif
378 /* No special processing, just speed up. */
379 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
380 return;
382 default:
383 break;
386 /* Process each sub-expression and flag what it needs. */
387 format_ptr = GET_RTX_FORMAT (code);
388 for (i = 0; i < GET_RTX_LENGTH (code); i++)
389 switch (*format_ptr++)
391 case 'e':
392 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
393 break;
395 case 'E':
396 for (j = 0; j < XVECLEN (x, i); j++)
397 mark_referenced_resources (XVECEXP (x, i, j), res,
398 include_delayed_effects);
399 break;
403 /* A subroutine of mark_target_live_regs. Search forward from TARGET
404 looking for registers that are set before they are used. These are dead.
405 Stop after passing a few conditional jumps, and/or a small
406 number of unconditional branches. */
408 static rtx
409 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
410 rtx target;
411 struct resources *res;
412 rtx *jump_target;
413 int jump_count;
414 struct resources set, needed;
416 HARD_REG_SET scratch;
417 rtx insn, next;
418 rtx jump_insn = 0;
419 int i;
421 for (insn = target; insn; insn = next)
423 rtx this_jump_insn = insn;
425 next = NEXT_INSN (insn);
427 /* If this instruction can throw an exception, then we don't
428 know where we might end up next. That means that we have to
429 assume that whatever we have already marked as live really is
430 live. */
431 if (can_throw (insn))
432 break;
434 switch (GET_CODE (insn))
436 case CODE_LABEL:
437 /* After a label, any pending dead registers that weren't yet
438 used can be made dead. */
439 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
440 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
441 CLEAR_HARD_REG_SET (pending_dead_regs);
443 continue;
445 case BARRIER:
446 case NOTE:
447 continue;
449 case INSN:
450 if (GET_CODE (PATTERN (insn)) == USE)
452 /* If INSN is a USE made by update_block, we care about the
453 underlying insn. Any registers set by the underlying insn
454 are live since the insn is being done somewhere else. */
455 if (INSN_P (XEXP (PATTERN (insn), 0)))
456 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
457 MARK_SRC_DEST_CALL);
459 /* All other USE insns are to be ignored. */
460 continue;
462 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
463 continue;
464 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
466 /* An unconditional jump can be used to fill the delay slot
467 of a call, so search for a JUMP_INSN in any position. */
468 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
470 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
471 if (GET_CODE (this_jump_insn) == JUMP_INSN)
472 break;
476 default:
477 break;
480 if (GET_CODE (this_jump_insn) == JUMP_INSN)
482 if (jump_count++ < 10)
484 if (any_uncondjump_p (this_jump_insn)
485 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
487 next = JUMP_LABEL (this_jump_insn);
488 if (jump_insn == 0)
490 jump_insn = insn;
491 if (jump_target)
492 *jump_target = JUMP_LABEL (this_jump_insn);
495 else if (any_condjump_p (this_jump_insn))
497 struct resources target_set, target_res;
498 struct resources fallthrough_res;
500 /* We can handle conditional branches here by following
501 both paths, and then IOR the results of the two paths
502 together, which will give us registers that are dead
503 on both paths. Since this is expensive, we give it
504 a much higher cost than unconditional branches. The
505 cost was chosen so that we will follow at most 1
506 conditional branch. */
508 jump_count += 4;
509 if (jump_count >= 10)
510 break;
512 mark_referenced_resources (insn, &needed, 1);
514 /* For an annulled branch, mark_set_resources ignores slots
515 filled by instructions from the target. This is correct
516 if the branch is not taken. Since we are following both
517 paths from the branch, we must also compute correct info
518 if the branch is taken. We do this by inverting all of
519 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
520 and then inverting the INSN_FROM_TARGET_P bits again. */
522 if (GET_CODE (PATTERN (insn)) == SEQUENCE
523 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
525 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
526 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
527 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
529 target_set = set;
530 mark_set_resources (insn, &target_set, 0,
531 MARK_SRC_DEST_CALL);
533 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
534 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
535 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
537 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
539 else
541 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
542 target_set = set;
545 target_res = *res;
546 COPY_HARD_REG_SET (scratch, target_set.regs);
547 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
548 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
550 fallthrough_res = *res;
551 COPY_HARD_REG_SET (scratch, set.regs);
552 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
553 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
555 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
556 &target_res, 0, jump_count,
557 target_set, needed);
558 find_dead_or_set_registers (next,
559 &fallthrough_res, 0, jump_count,
560 set, needed);
561 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
562 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
563 break;
565 else
566 break;
568 else
570 /* Don't try this optimization if we expired our jump count
571 above, since that would mean there may be an infinite loop
572 in the function being compiled. */
573 jump_insn = 0;
574 break;
578 mark_referenced_resources (insn, &needed, 1);
579 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
581 COPY_HARD_REG_SET (scratch, set.regs);
582 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
583 AND_COMPL_HARD_REG_SET (res->regs, scratch);
586 return jump_insn;
589 /* Given X, a part of an insn, and a pointer to a `struct resource',
590 RES, indicate which resources are modified by the insn. If
591 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
592 set by the called routine. If MARK_TYPE is MARK_DEST, only mark SET_DESTs
594 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
595 objects are being referenced instead of set.
597 We never mark the insn as modifying the condition code unless it explicitly
598 SETs CC0 even though this is not totally correct. The reason for this is
599 that we require a SET of CC0 to immediately precede the reference to CC0.
600 So if some other insn sets CC0 as a side-effect, we know it cannot affect
601 our computation and thus may be placed in a delay slot. */
603 void
604 mark_set_resources (x, res, in_dest, mark_type)
605 register rtx x;
606 register struct resources *res;
607 int in_dest;
608 enum mark_resource_type mark_type;
610 enum rtx_code code;
611 int i, j;
612 unsigned int r;
613 const char *format_ptr;
615 restart:
617 code = GET_CODE (x);
619 switch (code)
621 case NOTE:
622 case BARRIER:
623 case CODE_LABEL:
624 case USE:
625 case CONST_INT:
626 case CONST_DOUBLE:
627 case LABEL_REF:
628 case SYMBOL_REF:
629 case CONST:
630 case PC:
631 /* These don't set any resources. */
632 return;
634 case CC0:
635 if (in_dest)
636 res->cc = 1;
637 return;
639 case CALL_INSN:
640 /* Called routine modifies the condition code, memory, any registers
641 that aren't saved across calls, global registers and anything
642 explicitly CLOBBERed immediately after the CALL_INSN. */
644 if (mark_type == MARK_SRC_DEST_CALL)
646 rtx next = NEXT_INSN (x);
647 rtx prev = PREV_INSN (x);
648 rtx link;
650 res->cc = res->memory = 1;
651 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
652 if (call_used_regs[r] || global_regs[r])
653 SET_HARD_REG_BIT (res->regs, r);
655 /* If X is part of a delay slot sequence, then NEXT should be
656 the first insn after the sequence. */
657 if (NEXT_INSN (prev) != x)
658 next = NEXT_INSN (NEXT_INSN (prev));
660 for (link = CALL_INSN_FUNCTION_USAGE (x);
661 link; link = XEXP (link, 1))
662 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
663 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
664 MARK_SRC_DEST);
666 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
667 assume that this call can clobber any register. */
668 if (next && GET_CODE (next) == NOTE
669 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
670 SET_HARD_REG_SET (res->regs);
673 /* ... and also what its RTL says it modifies, if anything. */
675 case JUMP_INSN:
676 case INSN:
678 /* An insn consisting of just a CLOBBER (or USE) is just for flow
679 and doesn't actually do anything, so we ignore it. */
681 #ifdef INSN_SETS_ARE_DELAYED
682 if (mark_type != MARK_SRC_DEST_CALL
683 && INSN_SETS_ARE_DELAYED (x))
684 return;
685 #endif
687 x = PATTERN (x);
688 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
689 goto restart;
690 return;
692 case SET:
693 /* If the source of a SET is a CALL, this is actually done by
694 the called routine. So only include it if we are to include the
695 effects of the calling routine. */
697 mark_set_resources (SET_DEST (x), res,
698 (mark_type == MARK_SRC_DEST_CALL
699 || GET_CODE (SET_SRC (x)) != CALL),
700 mark_type);
702 if (mark_type != MARK_DEST)
703 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
704 return;
706 case CLOBBER:
707 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
708 return;
710 case SEQUENCE:
711 for (i = 0; i < XVECLEN (x, 0); i++)
712 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
713 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
714 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
715 return;
717 case POST_INC:
718 case PRE_INC:
719 case POST_DEC:
720 case PRE_DEC:
721 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
722 return;
724 case PRE_MODIFY:
725 case POST_MODIFY:
726 mark_set_resources (XEXP (x, 0), res, 1, 0);
727 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, 0);
728 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, 0);
729 return;
731 case SIGN_EXTRACT:
732 case ZERO_EXTRACT:
733 if (! (mark_type == MARK_DEST && in_dest))
735 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
736 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
737 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
739 return;
741 case MEM:
742 if (in_dest)
744 res->memory = 1;
745 res->unch_memory |= RTX_UNCHANGING_P (x);
746 res->volatil |= MEM_VOLATILE_P (x);
749 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
750 return;
752 case SUBREG:
753 if (in_dest)
755 if (GET_CODE (SUBREG_REG (x)) != REG)
756 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
757 else
759 unsigned int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
760 unsigned int last_regno
761 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
763 for (r = regno; r < last_regno; r++)
764 SET_HARD_REG_BIT (res->regs, r);
767 return;
769 case REG:
770 if (in_dest)
771 for (r = 0; r < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); r++)
772 SET_HARD_REG_BIT (res->regs, REGNO (x) + r);
773 return;
775 case STRICT_LOW_PART:
776 if (! (mark_type == MARK_DEST && in_dest))
778 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
779 return;
782 case UNSPEC_VOLATILE:
783 case ASM_INPUT:
784 /* Traditional asm's are always volatile. */
785 res->volatil = 1;
786 return;
788 case TRAP_IF:
789 res->volatil = 1;
790 break;
792 case ASM_OPERANDS:
793 res->volatil |= MEM_VOLATILE_P (x);
795 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
796 We can not just fall through here since then we would be confused
797 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
798 traditional asms unlike their normal usage. */
800 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
801 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
802 MARK_SRC_DEST);
803 return;
805 default:
806 break;
809 /* Process each sub-expression and flag what it needs. */
810 format_ptr = GET_RTX_FORMAT (code);
811 for (i = 0; i < GET_RTX_LENGTH (code); i++)
812 switch (*format_ptr++)
814 case 'e':
815 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
816 break;
818 case 'E':
819 for (j = 0; j < XVECLEN (x, i); j++)
820 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
821 break;
825 /* Set the resources that are live at TARGET.
827 If TARGET is zero, we refer to the end of the current function and can
828 return our precomputed value.
830 Otherwise, we try to find out what is live by consulting the basic block
831 information. This is tricky, because we must consider the actions of
832 reload and jump optimization, which occur after the basic block information
833 has been computed.
835 Accordingly, we proceed as follows::
837 We find the previous BARRIER and look at all immediately following labels
838 (with no intervening active insns) to see if any of them start a basic
839 block. If we hit the start of the function first, we use block 0.
841 Once we have found a basic block and a corresponding first insns, we can
842 accurately compute the live status from basic_block_live_regs and
843 reg_renumber. (By starting at a label following a BARRIER, we are immune
844 to actions taken by reload and jump.) Then we scan all insns between
845 that point and our target. For each CLOBBER (or for call-clobbered regs
846 when we pass a CALL_INSN), mark the appropriate registers are dead. For
847 a SET, mark them as live.
849 We have to be careful when using REG_DEAD notes because they are not
850 updated by such things as find_equiv_reg. So keep track of registers
851 marked as dead that haven't been assigned to, and mark them dead at the
852 next CODE_LABEL since reload and jump won't propagate values across labels.
854 If we cannot find the start of a basic block (should be a very rare
855 case, if it can happen at all), mark everything as potentially live.
857 Next, scan forward from TARGET looking for things set or clobbered
858 before they are used. These are not live.
860 Because we can be called many times on the same target, save our results
861 in a hash table indexed by INSN_UID. This is only done if the function
862 init_resource_info () was invoked before we are called. */
864 void
865 mark_target_live_regs (insns, target, res)
866 rtx insns;
867 rtx target;
868 struct resources *res;
870 int b = -1;
871 int i;
872 struct target_info *tinfo = NULL;
873 rtx insn;
874 rtx jump_insn = 0;
875 rtx jump_target;
876 HARD_REG_SET scratch;
877 struct resources set, needed;
879 /* Handle end of function. */
880 if (target == 0)
882 *res = end_of_function_needs;
883 return;
886 /* We have to assume memory is needed, but the CC isn't. */
887 res->memory = 1;
888 res->volatil = res->unch_memory = 0;
889 res->cc = 0;
891 /* See if we have computed this value already. */
892 if (target_hash_table != NULL)
894 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
895 tinfo; tinfo = tinfo->next)
896 if (tinfo->uid == INSN_UID (target))
897 break;
899 /* Start by getting the basic block number. If we have saved
900 information, we can get it from there unless the insn at the
901 start of the basic block has been deleted. */
902 if (tinfo && tinfo->block != -1
903 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
904 b = tinfo->block;
907 if (b == -1)
908 b = find_basic_block (target);
910 if (target_hash_table != NULL)
912 if (tinfo)
914 /* If the information is up-to-date, use it. Otherwise, we will
915 update it below. */
916 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
918 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
919 return;
922 else
924 /* Allocate a place to put our results and chain it into the
925 hash table. */
926 tinfo = (struct target_info *) xmalloc (sizeof (struct target_info));
927 tinfo->uid = INSN_UID (target);
928 tinfo->block = b;
929 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
930 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
934 CLEAR_HARD_REG_SET (pending_dead_regs);
936 /* If we found a basic block, get the live registers from it and update
937 them with anything set or killed between its start and the insn before
938 TARGET. Otherwise, we must assume everything is live. */
939 if (b != -1)
941 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
942 unsigned int j;
943 unsigned int regno;
944 rtx start_insn, stop_insn;
946 /* Compute hard regs live at start of block -- this is the real hard regs
947 marked live, plus live pseudo regs that have been renumbered to
948 hard regs. */
950 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
952 EXECUTE_IF_SET_IN_REG_SET
953 (regs_live, FIRST_PSEUDO_REGISTER, i,
955 if (reg_renumber[i] >= 0)
957 regno = reg_renumber[i];
958 for (j = regno;
959 j < regno + HARD_REGNO_NREGS (regno,
960 PSEUDO_REGNO_MODE (i));
961 j++)
962 SET_HARD_REG_BIT (current_live_regs, j);
966 /* Get starting and ending insn, handling the case where each might
967 be a SEQUENCE. */
968 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
969 stop_insn = target;
971 if (GET_CODE (start_insn) == INSN
972 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
973 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
975 if (GET_CODE (stop_insn) == INSN
976 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
977 stop_insn = next_insn (PREV_INSN (stop_insn));
979 for (insn = start_insn; insn != stop_insn;
980 insn = next_insn_no_annul (insn))
982 rtx link;
983 rtx real_insn = insn;
985 /* If this insn is from the target of a branch, it isn't going to
986 be used in the sequel. If it is used in both cases, this
987 test will not be true. */
988 if (INSN_FROM_TARGET_P (insn))
989 continue;
991 /* If this insn is a USE made by update_block, we care about the
992 underlying insn. */
993 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
994 && INSN_P (XEXP (PATTERN (insn), 0)))
995 real_insn = XEXP (PATTERN (insn), 0);
997 if (GET_CODE (real_insn) == CALL_INSN)
999 /* CALL clobbers all call-used regs that aren't fixed except
1000 sp, ap, and fp. Do this before setting the result of the
1001 call live. */
1002 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1003 if (call_used_regs[i]
1004 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
1005 && i != ARG_POINTER_REGNUM
1006 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1007 && i != HARD_FRAME_POINTER_REGNUM
1008 #endif
1009 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1010 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
1011 #endif
1012 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
1013 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
1014 #endif
1016 CLEAR_HARD_REG_BIT (current_live_regs, i);
1018 /* A CALL_INSN sets any global register live, since it may
1019 have been modified by the call. */
1020 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1021 if (global_regs[i])
1022 SET_HARD_REG_BIT (current_live_regs, i);
1025 /* Mark anything killed in an insn to be deadened at the next
1026 label. Ignore USE insns; the only REG_DEAD notes will be for
1027 parameters. But they might be early. A CALL_INSN will usually
1028 clobber registers used for parameters. It isn't worth bothering
1029 with the unlikely case when it won't. */
1030 if ((GET_CODE (real_insn) == INSN
1031 && GET_CODE (PATTERN (real_insn)) != USE
1032 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1033 || GET_CODE (real_insn) == JUMP_INSN
1034 || GET_CODE (real_insn) == CALL_INSN)
1036 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1037 if (REG_NOTE_KIND (link) == REG_DEAD
1038 && GET_CODE (XEXP (link, 0)) == REG
1039 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1041 int first_regno = REGNO (XEXP (link, 0));
1042 int last_regno
1043 = (first_regno
1044 + HARD_REGNO_NREGS (first_regno,
1045 GET_MODE (XEXP (link, 0))));
1047 for (i = first_regno; i < last_regno; i++)
1048 SET_HARD_REG_BIT (pending_dead_regs, i);
1051 note_stores (PATTERN (real_insn), update_live_status, NULL);
1053 /* If any registers were unused after this insn, kill them.
1054 These notes will always be accurate. */
1055 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1056 if (REG_NOTE_KIND (link) == REG_UNUSED
1057 && GET_CODE (XEXP (link, 0)) == REG
1058 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1060 int first_regno = REGNO (XEXP (link, 0));
1061 int last_regno
1062 = (first_regno
1063 + HARD_REGNO_NREGS (first_regno,
1064 GET_MODE (XEXP (link, 0))));
1066 for (i = first_regno; i < last_regno; i++)
1067 CLEAR_HARD_REG_BIT (current_live_regs, i);
1071 else if (GET_CODE (real_insn) == CODE_LABEL)
1073 /* A label clobbers the pending dead registers since neither
1074 reload nor jump will propagate a value across a label. */
1075 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1076 CLEAR_HARD_REG_SET (pending_dead_regs);
1079 /* The beginning of the epilogue corresponds to the end of the
1080 RTL chain when there are no epilogue insns. Certain resources
1081 are implicitly required at that point. */
1082 else if (GET_CODE (real_insn) == NOTE
1083 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1084 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1087 COPY_HARD_REG_SET (res->regs, current_live_regs);
1088 if (tinfo != NULL)
1090 tinfo->block = b;
1091 tinfo->bb_tick = bb_ticks[b];
1094 else
1095 /* We didn't find the start of a basic block. Assume everything
1096 in use. This should happen only extremely rarely. */
1097 SET_HARD_REG_SET (res->regs);
1099 CLEAR_RESOURCE (&set);
1100 CLEAR_RESOURCE (&needed);
1102 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1103 set, needed);
1105 /* If we hit an unconditional branch, we have another way of finding out
1106 what is live: we can see what is live at the branch target and include
1107 anything used but not set before the branch. We add the live
1108 resources found using the test below to those found until now. */
1110 if (jump_insn)
1112 struct resources new_resources;
1113 rtx stop_insn = next_active_insn (jump_insn);
1115 mark_target_live_regs (insns, next_active_insn (jump_target),
1116 &new_resources);
1117 CLEAR_RESOURCE (&set);
1118 CLEAR_RESOURCE (&needed);
1120 /* Include JUMP_INSN in the needed registers. */
1121 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1123 mark_referenced_resources (insn, &needed, 1);
1125 COPY_HARD_REG_SET (scratch, needed.regs);
1126 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1127 IOR_HARD_REG_SET (new_resources.regs, scratch);
1129 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1132 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1135 if (tinfo != NULL)
1137 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1141 /* Initialize the resources required by mark_target_live_regs ().
1142 This should be invoked before the first call to mark_target_live_regs. */
1144 void
1145 init_resource_info (epilogue_insn)
1146 rtx epilogue_insn;
1148 int i;
1150 /* Indicate what resources are required to be valid at the end of the current
1151 function. The condition code never is and memory always is. If the
1152 frame pointer is needed, it is and so is the stack pointer unless
1153 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1154 stack pointer is. Registers used to return the function value are
1155 needed. Registers holding global variables are needed. */
1157 end_of_function_needs.cc = 0;
1158 end_of_function_needs.memory = 1;
1159 end_of_function_needs.unch_memory = 0;
1160 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1162 if (frame_pointer_needed)
1164 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1165 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1166 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1167 #endif
1168 #ifdef EXIT_IGNORE_STACK
1169 if (! EXIT_IGNORE_STACK
1170 || current_function_sp_is_unchanging)
1171 #endif
1172 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1174 else
1175 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1177 if (current_function_return_rtx != 0)
1178 mark_referenced_resources (current_function_return_rtx,
1179 &end_of_function_needs, 1);
1181 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1182 if (global_regs[i]
1183 #ifdef EPILOGUE_USES
1184 || EPILOGUE_USES (i)
1185 #endif
1187 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1189 /* The registers required to be live at the end of the function are
1190 represented in the flow information as being dead just prior to
1191 reaching the end of the function. For example, the return of a value
1192 might be represented by a USE of the return register immediately
1193 followed by an unconditional jump to the return label where the
1194 return label is the end of the RTL chain. The end of the RTL chain
1195 is then taken to mean that the return register is live.
1197 This sequence is no longer maintained when epilogue instructions are
1198 added to the RTL chain. To reconstruct the original meaning, the
1199 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1200 point where these registers become live (start_of_epilogue_needs).
1201 If epilogue instructions are present, the registers set by those
1202 instructions won't have been processed by flow. Thus, those
1203 registers are additionally required at the end of the RTL chain
1204 (end_of_function_needs). */
1206 start_of_epilogue_needs = end_of_function_needs;
1208 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1209 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1210 MARK_SRC_DEST_CALL);
1212 /* Allocate and initialize the tables used by mark_target_live_regs. */
1213 target_hash_table = (struct target_info **)
1214 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1215 bb_ticks = (int *) xcalloc (n_basic_blocks, sizeof (int));
1218 /* Free up the resources allcated to mark_target_live_regs (). This
1219 should be invoked after the last call to mark_target_live_regs (). */
1221 void
1222 free_resource_info ()
1224 if (target_hash_table != NULL)
1226 int i;
1228 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1230 struct target_info *ti = target_hash_table[i];
1232 while (ti)
1234 struct target_info *next = ti->next;
1235 free (ti);
1236 ti = next;
1240 free (target_hash_table);
1241 target_hash_table = NULL;
1244 if (bb_ticks != NULL)
1246 free (bb_ticks);
1247 bb_ticks = NULL;
1251 /* Clear any hashed information that we have stored for INSN. */
1253 void
1254 clear_hashed_info_for_insn (insn)
1255 rtx insn;
1257 struct target_info *tinfo;
1259 if (target_hash_table != NULL)
1261 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1262 tinfo; tinfo = tinfo->next)
1263 if (tinfo->uid == INSN_UID (insn))
1264 break;
1266 if (tinfo)
1267 tinfo->block = -1;
1271 /* Increment the tick count for the basic block that contains INSN. */
1273 void
1274 incr_ticks_for_insn (insn)
1275 rtx insn;
1277 int b = find_basic_block (insn);
1279 if (b != -1)
1280 bb_ticks[b]++;
1283 /* Add TRIAL to the set of resources used at the end of the current
1284 function. */
1285 void
1286 mark_end_of_function_resources (trial, include_delayed_effects)
1287 rtx trial;
1288 int include_delayed_effects;
1290 mark_referenced_resources (trial, &end_of_function_needs,
1291 include_delayed_effects);