1 /* Analyze RTL for C-Compiler
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
30 #include "insn-config.h"
40 /* Forward declarations */
41 static int global_reg_mentioned_p_1 (rtx
*, void *);
42 static void set_of_1 (rtx
, rtx
, void *);
43 static bool covers_regno_p (rtx
, unsigned int);
44 static bool covers_regno_no_parallel_p (rtx
, unsigned int);
45 static int rtx_referenced_p_1 (rtx
*, void *);
46 static int computed_jump_p_1 (rtx
);
47 static void parms_set (rtx
, rtx
, void *);
49 static unsigned HOST_WIDE_INT
cached_nonzero_bits (rtx
, enum machine_mode
,
50 rtx
, enum machine_mode
,
51 unsigned HOST_WIDE_INT
);
52 static unsigned HOST_WIDE_INT
nonzero_bits1 (rtx
, enum machine_mode
, rtx
,
54 unsigned HOST_WIDE_INT
);
55 static unsigned int cached_num_sign_bit_copies (rtx
, enum machine_mode
, rtx
,
58 static unsigned int num_sign_bit_copies1 (rtx
, enum machine_mode
, rtx
,
59 enum machine_mode
, unsigned int);
61 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
62 -1 if a code has no such operand. */
63 static int non_rtx_starting_operands
[NUM_RTX_CODE
];
65 /* Bit flags that specify the machine subtype we are compiling for.
66 Bits are tested using macros TARGET_... defined in the tm.h file
67 and set by `-m...' switches. Must be defined in rtlanal.c. */
71 /* Return 1 if the value of X is unstable
72 (would be different at a different point in the program).
73 The frame pointer, arg pointer, etc. are considered stable
74 (within one function) and so is anything marked `unchanging'. */
77 rtx_unstable_p (rtx x
)
79 RTX_CODE code
= GET_CODE (x
);
86 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
97 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
98 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
99 /* The arg pointer varies if it is not a fixed register. */
100 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
102 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
103 /* ??? When call-clobbered, the value is stable modulo the restore
104 that must happen after a call. This currently screws up local-alloc
105 into believing that the restore is not needed. */
106 if (x
== pic_offset_table_rtx
)
112 if (MEM_VOLATILE_P (x
))
121 fmt
= GET_RTX_FORMAT (code
);
122 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
125 if (rtx_unstable_p (XEXP (x
, i
)))
128 else if (fmt
[i
] == 'E')
131 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
132 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
139 /* Return 1 if X has a value that can vary even between two
140 executions of the program. 0 means X can be compared reliably
141 against certain constants or near-constants.
142 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
143 zero, we are slightly more conservative.
144 The frame pointer and the arg pointer are considered constant. */
147 rtx_varies_p (rtx x
, int for_alias
)
160 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
171 /* Note that we have to test for the actual rtx used for the frame
172 and arg pointers and not just the register number in case we have
173 eliminated the frame and/or arg pointer and are using it
175 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
176 /* The arg pointer varies if it is not a fixed register. */
177 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
179 if (x
== pic_offset_table_rtx
180 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
181 /* ??? When call-clobbered, the value is stable modulo the restore
182 that must happen after a call. This currently screws up
183 local-alloc into believing that the restore is not needed, so we
184 must return 0 only if we are called from alias analysis. */
192 /* The operand 0 of a LO_SUM is considered constant
193 (in fact it is related specifically to operand 1)
194 during alias analysis. */
195 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
196 || rtx_varies_p (XEXP (x
, 1), for_alias
);
199 if (MEM_VOLATILE_P (x
))
208 fmt
= GET_RTX_FORMAT (code
);
209 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
212 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
215 else if (fmt
[i
] == 'E')
218 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
219 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
226 /* Return 0 if the use of X as an address in a MEM can cause a trap. */
229 rtx_addr_can_trap_p (rtx x
)
231 enum rtx_code code
= GET_CODE (x
);
236 return SYMBOL_REF_WEAK (x
);
242 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
243 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
244 || x
== stack_pointer_rtx
245 /* The arg pointer varies if it is not a fixed register. */
246 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
248 /* All of the virtual frame registers are stack references. */
249 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
250 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
255 return rtx_addr_can_trap_p (XEXP (x
, 0));
258 /* An address is assumed not to trap if it is an address that can't
259 trap plus a constant integer or it is the pic register plus a
261 return ! ((! rtx_addr_can_trap_p (XEXP (x
, 0))
262 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
263 || (XEXP (x
, 0) == pic_offset_table_rtx
264 && CONSTANT_P (XEXP (x
, 1))));
268 return rtx_addr_can_trap_p (XEXP (x
, 1));
275 return rtx_addr_can_trap_p (XEXP (x
, 0));
281 /* If it isn't one of the case above, it can cause a trap. */
285 /* Return true if X is an address that is known to not be zero. */
288 nonzero_address_p (rtx x
)
290 enum rtx_code code
= GET_CODE (x
);
295 return !SYMBOL_REF_WEAK (x
);
301 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
302 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
303 || x
== stack_pointer_rtx
304 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
306 /* All of the virtual frame registers are stack references. */
307 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
308 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
313 return nonzero_address_p (XEXP (x
, 0));
316 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
318 /* Pointers aren't allowed to wrap. If we've got a register
319 that is known to be a pointer, and a positive offset, then
320 the composite can't be zero. */
321 if (INTVAL (XEXP (x
, 1)) > 0
322 && REG_P (XEXP (x
, 0))
323 && REG_POINTER (XEXP (x
, 0)))
326 return nonzero_address_p (XEXP (x
, 0));
328 /* Handle PIC references. */
329 else if (XEXP (x
, 0) == pic_offset_table_rtx
330 && CONSTANT_P (XEXP (x
, 1)))
335 /* Similar to the above; allow positive offsets. Further, since
336 auto-inc is only allowed in memories, the register must be a
338 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
339 && INTVAL (XEXP (x
, 1)) > 0)
341 return nonzero_address_p (XEXP (x
, 0));
344 /* Similarly. Further, the offset is always positive. */
351 return nonzero_address_p (XEXP (x
, 0));
354 return nonzero_address_p (XEXP (x
, 1));
360 /* If it isn't one of the case above, might be zero. */
364 /* Return 1 if X refers to a memory location whose address
365 cannot be compared reliably with constant addresses,
366 or if X refers to a BLKmode memory object.
367 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
368 zero, we are slightly more conservative. */
371 rtx_addr_varies_p (rtx x
, int for_alias
)
382 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
384 fmt
= GET_RTX_FORMAT (code
);
385 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
388 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
391 else if (fmt
[i
] == 'E')
394 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
395 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
401 /* Return the value of the integer term in X, if one is apparent;
403 Only obvious integer terms are detected.
404 This is used in cse.c with the `related_value' field. */
407 get_integer_term (rtx x
)
409 if (GET_CODE (x
) == CONST
)
412 if (GET_CODE (x
) == MINUS
413 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
414 return - INTVAL (XEXP (x
, 1));
415 if (GET_CODE (x
) == PLUS
416 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
417 return INTVAL (XEXP (x
, 1));
421 /* If X is a constant, return the value sans apparent integer term;
423 Only obvious integer terms are detected. */
426 get_related_value (rtx x
)
428 if (GET_CODE (x
) != CONST
)
431 if (GET_CODE (x
) == PLUS
432 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
434 else if (GET_CODE (x
) == MINUS
435 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
440 /* A subroutine of global_reg_mentioned_p, returns 1 if *LOC mentions
441 a global register. */
444 global_reg_mentioned_p_1 (rtx
*loc
, void *data ATTRIBUTE_UNUSED
)
452 switch (GET_CODE (x
))
455 if (REG_P (SUBREG_REG (x
)))
457 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
458 && global_regs
[subreg_regno (x
)])
466 if (regno
< FIRST_PSEUDO_REGISTER
&& global_regs
[regno
])
480 /* A non-constant call might use a global register. */
490 /* Returns nonzero if X mentions a global register. */
493 global_reg_mentioned_p (rtx x
)
499 if (! CONST_OR_PURE_CALL_P (x
))
501 x
= CALL_INSN_FUNCTION_USAGE (x
);
509 return for_each_rtx (&x
, global_reg_mentioned_p_1
, NULL
);
512 /* Return the number of places FIND appears within X. If COUNT_DEST is
513 zero, we do not count occurrences inside the destination of a SET. */
516 count_occurrences (rtx x
, rtx find
, int count_dest
)
520 const char *format_ptr
;
541 if (MEM_P (find
) && rtx_equal_p (x
, find
))
546 if (SET_DEST (x
) == find
&& ! count_dest
)
547 return count_occurrences (SET_SRC (x
), find
, count_dest
);
554 format_ptr
= GET_RTX_FORMAT (code
);
557 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
559 switch (*format_ptr
++)
562 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
566 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
567 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
574 /* Nonzero if register REG appears somewhere within IN.
575 Also works if REG is not a register; in this case it checks
576 for a subexpression of IN that is Lisp "equal" to REG. */
579 reg_mentioned_p (rtx reg
, rtx in
)
591 if (GET_CODE (in
) == LABEL_REF
)
592 return reg
== XEXP (in
, 0);
594 code
= GET_CODE (in
);
598 /* Compare registers by number. */
600 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
602 /* These codes have no constituent expressions
612 /* These are kept unique for a given value. */
619 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
622 fmt
= GET_RTX_FORMAT (code
);
624 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
629 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
630 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
633 else if (fmt
[i
] == 'e'
634 && reg_mentioned_p (reg
, XEXP (in
, i
)))
640 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
641 no CODE_LABEL insn. */
644 no_labels_between_p (rtx beg
, rtx end
)
649 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
655 /* Nonzero if register REG is used in an insn between
656 FROM_INSN and TO_INSN (exclusive of those two). */
659 reg_used_between_p (rtx reg
, rtx from_insn
, rtx to_insn
)
663 if (from_insn
== to_insn
)
666 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
668 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
670 && (find_reg_fusage (insn
, USE
, reg
)
671 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
676 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
677 is entirely replaced by a new value and the only use is as a SET_DEST,
678 we do not consider it a reference. */
681 reg_referenced_p (rtx x
, rtx body
)
685 switch (GET_CODE (body
))
688 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
691 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
692 of a REG that occupies all of the REG, the insn references X if
693 it is mentioned in the destination. */
694 if (GET_CODE (SET_DEST (body
)) != CC0
695 && GET_CODE (SET_DEST (body
)) != PC
696 && !REG_P (SET_DEST (body
))
697 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
698 && REG_P (SUBREG_REG (SET_DEST (body
)))
699 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
700 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
701 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
702 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
703 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
708 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
709 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
716 return reg_overlap_mentioned_p (x
, body
);
719 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
722 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
725 case UNSPEC_VOLATILE
:
726 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
727 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
732 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
733 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
738 if (MEM_P (XEXP (body
, 0)))
739 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
744 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
746 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
753 /* Nonzero if register REG is set or clobbered in an insn between
754 FROM_INSN and TO_INSN (exclusive of those two). */
757 reg_set_between_p (rtx reg
, rtx from_insn
, rtx to_insn
)
761 if (from_insn
== to_insn
)
764 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
765 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
770 /* Internals of reg_set_between_p. */
772 reg_set_p (rtx reg
, rtx insn
)
774 /* We can be passed an insn or part of one. If we are passed an insn,
775 check if a side-effect of the insn clobbers REG. */
777 && (FIND_REG_INC_NOTE (insn
, reg
)
780 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
781 && TEST_HARD_REG_BIT (regs_invalidated_by_call
,
784 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
787 return set_of (reg
, insn
) != NULL_RTX
;
790 /* Similar to reg_set_between_p, but check all registers in X. Return 0
791 only if none of them are modified between START and END. Return 1 if
792 X contains a MEM; this routine does usememory aliasing. */
795 modified_between_p (rtx x
, rtx start
, rtx end
)
797 enum rtx_code code
= GET_CODE (x
);
820 if (modified_between_p (XEXP (x
, 0), start
, end
))
822 if (MEM_READONLY_P (x
))
824 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
825 if (memory_modified_in_insn_p (x
, insn
))
831 return reg_set_between_p (x
, start
, end
);
837 fmt
= GET_RTX_FORMAT (code
);
838 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
840 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
843 else if (fmt
[i
] == 'E')
844 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
845 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
852 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
853 of them are modified in INSN. Return 1 if X contains a MEM; this routine
854 does use memory aliasing. */
857 modified_in_p (rtx x
, rtx insn
)
859 enum rtx_code code
= GET_CODE (x
);
878 if (modified_in_p (XEXP (x
, 0), insn
))
880 if (MEM_READONLY_P (x
))
882 if (memory_modified_in_insn_p (x
, insn
))
888 return reg_set_p (x
, insn
);
894 fmt
= GET_RTX_FORMAT (code
);
895 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
897 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
900 else if (fmt
[i
] == 'E')
901 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
902 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
909 /* Helper function for set_of. */
917 set_of_1 (rtx x
, rtx pat
, void *data1
)
919 struct set_of_data
*data
= (struct set_of_data
*) (data1
);
920 if (rtx_equal_p (x
, data
->pat
)
921 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
925 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
926 (either directly or via STRICT_LOW_PART and similar modifiers). */
928 set_of (rtx pat
, rtx insn
)
930 struct set_of_data data
;
931 data
.found
= NULL_RTX
;
933 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
937 /* Given an INSN, return a SET expression if this insn has only a single SET.
938 It may also have CLOBBERs, USEs, or SET whose output
939 will not be used, which we ignore. */
942 single_set_2 (rtx insn
, rtx pat
)
945 int set_verified
= 1;
948 if (GET_CODE (pat
) == PARALLEL
)
950 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
952 rtx sub
= XVECEXP (pat
, 0, i
);
953 switch (GET_CODE (sub
))
960 /* We can consider insns having multiple sets, where all
961 but one are dead as single set insns. In common case
962 only single set is present in the pattern so we want
963 to avoid checking for REG_UNUSED notes unless necessary.
965 When we reach set first time, we just expect this is
966 the single set we are looking for and only when more
967 sets are found in the insn, we check them. */
970 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
971 && !side_effects_p (set
))
977 set
= sub
, set_verified
= 0;
978 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
979 || side_effects_p (sub
))
991 /* Given an INSN, return nonzero if it has more than one SET, else return
995 multiple_sets (rtx insn
)
1000 /* INSN must be an insn. */
1001 if (! INSN_P (insn
))
1004 /* Only a PARALLEL can have multiple SETs. */
1005 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
1007 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1008 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1010 /* If we have already found a SET, then return now. */
1018 /* Either zero or one SET. */
1022 /* Return nonzero if the destination of SET equals the source
1023 and there are no side effects. */
1026 set_noop_p (rtx set
)
1028 rtx src
= SET_SRC (set
);
1029 rtx dst
= SET_DEST (set
);
1031 if (dst
== pc_rtx
&& src
== pc_rtx
)
1034 if (MEM_P (dst
) && MEM_P (src
))
1035 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1037 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1038 return rtx_equal_p (XEXP (dst
, 0), src
)
1039 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1040 && !side_effects_p (src
);
1042 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1043 dst
= XEXP (dst
, 0);
1045 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1047 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1049 src
= SUBREG_REG (src
);
1050 dst
= SUBREG_REG (dst
);
1053 return (REG_P (src
) && REG_P (dst
)
1054 && REGNO (src
) == REGNO (dst
));
1057 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1061 noop_move_p (rtx insn
)
1063 rtx pat
= PATTERN (insn
);
1065 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1068 /* Insns carrying these notes are useful later on. */
1069 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1072 /* For now treat an insn with a REG_RETVAL note as a
1073 a special insn which should not be considered a no-op. */
1074 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
1077 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1080 if (GET_CODE (pat
) == PARALLEL
)
1083 /* If nothing but SETs of registers to themselves,
1084 this insn can also be deleted. */
1085 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1087 rtx tem
= XVECEXP (pat
, 0, i
);
1089 if (GET_CODE (tem
) == USE
1090 || GET_CODE (tem
) == CLOBBER
)
1093 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1103 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1104 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1105 If the object was modified, if we hit a partial assignment to X, or hit a
1106 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1107 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1111 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1115 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1119 rtx set
= single_set (p
);
1120 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1122 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1124 rtx src
= SET_SRC (set
);
1126 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1127 src
= XEXP (note
, 0);
1129 if ((valid_to
== NULL_RTX
1130 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1131 /* Reject hard registers because we don't usually want
1132 to use them; we'd rather use a pseudo. */
1134 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1141 /* If set in non-simple way, we don't have a value. */
1142 if (reg_set_p (x
, p
))
1149 /* Return nonzero if register in range [REGNO, ENDREGNO)
1150 appears either explicitly or implicitly in X
1151 other than being stored into.
1153 References contained within the substructure at LOC do not count.
1154 LOC may be zero, meaning don't ignore anything. */
1157 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, rtx x
,
1161 unsigned int x_regno
;
1166 /* The contents of a REG_NONNEG note is always zero, so we must come here
1167 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1171 code
= GET_CODE (x
);
1176 x_regno
= REGNO (x
);
1178 /* If we modifying the stack, frame, or argument pointer, it will
1179 clobber a virtual register. In fact, we could be more precise,
1180 but it isn't worth it. */
1181 if ((x_regno
== STACK_POINTER_REGNUM
1182 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1183 || x_regno
== ARG_POINTER_REGNUM
1185 || x_regno
== FRAME_POINTER_REGNUM
)
1186 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1189 return (endregno
> x_regno
1190 && regno
< x_regno
+ (x_regno
< FIRST_PSEUDO_REGISTER
1191 ? hard_regno_nregs
[x_regno
][GET_MODE (x
)]
1195 /* If this is a SUBREG of a hard reg, we can see exactly which
1196 registers are being modified. Otherwise, handle normally. */
1197 if (REG_P (SUBREG_REG (x
))
1198 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1200 unsigned int inner_regno
= subreg_regno (x
);
1201 unsigned int inner_endregno
1202 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1203 ? hard_regno_nregs
[inner_regno
][GET_MODE (x
)] : 1);
1205 return endregno
> inner_regno
&& regno
< inner_endregno
;
1211 if (&SET_DEST (x
) != loc
1212 /* Note setting a SUBREG counts as referring to the REG it is in for
1213 a pseudo but not for hard registers since we can
1214 treat each word individually. */
1215 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1216 && loc
!= &SUBREG_REG (SET_DEST (x
))
1217 && REG_P (SUBREG_REG (SET_DEST (x
)))
1218 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1219 && refers_to_regno_p (regno
, endregno
,
1220 SUBREG_REG (SET_DEST (x
)), loc
))
1221 || (!REG_P (SET_DEST (x
))
1222 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1225 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1234 /* X does not match, so try its subexpressions. */
1236 fmt
= GET_RTX_FORMAT (code
);
1237 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1239 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1247 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1250 else if (fmt
[i
] == 'E')
1253 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1254 if (loc
!= &XVECEXP (x
, i
, j
)
1255 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1262 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1263 we check if any register number in X conflicts with the relevant register
1264 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1265 contains a MEM (we don't bother checking for memory addresses that can't
1266 conflict because we expect this to be a rare case. */
1269 reg_overlap_mentioned_p (rtx x
, rtx in
)
1271 unsigned int regno
, endregno
;
1273 /* If either argument is a constant, then modifying X can not
1274 affect IN. Here we look at IN, we can profitably combine
1275 CONSTANT_P (x) with the switch statement below. */
1276 if (CONSTANT_P (in
))
1280 switch (GET_CODE (x
))
1282 case STRICT_LOW_PART
:
1285 /* Overly conservative. */
1290 regno
= REGNO (SUBREG_REG (x
));
1291 if (regno
< FIRST_PSEUDO_REGISTER
)
1292 regno
= subreg_regno (x
);
1298 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1299 ? hard_regno_nregs
[regno
][GET_MODE (x
)] : 1);
1300 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1310 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1311 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1314 if (reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1317 else if (fmt
[i
] == 'E')
1320 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; --j
)
1321 if (reg_overlap_mentioned_p (x
, XVECEXP (in
, i
, j
)))
1331 return reg_mentioned_p (x
, in
);
1337 /* If any register in here refers to it we return true. */
1338 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1339 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1340 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1346 gcc_assert (CONSTANT_P (x
));
1351 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1352 (X would be the pattern of an insn).
1353 FUN receives two arguments:
1354 the REG, MEM, CC0 or PC being stored in or clobbered,
1355 the SET or CLOBBER rtx that does the store.
1357 If the item being stored in or clobbered is a SUBREG of a hard register,
1358 the SUBREG will be passed. */
1361 note_stores (rtx x
, void (*fun
) (rtx
, rtx
, void *), void *data
)
1365 if (GET_CODE (x
) == COND_EXEC
)
1366 x
= COND_EXEC_CODE (x
);
1368 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1370 rtx dest
= SET_DEST (x
);
1372 while ((GET_CODE (dest
) == SUBREG
1373 && (!REG_P (SUBREG_REG (dest
))
1374 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1375 || GET_CODE (dest
) == ZERO_EXTRACT
1376 || GET_CODE (dest
) == STRICT_LOW_PART
)
1377 dest
= XEXP (dest
, 0);
1379 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1380 each of whose first operand is a register. */
1381 if (GET_CODE (dest
) == PARALLEL
)
1383 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1384 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1385 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1388 (*fun
) (dest
, x
, data
);
1391 else if (GET_CODE (x
) == PARALLEL
)
1392 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1393 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1396 /* Like notes_stores, but call FUN for each expression that is being
1397 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1398 FUN for each expression, not any interior subexpressions. FUN receives a
1399 pointer to the expression and the DATA passed to this function.
1401 Note that this is not quite the same test as that done in reg_referenced_p
1402 since that considers something as being referenced if it is being
1403 partially set, while we do not. */
1406 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1411 switch (GET_CODE (body
))
1414 (*fun
) (&COND_EXEC_TEST (body
), data
);
1415 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1419 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1420 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1424 (*fun
) (&XEXP (body
, 0), data
);
1428 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1429 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1433 (*fun
) (&TRAP_CONDITION (body
), data
);
1437 (*fun
) (&XEXP (body
, 0), data
);
1441 case UNSPEC_VOLATILE
:
1442 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1443 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1447 if (MEM_P (XEXP (body
, 0)))
1448 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1453 rtx dest
= SET_DEST (body
);
1455 /* For sets we replace everything in source plus registers in memory
1456 expression in store and operands of a ZERO_EXTRACT. */
1457 (*fun
) (&SET_SRC (body
), data
);
1459 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1461 (*fun
) (&XEXP (dest
, 1), data
);
1462 (*fun
) (&XEXP (dest
, 2), data
);
1465 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1466 dest
= XEXP (dest
, 0);
1469 (*fun
) (&XEXP (dest
, 0), data
);
1474 /* All the other possibilities never store. */
1475 (*fun
) (pbody
, data
);
1480 /* Return nonzero if X's old contents don't survive after INSN.
1481 This will be true if X is (cc0) or if X is a register and
1482 X dies in INSN or because INSN entirely sets X.
1484 "Entirely set" means set directly and not through a SUBREG, or
1485 ZERO_EXTRACT, so no trace of the old contents remains.
1486 Likewise, REG_INC does not count.
1488 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1489 but for this use that makes no difference, since regs don't overlap
1490 during their lifetimes. Therefore, this function may be used
1491 at any time after deaths have been computed (in flow.c).
1493 If REG is a hard reg that occupies multiple machine registers, this
1494 function will only return 1 if each of those registers will be replaced
1498 dead_or_set_p (rtx insn
, rtx x
)
1500 unsigned int regno
, last_regno
;
1503 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1504 if (GET_CODE (x
) == CC0
)
1507 gcc_assert (REG_P (x
));
1510 last_regno
= (regno
>= FIRST_PSEUDO_REGISTER
? regno
1511 : regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)] - 1);
1513 for (i
= regno
; i
<= last_regno
; i
++)
1514 if (! dead_or_set_regno_p (insn
, i
))
1520 /* Return TRUE iff DEST is a register or subreg of a register and
1521 doesn't change the number of words of the inner register, and any
1522 part of the register is TEST_REGNO. */
1525 covers_regno_no_parallel_p (rtx dest
, unsigned int test_regno
)
1527 unsigned int regno
, endregno
;
1529 if (GET_CODE (dest
) == SUBREG
1530 && (((GET_MODE_SIZE (GET_MODE (dest
))
1531 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1532 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1533 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1534 dest
= SUBREG_REG (dest
);
1539 regno
= REGNO (dest
);
1540 endregno
= (regno
>= FIRST_PSEUDO_REGISTER
? regno
+ 1
1541 : regno
+ hard_regno_nregs
[regno
][GET_MODE (dest
)]);
1542 return (test_regno
>= regno
&& test_regno
< endregno
);
1545 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1546 any member matches the covers_regno_no_parallel_p criteria. */
1549 covers_regno_p (rtx dest
, unsigned int test_regno
)
1551 if (GET_CODE (dest
) == PARALLEL
)
1553 /* Some targets place small structures in registers for return
1554 values of functions, and those registers are wrapped in
1555 PARALLELs that we may see as the destination of a SET. */
1558 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1560 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1561 if (inner
!= NULL_RTX
1562 && covers_regno_no_parallel_p (inner
, test_regno
))
1569 return covers_regno_no_parallel_p (dest
, test_regno
);
1572 /* Utility function for dead_or_set_p to check an individual register. Also
1573 called from flow.c. */
1576 dead_or_set_regno_p (rtx insn
, unsigned int test_regno
)
1580 /* See if there is a death note for something that includes TEST_REGNO. */
1581 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1585 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1588 pattern
= PATTERN (insn
);
1590 if (GET_CODE (pattern
) == COND_EXEC
)
1591 pattern
= COND_EXEC_CODE (pattern
);
1593 if (GET_CODE (pattern
) == SET
)
1594 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1595 else if (GET_CODE (pattern
) == PARALLEL
)
1599 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1601 rtx body
= XVECEXP (pattern
, 0, i
);
1603 if (GET_CODE (body
) == COND_EXEC
)
1604 body
= COND_EXEC_CODE (body
);
1606 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1607 && covers_regno_p (SET_DEST (body
), test_regno
))
1615 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1616 If DATUM is nonzero, look for one whose datum is DATUM. */
1619 find_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1623 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1624 if (! INSN_P (insn
))
1628 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1629 if (REG_NOTE_KIND (link
) == kind
)
1634 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1635 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1640 /* Return the reg-note of kind KIND in insn INSN which applies to register
1641 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1642 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1643 it might be the case that the note overlaps REGNO. */
1646 find_regno_note (rtx insn
, enum reg_note kind
, unsigned int regno
)
1650 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1651 if (! INSN_P (insn
))
1654 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1655 if (REG_NOTE_KIND (link
) == kind
1656 /* Verify that it is a register, so that scratch and MEM won't cause a
1658 && REG_P (XEXP (link
, 0))
1659 && REGNO (XEXP (link
, 0)) <= regno
1660 && ((REGNO (XEXP (link
, 0))
1661 + (REGNO (XEXP (link
, 0)) >= FIRST_PSEUDO_REGISTER
? 1
1662 : hard_regno_nregs
[REGNO (XEXP (link
, 0))]
1663 [GET_MODE (XEXP (link
, 0))]))
1669 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1673 find_reg_equal_equiv_note (rtx insn
)
1679 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1680 if (REG_NOTE_KIND (link
) == REG_EQUAL
1681 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1683 if (single_set (insn
) == 0)
1690 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1691 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1694 find_reg_fusage (rtx insn
, enum rtx_code code
, rtx datum
)
1696 /* If it's not a CALL_INSN, it can't possibly have a
1697 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1707 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1709 link
= XEXP (link
, 1))
1710 if (GET_CODE (XEXP (link
, 0)) == code
1711 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1716 unsigned int regno
= REGNO (datum
);
1718 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1719 to pseudo registers, so don't bother checking. */
1721 if (regno
< FIRST_PSEUDO_REGISTER
)
1723 unsigned int end_regno
1724 = regno
+ hard_regno_nregs
[regno
][GET_MODE (datum
)];
1727 for (i
= regno
; i
< end_regno
; i
++)
1728 if (find_regno_fusage (insn
, code
, i
))
1736 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1737 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1740 find_regno_fusage (rtx insn
, enum rtx_code code
, unsigned int regno
)
1744 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1745 to pseudo registers, so don't bother checking. */
1747 if (regno
>= FIRST_PSEUDO_REGISTER
1751 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1753 unsigned int regnote
;
1756 if (GET_CODE (op
= XEXP (link
, 0)) == code
1757 && REG_P (reg
= XEXP (op
, 0))
1758 && (regnote
= REGNO (reg
)) <= regno
1759 && regnote
+ hard_regno_nregs
[regnote
][GET_MODE (reg
)] > regno
)
1766 /* Return true if INSN is a call to a pure function. */
1769 pure_call_p (rtx insn
)
1773 if (!CALL_P (insn
) || ! CONST_OR_PURE_CALL_P (insn
))
1776 /* Look for the note that differentiates const and pure functions. */
1777 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1781 if (GET_CODE (u
= XEXP (link
, 0)) == USE
1782 && MEM_P (m
= XEXP (u
, 0)) && GET_MODE (m
) == BLKmode
1783 && GET_CODE (XEXP (m
, 0)) == SCRATCH
)
1790 /* Remove register note NOTE from the REG_NOTES of INSN. */
1793 remove_note (rtx insn
, rtx note
)
1797 if (note
== NULL_RTX
)
1800 if (REG_NOTES (insn
) == note
)
1802 REG_NOTES (insn
) = XEXP (note
, 1);
1806 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1807 if (XEXP (link
, 1) == note
)
1809 XEXP (link
, 1) = XEXP (note
, 1);
1816 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1817 return 1 if it is found. A simple equality test is used to determine if
1821 in_expr_list_p (rtx listp
, rtx node
)
1825 for (x
= listp
; x
; x
= XEXP (x
, 1))
1826 if (node
== XEXP (x
, 0))
1832 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1833 remove that entry from the list if it is found.
1835 A simple equality test is used to determine if NODE matches. */
1838 remove_node_from_expr_list (rtx node
, rtx
*listp
)
1841 rtx prev
= NULL_RTX
;
1845 if (node
== XEXP (temp
, 0))
1847 /* Splice the node out of the list. */
1849 XEXP (prev
, 1) = XEXP (temp
, 1);
1851 *listp
= XEXP (temp
, 1);
1857 temp
= XEXP (temp
, 1);
1861 /* Nonzero if X contains any volatile instructions. These are instructions
1862 which may cause unpredictable machine state instructions, and thus no
1863 instructions should be moved or combined across them. This includes
1864 only volatile asms and UNSPEC_VOLATILE instructions. */
1867 volatile_insn_p (rtx x
)
1871 code
= GET_CODE (x
);
1891 case UNSPEC_VOLATILE
:
1892 /* case TRAP_IF: This isn't clear yet. */
1897 if (MEM_VOLATILE_P (x
))
1904 /* Recursively scan the operands of this expression. */
1907 const char *fmt
= GET_RTX_FORMAT (code
);
1910 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1914 if (volatile_insn_p (XEXP (x
, i
)))
1917 else if (fmt
[i
] == 'E')
1920 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1921 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
1929 /* Nonzero if X contains any volatile memory references
1930 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
1933 volatile_refs_p (rtx x
)
1937 code
= GET_CODE (x
);
1955 case UNSPEC_VOLATILE
:
1961 if (MEM_VOLATILE_P (x
))
1968 /* Recursively scan the operands of this expression. */
1971 const char *fmt
= GET_RTX_FORMAT (code
);
1974 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1978 if (volatile_refs_p (XEXP (x
, i
)))
1981 else if (fmt
[i
] == 'E')
1984 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1985 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
1993 /* Similar to above, except that it also rejects register pre- and post-
1997 side_effects_p (rtx x
)
2001 code
= GET_CODE (x
);
2019 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2020 when some combination can't be done. If we see one, don't think
2021 that we can simplify the expression. */
2022 return (GET_MODE (x
) != VOIDmode
);
2031 case UNSPEC_VOLATILE
:
2032 /* case TRAP_IF: This isn't clear yet. */
2038 if (MEM_VOLATILE_P (x
))
2045 /* Recursively scan the operands of this expression. */
2048 const char *fmt
= GET_RTX_FORMAT (code
);
2051 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2055 if (side_effects_p (XEXP (x
, i
)))
2058 else if (fmt
[i
] == 'E')
2061 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2062 if (side_effects_p (XVECEXP (x
, i
, j
)))
2070 /* Return nonzero if evaluating rtx X might cause a trap. */
2081 code
= GET_CODE (x
);
2084 /* Handle these cases quickly. */
2098 case UNSPEC_VOLATILE
:
2103 return MEM_VOLATILE_P (x
);
2105 /* Memory ref can trap unless it's a static var or a stack slot. */
2107 if (MEM_NOTRAP_P (x
))
2109 return rtx_addr_can_trap_p (XEXP (x
, 0));
2111 /* Division by a non-constant might trap. */
2116 if (HONOR_SNANS (GET_MODE (x
)))
2118 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
2119 return flag_trapping_math
;
2120 if (!CONSTANT_P (XEXP (x
, 1)) || (XEXP (x
, 1) == const0_rtx
))
2125 /* An EXPR_LIST is used to represent a function call. This
2126 certainly may trap. */
2135 /* Some floating point comparisons may trap. */
2136 if (!flag_trapping_math
)
2138 /* ??? There is no machine independent way to check for tests that trap
2139 when COMPARE is used, though many targets do make this distinction.
2140 For instance, sparc uses CCFPE for compares which generate exceptions
2141 and CCFP for compares which do not generate exceptions. */
2142 if (HONOR_NANS (GET_MODE (x
)))
2144 /* But often the compare has some CC mode, so check operand
2146 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2147 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2153 if (HONOR_SNANS (GET_MODE (x
)))
2155 /* Often comparison is CC mode, so check operand modes. */
2156 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2157 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2162 /* Conversion of floating point might trap. */
2163 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2169 /* These operations don't trap even with floating point. */
2173 /* Any floating arithmetic may trap. */
2174 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
2175 && flag_trapping_math
)
2179 fmt
= GET_RTX_FORMAT (code
);
2180 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2184 if (may_trap_p (XEXP (x
, i
)))
2187 else if (fmt
[i
] == 'E')
2190 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2191 if (may_trap_p (XVECEXP (x
, i
, j
)))
2198 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2199 i.e., an inequality. */
2202 inequality_comparisons_p (rtx x
)
2206 enum rtx_code code
= GET_CODE (x
);
2236 len
= GET_RTX_LENGTH (code
);
2237 fmt
= GET_RTX_FORMAT (code
);
2239 for (i
= 0; i
< len
; i
++)
2243 if (inequality_comparisons_p (XEXP (x
, i
)))
2246 else if (fmt
[i
] == 'E')
2249 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2250 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2258 /* Replace any occurrence of FROM in X with TO. The function does
2259 not enter into CONST_DOUBLE for the replace.
2261 Note that copying is not done so X must not be shared unless all copies
2262 are to be modified. */
2265 replace_rtx (rtx x
, rtx from
, rtx to
)
2270 /* The following prevents loops occurrence when we change MEM in
2271 CONST_DOUBLE onto the same CONST_DOUBLE. */
2272 if (x
!= 0 && GET_CODE (x
) == CONST_DOUBLE
)
2278 /* Allow this function to make replacements in EXPR_LISTs. */
2282 if (GET_CODE (x
) == SUBREG
)
2284 rtx
new = replace_rtx (SUBREG_REG (x
), from
, to
);
2286 if (GET_CODE (new) == CONST_INT
)
2288 x
= simplify_subreg (GET_MODE (x
), new,
2289 GET_MODE (SUBREG_REG (x
)),
2294 SUBREG_REG (x
) = new;
2298 else if (GET_CODE (x
) == ZERO_EXTEND
)
2300 rtx
new = replace_rtx (XEXP (x
, 0), from
, to
);
2302 if (GET_CODE (new) == CONST_INT
)
2304 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2305 new, GET_MODE (XEXP (x
, 0)));
2314 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2315 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2318 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2319 else if (fmt
[i
] == 'E')
2320 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2321 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2327 /* Throughout the rtx X, replace many registers according to REG_MAP.
2328 Return the replacement for X (which may be X with altered contents).
2329 REG_MAP[R] is the replacement for register R, or 0 for don't replace.
2330 NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
2332 We only support REG_MAP entries of REG or SUBREG. Also, hard registers
2333 should not be mapped to pseudos or vice versa since validate_change
2336 If REPLACE_DEST is 1, replacements are also done in destinations;
2337 otherwise, only sources are replaced. */
2340 replace_regs (rtx x
, rtx
*reg_map
, unsigned int nregs
, int replace_dest
)
2349 code
= GET_CODE (x
);
2364 /* Verify that the register has an entry before trying to access it. */
2365 if (REGNO (x
) < nregs
&& reg_map
[REGNO (x
)] != 0)
2367 /* SUBREGs can't be shared. Always return a copy to ensure that if
2368 this replacement occurs more than once then each instance will
2369 get distinct rtx. */
2370 if (GET_CODE (reg_map
[REGNO (x
)]) == SUBREG
)
2371 return copy_rtx (reg_map
[REGNO (x
)]);
2372 return reg_map
[REGNO (x
)];
2377 /* Prevent making nested SUBREGs. */
2378 if (REG_P (SUBREG_REG (x
)) && REGNO (SUBREG_REG (x
)) < nregs
2379 && reg_map
[REGNO (SUBREG_REG (x
))] != 0
2380 && GET_CODE (reg_map
[REGNO (SUBREG_REG (x
))]) == SUBREG
)
2382 rtx map_val
= reg_map
[REGNO (SUBREG_REG (x
))];
2383 return simplify_gen_subreg (GET_MODE (x
), map_val
,
2384 GET_MODE (SUBREG_REG (x
)),
2391 SET_DEST (x
) = replace_regs (SET_DEST (x
), reg_map
, nregs
, 0);
2393 else if (MEM_P (SET_DEST (x
))
2394 || GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
)
2395 /* Even if we are not to replace destinations, replace register if it
2396 is CONTAINED in destination (destination is memory or
2397 STRICT_LOW_PART). */
2398 XEXP (SET_DEST (x
), 0) = replace_regs (XEXP (SET_DEST (x
), 0),
2400 else if (GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
2401 /* Similarly, for ZERO_EXTRACT we replace all operands. */
2404 SET_SRC (x
) = replace_regs (SET_SRC (x
), reg_map
, nregs
, 0);
2411 fmt
= GET_RTX_FORMAT (code
);
2412 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2415 XEXP (x
, i
) = replace_regs (XEXP (x
, i
), reg_map
, nregs
, replace_dest
);
2416 else if (fmt
[i
] == 'E')
2419 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2420 XVECEXP (x
, i
, j
) = replace_regs (XVECEXP (x
, i
, j
), reg_map
,
2421 nregs
, replace_dest
);
2427 /* Replace occurrences of the old label in *X with the new one.
2428 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2431 replace_label (rtx
*x
, void *data
)
2434 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2435 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2436 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2441 if (GET_CODE (l
) == SYMBOL_REF
2442 && CONSTANT_POOL_ADDRESS_P (l
))
2444 rtx c
= get_pool_constant (l
);
2445 if (rtx_referenced_p (old_label
, c
))
2448 replace_label_data
*d
= (replace_label_data
*) data
;
2450 /* Create a copy of constant C; replace the label inside
2451 but do not update LABEL_NUSES because uses in constant pool
2453 new_c
= copy_rtx (c
);
2454 d
->update_label_nuses
= false;
2455 for_each_rtx (&new_c
, replace_label
, data
);
2456 d
->update_label_nuses
= update_label_nuses
;
2458 /* Add the new constant NEW_C to constant pool and replace
2459 the old reference to constant by new reference. */
2460 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2461 *x
= replace_rtx (l
, l
, new_l
);
2466 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2467 field. This is not handled by for_each_rtx because it doesn't
2468 handle unprinted ('0') fields. */
2469 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2470 JUMP_LABEL (l
) = new_label
;
2472 if ((GET_CODE (l
) == LABEL_REF
2473 || GET_CODE (l
) == INSN_LIST
)
2474 && XEXP (l
, 0) == old_label
)
2476 XEXP (l
, 0) = new_label
;
2477 if (update_label_nuses
)
2479 ++LABEL_NUSES (new_label
);
2480 --LABEL_NUSES (old_label
);
2488 /* When *BODY is equal to X or X is directly referenced by *BODY
2489 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2490 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2493 rtx_referenced_p_1 (rtx
*body
, void *x
)
2497 if (*body
== NULL_RTX
)
2498 return y
== NULL_RTX
;
2500 /* Return true if a label_ref *BODY refers to label Y. */
2501 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2502 return XEXP (*body
, 0) == y
;
2504 /* If *BODY is a reference to pool constant traverse the constant. */
2505 if (GET_CODE (*body
) == SYMBOL_REF
2506 && CONSTANT_POOL_ADDRESS_P (*body
))
2507 return rtx_referenced_p (y
, get_pool_constant (*body
));
2509 /* By default, compare the RTL expressions. */
2510 return rtx_equal_p (*body
, y
);
2513 /* Return true if X is referenced in BODY. */
2516 rtx_referenced_p (rtx x
, rtx body
)
2518 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2521 /* If INSN is a tablejump return true and store the label (before jump table) to
2522 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2525 tablejump_p (rtx insn
, rtx
*labelp
, rtx
*tablep
)
2530 && (label
= JUMP_LABEL (insn
)) != NULL_RTX
2531 && (table
= next_active_insn (label
)) != NULL_RTX
2533 && (GET_CODE (PATTERN (table
)) == ADDR_VEC
2534 || GET_CODE (PATTERN (table
)) == ADDR_DIFF_VEC
))
2545 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2546 constant that is not in the constant pool and not in the condition
2547 of an IF_THEN_ELSE. */
2550 computed_jump_p_1 (rtx x
)
2552 enum rtx_code code
= GET_CODE (x
);
2571 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2572 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2575 return (computed_jump_p_1 (XEXP (x
, 1))
2576 || computed_jump_p_1 (XEXP (x
, 2)));
2582 fmt
= GET_RTX_FORMAT (code
);
2583 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2586 && computed_jump_p_1 (XEXP (x
, i
)))
2589 else if (fmt
[i
] == 'E')
2590 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2591 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2598 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2600 Tablejumps and casesi insns are not considered indirect jumps;
2601 we can recognize them by a (use (label_ref)). */
2604 computed_jump_p (rtx insn
)
2609 rtx pat
= PATTERN (insn
);
2611 if (find_reg_note (insn
, REG_LABEL
, NULL_RTX
))
2613 else if (GET_CODE (pat
) == PARALLEL
)
2615 int len
= XVECLEN (pat
, 0);
2616 int has_use_labelref
= 0;
2618 for (i
= len
- 1; i
>= 0; i
--)
2619 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2620 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2622 has_use_labelref
= 1;
2624 if (! has_use_labelref
)
2625 for (i
= len
- 1; i
>= 0; i
--)
2626 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2627 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2628 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2631 else if (GET_CODE (pat
) == SET
2632 && SET_DEST (pat
) == pc_rtx
2633 && computed_jump_p_1 (SET_SRC (pat
)))
2639 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2640 calls. Processes the subexpressions of EXP and passes them to F. */
2642 for_each_rtx_1 (rtx exp
, int n
, rtx_function f
, void *data
)
2645 const char *format
= GET_RTX_FORMAT (GET_CODE (exp
));
2648 for (; format
[n
] != '\0'; n
++)
2655 result
= (*f
) (x
, data
);
2657 /* Do not traverse sub-expressions. */
2659 else if (result
!= 0)
2660 /* Stop the traversal. */
2664 /* There are no sub-expressions. */
2667 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2670 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2678 if (XVEC (exp
, n
) == 0)
2680 for (j
= 0; j
< XVECLEN (exp
, n
); ++j
)
2683 x
= &XVECEXP (exp
, n
, j
);
2684 result
= (*f
) (x
, data
);
2686 /* Do not traverse sub-expressions. */
2688 else if (result
!= 0)
2689 /* Stop the traversal. */
2693 /* There are no sub-expressions. */
2696 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2699 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2707 /* Nothing to do. */
2715 /* Traverse X via depth-first search, calling F for each
2716 sub-expression (including X itself). F is also passed the DATA.
2717 If F returns -1, do not traverse sub-expressions, but continue
2718 traversing the rest of the tree. If F ever returns any other
2719 nonzero value, stop the traversal, and return the value returned
2720 by F. Otherwise, return 0. This function does not traverse inside
2721 tree structure that contains RTX_EXPRs, or into sub-expressions
2722 whose format code is `0' since it is not known whether or not those
2723 codes are actually RTL.
2725 This routine is very general, and could (should?) be used to
2726 implement many of the other routines in this file. */
2729 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2735 result
= (*f
) (x
, data
);
2737 /* Do not traverse sub-expressions. */
2739 else if (result
!= 0)
2740 /* Stop the traversal. */
2744 /* There are no sub-expressions. */
2747 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2751 return for_each_rtx_1 (*x
, i
, f
, data
);
2755 /* Searches X for any reference to REGNO, returning the rtx of the
2756 reference found if any. Otherwise, returns NULL_RTX. */
2759 regno_use_in (unsigned int regno
, rtx x
)
2765 if (REG_P (x
) && REGNO (x
) == regno
)
2768 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2769 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2773 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
2776 else if (fmt
[i
] == 'E')
2777 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2778 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
2785 /* Return a value indicating whether OP, an operand of a commutative
2786 operation, is preferred as the first or second operand. The higher
2787 the value, the stronger the preference for being the first operand.
2788 We use negative values to indicate a preference for the first operand
2789 and positive values for the second operand. */
2792 commutative_operand_precedence (rtx op
)
2794 enum rtx_code code
= GET_CODE (op
);
2796 /* Constants always come the second operand. Prefer "nice" constants. */
2797 if (code
== CONST_INT
)
2799 if (code
== CONST_DOUBLE
)
2801 op
= avoid_constant_pool_reference (op
);
2802 code
= GET_CODE (op
);
2804 switch (GET_RTX_CLASS (code
))
2807 if (code
== CONST_INT
)
2809 if (code
== CONST_DOUBLE
)
2814 /* SUBREGs of objects should come second. */
2815 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
2818 if (!CONSTANT_P (op
))
2821 /* As for RTX_CONST_OBJ. */
2825 /* Complex expressions should be the first, so decrease priority
2829 case RTX_COMM_ARITH
:
2830 /* Prefer operands that are themselves commutative to be first.
2831 This helps to make things linear. In particular,
2832 (and (and (reg) (reg)) (not (reg))) is canonical. */
2836 /* If only one operand is a binary expression, it will be the first
2837 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2838 is canonical, although it will usually be further simplified. */
2842 /* Then prefer NEG and NOT. */
2843 if (code
== NEG
|| code
== NOT
)
2851 /* Return 1 iff it is necessary to swap operands of commutative operation
2852 in order to canonicalize expression. */
2855 swap_commutative_operands_p (rtx x
, rtx y
)
2857 return (commutative_operand_precedence (x
)
2858 < commutative_operand_precedence (y
));
2861 /* Return 1 if X is an autoincrement side effect and the register is
2862 not the stack pointer. */
2866 switch (GET_CODE (x
))
2874 /* There are no REG_INC notes for SP. */
2875 if (XEXP (x
, 0) != stack_pointer_rtx
)
2883 /* Return 1 if the sequence of instructions beginning with FROM and up
2884 to and including TO is safe to move. If NEW_TO is non-NULL, and
2885 the sequence is not already safe to move, but can be easily
2886 extended to a sequence which is safe, then NEW_TO will point to the
2887 end of the extended sequence.
2889 For now, this function only checks that the region contains whole
2890 exception regions, but it could be extended to check additional
2891 conditions as well. */
2894 insns_safe_to_move_p (rtx from
, rtx to
, rtx
*new_to
)
2896 int eh_region_count
= 0;
2900 /* By default, assume the end of the region will be what was
2909 switch (NOTE_LINE_NUMBER (r
))
2911 case NOTE_INSN_EH_REGION_BEG
:
2915 case NOTE_INSN_EH_REGION_END
:
2916 if (eh_region_count
== 0)
2917 /* This sequence of instructions contains the end of
2918 an exception region, but not he beginning. Moving
2919 it will cause chaos. */
2930 /* If we've passed TO, and we see a non-note instruction, we
2931 can't extend the sequence to a movable sequence. */
2937 /* It's OK to move the sequence if there were matched sets of
2938 exception region notes. */
2939 return eh_region_count
== 0;
2944 /* It's OK to move the sequence if there were matched sets of
2945 exception region notes. */
2946 if (past_to_p
&& eh_region_count
== 0)
2952 /* Go to the next instruction. */
2959 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
2961 loc_mentioned_in_p (rtx
*loc
, rtx in
)
2963 enum rtx_code code
= GET_CODE (in
);
2964 const char *fmt
= GET_RTX_FORMAT (code
);
2967 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2969 if (loc
== &in
->u
.fld
[i
].rt_rtx
)
2973 if (loc_mentioned_in_p (loc
, XEXP (in
, i
)))
2976 else if (fmt
[i
] == 'E')
2977 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
2978 if (loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
2984 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
2985 and SUBREG_BYTE, return the bit offset where the subreg begins
2986 (counting from the least significant bit of the operand). */
2989 subreg_lsb_1 (enum machine_mode outer_mode
,
2990 enum machine_mode inner_mode
,
2991 unsigned int subreg_byte
)
2993 unsigned int bitpos
;
2997 /* A paradoxical subreg begins at bit position 0. */
2998 if (GET_MODE_BITSIZE (outer_mode
) > GET_MODE_BITSIZE (inner_mode
))
3001 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
3002 /* If the subreg crosses a word boundary ensure that
3003 it also begins and ends on a word boundary. */
3004 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
3005 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
3006 && (subreg_byte
% UNITS_PER_WORD
3007 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
3009 if (WORDS_BIG_ENDIAN
)
3010 word
= (GET_MODE_SIZE (inner_mode
)
3011 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
3013 word
= subreg_byte
/ UNITS_PER_WORD
;
3014 bitpos
= word
* BITS_PER_WORD
;
3016 if (BYTES_BIG_ENDIAN
)
3017 byte
= (GET_MODE_SIZE (inner_mode
)
3018 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
3020 byte
= subreg_byte
% UNITS_PER_WORD
;
3021 bitpos
+= byte
* BITS_PER_UNIT
;
3026 /* Given a subreg X, return the bit offset where the subreg begins
3027 (counting from the least significant bit of the reg). */
3032 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
3036 /* This function returns the regno offset of a subreg expression.
3037 xregno - A regno of an inner hard subreg_reg (or what will become one).
3038 xmode - The mode of xregno.
3039 offset - The byte offset.
3040 ymode - The mode of a top level SUBREG (or what may become one).
3041 RETURN - The regno offset which would be used. */
3043 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
3044 unsigned int offset
, enum machine_mode ymode
)
3046 int nregs_xmode
, nregs_ymode
, nregs_xmode_unit_int
;
3047 int mode_multiple
, nregs_multiple
;
3049 enum machine_mode xmode_unit
, xmode_unit_int
;
3051 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3053 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3056 xmode_unit
= GET_MODE_INNER (xmode
);
3058 if (FLOAT_MODE_P (xmode_unit
))
3060 xmode_unit_int
= int_mode_for_mode (xmode_unit
);
3061 if (xmode_unit_int
== BLKmode
)
3062 /* It's probably bad to be here; a port should have an integer mode
3063 that's the same size as anything of which it takes a SUBREG. */
3064 xmode_unit_int
= xmode_unit
;
3067 xmode_unit_int
= xmode_unit
;
3069 nregs_xmode_unit_int
= hard_regno_nregs
[xregno
][xmode_unit_int
];
3071 /* Adjust nregs_xmode to allow for 'holes'. */
3072 if (nregs_xmode_unit_int
!= hard_regno_nregs
[xregno
][xmode_unit
])
3073 nregs_xmode
= nregs_xmode_unit_int
* GET_MODE_NUNITS (xmode
);
3075 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3077 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3079 /* If this is a big endian paradoxical subreg, which uses more actual
3080 hard registers than the original register, we must return a negative
3081 offset so that we find the proper highpart of the register. */
3083 && nregs_ymode
> nregs_xmode
3084 && (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3085 ? WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
))
3086 return nregs_xmode
- nregs_ymode
;
3088 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3091 /* Size of ymode must not be greater than the size of xmode. */
3092 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3093 gcc_assert (mode_multiple
!= 0);
3095 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3096 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3097 return (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3100 /* This function returns true when the offset is representable via
3101 subreg_offset in the given regno.
3102 xregno - A regno of an inner hard subreg_reg (or what will become one).
3103 xmode - The mode of xregno.
3104 offset - The byte offset.
3105 ymode - The mode of a top level SUBREG (or what may become one).
3106 RETURN - Whether the offset is representable. */
3108 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3109 unsigned int offset
, enum machine_mode ymode
)
3111 int nregs_xmode
, nregs_ymode
, nregs_xmode_unit
, nregs_xmode_unit_int
;
3112 int mode_multiple
, nregs_multiple
;
3114 enum machine_mode xmode_unit
, xmode_unit_int
;
3116 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3118 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3121 xmode_unit
= GET_MODE_INNER (xmode
);
3123 if (FLOAT_MODE_P (xmode_unit
))
3125 xmode_unit_int
= int_mode_for_mode (xmode_unit
);
3126 if (xmode_unit_int
== BLKmode
)
3127 /* It's probably bad to be here; a port should have an integer mode
3128 that's the same size as anything of which it takes a SUBREG. */
3129 xmode_unit_int
= xmode_unit
;
3132 xmode_unit_int
= xmode_unit
;
3134 nregs_xmode_unit
= hard_regno_nregs
[xregno
][xmode_unit
];
3135 nregs_xmode_unit_int
= hard_regno_nregs
[xregno
][xmode_unit_int
];
3137 /* If there are holes in a non-scalar mode in registers, we expect
3138 that it is made up of its units concatenated together. */
3139 if (nregs_xmode_unit
!= nregs_xmode_unit_int
)
3141 gcc_assert (nregs_xmode_unit
* GET_MODE_NUNITS (xmode
)
3142 == hard_regno_nregs
[xregno
][xmode
]);
3144 /* You can only ask for a SUBREG of a value with holes in the middle
3145 if you don't cross the holes. (Such a SUBREG should be done by
3146 picking a different register class, or doing it in memory if
3147 necessary.) An example of a value with holes is XCmode on 32-bit
3148 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3149 3 for each part, but in memory it's two 128-bit parts.
3150 Padding is assumed to be at the end (not necessarily the 'high part')
3152 if (nregs_xmode_unit
!= nregs_xmode_unit_int
3153 && (offset
/ GET_MODE_SIZE (xmode_unit_int
) + 1
3154 < GET_MODE_NUNITS (xmode
))
3155 && (offset
/ GET_MODE_SIZE (xmode_unit_int
)
3156 != ((offset
+ GET_MODE_SIZE (ymode
) - 1)
3157 / GET_MODE_SIZE (xmode_unit_int
))))
3160 nregs_xmode
= nregs_xmode_unit_int
* GET_MODE_NUNITS (xmode
);
3163 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3165 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3167 /* Paradoxical subregs are otherwise valid. */
3169 && nregs_ymode
> nregs_xmode
3170 && (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3171 ? WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
))
3174 /* Lowpart subregs are otherwise valid. */
3175 if (offset
== subreg_lowpart_offset (ymode
, xmode
))
3178 /* This should always pass, otherwise we don't know how to verify
3179 the constraint. These conditions may be relaxed but
3180 subreg_regno_offset would need to be redesigned. */
3181 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3182 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3184 /* The XMODE value can be seen as a vector of NREGS_XMODE
3185 values. The subreg must represent a lowpart of given field.
3186 Compute what field it is. */
3187 offset
-= subreg_lowpart_offset (ymode
,
3188 mode_for_size (GET_MODE_BITSIZE (xmode
)
3192 /* Size of ymode must not be greater than the size of xmode. */
3193 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3194 gcc_assert (mode_multiple
!= 0);
3196 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3197 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3199 gcc_assert ((offset
% GET_MODE_SIZE (ymode
)) == 0);
3200 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3202 return (!(y_offset
% (mode_multiple
/ nregs_multiple
)));
3205 /* Return the final regno that a subreg expression refers to. */
3207 subreg_regno (rtx x
)
3210 rtx subreg
= SUBREG_REG (x
);
3211 int regno
= REGNO (subreg
);
3213 ret
= regno
+ subreg_regno_offset (regno
,
3220 struct parms_set_data
3226 /* Helper function for noticing stores to parameter registers. */
3228 parms_set (rtx x
, rtx pat ATTRIBUTE_UNUSED
, void *data
)
3230 struct parms_set_data
*d
= data
;
3231 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3232 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3234 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3239 /* Look backward for first parameter to be loaded.
3240 Note that loads of all parameters will not necessarily be
3241 found if CSE has eliminated some of them (e.g., an argument
3242 to the outer function is passed down as a parameter).
3243 Do not skip BOUNDARY. */
3245 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3247 struct parms_set_data parm
;
3248 rtx p
, before
, first_set
;
3250 /* Since different machines initialize their parameter registers
3251 in different orders, assume nothing. Collect the set of all
3252 parameter registers. */
3253 CLEAR_HARD_REG_SET (parm
.regs
);
3255 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3256 if (GET_CODE (XEXP (p
, 0)) == USE
3257 && REG_P (XEXP (XEXP (p
, 0), 0)))
3259 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3261 /* We only care about registers which can hold function
3263 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3266 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3270 first_set
= call_insn
;
3272 /* Search backward for the first set of a register in this set. */
3273 while (parm
.nregs
&& before
!= boundary
)
3275 before
= PREV_INSN (before
);
3277 /* It is possible that some loads got CSEed from one call to
3278 another. Stop in that case. */
3279 if (CALL_P (before
))
3282 /* Our caller needs either ensure that we will find all sets
3283 (in case code has not been optimized yet), or take care
3284 for possible labels in a way by setting boundary to preceding
3286 if (LABEL_P (before
))
3288 gcc_assert (before
== boundary
);
3292 if (INSN_P (before
))
3294 int nregs_old
= parm
.nregs
;
3295 note_stores (PATTERN (before
), parms_set
, &parm
);
3296 /* If we found something that did not set a parameter reg,
3297 we're done. Do not keep going, as that might result
3298 in hoisting an insn before the setting of a pseudo
3299 that is used by the hoisted insn. */
3300 if (nregs_old
!= parm
.nregs
)
3309 /* Return true if we should avoid inserting code between INSN and preceding
3310 call instruction. */
3313 keep_with_call_p (rtx insn
)
3317 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3319 if (REG_P (SET_DEST (set
))
3320 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3321 && fixed_regs
[REGNO (SET_DEST (set
))]
3322 && general_operand (SET_SRC (set
), VOIDmode
))
3324 if (REG_P (SET_SRC (set
))
3325 && FUNCTION_VALUE_REGNO_P (REGNO (SET_SRC (set
)))
3326 && REG_P (SET_DEST (set
))
3327 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3329 /* There may be a stack pop just after the call and before the store
3330 of the return register. Search for the actual store when deciding
3331 if we can break or not. */
3332 if (SET_DEST (set
) == stack_pointer_rtx
)
3334 rtx i2
= next_nonnote_insn (insn
);
3335 if (i2
&& keep_with_call_p (i2
))
3342 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3343 to non-complex jumps. That is, direct unconditional, conditional,
3344 and tablejumps, but not computed jumps or returns. It also does
3345 not apply to the fallthru case of a conditional jump. */
3348 label_is_jump_target_p (rtx label
, rtx jump_insn
)
3350 rtx tmp
= JUMP_LABEL (jump_insn
);
3355 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3357 rtvec vec
= XVEC (PATTERN (tmp
),
3358 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3359 int i
, veclen
= GET_NUM_ELEM (vec
);
3361 for (i
= 0; i
< veclen
; ++i
)
3362 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3370 /* Return an estimate of the cost of computing rtx X.
3371 One use is in cse, to decide which expression to keep in the hash table.
3372 Another is in rtl generation, to pick the cheapest way to multiply.
3373 Other uses like the latter are expected in the future. */
3376 rtx_cost (rtx x
, enum rtx_code outer_code ATTRIBUTE_UNUSED
)
3386 /* Compute the default costs of certain things.
3387 Note that targetm.rtx_costs can override the defaults. */
3389 code
= GET_CODE (x
);
3393 total
= COSTS_N_INSNS (5);
3399 total
= COSTS_N_INSNS (7);
3402 /* Used in loop.c and combine.c as a marker. */
3406 total
= COSTS_N_INSNS (1);
3416 /* If we can't tie these modes, make this expensive. The larger
3417 the mode, the more expensive it is. */
3418 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3419 return COSTS_N_INSNS (2
3420 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
3424 if (targetm
.rtx_costs (x
, code
, outer_code
, &total
))
3429 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3430 which is already in total. */
3432 fmt
= GET_RTX_FORMAT (code
);
3433 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3435 total
+= rtx_cost (XEXP (x
, i
), code
);
3436 else if (fmt
[i
] == 'E')
3437 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3438 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
3443 /* Return cost of address expression X.
3444 Expect that X is properly formed address reference. */
3447 address_cost (rtx x
, enum machine_mode mode
)
3449 /* We may be asked for cost of various unusual addresses, such as operands
3450 of push instruction. It is not worthwhile to complicate writing
3451 of the target hook by such cases. */
3453 if (!memory_address_p (mode
, x
))
3456 return targetm
.address_cost (x
);
3459 /* If the target doesn't override, compute the cost as with arithmetic. */
3462 default_address_cost (rtx x
)
3464 return rtx_cost (x
, MEM
);
3468 unsigned HOST_WIDE_INT
3469 nonzero_bits (rtx x
, enum machine_mode mode
)
3471 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3475 num_sign_bit_copies (rtx x
, enum machine_mode mode
)
3477 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3480 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3481 It avoids exponential behavior in nonzero_bits1 when X has
3482 identical subexpressions on the first or the second level. */
3484 static unsigned HOST_WIDE_INT
3485 cached_nonzero_bits (rtx x
, enum machine_mode mode
, rtx known_x
,
3486 enum machine_mode known_mode
,
3487 unsigned HOST_WIDE_INT known_ret
)
3489 if (x
== known_x
&& mode
== known_mode
)
3492 /* Try to find identical subexpressions. If found call
3493 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3494 precomputed value for the subexpression as KNOWN_RET. */
3496 if (ARITHMETIC_P (x
))
3498 rtx x0
= XEXP (x
, 0);
3499 rtx x1
= XEXP (x
, 1);
3501 /* Check the first level. */
3503 return nonzero_bits1 (x
, mode
, x0
, mode
,
3504 cached_nonzero_bits (x0
, mode
, known_x
,
3505 known_mode
, known_ret
));
3507 /* Check the second level. */
3508 if (ARITHMETIC_P (x0
)
3509 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3510 return nonzero_bits1 (x
, mode
, x1
, mode
,
3511 cached_nonzero_bits (x1
, mode
, known_x
,
3512 known_mode
, known_ret
));
3514 if (ARITHMETIC_P (x1
)
3515 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3516 return nonzero_bits1 (x
, mode
, x0
, mode
,
3517 cached_nonzero_bits (x0
, mode
, known_x
,
3518 known_mode
, known_ret
));
3521 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3524 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3525 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3526 is less useful. We can't allow both, because that results in exponential
3527 run time recursion. There is a nullstone testcase that triggered
3528 this. This macro avoids accidental uses of num_sign_bit_copies. */
3529 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3531 /* Given an expression, X, compute which bits in X can be nonzero.
3532 We don't care about bits outside of those defined in MODE.
3534 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3535 an arithmetic operation, we can do better. */
3537 static unsigned HOST_WIDE_INT
3538 nonzero_bits1 (rtx x
, enum machine_mode mode
, rtx known_x
,
3539 enum machine_mode known_mode
,
3540 unsigned HOST_WIDE_INT known_ret
)
3542 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3543 unsigned HOST_WIDE_INT inner_nz
;
3545 unsigned int mode_width
= GET_MODE_BITSIZE (mode
);
3547 /* For floating-point values, assume all bits are needed. */
3548 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
))
3551 /* If X is wider than MODE, use its mode instead. */
3552 if (GET_MODE_BITSIZE (GET_MODE (x
)) > mode_width
)
3554 mode
= GET_MODE (x
);
3555 nonzero
= GET_MODE_MASK (mode
);
3556 mode_width
= GET_MODE_BITSIZE (mode
);
3559 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3560 /* Our only callers in this case look for single bit values. So
3561 just return the mode mask. Those tests will then be false. */
3564 #ifndef WORD_REGISTER_OPERATIONS
3565 /* If MODE is wider than X, but both are a single word for both the host
3566 and target machines, we can compute this from which bits of the
3567 object might be nonzero in its own mode, taking into account the fact
3568 that on many CISC machines, accessing an object in a wider mode
3569 causes the high-order bits to become undefined. So they are
3570 not known to be zero. */
3572 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3573 && GET_MODE_BITSIZE (GET_MODE (x
)) <= BITS_PER_WORD
3574 && GET_MODE_BITSIZE (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3575 && GET_MODE_BITSIZE (mode
) > GET_MODE_BITSIZE (GET_MODE (x
)))
3577 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
3578 known_x
, known_mode
, known_ret
);
3579 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
3584 code
= GET_CODE (x
);
3588 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3589 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3590 all the bits above ptr_mode are known to be zero. */
3591 if (POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
3593 nonzero
&= GET_MODE_MASK (ptr_mode
);
3596 /* Include declared information about alignment of pointers. */
3597 /* ??? We don't properly preserve REG_POINTER changes across
3598 pointer-to-integer casts, so we can't trust it except for
3599 things that we know must be pointers. See execute/960116-1.c. */
3600 if ((x
== stack_pointer_rtx
3601 || x
== frame_pointer_rtx
3602 || x
== arg_pointer_rtx
)
3603 && REGNO_POINTER_ALIGN (REGNO (x
)))
3605 unsigned HOST_WIDE_INT alignment
3606 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
3608 #ifdef PUSH_ROUNDING
3609 /* If PUSH_ROUNDING is defined, it is possible for the
3610 stack to be momentarily aligned only to that amount,
3611 so we pick the least alignment. */
3612 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
3613 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
3617 nonzero
&= ~(alignment
- 1);
3621 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
3622 rtx
new = rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
3623 known_mode
, known_ret
,
3627 nonzero_for_hook
&= cached_nonzero_bits (new, mode
, known_x
,
3628 known_mode
, known_ret
);
3630 return nonzero_for_hook
;
3634 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3635 /* If X is negative in MODE, sign-extend the value. */
3636 if (INTVAL (x
) > 0 && mode_width
< BITS_PER_WORD
3637 && 0 != (INTVAL (x
) & ((HOST_WIDE_INT
) 1 << (mode_width
- 1))))
3638 return (INTVAL (x
) | ((HOST_WIDE_INT
) (-1) << mode_width
));
3644 #ifdef LOAD_EXTEND_OP
3645 /* In many, if not most, RISC machines, reading a byte from memory
3646 zeros the rest of the register. Noticing that fact saves a lot
3647 of extra zero-extends. */
3648 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
3649 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
3654 case UNEQ
: case LTGT
:
3655 case GT
: case GTU
: case UNGT
:
3656 case LT
: case LTU
: case UNLT
:
3657 case GE
: case GEU
: case UNGE
:
3658 case LE
: case LEU
: case UNLE
:
3659 case UNORDERED
: case ORDERED
:
3660 /* If this produces an integer result, we know which bits are set.
3661 Code here used to clear bits outside the mode of X, but that is
3663 /* Mind that MODE is the mode the caller wants to look at this
3664 operation in, and not the actual operation mode. We can wind
3665 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
3666 that describes the results of a vector compare. */
3667 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
3668 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
3669 nonzero
= STORE_FLAG_VALUE
;
3674 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3675 and num_sign_bit_copies. */
3676 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3677 == GET_MODE_BITSIZE (GET_MODE (x
)))
3681 if (GET_MODE_SIZE (GET_MODE (x
)) < mode_width
)
3682 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
3687 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3688 and num_sign_bit_copies. */
3689 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3690 == GET_MODE_BITSIZE (GET_MODE (x
)))
3696 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
3697 known_x
, known_mode
, known_ret
)
3698 & GET_MODE_MASK (mode
));
3702 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3703 known_x
, known_mode
, known_ret
);
3704 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3705 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3709 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3710 Otherwise, show all the bits in the outer mode but not the inner
3712 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
3713 known_x
, known_mode
, known_ret
);
3714 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3716 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3718 & (((HOST_WIDE_INT
) 1
3719 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0))) - 1))))
3720 inner_nz
|= (GET_MODE_MASK (mode
)
3721 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
3724 nonzero
&= inner_nz
;
3728 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3729 known_x
, known_mode
, known_ret
)
3730 & cached_nonzero_bits (XEXP (x
, 1), mode
,
3731 known_x
, known_mode
, known_ret
);
3735 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
3737 unsigned HOST_WIDE_INT nonzero0
=
3738 cached_nonzero_bits (XEXP (x
, 0), mode
,
3739 known_x
, known_mode
, known_ret
);
3741 /* Don't call nonzero_bits for the second time if it cannot change
3743 if ((nonzero
& nonzero0
) != nonzero
)
3745 | cached_nonzero_bits (XEXP (x
, 1), mode
,
3746 known_x
, known_mode
, known_ret
);
3750 case PLUS
: case MINUS
:
3752 case DIV
: case UDIV
:
3753 case MOD
: case UMOD
:
3754 /* We can apply the rules of arithmetic to compute the number of
3755 high- and low-order zero bits of these operations. We start by
3756 computing the width (position of the highest-order nonzero bit)
3757 and the number of low-order zero bits for each value. */
3759 unsigned HOST_WIDE_INT nz0
=
3760 cached_nonzero_bits (XEXP (x
, 0), mode
,
3761 known_x
, known_mode
, known_ret
);
3762 unsigned HOST_WIDE_INT nz1
=
3763 cached_nonzero_bits (XEXP (x
, 1), mode
,
3764 known_x
, known_mode
, known_ret
);
3765 int sign_index
= GET_MODE_BITSIZE (GET_MODE (x
)) - 1;
3766 int width0
= floor_log2 (nz0
) + 1;
3767 int width1
= floor_log2 (nz1
) + 1;
3768 int low0
= floor_log2 (nz0
& -nz0
);
3769 int low1
= floor_log2 (nz1
& -nz1
);
3770 HOST_WIDE_INT op0_maybe_minusp
3771 = (nz0
& ((HOST_WIDE_INT
) 1 << sign_index
));
3772 HOST_WIDE_INT op1_maybe_minusp
3773 = (nz1
& ((HOST_WIDE_INT
) 1 << sign_index
));
3774 unsigned int result_width
= mode_width
;
3780 result_width
= MAX (width0
, width1
) + 1;
3781 result_low
= MIN (low0
, low1
);
3784 result_low
= MIN (low0
, low1
);
3787 result_width
= width0
+ width1
;
3788 result_low
= low0
+ low1
;
3793 if (! op0_maybe_minusp
&& ! op1_maybe_minusp
)
3794 result_width
= width0
;
3799 result_width
= width0
;
3804 if (! op0_maybe_minusp
&& ! op1_maybe_minusp
)
3805 result_width
= MIN (width0
, width1
);
3806 result_low
= MIN (low0
, low1
);
3811 result_width
= MIN (width0
, width1
);
3812 result_low
= MIN (low0
, low1
);
3818 if (result_width
< mode_width
)
3819 nonzero
&= ((HOST_WIDE_INT
) 1 << result_width
) - 1;
3822 nonzero
&= ~(((HOST_WIDE_INT
) 1 << result_low
) - 1);
3824 #ifdef POINTERS_EXTEND_UNSIGNED
3825 /* If pointers extend unsigned and this is an addition or subtraction
3826 to a pointer in Pmode, all the bits above ptr_mode are known to be
3828 if (POINTERS_EXTEND_UNSIGNED
> 0 && GET_MODE (x
) == Pmode
3829 && (code
== PLUS
|| code
== MINUS
)
3830 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
3831 nonzero
&= GET_MODE_MASK (ptr_mode
);
3837 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
3838 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
3839 nonzero
&= ((HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
3843 /* If this is a SUBREG formed for a promoted variable that has
3844 been zero-extended, we know that at least the high-order bits
3845 are zero, though others might be too. */
3847 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
3848 nonzero
= GET_MODE_MASK (GET_MODE (x
))
3849 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
3850 known_x
, known_mode
, known_ret
);
3852 /* If the inner mode is a single word for both the host and target
3853 machines, we can compute this from which bits of the inner
3854 object might be nonzero. */
3855 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) <= BITS_PER_WORD
3856 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
3857 <= HOST_BITS_PER_WIDE_INT
))
3859 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
3860 known_x
, known_mode
, known_ret
);
3862 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
3863 /* If this is a typical RISC machine, we only have to worry
3864 about the way loads are extended. */
3865 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
3867 & (((unsigned HOST_WIDE_INT
) 1
3868 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) - 1))))
3870 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) != ZERO_EXTEND
)
3871 || !MEM_P (SUBREG_REG (x
)))
3874 /* On many CISC machines, accessing an object in a wider mode
3875 causes the high-order bits to become undefined. So they are
3876 not known to be zero. */
3877 if (GET_MODE_SIZE (GET_MODE (x
))
3878 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3879 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
3880 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x
))));
3889 /* The nonzero bits are in two classes: any bits within MODE
3890 that aren't in GET_MODE (x) are always significant. The rest of the
3891 nonzero bits are those that are significant in the operand of
3892 the shift when shifted the appropriate number of bits. This
3893 shows that high-order bits are cleared by the right shift and
3894 low-order bits by left shifts. */
3895 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
3896 && INTVAL (XEXP (x
, 1)) >= 0
3897 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
3899 enum machine_mode inner_mode
= GET_MODE (x
);
3900 unsigned int width
= GET_MODE_BITSIZE (inner_mode
);
3901 int count
= INTVAL (XEXP (x
, 1));
3902 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
3903 unsigned HOST_WIDE_INT op_nonzero
=
3904 cached_nonzero_bits (XEXP (x
, 0), mode
,
3905 known_x
, known_mode
, known_ret
);
3906 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
3907 unsigned HOST_WIDE_INT outer
= 0;
3909 if (mode_width
> width
)
3910 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
3912 if (code
== LSHIFTRT
)
3914 else if (code
== ASHIFTRT
)
3918 /* If the sign bit may have been nonzero before the shift, we
3919 need to mark all the places it could have been copied to
3920 by the shift as possibly nonzero. */
3921 if (inner
& ((HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
3922 inner
|= (((HOST_WIDE_INT
) 1 << count
) - 1) << (width
- count
);
3924 else if (code
== ASHIFT
)
3927 inner
= ((inner
<< (count
% width
)
3928 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
3930 nonzero
&= (outer
| inner
);
3936 /* This is at most the number of bits in the mode. */
3937 nonzero
= ((HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
3941 /* If CLZ has a known value at zero, then the nonzero bits are
3942 that value, plus the number of bits in the mode minus one. */
3943 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
3944 nonzero
|= ((HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
3950 /* If CTZ has a known value at zero, then the nonzero bits are
3951 that value, plus the number of bits in the mode minus one. */
3952 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
3953 nonzero
|= ((HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
3964 unsigned HOST_WIDE_INT nonzero_true
=
3965 cached_nonzero_bits (XEXP (x
, 1), mode
,
3966 known_x
, known_mode
, known_ret
);
3968 /* Don't call nonzero_bits for the second time if it cannot change
3970 if ((nonzero
& nonzero_true
) != nonzero
)
3971 nonzero
&= nonzero_true
3972 | cached_nonzero_bits (XEXP (x
, 2), mode
,
3973 known_x
, known_mode
, known_ret
);
3984 /* See the macro definition above. */
3985 #undef cached_num_sign_bit_copies
3988 /* The function cached_num_sign_bit_copies is a wrapper around
3989 num_sign_bit_copies1. It avoids exponential behavior in
3990 num_sign_bit_copies1 when X has identical subexpressions on the
3991 first or the second level. */
3994 cached_num_sign_bit_copies (rtx x
, enum machine_mode mode
, rtx known_x
,
3995 enum machine_mode known_mode
,
3996 unsigned int known_ret
)
3998 if (x
== known_x
&& mode
== known_mode
)
4001 /* Try to find identical subexpressions. If found call
4002 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4003 the precomputed value for the subexpression as KNOWN_RET. */
4005 if (ARITHMETIC_P (x
))
4007 rtx x0
= XEXP (x
, 0);
4008 rtx x1
= XEXP (x
, 1);
4010 /* Check the first level. */
4013 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4014 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4018 /* Check the second level. */
4019 if (ARITHMETIC_P (x0
)
4020 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
4022 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
4023 cached_num_sign_bit_copies (x1
, mode
, known_x
,
4027 if (ARITHMETIC_P (x1
)
4028 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
4030 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4031 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4036 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
4039 /* Return the number of bits at the high-order end of X that are known to
4040 be equal to the sign bit. X will be used in mode MODE; if MODE is
4041 VOIDmode, X will be used in its own mode. The returned value will always
4042 be between 1 and the number of bits in MODE. */
4045 num_sign_bit_copies1 (rtx x
, enum machine_mode mode
, rtx known_x
,
4046 enum machine_mode known_mode
,
4047 unsigned int known_ret
)
4049 enum rtx_code code
= GET_CODE (x
);
4050 unsigned int bitwidth
= GET_MODE_BITSIZE (mode
);
4051 int num0
, num1
, result
;
4052 unsigned HOST_WIDE_INT nonzero
;
4054 /* If we weren't given a mode, use the mode of X. If the mode is still
4055 VOIDmode, we don't know anything. Likewise if one of the modes is
4058 if (mode
== VOIDmode
)
4059 mode
= GET_MODE (x
);
4061 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
)))
4064 /* For a smaller object, just ignore the high bits. */
4065 if (bitwidth
< GET_MODE_BITSIZE (GET_MODE (x
)))
4067 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
4068 known_x
, known_mode
, known_ret
);
4070 num0
- (int) (GET_MODE_BITSIZE (GET_MODE (x
)) - bitwidth
));
4073 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_BITSIZE (GET_MODE (x
)))
4075 #ifndef WORD_REGISTER_OPERATIONS
4076 /* If this machine does not do all register operations on the entire
4077 register and MODE is wider than the mode of X, we can say nothing
4078 at all about the high-order bits. */
4081 /* Likewise on machines that do, if the mode of the object is smaller
4082 than a word and loads of that size don't sign extend, we can say
4083 nothing about the high order bits. */
4084 if (GET_MODE_BITSIZE (GET_MODE (x
)) < BITS_PER_WORD
4085 #ifdef LOAD_EXTEND_OP
4086 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
4097 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4098 /* If pointers extend signed and this is a pointer in Pmode, say that
4099 all the bits above ptr_mode are known to be sign bit copies. */
4100 if (! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
&& mode
== Pmode
4102 return GET_MODE_BITSIZE (Pmode
) - GET_MODE_BITSIZE (ptr_mode
) + 1;
4106 unsigned int copies_for_hook
= 1, copies
= 1;
4107 rtx
new = rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
4108 known_mode
, known_ret
,
4112 copies
= cached_num_sign_bit_copies (new, mode
, known_x
,
4113 known_mode
, known_ret
);
4115 if (copies
> 1 || copies_for_hook
> 1)
4116 return MAX (copies
, copies_for_hook
);
4118 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4123 #ifdef LOAD_EXTEND_OP
4124 /* Some RISC machines sign-extend all loads of smaller than a word. */
4125 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
4126 return MAX (1, ((int) bitwidth
4127 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1));
4132 /* If the constant is negative, take its 1's complement and remask.
4133 Then see how many zero bits we have. */
4134 nonzero
= INTVAL (x
) & GET_MODE_MASK (mode
);
4135 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4136 && (nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4137 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4139 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4142 /* If this is a SUBREG for a promoted object that is sign-extended
4143 and we are looking at it in a wider mode, we know that at least the
4144 high-order bits are known to be sign bit copies. */
4146 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4148 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4149 known_x
, known_mode
, known_ret
);
4150 return MAX ((int) bitwidth
4151 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1,
4155 /* For a smaller object, just ignore the high bits. */
4156 if (bitwidth
<= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))))
4158 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4159 known_x
, known_mode
, known_ret
);
4160 return MAX (1, (num0
4161 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4165 #ifdef WORD_REGISTER_OPERATIONS
4166 #ifdef LOAD_EXTEND_OP
4167 /* For paradoxical SUBREGs on machines where all register operations
4168 affect the entire register, just look inside. Note that we are
4169 passing MODE to the recursive call, so the number of sign bit copies
4170 will remain relative to that mode, not the inner mode. */
4172 /* This works only if loads sign extend. Otherwise, if we get a
4173 reload for the inner part, it may be loaded from the stack, and
4174 then we lose all sign bit copies that existed before the store
4177 if ((GET_MODE_SIZE (GET_MODE (x
))
4178 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4179 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4180 && MEM_P (SUBREG_REG (x
)))
4181 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4182 known_x
, known_mode
, known_ret
);
4188 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4189 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4193 return (bitwidth
- GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4194 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4195 known_x
, known_mode
, known_ret
));
4198 /* For a smaller object, just ignore the high bits. */
4199 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4200 known_x
, known_mode
, known_ret
);
4201 return MAX (1, (num0
- (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4205 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4206 known_x
, known_mode
, known_ret
);
4208 case ROTATE
: case ROTATERT
:
4209 /* If we are rotating left by a number of bits less than the number
4210 of sign bit copies, we can just subtract that amount from the
4212 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
4213 && INTVAL (XEXP (x
, 1)) >= 0
4214 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4216 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4217 known_x
, known_mode
, known_ret
);
4218 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4219 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4224 /* In general, this subtracts one sign bit copy. But if the value
4225 is known to be positive, the number of sign bit copies is the
4226 same as that of the input. Finally, if the input has just one bit
4227 that might be nonzero, all the bits are copies of the sign bit. */
4228 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4229 known_x
, known_mode
, known_ret
);
4230 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4231 return num0
> 1 ? num0
- 1 : 1;
4233 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4238 && (((HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4243 case IOR
: case AND
: case XOR
:
4244 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4245 /* Logical operations will preserve the number of sign-bit copies.
4246 MIN and MAX operations always return one of the operands. */
4247 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4248 known_x
, known_mode
, known_ret
);
4249 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4250 known_x
, known_mode
, known_ret
);
4251 return MIN (num0
, num1
);
4253 case PLUS
: case MINUS
:
4254 /* For addition and subtraction, we can have a 1-bit carry. However,
4255 if we are subtracting 1 from a positive number, there will not
4256 be such a carry. Furthermore, if the positive number is known to
4257 be 0 or 1, we know the result is either -1 or 0. */
4259 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4260 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4262 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4263 if ((((HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4264 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4265 : bitwidth
- floor_log2 (nonzero
) - 1);
4268 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4269 known_x
, known_mode
, known_ret
);
4270 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4271 known_x
, known_mode
, known_ret
);
4272 result
= MAX (1, MIN (num0
, num1
) - 1);
4274 #ifdef POINTERS_EXTEND_UNSIGNED
4275 /* If pointers extend signed and this is an addition or subtraction
4276 to a pointer in Pmode, all the bits above ptr_mode are known to be
4278 if (! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4279 && (code
== PLUS
|| code
== MINUS
)
4280 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
4281 result
= MAX ((int) (GET_MODE_BITSIZE (Pmode
)
4282 - GET_MODE_BITSIZE (ptr_mode
) + 1),
4288 /* The number of bits of the product is the sum of the number of
4289 bits of both terms. However, unless one of the terms if known
4290 to be positive, we must allow for an additional bit since negating
4291 a negative number can remove one sign bit copy. */
4293 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4294 known_x
, known_mode
, known_ret
);
4295 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4296 known_x
, known_mode
, known_ret
);
4298 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4300 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4301 || (((nonzero_bits (XEXP (x
, 0), mode
)
4302 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4303 && ((nonzero_bits (XEXP (x
, 1), mode
)
4304 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))))
4307 return MAX (1, result
);
4310 /* The result must be <= the first operand. If the first operand
4311 has the high bit set, we know nothing about the number of sign
4313 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4315 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4316 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4319 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4320 known_x
, known_mode
, known_ret
);
4323 /* The result must be <= the second operand. */
4324 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4325 known_x
, known_mode
, known_ret
);
4328 /* Similar to unsigned division, except that we have to worry about
4329 the case where the divisor is negative, in which case we have
4331 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4332 known_x
, known_mode
, known_ret
);
4334 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4335 || (nonzero_bits (XEXP (x
, 1), mode
)
4336 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4342 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4343 known_x
, known_mode
, known_ret
);
4345 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4346 || (nonzero_bits (XEXP (x
, 1), mode
)
4347 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4353 /* Shifts by a constant add to the number of bits equal to the
4355 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4356 known_x
, known_mode
, known_ret
);
4357 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
4358 && INTVAL (XEXP (x
, 1)) > 0)
4359 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4364 /* Left shifts destroy copies. */
4365 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
4366 || INTVAL (XEXP (x
, 1)) < 0
4367 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
)
4370 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4371 known_x
, known_mode
, known_ret
);
4372 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4375 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4376 known_x
, known_mode
, known_ret
);
4377 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4378 known_x
, known_mode
, known_ret
);
4379 return MIN (num0
, num1
);
4381 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4382 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4383 case GEU
: case GTU
: case LEU
: case LTU
:
4384 case UNORDERED
: case ORDERED
:
4385 /* If the constant is negative, take its 1's complement and remask.
4386 Then see how many zero bits we have. */
4387 nonzero
= STORE_FLAG_VALUE
;
4388 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4389 && (nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4390 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4392 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4398 /* If we haven't been able to figure it out by one of the above rules,
4399 see if some of the high-order bits are known to be zero. If so,
4400 count those bits and return one less than that amount. If we can't
4401 safely compute the mask for this mode, always return BITWIDTH. */
4403 bitwidth
= GET_MODE_BITSIZE (mode
);
4404 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4407 nonzero
= nonzero_bits (x
, mode
);
4408 return nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4409 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4412 /* Calculate the rtx_cost of a single instruction. A return value of
4413 zero indicates an instruction pattern without a known cost. */
4416 insn_rtx_cost (rtx pat
)
4421 /* Extract the single set rtx from the instruction pattern.
4422 We can't use single_set since we only have the pattern. */
4423 if (GET_CODE (pat
) == SET
)
4425 else if (GET_CODE (pat
) == PARALLEL
)
4428 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4430 rtx x
= XVECEXP (pat
, 0, i
);
4431 if (GET_CODE (x
) == SET
)
4444 cost
= rtx_cost (SET_SRC (set
), SET
);
4445 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4448 /* Given an insn INSN and condition COND, return the condition in a
4449 canonical form to simplify testing by callers. Specifically:
4451 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4452 (2) Both operands will be machine operands; (cc0) will have been replaced.
4453 (3) If an operand is a constant, it will be the second operand.
4454 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4455 for GE, GEU, and LEU.
4457 If the condition cannot be understood, or is an inequality floating-point
4458 comparison which needs to be reversed, 0 will be returned.
4460 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4462 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4463 insn used in locating the condition was found. If a replacement test
4464 of the condition is desired, it should be placed in front of that
4465 insn and we will be sure that the inputs are still valid.
4467 If WANT_REG is nonzero, we wish the condition to be relative to that
4468 register, if possible. Therefore, do not canonicalize the condition
4469 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4470 to be a compare to a CC mode register.
4472 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4476 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4477 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4484 int reverse_code
= 0;
4485 enum machine_mode mode
;
4487 code
= GET_CODE (cond
);
4488 mode
= GET_MODE (cond
);
4489 op0
= XEXP (cond
, 0);
4490 op1
= XEXP (cond
, 1);
4493 code
= reversed_comparison_code (cond
, insn
);
4494 if (code
== UNKNOWN
)
4500 /* If we are comparing a register with zero, see if the register is set
4501 in the previous insn to a COMPARE or a comparison operation. Perform
4502 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4505 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4506 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4507 && op1
== CONST0_RTX (GET_MODE (op0
))
4510 /* Set nonzero when we find something of interest. */
4514 /* If comparison with cc0, import actual comparison from compare
4518 if ((prev
= prev_nonnote_insn (prev
)) == 0
4519 || !NONJUMP_INSN_P (prev
)
4520 || (set
= single_set (prev
)) == 0
4521 || SET_DEST (set
) != cc0_rtx
)
4524 op0
= SET_SRC (set
);
4525 op1
= CONST0_RTX (GET_MODE (op0
));
4531 /* If this is a COMPARE, pick up the two things being compared. */
4532 if (GET_CODE (op0
) == COMPARE
)
4534 op1
= XEXP (op0
, 1);
4535 op0
= XEXP (op0
, 0);
4538 else if (!REG_P (op0
))
4541 /* Go back to the previous insn. Stop if it is not an INSN. We also
4542 stop if it isn't a single set or if it has a REG_INC note because
4543 we don't want to bother dealing with it. */
4545 if ((prev
= prev_nonnote_insn (prev
)) == 0
4546 || !NONJUMP_INSN_P (prev
)
4547 || FIND_REG_INC_NOTE (prev
, NULL_RTX
))
4550 set
= set_of (op0
, prev
);
4553 && (GET_CODE (set
) != SET
4554 || !rtx_equal_p (SET_DEST (set
), op0
)))
4557 /* If this is setting OP0, get what it sets it to if it looks
4561 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
4562 #ifdef FLOAT_STORE_FLAG_VALUE
4563 REAL_VALUE_TYPE fsfv
;
4566 /* ??? We may not combine comparisons done in a CCmode with
4567 comparisons not done in a CCmode. This is to aid targets
4568 like Alpha that have an IEEE compliant EQ instruction, and
4569 a non-IEEE compliant BEQ instruction. The use of CCmode is
4570 actually artificial, simply to prevent the combination, but
4571 should not affect other platforms.
4573 However, we must allow VOIDmode comparisons to match either
4574 CCmode or non-CCmode comparison, because some ports have
4575 modeless comparisons inside branch patterns.
4577 ??? This mode check should perhaps look more like the mode check
4578 in simplify_comparison in combine. */
4580 if ((GET_CODE (SET_SRC (set
)) == COMPARE
4583 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4584 && (GET_MODE_BITSIZE (inner_mode
)
4585 <= HOST_BITS_PER_WIDE_INT
)
4586 && (STORE_FLAG_VALUE
4587 & ((HOST_WIDE_INT
) 1
4588 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4589 #ifdef FLOAT_STORE_FLAG_VALUE
4591 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
4592 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4593 REAL_VALUE_NEGATIVE (fsfv
)))
4596 && COMPARISON_P (SET_SRC (set
))))
4597 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4598 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4599 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4601 else if (((code
== EQ
4603 && (GET_MODE_BITSIZE (inner_mode
)
4604 <= HOST_BITS_PER_WIDE_INT
)
4605 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4606 && (STORE_FLAG_VALUE
4607 & ((HOST_WIDE_INT
) 1
4608 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4609 #ifdef FLOAT_STORE_FLAG_VALUE
4611 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
4612 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4613 REAL_VALUE_NEGATIVE (fsfv
)))
4616 && COMPARISON_P (SET_SRC (set
))
4617 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4618 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4619 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4629 else if (reg_set_p (op0
, prev
))
4630 /* If this sets OP0, but not directly, we have to give up. */
4635 /* If the caller is expecting the condition to be valid at INSN,
4636 make sure X doesn't change before INSN. */
4637 if (valid_at_insn_p
)
4638 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
4640 if (COMPARISON_P (x
))
4641 code
= GET_CODE (x
);
4644 code
= reversed_comparison_code (x
, prev
);
4645 if (code
== UNKNOWN
)
4650 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
4656 /* If constant is first, put it last. */
4657 if (CONSTANT_P (op0
))
4658 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
4660 /* If OP0 is the result of a comparison, we weren't able to find what
4661 was really being compared, so fail. */
4663 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
4666 /* Canonicalize any ordered comparison with integers involving equality
4667 if we can do computations in the relevant mode and we do not
4670 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
4671 && GET_CODE (op1
) == CONST_INT
4672 && GET_MODE (op0
) != VOIDmode
4673 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
4675 HOST_WIDE_INT const_val
= INTVAL (op1
);
4676 unsigned HOST_WIDE_INT uconst_val
= const_val
;
4677 unsigned HOST_WIDE_INT max_val
4678 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
4683 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
4684 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
4687 /* When cross-compiling, const_val might be sign-extended from
4688 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4690 if ((HOST_WIDE_INT
) (const_val
& max_val
)
4691 != (((HOST_WIDE_INT
) 1
4692 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
4693 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
4697 if (uconst_val
< max_val
)
4698 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
4702 if (uconst_val
!= 0)
4703 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
4711 /* Never return CC0; return zero instead. */
4715 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
4718 /* Given a jump insn JUMP, return the condition that will cause it to branch
4719 to its JUMP_LABEL. If the condition cannot be understood, or is an
4720 inequality floating-point comparison which needs to be reversed, 0 will
4723 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4724 insn used in locating the condition was found. If a replacement test
4725 of the condition is desired, it should be placed in front of that
4726 insn and we will be sure that the inputs are still valid. If EARLIEST
4727 is null, the returned condition will be valid at INSN.
4729 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4730 compare CC mode register.
4732 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4735 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
4741 /* If this is not a standard conditional jump, we can't parse it. */
4743 || ! any_condjump_p (jump
))
4745 set
= pc_set (jump
);
4747 cond
= XEXP (SET_SRC (set
), 0);
4749 /* If this branches to JUMP_LABEL when the condition is false, reverse
4752 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
4753 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
4755 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
4756 allow_cc_mode
, valid_at_insn_p
);
4760 /* Initialize non_rtx_starting_operands, which is used to speed up
4766 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
4768 const char *format
= GET_RTX_FORMAT (i
);
4769 const char *first
= strpbrk (format
, "eEV");
4770 non_rtx_starting_operands
[i
] = first
? first
- format
: -1;