gcc/regs.h

   1 /* Define per-register tables for data flow info and register allocation.
   2    Copyright (C) 1987-2013 Free Software Foundation, Inc.
   3
   4 This file is part of GCC.
   5
   6 GCC is free software; you can redistribute it and/or modify it under
   7 the terms of the GNU General Public License as published by the Free
   8 Software Foundation; either version 3, or (at your option) any later
   9 version.
  10
  11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14 for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with GCC; see the file COPYING3.  If not see
  18 <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef GCC_REGS_H
  21 #define GCC_REGS_H
  22
  23 #include "machmode.h"
  24 #include "hard-reg-set.h"
  25 #include "rtl.h"
  26
  27 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
  28
  29 /* When you only have the mode of a pseudo register before it has a hard
  30    register chosen for it, this reports the size of each hard register
  31    a pseudo in such a mode would get allocated to.  A target may
  32    override this.  */
  33
  34 #ifndef REGMODE_NATURAL_SIZE
  35 #define REGMODE_NATURAL_SIZE(MODE)      UNITS_PER_WORD
  36 #endif
  37
  38 /* Maximum register number used in this function, plus one.  */
  39
  40 extern int max_regno;
  41
  42 /* REG_N_REFS and REG_N_SETS are initialized by a call to
  43    regstat_init_n_sets_and_refs from the current values of
  44    DF_REG_DEF_COUNT and DF_REG_USE_COUNT.  REG_N_REFS and REG_N_SETS
  45    should only be used if a pass need to change these values in some
  46    magical way or the pass needs to have accurate values for these
  47    and is not using incremental df scanning.
  48
  49    At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
  50    should be made to regstat_free_n_sets_and_refs.
  51
  52    Local alloc seems to play pretty loose with these values.
  53    REG_N_REFS is set to 0 if the register is used in an asm.
  54    Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
  55    REG_N_SETS for three address insns.  Other passes seem to have
  56    other special values.  */
  57
  58
  59
  60 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
  61
  62 struct regstat_n_sets_and_refs_t
  63 {
  64   int sets;                     /* # of times (REG n) is set */
  65   int refs;                     /* # of times (REG n) is used or set */
  66 };
  67
  68 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
  69
  70 /* Indexed by n, gives number of times (REG n) is used or set.  */
  71 static inline int
  72 REG_N_REFS(int regno)
  73 {
  74   return regstat_n_sets_and_refs[regno].refs;
  75 }
  76
  77 /* Indexed by n, gives number of times (REG n) is used or set.  */
  78 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
  79 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
  80
  81 /* Indexed by n, gives number of times (REG n) is set.  */
  82 static inline int
  83 REG_N_SETS (int regno)
  84 {
  85   return regstat_n_sets_and_refs[regno].sets;
  86 }
  87
  88 /* Indexed by n, gives number of times (REG n) is set.  */
  89 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
  90 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
  91
  92 /* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise.  */
  93 extern bool reg_is_parm_p (rtx);
  94
  95 /* Functions defined in regstat.c.  */
  96 extern void regstat_init_n_sets_and_refs (void);
  97 extern void regstat_free_n_sets_and_refs (void);
  98 extern void regstat_compute_ri (void);
  99 extern void regstat_free_ri (void);
 100 extern bitmap regstat_get_setjmp_crosses (void);
 101 extern void regstat_compute_calls_crossed (void);
 102 extern void regstat_free_calls_crossed (void);
 103 extern void dump_reg_info (FILE *);
 104
 105 /* Register information indexed by register number.  This structure is
 106    initialized by calling regstat_compute_ri and is destroyed by
 107    calling regstat_free_ri.  */
 108 struct reg_info_t
 109 {
 110   int freq;                     /* # estimated frequency (REG n) is used or set */
 111   int deaths;                   /* # of times (REG n) dies */
 112   int live_length;              /* # of instructions (REG n) is live */
 113   int calls_crossed;            /* # of calls (REG n) is live across */
 114   int freq_calls_crossed;       /* # estimated frequency (REG n) crosses call */
 115   int throw_calls_crossed;      /* # of calls that may throw (REG n) is live across */
 116   int basic_block;              /* # of basic blocks (REG n) is used in */
 117 };
 118
 119 extern struct reg_info_t *reg_info_p;
 120
 121 /* The number allocated elements of reg_info_p.  */
 122 extern size_t reg_info_p_size;
 123
 124 /* Estimate frequency of references to register N.  */
 125
 126 #define REG_FREQ(N) (reg_info_p[N].freq)
 127
 128 /* The weights for each insn varies from 0 to REG_FREQ_BASE.
 129    This constant does not need to be high, as in infrequently executed
 130    regions we want to count instructions equivalently to optimize for
 131    size instead of speed.  */
 132 #define REG_FREQ_MAX 1000
 133
 134 /* Compute register frequency from the BB frequency.  When optimizing for size,
 135    or profile driven feedback is available and the function is never executed,
 136    frequency is always equivalent.  Otherwise rescale the basic block
 137    frequency.  */
 138 #define REG_FREQ_FROM_BB(bb) (optimize_size                                   \
 139                               || (flag_branch_probabilities                   \
 140                                   && !ENTRY_BLOCK_PTR->count)                 \
 141                               ? REG_FREQ_MAX                                  \
 142                               : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
 143                               ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
 144                               : 1)
 145
 146 /* Indexed by N, gives number of insns in which register N dies.
 147    Note that if register N is live around loops, it can die
 148    in transitions between basic blocks, and that is not counted here.
 149    So this is only a reliable indicator of how many regions of life there are
 150    for registers that are contained in one basic block.  */
 151
 152 #define REG_N_DEATHS(N) (reg_info_p[N].deaths)
 153
 154 /* Get the number of consecutive words required to hold pseudo-reg N.  */
 155
 156 #define PSEUDO_REGNO_SIZE(N) \
 157   ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1)         \
 158    / UNITS_PER_WORD)
 159
 160 /* Get the number of bytes required to hold pseudo-reg N.  */
 161
 162 #define PSEUDO_REGNO_BYTES(N) \
 163   GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
 164
 165 /* Get the machine mode of pseudo-reg N.  */
 166
 167 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
 168
 169 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */
 170
 171 #define REG_N_CALLS_CROSSED(N)  (reg_info_p[N].calls_crossed)
 172 #define REG_FREQ_CALLS_CROSSED(N)  (reg_info_p[N].freq_calls_crossed)
 173
 174 /* Indexed by N, gives number of CALL_INSNS that may throw, across which
 175    (REG n) is live.  */
 176
 177 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
 178
 179 /* Total number of instructions at which (REG n) is live.
 180
 181    This is set in regstat.c whenever register info is requested and
 182    remains valid for the rest of the compilation of the function; it is
 183    used to control register allocation.  The larger this is, the less
 184    priority (REG n) gets for allocation in a hard register (in IRA in
 185    priority-coloring mode).
 186
 187    Negative values are special: -1 is used to mark a pseudo reg that
 188    should not be allocated to a hard register, because it crosses a
 189    setjmp call.  */
 190
 191 #define REG_LIVE_LENGTH(N)  (reg_info_p[N].live_length)
 192
 193 /* Indexed by n, gives number of basic block that  (REG n) is used in.
 194    If the value is REG_BLOCK_GLOBAL (-1),
 195    it means (REG n) is used in more than one basic block.
 196    REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
 197    This information remains valid for the rest of the compilation
 198    of the current function; it is used to control register allocation.  */
 199
 200 #define REG_BLOCK_UNKNOWN 0
 201 #define REG_BLOCK_GLOBAL -1
 202
 203 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
 204
 205 /* Vector of substitutions of register numbers,
 206    used to map pseudo regs into hardware regs.
 207
 208    This can't be folded into reg_n_info without changing all of the
 209    machine dependent directories, since the reload functions
 210    in the machine dependent files access it.  */
 211
 212 extern short *reg_renumber;
 213
 214 /* Flag set by local-alloc or global-alloc if they decide to allocate
 215    something in a call-clobbered register.  */
 216
 217 extern int caller_save_needed;
 218
 219 /* Predicate to decide whether to give a hard reg to a pseudo which
 220    is referenced REFS times and would need to be saved and restored
 221    around a call CALLS times.  */
 222
 223 #ifndef CALLER_SAVE_PROFITABLE
 224 #define CALLER_SAVE_PROFITABLE(REFS, CALLS)  (4 * (CALLS) < (REFS))
 225 #endif
 226
 227 /* Select a register mode required for caller save of hard regno REGNO.  */
 228 #ifndef HARD_REGNO_CALLER_SAVE_MODE
 229 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
 230   choose_hard_reg_mode (REGNO, NREGS, false)
 231 #endif
 232
 233 /* Registers that get partially clobbered by a call in a given mode.
 234    These must not be call used registers.  */
 235 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
 236 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
 237 #endif
 238
 239 /* Target-dependent globals.  */
 240 struct target_regs {
 241   /* For each starting hard register, the number of consecutive hard
 242      registers that a given machine mode occupies.  */
 243   unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
 244
 245   /* For each hard register, the widest mode object that it can contain.
 246      This will be a MODE_INT mode if the register can hold integers.  Otherwise
 247      it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
 248      register.  */
 249   enum machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
 250
 251   /* Vector indexed by machine mode saying whether there are regs of
 252      that mode.  */
 253   bool x_have_regs_of_mode[MAX_MACHINE_MODE];
 254
 255   /* 1 if the corresponding class contains a register of the given mode.  */
 256   char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
 257
 258   /* Record for each mode whether we can move a register directly to or
 259      from an object of that mode in memory.  If we can't, we won't try
 260      to use that mode directly when accessing a field of that mode.  */
 261   char x_direct_load[NUM_MACHINE_MODES];
 262   char x_direct_store[NUM_MACHINE_MODES];
 263
 264   /* Record for each mode whether we can float-extend from memory.  */
 265   bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
 266 };
 267
 268 extern struct target_regs default_target_regs;
 269 #if SWITCHABLE_TARGET
 270 extern struct target_regs *this_target_regs;
 271 #else
 272 #define this_target_regs (&default_target_regs)
 273 #endif
 274
 275 #define hard_regno_nregs \
 276   (this_target_regs->x_hard_regno_nregs)
 277 #define reg_raw_mode \
 278   (this_target_regs->x_reg_raw_mode)
 279 #define have_regs_of_mode \
 280   (this_target_regs->x_have_regs_of_mode)
 281 #define contains_reg_of_mode \
 282   (this_target_regs->x_contains_reg_of_mode)
 283 #define direct_load \
 284   (this_target_regs->x_direct_load)
 285 #define direct_store \
 286   (this_target_regs->x_direct_store)
 287 #define float_extend_from_mem \
 288   (this_target_regs->x_float_extend_from_mem)
 289
 290 /* Return an exclusive upper bound on the registers occupied by hard
 291    register (reg:MODE REGNO).  */
 292
 293 static inline unsigned int
 294 end_hard_regno (enum machine_mode mode, unsigned int regno)
 295 {
 296   return regno + hard_regno_nregs[regno][(int) mode];
 297 }
 298
 299 /* Likewise for hard register X.  */
 300
 301 #define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X))
 302
 303 /* Likewise for hard or pseudo register X.  */
 304
 305 #define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1)
 306
 307 /* Add to REGS all the registers required to store a value of mode MODE
 308    in register REGNO.  */
 309
 310 static inline void
 311 add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
 312                      unsigned int regno)
 313 {
 314   unsigned int end_regno;
 315
 316   end_regno = end_hard_regno (mode, regno);
 317   do
 318     SET_HARD_REG_BIT (*regs, regno);
 319   while (++regno < end_regno);
 320 }
 321
 322 /* Likewise, but remove the registers.  */
 323
 324 static inline void
 325 remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
 326                           unsigned int regno)
 327 {
 328   unsigned int end_regno;
 329
 330   end_regno = end_hard_regno (mode, regno);
 331   do
 332     CLEAR_HARD_REG_BIT (*regs, regno);
 333   while (++regno < end_regno);
 334 }
 335
 336 /* Return true if REGS contains the whole of (reg:MODE REGNO).  */
 337
 338 static inline bool
 339 in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
 340                    unsigned int regno)
 341 {
 342   unsigned int end_regno;
 343
 344   gcc_assert (HARD_REGISTER_NUM_P (regno));
 345
 346   if (!TEST_HARD_REG_BIT (regs, regno))
 347     return false;
 348
 349   end_regno = end_hard_regno (mode, regno);
 350
 351   if (!HARD_REGISTER_NUM_P (end_regno - 1))
 352     return false;
 353
 354   while (++regno < end_regno)
 355     if (!TEST_HARD_REG_BIT (regs, regno))
 356       return false;
 357
 358   return true;
 359 }
 360
 361 /* Return true if (reg:MODE REGNO) includes an element of REGS.  */
 362
 363 static inline bool
 364 overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
 365                          unsigned int regno)
 366 {
 367   unsigned int end_regno;
 368
 369   if (TEST_HARD_REG_BIT (regs, regno))
 370     return true;
 371
 372   end_regno = end_hard_regno (mode, regno);
 373   while (++regno < end_regno)
 374     if (TEST_HARD_REG_BIT (regs, regno))
 375       return true;
 376
 377   return false;
 378 }
 379
 380 /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
 381    REGNO and MODE.  */
 382
 383 static inline void
 384 add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
 385                            int nregs)
 386 {
 387   while (nregs-- > 0)
 388     SET_HARD_REG_BIT (*regs, regno + nregs);
 389 }
 390
 391 /* Likewise, but remove the registers.  */
 392
 393 static inline void
 394 remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
 395                                 int nregs)
 396 {
 397   while (nregs-- > 0)
 398     CLEAR_HARD_REG_BIT (*regs, regno + nregs);
 399 }
 400
 401 /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
 402    REGNO and MODE.  */
 403 static inline bool
 404 range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
 405                                int nregs)
 406 {
 407   while (nregs-- > 0)
 408     if (TEST_HARD_REG_BIT (set, regno + nregs))
 409       return true;
 410   return false;
 411 }
 412
 413 /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
 414    REGNO and MODE.  */
 415 static inline bool
 416 range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
 417 {
 418   while (nregs-- > 0)
 419     if (!TEST_HARD_REG_BIT (set, regno + nregs))
 420       return false;
 421   return true;
 422 }
 423
 424 #endif /* GCC_REGS_H */