1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
48 #ifndef MAX_CONDITIONAL_EXECUTE
49 #define MAX_CONDITIONAL_EXECUTE \
50 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
54 #define IFCVT_MULTIPLE_DUMPS 1
56 #define NULL_BLOCK ((basic_block) NULL)
58 /* True if after combine pass. */
59 static bool ifcvt_after_combine
;
61 /* True if the target has the cbranchcc4 optab. */
62 static bool have_cbranchcc4
;
64 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
65 static int num_possible_if_blocks
;
67 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
69 static int num_updated_if_blocks
;
71 /* # of changes made. */
72 static int num_true_changes
;
74 /* Whether conditional execution changes were made. */
75 static int cond_exec_changed_p
;
77 /* Forward references. */
78 static int count_bb_insns (const_basic_block
);
79 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
80 static rtx_insn
*first_active_insn (basic_block
);
81 static rtx_insn
*last_active_insn (basic_block
, int);
82 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
83 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
84 static basic_block
block_fallthru (basic_block
);
85 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
87 static rtx
cond_exec_get_condition (rtx_insn
*);
88 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
89 static int noce_operand_ok (const_rtx
);
90 static void merge_if_block (ce_if_block
*);
91 static int find_cond_trap (basic_block
, edge
, edge
);
92 static basic_block
find_if_header (basic_block
, int);
93 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
94 static int noce_find_if_block (basic_block
, edge
, edge
, int);
95 static int cond_exec_find_if_block (ce_if_block
*);
96 static int find_if_case_1 (basic_block
, edge
, edge
);
97 static int find_if_case_2 (basic_block
, edge
, edge
);
98 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
100 static void noce_emit_move_insn (rtx
, rtx
);
101 static rtx_insn
*block_has_only_trap (basic_block
);
103 /* Count the number of non-jump active insns in BB. */
106 count_bb_insns (const_basic_block bb
)
109 rtx_insn
*insn
= BB_HEAD (bb
);
113 if (active_insn_p (insn
) && !JUMP_P (insn
))
116 if (insn
== BB_END (bb
))
118 insn
= NEXT_INSN (insn
);
124 /* Determine whether the total insn_rtx_cost on non-jump insns in
125 basic block BB is less than MAX_COST. This function returns
126 false if the cost of any instruction could not be estimated.
128 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
129 as those insns are being speculated. MAX_COST is scaled with SCALE
130 plus a small fudge factor. */
133 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
136 rtx_insn
*insn
= BB_HEAD (bb
);
137 bool speed
= optimize_bb_for_speed_p (bb
);
139 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
140 applied to insn_rtx_cost when optimizing for size. Only do
141 this after combine because if-conversion might interfere with
142 passes before combine.
144 Use optimize_function_for_speed_p instead of the pre-defined
145 variable speed to make sure it is set to same value for all
146 basic blocks in one if-conversion transformation. */
147 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
148 scale
= REG_BR_PROB_BASE
;
149 /* Our branch probability/scaling factors are just estimates and don't
150 account for cases where we can get speculation for free and other
151 secondary benefits. So we fudge the scale factor to make speculating
152 appear a little more profitable when optimizing for performance. */
154 scale
+= REG_BR_PROB_BASE
/ 8;
161 if (NONJUMP_INSN_P (insn
))
163 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
167 /* If this instruction is the load or set of a "stack" register,
168 such as a floating point register on x87, then the cost of
169 speculatively executing this insn may need to include
170 the additional cost of popping its result off of the
171 register stack. Unfortunately, correctly recognizing and
172 accounting for this additional overhead is tricky, so for
173 now we simply prohibit such speculative execution. */
176 rtx set
= single_set (insn
);
177 if (set
&& STACK_REG_P (SET_DEST (set
)))
183 if (count
>= max_cost
)
186 else if (CALL_P (insn
))
189 if (insn
== BB_END (bb
))
191 insn
= NEXT_INSN (insn
);
197 /* Return the first non-jump active insn in the basic block. */
200 first_active_insn (basic_block bb
)
202 rtx_insn
*insn
= BB_HEAD (bb
);
206 if (insn
== BB_END (bb
))
208 insn
= NEXT_INSN (insn
);
211 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
213 if (insn
== BB_END (bb
))
215 insn
= NEXT_INSN (insn
);
224 /* Return the last non-jump active (non-jump) insn in the basic block. */
227 last_active_insn (basic_block bb
, int skip_use_p
)
229 rtx_insn
*insn
= BB_END (bb
);
230 rtx_insn
*head
= BB_HEAD (bb
);
234 || DEBUG_INSN_P (insn
)
236 && NONJUMP_INSN_P (insn
)
237 && GET_CODE (PATTERN (insn
)) == USE
))
241 insn
= PREV_INSN (insn
);
250 /* Return the active insn before INSN inside basic block CURR_BB. */
253 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
255 if (!insn
|| insn
== BB_HEAD (curr_bb
))
258 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
260 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
263 /* No other active insn all the way to the start of the basic block. */
264 if (insn
== BB_HEAD (curr_bb
))
271 /* Return the active insn after INSN inside basic block CURR_BB. */
274 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
276 if (!insn
|| insn
== BB_END (curr_bb
))
279 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
281 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
284 /* No other active insn all the way to the end of the basic block. */
285 if (insn
== BB_END (curr_bb
))
292 /* Return the basic block reached by falling though the basic block BB. */
295 block_fallthru (basic_block bb
)
297 edge e
= find_fallthru_edge (bb
->succs
);
299 return (e
) ? e
->dest
: NULL_BLOCK
;
302 /* Return true if RTXs A and B can be safely interchanged. */
305 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
307 if (!rtx_equal_p (a
, b
))
310 if (GET_CODE (a
) != MEM
)
313 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
314 reference is not. Interchanging a dead type-unsafe memory reference with
315 a live type-safe one creates a live type-unsafe memory reference, in other
316 words, it makes the program illegal.
317 We check here conservatively whether the two memory references have equal
318 memory attributes. */
320 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
324 /* Go through a bunch of insns, converting them to conditional
325 execution format if possible. Return TRUE if all of the non-note
326 insns were processed. */
329 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
330 /* if block information */rtx_insn
*start
,
331 /* first insn to look at */rtx end
,
332 /* last insn to look at */rtx test
,
333 /* conditional execution test */int prob_val
,
334 /* probability of branch taken. */int mod_ok
)
336 int must_be_last
= FALSE
;
344 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
346 /* dwarf2out can't cope with conditional prologues. */
347 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
350 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
353 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
355 /* dwarf2out can't cope with conditional unwind info. */
356 if (RTX_FRAME_RELATED_P (insn
))
359 /* Remove USE insns that get in the way. */
360 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
362 /* ??? Ug. Actually unlinking the thing is problematic,
363 given what we'd have to coordinate with our callers. */
364 SET_INSN_DELETED (insn
);
368 /* Last insn wasn't last? */
372 if (modified_in_p (test
, insn
))
379 /* Now build the conditional form of the instruction. */
380 pattern
= PATTERN (insn
);
381 xtest
= copy_rtx (test
);
383 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
385 if (GET_CODE (pattern
) == COND_EXEC
)
387 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
390 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
391 COND_EXEC_TEST (pattern
));
392 pattern
= COND_EXEC_CODE (pattern
);
395 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
397 /* If the machine needs to modify the insn being conditionally executed,
398 say for example to force a constant integer operand into a temp
399 register, do so here. */
400 #ifdef IFCVT_MODIFY_INSN
401 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
406 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
408 if (CALL_P (insn
) && prob_val
>= 0)
409 validate_change (insn
, ®_NOTES (insn
),
410 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
411 prob_val
, REG_NOTES (insn
)), 1);
421 /* Return the condition for a jump. Do not do any special processing. */
424 cond_exec_get_condition (rtx_insn
*jump
)
428 if (any_condjump_p (jump
))
429 test_if
= SET_SRC (pc_set (jump
));
432 cond
= XEXP (test_if
, 0);
434 /* If this branches to JUMP_LABEL when the condition is false,
435 reverse the condition. */
436 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
437 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
439 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
443 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
450 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
451 to conditional execution. Return TRUE if we were successful at
452 converting the block. */
455 cond_exec_process_if_block (ce_if_block
* ce_info
,
456 /* if block information */int do_multiple_p
)
458 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
459 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
460 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
461 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
462 rtx_insn
*then_start
; /* first insn in THEN block */
463 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
464 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
465 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
466 int max
; /* max # of insns to convert. */
467 int then_mod_ok
; /* whether conditional mods are ok in THEN */
468 rtx true_expr
; /* test for else block insns */
469 rtx false_expr
; /* test for then block insns */
470 int true_prob_val
; /* probability of else block */
471 int false_prob_val
; /* probability of then block */
472 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
473 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
474 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
475 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
476 int then_n_insns
, else_n_insns
, n_insns
;
477 enum rtx_code false_code
;
480 /* If test is comprised of && or || elements, and we've failed at handling
481 all of them together, just use the last test if it is the special case of
482 && elements without an ELSE block. */
483 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
485 if (else_bb
|| ! ce_info
->and_and_p
)
488 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
489 ce_info
->num_multiple_test_blocks
= 0;
490 ce_info
->num_and_and_blocks
= 0;
491 ce_info
->num_or_or_blocks
= 0;
494 /* Find the conditional jump to the ELSE or JOIN part, and isolate
496 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
500 /* If the conditional jump is more than just a conditional jump,
501 then we can not do conditional execution conversion on this block. */
502 if (! onlyjump_p (BB_END (test_bb
)))
505 /* Collect the bounds of where we're to search, skipping any labels, jumps
506 and notes at the beginning and end of the block. Then count the total
507 number of insns and see if it is small enough to convert. */
508 then_start
= first_active_insn (then_bb
);
509 then_end
= last_active_insn (then_bb
, TRUE
);
510 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
511 n_insns
= then_n_insns
;
512 max
= MAX_CONDITIONAL_EXECUTE
;
519 else_start
= first_active_insn (else_bb
);
520 else_end
= last_active_insn (else_bb
, TRUE
);
521 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
522 n_insns
+= else_n_insns
;
524 /* Look for matching sequences at the head and tail of the two blocks,
525 and limit the range of insns to be converted if possible. */
526 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
527 &then_first_tail
, &else_first_tail
,
529 if (then_first_tail
== BB_HEAD (then_bb
))
530 then_start
= then_end
= NULL
;
531 if (else_first_tail
== BB_HEAD (else_bb
))
532 else_start
= else_end
= NULL
;
537 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
539 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
540 n_insns
-= 2 * n_matching
;
545 && then_n_insns
> n_matching
546 && else_n_insns
> n_matching
)
548 int longest_match
= MIN (then_n_insns
- n_matching
,
549 else_n_insns
- n_matching
);
551 = flow_find_head_matching_sequence (then_bb
, else_bb
,
560 /* We won't pass the insns in the head sequence to
561 cond_exec_process_insns, so we need to test them here
562 to make sure that they don't clobber the condition. */
563 for (insn
= BB_HEAD (then_bb
);
564 insn
!= NEXT_INSN (then_last_head
);
565 insn
= NEXT_INSN (insn
))
566 if (!LABEL_P (insn
) && !NOTE_P (insn
)
567 && !DEBUG_INSN_P (insn
)
568 && modified_in_p (test_expr
, insn
))
572 if (then_last_head
== then_end
)
573 then_start
= then_end
= NULL
;
574 if (else_last_head
== else_end
)
575 else_start
= else_end
= NULL
;
580 then_start
= find_active_insn_after (then_bb
, then_last_head
);
582 else_start
= find_active_insn_after (else_bb
, else_last_head
);
583 n_insns
-= 2 * n_matching
;
591 /* Map test_expr/test_jump into the appropriate MD tests to use on
592 the conditionally executed code. */
594 true_expr
= test_expr
;
596 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
597 if (false_code
!= UNKNOWN
)
598 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
599 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
601 false_expr
= NULL_RTX
;
603 #ifdef IFCVT_MODIFY_TESTS
604 /* If the machine description needs to modify the tests, such as setting a
605 conditional execution register from a comparison, it can do so here. */
606 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
608 /* See if the conversion failed. */
609 if (!true_expr
|| !false_expr
)
613 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
616 true_prob_val
= XINT (note
, 0);
617 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
625 /* If we have && or || tests, do them here. These tests are in the adjacent
626 blocks after the first block containing the test. */
627 if (ce_info
->num_multiple_test_blocks
> 0)
629 basic_block bb
= test_bb
;
630 basic_block last_test_bb
= ce_info
->last_test_bb
;
637 rtx_insn
*start
, *end
;
639 enum rtx_code f_code
;
641 bb
= block_fallthru (bb
);
642 start
= first_active_insn (bb
);
643 end
= last_active_insn (bb
, TRUE
);
645 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
646 false_prob_val
, FALSE
))
649 /* If the conditional jump is more than just a conditional jump, then
650 we can not do conditional execution conversion on this block. */
651 if (! onlyjump_p (BB_END (bb
)))
654 /* Find the conditional jump and isolate the test. */
655 t
= cond_exec_get_condition (BB_END (bb
));
659 f_code
= reversed_comparison_code (t
, BB_END (bb
));
660 if (f_code
== UNKNOWN
)
663 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
664 if (ce_info
->and_and_p
)
666 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
667 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
671 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
672 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
675 /* If the machine description needs to modify the tests, such as
676 setting a conditional execution register from a comparison, it can
678 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
679 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
681 /* See if the conversion failed. */
689 while (bb
!= last_test_bb
);
692 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
693 on then THEN block. */
694 then_mod_ok
= (else_bb
== NULL_BLOCK
);
696 /* Go through the THEN and ELSE blocks converting the insns if possible
697 to conditional execution. */
701 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
702 false_expr
, false_prob_val
,
706 if (else_bb
&& else_end
707 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
708 true_expr
, true_prob_val
, TRUE
))
711 /* If we cannot apply the changes, fail. Do not go through the normal fail
712 processing, since apply_change_group will call cancel_changes. */
713 if (! apply_change_group ())
715 #ifdef IFCVT_MODIFY_CANCEL
716 /* Cancel any machine dependent changes. */
717 IFCVT_MODIFY_CANCEL (ce_info
);
722 #ifdef IFCVT_MODIFY_FINAL
723 /* Do any machine dependent final modifications. */
724 IFCVT_MODIFY_FINAL (ce_info
);
727 /* Conversion succeeded. */
729 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
730 n_insns
, (n_insns
== 1) ? " was" : "s were");
732 /* Merge the blocks! If we had matching sequences, make sure to delete one
733 copy at the appropriate location first: delete the copy in the THEN branch
734 for a tail sequence so that the remaining one is executed last for both
735 branches, and delete the copy in the ELSE branch for a head sequence so
736 that the remaining one is executed first for both branches. */
739 rtx_insn
*from
= then_first_tail
;
741 from
= find_active_insn_after (then_bb
, from
);
742 delete_insn_chain (from
, BB_END (then_bb
), false);
745 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
747 merge_if_block (ce_info
);
748 cond_exec_changed_p
= TRUE
;
752 #ifdef IFCVT_MODIFY_CANCEL
753 /* Cancel any machine dependent changes. */
754 IFCVT_MODIFY_CANCEL (ce_info
);
761 /* Used by noce_process_if_block to communicate with its subroutines.
763 The subroutines know that A and B may be evaluated freely. They
764 know that X is a register. They should insert new instructions
765 before cond_earliest. */
769 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
770 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
772 /* The jump that ends TEST_BB. */
775 /* The jump condition. */
778 /* New insns should be inserted before this one. */
779 rtx_insn
*cond_earliest
;
781 /* Insns in the THEN and ELSE block. There is always just this
782 one insns in those blocks. The insns are single_set insns.
783 If there was no ELSE block, INSN_B is the last insn before
784 COND_EARLIEST, or NULL_RTX. In the former case, the insn
785 operands are still valid, as if INSN_B was moved down below
787 rtx_insn
*insn_a
, *insn_b
;
789 /* The SET_SRC of INSN_A and INSN_B. */
792 /* The SET_DEST of INSN_A. */
795 /* True if this if block is not canonical. In the canonical form of
796 if blocks, the THEN_BB is the block reached via the fallthru edge
797 from TEST_BB. For the noce transformations, we allow the symmetric
799 bool then_else_reversed
;
801 /* True if the contents of then_bb and else_bb are a
802 simple single set instruction. */
806 /* The total rtx cost of the instructions in then_bb and else_bb. */
807 unsigned int then_cost
;
808 unsigned int else_cost
;
810 /* Estimated cost of the particular branch instruction. */
811 unsigned int branch_cost
;
814 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
815 static int noce_try_move (struct noce_if_info
*);
816 static int noce_try_store_flag (struct noce_if_info
*);
817 static int noce_try_addcc (struct noce_if_info
*);
818 static int noce_try_store_flag_constants (struct noce_if_info
*);
819 static int noce_try_store_flag_mask (struct noce_if_info
*);
820 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
822 static int noce_try_cmove (struct noce_if_info
*);
823 static int noce_try_cmove_arith (struct noce_if_info
*);
824 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
825 static int noce_try_minmax (struct noce_if_info
*);
826 static int noce_try_abs (struct noce_if_info
*);
827 static int noce_try_sign_mask (struct noce_if_info
*);
829 /* Helper function for noce_try_store_flag*. */
832 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
835 rtx cond
= if_info
->cond
;
839 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
840 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
842 /* If earliest == jump, or when the condition is complex, try to
843 build the store_flag insn directly. */
847 rtx set
= pc_set (if_info
->jump
);
848 cond
= XEXP (SET_SRC (set
), 0);
849 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
850 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
851 reversep
= !reversep
;
852 if (if_info
->then_else_reversed
)
853 reversep
= !reversep
;
857 code
= reversed_comparison_code (cond
, if_info
->jump
);
859 code
= GET_CODE (cond
);
861 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
862 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
864 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
866 rtx set
= gen_rtx_SET (x
, src
);
869 rtx_insn
*insn
= emit_insn (set
);
871 if (recog_memoized (insn
) >= 0)
873 rtx_insn
*seq
= get_insns ();
877 if_info
->cond_earliest
= if_info
->jump
;
885 /* Don't even try if the comparison operands or the mode of X are weird. */
886 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
889 return emit_store_flag (x
, code
, XEXP (cond
, 0),
890 XEXP (cond
, 1), VOIDmode
,
891 (code
== LTU
|| code
== LEU
892 || code
== GEU
|| code
== GTU
), normalize
);
895 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
896 X is the destination/target and Y is the value to copy. */
899 noce_emit_move_insn (rtx x
, rtx y
)
901 machine_mode outmode
;
905 if (GET_CODE (x
) != STRICT_LOW_PART
)
907 rtx_insn
*seq
, *insn
;
912 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
913 otherwise construct a suitable SET pattern ourselves. */
914 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
915 ? emit_move_insn (x
, y
)
916 : emit_insn (gen_rtx_SET (x
, y
));
920 if (recog_memoized (insn
) <= 0)
922 if (GET_CODE (x
) == ZERO_EXTRACT
)
924 rtx op
= XEXP (x
, 0);
925 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
926 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
928 /* store_bit_field expects START to be relative to
929 BYTES_BIG_ENDIAN and adjusts this value for machines with
930 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
931 invoke store_bit_field again it is necessary to have the START
932 value from the first call. */
933 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
936 start
= BITS_PER_UNIT
- start
- size
;
939 gcc_assert (REG_P (op
));
940 start
= BITS_PER_WORD
- start
- size
;
944 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
945 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
949 switch (GET_RTX_CLASS (GET_CODE (y
)))
952 ot
= code_to_optab (GET_CODE (y
));
956 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
957 if (target
!= NULL_RTX
)
960 emit_move_insn (x
, target
);
969 ot
= code_to_optab (GET_CODE (y
));
973 target
= expand_binop (GET_MODE (y
), ot
,
974 XEXP (y
, 0), XEXP (y
, 1),
976 if (target
!= NULL_RTX
)
979 emit_move_insn (x
, target
);
996 inner
= XEXP (outer
, 0);
997 outmode
= GET_MODE (outer
);
998 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
999 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1000 0, 0, outmode
, y
, false);
1003 /* Return the CC reg if it is used in COND. */
1006 cc_in_cond (rtx cond
)
1008 if (have_cbranchcc4
&& cond
1009 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1010 return XEXP (cond
, 0);
1015 /* Return sequence of instructions generated by if conversion. This
1016 function calls end_sequence() to end the current stream, ensures
1017 that the instructions are unshared, recognizable non-jump insns.
1018 On failure, this function returns a NULL_RTX. */
1021 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1024 rtx_insn
*seq
= get_insns ();
1025 rtx cc
= cc_in_cond (if_info
->cond
);
1027 set_used_flags (if_info
->x
);
1028 set_used_flags (if_info
->cond
);
1029 set_used_flags (if_info
->a
);
1030 set_used_flags (if_info
->b
);
1032 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1033 set_used_flags (insn
);
1035 unshare_all_rtl_in_chain (seq
);
1038 /* Make sure that all of the instructions emitted are recognizable,
1039 and that we haven't introduced a new jump instruction.
1040 As an exercise for the reader, build a general mechanism that
1041 allows proper placement of required clobbers. */
1042 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1044 || recog_memoized (insn
) == -1
1045 /* Make sure new generated code does not clobber CC. */
1046 || (cc
&& set_of (cc
, insn
)))
1052 /* Return true iff the then and else basic block (if it exists)
1053 consist of a single simple set instruction. */
1056 noce_simple_bbs (struct noce_if_info
*if_info
)
1058 if (!if_info
->then_simple
)
1061 if (if_info
->else_bb
)
1062 return if_info
->else_simple
;
1067 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1068 "if (a == b) x = a; else x = b" into "x = b". */
1071 noce_try_move (struct noce_if_info
*if_info
)
1073 rtx cond
= if_info
->cond
;
1074 enum rtx_code code
= GET_CODE (cond
);
1078 if (code
!= NE
&& code
!= EQ
)
1081 if (!noce_simple_bbs (if_info
))
1084 /* This optimization isn't valid if either A or B could be a NaN
1085 or a signed zero. */
1086 if (HONOR_NANS (if_info
->x
)
1087 || HONOR_SIGNED_ZEROS (if_info
->x
))
1090 /* Check whether the operands of the comparison are A and in
1092 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1093 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1094 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1095 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1097 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1100 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1102 /* Avoid generating the move if the source is the destination. */
1103 if (! rtx_equal_p (if_info
->x
, y
))
1106 noce_emit_move_insn (if_info
->x
, y
);
1107 seq
= end_ifcvt_sequence (if_info
);
1111 emit_insn_before_setloc (seq
, if_info
->jump
,
1112 INSN_LOCATION (if_info
->insn_a
));
1119 /* Convert "if (test) x = 1; else x = 0".
1121 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1122 tried in noce_try_store_flag_constants after noce_try_cmove has had
1123 a go at the conversion. */
1126 noce_try_store_flag (struct noce_if_info
*if_info
)
1132 if (!noce_simple_bbs (if_info
))
1135 if (CONST_INT_P (if_info
->b
)
1136 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1137 && if_info
->a
== const0_rtx
)
1139 else if (if_info
->b
== const0_rtx
1140 && CONST_INT_P (if_info
->a
)
1141 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1142 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1150 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1153 if (target
!= if_info
->x
)
1154 noce_emit_move_insn (if_info
->x
, target
);
1156 seq
= end_ifcvt_sequence (if_info
);
1160 emit_insn_before_setloc (seq
, if_info
->jump
,
1161 INSN_LOCATION (if_info
->insn_a
));
1171 /* Convert "if (test) x = a; else x = b", for A and B constant.
1172 Also allow A = y + c1, B = y + c2, with a common y between A
1176 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1181 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1184 machine_mode mode
= GET_MODE (if_info
->x
);;
1185 rtx common
= NULL_RTX
;
1190 /* Handle cases like x := test ? y + 3 : y + 4. */
1191 if (GET_CODE (a
) == PLUS
1192 && GET_CODE (b
) == PLUS
1193 && CONST_INT_P (XEXP (a
, 1))
1194 && CONST_INT_P (XEXP (b
, 1))
1195 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1196 && noce_operand_ok (XEXP (a
, 0))
1197 && if_info
->branch_cost
>= 2)
1199 common
= XEXP (a
, 0);
1204 if (!noce_simple_bbs (if_info
))
1210 ifalse
= INTVAL (a
);
1212 bool subtract_flag_p
= false;
1214 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1215 /* Make sure we can represent the difference between the two values. */
1217 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1220 diff
= trunc_int_for_mode (diff
, mode
);
1222 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1226 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1229 /* We could collapse these cases but it is easier to follow the
1230 diff/STORE_FLAG_VALUE combinations when they are listed
1234 => 4 + (test != 0). */
1235 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1238 => can_reverse | 4 + (test == 0)
1239 !can_reverse | 3 - (test != 0). */
1240 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1242 reversep
= can_reverse
;
1243 subtract_flag_p
= !can_reverse
;
1244 /* If we need to subtract the flag and we have PLUS-immediate
1245 A and B then it is unlikely to be beneficial to play tricks
1247 if (subtract_flag_p
&& common
)
1251 => can_reverse | 3 + (test == 0)
1252 !can_reverse | 4 - (test != 0). */
1253 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1255 reversep
= can_reverse
;
1256 subtract_flag_p
= !can_reverse
;
1257 /* If we need to subtract the flag and we have PLUS-immediate
1258 A and B then it is unlikely to be beneficial to play tricks
1260 if (subtract_flag_p
&& common
)
1264 => 4 + (test != 0). */
1265 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1270 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1271 && (STORE_FLAG_VALUE
== 1
1272 || if_info
->branch_cost
>= 2))
1274 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1275 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1280 else if (itrue
== -1
1281 && (STORE_FLAG_VALUE
== -1
1282 || if_info
->branch_cost
>= 2))
1284 else if (ifalse
== -1 && can_reverse
1285 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1295 std::swap (itrue
, ifalse
);
1296 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1301 /* If we have x := test ? x + 3 : x + 4 then move the original
1302 x out of the way while we store flags. */
1303 if (common
&& rtx_equal_p (common
, if_info
->x
))
1305 common
= gen_reg_rtx (mode
);
1306 noce_emit_move_insn (common
, if_info
->x
);
1309 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1316 /* if (test) x = 3; else x = 4;
1317 => x = 3 + (test == 0); */
1318 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1320 /* Add the common part now. This may allow combine to merge this
1321 with the store flag operation earlier into some sort of conditional
1322 increment/decrement if the target allows it. */
1324 target
= expand_simple_binop (mode
, PLUS
,
1326 target
, 0, OPTAB_WIDEN
);
1328 /* Always use ifalse here. It should have been swapped with itrue
1329 when appropriate when reversep is true. */
1330 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1331 gen_int_mode (ifalse
, mode
), target
,
1332 if_info
->x
, 0, OPTAB_WIDEN
);
1334 /* Other cases are not beneficial when the original A and B are PLUS
1341 /* if (test) x = 8; else x = 0;
1342 => x = (test != 0) << 3; */
1343 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1345 target
= expand_simple_binop (mode
, ASHIFT
,
1346 target
, GEN_INT (tmp
), if_info
->x
, 0,
1350 /* if (test) x = -1; else x = b;
1351 => x = -(test != 0) | b; */
1352 else if (itrue
== -1)
1354 target
= expand_simple_binop (mode
, IOR
,
1355 target
, gen_int_mode (ifalse
, mode
),
1356 if_info
->x
, 0, OPTAB_WIDEN
);
1370 if (target
!= if_info
->x
)
1371 noce_emit_move_insn (if_info
->x
, target
);
1373 seq
= end_ifcvt_sequence (if_info
);
1377 emit_insn_before_setloc (seq
, if_info
->jump
,
1378 INSN_LOCATION (if_info
->insn_a
));
1385 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1386 similarly for "foo--". */
1389 noce_try_addcc (struct noce_if_info
*if_info
)
1393 int subtract
, normalize
;
1395 if (!noce_simple_bbs (if_info
))
1398 if (GET_CODE (if_info
->a
) == PLUS
1399 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1400 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1403 rtx cond
= if_info
->cond
;
1404 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1406 /* First try to use addcc pattern. */
1407 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1408 && general_operand (XEXP (cond
, 1), VOIDmode
))
1411 target
= emit_conditional_add (if_info
->x
, code
,
1416 XEXP (if_info
->a
, 1),
1417 GET_MODE (if_info
->x
),
1418 (code
== LTU
|| code
== GEU
1419 || code
== LEU
|| code
== GTU
));
1422 if (target
!= if_info
->x
)
1423 noce_emit_move_insn (if_info
->x
, target
);
1425 seq
= end_ifcvt_sequence (if_info
);
1429 emit_insn_before_setloc (seq
, if_info
->jump
,
1430 INSN_LOCATION (if_info
->insn_a
));
1436 /* If that fails, construct conditional increment or decrement using
1438 if (if_info
->branch_cost
>= 2
1439 && (XEXP (if_info
->a
, 1) == const1_rtx
1440 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1443 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1444 subtract
= 0, normalize
= 0;
1445 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1446 subtract
= 1, normalize
= 0;
1448 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1451 target
= noce_emit_store_flag (if_info
,
1452 gen_reg_rtx (GET_MODE (if_info
->x
)),
1456 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1457 subtract
? MINUS
: PLUS
,
1458 if_info
->b
, target
, if_info
->x
,
1462 if (target
!= if_info
->x
)
1463 noce_emit_move_insn (if_info
->x
, target
);
1465 seq
= end_ifcvt_sequence (if_info
);
1469 emit_insn_before_setloc (seq
, if_info
->jump
,
1470 INSN_LOCATION (if_info
->insn_a
));
1480 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1483 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1489 if (!noce_simple_bbs (if_info
))
1493 if ((if_info
->branch_cost
>= 2
1494 || STORE_FLAG_VALUE
== -1)
1495 && ((if_info
->a
== const0_rtx
1496 && rtx_equal_p (if_info
->b
, if_info
->x
))
1497 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1500 && if_info
->b
== const0_rtx
1501 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1504 target
= noce_emit_store_flag (if_info
,
1505 gen_reg_rtx (GET_MODE (if_info
->x
)),
1508 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1510 target
, if_info
->x
, 0,
1515 int old_cost
, new_cost
, insn_cost
;
1518 if (target
!= if_info
->x
)
1519 noce_emit_move_insn (if_info
->x
, target
);
1521 seq
= end_ifcvt_sequence (if_info
);
1525 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1526 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1527 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1528 new_cost
= seq_cost (seq
, speed_p
);
1530 if (new_cost
> old_cost
)
1533 emit_insn_before_setloc (seq
, if_info
->jump
,
1534 INSN_LOCATION (if_info
->insn_a
));
1544 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1547 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1548 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1550 rtx target ATTRIBUTE_UNUSED
;
1551 int unsignedp ATTRIBUTE_UNUSED
;
1553 /* If earliest == jump, try to build the cmove insn directly.
1554 This is helpful when combine has created some complex condition
1555 (like for alpha's cmovlbs) that we can't hope to regenerate
1556 through the normal interface. */
1558 if (if_info
->cond_earliest
== if_info
->jump
)
1560 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1561 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1562 cond
, vtrue
, vfalse
);
1563 rtx set
= gen_rtx_SET (x
, if_then_else
);
1566 rtx_insn
*insn
= emit_insn (set
);
1568 if (recog_memoized (insn
) >= 0)
1570 rtx_insn
*seq
= get_insns ();
1580 /* Don't even try if the comparison operands are weird
1581 except that the target supports cbranchcc4. */
1582 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1583 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1585 if (!have_cbranchcc4
1586 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1587 || cmp_b
!= const0_rtx
)
1591 unsignedp
= (code
== LTU
|| code
== GEU
1592 || code
== LEU
|| code
== GTU
);
1594 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1595 vtrue
, vfalse
, GET_MODE (x
),
1600 /* We might be faced with a situation like:
1603 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1604 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1606 We can't do a conditional move in mode M, but it's possible that we
1607 could do a conditional move in mode N instead and take a subreg of
1610 If we can't create new pseudos, though, don't bother. */
1611 if (reload_completed
)
1614 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1616 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1617 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1618 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1619 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1620 rtx promoted_target
;
1622 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1623 || byte_vtrue
!= byte_vfalse
1624 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1625 != SUBREG_PROMOTED_VAR_P (vfalse
))
1626 || (SUBREG_PROMOTED_GET (vtrue
)
1627 != SUBREG_PROMOTED_GET (vfalse
)))
1630 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1632 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1633 VOIDmode
, reg_vtrue
, reg_vfalse
,
1634 GET_MODE (reg_vtrue
), unsignedp
);
1635 /* Nope, couldn't do it in that mode either. */
1639 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1640 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1641 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1642 emit_move_insn (x
, target
);
1649 /* Try only simple constants and registers here. More complex cases
1650 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1651 has had a go at it. */
1654 noce_try_cmove (struct noce_if_info
*if_info
)
1660 if (!noce_simple_bbs (if_info
))
1663 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1664 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1668 code
= GET_CODE (if_info
->cond
);
1669 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1670 XEXP (if_info
->cond
, 0),
1671 XEXP (if_info
->cond
, 1),
1672 if_info
->a
, if_info
->b
);
1676 if (target
!= if_info
->x
)
1677 noce_emit_move_insn (if_info
->x
, target
);
1679 seq
= end_ifcvt_sequence (if_info
);
1683 emit_insn_before_setloc (seq
, if_info
->jump
,
1684 INSN_LOCATION (if_info
->insn_a
));
1687 /* If both a and b are constants try a last-ditch transformation:
1688 if (test) x = a; else x = b;
1689 => x = (-(test != 0) & (b - a)) + a;
1690 Try this only if the target-specific expansion above has failed.
1691 The target-specific expander may want to generate sequences that
1692 we don't know about, so give them a chance before trying this
1694 else if (!targetm
.have_conditional_execution ()
1695 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1696 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1697 || if_info
->branch_cost
>= 3))
1699 machine_mode mode
= GET_MODE (if_info
->x
);
1700 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1701 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1702 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1709 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1710 /* Make sure we can represent the difference
1711 between the two values. */
1713 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1719 diff
= trunc_int_for_mode (diff
, mode
);
1720 target
= expand_simple_binop (mode
, AND
,
1721 target
, gen_int_mode (diff
, mode
),
1722 if_info
->x
, 0, OPTAB_WIDEN
);
1724 target
= expand_simple_binop (mode
, PLUS
,
1725 target
, gen_int_mode (ifalse
, mode
),
1726 if_info
->x
, 0, OPTAB_WIDEN
);
1729 if (target
!= if_info
->x
)
1730 noce_emit_move_insn (if_info
->x
, target
);
1732 seq
= end_ifcvt_sequence (if_info
);
1736 emit_insn_before_setloc (seq
, if_info
->jump
,
1737 INSN_LOCATION (if_info
->insn_a
));
1753 /* Return true if X contains a conditional code mode rtx. */
1756 contains_ccmode_rtx_p (rtx x
)
1758 subrtx_iterator::array_type array
;
1759 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1760 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1766 /* Helper for bb_valid_for_noce_process_p. Validate that
1767 the rtx insn INSN is a single set that does not set
1768 the conditional register CC and is in general valid for
1772 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1775 || !NONJUMP_INSN_P (insn
)
1776 || (cc
&& set_of (cc
, insn
)))
1779 rtx sset
= single_set (insn
);
1781 /* Currently support only simple single sets in test_bb. */
1783 || !noce_operand_ok (SET_DEST (sset
))
1784 || contains_ccmode_rtx_p (SET_DEST (sset
))
1785 || !noce_operand_ok (SET_SRC (sset
)))
1792 /* Return true iff the registers that the insns in BB_A set do not
1793 get used in BB_B. */
1796 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
)
1799 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1804 FOR_BB_INSNS (bb_a
, a_insn
)
1806 if (!active_insn_p (a_insn
))
1809 rtx sset_a
= single_set (a_insn
);
1813 BITMAP_FREE (bba_sets
);
1817 /* Record all registers that BB_A sets. */
1818 FOR_EACH_INSN_DEF (def
, a_insn
)
1819 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1824 FOR_BB_INSNS (bb_b
, b_insn
)
1826 if (!active_insn_p (b_insn
))
1829 rtx sset_b
= single_set (b_insn
);
1833 BITMAP_FREE (bba_sets
);
1837 /* Make sure this is a REG and not some instance
1838 of ZERO_EXTRACT or SUBREG or other dangerous stuff. */
1839 if (!REG_P (SET_DEST (sset_b
)))
1841 BITMAP_FREE (bba_sets
);
1845 /* If the insn uses a reg set in BB_A return false. */
1846 FOR_EACH_INSN_USE (use
, b_insn
)
1848 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1850 BITMAP_FREE (bba_sets
);
1857 BITMAP_FREE (bba_sets
);
1861 /* Emit copies of all the active instructions in BB except the last.
1862 This is a helper for noce_try_cmove_arith. */
1865 noce_emit_all_but_last (basic_block bb
)
1867 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1869 FOR_BB_INSNS (bb
, insn
)
1871 if (insn
!= last
&& active_insn_p (insn
))
1873 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1875 emit_insn (PATTERN (to_emit
));
1880 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1881 the resulting insn or NULL if it's not a valid insn. */
1884 noce_emit_insn (rtx to_emit
)
1886 gcc_assert (to_emit
);
1887 rtx_insn
*insn
= emit_insn (to_emit
);
1889 if (recog_memoized (insn
) < 0)
1895 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1896 and including the penultimate one in BB if it is not simple
1897 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1898 insn in the block. The reason for that is that LAST_INSN may
1899 have been modified by the preparation in noce_try_cmove_arith. */
1902 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1905 noce_emit_all_but_last (bb
);
1907 if (last_insn
&& !noce_emit_insn (last_insn
))
1913 /* Try more complex cases involving conditional_move. */
1916 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1922 rtx_insn
*insn_a
, *insn_b
;
1923 bool a_simple
= if_info
->then_simple
;
1924 bool b_simple
= if_info
->else_simple
;
1925 basic_block then_bb
= if_info
->then_bb
;
1926 basic_block else_bb
= if_info
->else_bb
;
1930 rtx_insn
*ifcvt_seq
;
1932 /* A conditional move from two memory sources is equivalent to a
1933 conditional on their addresses followed by a load. Don't do this
1934 early because it'll screw alias analysis. Note that we've
1935 already checked for no side effects. */
1936 /* ??? FIXME: Magic number 5. */
1937 if (cse_not_expected
1938 && MEM_P (a
) && MEM_P (b
)
1939 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1940 && if_info
->branch_cost
>= 5)
1942 machine_mode address_mode
= get_address_mode (a
);
1946 x
= gen_reg_rtx (address_mode
);
1950 /* ??? We could handle this if we knew that a load from A or B could
1951 not trap or fault. This is also true if we've already loaded
1952 from the address along the path from ENTRY. */
1953 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1956 /* if (test) x = a + b; else x = c - d;
1963 code
= GET_CODE (if_info
->cond
);
1964 insn_a
= if_info
->insn_a
;
1965 insn_b
= if_info
->insn_b
;
1967 machine_mode x_mode
= GET_MODE (x
);
1969 if (!can_conditionally_move_p (x_mode
))
1972 unsigned int then_cost
;
1973 unsigned int else_cost
;
1975 then_cost
= if_info
->then_cost
;
1980 else_cost
= if_info
->else_cost
;
1984 /* We're going to execute one of the basic blocks anyway, so
1985 bail out if the most expensive of the two blocks is unacceptable. */
1986 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
1989 /* Possibly rearrange operands to make things come out more natural. */
1990 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
1993 if (rtx_equal_p (b
, x
))
1995 else if (general_operand (b
, GET_MODE (b
)))
2000 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2002 std::swap (insn_a
, insn_b
);
2003 std::swap (a_simple
, b_simple
);
2004 std::swap (then_bb
, else_bb
);
2008 if (then_bb
&& else_bb
&& !a_simple
&& !b_simple
2009 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
)
2010 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
)))
2015 /* If one of the blocks is empty then the corresponding B or A value
2016 came from the test block. The non-empty complex block that we will
2017 emit might clobber the register used by B or A, so move it to a pseudo
2020 rtx tmp_a
= NULL_RTX
;
2021 rtx tmp_b
= NULL_RTX
;
2023 if (b_simple
|| !else_bb
)
2024 tmp_b
= gen_reg_rtx (x_mode
);
2026 if (a_simple
|| !then_bb
)
2027 tmp_a
= gen_reg_rtx (x_mode
);
2032 rtx emit_a
= NULL_RTX
;
2033 rtx emit_b
= NULL_RTX
;
2034 rtx_insn
*tmp_insn
= NULL
;
2035 bool modified_in_a
= false;
2036 bool modified_in_b
= false;
2037 /* If either operand is complex, load it into a register first.
2038 The best way to do this is to copy the original insn. In this
2039 way we preserve any clobbers etc that the insn may have had.
2040 This is of course not possible in the IS_MEM case. */
2042 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2047 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2048 emit_a
= gen_rtx_SET (reg
, a
);
2054 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2056 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2057 rtx set
= single_set (copy_of_a
);
2060 emit_a
= PATTERN (copy_of_a
);
2064 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2065 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2071 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2075 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2076 emit_b
= gen_rtx_SET (reg
, b
);
2082 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2083 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2084 rtx set
= single_set (copy_of_b
);
2087 emit_b
= PATTERN (copy_of_b
);
2091 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2092 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2098 /* If insn to set up A clobbers any registers B depends on, try to
2099 swap insn that sets up A with the one that sets up B. If even
2100 that doesn't help, punt. */
2102 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2103 if (tmp_b
&& then_bb
)
2105 FOR_BB_INSNS (then_bb
, tmp_insn
)
2106 if (modified_in_p (orig_b
, tmp_insn
))
2108 modified_in_a
= true;
2113 if (emit_a
&& modified_in_a
)
2115 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2116 if (tmp_b
&& else_bb
)
2118 FOR_BB_INSNS (else_bb
, tmp_insn
)
2119 if (modified_in_p (orig_a
, tmp_insn
))
2121 modified_in_b
= true;
2127 goto end_seq_and_fail
;
2129 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2130 goto end_seq_and_fail
;
2132 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2133 goto end_seq_and_fail
;
2137 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2138 goto end_seq_and_fail
;
2140 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2141 goto end_seq_and_fail
;
2145 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2146 XEXP (if_info
->cond
, 1), a
, b
);
2149 goto end_seq_and_fail
;
2151 /* If we're handling a memory for above, emit the load now. */
2154 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2156 /* Copy over flags as appropriate. */
2157 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2158 MEM_VOLATILE_P (mem
) = 1;
2159 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2160 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2162 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2164 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2165 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2167 noce_emit_move_insn (if_info
->x
, mem
);
2169 else if (target
!= x
)
2170 noce_emit_move_insn (x
, target
);
2172 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2176 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2177 INSN_LOCATION (if_info
->insn_a
));
2185 /* For most cases, the simplified condition we found is the best
2186 choice, but this is not the case for the min/max/abs transforms.
2187 For these we wish to know that it is A or B in the condition. */
2190 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2191 rtx_insn
**earliest
)
2197 /* If target is already mentioned in the known condition, return it. */
2198 if (reg_mentioned_p (target
, if_info
->cond
))
2200 *earliest
= if_info
->cond_earliest
;
2201 return if_info
->cond
;
2204 set
= pc_set (if_info
->jump
);
2205 cond
= XEXP (SET_SRC (set
), 0);
2207 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2208 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2209 if (if_info
->then_else_reversed
)
2212 /* If we're looking for a constant, try to make the conditional
2213 have that constant in it. There are two reasons why it may
2214 not have the constant we want:
2216 1. GCC may have needed to put the constant in a register, because
2217 the target can't compare directly against that constant. For
2218 this case, we look for a SET immediately before the comparison
2219 that puts a constant in that register.
2221 2. GCC may have canonicalized the conditional, for example
2222 replacing "if x < 4" with "if x <= 3". We can undo that (or
2223 make equivalent types of changes) to get the constants we need
2224 if they're off by one in the right direction. */
2226 if (CONST_INT_P (target
))
2228 enum rtx_code code
= GET_CODE (if_info
->cond
);
2229 rtx op_a
= XEXP (if_info
->cond
, 0);
2230 rtx op_b
= XEXP (if_info
->cond
, 1);
2231 rtx_insn
*prev_insn
;
2233 /* First, look to see if we put a constant in a register. */
2234 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2236 && BLOCK_FOR_INSN (prev_insn
)
2237 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2238 && INSN_P (prev_insn
)
2239 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2241 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2243 src
= SET_SRC (PATTERN (prev_insn
));
2244 if (CONST_INT_P (src
))
2246 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2248 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2251 if (CONST_INT_P (op_a
))
2253 std::swap (op_a
, op_b
);
2254 code
= swap_condition (code
);
2259 /* Now, look to see if we can get the right constant by
2260 adjusting the conditional. */
2261 if (CONST_INT_P (op_b
))
2263 HOST_WIDE_INT desired_val
= INTVAL (target
);
2264 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2269 if (actual_val
== desired_val
+ 1)
2272 op_b
= GEN_INT (desired_val
);
2276 if (actual_val
== desired_val
- 1)
2279 op_b
= GEN_INT (desired_val
);
2283 if (actual_val
== desired_val
- 1)
2286 op_b
= GEN_INT (desired_val
);
2290 if (actual_val
== desired_val
+ 1)
2293 op_b
= GEN_INT (desired_val
);
2301 /* If we made any changes, generate a new conditional that is
2302 equivalent to what we started with, but has the right
2304 if (code
!= GET_CODE (if_info
->cond
)
2305 || op_a
!= XEXP (if_info
->cond
, 0)
2306 || op_b
!= XEXP (if_info
->cond
, 1))
2308 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2309 *earliest
= if_info
->cond_earliest
;
2314 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2315 earliest
, target
, have_cbranchcc4
, true);
2316 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2319 /* We almost certainly searched back to a different place.
2320 Need to re-verify correct lifetimes. */
2322 /* X may not be mentioned in the range (cond_earliest, jump]. */
2323 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2324 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2327 /* A and B may not be modified in the range [cond_earliest, jump). */
2328 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2330 && (modified_in_p (if_info
->a
, insn
)
2331 || modified_in_p (if_info
->b
, insn
)))
2337 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2340 noce_try_minmax (struct noce_if_info
*if_info
)
2343 rtx_insn
*earliest
, *seq
;
2344 enum rtx_code code
, op
;
2347 if (!noce_simple_bbs (if_info
))
2350 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2351 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2352 to get the target to tell us... */
2353 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2354 || HONOR_NANS (if_info
->x
))
2357 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2361 /* Verify the condition is of the form we expect, and canonicalize
2362 the comparison code. */
2363 code
= GET_CODE (cond
);
2364 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2366 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2369 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2371 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2373 code
= swap_condition (code
);
2378 /* Determine what sort of operation this is. Note that the code is for
2379 a taken branch, so the code->operation mapping appears backwards. */
2412 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2413 if_info
->a
, if_info
->b
,
2414 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2420 if (target
!= if_info
->x
)
2421 noce_emit_move_insn (if_info
->x
, target
);
2423 seq
= end_ifcvt_sequence (if_info
);
2427 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2428 if_info
->cond
= cond
;
2429 if_info
->cond_earliest
= earliest
;
2434 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2435 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2439 noce_try_abs (struct noce_if_info
*if_info
)
2441 rtx cond
, target
, a
, b
, c
;
2442 rtx_insn
*earliest
, *seq
;
2444 bool one_cmpl
= false;
2446 if (!noce_simple_bbs (if_info
))
2449 /* Reject modes with signed zeros. */
2450 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2453 /* Recognize A and B as constituting an ABS or NABS. The canonical
2454 form is a branch around the negation, taken when the object is the
2455 first operand of a comparison against 0 that evaluates to true. */
2458 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2460 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2465 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2470 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2479 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2483 /* Verify the condition is of the form we expect. */
2484 if (rtx_equal_p (XEXP (cond
, 0), b
))
2486 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2494 /* Verify that C is zero. Search one step backward for a
2495 REG_EQUAL note or a simple source if necessary. */
2499 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2501 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2502 && (set
= single_set (insn
))
2503 && rtx_equal_p (SET_DEST (set
), c
))
2505 rtx note
= find_reg_equal_equiv_note (insn
);
2515 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2516 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2517 c
= get_pool_constant (XEXP (c
, 0));
2519 /* Work around funny ideas get_condition has wrt canonicalization.
2520 Note that these rtx constants are known to be CONST_INT, and
2521 therefore imply integer comparisons. */
2522 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2524 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2526 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2529 /* Determine what sort of operation this is. */
2530 switch (GET_CODE (cond
))
2549 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2552 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2554 /* ??? It's a quandary whether cmove would be better here, especially
2555 for integers. Perhaps combine will clean things up. */
2556 if (target
&& negate
)
2559 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2562 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2572 if (target
!= if_info
->x
)
2573 noce_emit_move_insn (if_info
->x
, target
);
2575 seq
= end_ifcvt_sequence (if_info
);
2579 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2580 if_info
->cond
= cond
;
2581 if_info
->cond_earliest
= earliest
;
2586 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2589 noce_try_sign_mask (struct noce_if_info
*if_info
)
2595 bool t_unconditional
;
2597 if (!noce_simple_bbs (if_info
))
2600 cond
= if_info
->cond
;
2601 code
= GET_CODE (cond
);
2606 if (if_info
->a
== const0_rtx
)
2608 if ((code
== LT
&& c
== const0_rtx
)
2609 || (code
== LE
&& c
== constm1_rtx
))
2612 else if (if_info
->b
== const0_rtx
)
2614 if ((code
== GE
&& c
== const0_rtx
)
2615 || (code
== GT
&& c
== constm1_rtx
))
2619 if (! t
|| side_effects_p (t
))
2622 /* We currently don't handle different modes. */
2623 mode
= GET_MODE (t
);
2624 if (GET_MODE (m
) != mode
)
2627 /* This is only profitable if T is unconditionally executed/evaluated in the
2628 original insn sequence or T is cheap. The former happens if B is the
2629 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2630 INSN_B which can happen for e.g. conditional stores to memory. For the
2631 cost computation use the block TEST_BB where the evaluation will end up
2632 after the transformation. */
2635 && (if_info
->insn_b
== NULL_RTX
2636 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2637 if (!(t_unconditional
2638 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2639 < COSTS_N_INSNS (2))))
2643 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2644 "(signed) m >> 31" directly. This benefits targets with specialized
2645 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2646 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2647 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2656 noce_emit_move_insn (if_info
->x
, t
);
2658 seq
= end_ifcvt_sequence (if_info
);
2662 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2667 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2671 noce_try_bitop (struct noce_if_info
*if_info
)
2673 rtx cond
, x
, a
, result
;
2680 cond
= if_info
->cond
;
2681 code
= GET_CODE (cond
);
2683 if (!noce_simple_bbs (if_info
))
2686 /* Check for no else condition. */
2687 if (! rtx_equal_p (x
, if_info
->b
))
2690 /* Check for a suitable condition. */
2691 if (code
!= NE
&& code
!= EQ
)
2693 if (XEXP (cond
, 1) != const0_rtx
)
2695 cond
= XEXP (cond
, 0);
2697 /* ??? We could also handle AND here. */
2698 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2700 if (XEXP (cond
, 1) != const1_rtx
2701 || !CONST_INT_P (XEXP (cond
, 2))
2702 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2704 bitnum
= INTVAL (XEXP (cond
, 2));
2705 mode
= GET_MODE (x
);
2706 if (BITS_BIG_ENDIAN
)
2707 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2708 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2715 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2717 /* Check for "if (X & C) x = x op C". */
2718 if (! rtx_equal_p (x
, XEXP (a
, 0))
2719 || !CONST_INT_P (XEXP (a
, 1))
2720 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2721 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2724 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2725 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2726 if (GET_CODE (a
) == IOR
)
2727 result
= (code
== NE
) ? a
: NULL_RTX
;
2728 else if (code
== NE
)
2730 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2731 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2732 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2736 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2737 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2738 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2741 else if (GET_CODE (a
) == AND
)
2743 /* Check for "if (X & C) x &= ~C". */
2744 if (! rtx_equal_p (x
, XEXP (a
, 0))
2745 || !CONST_INT_P (XEXP (a
, 1))
2746 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2747 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2750 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2751 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2752 result
= (code
== EQ
) ? a
: NULL_RTX
;
2760 noce_emit_move_insn (x
, result
);
2761 seq
= end_ifcvt_sequence (if_info
);
2765 emit_insn_before_setloc (seq
, if_info
->jump
,
2766 INSN_LOCATION (if_info
->insn_a
));
2772 /* Similar to get_condition, only the resulting condition must be
2773 valid at JUMP, instead of at EARLIEST.
2775 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2776 THEN block of the caller, and we have to reverse the condition. */
2779 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2784 if (! any_condjump_p (jump
))
2787 set
= pc_set (jump
);
2789 /* If this branches to JUMP_LABEL when the condition is false,
2790 reverse the condition. */
2791 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2792 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2794 /* We may have to reverse because the caller's if block is not canonical,
2795 i.e. the THEN block isn't the fallthrough block for the TEST block
2796 (see find_if_header). */
2797 if (then_else_reversed
)
2800 /* If the condition variable is a register and is MODE_INT, accept it. */
2802 cond
= XEXP (SET_SRC (set
), 0);
2803 tmp
= XEXP (cond
, 0);
2804 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2805 && (GET_MODE (tmp
) != BImode
2806 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2811 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2812 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2816 /* Otherwise, fall back on canonicalize_condition to do the dirty
2817 work of manipulating MODE_CC values and COMPARE rtx codes. */
2818 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2819 NULL_RTX
, have_cbranchcc4
, true);
2821 /* We don't handle side-effects in the condition, like handling
2822 REG_INC notes and making sure no duplicate conditions are emitted. */
2823 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2829 /* Return true if OP is ok for if-then-else processing. */
2832 noce_operand_ok (const_rtx op
)
2834 if (side_effects_p (op
))
2837 /* We special-case memories, so handle any of them with
2838 no address side effects. */
2840 return ! side_effects_p (XEXP (op
, 0));
2842 return ! may_trap_p (op
);
2845 /* Return true if a write into MEM may trap or fault. */
2848 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2852 if (MEM_READONLY_P (mem
))
2855 if (may_trap_or_fault_p (mem
))
2858 addr
= XEXP (mem
, 0);
2860 /* Call target hook to avoid the effects of -fpic etc.... */
2861 addr
= targetm
.delegitimize_address (addr
);
2864 switch (GET_CODE (addr
))
2872 addr
= XEXP (addr
, 0);
2876 addr
= XEXP (addr
, 1);
2879 if (CONST_INT_P (XEXP (addr
, 1)))
2880 addr
= XEXP (addr
, 0);
2887 if (SYMBOL_REF_DECL (addr
)
2888 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2898 /* Return whether we can use store speculation for MEM. TOP_BB is the
2899 basic block above the conditional block where we are considering
2900 doing the speculative store. We look for whether MEM is set
2901 unconditionally later in the function. */
2904 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2906 basic_block dominator
;
2908 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2910 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2914 FOR_BB_INSNS (dominator
, insn
)
2916 /* If we see something that might be a memory barrier, we
2917 have to stop looking. Even if the MEM is set later in
2918 the function, we still don't want to set it
2919 unconditionally before the barrier. */
2921 && (volatile_insn_p (PATTERN (insn
))
2922 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2925 if (memory_must_be_modified_in_insn_p (mem
, insn
))
2927 if (modified_in_p (XEXP (mem
, 0), insn
))
2936 /* Return true if X contains a MEM subrtx. */
2939 contains_mem_rtx_p (rtx x
)
2941 subrtx_iterator::array_type array
;
2942 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
2949 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2950 The condition used in this if-conversion is in COND.
2951 In practice, check that TEST_BB ends with a single set
2952 x := a and all previous computations
2953 in TEST_BB don't produce any values that are live after TEST_BB.
2954 In other words, all the insns in TEST_BB are there only
2955 to compute a value for x. Put the rtx cost of the insns
2956 in TEST_BB into COST. Record whether TEST_BB is a single simple
2957 set instruction in SIMPLE_P. */
2960 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
2961 unsigned int *cost
, bool *simple_p
)
2966 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
2967 rtx last_set
= NULL_RTX
;
2969 rtx cc
= cc_in_cond (cond
);
2971 if (!insn_valid_noce_process_p (last_insn
, cc
))
2973 last_set
= single_set (last_insn
);
2975 rtx x
= SET_DEST (last_set
);
2976 rtx_insn
*first_insn
= first_active_insn (test_bb
);
2977 rtx first_set
= single_set (first_insn
);
2982 /* We have a single simple set, that's okay. */
2983 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
2985 if (first_insn
== last_insn
)
2987 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
2988 *cost
= insn_rtx_cost (first_set
, speed_p
);
2992 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
2993 gcc_assert (prev_last_insn
);
2995 /* For now, disallow setting x multiple times in test_bb. */
2996 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
2999 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3001 /* The regs that are live out of test_bb. */
3002 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3004 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3006 FOR_BB_INSNS (test_bb
, insn
)
3008 if (insn
!= last_insn
)
3010 if (!active_insn_p (insn
))
3013 if (!insn_valid_noce_process_p (insn
, cc
))
3014 goto free_bitmap_and_fail
;
3016 rtx sset
= single_set (insn
);
3019 if (contains_mem_rtx_p (SET_SRC (sset
))
3020 || !REG_P (SET_DEST (sset
))
3021 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3022 goto free_bitmap_and_fail
;
3024 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3025 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3029 /* If any of the intermediate results in test_bb are live after test_bb
3031 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3032 goto free_bitmap_and_fail
;
3034 BITMAP_FREE (test_bb_temps
);
3035 *cost
= potential_cost
;
3039 free_bitmap_and_fail
:
3040 BITMAP_FREE (test_bb_temps
);
3044 /* We have something like:
3047 { i = a; j = b; k = c; }
3051 tmp_i = (x > y) ? a : i;
3052 tmp_j = (x > y) ? b : j;
3053 tmp_k = (x > y) ? c : k;
3058 Subsequent passes are expected to clean up the extra moves.
3060 Look for special cases such as writes to one register which are
3061 read back in another SET, as might occur in a swap idiom or
3070 Which we want to rewrite to:
3072 tmp_i = (x > y) ? a : i;
3073 tmp_j = (x > y) ? tmp_i : j;
3077 We can catch these when looking at (SET x y) by keeping a list of the
3078 registers we would have targeted before if-conversion and looking back
3079 through it for an overlap with Y. If we find one, we rewire the
3080 conditional set to use the temporary we introduced earlier.
3082 IF_INFO contains the useful information about the block structure and
3083 jump instructions. */
3086 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3088 basic_block test_bb
= if_info
->test_bb
;
3089 basic_block then_bb
= if_info
->then_bb
;
3090 basic_block join_bb
= if_info
->join_bb
;
3091 rtx_insn
*jump
= if_info
->jump
;
3092 rtx_insn
*cond_earliest
;
3097 /* Decompose the condition attached to the jump. */
3098 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3099 rtx x
= XEXP (cond
, 0);
3100 rtx y
= XEXP (cond
, 1);
3101 rtx_code cond_code
= GET_CODE (cond
);
3103 /* The true targets for a conditional move. */
3104 auto_vec
<rtx
> targets
;
3105 /* The temporaries introduced to allow us to not consider register
3107 auto_vec
<rtx
> temporaries
;
3108 /* The insns we've emitted. */
3109 auto_vec
<rtx_insn
*> unmodified_insns
;
3112 FOR_BB_INSNS (then_bb
, insn
)
3114 /* Skip over non-insns. */
3115 if (!active_insn_p (insn
))
3118 rtx set
= single_set (insn
);
3119 gcc_checking_assert (set
);
3121 rtx target
= SET_DEST (set
);
3122 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3123 rtx new_val
= SET_SRC (set
);
3124 rtx old_val
= target
;
3126 /* If we were supposed to read from an earlier write in this block,
3127 we've changed the register allocation. Rewire the read. While
3128 we are looking, also try to catch a swap idiom. */
3129 for (int i
= count
- 1; i
>= 0; --i
)
3130 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3132 /* Catch a "swap" style idiom. */
3133 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3134 /* The write to targets[i] is only live until the read
3135 here. As the condition codes match, we can propagate
3137 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3139 new_val
= temporaries
[i
];
3143 /* If we had a non-canonical conditional jump (i.e. one where
3144 the fallthrough is to the "else" case) we need to reverse
3145 the conditional select. */
3146 if (if_info
->then_else_reversed
)
3147 std::swap (old_val
, new_val
);
3149 /* Actually emit the conditional move. */
3150 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3151 x
, y
, new_val
, old_val
);
3153 /* If we failed to expand the conditional move, drop out and don't
3155 if (temp_dest
== NULL_RTX
)
3163 targets
.safe_push (target
);
3164 temporaries
.safe_push (temp_dest
);
3165 unmodified_insns
.safe_push (insn
);
3168 /* We must have seen some sort of insn to insert, otherwise we were
3169 given an empty BB to convert, and we can't handle that. */
3170 gcc_assert (!unmodified_insns
.is_empty ());
3172 /* Now fixup the assignments. */
3173 for (int i
= 0; i
< count
; i
++)
3174 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3176 /* Actually emit the sequence. */
3177 rtx_insn
*seq
= get_insns ();
3179 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3180 set_used_flags (insn
);
3182 /* Mark all our temporaries and targets as used. */
3183 for (int i
= 0; i
< count
; i
++)
3185 set_used_flags (temporaries
[i
]);
3186 set_used_flags (targets
[i
]);
3189 set_used_flags (cond
);
3193 unshare_all_rtl_in_chain (seq
);
3199 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3201 || recog_memoized (insn
) == -1)
3204 emit_insn_before_setloc (seq
, if_info
->jump
,
3205 INSN_LOCATION (unmodified_insns
.last ()));
3207 /* Clean up THEN_BB and the edges in and out of it. */
3208 remove_edge (find_edge (test_bb
, join_bb
));
3209 remove_edge (find_edge (then_bb
, join_bb
));
3210 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3211 delete_basic_block (then_bb
);
3214 /* Maybe merge blocks now the jump is simple enough. */
3215 if (can_merge_blocks_p (test_bb
, join_bb
))
3217 merge_blocks (test_bb
, join_bb
);
3221 num_updated_if_blocks
++;
3225 /* Return true iff basic block TEST_BB is comprised of only
3226 (SET (REG) (REG)) insns suitable for conversion to a series
3227 of conditional moves. FORNOW: Use II to find the expected cost of
3228 the branch into/over TEST_BB.
3230 TODO: This creates an implicit "magic number" for branch_cost.
3231 II->branch_cost now guides the maximum number of set instructions in
3232 a basic block which is considered profitable to completely
3236 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
,
3237 struct noce_if_info
*ii
)
3242 FOR_BB_INSNS (test_bb
, insn
)
3244 /* Skip over notes etc. */
3245 if (!active_insn_p (insn
))
3248 /* We only handle SET insns. */
3249 rtx set
= single_set (insn
);
3250 if (set
== NULL_RTX
)
3253 rtx dest
= SET_DEST (set
);
3254 rtx src
= SET_SRC (set
);
3256 /* We can possibly relax this, but for now only handle REG to REG
3257 moves. This avoids any issues that might come from introducing
3258 loads/stores that might violate data-race-freedom guarantees. */
3259 if (!(REG_P (src
) && REG_P (dest
)))
3262 /* Destination must be appropriate for a conditional write. */
3263 if (!noce_operand_ok (dest
))
3266 /* We must be able to conditionally move in this mode. */
3267 if (!can_conditionally_move_p (GET_MODE (dest
)))
3273 /* FORNOW: Our cost model is a count of the number of instructions we
3274 would if-convert. This is suboptimal, and should be improved as part
3275 of a wider rework of branch_cost. */
3276 if (count
> ii
->branch_cost
)
3282 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3283 it without using conditional execution. Return TRUE if we were successful
3284 at converting the block. */
3287 noce_process_if_block (struct noce_if_info
*if_info
)
3289 basic_block test_bb
= if_info
->test_bb
; /* test block */
3290 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3291 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3292 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3293 rtx_insn
*jump
= if_info
->jump
;
3294 rtx cond
= if_info
->cond
;
3295 rtx_insn
*insn_a
, *insn_b
;
3297 rtx orig_x
, x
, a
, b
;
3299 /* We're looking for patterns of the form
3301 (1) if (...) x = a; else x = b;
3302 (2) x = b; if (...) x = a;
3303 (3) if (...) x = a; // as if with an initial x = x.
3304 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3305 The later patterns require jumps to be more expensive.
3306 For the if (...) x = a; else x = b; case we allow multiple insns
3307 inside the then and else blocks as long as their only effect is
3308 to calculate a value for x.
3309 ??? For future expansion, further expand the "multiple X" rules. */
3311 /* First look for multiple SETS. */
3313 && HAVE_conditional_move
3315 && bb_ok_for_noce_convert_multiple_sets (then_bb
, if_info
))
3317 if (noce_convert_multiple_sets (if_info
))
3321 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3322 &if_info
->then_simple
))
3326 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3327 &if_info
->else_simple
))
3330 insn_a
= last_active_insn (then_bb
, FALSE
);
3331 set_a
= single_set (insn_a
);
3334 x
= SET_DEST (set_a
);
3335 a
= SET_SRC (set_a
);
3337 /* Look for the other potential set. Make sure we've got equivalent
3339 /* ??? This is overconservative. Storing to two different mems is
3340 as easy as conditionally computing the address. Storing to a
3341 single mem merely requires a scratch memory to use as one of the
3342 destination addresses; often the memory immediately below the
3343 stack pointer is available for this. */
3347 insn_b
= last_active_insn (else_bb
, FALSE
);
3348 set_b
= single_set (insn_b
);
3351 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3356 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3357 /* We're going to be moving the evaluation of B down from above
3358 COND_EARLIEST to JUMP. Make sure the relevant data is still
3361 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3362 || !NONJUMP_INSN_P (insn_b
)
3363 || (set_b
= single_set (insn_b
)) == NULL_RTX
3364 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3365 || ! noce_operand_ok (SET_SRC (set_b
))
3366 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3367 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3368 /* Avoid extending the lifetime of hard registers on small
3369 register class machines. */
3370 || (REG_P (SET_SRC (set_b
))
3371 && HARD_REGISTER_P (SET_SRC (set_b
))
3372 && targetm
.small_register_classes_for_mode_p
3373 (GET_MODE (SET_SRC (set_b
))))
3374 /* Likewise with X. In particular this can happen when
3375 noce_get_condition looks farther back in the instruction
3376 stream than one might expect. */
3377 || reg_overlap_mentioned_p (x
, cond
)
3378 || reg_overlap_mentioned_p (x
, a
)
3379 || modified_between_p (x
, insn_b
, jump
))
3386 /* If x has side effects then only the if-then-else form is safe to
3387 convert. But even in that case we would need to restore any notes
3388 (such as REG_INC) at then end. That can be tricky if
3389 noce_emit_move_insn expands to more than one insn, so disable the
3390 optimization entirely for now if there are side effects. */
3391 if (side_effects_p (x
))
3394 b
= (set_b
? SET_SRC (set_b
) : x
);
3396 /* Only operate on register destinations, and even then avoid extending
3397 the lifetime of hard registers on small register class machines. */
3400 || (HARD_REGISTER_P (x
)
3401 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3403 if (GET_MODE (x
) == BLKmode
)
3406 if (GET_CODE (x
) == ZERO_EXTRACT
3407 && (!CONST_INT_P (XEXP (x
, 1))
3408 || !CONST_INT_P (XEXP (x
, 2))))
3411 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3412 ? XEXP (x
, 0) : x
));
3415 /* Don't operate on sources that may trap or are volatile. */
3416 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3420 /* Set up the info block for our subroutines. */
3421 if_info
->insn_a
= insn_a
;
3422 if_info
->insn_b
= insn_b
;
3427 /* Try optimizations in some approximation of a useful order. */
3428 /* ??? Should first look to see if X is live incoming at all. If it
3429 isn't, we don't need anything but an unconditional set. */
3431 /* Look and see if A and B are really the same. Avoid creating silly
3432 cmove constructs that no one will fix up later. */
3433 if (noce_simple_bbs (if_info
)
3434 && rtx_interchangeable_p (a
, b
))
3436 /* If we have an INSN_B, we don't have to create any new rtl. Just
3437 move the instruction that we already have. If we don't have an
3438 INSN_B, that means that A == X, and we've got a noop move. In
3439 that case don't do anything and let the code below delete INSN_A. */
3440 if (insn_b
&& else_bb
)
3444 if (else_bb
&& insn_b
== BB_END (else_bb
))
3445 BB_END (else_bb
) = PREV_INSN (insn_b
);
3446 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3448 /* If there was a REG_EQUAL note, delete it since it may have been
3449 true due to this insn being after a jump. */
3450 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3451 remove_note (insn_b
, note
);
3455 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3456 x must be executed twice. */
3457 else if (insn_b
&& side_effects_p (orig_x
))
3464 if (!set_b
&& MEM_P (orig_x
))
3466 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
3467 for optimizations if writing to x may trap or fault,
3468 i.e. it's a memory other than a static var or a stack slot,
3469 is misaligned on strict aligned machines or is read-only. If
3470 x is a read-only memory, then the program is valid only if we
3471 avoid the store into it. If there are stores on both the
3472 THEN and ELSE arms, then we can go ahead with the conversion;
3473 either the program is broken, or the condition is always
3474 false such that the other memory is selected. */
3475 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
3478 /* Avoid store speculation: given "if (...) x = a" where x is a
3479 MEM, we only want to do the store if x is always set
3480 somewhere in the function. This avoids cases like
3481 if (pthread_mutex_trylock(mutex))
3483 where we only want global_variable to be changed if the mutex
3484 is held. FIXME: This should ideally be expressed directly in
3486 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
3490 if (noce_try_move (if_info
))
3492 if (noce_try_store_flag (if_info
))
3494 if (noce_try_bitop (if_info
))
3496 if (noce_try_minmax (if_info
))
3498 if (noce_try_abs (if_info
))
3500 if (!targetm
.have_conditional_execution ()
3501 && noce_try_store_flag_constants (if_info
))
3503 if (HAVE_conditional_move
3504 && noce_try_cmove (if_info
))
3506 if (! targetm
.have_conditional_execution ())
3508 if (noce_try_addcc (if_info
))
3510 if (noce_try_store_flag_mask (if_info
))
3512 if (HAVE_conditional_move
3513 && noce_try_cmove_arith (if_info
))
3515 if (noce_try_sign_mask (if_info
))
3519 if (!else_bb
&& set_b
)
3531 /* If we used a temporary, fix it up now. */
3537 noce_emit_move_insn (orig_x
, x
);
3539 set_used_flags (orig_x
);
3540 unshare_all_rtl_in_chain (seq
);
3543 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3546 /* The original THEN and ELSE blocks may now be removed. The test block
3547 must now jump to the join block. If the test block and the join block
3548 can be merged, do so. */
3551 delete_basic_block (else_bb
);
3555 remove_edge (find_edge (test_bb
, join_bb
));
3557 remove_edge (find_edge (then_bb
, join_bb
));
3558 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3559 delete_basic_block (then_bb
);
3562 if (can_merge_blocks_p (test_bb
, join_bb
))
3564 merge_blocks (test_bb
, join_bb
);
3568 num_updated_if_blocks
++;
3572 /* Check whether a block is suitable for conditional move conversion.
3573 Every insn must be a simple set of a register to a constant or a
3574 register. For each assignment, store the value in the pointer map
3575 VALS, keyed indexed by register pointer, then store the register
3576 pointer in REGS. COND is the condition we will test. */
3579 check_cond_move_block (basic_block bb
,
3580 hash_map
<rtx
, rtx
> *vals
,
3585 rtx cc
= cc_in_cond (cond
);
3587 /* We can only handle simple jumps at the end of the basic block.
3588 It is almost impossible to update the CFG otherwise. */
3590 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3593 FOR_BB_INSNS (bb
, insn
)
3597 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3599 set
= single_set (insn
);
3603 dest
= SET_DEST (set
);
3604 src
= SET_SRC (set
);
3606 || (HARD_REGISTER_P (dest
)
3607 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3610 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3613 if (side_effects_p (src
) || side_effects_p (dest
))
3616 if (may_trap_p (src
) || may_trap_p (dest
))
3619 /* Don't try to handle this if the source register was
3620 modified earlier in the block. */
3623 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3624 && vals
->get (SUBREG_REG (src
))))
3627 /* Don't try to handle this if the destination register was
3628 modified earlier in the block. */
3629 if (vals
->get (dest
))
3632 /* Don't try to handle this if the condition uses the
3633 destination register. */
3634 if (reg_overlap_mentioned_p (dest
, cond
))
3637 /* Don't try to handle this if the source register is modified
3638 later in the block. */
3639 if (!CONSTANT_P (src
)
3640 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3643 /* Skip it if the instruction to be moved might clobber CC. */
3644 if (cc
&& set_of (cc
, insn
))
3647 vals
->put (dest
, src
);
3649 regs
->safe_push (dest
);
3655 /* Given a basic block BB suitable for conditional move conversion,
3656 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3657 the register values depending on COND, emit the insns in the block as
3658 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3659 processed. The caller has started a sequence for the conversion.
3660 Return true if successful, false if something goes wrong. */
3663 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3664 basic_block bb
, rtx cond
,
3665 hash_map
<rtx
, rtx
> *then_vals
,
3666 hash_map
<rtx
, rtx
> *else_vals
,
3671 rtx cond_arg0
, cond_arg1
;
3673 code
= GET_CODE (cond
);
3674 cond_arg0
= XEXP (cond
, 0);
3675 cond_arg1
= XEXP (cond
, 1);
3677 FOR_BB_INSNS (bb
, insn
)
3679 rtx set
, target
, dest
, t
, e
;
3681 /* ??? Maybe emit conditional debug insn? */
3682 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3684 set
= single_set (insn
);
3685 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3687 dest
= SET_DEST (set
);
3689 rtx
*then_slot
= then_vals
->get (dest
);
3690 rtx
*else_slot
= else_vals
->get (dest
);
3691 t
= then_slot
? *then_slot
: NULL_RTX
;
3692 e
= else_slot
? *else_slot
: NULL_RTX
;
3696 /* If this register was set in the then block, we already
3697 handled this case there. */
3710 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3716 noce_emit_move_insn (dest
, target
);
3722 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3723 it using only conditional moves. Return TRUE if we were successful at
3724 converting the block. */
3727 cond_move_process_if_block (struct noce_if_info
*if_info
)
3729 basic_block test_bb
= if_info
->test_bb
;
3730 basic_block then_bb
= if_info
->then_bb
;
3731 basic_block else_bb
= if_info
->else_bb
;
3732 basic_block join_bb
= if_info
->join_bb
;
3733 rtx_insn
*jump
= if_info
->jump
;
3734 rtx cond
= if_info
->cond
;
3735 rtx_insn
*seq
, *loc_insn
;
3738 vec
<rtx
> then_regs
= vNULL
;
3739 vec
<rtx
> else_regs
= vNULL
;
3741 int success_p
= FALSE
;
3743 /* Build a mapping for each block to the value used for each
3745 hash_map
<rtx
, rtx
> then_vals
;
3746 hash_map
<rtx
, rtx
> else_vals
;
3748 /* Make sure the blocks are suitable. */
3749 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3751 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3754 /* Make sure the blocks can be used together. If the same register
3755 is set in both blocks, and is not set to a constant in both
3756 cases, then both blocks must set it to the same register. We
3757 have already verified that if it is set to a register, that the
3758 source register does not change after the assignment. Also count
3759 the number of registers set in only one of the blocks. */
3761 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3763 rtx
*then_slot
= then_vals
.get (reg
);
3764 rtx
*else_slot
= else_vals
.get (reg
);
3766 gcc_checking_assert (then_slot
);
3771 rtx then_val
= *then_slot
;
3772 rtx else_val
= *else_slot
;
3773 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3774 && !rtx_equal_p (then_val
, else_val
))
3779 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3780 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3782 gcc_checking_assert (else_vals
.get (reg
));
3783 if (!then_vals
.get (reg
))
3787 /* Make sure it is reasonable to convert this block. What matters
3788 is the number of assignments currently made in only one of the
3789 branches, since if we convert we are going to always execute
3791 if (c
> MAX_CONDITIONAL_EXECUTE
)
3794 /* Try to emit the conditional moves. First do the then block,
3795 then do anything left in the else blocks. */
3797 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3798 &then_vals
, &else_vals
, false)
3800 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3801 &then_vals
, &else_vals
, true)))
3806 seq
= end_ifcvt_sequence (if_info
);
3810 loc_insn
= first_active_insn (then_bb
);
3813 loc_insn
= first_active_insn (else_bb
);
3814 gcc_assert (loc_insn
);
3816 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3820 delete_basic_block (else_bb
);
3824 remove_edge (find_edge (test_bb
, join_bb
));
3826 remove_edge (find_edge (then_bb
, join_bb
));
3827 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3828 delete_basic_block (then_bb
);
3831 if (can_merge_blocks_p (test_bb
, join_bb
))
3833 merge_blocks (test_bb
, join_bb
);
3837 num_updated_if_blocks
++;
3842 then_regs
.release ();
3843 else_regs
.release ();
3848 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3849 IF-THEN-ELSE-JOIN block.
3851 If so, we'll try to convert the insns to not require the branch,
3852 using only transformations that do not require conditional execution.
3854 Return TRUE if we were successful at converting the block. */
3857 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3860 basic_block then_bb
, else_bb
, join_bb
;
3861 bool then_else_reversed
= false;
3864 rtx_insn
*cond_earliest
;
3865 struct noce_if_info if_info
;
3867 /* We only ever should get here before reload. */
3868 gcc_assert (!reload_completed
);
3870 /* Recognize an IF-THEN-ELSE-JOIN block. */
3871 if (single_pred_p (then_edge
->dest
)
3872 && single_succ_p (then_edge
->dest
)
3873 && single_pred_p (else_edge
->dest
)
3874 && single_succ_p (else_edge
->dest
)
3875 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3877 then_bb
= then_edge
->dest
;
3878 else_bb
= else_edge
->dest
;
3879 join_bb
= single_succ (then_bb
);
3881 /* Recognize an IF-THEN-JOIN block. */
3882 else if (single_pred_p (then_edge
->dest
)
3883 && single_succ_p (then_edge
->dest
)
3884 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3886 then_bb
= then_edge
->dest
;
3887 else_bb
= NULL_BLOCK
;
3888 join_bb
= else_edge
->dest
;
3890 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3891 of basic blocks in cfglayout mode does not matter, so the fallthrough
3892 edge can go to any basic block (and not just to bb->next_bb, like in
3894 else if (single_pred_p (else_edge
->dest
)
3895 && single_succ_p (else_edge
->dest
)
3896 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3898 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3899 To make this work, we have to invert the THEN and ELSE blocks
3900 and reverse the jump condition. */
3901 then_bb
= else_edge
->dest
;
3902 else_bb
= NULL_BLOCK
;
3903 join_bb
= single_succ (then_bb
);
3904 then_else_reversed
= true;
3907 /* Not a form we can handle. */
3910 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3911 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3914 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3917 num_possible_if_blocks
++;
3922 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3923 (else_bb
) ? "-ELSE" : "",
3924 pass
, test_bb
->index
, then_bb
->index
);
3927 fprintf (dump_file
, ", else %d", else_bb
->index
);
3929 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3932 /* If the conditional jump is more than just a conditional
3933 jump, then we can not do if-conversion on this block. */
3934 jump
= BB_END (test_bb
);
3935 if (! onlyjump_p (jump
))
3938 /* If this is not a standard conditional jump, we can't parse it. */
3939 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3943 /* We must be comparing objects whose modes imply the size. */
3944 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3947 /* Initialize an IF_INFO struct to pass around. */
3948 memset (&if_info
, 0, sizeof if_info
);
3949 if_info
.test_bb
= test_bb
;
3950 if_info
.then_bb
= then_bb
;
3951 if_info
.else_bb
= else_bb
;
3952 if_info
.join_bb
= join_bb
;
3953 if_info
.cond
= cond
;
3954 if_info
.cond_earliest
= cond_earliest
;
3955 if_info
.jump
= jump
;
3956 if_info
.then_else_reversed
= then_else_reversed
;
3957 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3958 predictable_edge_p (then_edge
));
3960 /* Do the real work. */
3962 if (noce_process_if_block (&if_info
))
3965 if (HAVE_conditional_move
3966 && cond_move_process_if_block (&if_info
))
3973 /* Merge the blocks and mark for local life update. */
3976 merge_if_block (struct ce_if_block
* ce_info
)
3978 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3979 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3980 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3981 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3982 basic_block combo_bb
;
3984 /* All block merging is done into the lower block numbers. */
3987 df_set_bb_dirty (test_bb
);
3989 /* Merge any basic blocks to handle && and || subtests. Each of
3990 the blocks are on the fallthru path from the predecessor block. */
3991 if (ce_info
->num_multiple_test_blocks
> 0)
3993 basic_block bb
= test_bb
;
3994 basic_block last_test_bb
= ce_info
->last_test_bb
;
3995 basic_block fallthru
= block_fallthru (bb
);
4000 fallthru
= block_fallthru (bb
);
4001 merge_blocks (combo_bb
, bb
);
4004 while (bb
!= last_test_bb
);
4007 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4008 label, but it might if there were || tests. That label's count should be
4009 zero, and it normally should be removed. */
4013 /* If THEN_BB has no successors, then there's a BARRIER after it.
4014 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4015 is no longer needed, and in fact it is incorrect to leave it in
4017 if (EDGE_COUNT (then_bb
->succs
) == 0
4018 && EDGE_COUNT (combo_bb
->succs
) > 1)
4020 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4021 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4022 end
= NEXT_INSN (end
);
4024 if (end
&& BARRIER_P (end
))
4027 merge_blocks (combo_bb
, then_bb
);
4031 /* The ELSE block, if it existed, had a label. That label count
4032 will almost always be zero, but odd things can happen when labels
4033 get their addresses taken. */
4036 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4037 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4038 is no longer needed, and in fact it is incorrect to leave it in
4040 if (EDGE_COUNT (else_bb
->succs
) == 0
4041 && EDGE_COUNT (combo_bb
->succs
) > 1)
4043 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4044 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4045 end
= NEXT_INSN (end
);
4047 if (end
&& BARRIER_P (end
))
4050 merge_blocks (combo_bb
, else_bb
);
4054 /* If there was no join block reported, that means it was not adjacent
4055 to the others, and so we cannot merge them. */
4059 rtx_insn
*last
= BB_END (combo_bb
);
4061 /* The outgoing edge for the current COMBO block should already
4062 be correct. Verify this. */
4063 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4064 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4065 || (NONJUMP_INSN_P (last
)
4066 && GET_CODE (PATTERN (last
)) == TRAP_IF
4067 && (TRAP_CONDITION (PATTERN (last
))
4068 == const_true_rtx
)));
4071 /* There should still be something at the end of the THEN or ELSE
4072 blocks taking us to our final destination. */
4073 gcc_assert (JUMP_P (last
)
4074 || (EDGE_SUCC (combo_bb
, 0)->dest
4075 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4077 && SIBLING_CALL_P (last
))
4078 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4079 && can_throw_internal (last
)));
4082 /* The JOIN block may have had quite a number of other predecessors too.
4083 Since we've already merged the TEST, THEN and ELSE blocks, we should
4084 have only one remaining edge from our if-then-else diamond. If there
4085 is more than one remaining edge, it must come from elsewhere. There
4086 may be zero incoming edges if the THEN block didn't actually join
4087 back up (as with a call to a non-return function). */
4088 else if (EDGE_COUNT (join_bb
->preds
) < 2
4089 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4091 /* We can merge the JOIN cleanly and update the dataflow try
4092 again on this pass.*/
4093 merge_blocks (combo_bb
, join_bb
);
4098 /* We cannot merge the JOIN. */
4100 /* The outgoing edge for the current COMBO block should already
4101 be correct. Verify this. */
4102 gcc_assert (single_succ_p (combo_bb
)
4103 && single_succ (combo_bb
) == join_bb
);
4105 /* Remove the jump and cruft from the end of the COMBO block. */
4106 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4107 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4110 num_updated_if_blocks
++;
4113 /* Find a block ending in a simple IF condition and try to transform it
4114 in some way. When converting a multi-block condition, put the new code
4115 in the first such block and delete the rest. Return a pointer to this
4116 first block if some transformation was done. Return NULL otherwise. */
4119 find_if_header (basic_block test_bb
, int pass
)
4121 ce_if_block ce_info
;
4125 /* The kind of block we're looking for has exactly two successors. */
4126 if (EDGE_COUNT (test_bb
->succs
) != 2)
4129 then_edge
= EDGE_SUCC (test_bb
, 0);
4130 else_edge
= EDGE_SUCC (test_bb
, 1);
4132 if (df_get_bb_dirty (then_edge
->dest
))
4134 if (df_get_bb_dirty (else_edge
->dest
))
4137 /* Neither edge should be abnormal. */
4138 if ((then_edge
->flags
& EDGE_COMPLEX
)
4139 || (else_edge
->flags
& EDGE_COMPLEX
))
4142 /* Nor exit the loop. */
4143 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4144 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4147 /* The THEN edge is canonically the one that falls through. */
4148 if (then_edge
->flags
& EDGE_FALLTHRU
)
4150 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4151 std::swap (then_edge
, else_edge
);
4153 /* Otherwise this must be a multiway branch of some sort. */
4156 memset (&ce_info
, 0, sizeof (ce_info
));
4157 ce_info
.test_bb
= test_bb
;
4158 ce_info
.then_bb
= then_edge
->dest
;
4159 ce_info
.else_bb
= else_edge
->dest
;
4160 ce_info
.pass
= pass
;
4162 #ifdef IFCVT_MACHDEP_INIT
4163 IFCVT_MACHDEP_INIT (&ce_info
);
4166 if (!reload_completed
4167 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4170 if (reload_completed
4171 && targetm
.have_conditional_execution ()
4172 && cond_exec_find_if_block (&ce_info
))
4175 if (targetm
.have_trap ()
4176 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4177 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4180 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4181 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4183 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4185 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4193 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4194 /* Set this so we continue looking. */
4195 cond_exec_changed_p
= TRUE
;
4196 return ce_info
.test_bb
;
4199 /* Return true if a block has two edges, one of which falls through to the next
4200 block, and the other jumps to a specific block, so that we can tell if the
4201 block is part of an && test or an || test. Returns either -1 or the number
4202 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4205 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4208 int fallthru_p
= FALSE
;
4215 if (!cur_bb
|| !target_bb
)
4218 /* If no edges, obviously it doesn't jump or fallthru. */
4219 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4222 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4224 if (cur_edge
->flags
& EDGE_COMPLEX
)
4225 /* Anything complex isn't what we want. */
4228 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4231 else if (cur_edge
->dest
== target_bb
)
4238 if ((jump_p
& fallthru_p
) == 0)
4241 /* Don't allow calls in the block, since this is used to group && and ||
4242 together for conditional execution support. ??? we should support
4243 conditional execution support across calls for IA-64 some day, but
4244 for now it makes the code simpler. */
4245 end
= BB_END (cur_bb
);
4246 insn
= BB_HEAD (cur_bb
);
4248 while (insn
!= NULL_RTX
)
4255 && !DEBUG_INSN_P (insn
)
4256 && GET_CODE (PATTERN (insn
)) != USE
4257 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4263 insn
= NEXT_INSN (insn
);
4269 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4270 block. If so, we'll try to convert the insns to not require the branch.
4271 Return TRUE if we were successful at converting the block. */
4274 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4276 basic_block test_bb
= ce_info
->test_bb
;
4277 basic_block then_bb
= ce_info
->then_bb
;
4278 basic_block else_bb
= ce_info
->else_bb
;
4279 basic_block join_bb
= NULL_BLOCK
;
4284 ce_info
->last_test_bb
= test_bb
;
4286 /* We only ever should get here after reload,
4287 and if we have conditional execution. */
4288 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4290 /* Discover if any fall through predecessors of the current test basic block
4291 were && tests (which jump to the else block) or || tests (which jump to
4293 if (single_pred_p (test_bb
)
4294 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4296 basic_block bb
= single_pred (test_bb
);
4297 basic_block target_bb
;
4298 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4301 /* Determine if the preceding block is an && or || block. */
4302 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4304 ce_info
->and_and_p
= TRUE
;
4305 target_bb
= else_bb
;
4307 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4309 ce_info
->and_and_p
= FALSE
;
4310 target_bb
= then_bb
;
4313 target_bb
= NULL_BLOCK
;
4315 if (target_bb
&& n_insns
<= max_insns
)
4317 int total_insns
= 0;
4320 ce_info
->last_test_bb
= test_bb
;
4322 /* Found at least one && or || block, look for more. */
4325 ce_info
->test_bb
= test_bb
= bb
;
4326 total_insns
+= n_insns
;
4329 if (!single_pred_p (bb
))
4332 bb
= single_pred (bb
);
4333 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4335 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4337 ce_info
->num_multiple_test_blocks
= blocks
;
4338 ce_info
->num_multiple_test_insns
= total_insns
;
4340 if (ce_info
->and_and_p
)
4341 ce_info
->num_and_and_blocks
= blocks
;
4343 ce_info
->num_or_or_blocks
= blocks
;
4347 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4348 other than any || blocks which jump to the THEN block. */
4349 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4352 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4353 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4355 if (cur_edge
->flags
& EDGE_COMPLEX
)
4359 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4361 if (cur_edge
->flags
& EDGE_COMPLEX
)
4365 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4366 if (EDGE_COUNT (then_bb
->succs
) > 0
4367 && (!single_succ_p (then_bb
)
4368 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4369 || (epilogue_completed
4370 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4373 /* If the THEN block has no successors, conditional execution can still
4374 make a conditional call. Don't do this unless the ELSE block has
4375 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4376 Check for the last insn of the THEN block being an indirect jump, which
4377 is listed as not having any successors, but confuses the rest of the CE
4378 code processing. ??? we should fix this in the future. */
4379 if (EDGE_COUNT (then_bb
->succs
) == 0)
4381 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4383 rtx_insn
*last_insn
= BB_END (then_bb
);
4386 && NOTE_P (last_insn
)
4387 && last_insn
!= BB_HEAD (then_bb
))
4388 last_insn
= PREV_INSN (last_insn
);
4391 && JUMP_P (last_insn
)
4392 && ! simplejump_p (last_insn
))
4396 else_bb
= NULL_BLOCK
;
4402 /* If the THEN block's successor is the other edge out of the TEST block,
4403 then we have an IF-THEN combo without an ELSE. */
4404 else if (single_succ (then_bb
) == else_bb
)
4407 else_bb
= NULL_BLOCK
;
4410 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4411 has exactly one predecessor and one successor, and the outgoing edge
4412 is not complex, then we have an IF-THEN-ELSE combo. */
4413 else if (single_succ_p (else_bb
)
4414 && single_succ (then_bb
) == single_succ (else_bb
)
4415 && single_pred_p (else_bb
)
4416 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4417 && !(epilogue_completed
4418 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4419 join_bb
= single_succ (else_bb
);
4421 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4425 num_possible_if_blocks
++;
4430 "\nIF-THEN%s block found, pass %d, start block %d "
4431 "[insn %d], then %d [%d]",
4432 (else_bb
) ? "-ELSE" : "",
4435 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4437 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4440 fprintf (dump_file
, ", else %d [%d]",
4442 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4444 fprintf (dump_file
, ", join %d [%d]",
4446 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4448 if (ce_info
->num_multiple_test_blocks
> 0)
4449 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4450 ce_info
->num_multiple_test_blocks
,
4451 (ce_info
->and_and_p
) ? "&&" : "||",
4452 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4453 ce_info
->last_test_bb
->index
,
4454 ((BB_HEAD (ce_info
->last_test_bb
))
4455 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4458 fputc ('\n', dump_file
);
4461 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4462 first condition for free, since we've already asserted that there's a
4463 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4464 we checked the FALLTHRU flag, those are already adjacent to the last IF
4466 /* ??? As an enhancement, move the ELSE block. Have to deal with
4467 BLOCK notes, if by no other means than backing out the merge if they
4468 exist. Sticky enough I don't want to think about it now. */
4470 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4472 if ((next
= next
->next_bb
) != join_bb
4473 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4481 /* Do the real work. */
4483 ce_info
->else_bb
= else_bb
;
4484 ce_info
->join_bb
= join_bb
;
4486 /* If we have && and || tests, try to first handle combining the && and ||
4487 tests into the conditional code, and if that fails, go back and handle
4488 it without the && and ||, which at present handles the && case if there
4489 was no ELSE block. */
4490 if (cond_exec_process_if_block (ce_info
, TRUE
))
4493 if (ce_info
->num_multiple_test_blocks
)
4497 if (cond_exec_process_if_block (ce_info
, FALSE
))
4504 /* Convert a branch over a trap, or a branch
4505 to a trap, into a conditional trap. */
4508 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4510 basic_block then_bb
= then_edge
->dest
;
4511 basic_block else_bb
= else_edge
->dest
;
4512 basic_block other_bb
, trap_bb
;
4513 rtx_insn
*trap
, *jump
;
4515 rtx_insn
*cond_earliest
;
4518 /* Locate the block with the trap instruction. */
4519 /* ??? While we look for no successors, we really ought to allow
4520 EH successors. Need to fix merge_if_block for that to work. */
4521 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4522 trap_bb
= then_bb
, other_bb
= else_bb
;
4523 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4524 trap_bb
= else_bb
, other_bb
= then_bb
;
4530 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4531 test_bb
->index
, trap_bb
->index
);
4534 /* If this is not a standard conditional jump, we can't parse it. */
4535 jump
= BB_END (test_bb
);
4536 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4540 /* If the conditional jump is more than just a conditional jump, then
4541 we can not do if-conversion on this block. */
4542 if (! onlyjump_p (jump
))
4545 /* We must be comparing objects whose modes imply the size. */
4546 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4549 /* Reverse the comparison code, if necessary. */
4550 code
= GET_CODE (cond
);
4551 if (then_bb
== trap_bb
)
4553 code
= reversed_comparison_code (cond
, jump
);
4554 if (code
== UNKNOWN
)
4558 /* Attempt to generate the conditional trap. */
4559 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4560 copy_rtx (XEXP (cond
, 1)),
4561 TRAP_CODE (PATTERN (trap
)));
4565 /* Emit the new insns before cond_earliest. */
4566 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4568 /* Delete the trap block if possible. */
4569 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4570 df_set_bb_dirty (test_bb
);
4571 df_set_bb_dirty (then_bb
);
4572 df_set_bb_dirty (else_bb
);
4574 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4576 delete_basic_block (trap_bb
);
4580 /* Wire together the blocks again. */
4581 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4582 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4583 else if (trap_bb
== then_bb
)
4585 rtx lab
= JUMP_LABEL (jump
);
4586 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4587 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4588 LABEL_NUSES (lab
) += 1;
4589 JUMP_LABEL (newjump
) = lab
;
4590 emit_barrier_after (newjump
);
4594 if (can_merge_blocks_p (test_bb
, other_bb
))
4596 merge_blocks (test_bb
, other_bb
);
4600 num_updated_if_blocks
++;
4604 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4608 block_has_only_trap (basic_block bb
)
4612 /* We're not the exit block. */
4613 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4616 /* The block must have no successors. */
4617 if (EDGE_COUNT (bb
->succs
) > 0)
4620 /* The only instruction in the THEN block must be the trap. */
4621 trap
= first_active_insn (bb
);
4622 if (! (trap
== BB_END (bb
)
4623 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4624 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4630 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4631 transformable, but not necessarily the other. There need be no
4634 Return TRUE if we were successful at converting the block.
4636 Cases we'd like to look at:
4639 if (test) goto over; // x not live
4647 if (! test) goto label;
4650 if (test) goto E; // x not live
4664 (3) // This one's really only interesting for targets that can do
4665 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4666 // it results in multiple branches on a cache line, which often
4667 // does not sit well with predictors.
4669 if (test1) goto E; // predicted not taken
4685 (A) Don't do (2) if the branch is predicted against the block we're
4686 eliminating. Do it anyway if we can eliminate a branch; this requires
4687 that the sole successor of the eliminated block postdominate the other
4690 (B) With CE, on (3) we can steal from both sides of the if, creating
4699 Again, this is most useful if J postdominates.
4701 (C) CE substitutes for helpful life information.
4703 (D) These heuristics need a lot of work. */
4705 /* Tests for case 1 above. */
4708 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4710 basic_block then_bb
= then_edge
->dest
;
4711 basic_block else_bb
= else_edge
->dest
;
4713 int then_bb_index
, then_prob
;
4714 rtx else_target
= NULL_RTX
;
4716 /* If we are partitioning hot/cold basic blocks, we don't want to
4717 mess up unconditional or indirect jumps that cross between hot
4720 Basic block partitioning may result in some jumps that appear to
4721 be optimizable (or blocks that appear to be mergeable), but which really
4722 must be left untouched (they are required to make it safely across
4723 partition boundaries). See the comments at the top of
4724 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4726 if ((BB_END (then_bb
)
4727 && JUMP_P (BB_END (then_bb
))
4728 && CROSSING_JUMP_P (BB_END (then_bb
)))
4729 || (BB_END (test_bb
)
4730 && JUMP_P (BB_END (test_bb
))
4731 && CROSSING_JUMP_P (BB_END (test_bb
)))
4732 || (BB_END (else_bb
)
4733 && JUMP_P (BB_END (else_bb
))
4734 && CROSSING_JUMP_P (BB_END (else_bb
))))
4737 /* THEN has one successor. */
4738 if (!single_succ_p (then_bb
))
4741 /* THEN does not fall through, but is not strange either. */
4742 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4745 /* THEN has one predecessor. */
4746 if (!single_pred_p (then_bb
))
4749 /* THEN must do something. */
4750 if (forwarder_block_p (then_bb
))
4753 num_possible_if_blocks
++;
4756 "\nIF-CASE-1 found, start %d, then %d\n",
4757 test_bb
->index
, then_bb
->index
);
4759 if (then_edge
->probability
)
4760 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4762 then_prob
= REG_BR_PROB_BASE
/ 2;
4764 /* We're speculating from the THEN path, we want to make sure the cost
4765 of speculation is within reason. */
4766 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4767 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4768 predictable_edge_p (then_edge
)))))
4771 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4773 rtx_insn
*jump
= BB_END (else_edge
->src
);
4774 gcc_assert (JUMP_P (jump
));
4775 else_target
= JUMP_LABEL (jump
);
4778 /* Registers set are dead, or are predicable. */
4779 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4780 single_succ_edge (then_bb
), 1))
4783 /* Conversion went ok, including moving the insns and fixing up the
4784 jump. Adjust the CFG to match. */
4786 /* We can avoid creating a new basic block if then_bb is immediately
4787 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4788 through to else_bb. */
4790 if (then_bb
->next_bb
== else_bb
4791 && then_bb
->prev_bb
== test_bb
4792 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4794 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4797 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4798 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4799 else_bb
, else_target
);
4801 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4804 df_set_bb_dirty (test_bb
);
4805 df_set_bb_dirty (else_bb
);
4807 then_bb_index
= then_bb
->index
;
4808 delete_basic_block (then_bb
);
4810 /* Make rest of code believe that the newly created block is the THEN_BB
4811 block we removed. */
4814 df_bb_replace (then_bb_index
, new_bb
);
4815 /* This should have been done above via force_nonfallthru_and_redirect
4816 (possibly called from redirect_edge_and_branch_force). */
4817 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4821 num_updated_if_blocks
++;
4826 /* Test for case 2 above. */
4829 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4831 basic_block then_bb
= then_edge
->dest
;
4832 basic_block else_bb
= else_edge
->dest
;
4834 int then_prob
, else_prob
;
4836 /* We do not want to speculate (empty) loop latches. */
4838 && else_bb
->loop_father
->latch
== else_bb
)
4841 /* If we are partitioning hot/cold basic blocks, we don't want to
4842 mess up unconditional or indirect jumps that cross between hot
4845 Basic block partitioning may result in some jumps that appear to
4846 be optimizable (or blocks that appear to be mergeable), but which really
4847 must be left untouched (they are required to make it safely across
4848 partition boundaries). See the comments at the top of
4849 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4851 if ((BB_END (then_bb
)
4852 && JUMP_P (BB_END (then_bb
))
4853 && CROSSING_JUMP_P (BB_END (then_bb
)))
4854 || (BB_END (test_bb
)
4855 && JUMP_P (BB_END (test_bb
))
4856 && CROSSING_JUMP_P (BB_END (test_bb
)))
4857 || (BB_END (else_bb
)
4858 && JUMP_P (BB_END (else_bb
))
4859 && CROSSING_JUMP_P (BB_END (else_bb
))))
4862 /* ELSE has one successor. */
4863 if (!single_succ_p (else_bb
))
4866 else_succ
= single_succ_edge (else_bb
);
4868 /* ELSE outgoing edge is not complex. */
4869 if (else_succ
->flags
& EDGE_COMPLEX
)
4872 /* ELSE has one predecessor. */
4873 if (!single_pred_p (else_bb
))
4876 /* THEN is not EXIT. */
4877 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4880 if (else_edge
->probability
)
4882 else_prob
= else_edge
->probability
;
4883 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4887 else_prob
= REG_BR_PROB_BASE
/ 2;
4888 then_prob
= REG_BR_PROB_BASE
/ 2;
4891 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4892 if (else_prob
> then_prob
)
4894 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4895 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4901 num_possible_if_blocks
++;
4904 "\nIF-CASE-2 found, start %d, else %d\n",
4905 test_bb
->index
, else_bb
->index
);
4907 /* We're speculating from the ELSE path, we want to make sure the cost
4908 of speculation is within reason. */
4909 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4910 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4911 predictable_edge_p (else_edge
)))))
4914 /* Registers set are dead, or are predicable. */
4915 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4918 /* Conversion went ok, including moving the insns and fixing up the
4919 jump. Adjust the CFG to match. */
4921 df_set_bb_dirty (test_bb
);
4922 df_set_bb_dirty (then_bb
);
4923 delete_basic_block (else_bb
);
4926 num_updated_if_blocks
++;
4928 /* ??? We may now fallthru from one of THEN's successors into a join
4929 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4934 /* Used by the code above to perform the actual rtl transformations.
4935 Return TRUE if successful.
4937 TEST_BB is the block containing the conditional branch. MERGE_BB
4938 is the block containing the code to manipulate. DEST_EDGE is an
4939 edge representing a jump to the join block; after the conversion,
4940 TEST_BB should be branching to its destination.
4941 REVERSEP is true if the sense of the branch should be reversed. */
4944 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4945 basic_block other_bb
, edge dest_edge
, int reversep
)
4947 basic_block new_dest
= dest_edge
->dest
;
4948 rtx_insn
*head
, *end
, *jump
;
4949 rtx_insn
*earliest
= NULL
;
4951 bitmap merge_set
= NULL
;
4952 /* Number of pending changes. */
4953 int n_validated_changes
= 0;
4954 rtx new_dest_label
= NULL_RTX
;
4956 jump
= BB_END (test_bb
);
4958 /* Find the extent of the real code in the merge block. */
4959 head
= BB_HEAD (merge_bb
);
4960 end
= BB_END (merge_bb
);
4962 while (DEBUG_INSN_P (end
) && end
!= head
)
4963 end
= PREV_INSN (end
);
4965 /* If merge_bb ends with a tablejump, predicating/moving insn's
4966 into test_bb and then deleting merge_bb will result in the jumptable
4967 that follows merge_bb being removed along with merge_bb and then we
4968 get an unresolved reference to the jumptable. */
4969 if (tablejump_p (end
, NULL
, NULL
))
4973 head
= NEXT_INSN (head
);
4974 while (DEBUG_INSN_P (head
) && head
!= end
)
4975 head
= NEXT_INSN (head
);
4983 head
= NEXT_INSN (head
);
4984 while (DEBUG_INSN_P (head
) && head
!= end
)
4985 head
= NEXT_INSN (head
);
4990 if (!onlyjump_p (end
))
4997 end
= PREV_INSN (end
);
4998 while (DEBUG_INSN_P (end
) && end
!= head
)
4999 end
= PREV_INSN (end
);
5002 /* Don't move frame-related insn across the conditional branch. This
5003 can lead to one of the paths of the branch having wrong unwind info. */
5004 if (epilogue_completed
)
5006 rtx_insn
*insn
= head
;
5009 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5013 insn
= NEXT_INSN (insn
);
5017 /* Disable handling dead code by conditional execution if the machine needs
5018 to do anything funny with the tests, etc. */
5019 #ifndef IFCVT_MODIFY_TESTS
5020 if (targetm
.have_conditional_execution ())
5022 /* In the conditional execution case, we have things easy. We know
5023 the condition is reversible. We don't have to check life info
5024 because we're going to conditionally execute the code anyway.
5025 All that's left is making sure the insns involved can actually
5030 cond
= cond_exec_get_condition (jump
);
5034 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5035 int prob_val
= (note
? XINT (note
, 0) : -1);
5039 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5042 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5045 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5048 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5049 && verify_changes (0))
5050 n_validated_changes
= num_validated_changes ();
5058 /* If we allocated new pseudos (e.g. in the conditional move
5059 expander called from noce_emit_cmove), we must resize the
5061 if (max_regno
< max_reg_num ())
5062 max_regno
= max_reg_num ();
5064 /* Try the NCE path if the CE path did not result in any changes. */
5065 if (n_validated_changes
== 0)
5072 /* In the non-conditional execution case, we have to verify that there
5073 are no trapping operations, no calls, no references to memory, and
5074 that any registers modified are dead at the branch site. */
5076 if (!any_condjump_p (jump
))
5079 /* Find the extent of the conditional. */
5080 cond
= noce_get_condition (jump
, &earliest
, false);
5084 live
= BITMAP_ALLOC (®_obstack
);
5085 simulate_backwards_to_point (merge_bb
, live
, end
);
5086 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5088 df_get_live_in (other_bb
), NULL
);
5093 /* Collect the set of registers set in MERGE_BB. */
5094 merge_set
= BITMAP_ALLOC (®_obstack
);
5096 FOR_BB_INSNS (merge_bb
, insn
)
5097 if (NONDEBUG_INSN_P (insn
))
5098 df_simulate_find_defs (insn
, merge_set
);
5100 /* If shrink-wrapping, disable this optimization when test_bb is
5101 the first basic block and merge_bb exits. The idea is to not
5102 move code setting up a return register as that may clobber a
5103 register used to pass function parameters, which then must be
5104 saved in caller-saved regs. A caller-saved reg requires the
5105 prologue, killing a shrink-wrap opportunity. */
5106 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5107 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5108 && single_succ_p (new_dest
)
5109 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5110 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5115 return_regs
= BITMAP_ALLOC (®_obstack
);
5117 /* Start off with the intersection of regs used to pass
5118 params and regs used to return values. */
5119 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5120 if (FUNCTION_ARG_REGNO_P (i
)
5121 && targetm
.calls
.function_value_regno_p (i
))
5122 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5124 bitmap_and_into (return_regs
,
5125 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5126 bitmap_and_into (return_regs
,
5127 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5128 if (!bitmap_empty_p (return_regs
))
5130 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5131 if (NONDEBUG_INSN_P (insn
))
5135 /* If this insn sets any reg in return_regs, add all
5136 reg uses to the set of regs we're interested in. */
5137 FOR_EACH_INSN_DEF (def
, insn
)
5138 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5140 df_simulate_uses (insn
, return_regs
);
5144 if (bitmap_intersect_p (merge_set
, return_regs
))
5146 BITMAP_FREE (return_regs
);
5147 BITMAP_FREE (merge_set
);
5151 BITMAP_FREE (return_regs
);
5156 /* We don't want to use normal invert_jump or redirect_jump because
5157 we don't want to delete_insn called. Also, we want to do our own
5158 change group management. */
5160 old_dest
= JUMP_LABEL (jump
);
5161 if (other_bb
!= new_dest
)
5163 if (!any_condjump_p (jump
))
5166 if (JUMP_P (BB_END (dest_edge
->src
)))
5167 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5168 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5169 new_dest_label
= ret_rtx
;
5171 new_dest_label
= block_label (new_dest
);
5173 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5175 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5176 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5180 if (verify_changes (n_validated_changes
))
5181 confirm_change_group ();
5185 if (other_bb
!= new_dest
)
5187 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5190 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5193 std::swap (BRANCH_EDGE (test_bb
)->count
,
5194 FALLTHRU_EDGE (test_bb
)->count
);
5195 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5196 FALLTHRU_EDGE (test_bb
)->probability
);
5197 update_br_prob_note (test_bb
);
5201 /* Move the insns out of MERGE_BB to before the branch. */
5206 if (end
== BB_END (merge_bb
))
5207 BB_END (merge_bb
) = PREV_INSN (head
);
5209 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5210 notes being moved might become invalid. */
5216 if (! INSN_P (insn
))
5218 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5221 remove_note (insn
, note
);
5222 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5224 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5225 notes referring to the registers being set might become invalid. */
5231 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5232 remove_reg_equal_equiv_notes_for_regno (i
);
5234 BITMAP_FREE (merge_set
);
5237 reorder_insns (head
, end
, PREV_INSN (earliest
));
5240 /* Remove the jump and edge if we can. */
5241 if (other_bb
== new_dest
)
5244 remove_edge (BRANCH_EDGE (test_bb
));
5245 /* ??? Can't merge blocks here, as then_bb is still in use.
5246 At minimum, the merge will get done just before bb-reorder. */
5255 BITMAP_FREE (merge_set
);
5260 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5261 we are after combine pass. */
5264 if_convert (bool after_combine
)
5271 df_live_add_problem ();
5272 df_live_set_all_dirty ();
5275 /* Record whether we are after combine pass. */
5276 ifcvt_after_combine
= after_combine
;
5277 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5278 != CODE_FOR_nothing
);
5279 num_possible_if_blocks
= 0;
5280 num_updated_if_blocks
= 0;
5281 num_true_changes
= 0;
5283 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5284 mark_loop_exit_edges ();
5285 loop_optimizer_finalize ();
5286 free_dominance_info (CDI_DOMINATORS
);
5288 /* Compute postdominators. */
5289 calculate_dominance_info (CDI_POST_DOMINATORS
);
5291 df_set_flags (DF_LR_RUN_DCE
);
5293 /* Go through each of the basic blocks looking for things to convert. If we
5294 have conditional execution, we make multiple passes to allow us to handle
5295 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5300 /* Only need to do dce on the first pass. */
5301 df_clear_flags (DF_LR_RUN_DCE
);
5302 cond_exec_changed_p
= FALSE
;
5305 #ifdef IFCVT_MULTIPLE_DUMPS
5306 if (dump_file
&& pass
> 1)
5307 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5310 FOR_EACH_BB_FN (bb
, cfun
)
5313 while (!df_get_bb_dirty (bb
)
5314 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5318 #ifdef IFCVT_MULTIPLE_DUMPS
5319 if (dump_file
&& cond_exec_changed_p
)
5320 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5323 while (cond_exec_changed_p
);
5325 #ifdef IFCVT_MULTIPLE_DUMPS
5327 fprintf (dump_file
, "\n\n========== no more changes\n");
5330 free_dominance_info (CDI_POST_DOMINATORS
);
5335 clear_aux_for_blocks ();
5337 /* If we allocated new pseudos, we must resize the array for sched1. */
5338 if (max_regno
< max_reg_num ())
5339 max_regno
= max_reg_num ();
5341 /* Write the final stats. */
5342 if (dump_file
&& num_possible_if_blocks
> 0)
5345 "\n%d possible IF blocks searched.\n",
5346 num_possible_if_blocks
);
5348 "%d IF blocks converted.\n",
5349 num_updated_if_blocks
);
5351 "%d true changes made.\n\n\n",
5356 df_remove_problem (df_live
);
5358 checking_verify_flow_info ();
5361 /* If-conversion and CFG cleanup. */
5363 rest_of_handle_if_conversion (void)
5365 if (flag_if_conversion
)
5369 dump_reg_info (dump_file
);
5370 dump_flow_info (dump_file
, dump_flags
);
5372 cleanup_cfg (CLEANUP_EXPENSIVE
);
5382 const pass_data pass_data_rtl_ifcvt
=
5384 RTL_PASS
, /* type */
5386 OPTGROUP_NONE
, /* optinfo_flags */
5387 TV_IFCVT
, /* tv_id */
5388 0, /* properties_required */
5389 0, /* properties_provided */
5390 0, /* properties_destroyed */
5391 0, /* todo_flags_start */
5392 TODO_df_finish
, /* todo_flags_finish */
5395 class pass_rtl_ifcvt
: public rtl_opt_pass
5398 pass_rtl_ifcvt (gcc::context
*ctxt
)
5399 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5402 /* opt_pass methods: */
5403 virtual bool gate (function
*)
5405 return (optimize
> 0) && dbg_cnt (if_conversion
);
5408 virtual unsigned int execute (function
*)
5410 return rest_of_handle_if_conversion ();
5413 }; // class pass_rtl_ifcvt
5418 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5420 return new pass_rtl_ifcvt (ctxt
);
5424 /* Rerun if-conversion, as combine may have simplified things enough
5425 to now meet sequence length restrictions. */
5429 const pass_data pass_data_if_after_combine
=
5431 RTL_PASS
, /* type */
5433 OPTGROUP_NONE
, /* optinfo_flags */
5434 TV_IFCVT
, /* tv_id */
5435 0, /* properties_required */
5436 0, /* properties_provided */
5437 0, /* properties_destroyed */
5438 0, /* todo_flags_start */
5439 TODO_df_finish
, /* todo_flags_finish */
5442 class pass_if_after_combine
: public rtl_opt_pass
5445 pass_if_after_combine (gcc::context
*ctxt
)
5446 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5449 /* opt_pass methods: */
5450 virtual bool gate (function
*)
5452 return optimize
> 0 && flag_if_conversion
5453 && dbg_cnt (if_after_combine
);
5456 virtual unsigned int execute (function
*)
5462 }; // class pass_if_after_combine
5467 make_pass_if_after_combine (gcc::context
*ctxt
)
5469 return new pass_if_after_combine (ctxt
);
5475 const pass_data pass_data_if_after_reload
=
5477 RTL_PASS
, /* type */
5479 OPTGROUP_NONE
, /* optinfo_flags */
5480 TV_IFCVT2
, /* tv_id */
5481 0, /* properties_required */
5482 0, /* properties_provided */
5483 0, /* properties_destroyed */
5484 0, /* todo_flags_start */
5485 TODO_df_finish
, /* todo_flags_finish */
5488 class pass_if_after_reload
: public rtl_opt_pass
5491 pass_if_after_reload (gcc::context
*ctxt
)
5492 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5495 /* opt_pass methods: */
5496 virtual bool gate (function
*)
5498 return optimize
> 0 && flag_if_conversion2
5499 && dbg_cnt (if_after_reload
);
5502 virtual unsigned int execute (function
*)
5508 }; // class pass_if_after_reload
5513 make_pass_if_after_reload (gcc::context
*ctxt
)
5515 return new pass_if_after_reload (ctxt
);