1 ; Options for the ARM port of the compiler.
3 ; Copyright (C) 2005-2015 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 3, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>.
25 Name(tls_type) Type(enum arm_tls_type)
29 Enum(tls_type) String(gnu) Value(TLS_GNU)
32 Enum(tls_type) String(gnu2) Value(TLS_GNU2)
35 Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
39 Name(arm_abi_type) Type(enum arm_abi_type)
40 Known ARM ABIs (for use with the -mabi= option):
43 Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
46 Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
49 Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
52 Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
55 Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
58 Target Report Mask(ABORT_NORETURN)
59 Generate a call to abort if a noreturn function returns
62 Target RejectNegative Mask(APCS_FRAME) Undocumented
65 Target Report Mask(APCS_FLOAT)
66 Pass FP arguments in FP registers
69 Target Report Mask(APCS_FRAME)
70 Generate APCS conformant stack frames
73 Target Report Mask(APCS_REENT)
74 Generate re-entrant, PIC code
77 Target Report Mask(APCS_STACK) Undocumented
80 Target RejectNegative ToLower Joined Enum(arm_arch) Var(arm_arch_option)
81 Specify the name of the target architecture
83 ; Other arm_arch values are loaded from arm-tables.opt
84 ; but that is a generated file and this is an odd-one-out.
86 Enum(arm_arch) String(native) Value(-1) DriverOnly
89 Target Report RejectNegative InverseMask(THUMB)
90 Generate code in 32 bit ARM state.
93 Target Report RejectNegative Mask(BIG_END)
94 Assume target CPU is configured as big endian
96 mcallee-super-interworking
97 Target Report Mask(CALLEE_INTERWORKING)
98 Thumb: Assume non-static functions may be called from ARM code
100 mcaller-super-interworking
101 Target Report Mask(CALLER_INTERWORKING)
102 Thumb: Assume function pointers may go to non-Thumb aware code
105 Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(arm_none)
106 Specify the name of the target CPU
109 Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
110 Specify if floating point hardware should be used
113 Name(float_abi_type) Type(enum float_abi_type)
114 Known floating-point ABIs (for use with the -mfloat-abi= option):
117 Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
120 Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
123 Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
126 Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
127 Specify the __fp16 floating-point format
130 Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
131 Known __fp16 formats (for use with the -mfp16-format= option):
134 Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
137 Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
140 Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
143 Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index)
144 Specify the name of the target floating point hardware/format
147 Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
150 Target Report RejectNegative InverseMask(BIG_END)
151 Assume target CPU is configured as little endian
154 Target Report Mask(LONG_CALLS)
155 Generate call insns as indirect calls, if necessary
157 mpic-data-is-text-relative
158 Target Report Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE)
159 Assume data segments are relative to text segment.
162 Target RejectNegative Joined Var(arm_pic_register_string)
163 Specify the register to be used for PIC addressing
166 Target Report Mask(POKE_FUNCTION_NAME)
167 Store function names in object code
170 Target Report Mask(SCHED_PROLOG)
171 Permit scheduling of a function's prologue sequence
174 Target Report Mask(SINGLE_PIC_BASE)
175 Do not load the PIC register in function prologues
178 Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
180 mstructure-size-boundary=
181 Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
182 Specify the minimum bit alignment of structures
185 Target Report RejectNegative Mask(THUMB)
186 Generate code for Thumb state
189 Target Report Mask(INTERWORK)
190 Support calls between Thumb and ARM instruction sets
193 Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
194 Specify thread local storage scheme
197 Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
198 Specify how to access the thread pointer
201 Name(arm_tp_type) Type(enum arm_tp_type)
202 Valid arguments to -mtp=:
205 Enum(arm_tp_type) String(soft) Value(TP_SOFT)
208 Enum(arm_tp_type) String(auto) Value(TP_AUTO)
211 Enum(arm_tp_type) String(cp15) Value(TP_CP15)
214 Target Report Mask(TPCS_FRAME)
215 Thumb: Generate (non-leaf) stack frames even if not needed
218 Target Report Mask(TPCS_LEAF_FRAME)
219 Thumb: Generate (leaf) stack frames even if not needed
222 Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(arm_none)
223 Tune code for the given processor
225 ; Other processor_type values are loaded from arm-tables.opt
226 ; but that is a generated file and this is an odd-one-out.
228 Enum(processor_type) String(native) Value(-1) DriverOnly
230 mvectorize-with-neon-quad
231 Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
232 Use Neon quad-word (rather than double-word) registers for vectorization
234 mvectorize-with-neon-double
235 Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
236 Use Neon double-word (rather than quad-word) registers for vectorization
239 Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
240 Only generate absolute relocations on word sized values.
243 Target Report Var(arm_restrict_it) Init(2)
244 Generate IT blocks appropriate for ARMv8.
247 Target Report Mask(OLD_RTX_COSTS)
248 Use the old RTX costing tables (transitional).
251 Target Report Mask(NEW_GENERIC_COSTS)
252 Use the new generic RTX cost tables if new core-specific cost table not available (transitional).
255 Target Report Var(fix_cm3_ldrd) Init(2)
256 Avoid overlapping destination and address registers on LDRD instructions
257 that may trigger Cortex-M3 errata.
260 Target Report Var(unaligned_access) Init(2)
261 Enable unaligned word and halfword accesses to packed data.
264 Target Report RejectNegative Var(use_neon_for_64bits) Init(0)
265 Use Neon to perform 64-bits operations rather than core registers.
268 Target Report Var(target_slow_flash_data) Init(0)
269 Assume loading data from flash is slower than fetching instructions.
272 Target Report Var(inline_asm_unified) Init(0)
273 Assume unified syntax for Thumb inline assembly code.