gcc/ChangeLog

   1 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
   2
   3         * Makefile.in (OBJS): Add early-remat.o.
   4         * target.def (select_early_remat_modes): New hook.
   5         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
   6         * doc/tm.texi: Regenerate.
   7         * targhooks.h (default_select_early_remat_modes): Declare.
   8         * targhooks.c (default_select_early_remat_modes): New function.
   9         * timevar.def (TV_EARLY_REMAT): New timevar.
  10         * passes.def (pass_early_remat): New pass.
  11         * tree-pass.h (make_pass_early_remat): Declare.
  12         * early-remat.c: New file.
  13         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
  14         function.
  15         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
  16
  17 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  18             Alan Hayward  <alan.hayward@arm.com>
  19             David Sherwood  <david.sherwood@arm.com>
  20
  21         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
  22         vfm1 with a bound_epilog parameter.
  23         (vect_do_peeling): Update calls accordingly, and move the prologue
  24         call earlier in the function.  Treat the base bound_epilog as 0 for
  25         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
  26         this base when peeling for gaps.
  27         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
  28         with fully-masked loops.
  29         (vect_estimate_min_profitable_iters): Handle the single peeled
  30         iteration in that case.
  31
  32 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  33             Alan Hayward  <alan.hayward@arm.com>
  34             David Sherwood  <david.sherwood@arm.com>
  35
  36         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
  37         single-element interleaving even if the size is not a power of 2.
  38         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
  39         accesses for single-element interleaving if the group size is
  40         not a power of 2.
  41
  42 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  43             Alan Hayward  <alan.hayward@arm.com>
  44             David Sherwood  <david.sherwood@arm.com>
  45
  46         * doc/md.texi (fold_extract_last_@var{m}): Document.
  47         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
  48         * optabs.def (fold_extract_last_optab): New optab.
  49         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
  50         * internal-fn.c (fold_extract_direct): New macro.
  51         (expand_fold_extract_optab_fn): Likewise.
  52         (direct_fold_extract_optab_supported_p): Likewise.
  53         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
  54         * tree-vect-loop.c (vect_model_reduction_cost): Handle
  55         EXTRACT_LAST_REDUCTION.
  56         (get_initial_def_for_reduction): Do not create an initial vector
  57         for EXTRACT_LAST_REDUCTION reductions.
  58         (vectorizable_reduction): Leave the scalar phi in place for
  59         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
  60         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
  61         epilogue code for EXTRACT_LAST_REDUCTION and defer the
  62         transform phase to vectorizable_condition.
  63         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
  64         split out from...
  65         (vect_finish_stmt_generation): ...here.
  66         (vect_finish_replace_stmt): New function.
  67         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
  68         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
  69         pattern.
  70         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
  71
  72 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  73             Alan Hayward  <alan.hayward@arm.com>
  74             David Sherwood  <david.sherwood@arm.com>
  75
  76         * doc/md.texi (extract_last_@var{m}): Document.
  77         * optabs.def (extract_last_optab): New optab.
  78         * internal-fn.def (EXTRACT_LAST): New internal function.
  79         * internal-fn.c (cond_unary_direct): New macro.
  80         (expand_cond_unary_optab_fn): Likewise.
  81         (direct_cond_unary_optab_supported_p): Likewise.
  82         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
  83         loops using EXTRACT_LAST.
  84         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
  85         (extract_last_<mode>): ...this optab.
  86         (vec_extract<mode><Vel>): Update accordingly.
  87
  88 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  89             Alan Hayward  <alan.hayward@arm.com>
  90             David Sherwood  <david.sherwood@arm.com>
  91
  92         * target.def (empty_mask_is_expensive): New hook.
  93         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
  94         * doc/tm.texi: Regenerate.
  95         * targhooks.h (default_empty_mask_is_expensive): Declare.
  96         * targhooks.c (default_empty_mask_is_expensive): New function.
  97         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
  98         if the target says that empty masks are expensive.
  99         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
 100         New function.
 101         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
 102
 103 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 104             Alan Hayward  <alan.hayward@arm.com>
 105             David Sherwood  <david.sherwood@arm.com>
 106
 107         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
 108         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
 109         (vect_use_loop_mask_for_alignment_p): New function.
 110         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
 111         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
 112         niters_skip argument.  Make sure that the first niters_skip elements
 113         of the first iteration are inactive.
 114         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
 115         Update call to vect_set_loop_masks_directly.
 116         (get_misalign_in_elems): New function, split out from...
 117         (vect_gen_prolog_loop_niters): ...here.
 118         (vect_update_init_of_dr): Take a code argument that specifies whether
 119         the adjustment should be added or subtracted.
 120         (vect_update_init_of_drs): Likewise.
 121         (vect_prepare_for_masked_peels): New function.
 122         (vect_do_peeling): Skip prologue peeling if we're using a mask
 123         instead.  Update call to vect_update_inits_of_drs.
 124         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
 125         mask_skip_niters.
 126         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
 127         alignment.  Do not include the number of peeled iterations in
 128         the minimum threshold in that case.
 129         (vectorizable_induction): Adjust the start value down by
 130         LOOP_VINFO_MASK_SKIP_NITERS iterations.
 131         (vect_transform_loop): Call vect_prepare_for_masked_peels.
 132         Take the number of skipped iterations into account when calculating
 133         the loop bounds.
 134         * tree-vect-stmts.c (vect_gen_while_not): New function.
 135
 136 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 137             Alan Hayward  <alan.hayward@arm.com>
 138             David Sherwood  <david.sherwood@arm.com>
 139
 140         * doc/sourcebuild.texi (vect_fully_masked): Document.
 141         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
 142         default value to 0.
 143         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
 144         split out from...
 145         (vect_analyze_loop_2): ...here. Don't check the vectorization
 146         factor against the number of loop iterations if the loop is
 147         fully-masked.
 148
 149 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 150             Alan Hayward  <alan.hayward@arm.com>
 151             David Sherwood  <david.sherwood@arm.com>
 152
 153         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
 154         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
 155         (dump_groups): Update accordingly.
 156         (iv_use::mem_type): New member variable.
 157         (address_p): New function.
 158         (record_use): Add a mem_type argument and initialize the new
 159         mem_type field.
 160         (record_group_use): Add a mem_type argument.  Use address_p.
 161         Remove obsolete null checks of base_object.  Update call to record_use.
 162         (find_interesting_uses_op): Update call to record_group_use.
 163         (find_interesting_uses_cond): Likewise.
 164         (find_interesting_uses_address): Likewise.
 165         (get_mem_type_for_internal_fn): New function.
 166         (find_address_like_use): Likewise.
 167         (find_interesting_uses_stmt): Try find_address_like_use before
 168         calling find_interesting_uses_op.
 169         (addr_offset_valid_p): Use the iv mem_type field as the type
 170         of the addressed memory.
 171         (add_autoinc_candidates): Likewise.
 172         (get_address_cost): Likewise.
 173         (split_small_address_groups_p): Use address_p.
 174         (split_address_groups): Likewise.
 175         (add_iv_candidate_for_use): Likewise.
 176         (autoinc_possible_for_pair): Likewise.
 177         (rewrite_groups): Likewise.
 178         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
 179         (determine_group_iv_cost): Update after split of USE_ADDRESS.
 180         (get_alias_ptr_type_for_ptr_address): New function.
 181         (rewrite_use_address): Rewrite address uses in calls that were
 182         identified by find_address_like_use.
 183
 184 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 185             Alan Hayward  <alan.hayward@arm.com>
 186             David Sherwood  <david.sherwood@arm.com>
 187
 188         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
 189         TARGET_MEM_REFs.
 190         * gimple-expr.h (is_gimple_addressable: Likewise.
 191         * gimple-expr.c (is_gimple_address): Likewise.
 192         * internal-fn.c (expand_call_mem_ref): New function.
 193         (expand_mask_load_optab_fn): Use it.
 194         (expand_mask_store_optab_fn): Likewise.
 195
 196 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 197             Alan Hayward  <alan.hayward@arm.com>
 198             David Sherwood  <david.sherwood@arm.com>
 199
 200         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
 201         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
 202         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
 203         (cond_umax@var{mode}): Document.
 204         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
 205         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
 206         (cond_umin_optab, cond_umax_optab): New optabs.
 207         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
 208         (COND_IOR, COND_XOR): New internal functions.
 209         * internal-fn.h (get_conditional_internal_fn): Declare.
 210         * internal-fn.c (cond_binary_direct): New macro.
 211         (expand_cond_binary_optab_fn): Likewise.
 212         (direct_cond_binary_optab_supported_p): Likewise.
 213         (get_conditional_internal_fn): New function.
 214         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
 215         Cope with reduction statements that are vectorized as calls rather
 216         than assignments.
 217         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
 218         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
 219         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
 220         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
 221         (UNSPEC_COND_EOR): New unspecs.
 222         (optab): Add mappings for them.
 223         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
 224         (sve_int_op, sve_fp_op): New int attributes.
 225
 226 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 227             Alan Hayward  <alan.hayward@arm.com>
 228             David Sherwood  <david.sherwood@arm.com>
 229
 230         * optabs.def (while_ult_optab): New optab.
 231         * doc/md.texi (while_ult@var{m}@var{n}): Document.
 232         * internal-fn.def (WHILE_ULT): New internal function.
 233         * internal-fn.h (direct_internal_fn_supported_p): New override
 234         that takes two types as argument.
 235         * internal-fn.c (while_direct): New macro.
 236         (expand_while_optab_fn): New function.
 237         (convert_optab_supported_p): Likewise.
 238         (direct_while_optab_supported_p): New macro.
 239         * wide-int.h (wi::udiv_ceil): New function.
 240         * tree-vectorizer.h (rgroup_masks): New structure.
 241         (vec_loop_masks): New typedef.
 242         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
 243         and fully_masked_p.
 244         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
 245         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
 246         (vect_max_vf): New function.
 247         (slpeel_make_loop_iterate_ntimes): Delete.
 248         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
 249         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
 250         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
 251         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
 252         internal-fn.h, stor-layout.h and optabs-query.h.
 253         (vect_set_loop_mask): New function.
 254         (add_preheader_seq): Likewise.
 255         (add_header_seq): Likewise.
 256         (interleave_supported_p): Likewise.
 257         (vect_maybe_permute_loop_masks): Likewise.
 258         (vect_set_loop_masks_directly): Likewise.
 259         (vect_set_loop_condition_masked): Likewise.
 260         (vect_set_loop_condition_unmasked): New function, split out from
 261         slpeel_make_loop_iterate_ntimes.
 262         (slpeel_make_loop_iterate_ntimes): Rename to..
 263         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
 264         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
 265         (vect_do_peeling): Update call accordingly.
 266         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
 267         loops.
 268         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
 269         mask_compare_type, can_fully_mask_p and fully_masked_p.
 270         (release_vec_loop_masks): New function.
 271         (_loop_vec_info): Use it to free the loop masks.
 272         (can_produce_all_loop_masks_p): New function.
 273         (vect_get_max_nscalars_per_iter): Likewise.
 274         (vect_verify_full_masking): Likewise.
 275         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
 276         retries, and free the mask rgroups before retrying.  Check loop-wide
 277         reasons for disallowing fully-masked loops.  Make the final decision
 278         about whether use a fully-masked loop or not.
 279         (vect_estimate_min_profitable_iters): Do not assume that peeling
 280         for the number of iterations will be needed for fully-masked loops.
 281         (vectorizable_reduction): Disable fully-masked loops.
 282         (vectorizable_live_operation): Likewise.
 283         (vect_halve_mask_nunits): New function.
 284         (vect_double_mask_nunits): Likewise.
 285         (vect_record_loop_mask): Likewise.
 286         (vect_get_loop_mask): Likewise.
 287         (vect_transform_loop): Handle the case in which the final loop
 288         iteration might handle a partial vector.  Call vect_set_loop_condition
 289         instead of slpeel_make_loop_iterate_ntimes.
 290         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
 291         (check_load_store_masking): New function.
 292         (prepare_load_store_mask): Likewise.
 293         (vectorizable_store): Handle fully-masked loops.
 294         (vectorizable_load): Likewise.
 295         (supportable_widening_operation): Use vect_halve_mask_nunits for
 296         booleans.
 297         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
 298         (vect_gen_while): New function.
 299         * config/aarch64/aarch64.md (umax<mode>3): New expander.
 300         (aarch64_uqdec<mode>): New insn.
 301
 302 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 303             Alan Hayward  <alan.hayward@arm.com>
 304             David Sherwood  <david.sherwood@arm.com>
 305
 306         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
 307         (reduc_xor_scal_optab): New optabs.
 308         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
 309         (reduc_xor_scal_@var{m}): Document.
 310         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
 311         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
 312         internal functions.
 313         * fold-const-call.c (fold_const_call): Handle them.
 314         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
 315         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
 316         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
 317         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
 318         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
 319         (UNSPEC_XORV): New unspecs.
 320         (optab): Add entries for them.
 321         (BITWISEV): New int iterator.
 322         (bit_reduc_op): New int attributes.
 323
 324 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 325             Alan Hayward  <alan.hayward@arm.com>
 326             David Sherwood  <david.sherwood@arm.com>
 327
 328         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
 329         * internal-fn.def (VEC_SHL_INSERT): New internal function.
 330         * optabs.def (vec_shl_insert_optab): New optab.
 331         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
 332         (duplicate_and_interleave): Likewise.
 333         * tree-vect-loop.c: Include internal-fn.h.
 334         (neutral_op_for_slp_reduction): New function, split out from
 335         get_initial_defs_for_reduction.
 336         (get_initial_def_for_reduction): Handle option 2 for variable-length
 337         vectors by loading the neutral value into a vector and then shifting
 338         the initial value into element 0.
 339         (get_initial_defs_for_reduction): Replace the code argument with
 340         the neutral value calculated by neutral_op_for_slp_reduction.
 341         Use gimple_build_vector for constant-length vectors.
 342         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
 343         but the first group_size elements have a neutral value.
 344         Use duplicate_and_interleave otherwise.
 345         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
 346         Update call to get_initial_defs_for_reduction.  Handle SLP
 347         reductions for variable-length vectors by creating one vector
 348         result for each scalar result, with the elements associated
 349         with other scalar results stubbed out with the neutral value.
 350         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
 351         Require IFN_VEC_SHL_INSERT for double reductions on
 352         variable-length vectors, or SLP reductions that have
 353         a neutral value.  Require can_duplicate_and_interleave_p
 354         support for variable-length unchained SLP reductions if there
 355         is no neutral value, such as for MIN/MAX reductions.  Also require
 356         the number of vector elements to be a multiple of the number of
 357         SLP statements when doing variable-length unchained SLP reductions.
 358         Update call to vect_create_epilog_for_reduction.
 359         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
 360         and remove initial values.
 361         (duplicate_and_interleave): Make public.
 362         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
 363         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
 364
 365 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 366             Alan Hayward  <alan.hayward@arm.com>
 367             David Sherwood  <david.sherwood@arm.com>
 368
 369         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
 370         (can_duplicate_and_interleave_p): New function.
 371         (vect_get_and_check_slp_defs): Take the vector of statements
 372         rather than just the current one.  Remove excess parentheses.
 373         Restriction rejectinon of vect_constant_def and vect_external_def
 374         for variable-length vectors to boolean types, or types for which
 375         can_duplicate_and_interleave_p is false.
 376         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
 377         (duplicate_and_interleave): New function.
 378         (vect_get_constant_vectors): Use gimple_build_vector for
 379         constant-length vectors and suitable variable-length constant
 380         vectors.  Use duplicate_and_interleave for other variable-length
 381         vectors.  Don't defer the update when inserting new statements.
 382
 383 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 384             Alan Hayward  <alan.hayward@arm.com>
 385             David Sherwood  <david.sherwood@arm.com>
 386
 387         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
 388         min_profitable_iters doesn't go negative.
 389
 390 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 391             Alan Hayward  <alan.hayward@arm.com>
 392             David Sherwood  <david.sherwood@arm.com>
 393
 394         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
 395         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
 396         * optabs.def (vec_mask_load_lanes_optab): New optab.
 397         (vec_mask_store_lanes_optab): Likewise.
 398         * internal-fn.def (MASK_LOAD_LANES): New internal function.
 399         (MASK_STORE_LANES): Likewise.
 400         * internal-fn.c (mask_load_lanes_direct): New macro.
 401         (mask_store_lanes_direct): Likewise.
 402         (expand_mask_load_optab_fn): Handle masked operations.
 403         (expand_mask_load_lanes_optab_fn): New macro.
 404         (expand_mask_store_optab_fn): Handle masked operations.
 405         (expand_mask_store_lanes_optab_fn): New macro.
 406         (direct_mask_load_lanes_optab_supported_p): Likewise.
 407         (direct_mask_store_lanes_optab_supported_p): Likewise.
 408         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
 409         parameter.
 410         (vect_load_lanes_supported): Likewise.
 411         * tree-vect-data-refs.c (strip_conversion): New function.
 412         (can_group_stmts_p): Likewise.
 413         (vect_analyze_data_ref_accesses): Use it instead of checking
 414         for a pair of assignments.
 415         (vect_store_lanes_supported): Take a masked_p parameter.
 416         (vect_load_lanes_supported): Likewise.
 417         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
 418         vect_store_lanes_supported and vect_load_lanes_supported.
 419         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
 420         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
 421         parameter.  Don't allow gaps for masked accesses.
 422         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
 423         and vect_load_lanes_supported.
 424         (get_load_store_type): Take a masked_p parameter and update
 425         call to get_group_load_store_type.
 426         (vectorizable_store): Update call to get_load_store_type.
 427         Handle IFN_MASK_STORE_LANES.
 428         (vectorizable_load): Update call to get_load_store_type.
 429         Handle IFN_MASK_LOAD_LANES.
 430
 431 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 432             Alan Hayward  <alan.hayward@arm.com>
 433             David Sherwood  <david.sherwood@arm.com>
 434
 435         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
 436         modes for SVE.
 437         * config/aarch64/aarch64-protos.h
 438         (aarch64_sve_struct_memory_operand_p): Declare.
 439         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
 440         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
 441         (VPRED, vpred): Handle SVE structure modes.
 442         * config/aarch64/constraints.md (Utx): New constraint.
 443         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
 444         (aarch64_sve_struct_nonimmediate_operand): New predicates.
 445         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
 446         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
 447         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
 448         structure modes.  Split into pieces after RA.
 449         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
 450         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
 451         New patterns.
 452         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
 453         SVE structure modes.
 454         (aarch64_classify_address): Likewise.
 455         (sizetochar): Move earlier in file.
 456         (aarch64_print_operand): Handle SVE register lists.
 457         (aarch64_array_mode): New function.
 458         (aarch64_sve_struct_memory_operand_p): Likewise.
 459         (TARGET_ARRAY_MODE): Redefine.
 460
 461 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 462             Alan Hayward  <alan.hayward@arm.com>
 463             David Sherwood  <david.sherwood@arm.com>
 464
 465         * target.def (array_mode): New target hook.
 466         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
 467         * doc/tm.texi: Regenerate.
 468         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
 469         * hooks.c (hook_optmode_mode_uhwi_none): New function.
 470         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
 471         targetm.array_mode.
 472         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
 473         type sizes.
 474
 475 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 476             Alan Hayward  <alan.hayward@arm.com>
 477             David Sherwood  <david.sherwood@arm.com>
 478
 479         * fold-const.c (fold_binary_loc): Check the argument types
 480         rather than the result type when testing for a vector operation.
 481
 482 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 483
 484         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
 485         * doc/tm.texi: Regenerate.
 486
 487 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 488             Alan Hayward  <alan.hayward@arm.com>
 489             David Sherwood  <david.sherwood@arm.com>
 490
 491         * doc/invoke.texi (-msve-vector-bits=): Document new option.
 492         (sve): Document new AArch64 extension.
 493         * doc/md.texi (w): Extend the description of the AArch64
 494         constraint to include SVE vectors.
 495         (Upl, Upa): Document new AArch64 predicate constraints.
 496         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
 497         enum.
 498         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
 499         (msve-vector-bits=): New option.
 500         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
 501         SVE when these are disabled.
 502         (sve): New extension.
 503         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
 504         modes.  Adjust their number of units based on aarch64_sve_vg.
 505         (MAX_BITSIZE_MODE_ANY_MODE): Define.
 506         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
 507         aarch64_addr_query_type.
 508         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
 509         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
 510         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
 511         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
 512         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
 513         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
 514         (aarch64_simd_imm_zero_p): Delete.
 515         (aarch64_check_zero_based_sve_index_immediate): Declare.
 516         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
 517         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
 518         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
 519         (aarch64_sve_float_mul_immediate_p): Likewise.
 520         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
 521         rather than an rtx.
 522         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
 523         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
 524         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
 525         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
 526         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
 527         (aarch64_regmode_natural_size): Likewise.
 528         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
 529         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
 530         left one place.
 531         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
 532         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
 533         for VG and the SVE predicate registers.
 534         (V_ALIASES): Add a "z"-prefixed alias.
 535         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
 536         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
 537         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
 538         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
 539         (REG_CLASS_NAMES): Add entries for them.
 540         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
 541         and the predicate registers.
 542         (aarch64_sve_vg): Declare.
 543         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
 544         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
 545         (REGMODE_NATURAL_SIZE): Define.
 546         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
 547         SVE macros.
 548         * config/aarch64/aarch64.c: Include cfgrtl.h.
 549         (simd_immediate_info): Add a constructor for series vectors,
 550         and an associated step field.
 551         (aarch64_sve_vg): New variable.
 552         (aarch64_dbx_register_number): Handle VG and the predicate registers.
 553         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
 554         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
 555         (VEC_ANY_DATA, VEC_STRUCT): New constants.
 556         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
 557         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
 558         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
 559         (aarch64_get_mask_mode): New functions.
 560         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
 561         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
 562         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
 563         predicate modes and predicate registers.  Explicitly restrict
 564         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
 565         to store a vector mode if it is recognized by
 566         aarch64_classify_vector_mode.
 567         (aarch64_regmode_natural_size): New function.
 568         (aarch64_hard_regno_caller_save_mode): Return the original mode
 569         for predicates.
 570         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
 571         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
 572         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
 573         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
 574         functions.
 575         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
 576         does not overlap dest if the function is frame-related.  Handle
 577         SVE constants.
 578         (aarch64_split_add_offset): New function.
 579         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
 580         them aarch64_add_offset.
 581         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
 582         and update call to aarch64_sub_sp.
 583         (aarch64_add_cfa_expression): New function.
 584         (aarch64_expand_prologue): Pass extra temporary registers to the
 585         functions above.  Handle the case in which we need to emit new
 586         DW_CFA_expressions for registers that were originally saved
 587         relative to the stack pointer, but now have to be expressed
 588         relative to the frame pointer.
 589         (aarch64_output_mi_thunk): Pass extra temporary registers to the
 590         functions above.
 591         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
 592         IP0 and IP1 values for SVE frames.
 593         (aarch64_expand_vec_series): New function.
 594         (aarch64_expand_sve_widened_duplicate): Likewise.
 595         (aarch64_expand_sve_const_vector): Likewise.
 596         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
 597         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
 598         into the register, rather than emitting a SET directly.
 599         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
 600         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
 601         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
 602         (offset_9bit_signed_scaled_p): New functions.
 603         (aarch64_replicate_bitmask_imm): New function.
 604         (aarch64_bitmask_imm): Use it.
 605         (aarch64_cannot_force_const_mem): Reject expressions involving
 606         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
 607         (aarch64_classify_index): Handle SVE indices, by requiring
 608         a plain register index with a scale that matches the element size.
 609         (aarch64_classify_address): Handle SVE addresses.  Assert that
 610         the mode of the address is VOIDmode or an integer mode.
 611         Update call to aarch64_classify_symbol.
 612         (aarch64_classify_symbolic_expression): Update call to
 613         aarch64_classify_symbol.
 614         (aarch64_const_vec_all_in_range_p): New function.
 615         (aarch64_print_vector_float_operand): Likewise.
 616         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
 617         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
 618         and the FP immediates 1.0 and 0.5.
 619         (aarch64_print_address_internal): Handle SVE addresses.
 620         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
 621         (aarch64_regno_regclass): Handle predicate registers.
 622         (aarch64_secondary_reload): Handle big-endian reloads of SVE
 623         data modes.
 624         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
 625         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
 626         (aarch64_convert_sve_vector_bits): New function.
 627         (aarch64_override_options): Use it to handle -msve-vector-bits=.
 628         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
 629         rather than an rtx.
 630         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
 631         Handle SVE vector and predicate modes.  Accept VL-based constants
 632         that need only one temporary register, and VL offsets that require
 633         no temporary registers.
 634         (aarch64_conditional_register_usage): Mark the predicate registers
 635         as fixed if SVE isn't available.
 636         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
 637         Return true for SVE vector and predicate modes.
 638         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
 639         rather than an unsigned int.  Handle SVE modes.
 640         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
 641         SVE modes.
 642         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
 643         if SVE is enabled.
 644         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
 645         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
 646         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
 647         (aarch64_sve_float_mul_immediate_p): New functions.
 648         (aarch64_sve_valid_immediate): New function.
 649         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
 650         Explicitly reject structure modes.  Check for INDEX constants.
 651         Handle PTRUE and PFALSE constants.
 652         (aarch64_check_zero_based_sve_index_immediate): New function.
 653         (aarch64_simd_imm_zero_p): Delete.
 654         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
 655         vector modes.  Accept constants in the range of CNT[BHWD].
 656         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
 657         ask for an Advanced SIMD mode.
 658         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
 659         (aarch64_simd_vector_alignment): Handle SVE predicates.
 660         (aarch64_vectorize_preferred_vector_alignment): New function.
 661         (aarch64_simd_vector_alignment_reachable): Use it instead of
 662         the vector size.
 663         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
 664         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
 665         functions.
 666         (MAX_VECT_LEN): Delete.
 667         (expand_vec_perm_d): Add a vec_flags field.
 668         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
 669         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
 670         (aarch64_evpc_ext): Don't apply a big-endian lane correction
 671         for SVE modes.
 672         (aarch64_evpc_rev): Rename to...
 673         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
 674         (aarch64_evpc_rev_global): New function.
 675         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
 676         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
 677         MAX_VECT_LEN.
 678         (aarch64_evpc_sve_tbl): New function.
 679         (aarch64_expand_vec_perm_const_1): Update after rename of
 680         aarch64_evpc_rev.  Handle SVE permutes too, trying
 681         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
 682         than aarch64_evpc_tbl.
 683         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
 684         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
 685         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
 686         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
 687         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
 688         (aarch64_expand_sve_vcond): New functions.
 689         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
 690         of aarch64_vector_mode_p.
 691         (aarch64_dwarf_poly_indeterminate_value): New function.
 692         (aarch64_compute_pressure_classes): Likewise.
 693         (aarch64_can_change_mode_class): Likewise.
 694         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
 695         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
 696         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
 697         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
 698         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
 699         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
 700         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
 701         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
 702         constraints.
 703         (Dn, Dl, Dr): Accept const as well as const_vector.
 704         (Dz): Likewise.  Compare against CONST0_RTX.
 705         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
 706         of "vector" where appropriate.
 707         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
 708         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
 709         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
 710         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
 711         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
 712         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
 713         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
 714         (v_int_equiv): Extend to SVE modes.
 715         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
 716         mode attributes.
 717         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
 718         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
 719         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
 720         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
 721         (SVE_COND_FP_CMP): New int iterators.
 722         (perm_hilo): Handle the new unpack unspecs.
 723         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
 724         attributes.
 725         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
 726         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
 727         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
 728         (aarch64_equality_operator, aarch64_constant_vector_operand)
 729         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
 730         (aarch64_sve_nonimmediate_operand): Likewise.
 731         (aarch64_sve_general_operand): Likewise.
 732         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
 733         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
 734         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
 735         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
 736         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
 737         (aarch64_sve_float_arith_immediate): Likewise.
 738         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
 739         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
 740         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
 741         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
 742         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
 743         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
 744         (aarch64_sve_float_arith_operand): Likewise.
 745         (aarch64_sve_float_arith_with_sub_operand): Likewise.
 746         (aarch64_sve_float_mul_operand): Likewise.
 747         (aarch64_sve_vec_perm_operand): Likewise.
 748         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
 749         (aarch64_mov_operand): Accept const_poly_int and const_vector.
 750         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
 751         as well as const_vector.
 752         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
 753         in file.  Use CONST0_RTX and CONSTM1_RTX.
 754         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
 755         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
 756         Use aarch64_simd_imm_zero.
 757         * config/aarch64/aarch64-sve.md: New file.
 758         * config/aarch64/aarch64.md: Include it.
 759         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
 760         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
 761         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
 762         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
 763         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
 764         (sve): New attribute.
 765         (enabled): Disable instructions with the sve attribute unless
 766         TARGET_SVE.
 767         (movqi, movhi): Pass CONST_POLY_INT operaneds through
 768         aarch64_expand_mov_immediate.
 769         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
 770         CNT[BHSD] immediates.
 771         (movti): Split CONST_POLY_INT moves into two halves.
 772         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
 773         Split additions that need a temporary here if the destination
 774         is the stack pointer.
 775         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
 776         (*add<mode>3_poly_1): New instruction.
 777         (set_clobber_cc): New expander.
 778
 779 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 780
 781         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
 782         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
 783         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
 784         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
 785         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
 786         Change innermode from fixed_mode_size to machine_mode.
 787         (simplify_subreg): Update call accordingly.  Handle a constant-sized
 788         subreg of a variable-length CONST_VECTOR.
 789
 790 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 791             Alan Hayward  <alan.hayward@arm.com>
 792             David Sherwood  <david.sherwood@arm.com>
 793
 794         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
 795         (add_offset_to_base): New function, split out from...
 796         (create_mem_ref): ...here.  When handling a scale other than 1,
 797         check first whether the address is valid without the offset.
 798         Add it into the base if so, leaving the index and scale as-is.
 799
 800 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
 801
 802         PR c++/83778
 803         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
 804         fold_for_warn before checking if arg2 is INTEGER_CST.
 805
 806 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
 807
 808         * config/rs6000/predicates.md (load_multiple_operation): Delete.
 809         (store_multiple_operation): Delete.
 810         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
 811         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
 812         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
 813         guarded by TARGET_STRING.
 814         (rs6000_output_load_multiple): Delete.
 815         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
 816         OPTION_MASK_STRING / TARGET_STRING handling.
 817         (print_operand) <'N', 'O'>: Add comment that these are unused now.
 818         (const rs6000_opt_masks) <"string">: Change mask to 0.
 819         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
 820         (MASK_STRING): Delete.
 821         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
 822         parts.  Simplify.
 823         (load_multiple): Delete.
 824         (*ldmsi8): Delete.
 825         (*ldmsi7): Delete.
 826         (*ldmsi6): Delete.
 827         (*ldmsi5): Delete.
 828         (*ldmsi4): Delete.
 829         (*ldmsi3): Delete.
 830         (store_multiple): Delete.
 831         (*stmsi8): Delete.
 832         (*stmsi7): Delete.
 833         (*stmsi6): Delete.
 834         (*stmsi5): Delete.
 835         (*stmsi4): Delete.
 836         (*stmsi3): Delete.
 837         (movmemsi_8reg): Delete.
 838         (corresponding unnamed define_insn): Delete.
 839         (movmemsi_6reg): Delete.
 840         (corresponding unnamed define_insn): Delete.
 841         (movmemsi_4reg): Delete.
 842         (corresponding unnamed define_insn): Delete.
 843         (movmemsi_2reg): Delete.
 844         (corresponding unnamed define_insn): Delete.
 845         (movmemsi_1reg): Delete.
 846         (corresponding unnamed define_insn): Delete.
 847         * config/rs6000/rs6000.opt (mno-string): New.
 848         (mstring): Replace by deprecation warning stub.
 849         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
 850
 851 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
 852
 853         * regrename.c (regrename_do_replace): If replacing the same
 854         reg multiple times, try to reuse last created gen_raw_REG.
 855
 856         PR debug/81155
 857         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
 858         main to workaround a bug in GDB.
 859
 860 2018-01-12  Tom de Vries  <tom@codesourcery.com>
 861
 862         PR target/83737
 863         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
 864
 865 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
 866
 867         PR rtl-optimization/80481
 868         * ira-color.c (get_cap_member): New function.
 869         (allocnos_conflict_by_live_ranges_p): Use it.
 870         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
 871         (setup_slot_coalesced_allocno_live_ranges): Ditto.
 872
 873 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
 874
 875         PR target/83628
 876         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
 877         (*saddl_se_1): Ditto.
 878         (*ssubsi_1): Ditto.
 879         (*saddl_se_1): Ditto.
 880
 881 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
 882
 883         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
 884         rather than wi::to_widest for DR_INITs.
 885         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
 886         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
 887         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
 888         INTEGER_CSTs.
 889         (vect_analyze_group_access_1): Note that here.
 890
 891 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
 892
 893         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
 894         polynomial type sizes.
 895
 896 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
 897
 898         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
 899         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
 900         (gimple_add_tmp_var): Likewise.
 901
 902 2018-01-12  Martin Liska  <mliska@suse.cz>
 903
 904         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
 905         (gimple_alloc_sizes): Likewise.
 906         (dump_gimple_statistics): Use PRIu64 in printf format.
 907         * gimple.h: Change uint64_t to int.
 908
 909 2018-01-12  Martin Liska  <mliska@suse.cz>
 910
 911         * tree-core.h: Use uint64_t instead of int.
 912         * tree.c (tree_node_counts): Likewise.
 913         (tree_node_sizes): Likewise.
 914         (dump_tree_statistics): Use PRIu64 in printf format.
 915
 916 2018-01-12  Martin Liska  <mliska@suse.cz>
 917
 918         * Makefile.in: As qsort_chk is implemented in vec.c, add
 919         vec.o to linkage of gencfn-macros.
 920         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
 921         passing the info to record_node_allocation_statistics.
 922         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
 923         and pass the info.
 924         * ggc-common.c (struct ggc_usage): Add operator== and use
 925         it in operator< and compare function.
 926         * mem-stats.h (struct mem_usage): Likewise.
 927         * vec.c (struct vec_usage): Remove operator< and compare
 928         function. Can be simply inherited.
 929
 930 2018-01-12  Martin Jambor  <mjambor@suse.cz>
 931
 932         PR target/81616
 933         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
 934         * tree-ssa-math-opts.c: Include domwalk.h.
 935         (convert_mult_to_fma_1): New function.
 936         (fma_transformation_info): New type.
 937         (fma_deferring_state): Likewise.
 938         (cancel_fma_deferring): New function.
 939         (result_of_phi): Likewise.
 940         (last_fma_candidate_feeds_initial_phi): Likewise.
 941         (convert_mult_to_fma): Added deferring logic, split actual
 942         transformation to convert_mult_to_fma_1.
 943         (math_opts_dom_walker): New type.
 944         (math_opts_dom_walker::after_dom_children): New method, body moved
 945         here from pass_optimize_widening_mul::execute, added deferring logic
 946         bits.
 947         (pass_optimize_widening_mul::execute): Moved most of code to
 948         math_opts_dom_walker::after_dom_children.
 949         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
 950         * config/i386/i386.c (ix86_option_override_internal): Added
 951         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
 952
 953 2018-01-12  Richard Biener  <rguenther@suse.de>
 954
 955         PR debug/83157
 956         * dwarf2out.c (gen_variable_die): Do not reset old_die for
 957         inline instance vars.
 958
 959 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
 960
 961         PR target/81819
 962         * config/rx/rx.c (rx_is_restricted_memory_address):
 963         Handle SUBREG case.
 964
 965 2018-01-12  Richard Biener  <rguenther@suse.de>
 966
 967         PR tree-optimization/80846
 968         * target.def (split_reduction): New target hook.
 969         * targhooks.c (default_split_reduction): New function.
 970         * targhooks.h (default_split_reduction): Declare.
 971         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
 972         target requests first reduce vectors by combining low and high
 973         parts.
 974         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
 975         (get_vectype_for_scalar_type_and_size): Export.
 976         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
 977         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
 978         * doc/tm.texi: Regenerate.
 979         * config/i386/i386.c (ix86_split_reduction): Implement
 980         TARGET_VECTORIZE_SPLIT_REDUCTION.
 981
 982 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
 983
 984         PR target/83368
 985         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
 986         in PIC mode except for TARGET_VXWORKS_RTP.
 987         * config/sparc/sparc.c: Include cfgrtl.h.
 988         (TARGET_INIT_PIC_REG): Define.
 989         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
 990         (sparc_pic_register_p): New predicate.
 991         (sparc_legitimate_address_p): Use it.
 992         (sparc_legitimize_pic_address): Likewise.
 993         (sparc_delegitimize_address): Likewise.
 994         (sparc_mode_dependent_address_p): Likewise.
 995         (gen_load_pcrel_sym): Remove 4th parameter.
 996         (load_got_register): Adjust call to above.  Remove obsolete stuff.
 997         (sparc_expand_prologue): Do not call load_got_register here.
 998         (sparc_flat_expand_prologue): Likewise.
 999         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1000         (sparc_use_pseudo_pic_reg): New function.
1001         (sparc_init_pic_reg): Likewise.
1002         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1003         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1004
1005 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
1006
1007         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1008         Add item for branch_cost.
1009
1010 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
1011
1012         PR rtl-optimization/83565
1013         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1014         not extend the result to a larger mode for rotate operations.
1015         (num_sign_bit_copies1): Likewise.
1016
1017 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
1018
1019         PR target/40411
1020         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1021         -symbolic.
1022         Use values-Xc.o for -pedantic.
1023         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1024
1025 2018-01-12  Martin Liska  <mliska@suse.cz>
1026
1027         PR ipa/83054
1028         * ipa-devirt.c (final_warning_record::grow_type_warnings):
1029         New function.
1030         (possible_polymorphic_call_targets): Use it.
1031         (ipa_devirt): Likewise.
1032
1033 2018-01-12  Martin Liska  <mliska@suse.cz>
1034
1035         * profile-count.h (enum profile_quality): Use 0 as invalid
1036         enum value of profile_quality.
1037
1038 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
1039
1040         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1041         -mext-string options.
1042
1043 2018-01-12  Richard Biener  <rguenther@suse.de>
1044
1045         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1046         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1047         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1048         Likewise.
1049         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1050
1051 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
1052
1053         * configure.ac (--with-long-double-format): Add support for the
1054         configuration option to change the default long double format on
1055         PowerPC systems.
1056         * config.gcc (powerpc*-linux*-*): Likewise.
1057         * configure: Regenerate.
1058         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1059         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1060         used without modification.
1061
1062 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1063
1064         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1065         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1066         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1067         MISC_BUILTIN_SPEC_BARRIER.
1068         (rs6000_init_builtins): Likewise.
1069         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1070         enum value.
1071         (speculation_barrier): New define_insn.
1072         * doc/extend.texi: Document __builtin_speculation_barrier.
1073
1074 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
1075
1076         PR target/83203
1077         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1078         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1079         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1080         iterators.
1081         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
1082         integral modes instead of "ss" and "sd".
1083         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1084         vectors with 32-bit and 64-bit elements.
1085         (vecdupssescalarmodesuffix): New mode attribute.
1086         (vec_dup<mode>): Use it.
1087
1088 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
1089
1090         PR target/83330
1091         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1092         frame if argument is passed on stack.
1093
1094 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
1095
1096         PR target/82682
1097         * ree.c (combine_reaching_defs): Optimize also
1098         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1099         reg2=any_extend(exp); reg1=reg2;, formatting fix.
1100
1101 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
1102
1103         PR middle-end/83189
1104         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1105
1106 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
1107
1108         PR middle-end/83718
1109         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1110         after they are computed.
1111
1112 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
1113
1114         PR tree-optimization/83695
1115         * gimple-loop-linterchange.cc
1116         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1117         reset cached scev information after interchange.
1118         (pass_linterchange::execute): Remove call to scev_reset_htab.
1119
1120 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1121
1122         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1123         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1124         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1125         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1126         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1127         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1128         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1129         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1130         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1131         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1132         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1133         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1134         (V_lane_reg): Likewise.
1135         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1136         New define_expand.
1137         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1138         (vfmal_lane_low<mode>_intrinsic,
1139         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1140         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1141         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1142         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1143         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1144         vfmsl_lane_high<mode>_intrinsic): New define_insns.
1145
1146 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1147
1148         * config/arm/arm-cpus.in (fp16fml): New feature.
1149         (ALL_SIMD): Add fp16fml.
1150         (armv8.2-a): Add fp16fml as an option.
1151         (armv8.3-a): Likewise.
1152         (armv8.4-a): Add fp16fml as part of fp16.
1153         * config/arm/arm.h (TARGET_FP16FML): Define.
1154         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1155         when appropriate.
1156         * config/arm/arm-modes.def (V2HF): Define.
1157         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1158         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1159         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1160         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1161         vfmsl_low, vfmsl_high): New set of builtins.
1162         * config/arm/iterators.md (PLUSMINUS): New code iterator.
1163         (vfml_op): New code attribute.
1164         (VFMLHALVES): New int iterator.
1165         (VFML, VFMLSEL): New mode attributes.
1166         (V_reg): Define mapping for V2HF.
1167         (V_hi, V_lo): New mode attributes.
1168         (VF_constraint): Likewise.
1169         (vfml_half, vfml_half_selector): New int attributes.
1170         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1171         define_expand.
1172         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1173         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1174         New define_insn.
1175         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1176         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1177         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1178         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
1179         documentation.
1180         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1181         Document new effective target and option set.
1182
1183 2017-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1184
1185         * config/arm/arm-cpus.in (armv8_4): New feature.
1186         (ARMv8_4a): New fgroup.
1187         (armv8.4-a): New arch.
1188         * config/arm/arm-tables.opt: Regenerate.
1189         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1190         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1191         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1192         Add matching rules for -march=armv8.4-a and extensions.
1193         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1194
1195 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
1196
1197         PR target/81821
1198         * config/rx/rx.md (BW): New mode attribute.
1199         (sync_lock_test_and_setsi): Add mode suffix to insn output.
1200
1201 2018-01-11  Richard Biener  <rguenther@suse.de>
1202
1203         PR tree-optimization/83435
1204         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1205         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1206         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1207
1208 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1209             Alan Hayward  <alan.hayward@arm.com>
1210             David Sherwood  <david.sherwood@arm.com>
1211
1212         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1213         field.
1214         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
1215         (aarch64_print_address_internal): Use it to check for a zero offset.
1216
1217 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1218             Alan Hayward  <alan.hayward@arm.com>
1219             David Sherwood  <david.sherwood@arm.com>
1220
1221         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1222         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1223         Return a poly_int64 rather than a HOST_WIDE_INT.
1224         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1225         rather than a HOST_WIDE_INT.
1226         * config/aarch64/aarch64.h (aarch64_frame): Protect with
1227         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
1228         hard_fp_offset, frame_size, initial_adjust, callee_offset and
1229         final_offset from HOST_WIDE_INT to poly_int64.
1230         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1231         to_constant when getting the number of units in an Advanced SIMD
1232         mode.
1233         (aarch64_builtin_vectorized_function): Check for a constant number
1234         of units.
1235         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1236         GET_MODE_SIZE.
1237         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1238         attribute instead of GET_MODE_NUNITS.
1239         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1240         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1241         GET_MODE_SIZE for fixed-size registers.
1242         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1243         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1244         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1245         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1246         (aarch64_print_operand, aarch64_print_address_internal)
1247         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1248         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1249         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1250         Handle polynomial GET_MODE_SIZE.
1251         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
1252         wider than SImode without modification.
1253         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1254         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1255         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1256         passing and returning SVE modes.
1257         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1258         rather than GEN_INT.
1259         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1260         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1261         (aarch64_allocate_and_probe_stack_space): Likewise.
1262         (aarch64_layout_frame): Cope with polynomial offsets.
1263         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1264         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
1265         polynomial offsets.
1266         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1267         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1268         poly_int64 rather than a HOST_WIDE_INT.
1269         (aarch64_get_separate_components, aarch64_process_components)
1270         (aarch64_expand_prologue, aarch64_expand_epilogue)
1271         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1272         (aarch64_anchor_offset): New function, split out from...
1273         (aarch64_legitimize_address): ...here.
1274         (aarch64_builtin_vectorization_cost): Handle polynomial
1275         TYPE_VECTOR_SUBPARTS.
1276         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1277         GET_MODE_NUNITS.
1278         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1279         number of elements from the PARALLEL rather than the mode.
1280         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1281         rather than GET_MODE_BITSIZE.
1282         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1283         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1284         (aarch64_expand_vec_perm_const_1): Handle polynomial
1285         d->perm.length () and d->perm elements.
1286         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
1287         Apply to_constant to d->perm elements.
1288         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1289         polynomial CONST_VECTOR_NUNITS.
1290         (aarch64_move_pointer): Take amount as a poly_int64 rather
1291         than an int.
1292         (aarch64_progress_pointer): Avoid temporary variable.
1293         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1294         the mode attribute instead of GET_MODE.
1295
1296 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1297             Alan Hayward  <alan.hayward@arm.com>
1298             David Sherwood  <david.sherwood@arm.com>
1299
1300         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1301         x exists before using it.
1302         (aarch64_add_constant_internal): Rename to...
1303         (aarch64_add_offset_1): ...this.  Replace regnum with separate
1304         src and dest rtxes.  Handle the case in which they're different,
1305         including when the offset is zero.  Replace scratchreg with an rtx.
1306         Use 2 additions if there is no spare register into which we can
1307         move a 16-bit constant.
1308         (aarch64_add_constant): Delete.
1309         (aarch64_add_offset): Replace reg with separate src and dest
1310         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
1311         Use aarch64_add_offset_1.
1312         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1313         an rtx rather than an int.  Take the delta as a poly_int64
1314         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
1315         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1316         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1317         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1318         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1319         and aarch64_add_sp.
1320         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1321         aarch64_add_constant.
1322
1323 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1324
1325         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1326         Use scalar_float_mode.
1327
1328 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1329
1330         * config/aarch64/aarch64-simd.md
1331         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1332         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1333         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1334         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1335         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1336         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1337         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1338         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1339         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1340         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1341
1342 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
1343
1344         PR target/83514
1345         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1346         targ_options->x_arm_arch_string is non NULL.
1347
1348 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
1349
1350         * config/aarch64/aarch64.h
1351         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
1352
1353 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
1354
1355         PR target/82096
1356         * expmed.c (emit_store_flag_force): Swap if const op0
1357         and change VOIDmode to mode of op0.
1358
1359 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1360
1361         PR rtl-optimization/83761
1362         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1363         than bytes to mode_for_size.
1364
1365 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1366
1367         PR middle-end/83189
1368         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1369         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1370         profile.
1371
1372 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1373
1374         PR middle-end/83575
1375         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1376         when in layout mode.
1377         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1378         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1379         partition fixup.
1380
1381 2018-01-10  Michael Collison  <michael.collison@arm.com>
1382
1383         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1384         * config/aarch64/aarch64-option-extension.def: Add
1385         AARCH64_OPT_EXTENSION of 'fp16fml'.
1386         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1387         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1388         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1389         * config/aarch64/constraints.md (Ui7): New constraint.
1390         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1391         (VFMLA_SEL_W): Ditto.
1392         (f16quad): Ditto.
1393         (f16mac1): Ditto.
1394         (VFMLA16_LOW): New int iterator.
1395         (VFMLA16_HIGH): Ditto.
1396         (UNSPEC_FMLAL): New unspec.
1397         (UNSPEC_FMLSL): Ditto.
1398         (UNSPEC_FMLAL2): Ditto.
1399         (UNSPEC_FMLSL2): Ditto.
1400         (f16mac): New code attribute.
1401         * config/aarch64/aarch64-simd-builtins.def
1402         (aarch64_fmlal_lowv2sf): Ditto.
1403         (aarch64_fmlsl_lowv2sf): Ditto.
1404         (aarch64_fmlalq_lowv4sf): Ditto.
1405         (aarch64_fmlslq_lowv4sf): Ditto.
1406         (aarch64_fmlal_highv2sf): Ditto.
1407         (aarch64_fmlsl_highv2sf): Ditto.
1408         (aarch64_fmlalq_highv4sf): Ditto.
1409         (aarch64_fmlslq_highv4sf): Ditto.
1410         (aarch64_fmlal_lane_lowv2sf): Ditto.
1411         (aarch64_fmlsl_lane_lowv2sf): Ditto.
1412         (aarch64_fmlal_laneq_lowv2sf): Ditto.
1413         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1414         (aarch64_fmlalq_lane_lowv4sf): Ditto.
1415         (aarch64_fmlsl_lane_lowv4sf): Ditto.
1416         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1417         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1418         (aarch64_fmlal_lane_highv2sf): Ditto.
1419         (aarch64_fmlsl_lane_highv2sf): Ditto.
1420         (aarch64_fmlal_laneq_highv2sf): Ditto.
1421         (aarch64_fmlsl_laneq_highv2sf): Ditto.
1422         (aarch64_fmlalq_lane_highv4sf): Ditto.
1423         (aarch64_fmlsl_lane_highv4sf): Ditto.
1424         (aarch64_fmlalq_laneq_highv4sf): Ditto.
1425         (aarch64_fmlsl_laneq_highv4sf): Ditto.
1426         * config/aarch64/aarch64-simd.md:
1427         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1428         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1429         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1430         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1431         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1432         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1433         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1434         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1435         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1436         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1437         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1438         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1439         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1440         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1441         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1442         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1443         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1444         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1445         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1446         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1447         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1448         (vfmlsl_low_u32): Ditto.
1449         (vfmlalq_low_u32): Ditto.
1450         (vfmlslq_low_u32): Ditto.
1451         (vfmlal_high_u32): Ditto.
1452         (vfmlsl_high_u32): Ditto.
1453         (vfmlalq_high_u32): Ditto.
1454         (vfmlslq_high_u32): Ditto.
1455         (vfmlal_lane_low_u32): Ditto.
1456         (vfmlsl_lane_low_u32): Ditto.
1457         (vfmlal_laneq_low_u32): Ditto.
1458         (vfmlsl_laneq_low_u32): Ditto.
1459         (vfmlalq_lane_low_u32): Ditto.
1460         (vfmlslq_lane_low_u32): Ditto.
1461         (vfmlalq_laneq_low_u32): Ditto.
1462         (vfmlslq_laneq_low_u32): Ditto.
1463         (vfmlal_lane_high_u32): Ditto.
1464         (vfmlsl_lane_high_u32): Ditto.
1465         (vfmlal_laneq_high_u32): Ditto.
1466         (vfmlsl_laneq_high_u32): Ditto.
1467         (vfmlalq_lane_high_u32): Ditto.
1468         (vfmlslq_lane_high_u32): Ditto.
1469         (vfmlalq_laneq_high_u32): Ditto.
1470         (vfmlslq_laneq_high_u32): Ditto.
1471         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1472         (AARCH64_FL_FOR_ARCH8_4): New.
1473         (AARCH64_ISA_F16FML): New ISA flag.
1474         (TARGET_F16FML): New feature flag for fp16fml.
1475         (doc/invoke.texi): Document new fp16fml option.
1476
1477 2018-01-10  Michael Collison  <michael.collison@arm.com>
1478
1479         * config/aarch64/aarch64-builtins.c:
1480         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1481         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1482         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1483         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1484         (AARCH64_ISA_SHA3): New ISA flag.
1485         (TARGET_SHA3): New feature flag for sha3.
1486         * config/aarch64/iterators.md (sha512_op): New int attribute.
1487         (CRYPTO_SHA512): New int iterator.
1488         (UNSPEC_SHA512H): New unspec.
1489         (UNSPEC_SHA512H2): Ditto.
1490         (UNSPEC_SHA512SU0): Ditto.
1491         (UNSPEC_SHA512SU1): Ditto.
1492         * config/aarch64/aarch64-simd-builtins.def
1493         (aarch64_crypto_sha512hqv2di): New builtin.
1494         (aarch64_crypto_sha512h2qv2di): Ditto.
1495         (aarch64_crypto_sha512su0qv2di): Ditto.
1496         (aarch64_crypto_sha512su1qv2di): Ditto.
1497         (aarch64_eor3qv8hi): Ditto.
1498         (aarch64_rax1qv2di): Ditto.
1499         (aarch64_xarqv2di): Ditto.
1500         (aarch64_bcaxqv8hi): Ditto.
1501         * config/aarch64/aarch64-simd.md:
1502         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1503         (aarch64_crypto_sha512su0qv2di): Ditto.
1504         (aarch64_crypto_sha512su1qv2di): Ditto.
1505         (aarch64_eor3qv8hi): Ditto.
1506         (aarch64_rax1qv2di): Ditto.
1507         (aarch64_xarqv2di): Ditto.
1508         (aarch64_bcaxqv8hi): Ditto.
1509         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1510         (vsha512h2q_u64): Ditto.
1511         (vsha512su0q_u64): Ditto.
1512         (vsha512su1q_u64): Ditto.
1513         (veor3q_u16): Ditto.
1514         (vrax1q_u64): Ditto.
1515         (vxarq_u64): Ditto.
1516         (vbcaxq_u16): Ditto.
1517         * config/arm/types.md (crypto_sha512): New type attribute.
1518         (crypto_sha3): Ditto.
1519         (doc/invoke.texi): Document new sha3 option.
1520
1521 2018-01-10  Michael Collison  <michael.collison@arm.com>
1522
1523         * config/aarch64/aarch64-builtins.c:
1524         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1525         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1526         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1527         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1528         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1529         (AARCH64_ISA_SM4): New ISA flag.
1530         (TARGET_SM4): New feature flag for sm4.
1531         * config/aarch64/aarch64-simd-builtins.def
1532         (aarch64_sm3ss1qv4si): Ditto.
1533         (aarch64_sm3tt1aq4si): Ditto.
1534         (aarch64_sm3tt1bq4si): Ditto.
1535         (aarch64_sm3tt2aq4si): Ditto.
1536         (aarch64_sm3tt2bq4si): Ditto.
1537         (aarch64_sm3partw1qv4si): Ditto.
1538         (aarch64_sm3partw2qv4si): Ditto.
1539         (aarch64_sm4eqv4si): Ditto.
1540         (aarch64_sm4ekeyqv4si): Ditto.
1541         * config/aarch64/aarch64-simd.md:
1542         (aarch64_sm3ss1qv4si): Ditto.
1543         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1544         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1545         (aarch64_sm4eqv4si): Ditto.
1546         (aarch64_sm4ekeyqv4si): Ditto.
1547         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1548         (sm3part_op): Ditto.
1549         (CRYPTO_SM3TT): Ditto.
1550         (CRYPTO_SM3PART): Ditto.
1551         (UNSPEC_SM3SS1): New unspec.
1552         (UNSPEC_SM3TT1A): Ditto.
1553         (UNSPEC_SM3TT1B): Ditto.
1554         (UNSPEC_SM3TT2A): Ditto.
1555         (UNSPEC_SM3TT2B): Ditto.
1556         (UNSPEC_SM3PARTW1): Ditto.
1557         (UNSPEC_SM3PARTW2): Ditto.
1558         (UNSPEC_SM4E): Ditto.
1559         (UNSPEC_SM4EKEY): Ditto.
1560         * config/aarch64/constraints.md (Ui2): New constraint.
1561         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1562         * config/arm/types.md (crypto_sm3): New type attribute.
1563         (crypto_sm4): Ditto.
1564         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1565         (vsm3tt1aq_u32): Ditto.
1566         (vsm3tt1bq_u32): Ditto.
1567         (vsm3tt2aq_u32): Ditto.
1568         (vsm3tt2bq_u32): Ditto.
1569         (vsm3partw1q_u32): Ditto.
1570         (vsm3partw2q_u32): Ditto.
1571         (vsm4eq_u32): Ditto.
1572         (vsm4ekeyq_u32): Ditto.
1573         (doc/invoke.texi): Document new sm4 option.
1574
1575 2018-01-10  Michael Collison  <michael.collison@arm.com>
1576
1577         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1578         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1579         (AARCH64_FL_FOR_ARCH8_4): New.
1580         (AARCH64_FL_V8_4): New flag.
1581         (doc/invoke.texi): Document new armv8.4-a option.
1582
1583 2018-01-10  Michael Collison  <michael.collison@arm.com>
1584
1585         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1586         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1587         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1588         * config/aarch64/aarch64-option-extension.def: Add
1589         AARCH64_OPT_EXTENSION of 'sha2'.
1590         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1591         (crypto): Disable sha2 and aes if crypto disabled.
1592         (crypto): Enable aes and sha2 if enabled.
1593         (simd): Disable sha2 and aes if simd disabled.
1594         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1595         New flags.
1596         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1597         (TARGET_SHA2): New feature flag for sha2.
1598         (TARGET_AES): New feature flag for aes.
1599         * config/aarch64/aarch64-simd.md:
1600         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1601         conditional on TARGET_AES.
1602         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1603         (aarch64_crypto_sha1hsi): Make pattern conditional
1604         on TARGET_SHA2.
1605         (aarch64_crypto_sha1hv4si): Ditto.
1606         (aarch64_be_crypto_sha1hv4si): Ditto.
1607         (aarch64_crypto_sha1su1v4si): Ditto.
1608         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1609         (aarch64_crypto_sha1su0v4si): Ditto.
1610         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1611         (aarch64_crypto_sha256su0v4si): Ditto.
1612         (aarch64_crypto_sha256su1v4si): Ditto.
1613         (doc/invoke.texi): Document new aes and sha2 options.
1614
1615 2018-01-10  Martin Sebor  <msebor@redhat.com>
1616
1617         PR tree-optimization/83781
1618         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1619         as string arrays.
1620
1621 2018-01-11  Martin Sebor  <msebor@gmail.com>
1622             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
1623
1624         PR tree-optimization/83501
1625         PR tree-optimization/81703
1626
1627         * tree-ssa-strlen.c (get_string_cst): Rename...
1628         (get_string_len): ...to this.  Handle global constants.
1629         (handle_char_store): Adjust.
1630
1631 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
1632             Jim Wilson  <jimw@sifive.com>
1633
1634         * config/riscv/riscv-protos.h (riscv_output_return): New.
1635         * config/riscv/riscv.c (struct machine_function): New naked_p field.
1636         (riscv_attribute_table, riscv_output_return),
1637         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1638         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1639         (riscv_compute_frame_info): Only compute frame->mask if not a naked
1640         function.
1641         (riscv_expand_prologue): Add early return for naked function.
1642         (riscv_expand_epilogue): Likewise.
1643         (riscv_function_ok_for_sibcall): Return false for naked function.
1644         (riscv_set_current_function): New.
1645         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
1646         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
1647         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
1648         * doc/extend.texi (RISC-V Function Attributes): New.
1649
1650 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
1651
1652         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
1653         check for 128-bit long double before checking TCmode.
1654         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
1655         128-bit long doubles before checking TFmode or TCmode.
1656         (FLOAT128_IBM_P): Likewise.
1657
1658 2018-01-10  Martin Sebor  <msebor@redhat.com>
1659
1660         PR tree-optimization/83671
1661         * builtins.c (c_strlen): Unconditionally return zero for the empty
1662         string.
1663         Use -Warray-bounds for warnings.
1664         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
1665         for non-constant array indices with COMPONENT_REF, arrays of
1666         arrays, and pointers to arrays.
1667         (gimple_fold_builtin_strlen): Determine and set length range for
1668         non-constant character arrays.
1669
1670 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
1671
1672         PR middle-end/81897
1673         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
1674         empty blocks.
1675
1676 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
1677
1678         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
1679
1680 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
1681
1682         PR target/83399
1683         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
1684         VECTOR_MEM_ALTIVEC_OR_VSX_P.
1685         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
1686         indexed_or_indirect_operand predicate.
1687         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
1688         (*vsx_le_perm_load_v8hi): Likewise.
1689         (*vsx_le_perm_load_v16qi): Likewise.
1690         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
1691         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
1692         (*vsx_le_perm_store_v8hi): Likewise.
1693         (*vsx_le_perm_store_v16qi): Likewise.
1694         (eight unnamed splitters): Likewise.
1695
1696 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
1697
1698         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
1699         * config/rs6000/emmintrin.h: Likewise.
1700         * config/rs6000/mmintrin.h: Likewise.
1701         * config/rs6000/xmmintrin.h: Likewise.
1702
1703 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
1704
1705         PR c++/43486
1706         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
1707         "public_flag".
1708         * tree.c (tree_nop_conversion): Return true for location wrapper
1709         nodes.
1710         (maybe_wrap_with_location): New function.
1711         (selftest::check_strip_nops): New function.
1712         (selftest::test_location_wrappers): New function.
1713         (selftest::tree_c_tests): Call it.
1714         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
1715         (maybe_wrap_with_location): New decl.
1716         (EXPR_LOCATION_WRAPPER_P): New macro.
1717         (location_wrapper_p): New inline function.
1718         (tree_strip_any_location_wrapper): New inline function.
1719
1720 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
1721
1722         PR target/83735
1723         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
1724         stack_realign_offset for the largest alignment of stack slot
1725         actually used.
1726         (ix86_find_max_used_stack_alignment): New function.
1727         (ix86_finalize_stack_frame_flags): Use it.  Set
1728         max_used_stack_alignment if we don't realign stack.
1729         * config/i386/i386.h (machine_function): Add
1730         max_used_stack_alignment.
1731
1732 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
1733
1734         * config/arm/arm.opt (-mbranch-cost): New option.
1735         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
1736         account.
1737
1738 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
1739
1740         PR target/83629
1741         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
1742         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
1743
1744 2018-01-10  Richard Biener  <rguenther@suse.de>
1745
1746         PR debug/83765
1747         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
1748         early out so it also covers the case where we have a non-NULL
1749         origin.
1750
1751 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
1752
1753         PR tree-optimization/83753
1754         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
1755         for non-strided grouped accesses if the number of elements is 1.
1756
1757 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1758
1759         PR target/81616
1760         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
1761         * i386.h (TARGET_USE_GATHER): Define.
1762         * x86-tune.def (X86_TUNE_USE_GATHER): New.
1763
1764 2018-01-10  Martin Liska  <mliska@suse.cz>
1765
1766         PR bootstrap/82831
1767         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
1768         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
1769         partitioning.
1770         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
1771         CLEANUP_NO_PARTITIONING is not set.
1772
1773 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
1774
1775         * doc/rtl.texi: Remove documentation of (const ...) wrappers
1776         for vectors, as a partial revert of r254296.
1777         * rtl.h (const_vec_p): Delete.
1778         (const_vec_duplicate_p): Don't test for vector CONSTs.
1779         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
1780         * expmed.c (make_tree): Likewise.
1781
1782         Revert:
1783         * common.md (E, F): Use CONSTANT_P instead of checking for
1784         CONST_VECTOR.
1785         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
1786         checking for CONST_VECTOR.
1787
1788 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
1789
1790         PR middle-end/83575
1791         * predict.c (force_edge_cold): Handle in more sane way edges
1792         with no prediction.
1793
1794 2018-01-09  Carl Love  <cel@us.ibm.com>
1795
1796         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
1797         V4SI, V4SF types.
1798         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
1799         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
1800         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
1801         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
1802         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
1803         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
1804         * config/rs6000/rs6000-protos.h: Add extern defition for
1805         rs6000_generate_float2_double_code.
1806         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
1807         function.
1808         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
1809         (float2_v2df): Add define_expand.
1810
1811 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
1812
1813         PR target/83628
1814         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
1815         op_mode in the force_to_mode call.
1816
1817 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1818
1819         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
1820         instead of checking each element individually.
1821         (aarch64_evpc_uzp): Likewise.
1822         (aarch64_evpc_zip): Likewise.
1823         (aarch64_evpc_ext): Likewise.
1824         (aarch64_evpc_rev): Likewise.
1825         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
1826         instead of checking each element individually.  Return true without
1827         generating rtl if
1828         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
1829         whether all selected elements come from the same input, instead of
1830         checking each element individually.  Remove calls to gen_rtx_REG,
1831         start_sequence and end_sequence and instead assert that no rtl is
1832         generated.
1833
1834 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1835
1836         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
1837         order of HIGH and CONST checks.
1838
1839 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1840
1841         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
1842         if the destination isn't an SSA_NAME.
1843
1844 2018-01-09  Richard Biener  <rguenther@suse.de>
1845
1846         PR tree-optimization/83668
1847         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
1848         move prologue...
1849         (canonicalize_loop_form): ... here, renamed from ...
1850         (canonicalize_loop_closed_ssa_form): ... this and amended to
1851         swap successor edges for loop exit blocks to make us use
1852         the RPO order we need for initial schedule generation.
1853
1854 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
1855
1856         PR tree-optimization/64811
1857         * match.pd: When optimizing comparisons with Inf, avoid
1858         introducing or losing exceptions from comparisons with NaN.
1859
1860 2018-01-09  Martin Liska  <mliska@suse.cz>
1861
1862         PR sanitizer/82517
1863         * asan.c (shadow_mem_size): Add gcc_assert.
1864
1865 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
1866
1867         Don't save registers in main().
1868
1869         PR target/83738
1870         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
1871         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
1872         * config/avr/avr.c (avr_set_current_function): Don't error if
1873         naked, OS_task or OS_main are specified at the same time.
1874         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
1875         OS_main.
1876         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
1877         attribute.
1878         * common/config/avr/avr-common.c (avr_option_optimization_table):
1879         Switch on -mmain-is-OS_task for optimizing compilations.
1880
1881 2018-01-09  Richard Biener  <rguenther@suse.de>
1882
1883         PR tree-optimization/83572
1884         * graphite.c: Include cfganal.h.
1885         (graphite_transform_loops): Connect infinite loops to exit
1886         and remove fake edges at the end.
1887
1888 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
1889
1890         * ipa-inline.c (edge_badness): Revert accidental checkin.
1891
1892 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
1893
1894         PR ipa/80763
1895         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
1896         symbols; not inline clones.
1897
1898 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
1899
1900         PR target/83507
1901         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
1902         hard registers.  Formatting fixes.
1903
1904         PR preprocessor/83722
1905         * gcc.c (try_generate_repro): Pass
1906         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
1907         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
1908         do_report_bug.
1909
1910 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
1911             Kito Cheng  <kito.cheng@gmail.com>
1912
1913         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
1914         (riscv_leaf_function_p): Delete.
1915         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
1916
1917 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
1918
1919         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
1920         function.
1921         (do_ifelse): New function.
1922         (do_isel): New function.
1923         (do_sub3): New function.
1924         (do_add3): New function.
1925         (do_load_mask_compare): New function.
1926         (do_overlap_load_compare): New function.
1927         (expand_compare_loop): New function.
1928         (expand_block_compare): Call expand_compare_loop() when appropriate.
1929         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
1930         option description.
1931         (-mblock-compare-inline-loop-limit): New option.
1932
1933 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1934
1935         PR target/83677
1936         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
1937         Reverse order of second and third operands in first alternative.
1938         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
1939         of first and second elements in UNSPEC_VPERMR vector.
1940         (altivec_expand_vec_perm_le): Likewise.
1941
1942 2017-01-08  Jeff Law  <law@redhat.com>
1943
1944         PR rtl-optimizatin/81308
1945         * tree-switch-conversion.c (cfg_altered): New file scoped static.
1946         (process_switch): If group_case_labels makes a change, then set
1947         cfg_altered.
1948         (pass_convert_switch::execute): If a switch is converted, then
1949         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
1950
1951         PR rtl-optimization/81308
1952         * recog.c (split_all_insns): Conditionally cleanup the CFG after
1953         splitting insns.
1954
1955 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
1956
1957         PR target/83663 - Revert r255946
1958         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
1959         generation for cases where splatting a value is not useful.
1960         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
1961         across a vec_duplicate and a paradoxical subreg forming a vector
1962         mode to a vec_concat.
1963
1964 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1965
1966         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
1967         -march=armv8.3-a variants.
1968         * config/arm/t-multilib: Likewise.
1969         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
1970
1971 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
1972
1973         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
1974         to generate rtl.
1975         (cceq_ior_compare_complement): Give it a name so I can use it, and
1976         change boolean_or_operator predicate to boolean_operator so it can
1977         be used to generate a crand.
1978         (eqne): New code iterator.
1979         (bd/bd_neg): New code_attrs.
1980         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
1981         a single define_insn.
1982         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
1983         decrement (bdnzt/bdnzf/bdzt/bdzf).
1984         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
1985         with the new names of the branch decrement patterns, and added the
1986         names of the branch decrement conditional patterns.
1987
1988 2018-01-08  Richard Biener  <rguenther@suse.de>
1989
1990         PR tree-optimization/83563
1991         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
1992         cache.
1993
1994 2018-01-08  Richard Biener  <rguenther@suse.de>
1995
1996         PR middle-end/83713
1997         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
1998
1999 2018-01-08  Richard Biener  <rguenther@suse.de>
2000
2001         PR tree-optimization/83685
2002         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2003         references to abnormals.
2004
2005 2018-01-08  Richard Biener  <rguenther@suse.de>
2006
2007         PR lto/83719
2008         * dwarf2out.c (output_indirect_strings): Handle empty
2009         skeleton_debug_str_hash.
2010         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2011
2012 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
2013
2014         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2015         (emit_store_direct): Likewise.
2016         (arc_trampoline_adjust_address): Likewise.
2017         (arc_asm_trampoline_template): New function.
2018         (arc_initialize_trampoline): Use asm_trampoline_template.
2019         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2020         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2021         * config/arc/arc.md (flush_icache): Delete pattern.
2022
2023 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
2024
2025         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2026         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2027         munaligned-access.
2028
2029 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2030
2031         PR target/83681
2032         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2033         by not USED_FOR_TARGET.
2034         (make_pass_resolve_sw_modes): Likewise.
2035
2036 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2037
2038         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2039         USED_FOR_TARGET.
2040
2041 2018-01-08  Richard Biener  <rguenther@suse.de>
2042
2043         PR middle-end/83580
2044         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2045
2046 2018-01-08  Richard Biener  <rguenther@suse.de>
2047
2048         PR middle-end/83517
2049         * match.pd ((t * 2) / 2) -> t): Add missing :c.
2050
2051 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
2052
2053         PR middle-end/81897
2054         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2055         basic blocks with a small number of successors.
2056         (convert_control_dep_chain_into_preds): Improve handling of
2057         forwarder blocks.
2058         (dump_predicates): Split apart into...
2059         (dump_pred_chain): ...here...
2060         (dump_pred_info): ...and here.
2061         (can_one_predicate_be_invalidated_p): Add debugging printfs.
2062         (can_chain_union_be_invalidated_p): Improve check for invalidation
2063         of paths.
2064         (uninit_uses_cannot_happen): Avoid unnecessary if
2065         convert_control_dep_chain_into_preds yielded nothing.
2066
2067 2018-01-06  Martin Sebor  <msebor@redhat.com>
2068
2069         PR tree-optimization/83640
2070         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2071         subtracting negative offset from size.
2072         (builtin_access::overlap): Adjust offset bounds of the access to fall
2073         within the size of the object if possible.
2074
2075 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
2076
2077         PR rtl-optimization/83699
2078         * expmed.c (extract_bit_field_1): Restrict the vector usage of
2079         extract_bit_field_as_subreg to cases in which the extracted
2080         value is also a vector.
2081
2082         * lra-constraints.c (process_alt_operands): Test for the equivalence
2083         substitutions when detecting a possible reload cycle.
2084
2085 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
2086
2087         PR debug/83480
2088         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2089         by default if flag_selective_schedling{,2}.  Formatting fixes.
2090
2091         PR rtl-optimization/83682
2092         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2093         if it has non-VECTOR_MODE element mode.
2094         (vec_duplicate_p): Likewise.
2095
2096         PR middle-end/83694
2097         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2098         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2099
2100 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
2101
2102         PR target/83604
2103         * config/i386/i386-builtin.def
2104         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2105         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2106         Require also OPTION_MASK_ISA_AVX512F in addition to
2107         OPTION_MASK_ISA_GFNI.
2108         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2109         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2110         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2111         to OPTION_MASK_ISA_GFNI.
2112         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2113         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2114         OPTION_MASK_ISA_AVX512BW.
2115         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2116         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2117         addition to OPTION_MASK_ISA_GFNI.
2118         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2119         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2120         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2121         to OPTION_MASK_ISA_GFNI.
2122         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2123         a requirement for all ISAs rather than any of them with a few
2124         exceptions.
2125         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2126         processing.
2127         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2128         bitmasks to be enabled with 3 exceptions, instead of requiring any
2129         enabled ISA with lots of exceptions.
2130         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2131         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2132         Change avx512bw in isa attribute to avx512f.
2133         * config/i386/sgxintrin.h: Add license boilerplate.
2134         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
2135         to __AVX512F__ and __AVX512VL to __AVX512VL__.
2136         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2137         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2138         defined.
2139         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2140         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2141         temporarily sse2 rather than sse if not enabled already.
2142
2143         PR target/83604
2144         * config/i386/sse.md (VI248_VLBW): Rename to ...
2145         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
2146         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2147         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2148         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2149         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2150         mode iterator instead of VI248_VLBW.
2151
2152 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
2153
2154         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2155         (record_modified): Skip clobbers; add debug output.
2156         (param_change_prob): Use sreal frequencies.
2157
2158 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
2159
2160         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2161         punt for user-aligned variables.
2162
2163 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
2164
2165         * tree-chrec.c (chrec_contains_symbols): Return true for
2166         POLY_INT_CST.
2167
2168 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
2169
2170         PR target/82439
2171         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2172         of (x|y) == x for BICS pattern.
2173
2174 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
2175
2176         PR tree-optimization/83605
2177         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2178         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2179         can throw.
2180
2181 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2182
2183         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2184         * config/epiphany/rtems.h: New file.
2185
2186 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2187             Uros Bizjak  <ubizjak@gmail.com>
2188
2189         PR target/83554
2190         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2191         QIreg_operand instead of register_operand predicate.
2192         * config/i386/i386.c (ix86_rop_should_change_byte_p,
2193         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2194         comments instead of -fmitigate[-_]rop.
2195
2196 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
2197
2198         PR bootstrap/81926
2199         * cgraphunit.c (symbol_table::compile): Switch to text_section
2200         before calling assembly_start debug hook.
2201         * run-rtl-passes.c (run_rtl_passes): Likewise.
2202         Include output.h.
2203
2204 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2205
2206         * tree-vrp.c (extract_range_from_binary_expr_1): Check
2207         range_int_cst_p rather than !symbolic_range_p before calling
2208         extract_range_from_multiplicative_op_1.
2209
2210 2017-01-04  Jeff Law  <law@redhat.com>
2211
2212         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2213         redundant test in assertion.
2214
2215 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2216
2217         * doc/rtl.texi: Document machine_mode wrapper classes.
2218
2219 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2220
2221         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2222         using tree_to_uhwi.
2223
2224 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2225
2226         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2227         the VEC_PERM_EXPR fold to fail.
2228
2229 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2230
2231         PR debug/83585
2232         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2233         to switched_sections.
2234
2235 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2236
2237         PR target/83680
2238         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2239         test for d.testing.
2240
2241 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
2242
2243         PR target/83387
2244         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2245         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2246
2247 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2248
2249         PR debug/83666
2250         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2251         is BLKmode and bitpos not zero or mode change is needed.
2252
2253 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2254
2255         PR target/83675
2256         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2257         TARGET_VIS2.
2258
2259 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
2260
2261         PR target/83628
2262         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2263         instead of MULT rtx.  Update all corresponding splitters.
2264         (*saddl_se): Ditto.
2265         (*ssub<modesuffix>): Ditto.
2266         (*ssubl_se): Ditto.
2267         (*cmp_sadd_di): Update split patterns.
2268         (*cmp_sadd_si): Ditto.
2269         (*cmp_sadd_sidi): Ditto.
2270         (*cmp_ssub_di): Ditto.
2271         (*cmp_ssub_si): Ditto.
2272         (*cmp_ssub_sidi): Ditto.
2273         * config/alpha/predicates.md (const23_operand): New predicate.
2274         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2275         Look for ASHIFT, not MULT inner operand.
2276         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2277
2278 2018-01-04  Martin Liska  <mliska@suse.cz>
2279
2280         PR gcov-profile/83669
2281         * gcov.c (output_intermediate_file): Add version to intermediate
2282         gcov file.
2283         * doc/gcov.texi: Document new field 'version' in intermediate
2284         file format. Fix location of '-k' option of gcov command.
2285
2286 2018-01-04  Martin Liska  <mliska@suse.cz>
2287
2288         PR ipa/82352
2289         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2290
2291 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2292
2293         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2294
2295 2018-01-03  Martin Sebor  <msebor@redhat.com>
2296
2297         PR tree-optimization/83655
2298         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2299         checking calls with invalid arguments.
2300
2301 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2302
2303         * tree-vect-stmts.c (vect_get_store_rhs): New function.
2304         (vectorizable_mask_load_store): Delete.
2305         (vectorizable_call): Return false for masked loads and stores.
2306         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
2307         instead of gimple_assign_rhs1.
2308         (vectorizable_load): Handle IFN_MASK_LOAD.
2309         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2310
2311 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2312
2313         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2314         split out from..,
2315         (vectorizable_mask_load_store): ...here.
2316         (vectorizable_load): ...and here.
2317
2318 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2319
2320         * tree-vect-stmts.c (vect_build_all_ones_mask)
2321         (vect_build_zero_merge_argument): New functions, split out from...
2322         (vectorizable_load): ...here.
2323
2324 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2325
2326         * tree-vect-stmts.c (vect_check_store_rhs): New function,
2327         split out from...
2328         (vectorizable_mask_load_store): ...here.
2329         (vectorizable_store): ...and here.
2330
2331 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2332
2333         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2334         split out from...
2335         (vectorizable_mask_load_store): ...here.
2336
2337 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2338
2339         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2340         (vect_model_store_cost): Take a vec_load_store_type instead of a
2341         vect_def_type.
2342         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2343         (vect_model_store_cost): Take a vec_load_store_type instead of a
2344         vect_def_type.
2345         (vectorizable_mask_load_store): Update accordingly.
2346         (vectorizable_store): Likewise.
2347         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2348
2349 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2350
2351         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2352         IFN_MASK_LOAD calls here rather than...
2353         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2354
2355 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2356             Alan Hayward  <alan.hayward@arm.com>
2357             David Sherwood  <david.sherwood@arm.com>
2358
2359         * expmed.c (extract_bit_field_1): For vector extracts,
2360         fall back to extract_bit_field_as_subreg if vec_extract
2361         isn't available.
2362
2363 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2364             Alan Hayward  <alan.hayward@arm.com>
2365             David Sherwood  <david.sherwood@arm.com>
2366
2367         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2368         they are variable or constant sized.
2369         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2370         slots for constant-sized data.
2371
2372 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2373             Alan Hayward  <alan.hayward@arm.com>
2374             David Sherwood  <david.sherwood@arm.com>
2375
2376         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2377         handling COND_EXPRs with boolean comparisons, try to find a better
2378         basis for the mask type than the boolean itself.
2379
2380 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2381
2382         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2383         is calculated and how it can be overridden.
2384         * genmodes.c (max_bitsize_mode_any_mode): New variable.
2385         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2386         if defined.
2387         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2388         if nonzero.
2389
2390 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2391             Alan Hayward  <alan.hayward@arm.com>
2392             David Sherwood  <david.sherwood@arm.com>
2393
2394         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2395         Remove the mode argument.
2396         (aarch64_simd_valid_immediate): Remove the mode and inverse
2397         arguments.
2398         * config/aarch64/iterators.md (bitsize): New iterator.
2399         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2400         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2401         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2402         aarch64_simd_valid_immediate.
2403         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2404         (aarch64_reg_or_bic_imm): Likewise.
2405         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2406         with an insn_type enum and msl with a modifier_type enum.
2407         Replace element_width with a scalar_mode.  Change the shift
2408         to unsigned int.  Add constructors for scalar_float_mode and
2409         scalar_int_mode elements.
2410         (aarch64_vect_float_const_representable_p): Delete.
2411         (aarch64_can_const_movi_rtx_p)
2412         (aarch64_simd_scalar_immediate_valid_for_move)
2413         (aarch64_simd_make_constant): Update call to
2414         aarch64_simd_valid_immediate.
2415         (aarch64_advsimd_valid_immediate_hs): New function.
2416         (aarch64_advsimd_valid_immediate): Likewise.
2417         (aarch64_simd_valid_immediate): Remove mode and inverse
2418         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
2419         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2420         and aarch64_float_const_representable_p on the result.
2421         (aarch64_output_simd_mov_immediate): Remove mode argument.
2422         Update call to aarch64_simd_valid_immediate and use of
2423         simd_immediate_info.
2424         (aarch64_output_scalar_simd_mov_immediate): Update call
2425         accordingly.
2426
2427 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2428             Alan Hayward  <alan.hayward@arm.com>
2429             David Sherwood  <david.sherwood@arm.com>
2430
2431         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2432         (mode_nunits): Likewise CONST_MODE_NUNITS.
2433         * machmode.def (ADJUST_NUNITS): Document.
2434         * genmodes.c (mode_data::need_nunits_adj): New field.
2435         (blank_mode): Update accordingly.
2436         (adj_nunits): New variable.
2437         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2438         parameter.
2439         (emit_mode_size_inline): Set need_bytesize_adj for all modes
2440         listed in adj_nunits.
2441         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2442         listed in adj_nunits.  Don't emit case statements for such modes.
2443         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2444         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
2445         nothing if adj_nunits is nonnull.
2446         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2447         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2448         (emit_mode_fbit): Update use of print_maybe_const_decl.
2449         (emit_move_size): Likewise.  Treat the array as non-const
2450         if adj_nunits.
2451         (emit_mode_adjustments): Handle adj_nunits.
2452
2453 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2454
2455         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2456         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2457         (VECTOR_MODES): Use it.
2458         (make_vector_modes): Take the prefix as an argument.
2459
2460 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2461             Alan Hayward  <alan.hayward@arm.com>
2462             David Sherwood  <david.sherwood@arm.com>
2463
2464         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2465         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2466         for MODE_VECTOR_BOOL.
2467         * machmode.def (VECTOR_BOOL_MODE): Document.
2468         * genmodes.c (VECTOR_BOOL_MODE): New macro.
2469         (make_vector_bool_mode): New function.
2470         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2471         MODE_VECTOR_BOOL.
2472         * lto-streamer-in.c (lto_input_mode_table): Likewise.
2473         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2474         Likewise.
2475         * stor-layout.c (int_mode_for_mode): Likewise.
2476         * tree.c (build_vector_type_for_mode): Likewise.
2477         * varasm.c (output_constant_pool_2): Likewise.
2478         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2479         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
2480         for MODE_VECTOR_BOOL.
2481         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2482         of mode class checks.
2483         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2484         instead of a list of mode class checks.
2485         (expand_vector_scalar_condition): Likewise.
2486         (type_for_widest_vector_mode): Handle BImode as an inner mode.
2487
2488 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2489             Alan Hayward  <alan.hayward@arm.com>
2490             David Sherwood  <david.sherwood@arm.com>
2491
2492         * machmode.h (mode_size): Change from unsigned short to
2493         poly_uint16_pod.
2494         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2495         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2496         or if measurement_type is not polynomial.
2497         (fixed_size_mode::includes_p): Check for constant-sized modes.
2498         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2499         return a poly_uint16 rather than an unsigned short.
2500         (emit_mode_size): Change the type of mode_size from unsigned short
2501         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
2502         (emit_mode_adjustments): Cope with polynomial vector sizes.
2503         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2504         for GET_MODE_SIZE.
2505         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2506         for GET_MODE_SIZE.
2507         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2508         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2509         * caller-save.c (setup_save_areas): Likewise.
2510         (replace_reg_with_saved_mem): Likewise.
2511         * calls.c (emit_library_call_value_1): Likewise.
2512         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2513         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2514         (gen_lowpart_for_combine): Likewise.
2515         * convert.c (convert_to_integer_1): Likewise.
2516         * cse.c (equiv_constant, cse_insn): Likewise.
2517         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2518         (cselib_subst_to_values): Likewise.
2519         * dce.c (word_dce_process_block): Likewise.
2520         * df-problems.c (df_word_lr_mark_ref): Likewise.
2521         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2522         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2523         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2524         (rtl_for_decl_location): Likewise.
2525         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2526         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2527         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2528         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2529         (expand_expr_real_1): Likewise.
2530         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2531         (pad_below): Likewise.
2532         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2533         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2534         * ira.c (get_subreg_tracking_sizes): Likewise.
2535         * ira-build.c (ira_create_allocno_objects): Likewise.
2536         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2537         (ira_sort_regnos_for_alter_reg): Likewise.
2538         * ira-costs.c (record_operand_costs): Likewise.
2539         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2540         (resolve_simple_move): Likewise.
2541         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2542         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2543         (lra_constraints): Likewise.
2544         (CONST_POOL_OK_P): Reject variable-sized modes.
2545         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2546         (add_pseudo_to_slot, lra_spill): Likewise.
2547         * omp-low.c (omp_clause_aligned_alignment): Likewise.
2548         * optabs-query.c (get_best_extraction_insn): Likewise.
2549         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2550         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2551         (expand_mult_highpart, valid_multiword_target_p): Likewise.
2552         * recog.c (offsettable_address_addr_space_p): Likewise.
2553         * regcprop.c (maybe_mode_change): Likewise.
2554         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2555         * regrename.c (build_def_use): Likewise.
2556         * regstat.c (dump_reg_info): Likewise.
2557         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2558         (find_reloads, find_reloads_subreg_address): Likewise.
2559         * reload1.c (eliminate_regs_1): Likewise.
2560         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2561         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2562         (simplify_binary_operation_1, simplify_subreg): Likewise.
2563         * targhooks.c (default_function_arg_padding): Likewise.
2564         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2565         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2566         (verify_gimple_assign_ternary): Likewise.
2567         * tree-inline.c (estimate_move_cost): Likewise.
2568         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2569         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2570         (get_address_cost_ainc): Likewise.
2571         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2572         (vect_supportable_dr_alignment): Likewise.
2573         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2574         (vectorizable_reduction): Likewise.
2575         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2576         (vectorizable_operation, vectorizable_load): Likewise.
2577         * tree.c (build_same_sized_truth_vector_type): Likewise.
2578         * valtrack.c (cleanup_auto_inc_dec): Likewise.
2579         * var-tracking.c (emit_note_insn_var_location): Likewise.
2580         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2581         (ADDR_VEC_ALIGN): Likewise.
2582
2583 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2584             Alan Hayward  <alan.hayward@arm.com>
2585             David Sherwood  <david.sherwood@arm.com>
2586
2587         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2588         unsigned short.
2589         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2590         or if measurement_type is polynomial.
2591         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2592         * combine.c (make_extraction): Likewise.
2593         * dse.c (find_shift_sequence): Likewise.
2594         * dwarf2out.c (mem_loc_descriptor): Likewise.
2595         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2596         (extract_bit_field, extract_low_bits): Likewise.
2597         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2598         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2599         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2600         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2601         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2602         * reload.c (find_reloads): Likewise.
2603         * reload1.c (alter_reg): Likewise.
2604         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2605         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2606         * tree-if-conv.c (predicate_mem_writes): Likewise.
2607         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2608         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2609         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2610         * valtrack.c (dead_debug_insert_temp): Likewise.
2611         * varasm.c (mergeable_constant_section): Likewise.
2612         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2613
2614 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2615             Alan Hayward  <alan.hayward@arm.com>
2616             David Sherwood  <david.sherwood@arm.com>
2617
2618         * expr.c (expand_assignment): Cope with polynomial mode sizes
2619         when assigning to a CONCAT.
2620
2621 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2622             Alan Hayward  <alan.hayward@arm.com>
2623             David Sherwood  <david.sherwood@arm.com>
2624
2625         * machmode.h (mode_precision): Change from unsigned short to
2626         poly_uint16_pod.
2627         (mode_to_precision): Return a poly_uint16 rather than an unsigned
2628         short.
2629         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2630         or if measurement_type is not polynomial.
2631         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
2632         in which the mode is already known to be a scalar_int_mode.
2633         * genmodes.c (emit_mode_precision): Change the type of mode_precision
2634         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
2635         initializer.
2636         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2637         for GET_MODE_PRECISION.
2638         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2639         for GET_MODE_PRECISION.
2640         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2641         as polynomial.
2642         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2643         (expand_field_assignment, make_extraction): Likewise.
2644         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
2645         (get_last_value): Likewise.
2646         * convert.c (convert_to_integer_1): Likewise.
2647         * cse.c (cse_insn): Likewise.
2648         * expr.c (expand_expr_real_1): Likewise.
2649         * lra-constraints.c (simplify_operand_subreg): Likewise.
2650         * optabs-query.c (can_atomic_load_p): Likewise.
2651         * optabs.c (expand_atomic_load): Likewise.
2652         (expand_atomic_store): Likewise.
2653         * ree.c (combine_reaching_defs): Likewise.
2654         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
2655         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
2656         * tree.h (type_has_mode_precision_p): Likewise.
2657         * ubsan.c (instrument_si_overflow): Likewise.
2658
2659 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2660             Alan Hayward  <alan.hayward@arm.com>
2661             David Sherwood  <david.sherwood@arm.com>
2662
2663         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
2664         polynomial numbers of units.
2665         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
2666         (valid_vector_subparts_p): New function.
2667         (build_vector_type): Remove temporary shim and take the number
2668         of units as a poly_uint64 rather than an int.
2669         (build_opaque_vector_type): Take the number of units as a
2670         poly_uint64 rather than an int.
2671         * tree.c (build_vector_from_ctor): Handle polynomial
2672         TYPE_VECTOR_SUBPARTS.
2673         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
2674         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
2675         (build_vector_from_val): If the number of units is variable,
2676         use build_vec_duplicate_cst for constant operands and
2677         VEC_DUPLICATE_EXPR otherwise.
2678         (make_vector_type): Remove temporary is_constant ().
2679         (build_vector_type, build_opaque_vector_type): Take the number of
2680         units as a poly_uint64 rather than an int.
2681         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
2682         VECTOR_CST_NELTS.
2683         * cfgexpand.c (expand_debug_expr): Likewise.
2684         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
2685         (store_constructor, expand_expr_real_1): Likewise.
2686         (const_scalar_mask_from_tree): Likewise.
2687         * fold-const-call.c (fold_const_reduction): Likewise.
2688         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
2689         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
2690         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
2691         (fold_relational_const): Likewise.
2692         (native_interpret_vector): Likewise.  Change the size from an
2693         int to an unsigned int.
2694         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
2695         TYPE_VECTOR_SUBPARTS.
2696         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
2697         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
2698         duplicating a non-constant operand into a variable-length vector.
2699         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
2700         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
2701         * ipa-icf.c (sem_variable::equals): Likewise.
2702         * match.pd: Likewise.
2703         * omp-simd-clone.c (simd_clone_subparts): Likewise.
2704         * print-tree.c (print_node): Likewise.
2705         * stor-layout.c (layout_type): Likewise.
2706         * targhooks.c (default_builtin_vectorization_cost): Likewise.
2707         * tree-cfg.c (verify_gimple_comparison): Likewise.
2708         (verify_gimple_assign_binary): Likewise.
2709         (verify_gimple_assign_ternary): Likewise.
2710         (verify_gimple_assign_single): Likewise.
2711         * tree-pretty-print.c (dump_generic_node): Likewise.
2712         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2713         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
2714         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
2715         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
2716         (vect_shift_permute_load_chain): Likewise.
2717         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
2718         (expand_vector_condition, optimize_vector_constructor): Likewise.
2719         (lower_vec_perm, get_compute_type): Likewise.
2720         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2721         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
2722         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
2723         (vect_recog_mask_conversion_pattern): Likewise.
2724         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
2725         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
2726         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2727         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
2728         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
2729         (vectorizable_shift, vectorizable_operation, vectorizable_store)
2730         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
2731         (supportable_widening_operation): Likewise.
2732         (supportable_narrowing_operation): Likewise.
2733         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
2734         Likewise.
2735         * varasm.c (output_constant): Likewise.
2736
2737 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2738             Alan Hayward  <alan.hayward@arm.com>
2739             David Sherwood  <david.sherwood@arm.com>
2740
2741         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
2742         so that both the length == 3 and length != 3 cases set up their
2743         own permute vectors.  Add comments explaining why we know the
2744         number of elements is constant.
2745         (vect_permute_load_chain): Likewise.
2746
2747 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2748             Alan Hayward  <alan.hayward@arm.com>
2749             David Sherwood  <david.sherwood@arm.com>
2750
2751         * machmode.h (mode_nunits): Change from unsigned char to
2752         poly_uint16_pod.
2753         (ONLY_FIXED_SIZE_MODES): New macro.
2754         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
2755         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
2756         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
2757         New typedefs.
2758         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
2759         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
2760         or if measurement_type is not polynomial.
2761         * genmodes.c (ZERO_COEFFS): New macro.
2762         (emit_mode_nunits_inline): Make mode_nunits_inline return a
2763         poly_uint16.
2764         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
2765         Use ZERO_COEFFS when emitting initializers.
2766         * data-streamer.h (bp_pack_poly_value): New function.
2767         (bp_unpack_poly_value): Likewise.
2768         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2769         for GET_MODE_NUNITS.
2770         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2771         for GET_MODE_NUNITS.
2772         * tree.c (make_vector_type): Remove temporary shim and make
2773         the real function take the number of units as a poly_uint64
2774         rather than an int.
2775         (build_vector_type_for_mode): Handle polynomial nunits.
2776         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
2777         * emit-rtl.c (const_vec_series_p_1): Likewise.
2778         (gen_rtx_CONST_VECTOR): Likewise.
2779         * fold-const.c (test_vec_duplicate_folding): Likewise.
2780         * genrecog.c (validate_pattern): Likewise.
2781         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
2782         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2783         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
2784         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
2785         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
2786         * rtlanal.c (subreg_get_info): Likewise.
2787         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2788         (vect_grouped_load_supported): Likewise.
2789         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
2790         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
2791         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
2792         (simplify_const_unary_operation, simplify_binary_operation_1)
2793         (simplify_const_binary_operation, simplify_ternary_operation)
2794         (test_vector_ops_duplicate, test_vector_ops): Likewise.
2795         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
2796         instead of CONST_VECTOR_NUNITS.
2797         * varasm.c (output_constant_pool_2): Likewise.
2798         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
2799         explicit-encoded elements in the XVEC for variable-length vectors.
2800
2801 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2802
2803         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
2804
2805 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2806             Alan Hayward  <alan.hayward@arm.com>
2807             David Sherwood  <david.sherwood@arm.com>
2808
2809         * coretypes.h (fixed_size_mode): Declare.
2810         (fixed_size_mode_pod): New typedef.
2811         * builtins.h (target_builtins::x_apply_args_mode)
2812         (target_builtins::x_apply_result_mode): Change type to
2813         fixed_size_mode_pod.
2814         * builtins.c (apply_args_size, apply_result_size, result_vector)
2815         (expand_builtin_apply_args_1, expand_builtin_apply)
2816         (expand_builtin_return): Update accordingly.
2817
2818 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2819
2820         * cse.c (hash_rtx_cb): Hash only the encoded elements.
2821         * cselib.c (cselib_hash_rtx): Likewise.
2822         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
2823         CONST_VECTOR encoding.
2824
2825 2017-01-03  Jakub Jelinek  <jakub@redhat.com>
2826             Jeff Law  <law@redhat.com>
2827
2828         PR target/83641
2829         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
2830         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
2831         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
2832         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
2833
2834         PR target/83641
2835         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
2836         explicitly probe *sp in a noreturn function if there were any callee
2837         register saves or frame pointer is needed.
2838
2839 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
2840
2841         PR debug/83621
2842         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
2843         BLKmode for ternary, binary or unary expressions.
2844
2845         PR debug/83645
2846         * var-tracking.c (delete_vta_debug_insn): New inline function.
2847         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
2848         insns from get_insns () to NULL instead of each bb separately.
2849         Use delete_vta_debug_insn.  No longer static.
2850         (vt_debug_insns_local, variable_tracking_main_1): Adjust
2851         delete_vta_debug_insns callers.
2852         * rtl.h (delete_vta_debug_insns): Declare.
2853         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
2854         instead of variable_tracking_main.
2855
2856 2018-01-03  Martin Sebor  <msebor@redhat.com>
2857
2858         PR tree-optimization/83603
2859         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
2860         arguments past the endof the argument list in functions declared
2861         without a prototype.
2862         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
2863         Avoid checking when arguments are null.
2864
2865 2018-01-03  Martin Sebor  <msebor@redhat.com>
2866
2867         PR c/83559
2868         * doc/extend.texi (attribute const): Fix a typo.
2869         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
2870         issuing -Wsuggest-attribute for void functions.
2871
2872 2018-01-03  Martin Sebor  <msebor@redhat.com>
2873
2874         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
2875         offset_int::from instead of wide_int::to_shwi.
2876         (maybe_diag_overlap): Remove assertion.
2877         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
2878         * gimple-ssa-sprintf.c (format_directive): Same.
2879         (parse_directive): Same.
2880         (sprintf_dom_walker::compute_format_length): Same.
2881         (try_substitute_return_value): Same.
2882
2883 2017-01-03  Jeff Law  <law@redhat.com>
2884
2885         PR middle-end/83654
2886         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
2887         non-constant residual for zero at runtime and avoid probing in
2888         that case.  Reorganize code for trailing problem to mirror handling
2889         of the residual.
2890
2891 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
2892
2893         PR tree-optimization/83501
2894         * tree-ssa-strlen.c (get_string_cst): New.
2895         (handle_char_store): Call get_string_cst.
2896
2897 2018-01-03  Martin Liska  <mliska@suse.cz>
2898
2899         PR tree-optimization/83593
2900         * tree-ssa-strlen.c: Include tree-cfg.h.
2901         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
2902         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
2903         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
2904         to false.
2905         (strlen_dom_walker::before_dom_children): Call
2906         gimple_purge_dead_eh_edges. Dump tranformation with details
2907         dump flags.
2908         (strlen_dom_walker::before_dom_children): Update call by adding
2909         new argument cleanup_eh.
2910         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
2911
2912 2018-01-03  Martin Liska  <mliska@suse.cz>
2913
2914         PR ipa/83549
2915         * cif-code.def (VARIADIC_THUNK): New enum value.
2916         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
2917         thunks.
2918
2919 2018-01-03  Jan Beulich  <jbeulich@suse.com>
2920
2921         * sse.md (mov<mode>_internal): Tighten condition for when to use
2922         vmovdqu<ssescalarsize> for TI and OI modes.
2923
2924 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
2925
2926         Update copyright years.
2927
2928 2018-01-03  Martin Liska  <mliska@suse.cz>
2929
2930         PR ipa/83594
2931         * ipa-visibility.c (function_and_variable_visibility): Skip
2932         functions with noipa attribure.
2933
2934 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
2935
2936         * gcc.c (process_command): Update copyright notice dates.
2937         * gcov-dump.c (print_version): Ditto.
2938         * gcov.c (print_version): Ditto.
2939         * gcov-tool.c (print_version): Ditto.
2940         * gengtype.c (create_file): Ditto.
2941         * doc/cpp.texi: Bump @copying's copyright year.
2942         * doc/cppinternals.texi: Ditto.
2943         * doc/gcc.texi: Ditto.
2944         * doc/gccint.texi: Ditto.
2945         * doc/gcov.texi: Ditto.
2946         * doc/install.texi: Ditto.
2947         * doc/invoke.texi: Ditto.
2948
2949 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2950
2951         * vector-builder.h (vector_builder::m_full_nelts): Change from
2952         unsigned int to poly_uint64.
2953         (vector_builder::full_nelts): Update prototype accordingly.
2954         (vector_builder::new_vector): Likewise.
2955         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
2956         (vector_builder::operator ==): Likewise.
2957         (vector_builder::finalize): Likewise.
2958         * int-vector-builder.h (int_vector_builder::int_vector_builder):
2959         Take the number of elements as a poly_uint64 rather than an
2960         unsigned int.
2961         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
2962         from unsigned int to poly_uint64.
2963         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
2964         (vec_perm_indices::new_vector): Likewise.
2965         (vec_perm_indices::length): Likewise.
2966         (vec_perm_indices::nelts_per_input): Likewise.
2967         (vec_perm_indices::input_nelts): Likewise.
2968         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
2969         number of elements per input as a poly_uint64 rather than an
2970         unsigned int.  Use the original encoding for variable-length
2971         vectors, rather than clamping each individual element.
2972         For the second and subsequent elements in each pattern,
2973         clamp the step and base before clamping their sum.
2974         (vec_perm_indices::series_p): Handle polynomial element counts.
2975         (vec_perm_indices::all_in_range_p): Likewise.
2976         (vec_perm_indices_to_tree): Likewise.
2977         (vec_perm_indices_to_rtx): Likewise.
2978         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
2979         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
2980         (tree_vector_builder::new_binary_operation): Handle polynomial
2981         element counts.  Return false if we need to know the number
2982         of elements at compile time.
2983         * fold-const.c (fold_vec_perm): Punt if the number of elements
2984         isn't known at compile time.
2985
2986 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2987
2988         * vec-perm-indices.h (vec_perm_builder): Change element type
2989         from HOST_WIDE_INT to poly_int64.
2990         (vec_perm_indices::element_type): Update accordingly.
2991         (vec_perm_indices::clamp): Handle polynomial element_types.
2992         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
2993         (vec_perm_indices::all_in_range_p): Likewise.
2994         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
2995         than shwi trees.
2996         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
2997         polynomial vec_perm_indices element types.
2998         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
2999         * fold-const.c (fold_vec_perm): Likewise.
3000         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3001         * tree-vect-generic.c (lower_vec_perm): Likewise.
3002         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3003         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3004         element type to HOST_WIDE_INT.
3005
3006 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3007             Alan Hayward  <alan.hayward@arm.com>
3008             David Sherwood  <david.sherwood@arm.com>
3009
3010         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3011         rather than an int.  Use plus_constant.
3012         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3013         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3014
3015 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3016             Alan Hayward  <alan.hayward@arm.com>
3017             David Sherwood  <david.sherwood@arm.com>
3018
3019         * calls.c (emit_call_1, expand_call): Change struct_value_size from
3020         a HOST_WIDE_INT to a poly_int64.
3021
3022 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3023             Alan Hayward  <alan.hayward@arm.com>
3024             David Sherwood  <david.sherwood@arm.com>
3025
3026         * calls.c (load_register_parameters): Cope with polynomial
3027         mode sizes.  Require a constant size for BLKmode parameters
3028         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
3029         forces a parameter to be padded at the lsb end in order to
3030         fill a complete number of words, require the parameter size
3031         to be ordered wrt UNITS_PER_WORD.
3032
3033 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3034             Alan Hayward  <alan.hayward@arm.com>
3035             David Sherwood  <david.sherwood@arm.com>
3036
3037         * reload1.c (spill_stack_slot_width): Change element type
3038         from unsigned int to poly_uint64_pod.
3039         (alter_reg): Treat mode sizes as polynomial.
3040
3041 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3042             Alan Hayward  <alan.hayward@arm.com>
3043             David Sherwood  <david.sherwood@arm.com>
3044
3045         * reload.c (complex_word_subreg_p): New function.
3046         (reload_inner_reg_of_subreg, push_reload): Use it.
3047
3048 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3049             Alan Hayward  <alan.hayward@arm.com>
3050             David Sherwood  <david.sherwood@arm.com>
3051
3052         * lra-constraints.c (process_alt_operands): Reject matched
3053         operands whose sizes aren't ordered.
3054         (match_reload): Refer to this check here.
3055
3056 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3057             Alan Hayward  <alan.hayward@arm.com>
3058             David Sherwood  <david.sherwood@arm.com>
3059
3060         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3061         that the mode size is in the set {1, 2, 4, 8, 16}.
3062
3063 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3064             Alan Hayward  <alan.hayward@arm.com>
3065             David Sherwood  <david.sherwood@arm.com>
3066
3067         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3068         Use plus_constant instead of gen_rtx_PLUS.
3069
3070 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3071             Alan Hayward  <alan.hayward@arm.com>
3072             David Sherwood  <david.sherwood@arm.com>
3073
3074         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3075         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3076         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3077         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3078         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3079         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3080         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3081         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3082         * config/i386/i386.c (ix86_push_rounding): ...this new function.
3083         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3084         a poly_int64.
3085         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3086         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3087         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3088         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3089         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3090         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3091         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3092         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3093         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3094         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3095         function.
3096         * expr.c (emit_move_resolve_push): Treat the input and result
3097         of PUSH_ROUNDING as a poly_int64.
3098         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3099         (emit_push_insn): Likewise.
3100         * lra-eliminations.c (mark_not_eliminable): Likewise.
3101         * recog.c (push_operand): Likewise.
3102         * reload1.c (elimination_effects): Likewise.
3103         * rtlanal.c (nonzero_bits1): Likewise.
3104         * calls.c (store_one_arg): Likewise.  Require the padding to be
3105         known at compile time.
3106
3107 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3108             Alan Hayward  <alan.hayward@arm.com>
3109             David Sherwood  <david.sherwood@arm.com>
3110
3111         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3112         Use plus_constant instead of gen_rtx_PLUS.
3113
3114 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3115             Alan Hayward  <alan.hayward@arm.com>
3116             David Sherwood  <david.sherwood@arm.com>
3117
3118         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3119         rather than an int.
3120
3121 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3122             Alan Hayward  <alan.hayward@arm.com>
3123             David Sherwood  <david.sherwood@arm.com>
3124
3125         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3126         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3127         via stack temporaries.  Treat the mode size as polynomial too.
3128
3129 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3130             Alan Hayward  <alan.hayward@arm.com>
3131             David Sherwood  <david.sherwood@arm.com>
3132
3133         * expr.c (expand_expr_real_2): When handling conversions involving
3134         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3135         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
3136         as a poly_uint64 too.
3137
3138 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3139             Alan Hayward  <alan.hayward@arm.com>
3140             David Sherwood  <david.sherwood@arm.com>
3141
3142         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3143
3144 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3145             Alan Hayward  <alan.hayward@arm.com>
3146             David Sherwood  <david.sherwood@arm.com>
3147
3148         * combine.c (can_change_dest_mode): Handle polynomial
3149         REGMODE_NATURAL_SIZE.
3150         * expmed.c (store_bit_field_1): Likewise.
3151         * expr.c (store_constructor): Likewise.
3152         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3153         and polynomial REGMODE_NATURAL_SIZE.
3154         (gen_lowpart_common): Likewise.
3155         * reginfo.c (record_subregs_of_mode): Likewise.
3156         * rtlanal.c (read_modify_subreg_p): Likewise.
3157
3158 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3159             Alan Hayward  <alan.hayward@arm.com>
3160             David Sherwood  <david.sherwood@arm.com>
3161
3162         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3163         numbers of elements.
3164
3165 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3166             Alan Hayward  <alan.hayward@arm.com>
3167             David Sherwood  <david.sherwood@arm.com>
3168
3169         * match.pd: Cope with polynomial numbers of vector elements.
3170
3171 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3172             Alan Hayward  <alan.hayward@arm.com>
3173             David Sherwood  <david.sherwood@arm.com>
3174
3175         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3176         in a POINTER_PLUS_EXPR.
3177
3178 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3179             Alan Hayward  <alan.hayward@arm.com>
3180             David Sherwood  <david.sherwood@arm.com>
3181
3182         * omp-simd-clone.c (simd_clone_subparts): New function.
3183         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3184         (ipa_simd_modify_function_body): Likewise.
3185
3186 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3187             Alan Hayward  <alan.hayward@arm.com>
3188             David Sherwood  <david.sherwood@arm.com>
3189
3190         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3191         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3192         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3193         (expand_vector_condition, vector_element): Likewise.
3194         (subparts_gt): New function.
3195         (get_compute_type): Use subparts_gt.
3196         (count_type_subparts): Delete.
3197         (expand_vector_operations_1): Use subparts_gt instead of
3198         count_type_subparts.
3199
3200 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3201             Alan Hayward  <alan.hayward@arm.com>
3202             David Sherwood  <david.sherwood@arm.com>
3203
3204         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3205         (vect_compile_time_alias): ...this new function.  Do the calculation
3206         on poly_ints rather than trees.
3207         (vect_prune_runtime_alias_test_list): Update call accordingly.
3208
3209 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3210             Alan Hayward  <alan.hayward@arm.com>
3211             David Sherwood  <david.sherwood@arm.com>
3212
3213         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3214         numbers of units.
3215         (vect_schedule_slp_instance): Likewise.
3216
3217 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3218             Alan Hayward  <alan.hayward@arm.com>
3219             David Sherwood  <david.sherwood@arm.com>
3220
3221         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3222         constant and extern definitions for variable-length vectors.
3223         (vect_get_constant_vectors): Note that the number of units
3224         is known to be constant.
3225
3226 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3227             Alan Hayward  <alan.hayward@arm.com>
3228             David Sherwood  <david.sherwood@arm.com>
3229
3230         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3231         of units as polynomial.  Choose between WIDE and NARROW based
3232         on multiple_p.
3233
3234 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3235             Alan Hayward  <alan.hayward@arm.com>
3236             David Sherwood  <david.sherwood@arm.com>
3237
3238         * tree-vect-stmts.c (simd_clone_subparts): New function.
3239         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3240
3241 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3242             Alan Hayward  <alan.hayward@arm.com>
3243             David Sherwood  <david.sherwood@arm.com>
3244
3245         * tree-vect-stmts.c (vectorizable_call): Treat the number of
3246         vectors as polynomial.  Use build_index_vector for
3247         IFN_GOMP_SIMD_LANE.
3248
3249 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3250             Alan Hayward  <alan.hayward@arm.com>
3251             David Sherwood  <david.sherwood@arm.com>
3252
3253         * tree-vect-stmts.c (get_load_store_type): Treat the number of
3254         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3255         for variable-length vectors.
3256         (vectorizable_mask_load_store): Treat the number of units as
3257         polynomial, asserting that it is constant if the condition has
3258         already been enforced.
3259         (vectorizable_store, vectorizable_load): Likewise.
3260
3261 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3262             Alan Hayward  <alan.hayward@arm.com>
3263             David Sherwood  <david.sherwood@arm.com>
3264
3265         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3266         of units as polynomial.  Punt if we can't tell at compile time
3267         which vector contains the final result.
3268
3269 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3270             Alan Hayward  <alan.hayward@arm.com>
3271             David Sherwood  <david.sherwood@arm.com>
3272
3273         * tree-vect-loop.c (vectorizable_induction): Treat the number
3274         of units as polynomial.  Punt on SLP inductions.  Use an integer
3275         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
3276         cast of such a series for variable-length floating-point
3277         reductions.
3278
3279 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3280             Alan Hayward  <alan.hayward@arm.com>
3281             David Sherwood  <david.sherwood@arm.com>
3282
3283         * tree.h (build_index_vector): Declare.
3284         * tree.c (build_index_vector): New function.
3285         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3286         of units as polynomial, forcibly converting it to a constant if
3287         vectorizable_reduction has already enforced the condition.
3288         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
3289         to create a {1,2,3,...} vector.
3290         (vectorizable_reduction): Treat the number of units as polynomial.
3291         Choose vectype_in based on the largest scalar element size rather
3292         than the smallest number of units.  Enforce the restrictions
3293         relied on above.
3294
3295 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3296             Alan Hayward  <alan.hayward@arm.com>
3297             David Sherwood  <david.sherwood@arm.com>
3298
3299         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3300         number of units as polynomial.
3301
3302 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3303             Alan Hayward  <alan.hayward@arm.com>
3304             David Sherwood  <david.sherwood@arm.com>
3305
3306         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3307         * target.def (autovectorize_vector_sizes): Return the vector sizes
3308         by pointer, using vector_sizes rather than a bitmask.
3309         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3310         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3311         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3312         Likewise.
3313         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3314         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3315         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3316         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3317         * omp-general.c (omp_max_vf): Likewise.
3318         * omp-low.c (omp_clause_aligned_alignment): Likewise.
3319         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3320         * tree-vect-loop.c (vect_analyze_loop): Likewise.
3321         * tree-vect-slp.c (vect_slp_bb): Likewise.
3322         * doc/tm.texi: Regenerate.
3323         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3324         to a poly_uint64.
3325         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3326         the vector size as a poly_uint64 rather than an unsigned int.
3327         (current_vector_size): Change from an unsigned int to a poly_uint64.
3328         (get_vectype_for_scalar_type): Update accordingly.
3329         * tree.h (build_truth_vector_type): Take the size and number of
3330         units as a poly_uint64 rather than an unsigned int.
3331         (build_vector_type): Add a temporary overload that takes
3332         the number of units as a poly_uint64 rather than an unsigned int.
3333         * tree.c (make_vector_type): Likewise.
3334         (build_truth_vector_type): Take the number of units as a poly_uint64
3335         rather than an unsigned int.
3336
3337 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3338             Alan Hayward  <alan.hayward@arm.com>
3339             David Sherwood  <david.sherwood@arm.com>
3340
3341         * target.def (get_mask_mode): Take the number of units and length
3342         as poly_uint64s rather than unsigned ints.
3343         * targhooks.h (default_get_mask_mode): Update accordingly.
3344         * targhooks.c (default_get_mask_mode): Likewise.
3345         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3346         * doc/tm.texi: Regenerate.
3347
3348 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3349             Alan Hayward  <alan.hayward@arm.com>
3350             David Sherwood  <david.sherwood@arm.com>
3351
3352         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3353         * omp-general.c (omp_max_vf): Likewise.
3354         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3355         (expand_omp_simd): Handle polynomial safelen.
3356         * omp-low.c (omplow_simd_context): Add a default constructor.
3357         (omplow_simd_context::max_vf): Change from int to poly_uint64.
3358         (lower_rec_simd_input_clauses): Update accordingly.
3359         (lower_rec_input_clauses): Likewise.
3360
3361 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3362             Alan Hayward  <alan.hayward@arm.com>
3363             David Sherwood  <david.sherwood@arm.com>
3364
3365         * tree-vectorizer.h (vect_nunits_for_cost): New function.
3366         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3367         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3368         (vect_analyze_slp_cost): Likewise.
3369         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3370         (vect_model_load_cost): Likewise.
3371
3372 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3373             Alan Hayward  <alan.hayward@arm.com>
3374             David Sherwood  <david.sherwood@arm.com>
3375
3376         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3377         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3378         from an unsigned int * to a poly_uint64_pod *.
3379         (calculate_unrolling_factor): New function.
3380         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
3381
3382 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3383             Alan Hayward  <alan.hayward@arm.com>
3384             David Sherwood  <david.sherwood@arm.com>
3385
3386         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3387         from an unsigned int to a poly_uint64.
3388         (_loop_vec_info::slp_unrolling_factor): Likewise.
3389         (_loop_vec_info::vectorization_factor): Change from an int
3390         to a poly_uint64.
3391         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3392         (vect_get_num_vectors): New function.
3393         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3394         (vect_get_num_copies): Use vect_get_num_vectors.
3395         (vect_analyze_data_ref_dependences): Change max_vf from an int *
3396         to an unsigned int *.
3397         (vect_analyze_data_refs): Change min_vf from an int * to a
3398         poly_uint64 *.
3399         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3400         than an unsigned HOST_WIDE_INT.
3401         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3402         (vect_analyze_data_ref_dependence): Change max_vf from an int *
3403         to an unsigned int *.
3404         (vect_analyze_data_ref_dependences): Likewise.
3405         (vect_compute_data_ref_alignment): Handle polynomial vf.
3406         (vect_enhance_data_refs_alignment): Likewise.
3407         (vect_prune_runtime_alias_test_list): Likewise.
3408         (vect_shift_permute_load_chain): Likewise.
3409         (vect_supportable_dr_alignment): Likewise.
3410         (dependence_distance_ge_vf): Take the vectorization factor as a
3411         poly_uint64 rather than an unsigned HOST_WIDE_INT.
3412         (vect_analyze_data_refs): Change min_vf from an int * to a
3413         poly_uint64 *.
3414         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3415         vfm1 as a poly_uint64 rather than an int.  Make the same change
3416         for the returned bound_scalar.
3417         (vect_gen_vector_loop_niters): Handle polynomial vf.
3418         (vect_do_peeling): Likewise.  Update call to
3419         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3420         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3421         be constant.
3422         * tree-vect-loop.c (vect_determine_vectorization_factor)
3423         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3424         (vect_get_known_peeling_cost): Likewise.
3425         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3426         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3427         (vect_transform_loop): Likewise.  Use the lowest possible VF when
3428         updating the upper bounds of the loop.
3429         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
3430         rather than an int.
3431         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3432         polynomial unroll factors.
3433         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3434         (vect_make_slp_decision): Likewise.
3435         (vect_supported_load_permutation_p): Likewise, and polynomial
3436         vf too.
3437         (vect_analyze_slp_cost): Handle polynomial vf.
3438         (vect_slp_analyze_node_operations): Likewise.
3439         (vect_slp_analyze_bb_1): Likewise.
3440         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3441         than an unsigned HOST_WIDE_INT.
3442         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3443         (vectorizable_load): Handle polynomial vf.
3444         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3445         a poly_uint64.
3446         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3447
3448 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3449             Alan Hayward  <alan.hayward@arm.com>
3450             David Sherwood  <david.sherwood@arm.com>
3451
3452         * match.pd: Handle bit operations involving three constants
3453         and try to fold one pair.
3454
3455 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3456
3457         * tree-vect-loop-manip.c: Include gimple-fold.h.
3458         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3459         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
3460         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3461         Add a path that uses a step of VF instead of 1, but disable it
3462         for now.
3463         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3464         and niters_no_overflow parameters.  Update calls to
3465         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3466         Create a new SSA name if the latter choses to use a ste other
3467         than zero, and return it via niters_vector_mult_vf_var.
3468         * tree-vect-loop.c (vect_transform_loop): Update calls to
3469         vect_do_peeling, vect_gen_vector_loop_niters and
3470         slpeel_make_loop_iterate_ntimes.
3471         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3472         (vect_gen_vector_loop_niters): Update declarations after above changes.
3473
3474 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
3475
3476         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3477         128-bit round to integer instructions.
3478         (ceil<mode>2): Likewise.
3479         (btrunc<mode>2): Likewise.
3480         (round<mode>2): Likewise.
3481
3482 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3483
3484         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3485         unaligned VSX load/store on P8/P9.
3486         (expand_block_clear): Allow the use of unaligned VSX
3487         load/store on P8/P9.
3488
3489 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3490
3491         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3492         New function.
3493         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3494         swap associated with both a load and a store.
3495
3496 2018-01-02  Andrew Waterman  <andrew@sifive.com>
3497
3498         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3499         * config/riscv/riscv.md (clear_cache): Use it.
3500
3501 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
3502
3503         * web.c: Remove out-of-date comment.
3504
3505 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3506
3507         * expr.c (fixup_args_size_notes): Check that any existing
3508         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3509         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3510         (emit_single_push_insn): ...here.
3511
3512 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3513
3514         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3515         (const_vector_encoded_nelts): New function.
3516         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3517         (const_vector_int_elt, const_vector_elt): Declare.
3518         * emit-rtl.c (const_vector_int_elt_1): New function.
3519         (const_vector_elt): Likewise.
3520         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3521         of CONST_VECTOR_ELT.
3522
3523 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3524
3525         * expr.c: Include rtx-vector-builder.h.
3526         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3527         directly on the tree encoding.
3528         (const_vector_from_tree): Likewise.
3529         * optabs.c: Include rtx-vector-builder.h.
3530         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3531         sequence of "u" values.
3532         * vec-perm-indices.c: Include rtx-vector-builder.h.
3533         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3534         directly on the vec_perm_indices encoding.
3535
3536 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3537
3538         * doc/rtl.texi (const_vector): Describe new encoding scheme.
3539         * Makefile.in (OBJS): Add rtx-vector-builder.o.
3540         * rtx-vector-builder.h: New file.
3541         * rtx-vector-builder.c: Likewise.
3542         * rtl.h (rtx_def::u2): Add a const_vector field.
3543         (CONST_VECTOR_NPATTERNS): New macro.
3544         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3545         (CONST_VECTOR_DUPLICATE_P): Likewise.
3546         (CONST_VECTOR_STEPPED_P): Likewise.
3547         (CONST_VECTOR_ENCODED_ELT): Likewise.
3548         (const_vec_duplicate_p): Check for a duplicated vector encoding.
3549         (unwrap_const_vec_duplicate): Likewise.
3550         (const_vec_series_p): Check for a non-duplicated vector encoding.
3551         Say that the function only returns true for integer vectors.
3552         * emit-rtl.c: Include rtx-vector-builder.h.
3553         (gen_const_vec_duplicate_1): Delete.
3554         (gen_const_vector): Call gen_const_vec_duplicate instead of
3555         gen_const_vec_duplicate_1.
3556         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3557         (gen_const_vec_duplicate): Use rtx_vector_builder.
3558         (gen_const_vec_series): Likewise.
3559         (gen_rtx_CONST_VECTOR): Likewise.
3560         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3561         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3562         Build a new vector rather than modifying a CONST_VECTOR in-place.
3563         (handle_special_swappables): Update call accordingly.
3564         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3565         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3566         Build a new vector rather than modifying a CONST_VECTOR in-place.
3567         (handle_special_swappables): Update call accordingly.
3568
3569 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3570
3571         * simplify-rtx.c (simplify_const_binary_operation): Use
3572         CONST_VECTOR_ELT instead of XVECEXP.
3573
3574 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3575
3576         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3577         the selector elements to be different from the data elements
3578         if the selector is a VECTOR_CST.
3579         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3580         ssizetype for the selector.
3581
3582 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3583
3584         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3585         before testing each element individually.
3586         * tree-vect-generic.c (lower_vec_perm): Likewise.
3587
3588 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3589
3590         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3591         * selftest-run-tests.c (selftest::run_tests): Call it.
3592         * vector-builder.h (vector_builder::operator ==): New function.
3593         (vector_builder::operator !=): Likewise.
3594         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3595         (vec_perm_indices::all_from_input_p): New function.
3596         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3597         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3598         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3599         instead of reading the VECTOR_CST directly.  Detect whether both
3600         vector inputs are the same before constructing the vec_perm_indices,
3601         and update the number of inputs argument accordingly.  Use the
3602         utility functions added above.  Only construct sel2 if we need to.
3603
3604 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3605
3606         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3607         the broadcast of the low byte.
3608         (expand_mult_highpart): Use an explicit encoding for the permutes.
3609         * optabs-query.c (can_mult_highpart_p): Likewise.
3610         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3611         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3612         (vectorizable_bswap): Likewise.
3613         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3614         explicit encoding for the power-of-2 permutes.
3615         (vect_permute_store_chain): Likewise.
3616         (vect_grouped_load_supported): Likewise.
3617         (vect_permute_load_chain): Likewise.
3618
3619 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3620
3621         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3622         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3623         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3624         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3625         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3626         (vect_gen_perm_mask_any): Likewise.
3627
3628 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3629
3630         * int-vector-builder.h: New file.
3631         * vec-perm-indices.h: Include int-vector-builder.h.
3632         (vec_perm_indices): Redefine as an int_vector_builder.
3633         (auto_vec_perm_indices): Delete.
3634         (vec_perm_builder): Redefine as a stand-alone class.
3635         (vec_perm_indices::vec_perm_indices): New function.
3636         (vec_perm_indices::clamp): Likewise.
3637         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3638         (vec_perm_indices::new_vector): New function.
3639         (vec_perm_indices::new_expanded_vector): Update for new
3640         vec_perm_indices class.
3641         (vec_perm_indices::rotate_inputs): New function.
3642         (vec_perm_indices::all_in_range_p): Operate directly on the
3643         encoded form, without computing elided elements.
3644         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
3645         encoding.  Update for new vec_perm_indices class.
3646         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
3647         the given vec_perm_builder.
3648         (expand_vec_perm_var): Update vec_perm_builder constructor.
3649         (expand_mult_highpart): Use vec_perm_builder instead of
3650         auto_vec_perm_indices.
3651         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
3652         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
3653         or double series encoding as appropriate.
3654         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
3655         vec_perm_indices instead of auto_vec_perm_indices.
3656         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3657         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3658         (vect_permute_store_chain): Likewise.
3659         (vect_grouped_load_supported): Likewise.
3660         (vect_permute_load_chain): Likewise.
3661         (vect_shift_permute_load_chain): Likewise.
3662         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3663         (vect_transform_slp_perm_load): Likewise.
3664         (vect_schedule_slp_instance): Likewise.
3665         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3666         (vectorizable_mask_load_store): Likewise.
3667         (vectorizable_bswap): Likewise.
3668         (vectorizable_store): Likewise.
3669         (vectorizable_load): Likewise.
3670         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
3671         vec_perm_indices instead of auto_vec_perm_indices.  Use
3672         tree_to_vec_perm_builder to read the vector from a tree.
3673         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
3674         vec_perm_builder instead of a vec_perm_indices.
3675         (have_whole_vector_shift): Use vec_perm_builder and
3676         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
3677         truncation to calc_vec_perm_mask_for_shift.
3678         (vect_create_epilog_for_reduction): Likewise.
3679         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
3680         from auto_vec_perm_indices to vec_perm_indices.
3681         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3682         instead of changing individual elements.
3683         (aarch64_vectorize_vec_perm_const): Use new_vector to install
3684         the vector in d.perm.
3685         * config/arm/arm.c (expand_vec_perm_d::perm): Change
3686         from auto_vec_perm_indices to vec_perm_indices.
3687         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3688         instead of changing individual elements.
3689         (arm_vectorize_vec_perm_const): Use new_vector to install
3690         the vector in d.perm.
3691         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
3692         Update vec_perm_builder constructor.
3693         (rs6000_expand_interleave): Likewise.
3694         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
3695         (rs6000_expand_interleave): Likewise.
3696
3697 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3698
3699         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
3700         to qimode could truncate the indices.
3701         * optabs.c (expand_vec_perm_var): Likewise.
3702
3703 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3704
3705         * Makefile.in (OBJS): Add vec-perm-indices.o.
3706         * vec-perm-indices.h: New file.
3707         * vec-perm-indices.c: Likewise.
3708         * target.h (vec_perm_indices): Replace with a forward class
3709         declaration.
3710         (auto_vec_perm_indices): Move to vec-perm-indices.h.
3711         * optabs.h: Include vec-perm-indices.h.
3712         (expand_vec_perm): Delete.
3713         (selector_fits_mode_p, expand_vec_perm_var): Declare.
3714         (expand_vec_perm_const): Declare.
3715         * target.def (vec_perm_const_ok): Replace with...
3716         (vec_perm_const): ...this new hook.
3717         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
3718         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
3719         * doc/tm.texi: Regenerate.
3720         * optabs.def (vec_perm_const): Delete.
3721         * doc/md.texi (vec_perm_const): Likewise.
3722         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
3723         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
3724         expand_vec_perm for constant permutation vectors.  Assert that
3725         the mode of variable permutation vectors is the integer equivalent
3726         of the mode that is being permuted.
3727         * optabs-query.h (selector_fits_mode_p): Declare.
3728         * optabs-query.c: Include vec-perm-indices.h.
3729         (selector_fits_mode_p): New function.
3730         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
3731         is defined, instead of checking whether the vec_perm_const_optab
3732         exists.  Use targetm.vectorize.vec_perm_const instead of
3733         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
3734         fit in the vector mode before using a variable permute.
3735         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
3736         vec_perm_indices instead of an rtx.
3737         (expand_vec_perm): Replace with...
3738         (expand_vec_perm_const): ...this new function.  Take the selector
3739         as a vec_perm_indices rather than an rtx.  Also take the mode of
3740         the selector.  Update call to shift_amt_for_vec_perm_mask.
3741         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
3742         Use vec_perm_indices::new_expanded_vector to expand the original
3743         selector into bytes.  Check whether the indices fit in the vector
3744         mode before using a variable permute.
3745         (expand_vec_perm_var): Make global.
3746         (expand_mult_highpart): Use expand_vec_perm_const.
3747         * fold-const.c: Includes vec-perm-indices.h.
3748         * tree-ssa-forwprop.c: Likewise.
3749         * tree-vect-data-refs.c: Likewise.
3750         * tree-vect-generic.c: Likewise.
3751         * tree-vect-loop.c: Likewise.
3752         * tree-vect-slp.c: Likewise.
3753         * tree-vect-stmts.c: Likewise.
3754         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
3755         Delete.
3756         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
3757         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
3758         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
3759         (aarch64_vectorize_vec_perm_const): ...this new function.
3760         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3761         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3762         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
3763         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
3764         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3765         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3766         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
3767         into...
3768         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
3769         check for NEON modes.
3770         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
3771         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
3772         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
3773         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
3774         into...
3775         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
3776         the old VEC_PERM_CONST conditions.
3777         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
3778         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
3779         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
3780         (ia64_vectorize_vec_perm_const_ok): Merge into...
3781         (ia64_vectorize_vec_perm_const): ...this new function.
3782         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
3783         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
3784         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
3785         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
3786         * config/mips/mips.c (mips_expand_vec_perm_const)
3787         (mips_vectorize_vec_perm_const_ok): Merge into...
3788         (mips_vectorize_vec_perm_const): ...this new function.
3789         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
3790         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
3791         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
3792         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
3793         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
3794         (rs6000_expand_vec_perm_const): Delete.
3795         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
3796         Delete.
3797         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3798         (altivec_expand_vec_perm_const_le): Take each operand individually.
3799         Operate on constant selectors rather than rtxes.
3800         (altivec_expand_vec_perm_const): Likewise.  Update call to
3801         altivec_expand_vec_perm_const_le.
3802         (rs6000_expand_vec_perm_const): Delete.
3803         (rs6000_vectorize_vec_perm_const_ok): Delete.
3804         (rs6000_vectorize_vec_perm_const): New function.
3805         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3806         an element count and rtx array.
3807         (rs6000_expand_extract_even): Update call accordingly.
3808         (rs6000_expand_interleave): Likewise.
3809         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
3810         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
3811         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
3812         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
3813         (rs6000_expand_vec_perm_const): Delete.
3814         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3815         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3816         (altivec_expand_vec_perm_const_le): Take each operand individually.
3817         Operate on constant selectors rather than rtxes.
3818         (altivec_expand_vec_perm_const): Likewise.  Update call to
3819         altivec_expand_vec_perm_const_le.
3820         (rs6000_expand_vec_perm_const): Delete.
3821         (rs6000_vectorize_vec_perm_const_ok): Delete.
3822         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
3823         reference to the SPE evmerge intructions.
3824         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3825         an element count and rtx array.
3826         (rs6000_expand_extract_even): Update call accordingly.
3827         (rs6000_expand_interleave): Likewise.
3828         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
3829         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
3830         new function.
3831         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3832
3833 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3834
3835         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
3836         vector mode and that that mode matches the mode of the data
3837         being permuted.
3838         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
3839         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
3840         directly using expand_vec_perm_1 when forcing selectors into
3841         registers.
3842         (expand_vec_perm_var): New function, split out from expand_vec_perm.
3843
3844 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3845
3846         * optabs-query.h (can_vec_perm_p): Delete.
3847         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
3848         * optabs-query.c (can_vec_perm_p): Split into...
3849         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
3850         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
3851         particular selector is valid.
3852         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3853         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3854         (vect_grouped_load_supported): Likewise.
3855         (vect_shift_permute_load_chain): Likewise.
3856         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3857         (vect_transform_slp_perm_load): Likewise.
3858         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3859         (vectorizable_bswap): Likewise.
3860         (vect_gen_perm_mask_checked): Likewise.
3861         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
3862         implementations of variable permutation vectors into account
3863         when deciding which selector to use.
3864         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
3865         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
3866         with a false third argument.
3867         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
3868         to test whether the constant selector is valid and can_vec_perm_var_p
3869         to test whether a variable selector is valid.
3870
3871 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3872
3873         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
3874         * optabs-query.c (can_vec_perm_p): Likewise.
3875         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
3876         instead of vec_perm_indices.
3877         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
3878         (vect_gen_perm_mask_checked): Likewise,
3879         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
3880         (vect_gen_perm_mask_checked): Likewise,
3881
3882 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3883
3884         * optabs-query.h (qimode_for_vec_perm): Declare.
3885         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
3886         (qimode_for_vec_perm): ...this new function.
3887         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
3888
3889 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3890
3891         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
3892         does not have a conditional at the top.
3893
3894 2018-01-02  Richard Biener  <rguenther@suse.de>
3895
3896         * ipa-inline.c (big_speedup_p): Fix expression.
3897
3898 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
3899
3900         PR target/81616
3901         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
3902         for generic 4->6.
3903
3904 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
3905
3906         PR target/81616
3907         Generic tuning.
3908         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
3909         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
3910         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
3911         cond_taken_branch_cost 3->4.
3912
3913 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
3914
3915         PR tree-optimization/83581
3916         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
3917         TODO_cleanup_cfg if any changes have been made.
3918
3919         PR middle-end/83608
3920         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
3921         convert_modes if target mode has the right side, but different mode
3922         class.
3923
3924         PR middle-end/83609
3925         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
3926         last argument when extracting from CONCAT.  If either from_real or
3927         from_imag is NULL, use expansion through memory.  If result is not
3928         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
3929         the parts directly to inner mode, if even that fails, use expansion
3930         through memory.
3931
3932         PR middle-end/83623
3933         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
3934         check for bswap in mode rather than HImode and use that in expand_unop
3935         too.
3936 \f
3937 Copyright (C) 2018 Free Software Foundation, Inc.
3938
3939 Copying and distribution of this file, with or without modification,
3940 are permitted in any medium without royalty provided the copyright
3941 notice and this notice are preserved.