1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl
[GR_MAX
];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
108 REAL_VALUE_TYPE dconst0
;
109 REAL_VALUE_TYPE dconst1
;
110 REAL_VALUE_TYPE dconst2
;
111 REAL_VALUE_TYPE dconst3
;
112 REAL_VALUE_TYPE dconst10
;
113 REAL_VALUE_TYPE dconstm1
;
114 REAL_VALUE_TYPE dconstm2
;
115 REAL_VALUE_TYPE dconsthalf
;
116 REAL_VALUE_TYPE dconstthird
;
117 REAL_VALUE_TYPE dconstpi
;
118 REAL_VALUE_TYPE dconste
;
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
157 htab_t const_int_htab
;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
161 htab_t mem_attrs_htab
;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
165 htab_t reg_attrs_htab
;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
169 htab_t const_double_htab
;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_location (cfun->emit->x_last_location)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx
make_jump_insn_raw (rtx
);
178 static rtx
make_call_insn_raw (rtx
);
179 static rtx
find_line_note (rtx
);
180 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
181 static void unshare_all_decls (tree
);
182 static void reset_used_decls (tree
);
183 static void mark_label_nuses (rtx
);
184 static hashval_t
const_int_htab_hash (const void *);
185 static int const_int_htab_eq (const void *, const void *);
186 static hashval_t
const_double_htab_hash (const void *);
187 static int const_double_htab_eq (const void *, const void *);
188 static rtx
lookup_const_double (rtx
);
189 static hashval_t
mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
193 static hashval_t
reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs
*get_reg_attrs (tree
, int);
196 static tree
component_ref_for_mem_expr (tree
);
197 static rtx
gen_const_vector (enum machine_mode
, int);
198 static rtx
gen_complex_constant_part (enum machine_mode
, rtx
, int);
199 static void copy_rtx_if_shared_1 (rtx
*orig
);
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability
= -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (const void *x
)
210 return (hashval_t
) INTVAL ((rtx
) x
);
213 /* Returns nonzero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (const void *x
, const void *y
)
220 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
223 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
225 const_double_htab_hash (const void *x
)
230 if (GET_MODE (value
) == VOIDmode
)
231 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
234 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
235 /* MODE is used in the comparison, so it should be in the hash. */
236 h
^= GET_MODE (value
);
241 /* Returns nonzero if the value represented by X (really a ...)
242 is the same as that represented by Y (really a ...) */
244 const_double_htab_eq (const void *x
, const void *y
)
246 rtx a
= (rtx
)x
, b
= (rtx
)y
;
248 if (GET_MODE (a
) != GET_MODE (b
))
250 if (GET_MODE (a
) == VOIDmode
)
251 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
252 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
254 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
255 CONST_DOUBLE_REAL_VALUE (b
));
258 /* Returns a hash code for X (which is a really a mem_attrs *). */
261 mem_attrs_htab_hash (const void *x
)
263 mem_attrs
*p
= (mem_attrs
*) x
;
265 return (p
->alias
^ (p
->align
* 1000)
266 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
267 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
271 /* Returns nonzero if the value represented by X (which is really a
272 mem_attrs *) is the same as that given by Y (which is also really a
276 mem_attrs_htab_eq (const void *x
, const void *y
)
278 mem_attrs
*p
= (mem_attrs
*) x
;
279 mem_attrs
*q
= (mem_attrs
*) y
;
281 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
282 && p
->size
== q
->size
&& p
->align
== q
->align
);
285 /* Allocate a new mem_attrs structure and insert it into the hash table if
286 one identical to it is not already in the table. We are doing this for
290 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
291 unsigned int align
, enum machine_mode mode
)
296 /* If everything is the default, we can just return zero.
297 This must match what the corresponding MEM_* macros return when the
298 field is not present. */
299 if (alias
== 0 && expr
== 0 && offset
== 0
301 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
302 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
303 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
308 attrs
.offset
= offset
;
312 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
315 *slot
= ggc_alloc (sizeof (mem_attrs
));
316 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x
)
327 reg_attrs
*p
= (reg_attrs
*) x
;
329 return ((p
->offset
* 1000) ^ (long) p
->decl
);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x
, const void *y
)
339 reg_attrs
*p
= (reg_attrs
*) x
;
340 reg_attrs
*q
= (reg_attrs
*) y
;
342 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl
, int offset
)
354 /* If everything is the default, we can just return zero. */
355 if (decl
== 0 && offset
== 0)
359 attrs
.offset
= offset
;
361 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
364 *slot
= ggc_alloc (sizeof (reg_attrs
));
365 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
371 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
372 don't attempt to share with the various global pieces of rtl (such as
373 frame_pointer_rtx). */
376 gen_raw_REG (enum machine_mode mode
, int regno
)
378 rtx x
= gen_rtx_raw_REG (mode
, regno
);
379 ORIGINAL_REGNO (x
) = regno
;
383 /* There are some RTL codes that require special attention; the generation
384 functions do the raw handling. If you add to this list, modify
385 special_rtx in gengenrtl.c as well. */
388 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
392 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
393 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
395 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
396 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
397 return const_true_rtx
;
400 /* Look up the CONST_INT in the hash table. */
401 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
402 (hashval_t
) arg
, INSERT
);
404 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
410 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
412 return GEN_INT (trunc_int_for_mode (c
, mode
));
415 /* CONST_DOUBLEs might be created from pairs of integers, or from
416 REAL_VALUE_TYPEs. Also, their length is known only at run time,
417 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
419 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
420 hash table. If so, return its counterpart; otherwise add it
421 to the hash table and return it. */
423 lookup_const_double (rtx real
)
425 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
432 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
433 VALUE in mode MODE. */
435 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
437 rtx real
= rtx_alloc (CONST_DOUBLE
);
438 PUT_MODE (real
, mode
);
440 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
442 return lookup_const_double (real
);
445 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
446 of ints: I0 is the low-order word and I1 is the high-order word.
447 Do not use this routine for non-integer modes; convert to
448 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
451 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
456 if (mode
!= VOIDmode
)
460 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
461 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
462 /* We can get a 0 for an error mark. */
463 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
464 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
466 /* We clear out all bits that don't belong in MODE, unless they and
467 our sign bit are all one. So we get either a reasonable negative
468 value or a reasonable unsigned value for this mode. */
469 width
= GET_MODE_BITSIZE (mode
);
470 if (width
< HOST_BITS_PER_WIDE_INT
471 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
472 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
473 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
474 else if (width
== HOST_BITS_PER_WIDE_INT
475 && ! (i1
== ~0 && i0
< 0))
478 /* We should be able to represent this value as a constant. */
479 gcc_assert (width
<= 2 * HOST_BITS_PER_WIDE_INT
);
481 /* If this would be an entire word for the target, but is not for
482 the host, then sign-extend on the host so that the number will
483 look the same way on the host that it would on the target.
485 For example, when building a 64 bit alpha hosted 32 bit sparc
486 targeted compiler, then we want the 32 bit unsigned value -1 to be
487 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
488 The latter confuses the sparc backend. */
490 if (width
< HOST_BITS_PER_WIDE_INT
491 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
492 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
494 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
497 ??? Strictly speaking, this is wrong if we create a CONST_INT for
498 a large unsigned constant with the size of MODE being
499 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
500 in a wider mode. In that case we will mis-interpret it as a
503 Unfortunately, the only alternative is to make a CONST_DOUBLE for
504 any constant in any mode if it is an unsigned constant larger
505 than the maximum signed integer in an int on the host. However,
506 doing this will break everyone that always expects to see a
507 CONST_INT for SImode and smaller.
509 We have always been making CONST_INTs in this case, so nothing
510 new is being broken. */
512 if (width
<= HOST_BITS_PER_WIDE_INT
)
513 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
516 /* If this integer fits in one word, return a CONST_INT. */
517 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
520 /* We use VOIDmode for integers. */
521 value
= rtx_alloc (CONST_DOUBLE
);
522 PUT_MODE (value
, VOIDmode
);
524 CONST_DOUBLE_LOW (value
) = i0
;
525 CONST_DOUBLE_HIGH (value
) = i1
;
527 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
528 XWINT (value
, i
) = 0;
530 return lookup_const_double (value
);
534 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
536 /* In case the MD file explicitly references the frame pointer, have
537 all such references point to the same frame pointer. This is
538 used during frame pointer elimination to distinguish the explicit
539 references to these registers from pseudos that happened to be
542 If we have eliminated the frame pointer or arg pointer, we will
543 be using it as a normal register, for example as a spill
544 register. In such cases, we might be accessing it in a mode that
545 is not Pmode and therefore cannot use the pre-allocated rtx.
547 Also don't do this when we are making new REGs in reload, since
548 we don't want to get confused with the real pointers. */
550 if (mode
== Pmode
&& !reload_in_progress
)
552 if (regno
== FRAME_POINTER_REGNUM
553 && (!reload_completed
|| frame_pointer_needed
))
554 return frame_pointer_rtx
;
555 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
556 if (regno
== HARD_FRAME_POINTER_REGNUM
557 && (!reload_completed
|| frame_pointer_needed
))
558 return hard_frame_pointer_rtx
;
560 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
561 if (regno
== ARG_POINTER_REGNUM
)
562 return arg_pointer_rtx
;
564 #ifdef RETURN_ADDRESS_POINTER_REGNUM
565 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
566 return return_address_pointer_rtx
;
568 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
569 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
570 return pic_offset_table_rtx
;
571 if (regno
== STACK_POINTER_REGNUM
)
572 return stack_pointer_rtx
;
576 /* If the per-function register table has been set up, try to re-use
577 an existing entry in that table to avoid useless generation of RTL.
579 This code is disabled for now until we can fix the various backends
580 which depend on having non-shared hard registers in some cases. Long
581 term we want to re-enable this code as it can significantly cut down
582 on the amount of useless RTL that gets generated.
584 We'll also need to fix some code that runs after reload that wants to
585 set ORIGINAL_REGNO. */
590 && regno
< FIRST_PSEUDO_REGISTER
591 && reg_raw_mode
[regno
] == mode
)
592 return regno_reg_rtx
[regno
];
595 return gen_raw_REG (mode
, regno
);
599 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
601 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
603 /* This field is not cleared by the mere allocation of the rtx, so
610 /* Generate a memory referring to non-trapping constant memory. */
613 gen_const_mem (enum machine_mode mode
, rtx addr
)
615 rtx mem
= gen_rtx_MEM (mode
, addr
);
616 MEM_READONLY_P (mem
) = 1;
617 MEM_NOTRAP_P (mem
) = 1;
622 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
624 /* This is the most common failure type.
625 Catch it early so we can see who does it. */
626 gcc_assert (!(offset
% GET_MODE_SIZE (mode
)));
628 /* This check isn't usable right now because combine will
629 throw arbitrary crap like a CALL into a SUBREG in
630 gen_lowpart_for_combine so we must just eat it. */
632 /* Check for this too. */
633 gcc_assert (offset
< GET_MODE_SIZE (GET_MODE (reg
)));
635 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
638 /* Generate a SUBREG representing the least-significant part of REG if MODE
639 is smaller than mode of REG, otherwise paradoxical SUBREG. */
642 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
644 enum machine_mode inmode
;
646 inmode
= GET_MODE (reg
);
647 if (inmode
== VOIDmode
)
649 return gen_rtx_SUBREG (mode
, reg
,
650 subreg_lowpart_offset (mode
, inmode
));
653 /* gen_rtvec (n, [rt1, ..., rtn])
655 ** This routine creates an rtvec and stores within it the
656 ** pointers to rtx's which are its arguments.
661 gen_rtvec (int n
, ...)
670 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
672 vector
= alloca (n
* sizeof (rtx
));
674 for (i
= 0; i
< n
; i
++)
675 vector
[i
] = va_arg (p
, rtx
);
677 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
681 return gen_rtvec_v (save_n
, vector
);
685 gen_rtvec_v (int n
, rtx
*argp
)
691 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
693 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
695 for (i
= 0; i
< n
; i
++)
696 rt_val
->elem
[i
] = *argp
++;
701 /* Generate a REG rtx for a new pseudo register of mode MODE.
702 This pseudo is assigned the next sequential register number. */
705 gen_reg_rtx (enum machine_mode mode
)
707 struct function
*f
= cfun
;
710 /* Don't let anything called after initial flow analysis create new
712 gcc_assert (!no_new_pseudos
);
714 if (generating_concat_p
715 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
716 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
718 /* For complex modes, don't make a single pseudo.
719 Instead, make a CONCAT of two pseudos.
720 This allows noncontiguous allocation of the real and imaginary parts,
721 which makes much better code. Besides, allocating DCmode
722 pseudos overstrains reload on some machines like the 386. */
723 rtx realpart
, imagpart
;
724 enum machine_mode partmode
= GET_MODE_INNER (mode
);
726 realpart
= gen_reg_rtx (partmode
);
727 imagpart
= gen_reg_rtx (partmode
);
728 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
731 /* Make sure regno_pointer_align, and regno_reg_rtx are large
732 enough to have an element for this pseudo reg number. */
734 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
736 int old_size
= f
->emit
->regno_pointer_align_length
;
740 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
741 memset (new + old_size
, 0, old_size
);
742 f
->emit
->regno_pointer_align
= (unsigned char *) new;
744 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
745 old_size
* 2 * sizeof (rtx
));
746 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
747 regno_reg_rtx
= new1
;
749 f
->emit
->regno_pointer_align_length
= old_size
* 2;
752 val
= gen_raw_REG (mode
, reg_rtx_no
);
753 regno_reg_rtx
[reg_rtx_no
++] = val
;
757 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
758 Do the big endian correction if needed. */
761 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
763 rtx
new = gen_rtx_REG (mode
, regno
);
765 HOST_WIDE_INT var_size
;
767 /* PR middle-end/14084
768 The problem appears when a variable is stored in a larger register
769 and later it is used in the original mode or some mode in between
770 or some part of variable is accessed.
772 On little endian machines there is no problem because
773 the REG_OFFSET of the start of the variable is the same when
774 accessed in any mode (it is 0).
776 However, this is not true on big endian machines.
777 The offset of the start of the variable is different when accessed
779 When we are taking a part of the REG we have to change the OFFSET
780 from offset WRT size of mode of REG to offset WRT size of variable.
782 If we would not do the big endian correction the resulting REG_OFFSET
783 would be larger than the size of the DECL.
785 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
787 REG.mode MODE DECL size old offset new offset description
788 DI SI 4 4 0 int32 in SImode
789 DI SI 1 4 0 char in SImode
790 DI QI 1 7 0 char in QImode
791 DI QI 4 5 1 1st element in QImode
793 DI HI 4 6 2 1st element in HImode
796 If the size of DECL is equal or greater than the size of REG
797 we can't do this correction because the register holds the
798 whole variable or a part of the variable and thus the REG_OFFSET
799 is already correct. */
801 decl
= REG_EXPR (reg
);
802 if ((BYTES_BIG_ENDIAN
|| WORDS_BIG_ENDIAN
)
805 && GET_MODE_SIZE (GET_MODE (reg
)) > GET_MODE_SIZE (mode
)
806 && ((var_size
= int_size_in_bytes (TREE_TYPE (decl
))) > 0
807 && var_size
< GET_MODE_SIZE (GET_MODE (reg
))))
811 /* Convert machine endian to little endian WRT size of mode of REG. */
812 if (WORDS_BIG_ENDIAN
)
813 offset_le
= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
814 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
816 offset_le
= (offset
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
818 if (BYTES_BIG_ENDIAN
)
819 offset_le
+= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
822 offset_le
+= offset
% UNITS_PER_WORD
;
824 if (offset_le
>= var_size
)
826 /* MODE is wider than the variable so the new reg will cover
827 the whole variable so the resulting OFFSET should be 0. */
832 /* Convert little endian to machine endian WRT size of variable. */
833 if (WORDS_BIG_ENDIAN
)
834 offset
= ((var_size
- 1 - offset_le
)
835 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
837 offset
= (offset_le
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
839 if (BYTES_BIG_ENDIAN
)
840 offset
+= ((var_size
- 1 - offset_le
)
843 offset
+= offset_le
% UNITS_PER_WORD
;
847 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
848 REG_OFFSET (reg
) + offset
);
852 /* Set the decl for MEM to DECL. */
855 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
857 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
859 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
862 /* Set the register attributes for registers contained in PARM_RTX.
863 Use needed values from memory attributes of MEM. */
866 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
868 if (REG_P (parm_rtx
))
869 set_reg_attrs_from_mem (parm_rtx
, mem
);
870 else if (GET_CODE (parm_rtx
) == PARALLEL
)
872 /* Check for a NULL entry in the first slot, used to indicate that the
873 parameter goes both on the stack and in registers. */
874 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
875 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
877 rtx x
= XVECEXP (parm_rtx
, 0, i
);
878 if (REG_P (XEXP (x
, 0)))
879 REG_ATTRS (XEXP (x
, 0))
880 = get_reg_attrs (MEM_EXPR (mem
),
881 INTVAL (XEXP (x
, 1)));
886 /* Assign the RTX X to declaration T. */
888 set_decl_rtl (tree t
, rtx x
)
890 DECL_CHECK (t
)->decl
.rtl
= x
;
894 /* For register, we maintain the reverse information too. */
896 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
897 else if (GET_CODE (x
) == SUBREG
)
898 REG_ATTRS (SUBREG_REG (x
))
899 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
900 if (GET_CODE (x
) == CONCAT
)
902 if (REG_P (XEXP (x
, 0)))
903 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
904 if (REG_P (XEXP (x
, 1)))
905 REG_ATTRS (XEXP (x
, 1))
906 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
908 if (GET_CODE (x
) == PARALLEL
)
911 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
913 rtx y
= XVECEXP (x
, 0, i
);
914 if (REG_P (XEXP (y
, 0)))
915 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
920 /* Assign the RTX X to parameter declaration T. */
922 set_decl_incoming_rtl (tree t
, rtx x
)
924 DECL_INCOMING_RTL (t
) = x
;
928 /* For register, we maintain the reverse information too. */
930 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
931 else if (GET_CODE (x
) == SUBREG
)
932 REG_ATTRS (SUBREG_REG (x
))
933 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
934 if (GET_CODE (x
) == CONCAT
)
936 if (REG_P (XEXP (x
, 0)))
937 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
938 if (REG_P (XEXP (x
, 1)))
939 REG_ATTRS (XEXP (x
, 1))
940 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
942 if (GET_CODE (x
) == PARALLEL
)
946 /* Check for a NULL entry, used to indicate that the parameter goes
947 both on the stack and in registers. */
948 if (XEXP (XVECEXP (x
, 0, 0), 0))
953 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
955 rtx y
= XVECEXP (x
, 0, i
);
956 if (REG_P (XEXP (y
, 0)))
957 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
962 /* Identify REG (which may be a CONCAT) as a user register. */
965 mark_user_reg (rtx reg
)
967 if (GET_CODE (reg
) == CONCAT
)
969 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
970 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
974 gcc_assert (REG_P (reg
));
975 REG_USERVAR_P (reg
) = 1;
979 /* Identify REG as a probable pointer register and show its alignment
980 as ALIGN, if nonzero. */
983 mark_reg_pointer (rtx reg
, int align
)
985 if (! REG_POINTER (reg
))
987 REG_POINTER (reg
) = 1;
990 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
992 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
993 /* We can no-longer be sure just how aligned this pointer is. */
994 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
997 /* Return 1 plus largest pseudo reg number used in the current function. */
1005 /* Return 1 + the largest label number used so far in the current function. */
1008 max_label_num (void)
1010 if (last_label_num
&& label_num
== base_label_num
)
1011 return last_label_num
;
1015 /* Return first label number used in this function (if any were used). */
1018 get_first_label_num (void)
1020 return first_label_num
;
1023 /* If the rtx for label was created during the expansion of a nested
1024 function, then first_label_num won't include this label number.
1025 Fix this now so that array indicies work later. */
1028 maybe_set_first_label_num (rtx x
)
1030 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1031 first_label_num
= CODE_LABEL_NUMBER (x
);
1034 /* Return the final regno of X, which is a SUBREG of a hard
1037 subreg_hard_regno (rtx x
, int check_mode
)
1039 enum machine_mode mode
= GET_MODE (x
);
1040 unsigned int byte_offset
, base_regno
, final_regno
;
1041 rtx reg
= SUBREG_REG (x
);
1043 /* This is where we attempt to catch illegal subregs
1044 created by the compiler. */
1045 gcc_assert (GET_CODE (x
) == SUBREG
&& REG_P (reg
));
1046 base_regno
= REGNO (reg
);
1047 gcc_assert (base_regno
< FIRST_PSEUDO_REGISTER
);
1048 gcc_assert (!check_mode
|| HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)));
1049 #ifdef ENABLE_CHECKING
1050 gcc_assert (subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
1051 SUBREG_BYTE (x
), mode
));
1053 /* Catch non-congruent offsets too. */
1054 byte_offset
= SUBREG_BYTE (x
);
1055 gcc_assert (!(byte_offset
% GET_MODE_SIZE (mode
)));
1057 final_regno
= subreg_regno (x
);
1062 /* Return a value representing some low-order bits of X, where the number
1063 of low-order bits is given by MODE. Note that no conversion is done
1064 between floating-point and fixed-point values, rather, the bit
1065 representation is returned.
1067 This function handles the cases in common between gen_lowpart, below,
1068 and two variants in cse.c and combine.c. These are the cases that can
1069 be safely handled at all points in the compilation.
1071 If this is not a case we can handle, return 0. */
1074 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1076 int msize
= GET_MODE_SIZE (mode
);
1079 enum machine_mode innermode
;
1081 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1082 so we have to make one up. Yuk. */
1083 innermode
= GET_MODE (x
);
1084 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
1085 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1086 else if (innermode
== VOIDmode
)
1087 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1089 xsize
= GET_MODE_SIZE (innermode
);
1091 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1093 if (innermode
== mode
)
1096 /* MODE must occupy no more words than the mode of X. */
1097 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1098 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1101 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1102 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
1105 offset
= subreg_lowpart_offset (mode
, innermode
);
1107 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1108 && (GET_MODE_CLASS (mode
) == MODE_INT
1109 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1111 /* If we are getting the low-order part of something that has been
1112 sign- or zero-extended, we can either just use the object being
1113 extended or make a narrower extension. If we want an even smaller
1114 piece than the size of the object being extended, call ourselves
1117 This case is used mostly by combine and cse. */
1119 if (GET_MODE (XEXP (x
, 0)) == mode
)
1121 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1122 return gen_lowpart_common (mode
, XEXP (x
, 0));
1123 else if (msize
< xsize
)
1124 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1126 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1127 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1128 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1129 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1131 /* Otherwise, we can't do this. */
1135 /* Return the constant real or imaginary part (which has mode MODE)
1136 of a complex value X. The IMAGPART_P argument determines whether
1137 the real or complex component should be returned. This function
1138 returns NULL_RTX if the component isn't a constant. */
1141 gen_complex_constant_part (enum machine_mode mode
, rtx x
, int imagpart_p
)
1146 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1148 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1149 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1151 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1152 if (TREE_CODE (part
) == REAL_CST
1153 || TREE_CODE (part
) == INTEGER_CST
)
1154 return expand_expr (part
, NULL_RTX
, mode
, 0);
1160 /* Return the real part (which has mode MODE) of a complex value X.
1161 This always comes at the low address in memory. */
1164 gen_realpart (enum machine_mode mode
, rtx x
)
1168 /* Handle complex constants. */
1169 part
= gen_complex_constant_part (mode
, x
, 0);
1170 if (part
!= NULL_RTX
)
1173 if (WORDS_BIG_ENDIAN
1174 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1176 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1178 ("can't access real part of complex value in hard register");
1179 else if (WORDS_BIG_ENDIAN
)
1180 return gen_highpart (mode
, x
);
1182 return gen_lowpart (mode
, x
);
1185 /* Return the imaginary part (which has mode MODE) of a complex value X.
1186 This always comes at the high address in memory. */
1189 gen_imagpart (enum machine_mode mode
, rtx x
)
1193 /* Handle complex constants. */
1194 part
= gen_complex_constant_part (mode
, x
, 1);
1195 if (part
!= NULL_RTX
)
1198 if (WORDS_BIG_ENDIAN
)
1199 return gen_lowpart (mode
, x
);
1200 else if (! WORDS_BIG_ENDIAN
1201 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1203 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1205 ("can't access imaginary part of complex value in hard register");
1207 return gen_highpart (mode
, x
);
1211 gen_highpart (enum machine_mode mode
, rtx x
)
1213 unsigned int msize
= GET_MODE_SIZE (mode
);
1216 /* This case loses if X is a subreg. To catch bugs early,
1217 complain if an invalid MODE is used even in other cases. */
1218 gcc_assert (msize
<= UNITS_PER_WORD
1219 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1221 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1222 subreg_highpart_offset (mode
, GET_MODE (x
)));
1223 gcc_assert (result
);
1225 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1226 the target if we have a MEM. gen_highpart must return a valid operand,
1227 emitting code if necessary to do so. */
1230 result
= validize_mem (result
);
1231 gcc_assert (result
);
1237 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1238 be VOIDmode constant. */
1240 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1242 if (GET_MODE (exp
) != VOIDmode
)
1244 gcc_assert (GET_MODE (exp
) == innermode
);
1245 return gen_highpart (outermode
, exp
);
1247 return simplify_gen_subreg (outermode
, exp
, innermode
,
1248 subreg_highpart_offset (outermode
, innermode
));
1251 /* Return offset in bytes to get OUTERMODE low part
1252 of the value in mode INNERMODE stored in memory in target format. */
1255 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1257 unsigned int offset
= 0;
1258 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1262 if (WORDS_BIG_ENDIAN
)
1263 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1264 if (BYTES_BIG_ENDIAN
)
1265 offset
+= difference
% UNITS_PER_WORD
;
1271 /* Return offset in bytes to get OUTERMODE high part
1272 of the value in mode INNERMODE stored in memory in target format. */
1274 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1276 unsigned int offset
= 0;
1277 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1279 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1283 if (! WORDS_BIG_ENDIAN
)
1284 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1285 if (! BYTES_BIG_ENDIAN
)
1286 offset
+= difference
% UNITS_PER_WORD
;
1292 /* Return 1 iff X, assumed to be a SUBREG,
1293 refers to the least significant part of its containing reg.
1294 If X is not a SUBREG, always return 1 (it is its own low part!). */
1297 subreg_lowpart_p (rtx x
)
1299 if (GET_CODE (x
) != SUBREG
)
1301 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1304 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1305 == SUBREG_BYTE (x
));
1308 /* Return subword OFFSET of operand OP.
1309 The word number, OFFSET, is interpreted as the word number starting
1310 at the low-order address. OFFSET 0 is the low-order word if not
1311 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1313 If we cannot extract the required word, we return zero. Otherwise,
1314 an rtx corresponding to the requested word will be returned.
1316 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1317 reload has completed, a valid address will always be returned. After
1318 reload, if a valid address cannot be returned, we return zero.
1320 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1321 it is the responsibility of the caller.
1323 MODE is the mode of OP in case it is a CONST_INT.
1325 ??? This is still rather broken for some cases. The problem for the
1326 moment is that all callers of this thing provide no 'goal mode' to
1327 tell us to work with. This exists because all callers were written
1328 in a word based SUBREG world.
1329 Now use of this function can be deprecated by simplify_subreg in most
1334 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1336 if (mode
== VOIDmode
)
1337 mode
= GET_MODE (op
);
1339 gcc_assert (mode
!= VOIDmode
);
1341 /* If OP is narrower than a word, fail. */
1343 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1346 /* If we want a word outside OP, return zero. */
1348 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1351 /* Form a new MEM at the requested address. */
1354 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1356 if (! validate_address
)
1359 else if (reload_completed
)
1361 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1365 return replace_equiv_address (new, XEXP (new, 0));
1368 /* Rest can be handled by simplify_subreg. */
1369 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1372 /* Similar to `operand_subword', but never return 0. If we can't extract
1373 the required subword, put OP into a register and try again. If that fails,
1374 abort. We always validate the address in this case.
1376 MODE is the mode of OP, in case it is CONST_INT. */
1379 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1381 rtx result
= operand_subword (op
, offset
, 1, mode
);
1386 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1388 /* If this is a register which can not be accessed by words, copy it
1389 to a pseudo register. */
1391 op
= copy_to_reg (op
);
1393 op
= force_reg (mode
, op
);
1396 result
= operand_subword (op
, offset
, 1, mode
);
1397 gcc_assert (result
);
1402 /* Given a compare instruction, swap the operands.
1403 A test instruction is changed into a compare of 0 against the operand. */
1406 reverse_comparison (rtx insn
)
1408 rtx body
= PATTERN (insn
);
1411 if (GET_CODE (body
) == SET
)
1412 comp
= SET_SRC (body
);
1414 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1416 if (GET_CODE (comp
) == COMPARE
)
1418 rtx op0
= XEXP (comp
, 0);
1419 rtx op1
= XEXP (comp
, 1);
1420 XEXP (comp
, 0) = op1
;
1421 XEXP (comp
, 1) = op0
;
1425 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1426 CONST0_RTX (GET_MODE (comp
)), comp
);
1427 if (GET_CODE (body
) == SET
)
1428 SET_SRC (body
) = new;
1430 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1434 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1435 or (2) a component ref of something variable. Represent the later with
1436 a NULL expression. */
1439 component_ref_for_mem_expr (tree ref
)
1441 tree inner
= TREE_OPERAND (ref
, 0);
1443 if (TREE_CODE (inner
) == COMPONENT_REF
)
1444 inner
= component_ref_for_mem_expr (inner
);
1447 /* Now remove any conversions: they don't change what the underlying
1448 object is. Likewise for SAVE_EXPR. */
1449 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1450 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1451 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1452 || TREE_CODE (inner
) == SAVE_EXPR
)
1453 inner
= TREE_OPERAND (inner
, 0);
1455 if (! DECL_P (inner
))
1459 if (inner
== TREE_OPERAND (ref
, 0))
1462 return build3 (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1463 TREE_OPERAND (ref
, 1), NULL_TREE
);
1466 /* Returns 1 if both MEM_EXPR can be considered equal
1470 mem_expr_equal_p (tree expr1
, tree expr2
)
1475 if (! expr1
|| ! expr2
)
1478 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1481 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1483 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1484 TREE_OPERAND (expr2
, 0))
1485 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1486 TREE_OPERAND (expr2
, 1));
1488 if (TREE_CODE (expr1
) == INDIRECT_REF
1489 || TREE_CODE (expr1
) == ALIGN_INDIRECT_REF
1490 || TREE_CODE (expr1
) == MISALIGNED_INDIRECT_REF
)
1491 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1492 TREE_OPERAND (expr2
, 0));
1494 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1495 have been resolved here. */
1496 gcc_assert (DECL_P (expr1
));
1498 /* Decls with different pointers can't be equal. */
1502 /* Given REF, a MEM, and T, either the type of X or the expression
1503 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1504 if we are making a new object of this type. BITPOS is nonzero if
1505 there is an offset outstanding on T that will be applied later. */
1508 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1509 HOST_WIDE_INT bitpos
)
1511 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1512 tree expr
= MEM_EXPR (ref
);
1513 rtx offset
= MEM_OFFSET (ref
);
1514 rtx size
= MEM_SIZE (ref
);
1515 unsigned int align
= MEM_ALIGN (ref
);
1516 HOST_WIDE_INT apply_bitpos
= 0;
1519 /* It can happen that type_for_mode was given a mode for which there
1520 is no language-level type. In which case it returns NULL, which
1525 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1526 if (type
== error_mark_node
)
1529 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1530 wrong answer, as it assumes that DECL_RTL already has the right alias
1531 info. Callers should not set DECL_RTL until after the call to
1532 set_mem_attributes. */
1533 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1535 /* Get the alias set from the expression or type (perhaps using a
1536 front-end routine) and use it. */
1537 alias
= get_alias_set (t
);
1539 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1540 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1541 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1542 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (t
);
1544 /* If we are making an object of this type, or if this is a DECL, we know
1545 that it is a scalar if the type is not an aggregate. */
1546 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1547 MEM_SCALAR_P (ref
) = 1;
1549 /* We can set the alignment from the type if we are making an object,
1550 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1551 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1552 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1553 || TYPE_ALIGN_OK (type
))
1554 align
= MAX (align
, TYPE_ALIGN (type
));
1556 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1558 if (integer_zerop (TREE_OPERAND (t
, 1)))
1559 /* We don't know anything about the alignment. */
1560 align
= BITS_PER_UNIT
;
1562 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1565 /* If the size is known, we can set that. */
1566 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1567 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1569 /* If T is not a type, we may be able to deduce some more information about
1573 tree base
= get_base_address (t
);
1574 if (base
&& DECL_P (base
)
1575 && TREE_READONLY (base
)
1576 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1577 MEM_READONLY_P (ref
) = 1;
1579 if (TREE_THIS_VOLATILE (t
))
1580 MEM_VOLATILE_P (ref
) = 1;
1582 /* Now remove any conversions: they don't change what the underlying
1583 object is. Likewise for SAVE_EXPR. */
1584 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1585 || TREE_CODE (t
) == NON_LVALUE_EXPR
1586 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1587 || TREE_CODE (t
) == SAVE_EXPR
)
1588 t
= TREE_OPERAND (t
, 0);
1590 /* If this expression can't be addressed (e.g., it contains a reference
1591 to a non-addressable field), show we don't change its alias set. */
1592 if (! can_address_p (t
))
1593 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1595 /* If this is a decl, set the attributes of the MEM from it. */
1599 offset
= const0_rtx
;
1600 apply_bitpos
= bitpos
;
1601 size
= (DECL_SIZE_UNIT (t
)
1602 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1603 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1604 align
= DECL_ALIGN (t
);
1607 /* If this is a constant, we know the alignment. */
1608 else if (CONSTANT_CLASS_P (t
))
1610 align
= TYPE_ALIGN (type
);
1611 #ifdef CONSTANT_ALIGNMENT
1612 align
= CONSTANT_ALIGNMENT (t
, align
);
1616 /* If this is a field reference and not a bit-field, record it. */
1617 /* ??? There is some information that can be gleened from bit-fields,
1618 such as the word offset in the structure that might be modified.
1619 But skip it for now. */
1620 else if (TREE_CODE (t
) == COMPONENT_REF
1621 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1623 expr
= component_ref_for_mem_expr (t
);
1624 offset
= const0_rtx
;
1625 apply_bitpos
= bitpos
;
1626 /* ??? Any reason the field size would be different than
1627 the size we got from the type? */
1630 /* If this is an array reference, look for an outer field reference. */
1631 else if (TREE_CODE (t
) == ARRAY_REF
)
1633 tree off_tree
= size_zero_node
;
1634 /* We can't modify t, because we use it at the end of the
1640 tree index
= TREE_OPERAND (t2
, 1);
1641 tree low_bound
= array_ref_low_bound (t2
);
1642 tree unit_size
= array_ref_element_size (t2
);
1644 /* We assume all arrays have sizes that are a multiple of a byte.
1645 First subtract the lower bound, if any, in the type of the
1646 index, then convert to sizetype and multiply by the size of
1647 the array element. */
1648 if (! integer_zerop (low_bound
))
1649 index
= fold (build2 (MINUS_EXPR
, TREE_TYPE (index
),
1652 off_tree
= size_binop (PLUS_EXPR
,
1653 size_binop (MULT_EXPR
, convert (sizetype
,
1657 t2
= TREE_OPERAND (t2
, 0);
1659 while (TREE_CODE (t2
) == ARRAY_REF
);
1665 if (host_integerp (off_tree
, 1))
1667 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1668 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1669 align
= DECL_ALIGN (t2
);
1670 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1672 offset
= GEN_INT (ioff
);
1673 apply_bitpos
= bitpos
;
1676 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1678 expr
= component_ref_for_mem_expr (t2
);
1679 if (host_integerp (off_tree
, 1))
1681 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1682 apply_bitpos
= bitpos
;
1684 /* ??? Any reason the field size would be different than
1685 the size we got from the type? */
1687 else if (flag_argument_noalias
> 1
1688 && (TREE_CODE (t2
) == INDIRECT_REF
1689 || TREE_CODE (t2
) == ALIGN_INDIRECT_REF
1690 || TREE_CODE (t2
) == MISALIGNED_INDIRECT_REF
)
1691 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1698 /* If this is a Fortran indirect argument reference, record the
1700 else if (flag_argument_noalias
> 1
1701 && (TREE_CODE (t
) == INDIRECT_REF
1702 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1703 || TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1704 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1711 /* If we modified OFFSET based on T, then subtract the outstanding
1712 bit position offset. Similarly, increase the size of the accessed
1713 object to contain the negative offset. */
1716 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1718 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1721 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1723 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1724 we're overlapping. */
1729 /* Now set the attributes we computed above. */
1731 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1733 /* If this is already known to be a scalar or aggregate, we are done. */
1734 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1737 /* If it is a reference into an aggregate, this is part of an aggregate.
1738 Otherwise we don't know. */
1739 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1740 || TREE_CODE (t
) == ARRAY_RANGE_REF
1741 || TREE_CODE (t
) == BIT_FIELD_REF
)
1742 MEM_IN_STRUCT_P (ref
) = 1;
1746 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1748 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1751 /* Set the decl for MEM to DECL. */
1754 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1757 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1758 GEN_INT (REG_OFFSET (reg
)),
1759 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1762 /* Set the alias set of MEM to SET. */
1765 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1767 #ifdef ENABLE_CHECKING
1768 /* If the new and old alias sets don't conflict, something is wrong. */
1769 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1772 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1773 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1777 /* Set the alignment of MEM to ALIGN bits. */
1780 set_mem_align (rtx mem
, unsigned int align
)
1782 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1783 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1787 /* Set the expr for MEM to EXPR. */
1790 set_mem_expr (rtx mem
, tree expr
)
1793 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1794 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1797 /* Set the offset of MEM to OFFSET. */
1800 set_mem_offset (rtx mem
, rtx offset
)
1802 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1803 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1807 /* Set the size of MEM to SIZE. */
1810 set_mem_size (rtx mem
, rtx size
)
1812 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1813 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1817 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1818 and its address changed to ADDR. (VOIDmode means don't change the mode.
1819 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1820 returned memory location is required to be valid. The memory
1821 attributes are not changed. */
1824 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1828 gcc_assert (MEM_P (memref
));
1829 if (mode
== VOIDmode
)
1830 mode
= GET_MODE (memref
);
1832 addr
= XEXP (memref
, 0);
1833 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1834 && (!validate
|| memory_address_p (mode
, addr
)))
1839 if (reload_in_progress
|| reload_completed
)
1840 gcc_assert (memory_address_p (mode
, addr
));
1842 addr
= memory_address (mode
, addr
);
1845 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1848 new = gen_rtx_MEM (mode
, addr
);
1849 MEM_COPY_ATTRIBUTES (new, memref
);
1853 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1854 way we are changing MEMREF, so we only preserve the alias set. */
1857 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1859 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1860 enum machine_mode mmode
= GET_MODE (new);
1863 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1864 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1866 /* If there are no changes, just return the original memory reference. */
1869 if (MEM_ATTRS (memref
) == 0
1870 || (MEM_EXPR (memref
) == NULL
1871 && MEM_OFFSET (memref
) == NULL
1872 && MEM_SIZE (memref
) == size
1873 && MEM_ALIGN (memref
) == align
))
1876 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1877 MEM_COPY_ATTRIBUTES (new, memref
);
1881 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1886 /* Return a memory reference like MEMREF, but with its mode changed
1887 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1888 nonzero, the memory address is forced to be valid.
1889 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1890 and caller is responsible for adjusting MEMREF base register. */
1893 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1894 int validate
, int adjust
)
1896 rtx addr
= XEXP (memref
, 0);
1898 rtx memoffset
= MEM_OFFSET (memref
);
1900 unsigned int memalign
= MEM_ALIGN (memref
);
1902 /* If there are no changes, just return the original memory reference. */
1903 if (mode
== GET_MODE (memref
) && !offset
1904 && (!validate
|| memory_address_p (mode
, addr
)))
1907 /* ??? Prefer to create garbage instead of creating shared rtl.
1908 This may happen even if offset is nonzero -- consider
1909 (plus (plus reg reg) const_int) -- so do this always. */
1910 addr
= copy_rtx (addr
);
1914 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1915 object, we can merge it into the LO_SUM. */
1916 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1918 && (unsigned HOST_WIDE_INT
) offset
1919 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1920 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1921 plus_constant (XEXP (addr
, 1), offset
));
1923 addr
= plus_constant (addr
, offset
);
1926 new = change_address_1 (memref
, mode
, addr
, validate
);
1928 /* Compute the new values of the memory attributes due to this adjustment.
1929 We add the offsets and update the alignment. */
1931 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1933 /* Compute the new alignment by taking the MIN of the alignment and the
1934 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1939 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1941 /* We can compute the size in a number of ways. */
1942 if (GET_MODE (new) != BLKmode
)
1943 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1944 else if (MEM_SIZE (memref
))
1945 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1947 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1948 memoffset
, size
, memalign
, GET_MODE (new));
1950 /* At some point, we should validate that this offset is within the object,
1951 if all the appropriate values are known. */
1955 /* Return a memory reference like MEMREF, but with its mode changed
1956 to MODE and its address changed to ADDR, which is assumed to be
1957 MEMREF offseted by OFFSET bytes. If VALIDATE is
1958 nonzero, the memory address is forced to be valid. */
1961 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1962 HOST_WIDE_INT offset
, int validate
)
1964 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1965 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1968 /* Return a memory reference like MEMREF, but whose address is changed by
1969 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1970 known to be in OFFSET (possibly 1). */
1973 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1975 rtx
new, addr
= XEXP (memref
, 0);
1977 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1979 /* At this point we don't know _why_ the address is invalid. It
1980 could have secondary memory references, multiplies or anything.
1982 However, if we did go and rearrange things, we can wind up not
1983 being able to recognize the magic around pic_offset_table_rtx.
1984 This stuff is fragile, and is yet another example of why it is
1985 bad to expose PIC machinery too early. */
1986 if (! memory_address_p (GET_MODE (memref
), new)
1987 && GET_CODE (addr
) == PLUS
1988 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1990 addr
= force_reg (GET_MODE (addr
), addr
);
1991 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1994 update_temp_slot_address (XEXP (memref
, 0), new);
1995 new = change_address_1 (memref
, VOIDmode
, new, 1);
1997 /* If there are no changes, just return the original memory reference. */
2001 /* Update the alignment to reflect the offset. Reset the offset, which
2004 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2005 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2010 /* Return a memory reference like MEMREF, but with its address changed to
2011 ADDR. The caller is asserting that the actual piece of memory pointed
2012 to is the same, just the form of the address is being changed, such as
2013 by putting something into a register. */
2016 replace_equiv_address (rtx memref
, rtx addr
)
2018 /* change_address_1 copies the memory attribute structure without change
2019 and that's exactly what we want here. */
2020 update_temp_slot_address (XEXP (memref
, 0), addr
);
2021 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2024 /* Likewise, but the reference is not required to be valid. */
2027 replace_equiv_address_nv (rtx memref
, rtx addr
)
2029 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2032 /* Return a memory reference like MEMREF, but with its mode widened to
2033 MODE and offset by OFFSET. This would be used by targets that e.g.
2034 cannot issue QImode memory operations and have to use SImode memory
2035 operations plus masking logic. */
2038 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2040 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2041 tree expr
= MEM_EXPR (new);
2042 rtx memoffset
= MEM_OFFSET (new);
2043 unsigned int size
= GET_MODE_SIZE (mode
);
2045 /* If there are no changes, just return the original memory reference. */
2049 /* If we don't know what offset we were at within the expression, then
2050 we can't know if we've overstepped the bounds. */
2056 if (TREE_CODE (expr
) == COMPONENT_REF
)
2058 tree field
= TREE_OPERAND (expr
, 1);
2059 tree offset
= component_ref_field_offset (expr
);
2061 if (! DECL_SIZE_UNIT (field
))
2067 /* Is the field at least as large as the access? If so, ok,
2068 otherwise strip back to the containing structure. */
2069 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2070 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2071 && INTVAL (memoffset
) >= 0)
2074 if (! host_integerp (offset
, 1))
2080 expr
= TREE_OPERAND (expr
, 0);
2082 = (GEN_INT (INTVAL (memoffset
)
2083 + tree_low_cst (offset
, 1)
2084 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2087 /* Similarly for the decl. */
2088 else if (DECL_P (expr
)
2089 && DECL_SIZE_UNIT (expr
)
2090 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2091 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2092 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2096 /* The widened memory access overflows the expression, which means
2097 that it could alias another expression. Zap it. */
2104 memoffset
= NULL_RTX
;
2106 /* The widened memory may alias other stuff, so zap the alias set. */
2107 /* ??? Maybe use get_alias_set on any remaining expression. */
2109 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2110 MEM_ALIGN (new), mode
);
2115 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2118 gen_label_rtx (void)
2120 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2121 NULL
, label_num
++, NULL
);
2124 /* For procedure integration. */
2126 /* Install new pointers to the first and last insns in the chain.
2127 Also, set cur_insn_uid to one higher than the last in use.
2128 Used for an inline-procedure after copying the insn chain. */
2131 set_new_first_and_last_insn (rtx first
, rtx last
)
2139 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2140 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2145 /* Set the last label number found in the current function.
2146 This is used when belatedly compiling an inline function. */
2149 set_new_last_label_num (int last
)
2151 base_label_num
= label_num
;
2152 last_label_num
= last
;
2155 /* Restore all variables describing the current status from the structure *P.
2156 This is used after a nested function. */
2159 restore_emit_status (struct function
*p ATTRIBUTE_UNUSED
)
2164 /* Go through all the RTL insn bodies and copy any invalid shared
2165 structure. This routine should only be called once. */
2168 unshare_all_rtl_1 (tree fndecl
, rtx insn
)
2172 /* Make sure that virtual parameters are not shared. */
2173 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2174 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2176 /* Make sure that virtual stack slots are not shared. */
2177 unshare_all_decls (DECL_INITIAL (fndecl
));
2179 /* Unshare just about everything else. */
2180 unshare_all_rtl_in_chain (insn
);
2182 /* Make sure the addresses of stack slots found outside the insn chain
2183 (such as, in DECL_RTL of a variable) are not shared
2184 with the insn chain.
2186 This special care is necessary when the stack slot MEM does not
2187 actually appear in the insn chain. If it does appear, its address
2188 is unshared from all else at that point. */
2189 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2192 /* Go through all the RTL insn bodies and copy any invalid shared
2193 structure, again. This is a fairly expensive thing to do so it
2194 should be done sparingly. */
2197 unshare_all_rtl_again (rtx insn
)
2202 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2205 reset_used_flags (PATTERN (p
));
2206 reset_used_flags (REG_NOTES (p
));
2207 reset_used_flags (LOG_LINKS (p
));
2210 /* Make sure that virtual stack slots are not shared. */
2211 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2213 /* Make sure that virtual parameters are not shared. */
2214 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2215 reset_used_flags (DECL_RTL (decl
));
2217 reset_used_flags (stack_slot_list
);
2219 unshare_all_rtl_1 (cfun
->decl
, insn
);
2223 unshare_all_rtl (void)
2225 unshare_all_rtl_1 (current_function_decl
, get_insns ());
2228 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2229 Recursively does the same for subexpressions. */
2232 verify_rtx_sharing (rtx orig
, rtx insn
)
2237 const char *format_ptr
;
2242 code
= GET_CODE (x
);
2244 /* These types may be freely shared. */
2259 /* SCRATCH must be shared because they represent distinct values. */
2261 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2266 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2267 a LABEL_REF, it isn't sharable. */
2268 if (GET_CODE (XEXP (x
, 0)) == PLUS
2269 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2270 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2275 /* A MEM is allowed to be shared if its address is constant. */
2276 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2277 || reload_completed
|| reload_in_progress
)
2286 /* This rtx may not be shared. If it has already been seen,
2287 replace it with a copy of itself. */
2288 #ifdef ENABLE_CHECKING
2289 if (RTX_FLAG (x
, used
))
2291 error ("Invalid rtl sharing found in the insn");
2293 error ("Shared rtx");
2295 internal_error ("Internal consistency failure");
2298 gcc_assert (!RTX_FLAG (x
, used
));
2300 RTX_FLAG (x
, used
) = 1;
2302 /* Now scan the subexpressions recursively. */
2304 format_ptr
= GET_RTX_FORMAT (code
);
2306 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2308 switch (*format_ptr
++)
2311 verify_rtx_sharing (XEXP (x
, i
), insn
);
2315 if (XVEC (x
, i
) != NULL
)
2318 int len
= XVECLEN (x
, i
);
2320 for (j
= 0; j
< len
; j
++)
2322 /* We allow sharing of ASM_OPERANDS inside single
2324 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2325 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2327 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2329 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2338 /* Go through all the RTL insn bodies and check that there is no unexpected
2339 sharing in between the subexpressions. */
2342 verify_rtl_sharing (void)
2346 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2349 reset_used_flags (PATTERN (p
));
2350 reset_used_flags (REG_NOTES (p
));
2351 reset_used_flags (LOG_LINKS (p
));
2354 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2357 verify_rtx_sharing (PATTERN (p
), p
);
2358 verify_rtx_sharing (REG_NOTES (p
), p
);
2359 verify_rtx_sharing (LOG_LINKS (p
), p
);
2363 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2364 Assumes the mark bits are cleared at entry. */
2367 unshare_all_rtl_in_chain (rtx insn
)
2369 for (; insn
; insn
= NEXT_INSN (insn
))
2372 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2373 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2374 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2378 /* Go through all virtual stack slots of a function and copy any
2379 shared structure. */
2381 unshare_all_decls (tree blk
)
2385 /* Copy shared decls. */
2386 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2387 if (DECL_RTL_SET_P (t
))
2388 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2390 /* Now process sub-blocks. */
2391 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2392 unshare_all_decls (t
);
2395 /* Go through all virtual stack slots of a function and mark them as
2398 reset_used_decls (tree blk
)
2403 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2404 if (DECL_RTL_SET_P (t
))
2405 reset_used_flags (DECL_RTL (t
));
2407 /* Now process sub-blocks. */
2408 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2409 reset_used_decls (t
);
2412 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2413 placed in the result directly, rather than being copied. MAY_SHARE is
2414 either a MEM of an EXPR_LIST of MEMs. */
2417 copy_most_rtx (rtx orig
, rtx may_share
)
2422 const char *format_ptr
;
2424 if (orig
== may_share
2425 || (GET_CODE (may_share
) == EXPR_LIST
2426 && in_expr_list_p (may_share
, orig
)))
2429 code
= GET_CODE (orig
);
2446 copy
= rtx_alloc (code
);
2447 PUT_MODE (copy
, GET_MODE (orig
));
2448 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2449 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2450 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2451 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2452 RTX_FLAG (copy
, return_val
) = RTX_FLAG (orig
, return_val
);
2454 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2456 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2458 switch (*format_ptr
++)
2461 XEXP (copy
, i
) = XEXP (orig
, i
);
2462 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2463 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2467 XEXP (copy
, i
) = XEXP (orig
, i
);
2472 XVEC (copy
, i
) = XVEC (orig
, i
);
2473 if (XVEC (orig
, i
) != NULL
)
2475 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2476 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2477 XVECEXP (copy
, i
, j
)
2478 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2483 XWINT (copy
, i
) = XWINT (orig
, i
);
2488 XINT (copy
, i
) = XINT (orig
, i
);
2492 XTREE (copy
, i
) = XTREE (orig
, i
);
2497 XSTR (copy
, i
) = XSTR (orig
, i
);
2501 X0ANY (copy
, i
) = X0ANY (orig
, i
);
2511 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2512 Recursively does the same for subexpressions. Uses
2513 copy_rtx_if_shared_1 to reduce stack space. */
2516 copy_rtx_if_shared (rtx orig
)
2518 copy_rtx_if_shared_1 (&orig
);
2522 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2523 use. Recursively does the same for subexpressions. */
2526 copy_rtx_if_shared_1 (rtx
*orig1
)
2532 const char *format_ptr
;
2536 /* Repeat is used to turn tail-recursion into iteration. */
2543 code
= GET_CODE (x
);
2545 /* These types may be freely shared. */
2559 /* SCRATCH must be shared because they represent distinct values. */
2562 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2567 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2568 a LABEL_REF, it isn't sharable. */
2569 if (GET_CODE (XEXP (x
, 0)) == PLUS
2570 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2571 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2580 /* The chain of insns is not being copied. */
2587 /* This rtx may not be shared. If it has already been seen,
2588 replace it with a copy of itself. */
2590 if (RTX_FLAG (x
, used
))
2594 copy
= rtx_alloc (code
);
2595 memcpy (copy
, x
, RTX_SIZE (code
));
2599 RTX_FLAG (x
, used
) = 1;
2601 /* Now scan the subexpressions recursively.
2602 We can store any replaced subexpressions directly into X
2603 since we know X is not shared! Any vectors in X
2604 must be copied if X was copied. */
2606 format_ptr
= GET_RTX_FORMAT (code
);
2607 length
= GET_RTX_LENGTH (code
);
2610 for (i
= 0; i
< length
; i
++)
2612 switch (*format_ptr
++)
2616 copy_rtx_if_shared_1 (last_ptr
);
2617 last_ptr
= &XEXP (x
, i
);
2621 if (XVEC (x
, i
) != NULL
)
2624 int len
= XVECLEN (x
, i
);
2626 /* Copy the vector iff I copied the rtx and the length
2628 if (copied
&& len
> 0)
2629 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2631 /* Call recursively on all inside the vector. */
2632 for (j
= 0; j
< len
; j
++)
2635 copy_rtx_if_shared_1 (last_ptr
);
2636 last_ptr
= &XVECEXP (x
, i
, j
);
2651 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2652 to look for shared sub-parts. */
2655 reset_used_flags (rtx x
)
2659 const char *format_ptr
;
2662 /* Repeat is used to turn tail-recursion into iteration. */
2667 code
= GET_CODE (x
);
2669 /* These types may be freely shared so we needn't do any resetting
2690 /* The chain of insns is not being copied. */
2697 RTX_FLAG (x
, used
) = 0;
2699 format_ptr
= GET_RTX_FORMAT (code
);
2700 length
= GET_RTX_LENGTH (code
);
2702 for (i
= 0; i
< length
; i
++)
2704 switch (*format_ptr
++)
2712 reset_used_flags (XEXP (x
, i
));
2716 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2717 reset_used_flags (XVECEXP (x
, i
, j
));
2723 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2724 to look for shared sub-parts. */
2727 set_used_flags (rtx x
)
2731 const char *format_ptr
;
2736 code
= GET_CODE (x
);
2738 /* These types may be freely shared so we needn't do any resetting
2759 /* The chain of insns is not being copied. */
2766 RTX_FLAG (x
, used
) = 1;
2768 format_ptr
= GET_RTX_FORMAT (code
);
2769 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2771 switch (*format_ptr
++)
2774 set_used_flags (XEXP (x
, i
));
2778 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2779 set_used_flags (XVECEXP (x
, i
, j
));
2785 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2786 Return X or the rtx for the pseudo reg the value of X was copied into.
2787 OTHER must be valid as a SET_DEST. */
2790 make_safe_from (rtx x
, rtx other
)
2793 switch (GET_CODE (other
))
2796 other
= SUBREG_REG (other
);
2798 case STRICT_LOW_PART
:
2801 other
= XEXP (other
, 0);
2810 && GET_CODE (x
) != SUBREG
)
2812 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2813 || reg_mentioned_p (other
, x
))))
2815 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2816 emit_move_insn (temp
, x
);
2822 /* Emission of insns (adding them to the doubly-linked list). */
2824 /* Return the first insn of the current sequence or current function. */
2832 /* Specify a new insn as the first in the chain. */
2835 set_first_insn (rtx insn
)
2837 gcc_assert (!PREV_INSN (insn
));
2841 /* Return the last insn emitted in current sequence or current function. */
2844 get_last_insn (void)
2849 /* Specify a new insn as the last in the chain. */
2852 set_last_insn (rtx insn
)
2854 gcc_assert (!NEXT_INSN (insn
));
2858 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2861 get_last_insn_anywhere (void)
2863 struct sequence_stack
*stack
;
2866 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2867 if (stack
->last
!= 0)
2872 /* Return the first nonnote insn emitted in current sequence or current
2873 function. This routine looks inside SEQUENCEs. */
2876 get_first_nonnote_insn (void)
2878 rtx insn
= first_insn
;
2882 insn
= next_insn (insn
);
2883 if (insn
== 0 || !NOTE_P (insn
))
2890 /* Return the last nonnote insn emitted in current sequence or current
2891 function. This routine looks inside SEQUENCEs. */
2894 get_last_nonnote_insn (void)
2896 rtx insn
= last_insn
;
2900 insn
= previous_insn (insn
);
2901 if (insn
== 0 || !NOTE_P (insn
))
2908 /* Return a number larger than any instruction's uid in this function. */
2913 return cur_insn_uid
;
2916 /* Renumber instructions so that no instruction UIDs are wasted. */
2919 renumber_insns (FILE *stream
)
2923 /* If we're not supposed to renumber instructions, don't. */
2924 if (!flag_renumber_insns
)
2927 /* If there aren't that many instructions, then it's not really
2928 worth renumbering them. */
2929 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2934 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2937 fprintf (stream
, "Renumbering insn %d to %d\n",
2938 INSN_UID (insn
), cur_insn_uid
);
2939 INSN_UID (insn
) = cur_insn_uid
++;
2943 /* Return the next insn. If it is a SEQUENCE, return the first insn
2947 next_insn (rtx insn
)
2951 insn
= NEXT_INSN (insn
);
2952 if (insn
&& NONJUMP_INSN_P (insn
)
2953 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2954 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2960 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2964 previous_insn (rtx insn
)
2968 insn
= PREV_INSN (insn
);
2969 if (insn
&& NONJUMP_INSN_P (insn
)
2970 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2971 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2977 /* Return the next insn after INSN that is not a NOTE. This routine does not
2978 look inside SEQUENCEs. */
2981 next_nonnote_insn (rtx insn
)
2985 insn
= NEXT_INSN (insn
);
2986 if (insn
== 0 || !NOTE_P (insn
))
2993 /* Return the previous insn before INSN that is not a NOTE. This routine does
2994 not look inside SEQUENCEs. */
2997 prev_nonnote_insn (rtx insn
)
3001 insn
= PREV_INSN (insn
);
3002 if (insn
== 0 || !NOTE_P (insn
))
3009 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3010 or 0, if there is none. This routine does not look inside
3014 next_real_insn (rtx insn
)
3018 insn
= NEXT_INSN (insn
);
3019 if (insn
== 0 || INSN_P (insn
))
3026 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3027 or 0, if there is none. This routine does not look inside
3031 prev_real_insn (rtx insn
)
3035 insn
= PREV_INSN (insn
);
3036 if (insn
== 0 || INSN_P (insn
))
3043 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3044 This routine does not look inside SEQUENCEs. */
3047 last_call_insn (void)
3051 for (insn
= get_last_insn ();
3052 insn
&& !CALL_P (insn
);
3053 insn
= PREV_INSN (insn
))
3059 /* Find the next insn after INSN that really does something. This routine
3060 does not look inside SEQUENCEs. Until reload has completed, this is the
3061 same as next_real_insn. */
3064 active_insn_p (rtx insn
)
3066 return (CALL_P (insn
) || JUMP_P (insn
)
3067 || (NONJUMP_INSN_P (insn
)
3068 && (! reload_completed
3069 || (GET_CODE (PATTERN (insn
)) != USE
3070 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3074 next_active_insn (rtx insn
)
3078 insn
= NEXT_INSN (insn
);
3079 if (insn
== 0 || active_insn_p (insn
))
3086 /* Find the last insn before INSN that really does something. This routine
3087 does not look inside SEQUENCEs. Until reload has completed, this is the
3088 same as prev_real_insn. */
3091 prev_active_insn (rtx insn
)
3095 insn
= PREV_INSN (insn
);
3096 if (insn
== 0 || active_insn_p (insn
))
3103 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3106 next_label (rtx insn
)
3110 insn
= NEXT_INSN (insn
);
3111 if (insn
== 0 || LABEL_P (insn
))
3118 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3121 prev_label (rtx insn
)
3125 insn
= PREV_INSN (insn
);
3126 if (insn
== 0 || LABEL_P (insn
))
3133 /* Return the last label to mark the same position as LABEL. Return null
3134 if LABEL itself is null. */
3137 skip_consecutive_labels (rtx label
)
3141 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3149 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3150 and REG_CC_USER notes so we can find it. */
3153 link_cc0_insns (rtx insn
)
3155 rtx user
= next_nonnote_insn (insn
);
3157 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3158 user
= XVECEXP (PATTERN (user
), 0, 0);
3160 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3162 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3165 /* Return the next insn that uses CC0 after INSN, which is assumed to
3166 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3167 applied to the result of this function should yield INSN).
3169 Normally, this is simply the next insn. However, if a REG_CC_USER note
3170 is present, it contains the insn that uses CC0.
3172 Return 0 if we can't find the insn. */
3175 next_cc0_user (rtx insn
)
3177 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3180 return XEXP (note
, 0);
3182 insn
= next_nonnote_insn (insn
);
3183 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3184 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3186 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3192 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3193 note, it is the previous insn. */
3196 prev_cc0_setter (rtx insn
)
3198 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3201 return XEXP (note
, 0);
3203 insn
= prev_nonnote_insn (insn
);
3204 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3210 /* Increment the label uses for all labels present in rtx. */
3213 mark_label_nuses (rtx x
)
3219 code
= GET_CODE (x
);
3220 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3221 LABEL_NUSES (XEXP (x
, 0))++;
3223 fmt
= GET_RTX_FORMAT (code
);
3224 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3227 mark_label_nuses (XEXP (x
, i
));
3228 else if (fmt
[i
] == 'E')
3229 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3230 mark_label_nuses (XVECEXP (x
, i
, j
));
3235 /* Try splitting insns that can be split for better scheduling.
3236 PAT is the pattern which might split.
3237 TRIAL is the insn providing PAT.
3238 LAST is nonzero if we should return the last insn of the sequence produced.
3240 If this routine succeeds in splitting, it returns the first or last
3241 replacement insn depending on the value of LAST. Otherwise, it
3242 returns TRIAL. If the insn to be returned can be split, it will be. */
3245 try_split (rtx pat
, rtx trial
, int last
)
3247 rtx before
= PREV_INSN (trial
);
3248 rtx after
= NEXT_INSN (trial
);
3249 int has_barrier
= 0;
3253 rtx insn_last
, insn
;
3256 if (any_condjump_p (trial
)
3257 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3258 split_branch_probability
= INTVAL (XEXP (note
, 0));
3259 probability
= split_branch_probability
;
3261 seq
= split_insns (pat
, trial
);
3263 split_branch_probability
= -1;
3265 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3266 We may need to handle this specially. */
3267 if (after
&& BARRIER_P (after
))
3270 after
= NEXT_INSN (after
);
3276 /* Avoid infinite loop if any insn of the result matches
3277 the original pattern. */
3281 if (INSN_P (insn_last
)
3282 && rtx_equal_p (PATTERN (insn_last
), pat
))
3284 if (!NEXT_INSN (insn_last
))
3286 insn_last
= NEXT_INSN (insn_last
);
3290 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3294 mark_jump_label (PATTERN (insn
), insn
, 0);
3296 if (probability
!= -1
3297 && any_condjump_p (insn
)
3298 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3300 /* We can preserve the REG_BR_PROB notes only if exactly
3301 one jump is created, otherwise the machine description
3302 is responsible for this step using
3303 split_branch_probability variable. */
3304 gcc_assert (njumps
== 1);
3306 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3307 GEN_INT (probability
),
3313 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3314 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3317 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3320 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3323 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3324 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3328 /* Copy notes, particularly those related to the CFG. */
3329 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3331 switch (REG_NOTE_KIND (note
))
3335 while (insn
!= NULL_RTX
)
3338 || (flag_non_call_exceptions
&& INSN_P (insn
)
3339 && may_trap_p (PATTERN (insn
))))
3341 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3344 insn
= PREV_INSN (insn
);
3350 case REG_ALWAYS_RETURN
:
3352 while (insn
!= NULL_RTX
)
3356 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3359 insn
= PREV_INSN (insn
);
3363 case REG_NON_LOCAL_GOTO
:
3365 while (insn
!= NULL_RTX
)
3369 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3372 insn
= PREV_INSN (insn
);
3381 /* If there are LABELS inside the split insns increment the
3382 usage count so we don't delete the label. */
3383 if (NONJUMP_INSN_P (trial
))
3386 while (insn
!= NULL_RTX
)
3388 if (NONJUMP_INSN_P (insn
))
3389 mark_label_nuses (PATTERN (insn
));
3391 insn
= PREV_INSN (insn
);
3395 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3397 delete_insn (trial
);
3399 emit_barrier_after (tem
);
3401 /* Recursively call try_split for each new insn created; by the
3402 time control returns here that insn will be fully split, so
3403 set LAST and continue from the insn after the one returned.
3404 We can't use next_active_insn here since AFTER may be a note.
3405 Ignore deleted insns, which can be occur if not optimizing. */
3406 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3407 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3408 tem
= try_split (PATTERN (tem
), tem
, 1);
3410 /* Return either the first or the last insn, depending on which was
3413 ? (after
? PREV_INSN (after
) : last_insn
)
3414 : NEXT_INSN (before
);
3417 /* Make and return an INSN rtx, initializing all its slots.
3418 Store PATTERN in the pattern slots. */
3421 make_insn_raw (rtx pattern
)
3425 insn
= rtx_alloc (INSN
);
3427 INSN_UID (insn
) = cur_insn_uid
++;
3428 PATTERN (insn
) = pattern
;
3429 INSN_CODE (insn
) = -1;
3430 LOG_LINKS (insn
) = NULL
;
3431 REG_NOTES (insn
) = NULL
;
3432 INSN_LOCATOR (insn
) = 0;
3433 BLOCK_FOR_INSN (insn
) = NULL
;
3435 #ifdef ENABLE_RTL_CHECKING
3438 && (returnjump_p (insn
)
3439 || (GET_CODE (insn
) == SET
3440 && SET_DEST (insn
) == pc_rtx
)))
3442 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3450 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3453 make_jump_insn_raw (rtx pattern
)
3457 insn
= rtx_alloc (JUMP_INSN
);
3458 INSN_UID (insn
) = cur_insn_uid
++;
3460 PATTERN (insn
) = pattern
;
3461 INSN_CODE (insn
) = -1;
3462 LOG_LINKS (insn
) = NULL
;
3463 REG_NOTES (insn
) = NULL
;
3464 JUMP_LABEL (insn
) = NULL
;
3465 INSN_LOCATOR (insn
) = 0;
3466 BLOCK_FOR_INSN (insn
) = NULL
;
3471 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3474 make_call_insn_raw (rtx pattern
)
3478 insn
= rtx_alloc (CALL_INSN
);
3479 INSN_UID (insn
) = cur_insn_uid
++;
3481 PATTERN (insn
) = pattern
;
3482 INSN_CODE (insn
) = -1;
3483 LOG_LINKS (insn
) = NULL
;
3484 REG_NOTES (insn
) = NULL
;
3485 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3486 INSN_LOCATOR (insn
) = 0;
3487 BLOCK_FOR_INSN (insn
) = NULL
;
3492 /* Add INSN to the end of the doubly-linked list.
3493 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3498 PREV_INSN (insn
) = last_insn
;
3499 NEXT_INSN (insn
) = 0;
3501 if (NULL
!= last_insn
)
3502 NEXT_INSN (last_insn
) = insn
;
3504 if (NULL
== first_insn
)
3510 /* Add INSN into the doubly-linked list after insn AFTER. This and
3511 the next should be the only functions called to insert an insn once
3512 delay slots have been filled since only they know how to update a
3516 add_insn_after (rtx insn
, rtx after
)
3518 rtx next
= NEXT_INSN (after
);
3521 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3523 NEXT_INSN (insn
) = next
;
3524 PREV_INSN (insn
) = after
;
3528 PREV_INSN (next
) = insn
;
3529 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3530 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3532 else if (last_insn
== after
)
3536 struct sequence_stack
*stack
= seq_stack
;
3537 /* Scan all pending sequences too. */
3538 for (; stack
; stack
= stack
->next
)
3539 if (after
== stack
->last
)
3548 if (!BARRIER_P (after
)
3549 && !BARRIER_P (insn
)
3550 && (bb
= BLOCK_FOR_INSN (after
)))
3552 set_block_for_insn (insn
, bb
);
3554 bb
->flags
|= BB_DIRTY
;
3555 /* Should not happen as first in the BB is always
3556 either NOTE or LABEL. */
3557 if (BB_END (bb
) == after
3558 /* Avoid clobbering of structure when creating new BB. */
3559 && !BARRIER_P (insn
)
3561 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3565 NEXT_INSN (after
) = insn
;
3566 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3568 rtx sequence
= PATTERN (after
);
3569 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3573 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3574 the previous should be the only functions called to insert an insn once
3575 delay slots have been filled since only they know how to update a
3579 add_insn_before (rtx insn
, rtx before
)
3581 rtx prev
= PREV_INSN (before
);
3584 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3586 PREV_INSN (insn
) = prev
;
3587 NEXT_INSN (insn
) = before
;
3591 NEXT_INSN (prev
) = insn
;
3592 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3594 rtx sequence
= PATTERN (prev
);
3595 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3598 else if (first_insn
== before
)
3602 struct sequence_stack
*stack
= seq_stack
;
3603 /* Scan all pending sequences too. */
3604 for (; stack
; stack
= stack
->next
)
3605 if (before
== stack
->first
)
3607 stack
->first
= insn
;
3614 if (!BARRIER_P (before
)
3615 && !BARRIER_P (insn
)
3616 && (bb
= BLOCK_FOR_INSN (before
)))
3618 set_block_for_insn (insn
, bb
);
3620 bb
->flags
|= BB_DIRTY
;
3621 /* Should not happen as first in the BB is always either NOTE or
3623 gcc_assert (BB_HEAD (bb
) != insn
3624 /* Avoid clobbering of structure when creating new BB. */
3627 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BASIC_BLOCK
));
3630 PREV_INSN (before
) = insn
;
3631 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3632 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3635 /* Remove an insn from its doubly-linked list. This function knows how
3636 to handle sequences. */
3638 remove_insn (rtx insn
)
3640 rtx next
= NEXT_INSN (insn
);
3641 rtx prev
= PREV_INSN (insn
);
3646 NEXT_INSN (prev
) = next
;
3647 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3649 rtx sequence
= PATTERN (prev
);
3650 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3653 else if (first_insn
== insn
)
3657 struct sequence_stack
*stack
= seq_stack
;
3658 /* Scan all pending sequences too. */
3659 for (; stack
; stack
= stack
->next
)
3660 if (insn
== stack
->first
)
3662 stack
->first
= next
;
3671 PREV_INSN (next
) = prev
;
3672 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3673 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3675 else if (last_insn
== insn
)
3679 struct sequence_stack
*stack
= seq_stack
;
3680 /* Scan all pending sequences too. */
3681 for (; stack
; stack
= stack
->next
)
3682 if (insn
== stack
->last
)
3690 if (!BARRIER_P (insn
)
3691 && (bb
= BLOCK_FOR_INSN (insn
)))
3694 bb
->flags
|= BB_DIRTY
;
3695 if (BB_HEAD (bb
) == insn
)
3697 /* Never ever delete the basic block note without deleting whole
3699 gcc_assert (!NOTE_P (insn
));
3700 BB_HEAD (bb
) = next
;
3702 if (BB_END (bb
) == insn
)
3707 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3710 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3712 gcc_assert (call_insn
&& CALL_P (call_insn
));
3714 /* Put the register usage information on the CALL. If there is already
3715 some usage information, put ours at the end. */
3716 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3720 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3721 link
= XEXP (link
, 1))
3724 XEXP (link
, 1) = call_fusage
;
3727 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3730 /* Delete all insns made since FROM.
3731 FROM becomes the new last instruction. */
3734 delete_insns_since (rtx from
)
3739 NEXT_INSN (from
) = 0;
3743 /* This function is deprecated, please use sequences instead.
3745 Move a consecutive bunch of insns to a different place in the chain.
3746 The insns to be moved are those between FROM and TO.
3747 They are moved to a new position after the insn AFTER.
3748 AFTER must not be FROM or TO or any insn in between.
3750 This function does not know about SEQUENCEs and hence should not be
3751 called after delay-slot filling has been done. */
3754 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3756 /* Splice this bunch out of where it is now. */
3757 if (PREV_INSN (from
))
3758 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3760 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3761 if (last_insn
== to
)
3762 last_insn
= PREV_INSN (from
);
3763 if (first_insn
== from
)
3764 first_insn
= NEXT_INSN (to
);
3766 /* Make the new neighbors point to it and it to them. */
3767 if (NEXT_INSN (after
))
3768 PREV_INSN (NEXT_INSN (after
)) = to
;
3770 NEXT_INSN (to
) = NEXT_INSN (after
);
3771 PREV_INSN (from
) = after
;
3772 NEXT_INSN (after
) = from
;
3773 if (after
== last_insn
)
3777 /* Same as function above, but take care to update BB boundaries. */
3779 reorder_insns (rtx from
, rtx to
, rtx after
)
3781 rtx prev
= PREV_INSN (from
);
3782 basic_block bb
, bb2
;
3784 reorder_insns_nobb (from
, to
, after
);
3786 if (!BARRIER_P (after
)
3787 && (bb
= BLOCK_FOR_INSN (after
)))
3790 bb
->flags
|= BB_DIRTY
;
3792 if (!BARRIER_P (from
)
3793 && (bb2
= BLOCK_FOR_INSN (from
)))
3795 if (BB_END (bb2
) == to
)
3796 BB_END (bb2
) = prev
;
3797 bb2
->flags
|= BB_DIRTY
;
3800 if (BB_END (bb
) == after
)
3803 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3805 set_block_for_insn (x
, bb
);
3809 /* Return the line note insn preceding INSN. */
3812 find_line_note (rtx insn
)
3814 if (no_line_numbers
)
3817 for (; insn
; insn
= PREV_INSN (insn
))
3819 && NOTE_LINE_NUMBER (insn
) >= 0)
3825 /* Remove unnecessary notes from the instruction stream. */
3828 remove_unnecessary_notes (void)
3830 rtx block_stack
= NULL_RTX
;
3831 rtx eh_stack
= NULL_RTX
;
3836 /* We must not remove the first instruction in the function because
3837 the compiler depends on the first instruction being a note. */
3838 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3840 /* Remember what's next. */
3841 next
= NEXT_INSN (insn
);
3843 /* We're only interested in notes. */
3847 switch (NOTE_LINE_NUMBER (insn
))
3849 case NOTE_INSN_DELETED
:
3853 case NOTE_INSN_EH_REGION_BEG
:
3854 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3857 case NOTE_INSN_EH_REGION_END
:
3858 /* Too many end notes. */
3859 gcc_assert (eh_stack
);
3860 /* Mismatched nesting. */
3861 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack
, 0))
3862 == NOTE_EH_HANDLER (insn
));
3864 eh_stack
= XEXP (eh_stack
, 1);
3865 free_INSN_LIST_node (tmp
);
3868 case NOTE_INSN_BLOCK_BEG
:
3869 /* By now, all notes indicating lexical blocks should have
3870 NOTE_BLOCK filled in. */
3871 gcc_assert (NOTE_BLOCK (insn
));
3872 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3875 case NOTE_INSN_BLOCK_END
:
3876 /* Too many end notes. */
3877 gcc_assert (block_stack
);
3878 /* Mismatched nesting. */
3879 gcc_assert (NOTE_BLOCK (XEXP (block_stack
, 0)) == NOTE_BLOCK (insn
));
3881 block_stack
= XEXP (block_stack
, 1);
3882 free_INSN_LIST_node (tmp
);
3884 /* Scan back to see if there are any non-note instructions
3885 between INSN and the beginning of this block. If not,
3886 then there is no PC range in the generated code that will
3887 actually be in this block, so there's no point in
3888 remembering the existence of the block. */
3889 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3891 /* This block contains a real instruction. Note that we
3892 don't include labels; if the only thing in the block
3893 is a label, then there are still no PC values that
3894 lie within the block. */
3898 /* We're only interested in NOTEs. */
3902 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3904 /* We just verified that this BLOCK matches us with
3905 the block_stack check above. Never delete the
3906 BLOCK for the outermost scope of the function; we
3907 can refer to names from that scope even if the
3908 block notes are messed up. */
3909 if (! is_body_block (NOTE_BLOCK (insn
))
3910 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3917 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3918 /* There's a nested block. We need to leave the
3919 current block in place since otherwise the debugger
3920 wouldn't be able to show symbols from our block in
3921 the nested block. */
3927 /* Too many begin notes. */
3928 gcc_assert (!block_stack
&& !eh_stack
);
3932 /* Emit insn(s) of given code and pattern
3933 at a specified place within the doubly-linked list.
3935 All of the emit_foo global entry points accept an object
3936 X which is either an insn list or a PATTERN of a single
3939 There are thus a few canonical ways to generate code and
3940 emit it at a specific place in the instruction stream. For
3941 example, consider the instruction named SPOT and the fact that
3942 we would like to emit some instructions before SPOT. We might
3946 ... emit the new instructions ...
3947 insns_head = get_insns ();
3950 emit_insn_before (insns_head, SPOT);
3952 It used to be common to generate SEQUENCE rtl instead, but that
3953 is a relic of the past which no longer occurs. The reason is that
3954 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3955 generated would almost certainly die right after it was created. */
3957 /* Make X be output before the instruction BEFORE. */
3960 emit_insn_before (rtx x
, rtx before
)
3965 gcc_assert (before
);
3970 switch (GET_CODE (x
))
3981 rtx next
= NEXT_INSN (insn
);
3982 add_insn_before (insn
, before
);
3988 #ifdef ENABLE_RTL_CHECKING
3995 last
= make_insn_raw (x
);
3996 add_insn_before (last
, before
);
4003 /* Make an instruction with body X and code JUMP_INSN
4004 and output it before the instruction BEFORE. */
4007 emit_jump_insn_before (rtx x
, rtx before
)
4009 rtx insn
, last
= NULL_RTX
;
4011 gcc_assert (before
);
4013 switch (GET_CODE (x
))
4024 rtx next
= NEXT_INSN (insn
);
4025 add_insn_before (insn
, before
);
4031 #ifdef ENABLE_RTL_CHECKING
4038 last
= make_jump_insn_raw (x
);
4039 add_insn_before (last
, before
);
4046 /* Make an instruction with body X and code CALL_INSN
4047 and output it before the instruction BEFORE. */
4050 emit_call_insn_before (rtx x
, rtx before
)
4052 rtx last
= NULL_RTX
, insn
;
4054 gcc_assert (before
);
4056 switch (GET_CODE (x
))
4067 rtx next
= NEXT_INSN (insn
);
4068 add_insn_before (insn
, before
);
4074 #ifdef ENABLE_RTL_CHECKING
4081 last
= make_call_insn_raw (x
);
4082 add_insn_before (last
, before
);
4089 /* Make an insn of code BARRIER
4090 and output it before the insn BEFORE. */
4093 emit_barrier_before (rtx before
)
4095 rtx insn
= rtx_alloc (BARRIER
);
4097 INSN_UID (insn
) = cur_insn_uid
++;
4099 add_insn_before (insn
, before
);
4103 /* Emit the label LABEL before the insn BEFORE. */
4106 emit_label_before (rtx label
, rtx before
)
4108 /* This can be called twice for the same label as a result of the
4109 confusion that follows a syntax error! So make it harmless. */
4110 if (INSN_UID (label
) == 0)
4112 INSN_UID (label
) = cur_insn_uid
++;
4113 add_insn_before (label
, before
);
4119 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4122 emit_note_before (int subtype
, rtx before
)
4124 rtx note
= rtx_alloc (NOTE
);
4125 INSN_UID (note
) = cur_insn_uid
++;
4126 #ifndef USE_MAPPED_LOCATION
4127 NOTE_SOURCE_FILE (note
) = 0;
4129 NOTE_LINE_NUMBER (note
) = subtype
;
4130 BLOCK_FOR_INSN (note
) = NULL
;
4132 add_insn_before (note
, before
);
4136 /* Helper for emit_insn_after, handles lists of instructions
4139 static rtx
emit_insn_after_1 (rtx
, rtx
);
4142 emit_insn_after_1 (rtx first
, rtx after
)
4148 if (!BARRIER_P (after
)
4149 && (bb
= BLOCK_FOR_INSN (after
)))
4151 bb
->flags
|= BB_DIRTY
;
4152 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4153 if (!BARRIER_P (last
))
4154 set_block_for_insn (last
, bb
);
4155 if (!BARRIER_P (last
))
4156 set_block_for_insn (last
, bb
);
4157 if (BB_END (bb
) == after
)
4161 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4164 after_after
= NEXT_INSN (after
);
4166 NEXT_INSN (after
) = first
;
4167 PREV_INSN (first
) = after
;
4168 NEXT_INSN (last
) = after_after
;
4170 PREV_INSN (after_after
) = last
;
4172 if (after
== last_insn
)
4177 /* Make X be output after the insn AFTER. */
4180 emit_insn_after (rtx x
, rtx after
)
4189 switch (GET_CODE (x
))
4197 last
= emit_insn_after_1 (x
, after
);
4200 #ifdef ENABLE_RTL_CHECKING
4207 last
= make_insn_raw (x
);
4208 add_insn_after (last
, after
);
4215 /* Similar to emit_insn_after, except that line notes are to be inserted so
4216 as to act as if this insn were at FROM. */
4219 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4221 rtx from_line
= find_line_note (from
);
4222 rtx after_line
= find_line_note (after
);
4223 rtx insn
= emit_insn_after (x
, after
);
4226 emit_note_copy_after (from_line
, after
);
4229 emit_note_copy_after (after_line
, insn
);
4232 /* Make an insn of code JUMP_INSN with body X
4233 and output it after the insn AFTER. */
4236 emit_jump_insn_after (rtx x
, rtx after
)
4242 switch (GET_CODE (x
))
4250 last
= emit_insn_after_1 (x
, after
);
4253 #ifdef ENABLE_RTL_CHECKING
4260 last
= make_jump_insn_raw (x
);
4261 add_insn_after (last
, after
);
4268 /* Make an instruction with body X and code CALL_INSN
4269 and output it after the instruction AFTER. */
4272 emit_call_insn_after (rtx x
, rtx after
)
4278 switch (GET_CODE (x
))
4286 last
= emit_insn_after_1 (x
, after
);
4289 #ifdef ENABLE_RTL_CHECKING
4296 last
= make_call_insn_raw (x
);
4297 add_insn_after (last
, after
);
4304 /* Make an insn of code BARRIER
4305 and output it after the insn AFTER. */
4308 emit_barrier_after (rtx after
)
4310 rtx insn
= rtx_alloc (BARRIER
);
4312 INSN_UID (insn
) = cur_insn_uid
++;
4314 add_insn_after (insn
, after
);
4318 /* Emit the label LABEL after the insn AFTER. */
4321 emit_label_after (rtx label
, rtx after
)
4323 /* This can be called twice for the same label
4324 as a result of the confusion that follows a syntax error!
4325 So make it harmless. */
4326 if (INSN_UID (label
) == 0)
4328 INSN_UID (label
) = cur_insn_uid
++;
4329 add_insn_after (label
, after
);
4335 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4338 emit_note_after (int subtype
, rtx after
)
4340 rtx note
= rtx_alloc (NOTE
);
4341 INSN_UID (note
) = cur_insn_uid
++;
4342 #ifndef USE_MAPPED_LOCATION
4343 NOTE_SOURCE_FILE (note
) = 0;
4345 NOTE_LINE_NUMBER (note
) = subtype
;
4346 BLOCK_FOR_INSN (note
) = NULL
;
4347 add_insn_after (note
, after
);
4351 /* Emit a copy of note ORIG after the insn AFTER. */
4354 emit_note_copy_after (rtx orig
, rtx after
)
4358 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4364 note
= rtx_alloc (NOTE
);
4365 INSN_UID (note
) = cur_insn_uid
++;
4366 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4367 NOTE_DATA (note
) = NOTE_DATA (orig
);
4368 BLOCK_FOR_INSN (note
) = NULL
;
4369 add_insn_after (note
, after
);
4373 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4375 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4377 rtx last
= emit_insn_after (pattern
, after
);
4379 if (pattern
== NULL_RTX
)
4382 after
= NEXT_INSN (after
);
4385 if (active_insn_p (after
))
4386 INSN_LOCATOR (after
) = loc
;
4389 after
= NEXT_INSN (after
);
4394 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4396 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4398 rtx last
= emit_jump_insn_after (pattern
, after
);
4400 if (pattern
== NULL_RTX
)
4403 after
= NEXT_INSN (after
);
4406 if (active_insn_p (after
))
4407 INSN_LOCATOR (after
) = loc
;
4410 after
= NEXT_INSN (after
);
4415 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4417 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4419 rtx last
= emit_call_insn_after (pattern
, after
);
4421 if (pattern
== NULL_RTX
)
4424 after
= NEXT_INSN (after
);
4427 if (active_insn_p (after
))
4428 INSN_LOCATOR (after
) = loc
;
4431 after
= NEXT_INSN (after
);
4436 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4438 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4440 rtx first
= PREV_INSN (before
);
4441 rtx last
= emit_insn_before (pattern
, before
);
4443 if (pattern
== NULL_RTX
)
4446 first
= NEXT_INSN (first
);
4449 if (active_insn_p (first
))
4450 INSN_LOCATOR (first
) = loc
;
4453 first
= NEXT_INSN (first
);
4458 /* Take X and emit it at the end of the doubly-linked
4461 Returns the last insn emitted. */
4466 rtx last
= last_insn
;
4472 switch (GET_CODE (x
))
4483 rtx next
= NEXT_INSN (insn
);
4490 #ifdef ENABLE_RTL_CHECKING
4497 last
= make_insn_raw (x
);
4505 /* Make an insn of code JUMP_INSN with pattern X
4506 and add it to the end of the doubly-linked list. */
4509 emit_jump_insn (rtx x
)
4511 rtx last
= NULL_RTX
, insn
;
4513 switch (GET_CODE (x
))
4524 rtx next
= NEXT_INSN (insn
);
4531 #ifdef ENABLE_RTL_CHECKING
4538 last
= make_jump_insn_raw (x
);
4546 /* Make an insn of code CALL_INSN with pattern X
4547 and add it to the end of the doubly-linked list. */
4550 emit_call_insn (rtx x
)
4554 switch (GET_CODE (x
))
4562 insn
= emit_insn (x
);
4565 #ifdef ENABLE_RTL_CHECKING
4572 insn
= make_call_insn_raw (x
);
4580 /* Add the label LABEL to the end of the doubly-linked list. */
4583 emit_label (rtx label
)
4585 /* This can be called twice for the same label
4586 as a result of the confusion that follows a syntax error!
4587 So make it harmless. */
4588 if (INSN_UID (label
) == 0)
4590 INSN_UID (label
) = cur_insn_uid
++;
4596 /* Make an insn of code BARRIER
4597 and add it to the end of the doubly-linked list. */
4602 rtx barrier
= rtx_alloc (BARRIER
);
4603 INSN_UID (barrier
) = cur_insn_uid
++;
4608 /* Make line numbering NOTE insn for LOCATION add it to the end
4609 of the doubly-linked list, but only if line-numbers are desired for
4610 debugging info and it doesn't match the previous one. */
4613 emit_line_note (location_t location
)
4617 #ifdef USE_MAPPED_LOCATION
4618 if (location
== last_location
)
4621 if (location
.file
&& last_location
.file
4622 && !strcmp (location
.file
, last_location
.file
)
4623 && location
.line
== last_location
.line
)
4626 last_location
= location
;
4628 if (no_line_numbers
)
4634 #ifdef USE_MAPPED_LOCATION
4635 note
= emit_note ((int) location
);
4637 note
= emit_note (location
.line
);
4638 NOTE_SOURCE_FILE (note
) = location
.file
;
4644 /* Emit a copy of note ORIG. */
4647 emit_note_copy (rtx orig
)
4651 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4657 note
= rtx_alloc (NOTE
);
4659 INSN_UID (note
) = cur_insn_uid
++;
4660 NOTE_DATA (note
) = NOTE_DATA (orig
);
4661 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4662 BLOCK_FOR_INSN (note
) = NULL
;
4668 /* Make an insn of code NOTE or type NOTE_NO
4669 and add it to the end of the doubly-linked list. */
4672 emit_note (int note_no
)
4676 note
= rtx_alloc (NOTE
);
4677 INSN_UID (note
) = cur_insn_uid
++;
4678 NOTE_LINE_NUMBER (note
) = note_no
;
4679 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4680 BLOCK_FOR_INSN (note
) = NULL
;
4685 /* Cause next statement to emit a line note even if the line number
4689 force_next_line_note (void)
4691 #ifdef USE_MAPPED_LOCATION
4694 last_location
.line
= -1;
4698 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4699 note of this type already exists, remove it first. */
4702 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4704 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4710 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4711 has multiple sets (some callers assume single_set
4712 means the insn only has one set, when in fact it
4713 means the insn only has one * useful * set). */
4714 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4720 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4721 It serves no useful purpose and breaks eliminate_regs. */
4722 if (GET_CODE (datum
) == ASM_OPERANDS
)
4732 XEXP (note
, 0) = datum
;
4736 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4737 return REG_NOTES (insn
);
4740 /* Return an indication of which type of insn should have X as a body.
4741 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4744 classify_insn (rtx x
)
4748 if (GET_CODE (x
) == CALL
)
4750 if (GET_CODE (x
) == RETURN
)
4752 if (GET_CODE (x
) == SET
)
4754 if (SET_DEST (x
) == pc_rtx
)
4756 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4761 if (GET_CODE (x
) == PARALLEL
)
4764 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4765 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4767 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4768 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4770 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4771 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4777 /* Emit the rtl pattern X as an appropriate kind of insn.
4778 If X is a label, it is simply added into the insn chain. */
4783 enum rtx_code code
= classify_insn (x
);
4788 return emit_label (x
);
4790 return emit_insn (x
);
4793 rtx insn
= emit_jump_insn (x
);
4794 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4795 return emit_barrier ();
4799 return emit_call_insn (x
);
4805 /* Space for free sequence stack entries. */
4806 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
4808 /* Begin emitting insns to a sequence. If this sequence will contain
4809 something that might cause the compiler to pop arguments to function
4810 calls (because those pops have previously been deferred; see
4811 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4812 before calling this function. That will ensure that the deferred
4813 pops are not accidentally emitted in the middle of this sequence. */
4816 start_sequence (void)
4818 struct sequence_stack
*tem
;
4820 if (free_sequence_stack
!= NULL
)
4822 tem
= free_sequence_stack
;
4823 free_sequence_stack
= tem
->next
;
4826 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4828 tem
->next
= seq_stack
;
4829 tem
->first
= first_insn
;
4830 tem
->last
= last_insn
;
4838 /* Set up the insn chain starting with FIRST as the current sequence,
4839 saving the previously current one. See the documentation for
4840 start_sequence for more information about how to use this function. */
4843 push_to_sequence (rtx first
)
4849 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4855 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4858 push_to_full_sequence (rtx first
, rtx last
)
4863 /* We really should have the end of the insn chain here. */
4864 gcc_assert (!last
|| !NEXT_INSN (last
));
4867 /* Set up the outer-level insn chain
4868 as the current sequence, saving the previously current one. */
4871 push_topmost_sequence (void)
4873 struct sequence_stack
*stack
, *top
= NULL
;
4877 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4880 first_insn
= top
->first
;
4881 last_insn
= top
->last
;
4884 /* After emitting to the outer-level insn chain, update the outer-level
4885 insn chain, and restore the previous saved state. */
4888 pop_topmost_sequence (void)
4890 struct sequence_stack
*stack
, *top
= NULL
;
4892 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4895 top
->first
= first_insn
;
4896 top
->last
= last_insn
;
4901 /* After emitting to a sequence, restore previous saved state.
4903 To get the contents of the sequence just made, you must call
4904 `get_insns' *before* calling here.
4906 If the compiler might have deferred popping arguments while
4907 generating this sequence, and this sequence will not be immediately
4908 inserted into the instruction stream, use do_pending_stack_adjust
4909 before calling get_insns. That will ensure that the deferred
4910 pops are inserted into this sequence, and not into some random
4911 location in the instruction stream. See INHIBIT_DEFER_POP for more
4912 information about deferred popping of arguments. */
4917 struct sequence_stack
*tem
= seq_stack
;
4919 first_insn
= tem
->first
;
4920 last_insn
= tem
->last
;
4921 seq_stack
= tem
->next
;
4923 memset (tem
, 0, sizeof (*tem
));
4924 tem
->next
= free_sequence_stack
;
4925 free_sequence_stack
= tem
;
4928 /* Return 1 if currently emitting into a sequence. */
4931 in_sequence_p (void)
4933 return seq_stack
!= 0;
4936 /* Put the various virtual registers into REGNO_REG_RTX. */
4939 init_virtual_regs (struct emit_status
*es
)
4941 rtx
*ptr
= es
->x_regno_reg_rtx
;
4942 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4943 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4944 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4945 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4946 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4950 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4951 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4952 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4953 static int copy_insn_n_scratches
;
4955 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4956 copied an ASM_OPERANDS.
4957 In that case, it is the original input-operand vector. */
4958 static rtvec orig_asm_operands_vector
;
4960 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4961 copied an ASM_OPERANDS.
4962 In that case, it is the copied input-operand vector. */
4963 static rtvec copy_asm_operands_vector
;
4965 /* Likewise for the constraints vector. */
4966 static rtvec orig_asm_constraints_vector
;
4967 static rtvec copy_asm_constraints_vector
;
4969 /* Recursively create a new copy of an rtx for copy_insn.
4970 This function differs from copy_rtx in that it handles SCRATCHes and
4971 ASM_OPERANDs properly.
4972 Normally, this function is not used directly; use copy_insn as front end.
4973 However, you could first copy an insn pattern with copy_insn and then use
4974 this function afterwards to properly copy any REG_NOTEs containing
4978 copy_insn_1 (rtx orig
)
4983 const char *format_ptr
;
4985 code
= GET_CODE (orig
);
4999 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5004 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5005 if (copy_insn_scratch_in
[i
] == orig
)
5006 return copy_insn_scratch_out
[i
];
5010 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5011 a LABEL_REF, it isn't sharable. */
5012 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5013 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5014 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5018 /* A MEM with a constant address is not sharable. The problem is that
5019 the constant address may need to be reloaded. If the mem is shared,
5020 then reloading one copy of this mem will cause all copies to appear
5021 to have been reloaded. */
5027 copy
= rtx_alloc (code
);
5029 /* Copy the various flags, and other information. We assume that
5030 all fields need copying, and then clear the fields that should
5031 not be copied. That is the sensible default behavior, and forces
5032 us to explicitly document why we are *not* copying a flag. */
5033 memcpy (copy
, orig
, RTX_HDR_SIZE
);
5035 /* We do not copy the USED flag, which is used as a mark bit during
5036 walks over the RTL. */
5037 RTX_FLAG (copy
, used
) = 0;
5039 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5042 RTX_FLAG (copy
, jump
) = 0;
5043 RTX_FLAG (copy
, call
) = 0;
5044 RTX_FLAG (copy
, frame_related
) = 0;
5047 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5049 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5051 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
5052 switch (*format_ptr
++)
5055 if (XEXP (orig
, i
) != NULL
)
5056 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5061 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5062 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5063 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5064 XVEC (copy
, i
) = copy_asm_operands_vector
;
5065 else if (XVEC (orig
, i
) != NULL
)
5067 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5068 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5069 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5080 /* These are left unchanged. */
5088 if (code
== SCRATCH
)
5090 i
= copy_insn_n_scratches
++;
5091 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5092 copy_insn_scratch_in
[i
] = orig
;
5093 copy_insn_scratch_out
[i
] = copy
;
5095 else if (code
== ASM_OPERANDS
)
5097 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5098 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5099 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5100 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5106 /* Create a new copy of an rtx.
5107 This function differs from copy_rtx in that it handles SCRATCHes and
5108 ASM_OPERANDs properly.
5109 INSN doesn't really have to be a full INSN; it could be just the
5112 copy_insn (rtx insn
)
5114 copy_insn_n_scratches
= 0;
5115 orig_asm_operands_vector
= 0;
5116 orig_asm_constraints_vector
= 0;
5117 copy_asm_operands_vector
= 0;
5118 copy_asm_constraints_vector
= 0;
5119 return copy_insn_1 (insn
);
5122 /* Initialize data structures and variables in this file
5123 before generating rtl for each function. */
5128 struct function
*f
= cfun
;
5130 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5134 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5135 last_location
= UNKNOWN_LOCATION
;
5136 first_label_num
= label_num
;
5140 /* Init the tables that describe all the pseudo regs. */
5142 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5144 f
->emit
->regno_pointer_align
5145 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5146 * sizeof (unsigned char));
5149 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5151 /* Put copies of all the hard registers into regno_reg_rtx. */
5152 memcpy (regno_reg_rtx
,
5153 static_regno_reg_rtx
,
5154 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5156 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5157 init_virtual_regs (f
->emit
);
5159 /* Indicate that the virtual registers and stack locations are
5161 REG_POINTER (stack_pointer_rtx
) = 1;
5162 REG_POINTER (frame_pointer_rtx
) = 1;
5163 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5164 REG_POINTER (arg_pointer_rtx
) = 1;
5166 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5167 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5168 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5169 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5170 REG_POINTER (virtual_cfa_rtx
) = 1;
5172 #ifdef STACK_BOUNDARY
5173 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5174 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5175 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5176 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5178 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5179 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5180 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5181 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5182 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5185 #ifdef INIT_EXPANDERS
5190 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5193 gen_const_vector (enum machine_mode mode
, int constant
)
5198 enum machine_mode inner
;
5200 units
= GET_MODE_NUNITS (mode
);
5201 inner
= GET_MODE_INNER (mode
);
5203 v
= rtvec_alloc (units
);
5205 /* We need to call this function after we set the scalar const_tiny_rtx
5207 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5209 for (i
= 0; i
< units
; ++i
)
5210 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5212 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5216 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5217 all elements are zero, and the one vector when all elements are one. */
5219 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5221 enum machine_mode inner
= GET_MODE_INNER (mode
);
5222 int nunits
= GET_MODE_NUNITS (mode
);
5226 /* Check to see if all of the elements have the same value. */
5227 x
= RTVEC_ELT (v
, nunits
- 1);
5228 for (i
= nunits
- 2; i
>= 0; i
--)
5229 if (RTVEC_ELT (v
, i
) != x
)
5232 /* If the values are all the same, check to see if we can use one of the
5233 standard constant vectors. */
5236 if (x
== CONST0_RTX (inner
))
5237 return CONST0_RTX (mode
);
5238 else if (x
== CONST1_RTX (inner
))
5239 return CONST1_RTX (mode
);
5242 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5245 /* Create some permanent unique rtl objects shared between all functions.
5246 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5249 init_emit_once (int line_numbers
)
5252 enum machine_mode mode
;
5253 enum machine_mode double_mode
;
5255 /* We need reg_raw_mode, so initialize the modes now. */
5256 init_reg_modes_once ();
5258 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5260 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5261 const_int_htab_eq
, NULL
);
5263 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5264 const_double_htab_eq
, NULL
);
5266 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5267 mem_attrs_htab_eq
, NULL
);
5268 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5269 reg_attrs_htab_eq
, NULL
);
5271 no_line_numbers
= ! line_numbers
;
5273 /* Compute the word and byte modes. */
5275 byte_mode
= VOIDmode
;
5276 word_mode
= VOIDmode
;
5277 double_mode
= VOIDmode
;
5279 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5280 mode
= GET_MODE_WIDER_MODE (mode
))
5282 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5283 && byte_mode
== VOIDmode
)
5286 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5287 && word_mode
== VOIDmode
)
5291 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5292 mode
= GET_MODE_WIDER_MODE (mode
))
5294 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5295 && double_mode
== VOIDmode
)
5299 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5301 /* Assign register numbers to the globally defined register rtx.
5302 This must be done at runtime because the register number field
5303 is in a union and some compilers can't initialize unions. */
5305 pc_rtx
= gen_rtx_PC (VOIDmode
);
5306 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5307 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5308 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5309 if (hard_frame_pointer_rtx
== 0)
5310 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5311 HARD_FRAME_POINTER_REGNUM
);
5312 if (arg_pointer_rtx
== 0)
5313 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5314 virtual_incoming_args_rtx
=
5315 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5316 virtual_stack_vars_rtx
=
5317 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5318 virtual_stack_dynamic_rtx
=
5319 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5320 virtual_outgoing_args_rtx
=
5321 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5322 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5324 /* Initialize RTL for commonly used hard registers. These are
5325 copied into regno_reg_rtx as we begin to compile each function. */
5326 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5327 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5329 #ifdef INIT_EXPANDERS
5330 /* This is to initialize {init|mark|free}_machine_status before the first
5331 call to push_function_context_to. This is needed by the Chill front
5332 end which calls push_function_context_to before the first call to
5333 init_function_start. */
5337 /* Create the unique rtx's for certain rtx codes and operand values. */
5339 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5340 tries to use these variables. */
5341 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5342 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5343 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5345 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5346 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5347 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5349 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5351 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5352 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5353 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5354 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5355 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5356 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5357 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5359 dconsthalf
= dconst1
;
5360 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5362 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5364 /* Initialize mathematical constants for constant folding builtins.
5365 These constants need to be given to at least 160 bits precision. */
5366 real_from_string (&dconstpi
,
5367 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5368 real_from_string (&dconste
,
5369 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5371 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5373 REAL_VALUE_TYPE
*r
=
5374 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5376 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5377 mode
= GET_MODE_WIDER_MODE (mode
))
5378 const_tiny_rtx
[i
][(int) mode
] =
5379 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5381 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5383 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5384 mode
= GET_MODE_WIDER_MODE (mode
))
5385 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5387 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5389 mode
= GET_MODE_WIDER_MODE (mode
))
5390 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5393 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5395 mode
= GET_MODE_WIDER_MODE (mode
))
5397 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5398 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5401 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5403 mode
= GET_MODE_WIDER_MODE (mode
))
5405 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5406 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5409 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5410 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5411 const_tiny_rtx
[0][i
] = const0_rtx
;
5413 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5414 if (STORE_FLAG_VALUE
== 1)
5415 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5417 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5418 return_address_pointer_rtx
5419 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5422 #ifdef STATIC_CHAIN_REGNUM
5423 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5425 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5426 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5427 static_chain_incoming_rtx
5428 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5431 static_chain_incoming_rtx
= static_chain_rtx
;
5435 static_chain_rtx
= STATIC_CHAIN
;
5437 #ifdef STATIC_CHAIN_INCOMING
5438 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5440 static_chain_incoming_rtx
= static_chain_rtx
;
5444 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5445 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5448 /* Produce exact duplicate of insn INSN after AFTER.
5449 Care updating of libcall regions if present. */
5452 emit_copy_of_insn_after (rtx insn
, rtx after
)
5455 rtx note1
, note2
, link
;
5457 switch (GET_CODE (insn
))
5460 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5464 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5468 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5469 if (CALL_INSN_FUNCTION_USAGE (insn
))
5470 CALL_INSN_FUNCTION_USAGE (new)
5471 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5472 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5473 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5480 /* Update LABEL_NUSES. */
5481 mark_jump_label (PATTERN (new), new, 0);
5483 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5485 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5487 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5488 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5490 if (GET_CODE (link
) == EXPR_LIST
)
5492 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5497 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5502 /* Fix the libcall sequences. */
5503 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5506 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5508 XEXP (note1
, 0) = p
;
5509 XEXP (note2
, 0) = new;
5511 INSN_CODE (new) = INSN_CODE (insn
);
5515 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5517 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5519 if (hard_reg_clobbers
[mode
][regno
])
5520 return hard_reg_clobbers
[mode
][regno
];
5522 return (hard_reg_clobbers
[mode
][regno
] =
5523 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5526 #include "gt-emit-rtl.h"