2000-07-03 Donn Terry (donnte@microsoft.com)
[official-gcc.git] / gcc / resource.c
blobae89d62d7ba2ac633f13825a399f055332ff868e
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 #include "config.h"
22 #include "system.h"
23 #include "toplev.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "except.h"
34 #include "insn-attr.h"
36 /* This structure is used to record liveness information at the targets or
37 fallthrough insns of branches. We will most likely need the information
38 at targets again, so save them in a hash table rather than recomputing them
39 each time. */
41 struct target_info
43 int uid; /* INSN_UID of target. */
44 struct target_info *next; /* Next info for same hash bucket. */
45 HARD_REG_SET live_regs; /* Registers live at target. */
46 int block; /* Basic block number containing target. */
47 int bb_tick; /* Generation count of basic block info. */
50 #define TARGET_HASH_PRIME 257
52 /* Indicates what resources are required at the beginning of the epilogue. */
53 static struct resources start_of_epilogue_needs;
55 /* Indicates what resources are required at function end. */
56 static struct resources end_of_function_needs;
58 /* Define the hash table itself. */
59 static struct target_info **target_hash_table = NULL;
61 /* For each basic block, we maintain a generation number of its basic
62 block info, which is updated each time we move an insn from the
63 target of a jump. This is the generation number indexed by block
64 number. */
66 static int *bb_ticks;
68 /* Marks registers possibly live at the current place being scanned by
69 mark_target_live_regs. Used only by next two function. */
71 static HARD_REG_SET current_live_regs;
73 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
74 Also only used by the next two functions. */
76 static HARD_REG_SET pending_dead_regs;
78 static void update_live_status PARAMS ((rtx, rtx, void *));
79 static int find_basic_block PARAMS ((rtx));
80 static rtx next_insn_no_annul PARAMS ((rtx));
81 static rtx find_dead_or_set_registers PARAMS ((rtx, struct resources*,
82 rtx*, int, struct resources,
83 struct resources));
85 /* Utility function called from mark_target_live_regs via note_stores.
86 It deadens any CLOBBERed registers and livens any SET registers. */
88 static void
89 update_live_status (dest, x, data)
90 rtx dest;
91 rtx x;
92 void *data ATTRIBUTE_UNUSED;
94 int first_regno, last_regno;
95 int i;
97 if (GET_CODE (dest) != REG
98 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
99 return;
101 if (GET_CODE (dest) == SUBREG)
102 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
103 else
104 first_regno = REGNO (dest);
106 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
108 if (GET_CODE (x) == CLOBBER)
109 for (i = first_regno; i < last_regno; i++)
110 CLEAR_HARD_REG_BIT (current_live_regs, i);
111 else
112 for (i = first_regno; i < last_regno; i++)
114 SET_HARD_REG_BIT (current_live_regs, i);
115 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
118 /* Find the number of the basic block that starts closest to INSN. Return -1
119 if we couldn't find such a basic block. */
121 static int
122 find_basic_block (insn)
123 rtx insn;
125 int i;
127 /* Scan backwards to the previous BARRIER. Then see if we can find a
128 label that starts a basic block. Return the basic block number. */
130 for (insn = prev_nonnote_insn (insn);
131 insn && GET_CODE (insn) != BARRIER;
132 insn = prev_nonnote_insn (insn))
135 /* The start of the function is basic block zero. */
136 if (insn == 0)
137 return 0;
139 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
140 anything other than a CODE_LABEL or note, we can't find this code. */
141 for (insn = next_nonnote_insn (insn);
142 insn && GET_CODE (insn) == CODE_LABEL;
143 insn = next_nonnote_insn (insn))
145 for (i = 0; i < n_basic_blocks; i++)
146 if (insn == BLOCK_HEAD (i))
147 return i;
150 return -1;
153 /* Similar to next_insn, but ignores insns in the delay slots of
154 an annulled branch. */
156 static rtx
157 next_insn_no_annul (insn)
158 rtx insn;
160 if (insn)
162 /* If INSN is an annulled branch, skip any insns from the target
163 of the branch. */
164 if (INSN_ANNULLED_BRANCH_P (insn)
165 && NEXT_INSN (PREV_INSN (insn)) != insn)
166 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
167 insn = NEXT_INSN (insn);
169 insn = NEXT_INSN (insn);
170 if (insn && GET_CODE (insn) == INSN
171 && GET_CODE (PATTERN (insn)) == SEQUENCE)
172 insn = XVECEXP (PATTERN (insn), 0, 0);
175 return insn;
178 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
179 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
180 is TRUE, resources used by the called routine will be included for
181 CALL_INSNs. */
183 void
184 mark_referenced_resources (x, res, include_delayed_effects)
185 register rtx x;
186 register struct resources *res;
187 register int include_delayed_effects;
189 enum rtx_code code = GET_CODE (x);
190 int i, j;
191 unsigned int r;
192 register const char *format_ptr;
194 /* Handle leaf items for which we set resource flags. Also, special-case
195 CALL, SET and CLOBBER operators. */
196 switch (code)
198 case CONST:
199 case CONST_INT:
200 case CONST_DOUBLE:
201 case PC:
202 case SYMBOL_REF:
203 case LABEL_REF:
204 return;
206 case SUBREG:
207 if (GET_CODE (SUBREG_REG (x)) != REG)
208 mark_referenced_resources (SUBREG_REG (x), res, 0);
209 else
211 unsigned int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
212 unsigned int last_regno
213 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
215 for (r = regno; r < last_regno; r++)
216 SET_HARD_REG_BIT (res->regs, r);
218 return;
220 case REG:
221 for (r = 0; r < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); r++)
222 SET_HARD_REG_BIT (res->regs, REGNO (x) + r);
223 return;
225 case MEM:
226 /* If this memory shouldn't change, it really isn't referencing
227 memory. */
228 if (RTX_UNCHANGING_P (x))
229 res->unch_memory = 1;
230 else
231 res->memory = 1;
232 res->volatil |= MEM_VOLATILE_P (x);
234 /* Mark registers used to access memory. */
235 mark_referenced_resources (XEXP (x, 0), res, 0);
236 return;
238 case CC0:
239 res->cc = 1;
240 return;
242 case UNSPEC_VOLATILE:
243 case ASM_INPUT:
244 /* Traditional asm's are always volatile. */
245 res->volatil = 1;
246 return;
248 case TRAP_IF:
249 res->volatil = 1;
250 break;
252 case ASM_OPERANDS:
253 res->volatil |= MEM_VOLATILE_P (x);
255 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
256 We can not just fall through here since then we would be confused
257 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
258 traditional asms unlike their normal usage. */
260 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
261 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
262 return;
264 case CALL:
265 /* The first operand will be a (MEM (xxx)) but doesn't really reference
266 memory. The second operand may be referenced, though. */
267 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
268 mark_referenced_resources (XEXP (x, 1), res, 0);
269 return;
271 case SET:
272 /* Usually, the first operand of SET is set, not referenced. But
273 registers used to access memory are referenced. SET_DEST is
274 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
276 mark_referenced_resources (SET_SRC (x), res, 0);
278 x = SET_DEST (x);
279 if (GET_CODE (x) == SIGN_EXTRACT
280 || GET_CODE (x) == ZERO_EXTRACT
281 || GET_CODE (x) == STRICT_LOW_PART)
282 mark_referenced_resources (x, res, 0);
283 else if (GET_CODE (x) == SUBREG)
284 x = SUBREG_REG (x);
285 if (GET_CODE (x) == MEM)
286 mark_referenced_resources (XEXP (x, 0), res, 0);
287 return;
289 case CLOBBER:
290 return;
292 case CALL_INSN:
293 if (include_delayed_effects)
295 /* A CALL references memory, the frame pointer if it exists, the
296 stack pointer, any global registers and any registers given in
297 USE insns immediately in front of the CALL.
299 However, we may have moved some of the parameter loading insns
300 into the delay slot of this CALL. If so, the USE's for them
301 don't count and should be skipped. */
302 rtx insn = PREV_INSN (x);
303 rtx sequence = 0;
304 int seq_size = 0;
305 rtx next = NEXT_INSN (x);
306 int i;
308 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
309 if (NEXT_INSN (insn) != x)
311 next = NEXT_INSN (NEXT_INSN (insn));
312 sequence = PATTERN (NEXT_INSN (insn));
313 seq_size = XVECLEN (sequence, 0);
314 if (GET_CODE (sequence) != SEQUENCE)
315 abort ();
318 res->memory = 1;
319 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
320 if (frame_pointer_needed)
322 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
323 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
324 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
325 #endif
328 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
329 if (global_regs[i])
330 SET_HARD_REG_BIT (res->regs, i);
332 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
333 assume that this call can need any register.
335 This is done to be more conservative about how we handle setjmp.
336 We assume that they both use and set all registers. Using all
337 registers ensures that a register will not be considered dead
338 just because it crosses a setjmp call. A register should be
339 considered dead only if the setjmp call returns non-zero. */
340 if (next && GET_CODE (next) == NOTE
341 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
342 SET_HARD_REG_SET (res->regs);
345 rtx link;
347 for (link = CALL_INSN_FUNCTION_USAGE (x);
348 link;
349 link = XEXP (link, 1))
350 if (GET_CODE (XEXP (link, 0)) == USE)
352 for (i = 1; i < seq_size; i++)
354 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
355 if (GET_CODE (slot_pat) == SET
356 && rtx_equal_p (SET_DEST (slot_pat),
357 XEXP (XEXP (link, 0), 0)))
358 break;
360 if (i >= seq_size)
361 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
362 res, 0);
367 /* ... fall through to other INSN processing ... */
369 case INSN:
370 case JUMP_INSN:
372 #ifdef INSN_REFERENCES_ARE_DELAYED
373 if (! include_delayed_effects
374 && INSN_REFERENCES_ARE_DELAYED (x))
375 return;
376 #endif
378 /* No special processing, just speed up. */
379 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
380 return;
382 default:
383 break;
386 /* Process each sub-expression and flag what it needs. */
387 format_ptr = GET_RTX_FORMAT (code);
388 for (i = 0; i < GET_RTX_LENGTH (code); i++)
389 switch (*format_ptr++)
391 case 'e':
392 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
393 break;
395 case 'E':
396 for (j = 0; j < XVECLEN (x, i); j++)
397 mark_referenced_resources (XVECEXP (x, i, j), res,
398 include_delayed_effects);
399 break;
403 /* A subroutine of mark_target_live_regs. Search forward from TARGET
404 looking for registers that are set before they are used. These are dead.
405 Stop after passing a few conditional jumps, and/or a small
406 number of unconditional branches. */
408 static rtx
409 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
410 rtx target;
411 struct resources *res;
412 rtx *jump_target;
413 int jump_count;
414 struct resources set, needed;
416 HARD_REG_SET scratch;
417 rtx insn, next;
418 rtx jump_insn = 0;
419 int i;
421 for (insn = target; insn; insn = next)
423 rtx this_jump_insn = insn;
425 next = NEXT_INSN (insn);
427 /* If this instruction can throw an exception, then we don't
428 know where we might end up next. That means that we have to
429 assume that whatever we have already marked as live really is
430 live. */
431 if (can_throw (insn))
432 break;
434 switch (GET_CODE (insn))
436 case CODE_LABEL:
437 /* After a label, any pending dead registers that weren't yet
438 used can be made dead. */
439 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
440 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
441 CLEAR_HARD_REG_SET (pending_dead_regs);
443 continue;
445 case BARRIER:
446 case NOTE:
447 continue;
449 case INSN:
450 if (GET_CODE (PATTERN (insn)) == USE)
452 /* If INSN is a USE made by update_block, we care about the
453 underlying insn. Any registers set by the underlying insn
454 are live since the insn is being done somewhere else. */
455 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
456 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
457 MARK_SRC_DEST_CALL);
459 /* All other USE insns are to be ignored. */
460 continue;
462 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
463 continue;
464 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
466 /* An unconditional jump can be used to fill the delay slot
467 of a call, so search for a JUMP_INSN in any position. */
468 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
470 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
471 if (GET_CODE (this_jump_insn) == JUMP_INSN)
472 break;
476 default:
477 break;
480 if (GET_CODE (this_jump_insn) == JUMP_INSN)
482 if (jump_count++ < 10)
484 if (any_uncondjump_p (this_jump_insn)
485 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
487 next = JUMP_LABEL (this_jump_insn);
488 if (jump_insn == 0)
490 jump_insn = insn;
491 if (jump_target)
492 *jump_target = JUMP_LABEL (this_jump_insn);
495 else if (any_condjump_p (this_jump_insn))
497 struct resources target_set, target_res;
498 struct resources fallthrough_res;
500 /* We can handle conditional branches here by following
501 both paths, and then IOR the results of the two paths
502 together, which will give us registers that are dead
503 on both paths. Since this is expensive, we give it
504 a much higher cost than unconditional branches. The
505 cost was chosen so that we will follow at most 1
506 conditional branch. */
508 jump_count += 4;
509 if (jump_count >= 10)
510 break;
512 mark_referenced_resources (insn, &needed, 1);
514 /* For an annulled branch, mark_set_resources ignores slots
515 filled by instructions from the target. This is correct
516 if the branch is not taken. Since we are following both
517 paths from the branch, we must also compute correct info
518 if the branch is taken. We do this by inverting all of
519 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
520 and then inverting the INSN_FROM_TARGET_P bits again. */
522 if (GET_CODE (PATTERN (insn)) == SEQUENCE
523 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
525 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
526 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
527 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
529 target_set = set;
530 mark_set_resources (insn, &target_set, 0,
531 MARK_SRC_DEST_CALL);
533 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
534 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
535 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
537 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
539 else
541 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
542 target_set = set;
545 target_res = *res;
546 COPY_HARD_REG_SET (scratch, target_set.regs);
547 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
548 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
550 fallthrough_res = *res;
551 COPY_HARD_REG_SET (scratch, set.regs);
552 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
553 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
555 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
556 &target_res, 0, jump_count,
557 target_set, needed);
558 find_dead_or_set_registers (next,
559 &fallthrough_res, 0, jump_count,
560 set, needed);
561 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
562 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
563 break;
565 else
566 break;
568 else
570 /* Don't try this optimization if we expired our jump count
571 above, since that would mean there may be an infinite loop
572 in the function being compiled. */
573 jump_insn = 0;
574 break;
578 mark_referenced_resources (insn, &needed, 1);
579 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
581 COPY_HARD_REG_SET (scratch, set.regs);
582 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
583 AND_COMPL_HARD_REG_SET (res->regs, scratch);
586 return jump_insn;
589 /* Given X, a part of an insn, and a pointer to a `struct resource',
590 RES, indicate which resources are modified by the insn. If
591 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
592 set by the called routine. If MARK_TYPE is MARK_DEST, only mark SET_DESTs
594 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
595 objects are being referenced instead of set.
597 We never mark the insn as modifying the condition code unless it explicitly
598 SETs CC0 even though this is not totally correct. The reason for this is
599 that we require a SET of CC0 to immediately precede the reference to CC0.
600 So if some other insn sets CC0 as a side-effect, we know it cannot affect
601 our computation and thus may be placed in a delay slot. */
603 void
604 mark_set_resources (x, res, in_dest, mark_type)
605 register rtx x;
606 register struct resources *res;
607 int in_dest;
608 enum mark_resource_type mark_type;
610 enum rtx_code code;
611 int i, j;
612 unsigned int r;
613 const char *format_ptr;
615 restart:
617 code = GET_CODE (x);
619 switch (code)
621 case NOTE:
622 case BARRIER:
623 case CODE_LABEL:
624 case USE:
625 case CONST_INT:
626 case CONST_DOUBLE:
627 case LABEL_REF:
628 case SYMBOL_REF:
629 case CONST:
630 case PC:
631 /* These don't set any resources. */
632 return;
634 case CC0:
635 if (in_dest)
636 res->cc = 1;
637 return;
639 case CALL_INSN:
640 /* Called routine modifies the condition code, memory, any registers
641 that aren't saved across calls, global registers and anything
642 explicitly CLOBBERed immediately after the CALL_INSN. */
644 if (mark_type == MARK_SRC_DEST_CALL)
646 rtx next = NEXT_INSN (x);
647 rtx prev = PREV_INSN (x);
648 rtx link;
650 res->cc = res->memory = 1;
651 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
652 if (call_used_regs[r] || global_regs[r])
653 SET_HARD_REG_BIT (res->regs, r);
655 /* If X is part of a delay slot sequence, then NEXT should be
656 the first insn after the sequence. */
657 if (NEXT_INSN (prev) != x)
658 next = NEXT_INSN (NEXT_INSN (prev));
660 for (link = CALL_INSN_FUNCTION_USAGE (x);
661 link; link = XEXP (link, 1))
662 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
663 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
664 MARK_SRC_DEST);
666 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
667 assume that this call can clobber any register. */
668 if (next && GET_CODE (next) == NOTE
669 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
670 SET_HARD_REG_SET (res->regs);
673 /* ... and also what its RTL says it modifies, if anything. */
675 case JUMP_INSN:
676 case INSN:
678 /* An insn consisting of just a CLOBBER (or USE) is just for flow
679 and doesn't actually do anything, so we ignore it. */
681 #ifdef INSN_SETS_ARE_DELAYED
682 if (mark_type != MARK_SRC_DEST_CALL
683 && INSN_SETS_ARE_DELAYED (x))
684 return;
685 #endif
687 x = PATTERN (x);
688 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
689 goto restart;
690 return;
692 case SET:
693 /* If the source of a SET is a CALL, this is actually done by
694 the called routine. So only include it if we are to include the
695 effects of the calling routine. */
697 mark_set_resources (SET_DEST (x), res,
698 (mark_type == MARK_SRC_DEST_CALL
699 || GET_CODE (SET_SRC (x)) != CALL),
700 mark_type);
702 if (mark_type != MARK_DEST)
703 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
704 return;
706 case CLOBBER:
707 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
708 return;
710 case SEQUENCE:
711 for (i = 0; i < XVECLEN (x, 0); i++)
712 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
713 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
714 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
715 return;
717 case POST_INC:
718 case PRE_INC:
719 case POST_DEC:
720 case PRE_DEC:
721 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
722 return;
724 case SIGN_EXTRACT:
725 case ZERO_EXTRACT:
726 if (! (mark_type == MARK_DEST && in_dest))
728 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
729 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
730 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
732 return;
734 case MEM:
735 if (in_dest)
737 res->memory = 1;
738 res->unch_memory |= RTX_UNCHANGING_P (x);
739 res->volatil |= MEM_VOLATILE_P (x);
742 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
743 return;
745 case SUBREG:
746 if (in_dest)
748 if (GET_CODE (SUBREG_REG (x)) != REG)
749 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
750 else
752 unsigned int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
753 unsigned int last_regno
754 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
756 for (r = regno; r < last_regno; r++)
757 SET_HARD_REG_BIT (res->regs, r);
760 return;
762 case REG:
763 if (in_dest)
764 for (r = 0; r < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); r++)
765 SET_HARD_REG_BIT (res->regs, REGNO (x) + r);
766 return;
768 case STRICT_LOW_PART:
769 if (! (mark_type == MARK_DEST && in_dest))
771 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
772 return;
775 case UNSPEC_VOLATILE:
776 case ASM_INPUT:
777 /* Traditional asm's are always volatile. */
778 res->volatil = 1;
779 return;
781 case TRAP_IF:
782 res->volatil = 1;
783 break;
785 case ASM_OPERANDS:
786 res->volatil |= MEM_VOLATILE_P (x);
788 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
789 We can not just fall through here since then we would be confused
790 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
791 traditional asms unlike their normal usage. */
793 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
794 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
795 MARK_SRC_DEST);
796 return;
798 default:
799 break;
802 /* Process each sub-expression and flag what it needs. */
803 format_ptr = GET_RTX_FORMAT (code);
804 for (i = 0; i < GET_RTX_LENGTH (code); i++)
805 switch (*format_ptr++)
807 case 'e':
808 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
809 break;
811 case 'E':
812 for (j = 0; j < XVECLEN (x, i); j++)
813 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
814 break;
818 /* Set the resources that are live at TARGET.
820 If TARGET is zero, we refer to the end of the current function and can
821 return our precomputed value.
823 Otherwise, we try to find out what is live by consulting the basic block
824 information. This is tricky, because we must consider the actions of
825 reload and jump optimization, which occur after the basic block information
826 has been computed.
828 Accordingly, we proceed as follows::
830 We find the previous BARRIER and look at all immediately following labels
831 (with no intervening active insns) to see if any of them start a basic
832 block. If we hit the start of the function first, we use block 0.
834 Once we have found a basic block and a corresponding first insns, we can
835 accurately compute the live status from basic_block_live_regs and
836 reg_renumber. (By starting at a label following a BARRIER, we are immune
837 to actions taken by reload and jump.) Then we scan all insns between
838 that point and our target. For each CLOBBER (or for call-clobbered regs
839 when we pass a CALL_INSN), mark the appropriate registers are dead. For
840 a SET, mark them as live.
842 We have to be careful when using REG_DEAD notes because they are not
843 updated by such things as find_equiv_reg. So keep track of registers
844 marked as dead that haven't been assigned to, and mark them dead at the
845 next CODE_LABEL since reload and jump won't propagate values across labels.
847 If we cannot find the start of a basic block (should be a very rare
848 case, if it can happen at all), mark everything as potentially live.
850 Next, scan forward from TARGET looking for things set or clobbered
851 before they are used. These are not live.
853 Because we can be called many times on the same target, save our results
854 in a hash table indexed by INSN_UID. This is only done if the function
855 init_resource_info () was invoked before we are called. */
857 void
858 mark_target_live_regs (insns, target, res)
859 rtx insns;
860 rtx target;
861 struct resources *res;
863 int b = -1;
864 int i;
865 struct target_info *tinfo = NULL;
866 rtx insn;
867 rtx jump_insn = 0;
868 rtx jump_target;
869 HARD_REG_SET scratch;
870 struct resources set, needed;
872 /* Handle end of function. */
873 if (target == 0)
875 *res = end_of_function_needs;
876 return;
879 /* We have to assume memory is needed, but the CC isn't. */
880 res->memory = 1;
881 res->volatil = res->unch_memory = 0;
882 res->cc = 0;
884 /* See if we have computed this value already. */
885 if (target_hash_table != NULL)
887 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
888 tinfo; tinfo = tinfo->next)
889 if (tinfo->uid == INSN_UID (target))
890 break;
892 /* Start by getting the basic block number. If we have saved
893 information, we can get it from there unless the insn at the
894 start of the basic block has been deleted. */
895 if (tinfo && tinfo->block != -1
896 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
897 b = tinfo->block;
900 if (b == -1)
901 b = find_basic_block (target);
903 if (target_hash_table != NULL)
905 if (tinfo)
907 /* If the information is up-to-date, use it. Otherwise, we will
908 update it below. */
909 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
911 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
912 return;
915 else
917 /* Allocate a place to put our results and chain it into the
918 hash table. */
919 tinfo = (struct target_info *) oballoc (sizeof (struct target_info));
920 tinfo->uid = INSN_UID (target);
921 tinfo->block = b;
922 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
923 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
927 CLEAR_HARD_REG_SET (pending_dead_regs);
929 /* If we found a basic block, get the live registers from it and update
930 them with anything set or killed between its start and the insn before
931 TARGET. Otherwise, we must assume everything is live. */
932 if (b != -1)
934 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
935 unsigned int j;
936 unsigned int regno;
937 rtx start_insn, stop_insn;
939 /* Compute hard regs live at start of block -- this is the real hard regs
940 marked live, plus live pseudo regs that have been renumbered to
941 hard regs. */
943 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
945 EXECUTE_IF_SET_IN_REG_SET
946 (regs_live, FIRST_PSEUDO_REGISTER, i,
948 if (reg_renumber[i] >= 0)
950 regno = reg_renumber[i];
951 for (j = regno;
952 j < regno + HARD_REGNO_NREGS (regno,
953 PSEUDO_REGNO_MODE (i));
954 j++)
955 SET_HARD_REG_BIT (current_live_regs, j);
959 /* Get starting and ending insn, handling the case where each might
960 be a SEQUENCE. */
961 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
962 stop_insn = target;
964 if (GET_CODE (start_insn) == INSN
965 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
966 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
968 if (GET_CODE (stop_insn) == INSN
969 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
970 stop_insn = next_insn (PREV_INSN (stop_insn));
972 for (insn = start_insn; insn != stop_insn;
973 insn = next_insn_no_annul (insn))
975 rtx link;
976 rtx real_insn = insn;
978 /* If this insn is from the target of a branch, it isn't going to
979 be used in the sequel. If it is used in both cases, this
980 test will not be true. */
981 if (INSN_FROM_TARGET_P (insn))
982 continue;
984 /* If this insn is a USE made by update_block, we care about the
985 underlying insn. */
986 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
987 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
988 real_insn = XEXP (PATTERN (insn), 0);
990 if (GET_CODE (real_insn) == CALL_INSN)
992 /* CALL clobbers all call-used regs that aren't fixed except
993 sp, ap, and fp. Do this before setting the result of the
994 call live. */
995 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
996 if (call_used_regs[i]
997 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
998 && i != ARG_POINTER_REGNUM
999 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1000 && i != HARD_FRAME_POINTER_REGNUM
1001 #endif
1002 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1003 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
1004 #endif
1005 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
1006 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
1007 #endif
1009 CLEAR_HARD_REG_BIT (current_live_regs, i);
1011 /* A CALL_INSN sets any global register live, since it may
1012 have been modified by the call. */
1013 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1014 if (global_regs[i])
1015 SET_HARD_REG_BIT (current_live_regs, i);
1018 /* Mark anything killed in an insn to be deadened at the next
1019 label. Ignore USE insns; the only REG_DEAD notes will be for
1020 parameters. But they might be early. A CALL_INSN will usually
1021 clobber registers used for parameters. It isn't worth bothering
1022 with the unlikely case when it won't. */
1023 if ((GET_CODE (real_insn) == INSN
1024 && GET_CODE (PATTERN (real_insn)) != USE
1025 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1026 || GET_CODE (real_insn) == JUMP_INSN
1027 || GET_CODE (real_insn) == CALL_INSN)
1029 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1030 if (REG_NOTE_KIND (link) == REG_DEAD
1031 && GET_CODE (XEXP (link, 0)) == REG
1032 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1034 int first_regno = REGNO (XEXP (link, 0));
1035 int last_regno
1036 = (first_regno
1037 + HARD_REGNO_NREGS (first_regno,
1038 GET_MODE (XEXP (link, 0))));
1040 for (i = first_regno; i < last_regno; i++)
1041 SET_HARD_REG_BIT (pending_dead_regs, i);
1044 note_stores (PATTERN (real_insn), update_live_status, NULL);
1046 /* If any registers were unused after this insn, kill them.
1047 These notes will always be accurate. */
1048 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1049 if (REG_NOTE_KIND (link) == REG_UNUSED
1050 && GET_CODE (XEXP (link, 0)) == REG
1051 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1053 int first_regno = REGNO (XEXP (link, 0));
1054 int last_regno
1055 = (first_regno
1056 + HARD_REGNO_NREGS (first_regno,
1057 GET_MODE (XEXP (link, 0))));
1059 for (i = first_regno; i < last_regno; i++)
1060 CLEAR_HARD_REG_BIT (current_live_regs, i);
1064 else if (GET_CODE (real_insn) == CODE_LABEL)
1066 /* A label clobbers the pending dead registers since neither
1067 reload nor jump will propagate a value across a label. */
1068 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1069 CLEAR_HARD_REG_SET (pending_dead_regs);
1072 /* The beginning of the epilogue corresponds to the end of the
1073 RTL chain when there are no epilogue insns. Certain resources
1074 are implicitly required at that point. */
1075 else if (GET_CODE (real_insn) == NOTE
1076 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1077 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1080 COPY_HARD_REG_SET (res->regs, current_live_regs);
1081 if (tinfo != NULL)
1083 tinfo->block = b;
1084 tinfo->bb_tick = bb_ticks[b];
1087 else
1088 /* We didn't find the start of a basic block. Assume everything
1089 in use. This should happen only extremely rarely. */
1090 SET_HARD_REG_SET (res->regs);
1092 CLEAR_RESOURCE (&set);
1093 CLEAR_RESOURCE (&needed);
1095 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1096 set, needed);
1098 /* If we hit an unconditional branch, we have another way of finding out
1099 what is live: we can see what is live at the branch target and include
1100 anything used but not set before the branch. We add the live
1101 resources found using the test below to those found until now. */
1103 if (jump_insn)
1105 struct resources new_resources;
1106 rtx stop_insn = next_active_insn (jump_insn);
1108 mark_target_live_regs (insns, next_active_insn (jump_target),
1109 &new_resources);
1110 CLEAR_RESOURCE (&set);
1111 CLEAR_RESOURCE (&needed);
1113 /* Include JUMP_INSN in the needed registers. */
1114 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1116 mark_referenced_resources (insn, &needed, 1);
1118 COPY_HARD_REG_SET (scratch, needed.regs);
1119 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1120 IOR_HARD_REG_SET (new_resources.regs, scratch);
1122 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1125 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1128 if (tinfo != NULL)
1130 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1134 /* Initialize the resources required by mark_target_live_regs ().
1135 This should be invoked before the first call to mark_target_live_regs. */
1137 void
1138 init_resource_info (epilogue_insn)
1139 rtx epilogue_insn;
1141 int i;
1143 /* Indicate what resources are required to be valid at the end of the current
1144 function. The condition code never is and memory always is. If the
1145 frame pointer is needed, it is and so is the stack pointer unless
1146 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1147 stack pointer is. Registers used to return the function value are
1148 needed. Registers holding global variables are needed. */
1150 end_of_function_needs.cc = 0;
1151 end_of_function_needs.memory = 1;
1152 end_of_function_needs.unch_memory = 0;
1153 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1155 if (frame_pointer_needed)
1157 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1158 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1159 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1160 #endif
1161 #ifdef EXIT_IGNORE_STACK
1162 if (! EXIT_IGNORE_STACK
1163 || current_function_sp_is_unchanging)
1164 #endif
1165 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1167 else
1168 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1170 if (current_function_return_rtx != 0)
1171 mark_referenced_resources (current_function_return_rtx,
1172 &end_of_function_needs, 1);
1174 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1175 if (global_regs[i]
1176 #ifdef EPILOGUE_USES
1177 || EPILOGUE_USES (i)
1178 #endif
1180 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1182 /* The registers required to be live at the end of the function are
1183 represented in the flow information as being dead just prior to
1184 reaching the end of the function. For example, the return of a value
1185 might be represented by a USE of the return register immediately
1186 followed by an unconditional jump to the return label where the
1187 return label is the end of the RTL chain. The end of the RTL chain
1188 is then taken to mean that the return register is live.
1190 This sequence is no longer maintained when epilogue instructions are
1191 added to the RTL chain. To reconstruct the original meaning, the
1192 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1193 point where these registers become live (start_of_epilogue_needs).
1194 If epilogue instructions are present, the registers set by those
1195 instructions won't have been processed by flow. Thus, those
1196 registers are additionally required at the end of the RTL chain
1197 (end_of_function_needs). */
1199 start_of_epilogue_needs = end_of_function_needs;
1201 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1202 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1203 MARK_SRC_DEST_CALL);
1205 /* Allocate and initialize the tables used by mark_target_live_regs. */
1206 target_hash_table = (struct target_info **)
1207 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1208 bb_ticks = (int *) xcalloc (n_basic_blocks, sizeof (int));
1211 /* Free up the resources allcated to mark_target_live_regs (). This
1212 should be invoked after the last call to mark_target_live_regs (). */
1214 void
1215 free_resource_info ()
1217 if (target_hash_table != NULL)
1219 free (target_hash_table);
1220 target_hash_table = NULL;
1223 if (bb_ticks != NULL)
1225 free (bb_ticks);
1226 bb_ticks = NULL;
1230 /* Clear any hashed information that we have stored for INSN. */
1232 void
1233 clear_hashed_info_for_insn (insn)
1234 rtx insn;
1236 struct target_info *tinfo;
1238 if (target_hash_table != NULL)
1240 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1241 tinfo; tinfo = tinfo->next)
1242 if (tinfo->uid == INSN_UID (insn))
1243 break;
1245 if (tinfo)
1246 tinfo->block = -1;
1250 /* Increment the tick count for the basic block that contains INSN. */
1252 void
1253 incr_ticks_for_insn (insn)
1254 rtx insn;
1256 int b = find_basic_block (insn);
1258 if (b != -1)
1259 bb_ticks[b]++;
1262 /* Add TRIAL to the set of resources used at the end of the current
1263 function. */
1264 void
1265 mark_end_of_function_resources (trial, include_delayed_effects)
1266 rtx trial;
1267 int include_delayed_effects;
1269 mark_referenced_resources (trial, &end_of_function_needs,
1270 include_delayed_effects);