1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
50 #include "coretypes.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
60 #include "conditions.h"
63 #include "hard-reg-set.h"
70 #include "basic-block.h"
74 #include "cfglayout.h"
75 #include "tree-pass.h"
80 #ifdef XCOFF_DEBUGGING_INFO
81 #include "xcoffout.h" /* Needed for external data
82 declarations for e.g. AIX 4.x. */
85 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
86 #include "dwarf2out.h"
89 #ifdef DBX_DEBUGGING_INFO
93 #ifdef SDB_DEBUGGING_INFO
97 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
98 null default for it to save conditionalization later. */
99 #ifndef CC_STATUS_INIT
100 #define CC_STATUS_INIT
103 /* How to start an assembler comment. */
104 #ifndef ASM_COMMENT_START
105 #define ASM_COMMENT_START ";#"
108 /* Is the given character a logical line separator for the assembler? */
109 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
110 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
113 #ifndef JUMP_TABLES_IN_TEXT_SECTION
114 #define JUMP_TABLES_IN_TEXT_SECTION 0
117 /* Bitflags used by final_scan_insn. */
120 #define SEEN_EMITTED 4
122 /* Last insn processed by final_scan_insn. */
123 static rtx debug_insn
;
124 rtx current_output_insn
;
126 /* Line number of last NOTE. */
127 static int last_linenum
;
129 /* Highest line number in current block. */
130 static int high_block_linenum
;
132 /* Likewise for function. */
133 static int high_function_linenum
;
135 /* Filename of last NOTE. */
136 static const char *last_filename
;
138 /* Whether to force emission of a line note before the next insn. */
139 static bool force_source_line
= false;
141 extern const int length_unit_log
; /* This is defined in insn-attrtab.c. */
143 /* Nonzero while outputting an `asm' with operands.
144 This means that inconsistencies are the user's fault, so don't die.
145 The precise value is the insn being output, to pass to error_for_asm. */
146 rtx this_is_asm_operands
;
148 /* Number of operands of this insn, for an `asm' with operands. */
149 static unsigned int insn_noperands
;
151 /* Compare optimization flag. */
153 static rtx last_ignored_compare
= 0;
155 /* Assign a unique number to each insn that is output.
156 This can be used to generate unique local labels. */
158 static int insn_counter
= 0;
161 /* This variable contains machine-dependent flags (defined in tm.h)
162 set and examined by output routines
163 that describe how to interpret the condition codes properly. */
167 /* During output of an insn, this contains a copy of cc_status
168 from before the insn. */
170 CC_STATUS cc_prev_status
;
173 /* Indexed by hardware reg number, is 1 if that register is ever
174 used in the current function.
176 In life_analysis, or in stupid_life_analysis, this is set
177 up to record the hard regs used explicitly. Reload adds
178 in the hard regs used for holding pseudo regs. Final uses
179 it to generate the code in the function prologue and epilogue
180 to save and restore registers as needed. */
182 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
184 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
185 Unlike regs_ever_live, elements of this array corresponding to
186 eliminable regs like the frame pointer are set if an asm sets them. */
188 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
190 /* Nonzero means current function must be given a frame pointer.
191 Initialized in function.c to 0. Set only in reload1.c as per
192 the needs of the function. */
194 int frame_pointer_needed
;
196 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
198 static int block_depth
;
200 /* Nonzero if have enabled APP processing of our assembler output. */
204 /* If we are outputting an insn sequence, this contains the sequence rtx.
209 #ifdef ASSEMBLER_DIALECT
211 /* Number of the assembler dialect to use, starting at 0. */
212 static int dialect_number
;
215 #ifdef HAVE_conditional_execution
216 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
217 rtx current_insn_predicate
;
220 #ifdef HAVE_ATTR_length
221 static int asm_insn_count (rtx
);
223 static void profile_function (FILE *);
224 static void profile_after_prologue (FILE *);
225 static bool notice_source_line (rtx
);
226 static rtx
walk_alter_subreg (rtx
*);
227 static void output_asm_name (void);
228 static void output_alternate_entry_point (FILE *, rtx
);
229 static tree
get_mem_expr_from_op (rtx
, int *);
230 static void output_asm_operand_names (rtx
*, int *, int);
231 static void output_operand (rtx
, int);
232 #ifdef LEAF_REGISTERS
233 static void leaf_renumber_regs (rtx
);
236 static int alter_cond (rtx
);
238 #ifndef ADDR_VEC_ALIGN
239 static int final_addr_vec_align (rtx
);
241 #ifdef HAVE_ATTR_length
242 static int align_fuzz (rtx
, rtx
, int, unsigned);
245 /* Initialize data in final at the beginning of a compilation. */
248 init_final (const char *filename ATTRIBUTE_UNUSED
)
253 #ifdef ASSEMBLER_DIALECT
254 dialect_number
= ASSEMBLER_DIALECT
;
258 /* Default target function prologue and epilogue assembler output.
260 If not overridden for epilogue code, then the function body itself
261 contains return instructions wherever needed. */
263 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
264 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
268 /* Default target hook that outputs nothing to a stream. */
270 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
274 /* Enable APP processing of subsequent output.
275 Used before the output from an `asm' statement. */
282 fputs (ASM_APP_ON
, asm_out_file
);
287 /* Disable APP processing of subsequent output.
288 Called from varasm.c before most kinds of output. */
295 fputs (ASM_APP_OFF
, asm_out_file
);
300 /* Return the number of slots filled in the current
301 delayed branch sequence (we don't count the insn needing the
302 delay slot). Zero if not in a delayed branch sequence. */
306 dbr_sequence_length (void)
308 if (final_sequence
!= 0)
309 return XVECLEN (final_sequence
, 0) - 1;
315 /* The next two pages contain routines used to compute the length of an insn
316 and to shorten branches. */
318 /* Arrays for insn lengths, and addresses. The latter is referenced by
319 `insn_current_length'. */
321 static int *insn_lengths
;
323 varray_type insn_addresses_
;
325 /* Max uid for which the above arrays are valid. */
326 static int insn_lengths_max_uid
;
328 /* Address of insn being processed. Used by `insn_current_length'. */
329 int insn_current_address
;
331 /* Address of insn being processed in previous iteration. */
332 int insn_last_address
;
334 /* known invariant alignment of insn being processed. */
335 int insn_current_align
;
337 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
338 gives the next following alignment insn that increases the known
339 alignment, or NULL_RTX if there is no such insn.
340 For any alignment obtained this way, we can again index uid_align with
341 its uid to obtain the next following align that in turn increases the
342 alignment, till we reach NULL_RTX; the sequence obtained this way
343 for each insn we'll call the alignment chain of this insn in the following
346 struct label_alignment
352 static rtx
*uid_align
;
353 static int *uid_shuid
;
354 static struct label_alignment
*label_align
;
356 /* Indicate that branch shortening hasn't yet been done. */
359 init_insn_lengths (void)
370 insn_lengths_max_uid
= 0;
372 #ifdef HAVE_ATTR_length
373 INSN_ADDRESSES_FREE ();
382 /* Obtain the current length of an insn. If branch shortening has been done,
383 get its actual length. Otherwise, use FALLBACK_FN to calcualte the
386 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
387 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
389 #ifdef HAVE_ATTR_length
394 if (insn_lengths_max_uid
> INSN_UID (insn
))
395 return insn_lengths
[INSN_UID (insn
)];
397 switch (GET_CODE (insn
))
405 length
= fallback_fn (insn
);
409 body
= PATTERN (insn
);
410 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
412 /* Alignment is machine-dependent and should be handled by
416 length
= fallback_fn (insn
);
420 body
= PATTERN (insn
);
421 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
424 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
425 length
= asm_insn_count (body
) * fallback_fn (insn
);
426 else if (GET_CODE (body
) == SEQUENCE
)
427 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
428 length
+= get_attr_length (XVECEXP (body
, 0, i
));
430 length
= fallback_fn (insn
);
437 #ifdef ADJUST_INSN_LENGTH
438 ADJUST_INSN_LENGTH (insn
, length
);
441 #else /* not HAVE_ATTR_length */
443 #define insn_default_length 0
444 #define insn_min_length 0
445 #endif /* not HAVE_ATTR_length */
448 /* Obtain the current length of an insn. If branch shortening has been done,
449 get its actual length. Otherwise, get its maximum length. */
451 get_attr_length (rtx insn
)
453 return get_attr_length_1 (insn
, insn_default_length
);
456 /* Obtain the current length of an insn. If branch shortening has been done,
457 get its actual length. Otherwise, get its minimum length. */
459 get_attr_min_length (rtx insn
)
461 return get_attr_length_1 (insn
, insn_min_length
);
464 /* Code to handle alignment inside shorten_branches. */
466 /* Here is an explanation how the algorithm in align_fuzz can give
469 Call a sequence of instructions beginning with alignment point X
470 and continuing until the next alignment point `block X'. When `X'
471 is used in an expression, it means the alignment value of the
474 Call the distance between the start of the first insn of block X, and
475 the end of the last insn of block X `IX', for the `inner size of X'.
476 This is clearly the sum of the instruction lengths.
478 Likewise with the next alignment-delimited block following X, which we
481 Call the distance between the start of the first insn of block X, and
482 the start of the first insn of block Y `OX', for the `outer size of X'.
484 The estimated padding is then OX - IX.
486 OX can be safely estimated as
491 OX = round_up(IX, X) + Y - X
493 Clearly est(IX) >= real(IX), because that only depends on the
494 instruction lengths, and those being overestimated is a given.
496 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
497 we needn't worry about that when thinking about OX.
499 When X >= Y, the alignment provided by Y adds no uncertainty factor
500 for branch ranges starting before X, so we can just round what we have.
501 But when X < Y, we don't know anything about the, so to speak,
502 `middle bits', so we have to assume the worst when aligning up from an
503 address mod X to one mod Y, which is Y - X. */
506 #define LABEL_ALIGN(LABEL) align_labels_log
509 #ifndef LABEL_ALIGN_MAX_SKIP
510 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
514 #define LOOP_ALIGN(LABEL) align_loops_log
517 #ifndef LOOP_ALIGN_MAX_SKIP
518 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
521 #ifndef LABEL_ALIGN_AFTER_BARRIER
522 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
525 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
526 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
530 #define JUMP_ALIGN(LABEL) align_jumps_log
533 #ifndef JUMP_ALIGN_MAX_SKIP
534 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
537 #ifndef ADDR_VEC_ALIGN
539 final_addr_vec_align (rtx addr_vec
)
541 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
543 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
544 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
545 return exact_log2 (align
);
549 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
552 #ifndef INSN_LENGTH_ALIGNMENT
553 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
556 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
558 static int min_labelno
, max_labelno
;
560 #define LABEL_TO_ALIGNMENT(LABEL) \
561 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
563 #define LABEL_TO_MAX_SKIP(LABEL) \
564 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
566 /* For the benefit of port specific code do this also as a function. */
569 label_to_alignment (rtx label
)
571 return LABEL_TO_ALIGNMENT (label
);
574 #ifdef HAVE_ATTR_length
575 /* The differences in addresses
576 between a branch and its target might grow or shrink depending on
577 the alignment the start insn of the range (the branch for a forward
578 branch or the label for a backward branch) starts out on; if these
579 differences are used naively, they can even oscillate infinitely.
580 We therefore want to compute a 'worst case' address difference that
581 is independent of the alignment the start insn of the range end
582 up on, and that is at least as large as the actual difference.
583 The function align_fuzz calculates the amount we have to add to the
584 naively computed difference, by traversing the part of the alignment
585 chain of the start insn of the range that is in front of the end insn
586 of the range, and considering for each alignment the maximum amount
587 that it might contribute to a size increase.
589 For casesi tables, we also want to know worst case minimum amounts of
590 address difference, in case a machine description wants to introduce
591 some common offset that is added to all offsets in a table.
592 For this purpose, align_fuzz with a growth argument of 0 computes the
593 appropriate adjustment. */
595 /* Compute the maximum delta by which the difference of the addresses of
596 START and END might grow / shrink due to a different address for start
597 which changes the size of alignment insns between START and END.
598 KNOWN_ALIGN_LOG is the alignment known for START.
599 GROWTH should be ~0 if the objective is to compute potential code size
600 increase, and 0 if the objective is to compute potential shrink.
601 The return value is undefined for any other value of GROWTH. */
604 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
606 int uid
= INSN_UID (start
);
608 int known_align
= 1 << known_align_log
;
609 int end_shuid
= INSN_SHUID (end
);
612 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
614 int align_addr
, new_align
;
616 uid
= INSN_UID (align_label
);
617 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
618 if (uid_shuid
[uid
] > end_shuid
)
620 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
621 new_align
= 1 << known_align_log
;
622 if (new_align
< known_align
)
624 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
625 known_align
= new_align
;
630 /* Compute a worst-case reference address of a branch so that it
631 can be safely used in the presence of aligned labels. Since the
632 size of the branch itself is unknown, the size of the branch is
633 not included in the range. I.e. for a forward branch, the reference
634 address is the end address of the branch as known from the previous
635 branch shortening pass, minus a value to account for possible size
636 increase due to alignment. For a backward branch, it is the start
637 address of the branch as known from the current pass, plus a value
638 to account for possible size increase due to alignment.
639 NB.: Therefore, the maximum offset allowed for backward branches needs
640 to exclude the branch size. */
643 insn_current_reference_address (rtx branch
)
648 if (! INSN_ADDRESSES_SET_P ())
651 seq
= NEXT_INSN (PREV_INSN (branch
));
652 seq_uid
= INSN_UID (seq
);
653 if (!JUMP_P (branch
))
654 /* This can happen for example on the PA; the objective is to know the
655 offset to address something in front of the start of the function.
656 Thus, we can treat it like a backward branch.
657 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
658 any alignment we'd encounter, so we skip the call to align_fuzz. */
659 return insn_current_address
;
660 dest
= JUMP_LABEL (branch
);
662 /* BRANCH has no proper alignment chain set, so use SEQ.
663 BRANCH also has no INSN_SHUID. */
664 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
666 /* Forward branch. */
667 return (insn_last_address
+ insn_lengths
[seq_uid
]
668 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
672 /* Backward branch. */
673 return (insn_current_address
674 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
677 #endif /* HAVE_ATTR_length */
679 /* Compute branch alignments based on frequency information in the
683 compute_alignments (void)
685 int log
, max_skip
, max_log
;
694 max_labelno
= max_label_num ();
695 min_labelno
= get_first_label_num ();
696 label_align
= XCNEWVEC (struct label_alignment
, max_labelno
- min_labelno
+ 1);
698 /* If not optimizing or optimizing for size, don't assign any alignments. */
699 if (! optimize
|| optimize_size
)
704 rtx label
= BB_HEAD (bb
);
705 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
710 || probably_never_executed_bb_p (bb
))
712 max_log
= LABEL_ALIGN (label
);
713 max_skip
= LABEL_ALIGN_MAX_SKIP
;
715 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
717 if (e
->flags
& EDGE_FALLTHRU
)
718 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
720 branch_frequency
+= EDGE_FREQUENCY (e
);
723 /* There are two purposes to align block with no fallthru incoming edge:
724 1) to avoid fetch stalls when branch destination is near cache boundary
725 2) to improve cache efficiency in case the previous block is not executed
726 (so it does not need to be in the cache).
728 We to catch first case, we align frequently executed blocks.
729 To catch the second, we align blocks that are executed more frequently
730 than the predecessor and the predecessor is likely to not be executed
731 when function is called. */
734 && (branch_frequency
> BB_FREQ_MAX
/ 10
735 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
736 && (bb
->prev_bb
->frequency
737 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
739 log
= JUMP_ALIGN (label
);
743 max_skip
= JUMP_ALIGN_MAX_SKIP
;
746 /* In case block is frequent and reached mostly by non-fallthru edge,
747 align it. It is most likely a first block of loop. */
749 && maybe_hot_bb_p (bb
)
750 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
751 && branch_frequency
> fallthru_frequency
* 2)
753 log
= LOOP_ALIGN (label
);
757 max_skip
= LOOP_ALIGN_MAX_SKIP
;
760 LABEL_TO_ALIGNMENT (label
) = max_log
;
761 LABEL_TO_MAX_SKIP (label
) = max_skip
;
765 struct tree_opt_pass pass_compute_alignments
=
769 compute_alignments
, /* execute */
772 0, /* static_pass_number */
774 0, /* properties_required */
775 0, /* properties_provided */
776 0, /* properties_destroyed */
777 0, /* todo_flags_start */
778 0, /* todo_flags_finish */
783 /* Make a pass over all insns and compute their actual lengths by shortening
784 any branches of variable length if possible. */
786 /* shorten_branches might be called multiple times: for example, the SH
787 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
788 In order to do this, it needs proper length information, which it obtains
789 by calling shorten_branches. This cannot be collapsed with
790 shorten_branches itself into a single pass unless we also want to integrate
791 reorg.c, since the branch splitting exposes new instructions with delay
795 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
802 #ifdef HAVE_ATTR_length
803 #define MAX_CODE_ALIGN 16
805 int something_changed
= 1;
806 char *varying_length
;
809 rtx align_tab
[MAX_CODE_ALIGN
];
813 /* Compute maximum UID and allocate label_align / uid_shuid. */
814 max_uid
= get_max_uid ();
816 /* Free uid_shuid before reallocating it. */
819 uid_shuid
= XNEWVEC (int, max_uid
);
821 if (max_labelno
!= max_label_num ())
823 int old
= max_labelno
;
827 max_labelno
= max_label_num ();
829 n_labels
= max_labelno
- min_labelno
+ 1;
830 n_old_labels
= old
- min_labelno
+ 1;
832 label_align
= xrealloc (label_align
,
833 n_labels
* sizeof (struct label_alignment
));
835 /* Range of labels grows monotonically in the function. Failing here
836 means that the initialization of array got lost. */
837 gcc_assert (n_old_labels
<= n_labels
);
839 memset (label_align
+ n_old_labels
, 0,
840 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
843 /* Initialize label_align and set up uid_shuid to be strictly
844 monotonically rising with insn order. */
845 /* We use max_log here to keep track of the maximum alignment we want to
846 impose on the next CODE_LABEL (or the current one if we are processing
847 the CODE_LABEL itself). */
852 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
856 INSN_SHUID (insn
) = i
++;
859 /* reorg might make the first insn of a loop being run once only,
860 and delete the label in front of it. Then we want to apply
861 the loop alignment to the new label created by reorg, which
862 is separated by the former loop start insn from the
863 NOTE_INSN_LOOP_BEG. */
865 else if (LABEL_P (insn
))
869 /* Merge in alignments computed by compute_alignments. */
870 log
= LABEL_TO_ALIGNMENT (insn
);
874 max_skip
= LABEL_TO_MAX_SKIP (insn
);
877 log
= LABEL_ALIGN (insn
);
881 max_skip
= LABEL_ALIGN_MAX_SKIP
;
883 next
= next_nonnote_insn (insn
);
884 /* ADDR_VECs only take room if read-only data goes into the text
886 if (JUMP_TABLES_IN_TEXT_SECTION
887 || readonly_data_section
== text_section
)
888 if (next
&& JUMP_P (next
))
890 rtx nextbody
= PATTERN (next
);
891 if (GET_CODE (nextbody
) == ADDR_VEC
892 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
894 log
= ADDR_VEC_ALIGN (next
);
898 max_skip
= LABEL_ALIGN_MAX_SKIP
;
902 LABEL_TO_ALIGNMENT (insn
) = max_log
;
903 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
907 else if (BARRIER_P (insn
))
911 for (label
= insn
; label
&& ! INSN_P (label
);
912 label
= NEXT_INSN (label
))
915 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
919 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
925 #ifdef HAVE_ATTR_length
927 /* Allocate the rest of the arrays. */
928 insn_lengths
= XNEWVEC (int, max_uid
);
929 insn_lengths_max_uid
= max_uid
;
930 /* Syntax errors can lead to labels being outside of the main insn stream.
931 Initialize insn_addresses, so that we get reproducible results. */
932 INSN_ADDRESSES_ALLOC (max_uid
);
934 varying_length
= XCNEWVEC (char, max_uid
);
936 /* Initialize uid_align. We scan instructions
937 from end to start, and keep in align_tab[n] the last seen insn
938 that does an alignment of at least n+1, i.e. the successor
939 in the alignment chain for an insn that does / has a known
941 uid_align
= XCNEWVEC (rtx
, max_uid
);
943 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
944 align_tab
[i
] = NULL_RTX
;
945 seq
= get_last_insn ();
946 for (; seq
; seq
= PREV_INSN (seq
))
948 int uid
= INSN_UID (seq
);
950 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
951 uid_align
[uid
] = align_tab
[0];
954 /* Found an alignment label. */
955 uid_align
[uid
] = align_tab
[log
];
956 for (i
= log
- 1; i
>= 0; i
--)
960 #ifdef CASE_VECTOR_SHORTEN_MODE
963 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
966 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
967 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
970 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
972 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
973 int len
, i
, min
, max
, insn_shuid
;
975 addr_diff_vec_flags flags
;
978 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
980 pat
= PATTERN (insn
);
981 len
= XVECLEN (pat
, 1);
982 gcc_assert (len
> 0);
983 min_align
= MAX_CODE_ALIGN
;
984 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
986 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
987 int shuid
= INSN_SHUID (lab
);
998 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
999 min_align
= LABEL_TO_ALIGNMENT (lab
);
1001 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
1002 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
1003 insn_shuid
= INSN_SHUID (insn
);
1004 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1005 memset (&flags
, 0, sizeof (flags
));
1006 flags
.min_align
= min_align
;
1007 flags
.base_after_vec
= rel
> insn_shuid
;
1008 flags
.min_after_vec
= min
> insn_shuid
;
1009 flags
.max_after_vec
= max
> insn_shuid
;
1010 flags
.min_after_base
= min
> rel
;
1011 flags
.max_after_base
= max
> rel
;
1012 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1015 #endif /* CASE_VECTOR_SHORTEN_MODE */
1017 /* Compute initial lengths, addresses, and varying flags for each insn. */
1018 for (insn_current_address
= 0, insn
= first
;
1020 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1022 uid
= INSN_UID (insn
);
1024 insn_lengths
[uid
] = 0;
1028 int log
= LABEL_TO_ALIGNMENT (insn
);
1031 int align
= 1 << log
;
1032 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1033 insn_lengths
[uid
] = new_address
- insn_current_address
;
1037 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1039 if (NOTE_P (insn
) || BARRIER_P (insn
)
1042 if (INSN_DELETED_P (insn
))
1045 body
= PATTERN (insn
);
1046 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1048 /* This only takes room if read-only data goes into the text
1050 if (JUMP_TABLES_IN_TEXT_SECTION
1051 || readonly_data_section
== text_section
)
1052 insn_lengths
[uid
] = (XVECLEN (body
,
1053 GET_CODE (body
) == ADDR_DIFF_VEC
)
1054 * GET_MODE_SIZE (GET_MODE (body
)));
1055 /* Alignment is handled by ADDR_VEC_ALIGN. */
1057 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1058 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1059 else if (GET_CODE (body
) == SEQUENCE
)
1062 int const_delay_slots
;
1064 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1066 const_delay_slots
= 0;
1068 /* Inside a delay slot sequence, we do not do any branch shortening
1069 if the shortening could change the number of delay slots
1071 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1073 rtx inner_insn
= XVECEXP (body
, 0, i
);
1074 int inner_uid
= INSN_UID (inner_insn
);
1077 if (GET_CODE (body
) == ASM_INPUT
1078 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1079 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1080 * insn_default_length (inner_insn
));
1082 inner_length
= insn_default_length (inner_insn
);
1084 insn_lengths
[inner_uid
] = inner_length
;
1085 if (const_delay_slots
)
1087 if ((varying_length
[inner_uid
]
1088 = insn_variable_length_p (inner_insn
)) != 0)
1089 varying_length
[uid
] = 1;
1090 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1091 + insn_lengths
[uid
]);
1094 varying_length
[inner_uid
] = 0;
1095 insn_lengths
[uid
] += inner_length
;
1098 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1100 insn_lengths
[uid
] = insn_default_length (insn
);
1101 varying_length
[uid
] = insn_variable_length_p (insn
);
1104 /* If needed, do any adjustment. */
1105 #ifdef ADJUST_INSN_LENGTH
1106 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1107 if (insn_lengths
[uid
] < 0)
1108 fatal_insn ("negative insn length", insn
);
1112 /* Now loop over all the insns finding varying length insns. For each,
1113 get the current insn length. If it has changed, reflect the change.
1114 When nothing changes for a full pass, we are done. */
1116 while (something_changed
)
1118 something_changed
= 0;
1119 insn_current_align
= MAX_CODE_ALIGN
- 1;
1120 for (insn_current_address
= 0, insn
= first
;
1122 insn
= NEXT_INSN (insn
))
1125 #ifdef ADJUST_INSN_LENGTH
1130 uid
= INSN_UID (insn
);
1134 int log
= LABEL_TO_ALIGNMENT (insn
);
1135 if (log
> insn_current_align
)
1137 int align
= 1 << log
;
1138 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1139 insn_lengths
[uid
] = new_address
- insn_current_address
;
1140 insn_current_align
= log
;
1141 insn_current_address
= new_address
;
1144 insn_lengths
[uid
] = 0;
1145 INSN_ADDRESSES (uid
) = insn_current_address
;
1149 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1150 if (length_align
< insn_current_align
)
1151 insn_current_align
= length_align
;
1153 insn_last_address
= INSN_ADDRESSES (uid
);
1154 INSN_ADDRESSES (uid
) = insn_current_address
;
1156 #ifdef CASE_VECTOR_SHORTEN_MODE
1157 if (optimize
&& JUMP_P (insn
)
1158 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1160 rtx body
= PATTERN (insn
);
1161 int old_length
= insn_lengths
[uid
];
1162 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1163 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1164 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1165 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1166 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1167 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1170 addr_diff_vec_flags flags
;
1172 /* Avoid automatic aggregate initialization. */
1173 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1175 /* Try to find a known alignment for rel_lab. */
1176 for (prev
= rel_lab
;
1178 && ! insn_lengths
[INSN_UID (prev
)]
1179 && ! (varying_length
[INSN_UID (prev
)] & 1);
1180 prev
= PREV_INSN (prev
))
1181 if (varying_length
[INSN_UID (prev
)] & 2)
1183 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1187 /* See the comment on addr_diff_vec_flags in rtl.h for the
1188 meaning of the flags values. base: REL_LAB vec: INSN */
1189 /* Anything after INSN has still addresses from the last
1190 pass; adjust these so that they reflect our current
1191 estimate for this pass. */
1192 if (flags
.base_after_vec
)
1193 rel_addr
+= insn_current_address
- insn_last_address
;
1194 if (flags
.min_after_vec
)
1195 min_addr
+= insn_current_address
- insn_last_address
;
1196 if (flags
.max_after_vec
)
1197 max_addr
+= insn_current_address
- insn_last_address
;
1198 /* We want to know the worst case, i.e. lowest possible value
1199 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1200 its offset is positive, and we have to be wary of code shrink;
1201 otherwise, it is negative, and we have to be vary of code
1203 if (flags
.min_after_base
)
1205 /* If INSN is between REL_LAB and MIN_LAB, the size
1206 changes we are about to make can change the alignment
1207 within the observed offset, therefore we have to break
1208 it up into two parts that are independent. */
1209 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1211 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1212 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1215 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1219 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1221 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1222 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1225 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1227 /* Likewise, determine the highest lowest possible value
1228 for the offset of MAX_LAB. */
1229 if (flags
.max_after_base
)
1231 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1233 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1234 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1237 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1241 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1243 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1244 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1247 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1249 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1250 max_addr
- rel_addr
,
1252 if (JUMP_TABLES_IN_TEXT_SECTION
1253 || readonly_data_section
== text_section
)
1256 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1257 insn_current_address
+= insn_lengths
[uid
];
1258 if (insn_lengths
[uid
] != old_length
)
1259 something_changed
= 1;
1264 #endif /* CASE_VECTOR_SHORTEN_MODE */
1266 if (! (varying_length
[uid
]))
1268 if (NONJUMP_INSN_P (insn
)
1269 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1273 body
= PATTERN (insn
);
1274 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1276 rtx inner_insn
= XVECEXP (body
, 0, i
);
1277 int inner_uid
= INSN_UID (inner_insn
);
1279 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1281 insn_current_address
+= insn_lengths
[inner_uid
];
1285 insn_current_address
+= insn_lengths
[uid
];
1290 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1294 body
= PATTERN (insn
);
1296 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1298 rtx inner_insn
= XVECEXP (body
, 0, i
);
1299 int inner_uid
= INSN_UID (inner_insn
);
1302 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1304 /* insn_current_length returns 0 for insns with a
1305 non-varying length. */
1306 if (! varying_length
[inner_uid
])
1307 inner_length
= insn_lengths
[inner_uid
];
1309 inner_length
= insn_current_length (inner_insn
);
1311 if (inner_length
!= insn_lengths
[inner_uid
])
1313 insn_lengths
[inner_uid
] = inner_length
;
1314 something_changed
= 1;
1316 insn_current_address
+= insn_lengths
[inner_uid
];
1317 new_length
+= inner_length
;
1322 new_length
= insn_current_length (insn
);
1323 insn_current_address
+= new_length
;
1326 #ifdef ADJUST_INSN_LENGTH
1327 /* If needed, do any adjustment. */
1328 tmp_length
= new_length
;
1329 ADJUST_INSN_LENGTH (insn
, new_length
);
1330 insn_current_address
+= (new_length
- tmp_length
);
1333 if (new_length
!= insn_lengths
[uid
])
1335 insn_lengths
[uid
] = new_length
;
1336 something_changed
= 1;
1339 /* For a non-optimizing compile, do only a single pass. */
1344 free (varying_length
);
1346 #endif /* HAVE_ATTR_length */
1349 #ifdef HAVE_ATTR_length
1350 /* Given the body of an INSN known to be generated by an ASM statement, return
1351 the number of machine instructions likely to be generated for this insn.
1352 This is used to compute its length. */
1355 asm_insn_count (rtx body
)
1357 const char *template;
1360 if (GET_CODE (body
) == ASM_INPUT
)
1361 template = XSTR (body
, 0);
1363 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1365 for (; *template; template++)
1366 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1373 /* Output assembler code for the start of a function,
1374 and initialize some of the variables in this file
1375 for the new function. The label for the function and associated
1376 assembler pseudo-ops have already been output in `assemble_start_function'.
1378 FIRST is the first insn of the rtl for the function being compiled.
1379 FILE is the file to write assembler code to.
1380 OPTIMIZE is nonzero if we should eliminate redundant
1381 test and compare insns. */
1384 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1385 int optimize ATTRIBUTE_UNUSED
)
1389 this_is_asm_operands
= 0;
1391 last_filename
= locator_file (prologue_locator
);
1392 last_linenum
= locator_line (prologue_locator
);
1394 high_block_linenum
= high_function_linenum
= last_linenum
;
1396 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1398 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1399 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1400 dwarf2out_begin_prologue (0, NULL
);
1403 #ifdef LEAF_REG_REMAP
1404 if (current_function_uses_only_leaf_regs
)
1405 leaf_renumber_regs (first
);
1408 /* The Sun386i and perhaps other machines don't work right
1409 if the profiling code comes after the prologue. */
1410 #ifdef PROFILE_BEFORE_PROLOGUE
1411 if (current_function_profile
)
1412 profile_function (file
);
1413 #endif /* PROFILE_BEFORE_PROLOGUE */
1415 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1416 if (dwarf2out_do_frame ())
1417 dwarf2out_frame_debug (NULL_RTX
, false);
1420 /* If debugging, assign block numbers to all of the blocks in this
1424 remove_unnecessary_notes ();
1425 reemit_insn_block_notes ();
1426 number_blocks (current_function_decl
);
1427 /* We never actually put out begin/end notes for the top-level
1428 block in the function. But, conceptually, that block is
1430 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1433 /* First output the function prologue: code to set up the stack frame. */
1434 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1436 /* If the machine represents the prologue as RTL, the profiling code must
1437 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1438 #ifdef HAVE_prologue
1439 if (! HAVE_prologue
)
1441 profile_after_prologue (file
);
1445 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1447 #ifndef PROFILE_BEFORE_PROLOGUE
1448 if (current_function_profile
)
1449 profile_function (file
);
1450 #endif /* not PROFILE_BEFORE_PROLOGUE */
1454 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1456 #ifndef NO_PROFILE_COUNTERS
1457 # define NO_PROFILE_COUNTERS 0
1459 #if defined(ASM_OUTPUT_REG_PUSH)
1460 int sval
= current_function_returns_struct
;
1461 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1462 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1463 int cxt
= cfun
->static_chain_decl
!= NULL
;
1465 #endif /* ASM_OUTPUT_REG_PUSH */
1467 if (! NO_PROFILE_COUNTERS
)
1469 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1470 switch_to_section (data_section
);
1471 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1472 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1473 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1476 switch_to_section (current_function_section ());
1478 #if defined(ASM_OUTPUT_REG_PUSH)
1479 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1480 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1483 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1485 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1487 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1490 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1495 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1497 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1499 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1501 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1504 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1509 #if defined(ASM_OUTPUT_REG_PUSH)
1510 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1511 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1515 /* Output assembler code for the end of a function.
1516 For clarity, args are same as those of `final_start_function'
1517 even though not all of them are needed. */
1520 final_end_function (void)
1524 (*debug_hooks
->end_function
) (high_function_linenum
);
1526 /* Finally, output the function epilogue:
1527 code to restore the stack frame and return to the caller. */
1528 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1530 /* And debug output. */
1531 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1533 #if defined (DWARF2_UNWIND_INFO)
1534 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1535 && dwarf2out_do_frame ())
1536 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1540 /* Output assembler code for some insns: all or part of a function.
1541 For description of args, see `final_start_function', above. */
1544 final (rtx first
, FILE *file
, int optimize
)
1550 last_ignored_compare
= 0;
1552 #ifdef SDB_DEBUGGING_INFO
1553 /* When producing SDB debugging info, delete troublesome line number
1554 notes from inlined functions in other files as well as duplicate
1555 line number notes. */
1556 if (write_symbols
== SDB_DEBUG
)
1559 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1560 if (NOTE_P (insn
) && NOTE_LINE_NUMBER (insn
) > 0)
1563 #ifdef USE_MAPPED_LOCATION
1564 && NOTE_SOURCE_LOCATION (insn
) == NOTE_SOURCE_LOCATION (last
)
1566 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1567 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)
1571 delete_insn (insn
); /* Use delete_note. */
1579 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1581 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1582 max_uid
= INSN_UID (insn
);
1584 /* If CC tracking across branches is enabled, record the insn which
1585 jumps to each branch only reached from one place. */
1586 if (optimize
&& JUMP_P (insn
))
1588 rtx lab
= JUMP_LABEL (insn
);
1589 if (lab
&& LABEL_NUSES (lab
) == 1)
1591 LABEL_REFS (lab
) = insn
;
1601 /* Output the insns. */
1602 for (insn
= NEXT_INSN (first
); insn
;)
1604 #ifdef HAVE_ATTR_length
1605 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1607 /* This can be triggered by bugs elsewhere in the compiler if
1608 new insns are created after init_insn_lengths is called. */
1609 gcc_assert (NOTE_P (insn
));
1610 insn_current_address
= -1;
1613 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1614 #endif /* HAVE_ATTR_length */
1616 insn
= final_scan_insn (insn
, file
, optimize
, 0, &seen
);
1621 get_insn_template (int code
, rtx insn
)
1623 switch (insn_data
[code
].output_format
)
1625 case INSN_OUTPUT_FORMAT_SINGLE
:
1626 return insn_data
[code
].output
.single
;
1627 case INSN_OUTPUT_FORMAT_MULTI
:
1628 return insn_data
[code
].output
.multi
[which_alternative
];
1629 case INSN_OUTPUT_FORMAT_FUNCTION
:
1631 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1638 /* Emit the appropriate declaration for an alternate-entry-point
1639 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1640 LABEL_KIND != LABEL_NORMAL.
1642 The case fall-through in this function is intentional. */
1644 output_alternate_entry_point (FILE *file
, rtx insn
)
1646 const char *name
= LABEL_NAME (insn
);
1648 switch (LABEL_KIND (insn
))
1650 case LABEL_WEAK_ENTRY
:
1651 #ifdef ASM_WEAKEN_LABEL
1652 ASM_WEAKEN_LABEL (file
, name
);
1654 case LABEL_GLOBAL_ENTRY
:
1655 targetm
.asm_out
.globalize_label (file
, name
);
1656 case LABEL_STATIC_ENTRY
:
1657 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1658 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1660 ASM_OUTPUT_LABEL (file
, name
);
1669 /* The final scan for one insn, INSN.
1670 Args are same as in `final', except that INSN
1671 is the insn being scanned.
1672 Value returned is the next insn to be scanned.
1674 NOPEEPHOLES is the flag to disallow peephole processing (currently
1675 used for within delayed branch sequence output).
1677 SEEN is used to track the end of the prologue, for emitting
1678 debug information. We force the emission of a line note after
1679 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1680 at the beginning of the second basic block, whichever comes
1684 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1685 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1694 /* Ignore deleted insns. These can occur when we split insns (due to a
1695 template of "#") while not optimizing. */
1696 if (INSN_DELETED_P (insn
))
1697 return NEXT_INSN (insn
);
1699 switch (GET_CODE (insn
))
1702 switch (NOTE_LINE_NUMBER (insn
))
1704 case NOTE_INSN_DELETED
:
1705 case NOTE_INSN_LOOP_BEG
:
1706 case NOTE_INSN_LOOP_END
:
1707 case NOTE_INSN_FUNCTION_END
:
1708 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1709 case NOTE_INSN_EXPECTED_VALUE
:
1712 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1713 in_cold_section_p
= !in_cold_section_p
;
1714 (*debug_hooks
->switch_text_section
) ();
1715 switch_to_section (current_function_section ());
1718 case NOTE_INSN_BASIC_BLOCK
:
1720 #ifdef TARGET_UNWIND_INFO
1721 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1725 fprintf (asm_out_file
, "\t%s basic block %d\n",
1726 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1728 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1730 *seen
|= SEEN_EMITTED
;
1731 force_source_line
= true;
1738 case NOTE_INSN_EH_REGION_BEG
:
1739 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1740 NOTE_EH_HANDLER (insn
));
1743 case NOTE_INSN_EH_REGION_END
:
1744 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1745 NOTE_EH_HANDLER (insn
));
1748 case NOTE_INSN_PROLOGUE_END
:
1749 targetm
.asm_out
.function_end_prologue (file
);
1750 profile_after_prologue (file
);
1752 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1754 *seen
|= SEEN_EMITTED
;
1755 force_source_line
= true;
1762 case NOTE_INSN_EPILOGUE_BEG
:
1763 targetm
.asm_out
.function_begin_epilogue (file
);
1766 case NOTE_INSN_FUNCTION_BEG
:
1768 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1770 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1772 *seen
|= SEEN_EMITTED
;
1773 force_source_line
= true;
1780 case NOTE_INSN_BLOCK_BEG
:
1781 if (debug_info_level
== DINFO_LEVEL_NORMAL
1782 || debug_info_level
== DINFO_LEVEL_VERBOSE
1783 || write_symbols
== DWARF2_DEBUG
1784 || write_symbols
== VMS_AND_DWARF2_DEBUG
1785 || write_symbols
== VMS_DEBUG
)
1787 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1791 high_block_linenum
= last_linenum
;
1793 /* Output debugging info about the symbol-block beginning. */
1794 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1796 /* Mark this block as output. */
1797 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1801 case NOTE_INSN_BLOCK_END
:
1802 if (debug_info_level
== DINFO_LEVEL_NORMAL
1803 || debug_info_level
== DINFO_LEVEL_VERBOSE
1804 || write_symbols
== DWARF2_DEBUG
1805 || write_symbols
== VMS_AND_DWARF2_DEBUG
1806 || write_symbols
== VMS_DEBUG
)
1808 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1812 /* End of a symbol-block. */
1814 gcc_assert (block_depth
>= 0);
1816 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1820 case NOTE_INSN_DELETED_LABEL
:
1821 /* Emit the label. We may have deleted the CODE_LABEL because
1822 the label could be proved to be unreachable, though still
1823 referenced (in the form of having its address taken. */
1824 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1827 case NOTE_INSN_VAR_LOCATION
:
1828 (*debug_hooks
->var_location
) (insn
);
1835 gcc_assert (NOTE_LINE_NUMBER (insn
) > 0);
1841 #if defined (DWARF2_UNWIND_INFO)
1842 if (dwarf2out_do_frame ())
1843 dwarf2out_frame_debug (insn
, false);
1848 /* The target port might emit labels in the output function for
1849 some insn, e.g. sh.c output_branchy_insn. */
1850 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1852 int align
= LABEL_TO_ALIGNMENT (insn
);
1853 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1854 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1857 if (align
&& NEXT_INSN (insn
))
1859 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1860 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1862 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1863 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1865 ASM_OUTPUT_ALIGN (file
, align
);
1872 /* If this label is reached from only one place, set the condition
1873 codes from the instruction just before the branch. */
1875 /* Disabled because some insns set cc_status in the C output code
1876 and NOTICE_UPDATE_CC alone can set incorrect status. */
1877 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1879 rtx jump
= LABEL_REFS (insn
);
1880 rtx barrier
= prev_nonnote_insn (insn
);
1882 /* If the LABEL_REFS field of this label has been set to point
1883 at a branch, the predecessor of the branch is a regular
1884 insn, and that branch is the only way to reach this label,
1885 set the condition codes based on the branch and its
1887 if (barrier
&& BARRIER_P (barrier
)
1888 && jump
&& JUMP_P (jump
)
1889 && (prev
= prev_nonnote_insn (jump
))
1890 && NONJUMP_INSN_P (prev
))
1892 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1893 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1898 if (LABEL_NAME (insn
))
1899 (*debug_hooks
->label
) (insn
);
1903 fputs (ASM_APP_OFF
, file
);
1907 next
= next_nonnote_insn (insn
);
1908 if (next
!= 0 && JUMP_P (next
))
1910 rtx nextbody
= PATTERN (next
);
1912 /* If this label is followed by a jump-table,
1913 make sure we put the label in the read-only section. Also
1914 possibly write the label and jump table together. */
1916 if (GET_CODE (nextbody
) == ADDR_VEC
1917 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1919 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1920 /* In this case, the case vector is being moved by the
1921 target, so don't output the label at all. Leave that
1922 to the back end macros. */
1924 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1928 switch_to_section (targetm
.asm_out
.function_rodata_section
1929 (current_function_decl
));
1931 #ifdef ADDR_VEC_ALIGN
1932 log_align
= ADDR_VEC_ALIGN (next
);
1934 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1936 ASM_OUTPUT_ALIGN (file
, log_align
);
1939 switch_to_section (current_function_section ());
1941 #ifdef ASM_OUTPUT_CASE_LABEL
1942 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1945 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1951 if (LABEL_ALT_ENTRY_P (insn
))
1952 output_alternate_entry_point (file
, insn
);
1954 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1959 rtx body
= PATTERN (insn
);
1960 int insn_code_number
;
1961 const char *template;
1963 /* An INSN, JUMP_INSN or CALL_INSN.
1964 First check for special kinds that recog doesn't recognize. */
1966 if (GET_CODE (body
) == USE
/* These are just declarations. */
1967 || GET_CODE (body
) == CLOBBER
)
1972 /* If there is a REG_CC_SETTER note on this insn, it means that
1973 the setting of the condition code was done in the delay slot
1974 of the insn that branched here. So recover the cc status
1975 from the insn that set it. */
1977 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1980 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
1981 cc_prev_status
= cc_status
;
1986 /* Detect insns that are really jump-tables
1987 and output them as such. */
1989 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1991 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1995 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1996 switch_to_section (targetm
.asm_out
.function_rodata_section
1997 (current_function_decl
));
1999 switch_to_section (current_function_section ());
2003 fputs (ASM_APP_OFF
, file
);
2007 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2008 if (GET_CODE (body
) == ADDR_VEC
)
2010 #ifdef ASM_OUTPUT_ADDR_VEC
2011 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2018 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2019 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2025 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2026 for (idx
= 0; idx
< vlen
; idx
++)
2028 if (GET_CODE (body
) == ADDR_VEC
)
2030 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2031 ASM_OUTPUT_ADDR_VEC_ELT
2032 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2039 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2040 ASM_OUTPUT_ADDR_DIFF_ELT
2043 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2044 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2050 #ifdef ASM_OUTPUT_CASE_END
2051 ASM_OUTPUT_CASE_END (file
,
2052 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2057 switch_to_section (current_function_section ());
2061 /* Output this line note if it is the first or the last line
2063 if (notice_source_line (insn
))
2065 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2068 if (GET_CODE (body
) == ASM_INPUT
)
2070 const char *string
= XSTR (body
, 0);
2072 /* There's no telling what that did to the condition codes. */
2079 fputs (ASM_APP_ON
, file
);
2082 fprintf (asm_out_file
, "\t%s\n", string
);
2087 /* Detect `asm' construct with operands. */
2088 if (asm_noperands (body
) >= 0)
2090 unsigned int noperands
= asm_noperands (body
);
2091 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2094 /* There's no telling what that did to the condition codes. */
2097 /* Get out the operand values. */
2098 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2099 /* Inhibit dieing on what would otherwise be compiler bugs. */
2100 insn_noperands
= noperands
;
2101 this_is_asm_operands
= insn
;
2103 #ifdef FINAL_PRESCAN_INSN
2104 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2107 /* Output the insn using them. */
2112 fputs (ASM_APP_ON
, file
);
2115 output_asm_insn (string
, ops
);
2118 this_is_asm_operands
= 0;
2124 fputs (ASM_APP_OFF
, file
);
2128 if (GET_CODE (body
) == SEQUENCE
)
2130 /* A delayed-branch sequence */
2133 final_sequence
= body
;
2135 /* Record the delay slots' frame information before the branch.
2136 This is needed for delayed calls: see execute_cfa_program(). */
2137 #if defined (DWARF2_UNWIND_INFO)
2138 if (dwarf2out_do_frame ())
2139 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2140 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2143 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2144 force the restoration of a comparison that was previously
2145 thought unnecessary. If that happens, cancel this sequence
2146 and cause that insn to be restored. */
2148 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2149 if (next
!= XVECEXP (body
, 0, 1))
2155 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2157 rtx insn
= XVECEXP (body
, 0, i
);
2158 rtx next
= NEXT_INSN (insn
);
2159 /* We loop in case any instruction in a delay slot gets
2162 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2163 while (insn
!= next
);
2165 #ifdef DBR_OUTPUT_SEQEND
2166 DBR_OUTPUT_SEQEND (file
);
2170 /* If the insn requiring the delay slot was a CALL_INSN, the
2171 insns in the delay slot are actually executed before the
2172 called function. Hence we don't preserve any CC-setting
2173 actions in these insns and the CC must be marked as being
2174 clobbered by the function. */
2175 if (CALL_P (XVECEXP (body
, 0, 0)))
2182 /* We have a real machine instruction as rtl. */
2184 body
= PATTERN (insn
);
2187 set
= single_set (insn
);
2189 /* Check for redundant test and compare instructions
2190 (when the condition codes are already set up as desired).
2191 This is done only when optimizing; if not optimizing,
2192 it should be possible for the user to alter a variable
2193 with the debugger in between statements
2194 and the next statement should reexamine the variable
2195 to compute the condition codes. */
2200 && GET_CODE (SET_DEST (set
)) == CC0
2201 && insn
!= last_ignored_compare
)
2203 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2204 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2205 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2207 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2208 XEXP (SET_SRC (set
), 0)
2209 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2210 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2211 XEXP (SET_SRC (set
), 1)
2212 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2214 if ((cc_status
.value1
!= 0
2215 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2216 || (cc_status
.value2
!= 0
2217 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2219 /* Don't delete insn if it has an addressing side-effect. */
2220 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2221 /* or if anything in it is volatile. */
2222 && ! volatile_refs_p (PATTERN (insn
)))
2224 /* We don't really delete the insn; just ignore it. */
2225 last_ignored_compare
= insn
;
2234 /* If this is a conditional branch, maybe modify it
2235 if the cc's are in a nonstandard state
2236 so that it accomplishes the same thing that it would
2237 do straightforwardly if the cc's were set up normally. */
2239 if (cc_status
.flags
!= 0
2241 && GET_CODE (body
) == SET
2242 && SET_DEST (body
) == pc_rtx
2243 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2244 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2245 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2247 /* This function may alter the contents of its argument
2248 and clear some of the cc_status.flags bits.
2249 It may also return 1 meaning condition now always true
2250 or -1 meaning condition now always false
2251 or 2 meaning condition nontrivial but altered. */
2252 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2253 /* If condition now has fixed value, replace the IF_THEN_ELSE
2254 with its then-operand or its else-operand. */
2256 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2258 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2260 /* The jump is now either unconditional or a no-op.
2261 If it has become a no-op, don't try to output it.
2262 (It would not be recognized.) */
2263 if (SET_SRC (body
) == pc_rtx
)
2268 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2269 /* Replace (set (pc) (return)) with (return). */
2270 PATTERN (insn
) = body
= SET_SRC (body
);
2272 /* Rerecognize the instruction if it has changed. */
2274 INSN_CODE (insn
) = -1;
2277 /* Make same adjustments to instructions that examine the
2278 condition codes without jumping and instructions that
2279 handle conditional moves (if this machine has either one). */
2281 if (cc_status
.flags
!= 0
2284 rtx cond_rtx
, then_rtx
, else_rtx
;
2287 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2289 cond_rtx
= XEXP (SET_SRC (set
), 0);
2290 then_rtx
= XEXP (SET_SRC (set
), 1);
2291 else_rtx
= XEXP (SET_SRC (set
), 2);
2295 cond_rtx
= SET_SRC (set
);
2296 then_rtx
= const_true_rtx
;
2297 else_rtx
= const0_rtx
;
2300 switch (GET_CODE (cond_rtx
))
2314 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2316 result
= alter_cond (cond_rtx
);
2318 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2319 else if (result
== -1)
2320 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2321 else if (result
== 2)
2322 INSN_CODE (insn
) = -1;
2323 if (SET_DEST (set
) == SET_SRC (set
))
2335 #ifdef HAVE_peephole
2336 /* Do machine-specific peephole optimizations if desired. */
2338 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2340 rtx next
= peephole (insn
);
2341 /* When peepholing, if there were notes within the peephole,
2342 emit them before the peephole. */
2343 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2345 rtx note
, prev
= PREV_INSN (insn
);
2347 for (note
= NEXT_INSN (insn
); note
!= next
;
2348 note
= NEXT_INSN (note
))
2349 final_scan_insn (note
, file
, optimize
, nopeepholes
, seen
);
2351 /* Put the notes in the proper position for a later
2352 rescan. For example, the SH target can do this
2353 when generating a far jump in a delayed branch
2355 note
= NEXT_INSN (insn
);
2356 PREV_INSN (note
) = prev
;
2357 NEXT_INSN (prev
) = note
;
2358 NEXT_INSN (PREV_INSN (next
)) = insn
;
2359 PREV_INSN (insn
) = PREV_INSN (next
);
2360 NEXT_INSN (insn
) = next
;
2361 PREV_INSN (next
) = insn
;
2364 /* PEEPHOLE might have changed this. */
2365 body
= PATTERN (insn
);
2369 /* Try to recognize the instruction.
2370 If successful, verify that the operands satisfy the
2371 constraints for the instruction. Crash if they don't,
2372 since `reload' should have changed them so that they do. */
2374 insn_code_number
= recog_memoized (insn
);
2375 cleanup_subreg_operands (insn
);
2377 /* Dump the insn in the assembly for debugging. */
2378 if (flag_dump_rtl_in_asm
)
2380 print_rtx_head
= ASM_COMMENT_START
;
2381 print_rtl_single (asm_out_file
, insn
);
2382 print_rtx_head
= "";
2385 if (! constrain_operands_cached (1))
2386 fatal_insn_not_found (insn
);
2388 /* Some target machines need to prescan each insn before
2391 #ifdef FINAL_PRESCAN_INSN
2392 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2395 #ifdef HAVE_conditional_execution
2396 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2397 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2399 current_insn_predicate
= NULL_RTX
;
2403 cc_prev_status
= cc_status
;
2405 /* Update `cc_status' for this instruction.
2406 The instruction's output routine may change it further.
2407 If the output routine for a jump insn needs to depend
2408 on the cc status, it should look at cc_prev_status. */
2410 NOTICE_UPDATE_CC (body
, insn
);
2413 current_output_insn
= debug_insn
= insn
;
2415 #if defined (DWARF2_UNWIND_INFO)
2416 if (CALL_P (insn
) && dwarf2out_do_frame ())
2417 dwarf2out_frame_debug (insn
, false);
2420 /* Find the proper template for this insn. */
2421 template = get_insn_template (insn_code_number
, insn
);
2423 /* If the C code returns 0, it means that it is a jump insn
2424 which follows a deleted test insn, and that test insn
2425 needs to be reinserted. */
2430 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2432 /* We have already processed the notes between the setter and
2433 the user. Make sure we don't process them again, this is
2434 particularly important if one of the notes is a block
2435 scope note or an EH note. */
2437 prev
!= last_ignored_compare
;
2438 prev
= PREV_INSN (prev
))
2441 delete_insn (prev
); /* Use delete_note. */
2447 /* If the template is the string "#", it means that this insn must
2449 if (template[0] == '#' && template[1] == '\0')
2451 rtx
new = try_split (body
, insn
, 0);
2453 /* If we didn't split the insn, go away. */
2454 if (new == insn
&& PATTERN (new) == body
)
2455 fatal_insn ("could not split insn", insn
);
2457 #ifdef HAVE_ATTR_length
2458 /* This instruction should have been split in shorten_branches,
2459 to ensure that we would have valid length info for the
2467 #ifdef TARGET_UNWIND_INFO
2468 /* ??? This will put the directives in the wrong place if
2469 get_insn_template outputs assembly directly. However calling it
2470 before get_insn_template breaks if the insns is split. */
2471 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2474 /* Output assembler code from the template. */
2475 output_asm_insn (template, recog_data
.operand
);
2477 /* If necessary, report the effect that the instruction has on
2478 the unwind info. We've already done this for delay slots
2479 and call instructions. */
2480 #if defined (DWARF2_UNWIND_INFO)
2481 if (final_sequence
== 0
2482 #if !defined (HAVE_prologue)
2483 && !ACCUMULATE_OUTGOING_ARGS
2485 && dwarf2out_do_frame ())
2486 dwarf2out_frame_debug (insn
, true);
2489 current_output_insn
= debug_insn
= 0;
2492 return NEXT_INSN (insn
);
2495 /* Return whether a source line note needs to be emitted before INSN. */
2498 notice_source_line (rtx insn
)
2500 const char *filename
= insn_file (insn
);
2501 int linenum
= insn_line (insn
);
2504 && (force_source_line
2505 || filename
!= last_filename
2506 || last_linenum
!= linenum
))
2508 force_source_line
= false;
2509 last_filename
= filename
;
2510 last_linenum
= linenum
;
2511 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2512 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2518 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2519 directly to the desired hard register. */
2522 cleanup_subreg_operands (rtx insn
)
2525 extract_insn_cached (insn
);
2526 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2528 /* The following test cannot use recog_data.operand when testing
2529 for a SUBREG: the underlying object might have been changed
2530 already if we are inside a match_operator expression that
2531 matches the else clause. Instead we test the underlying
2532 expression directly. */
2533 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2534 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2535 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2536 || GET_CODE (recog_data
.operand
[i
]) == MULT
2537 || MEM_P (recog_data
.operand
[i
]))
2538 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2541 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2543 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2544 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2545 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2546 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2547 || MEM_P (*recog_data
.dup_loc
[i
]))
2548 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2552 /* If X is a SUBREG, replace it with a REG or a MEM,
2553 based on the thing it is a subreg of. */
2556 alter_subreg (rtx
*xp
)
2559 rtx y
= SUBREG_REG (x
);
2561 /* simplify_subreg does not remove subreg from volatile references.
2562 We are required to. */
2565 int offset
= SUBREG_BYTE (x
);
2567 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2568 contains 0 instead of the proper offset. See simplify_subreg. */
2570 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2572 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2573 - GET_MODE_SIZE (GET_MODE (x
));
2574 if (WORDS_BIG_ENDIAN
)
2575 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2576 if (BYTES_BIG_ENDIAN
)
2577 offset
+= difference
% UNITS_PER_WORD
;
2580 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2584 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2591 /* Simplify_subreg can't handle some REG cases, but we have to. */
2592 unsigned int regno
= subreg_regno (x
);
2593 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2600 /* Do alter_subreg on all the SUBREGs contained in X. */
2603 walk_alter_subreg (rtx
*xp
)
2606 switch (GET_CODE (x
))
2611 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2612 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2617 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2621 return alter_subreg (xp
);
2632 /* Given BODY, the body of a jump instruction, alter the jump condition
2633 as required by the bits that are set in cc_status.flags.
2634 Not all of the bits there can be handled at this level in all cases.
2636 The value is normally 0.
2637 1 means that the condition has become always true.
2638 -1 means that the condition has become always false.
2639 2 means that COND has been altered. */
2642 alter_cond (rtx cond
)
2646 if (cc_status
.flags
& CC_REVERSED
)
2649 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2652 if (cc_status
.flags
& CC_INVERTED
)
2655 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2658 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2659 switch (GET_CODE (cond
))
2664 /* Jump becomes unconditional. */
2670 /* Jump becomes no-op. */
2674 PUT_CODE (cond
, EQ
);
2679 PUT_CODE (cond
, NE
);
2687 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2688 switch (GET_CODE (cond
))
2692 /* Jump becomes unconditional. */
2697 /* Jump becomes no-op. */
2702 PUT_CODE (cond
, EQ
);
2708 PUT_CODE (cond
, NE
);
2716 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2717 switch (GET_CODE (cond
))
2720 /* Jump becomes unconditional. */
2724 PUT_CODE (cond
, EQ
);
2729 PUT_CODE (cond
, NE
);
2734 /* Jump becomes no-op. */
2741 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2742 switch (GET_CODE (cond
))
2748 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2753 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2758 if (cc_status
.flags
& CC_NOT_SIGNED
)
2759 /* The flags are valid if signed condition operators are converted
2761 switch (GET_CODE (cond
))
2764 PUT_CODE (cond
, LEU
);
2769 PUT_CODE (cond
, LTU
);
2774 PUT_CODE (cond
, GTU
);
2779 PUT_CODE (cond
, GEU
);
2791 /* Report inconsistency between the assembler template and the operands.
2792 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2795 output_operand_lossage (const char *cmsgid
, ...)
2799 const char *pfx_str
;
2802 va_start (ap
, cmsgid
);
2804 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
2805 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
2806 vasprintf (&new_message
, fmt_string
, ap
);
2808 if (this_is_asm_operands
)
2809 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2811 internal_error ("%s", new_message
);
2818 /* Output of assembler code from a template, and its subroutines. */
2820 /* Annotate the assembly with a comment describing the pattern and
2821 alternative used. */
2824 output_asm_name (void)
2828 int num
= INSN_CODE (debug_insn
);
2829 fprintf (asm_out_file
, "\t%s %d\t%s",
2830 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2831 insn_data
[num
].name
);
2832 if (insn_data
[num
].n_alternatives
> 1)
2833 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2834 #ifdef HAVE_ATTR_length
2835 fprintf (asm_out_file
, "\t[length = %d]",
2836 get_attr_length (debug_insn
));
2838 /* Clear this so only the first assembler insn
2839 of any rtl insn will get the special comment for -dp. */
2844 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2845 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2846 corresponds to the address of the object and 0 if to the object. */
2849 get_mem_expr_from_op (rtx op
, int *paddressp
)
2857 return REG_EXPR (op
);
2858 else if (!MEM_P (op
))
2861 if (MEM_EXPR (op
) != 0)
2862 return MEM_EXPR (op
);
2864 /* Otherwise we have an address, so indicate it and look at the address. */
2868 /* First check if we have a decl for the address, then look at the right side
2869 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2870 But don't allow the address to itself be indirect. */
2871 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2873 else if (GET_CODE (op
) == PLUS
2874 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2877 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
2878 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
2881 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2882 return inner_addressp
? 0 : expr
;
2885 /* Output operand names for assembler instructions. OPERANDS is the
2886 operand vector, OPORDER is the order to write the operands, and NOPS
2887 is the number of operands to write. */
2890 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2895 for (i
= 0; i
< nops
; i
++)
2898 rtx op
= operands
[oporder
[i
]];
2899 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2901 fprintf (asm_out_file
, "%c%s",
2902 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2906 fprintf (asm_out_file
, "%s",
2907 addressp
? "*" : "");
2908 print_mem_expr (asm_out_file
, expr
);
2911 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2912 && ORIGINAL_REGNO (op
) != REGNO (op
))
2913 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2917 /* Output text from TEMPLATE to the assembler output file,
2918 obeying %-directions to substitute operands taken from
2919 the vector OPERANDS.
2921 %N (for N a digit) means print operand N in usual manner.
2922 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2923 and print the label name with no punctuation.
2924 %cN means require operand N to be a constant
2925 and print the constant expression with no punctuation.
2926 %aN means expect operand N to be a memory address
2927 (not a memory reference!) and print a reference
2929 %nN means expect operand N to be a constant
2930 and print a constant expression for minus the value
2931 of the operand, with no other punctuation. */
2934 output_asm_insn (const char *template, rtx
*operands
)
2938 #ifdef ASSEMBLER_DIALECT
2941 int oporder
[MAX_RECOG_OPERANDS
];
2942 char opoutput
[MAX_RECOG_OPERANDS
];
2945 /* An insn may return a null string template
2946 in a case where no assembler code is needed. */
2950 memset (opoutput
, 0, sizeof opoutput
);
2952 putc ('\t', asm_out_file
);
2954 #ifdef ASM_OUTPUT_OPCODE
2955 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2962 if (flag_verbose_asm
)
2963 output_asm_operand_names (operands
, oporder
, ops
);
2964 if (flag_print_asm_name
)
2968 memset (opoutput
, 0, sizeof opoutput
);
2970 putc (c
, asm_out_file
);
2971 #ifdef ASM_OUTPUT_OPCODE
2972 while ((c
= *p
) == '\t')
2974 putc (c
, asm_out_file
);
2977 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2981 #ifdef ASSEMBLER_DIALECT
2987 output_operand_lossage ("nested assembly dialect alternatives");
2991 /* If we want the first dialect, do nothing. Otherwise, skip
2992 DIALECT_NUMBER of strings ending with '|'. */
2993 for (i
= 0; i
< dialect_number
; i
++)
2995 while (*p
&& *p
!= '}' && *p
++ != '|')
3004 output_operand_lossage ("unterminated assembly dialect alternative");
3011 /* Skip to close brace. */
3016 output_operand_lossage ("unterminated assembly dialect alternative");
3020 while (*p
++ != '}');
3024 putc (c
, asm_out_file
);
3029 putc (c
, asm_out_file
);
3035 /* %% outputs a single %. */
3039 putc (c
, asm_out_file
);
3041 /* %= outputs a number which is unique to each insn in the entire
3042 compilation. This is useful for making local labels that are
3043 referred to more than once in a given insn. */
3047 fprintf (asm_out_file
, "%d", insn_counter
);
3049 /* % followed by a letter and some digits
3050 outputs an operand in a special way depending on the letter.
3051 Letters `acln' are implemented directly.
3052 Other letters are passed to `output_operand' so that
3053 the PRINT_OPERAND macro can define them. */
3054 else if (ISALPHA (*p
))
3057 unsigned long opnum
;
3060 opnum
= strtoul (p
, &endptr
, 10);
3063 output_operand_lossage ("operand number missing "
3065 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3066 output_operand_lossage ("operand number out of range");
3067 else if (letter
== 'l')
3068 output_asm_label (operands
[opnum
]);
3069 else if (letter
== 'a')
3070 output_address (operands
[opnum
]);
3071 else if (letter
== 'c')
3073 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3074 output_addr_const (asm_out_file
, operands
[opnum
]);
3076 output_operand (operands
[opnum
], 'c');
3078 else if (letter
== 'n')
3080 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3081 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3082 - INTVAL (operands
[opnum
]));
3085 putc ('-', asm_out_file
);
3086 output_addr_const (asm_out_file
, operands
[opnum
]);
3090 output_operand (operands
[opnum
], letter
);
3092 if (!opoutput
[opnum
])
3093 oporder
[ops
++] = opnum
;
3094 opoutput
[opnum
] = 1;
3099 /* % followed by a digit outputs an operand the default way. */
3100 else if (ISDIGIT (*p
))
3102 unsigned long opnum
;
3105 opnum
= strtoul (p
, &endptr
, 10);
3106 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3107 output_operand_lossage ("operand number out of range");
3109 output_operand (operands
[opnum
], 0);
3111 if (!opoutput
[opnum
])
3112 oporder
[ops
++] = opnum
;
3113 opoutput
[opnum
] = 1;
3118 /* % followed by punctuation: output something for that
3119 punctuation character alone, with no operand.
3120 The PRINT_OPERAND macro decides what is actually done. */
3121 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3122 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3123 output_operand (NULL_RTX
, *p
++);
3126 output_operand_lossage ("invalid %%-code");
3130 putc (c
, asm_out_file
);
3133 /* Write out the variable names for operands, if we know them. */
3134 if (flag_verbose_asm
)
3135 output_asm_operand_names (operands
, oporder
, ops
);
3136 if (flag_print_asm_name
)
3139 putc ('\n', asm_out_file
);
3142 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3145 output_asm_label (rtx x
)
3149 if (GET_CODE (x
) == LABEL_REF
)
3153 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3154 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3156 output_operand_lossage ("'%%l' operand isn't a label");
3158 assemble_name (asm_out_file
, buf
);
3161 /* Print operand X using machine-dependent assembler syntax.
3162 The macro PRINT_OPERAND is defined just to control this function.
3163 CODE is a non-digit that preceded the operand-number in the % spec,
3164 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3165 between the % and the digits.
3166 When CODE is a non-letter, X is 0.
3168 The meanings of the letters are machine-dependent and controlled
3169 by PRINT_OPERAND. */
3172 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3174 if (x
&& GET_CODE (x
) == SUBREG
)
3175 x
= alter_subreg (&x
);
3177 /* X must not be a pseudo reg. */
3178 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3180 PRINT_OPERAND (asm_out_file
, x
, code
);
3183 /* Print a memory reference operand for address X
3184 using machine-dependent assembler syntax.
3185 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3188 output_address (rtx x
)
3190 walk_alter_subreg (&x
);
3191 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3194 /* Print an integer constant expression in assembler syntax.
3195 Addition and subtraction are the only arithmetic
3196 that may appear in these expressions. */
3199 output_addr_const (FILE *file
, rtx x
)
3204 switch (GET_CODE (x
))
3211 if (SYMBOL_REF_DECL (x
))
3212 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3213 #ifdef ASM_OUTPUT_SYMBOL_REF
3214 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3216 assemble_name (file
, XSTR (x
, 0));
3224 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3225 #ifdef ASM_OUTPUT_LABEL_REF
3226 ASM_OUTPUT_LABEL_REF (file
, buf
);
3228 assemble_name (file
, buf
);
3233 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3237 /* This used to output parentheses around the expression,
3238 but that does not work on the 386 (either ATT or BSD assembler). */
3239 output_addr_const (file
, XEXP (x
, 0));
3243 if (GET_MODE (x
) == VOIDmode
)
3245 /* We can use %d if the number is one word and positive. */
3246 if (CONST_DOUBLE_HIGH (x
))
3247 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3248 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3249 else if (CONST_DOUBLE_LOW (x
) < 0)
3250 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3252 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3255 /* We can't handle floating point constants;
3256 PRINT_OPERAND must handle them. */
3257 output_operand_lossage ("floating constant misused");
3261 /* Some assemblers need integer constants to appear last (eg masm). */
3262 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3264 output_addr_const (file
, XEXP (x
, 1));
3265 if (INTVAL (XEXP (x
, 0)) >= 0)
3266 fprintf (file
, "+");
3267 output_addr_const (file
, XEXP (x
, 0));
3271 output_addr_const (file
, XEXP (x
, 0));
3272 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3273 || INTVAL (XEXP (x
, 1)) >= 0)
3274 fprintf (file
, "+");
3275 output_addr_const (file
, XEXP (x
, 1));
3280 /* Avoid outputting things like x-x or x+5-x,
3281 since some assemblers can't handle that. */
3282 x
= simplify_subtraction (x
);
3283 if (GET_CODE (x
) != MINUS
)
3286 output_addr_const (file
, XEXP (x
, 0));
3287 fprintf (file
, "-");
3288 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3289 || GET_CODE (XEXP (x
, 1)) == PC
3290 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3291 output_addr_const (file
, XEXP (x
, 1));
3294 fputs (targetm
.asm_out
.open_paren
, file
);
3295 output_addr_const (file
, XEXP (x
, 1));
3296 fputs (targetm
.asm_out
.close_paren
, file
);
3303 output_addr_const (file
, XEXP (x
, 0));
3307 #ifdef OUTPUT_ADDR_CONST_EXTRA
3308 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3313 output_operand_lossage ("invalid expression as operand");
3317 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3318 %R prints the value of REGISTER_PREFIX.
3319 %L prints the value of LOCAL_LABEL_PREFIX.
3320 %U prints the value of USER_LABEL_PREFIX.
3321 %I prints the value of IMMEDIATE_PREFIX.
3322 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3323 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3325 We handle alternate assembler dialects here, just like output_asm_insn. */
3328 asm_fprintf (FILE *file
, const char *p
, ...)
3334 va_start (argptr
, p
);
3341 #ifdef ASSEMBLER_DIALECT
3346 /* If we want the first dialect, do nothing. Otherwise, skip
3347 DIALECT_NUMBER of strings ending with '|'. */
3348 for (i
= 0; i
< dialect_number
; i
++)
3350 while (*p
&& *p
++ != '|')
3360 /* Skip to close brace. */
3361 while (*p
&& *p
++ != '}')
3372 while (strchr ("-+ #0", c
))
3377 while (ISDIGIT (c
) || c
== '.')
3388 case 'd': case 'i': case 'u':
3389 case 'x': case 'X': case 'o':
3393 fprintf (file
, buf
, va_arg (argptr
, int));
3397 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3398 'o' cases, but we do not check for those cases. It
3399 means that the value is a HOST_WIDE_INT, which may be
3400 either `long' or `long long'. */
3401 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3402 q
+= strlen (HOST_WIDE_INT_PRINT
);
3405 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3410 #ifdef HAVE_LONG_LONG
3416 fprintf (file
, buf
, va_arg (argptr
, long long));
3423 fprintf (file
, buf
, va_arg (argptr
, long));
3431 fprintf (file
, buf
, va_arg (argptr
, char *));
3435 #ifdef ASM_OUTPUT_OPCODE
3436 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3441 #ifdef REGISTER_PREFIX
3442 fprintf (file
, "%s", REGISTER_PREFIX
);
3447 #ifdef IMMEDIATE_PREFIX
3448 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3453 #ifdef LOCAL_LABEL_PREFIX
3454 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3459 fputs (user_label_prefix
, file
);
3462 #ifdef ASM_FPRINTF_EXTENSIONS
3463 /* Uppercase letters are reserved for general use by asm_fprintf
3464 and so are not available to target specific code. In order to
3465 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3466 they are defined here. As they get turned into real extensions
3467 to asm_fprintf they should be removed from this list. */
3468 case 'A': case 'B': case 'C': case 'D': case 'E':
3469 case 'F': case 'G': case 'H': case 'J': case 'K':
3470 case 'M': case 'N': case 'P': case 'Q': case 'S':
3471 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3474 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3487 /* Split up a CONST_DOUBLE or integer constant rtx
3488 into two rtx's for single words,
3489 storing in *FIRST the word that comes first in memory in the target
3490 and in *SECOND the other. */
3493 split_double (rtx value
, rtx
*first
, rtx
*second
)
3495 if (GET_CODE (value
) == CONST_INT
)
3497 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3499 /* In this case the CONST_INT holds both target words.
3500 Extract the bits from it into two word-sized pieces.
3501 Sign extend each half to HOST_WIDE_INT. */
3502 unsigned HOST_WIDE_INT low
, high
;
3503 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3505 /* Set sign_bit to the most significant bit of a word. */
3507 sign_bit
<<= BITS_PER_WORD
- 1;
3509 /* Set mask so that all bits of the word are set. We could
3510 have used 1 << BITS_PER_WORD instead of basing the
3511 calculation on sign_bit. However, on machines where
3512 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3513 compiler warning, even though the code would never be
3515 mask
= sign_bit
<< 1;
3518 /* Set sign_extend as any remaining bits. */
3519 sign_extend
= ~mask
;
3521 /* Pick the lower word and sign-extend it. */
3522 low
= INTVAL (value
);
3527 /* Pick the higher word, shifted to the least significant
3528 bits, and sign-extend it. */
3529 high
= INTVAL (value
);
3530 high
>>= BITS_PER_WORD
- 1;
3533 if (high
& sign_bit
)
3534 high
|= sign_extend
;
3536 /* Store the words in the target machine order. */
3537 if (WORDS_BIG_ENDIAN
)
3539 *first
= GEN_INT (high
);
3540 *second
= GEN_INT (low
);
3544 *first
= GEN_INT (low
);
3545 *second
= GEN_INT (high
);
3550 /* The rule for using CONST_INT for a wider mode
3551 is that we regard the value as signed.
3552 So sign-extend it. */
3553 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3554 if (WORDS_BIG_ENDIAN
)
3566 else if (GET_CODE (value
) != CONST_DOUBLE
)
3568 if (WORDS_BIG_ENDIAN
)
3570 *first
= const0_rtx
;
3576 *second
= const0_rtx
;
3579 else if (GET_MODE (value
) == VOIDmode
3580 /* This is the old way we did CONST_DOUBLE integers. */
3581 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3583 /* In an integer, the words are defined as most and least significant.
3584 So order them by the target's convention. */
3585 if (WORDS_BIG_ENDIAN
)
3587 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3588 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3592 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3593 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3600 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3602 /* Note, this converts the REAL_VALUE_TYPE to the target's
3603 format, splits up the floating point double and outputs
3604 exactly 32 bits of it into each of l[0] and l[1] --
3605 not necessarily BITS_PER_WORD bits. */
3606 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3608 /* If 32 bits is an entire word for the target, but not for the host,
3609 then sign-extend on the host so that the number will look the same
3610 way on the host that it would on the target. See for instance
3611 simplify_unary_operation. The #if is needed to avoid compiler
3614 #if HOST_BITS_PER_LONG > 32
3615 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3617 if (l
[0] & ((long) 1 << 31))
3618 l
[0] |= ((long) (-1) << 32);
3619 if (l
[1] & ((long) 1 << 31))
3620 l
[1] |= ((long) (-1) << 32);
3624 *first
= GEN_INT (l
[0]);
3625 *second
= GEN_INT (l
[1]);
3629 /* Return nonzero if this function has no function calls. */
3632 leaf_function_p (void)
3637 if (current_function_profile
|| profile_arc_flag
)
3640 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3643 && ! SIBLING_CALL_P (insn
))
3645 if (NONJUMP_INSN_P (insn
)
3646 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3647 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3648 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3651 for (link
= current_function_epilogue_delay_list
;
3653 link
= XEXP (link
, 1))
3655 insn
= XEXP (link
, 0);
3658 && ! SIBLING_CALL_P (insn
))
3660 if (NONJUMP_INSN_P (insn
)
3661 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3662 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3663 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3670 /* Return 1 if branch is a forward branch.
3671 Uses insn_shuid array, so it works only in the final pass. May be used by
3672 output templates to customary add branch prediction hints.
3675 final_forward_branch_p (rtx insn
)
3677 int insn_id
, label_id
;
3679 gcc_assert (uid_shuid
);
3680 insn_id
= INSN_SHUID (insn
);
3681 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3682 /* We've hit some insns that does not have id information available. */
3683 gcc_assert (insn_id
&& label_id
);
3684 return insn_id
< label_id
;
3687 /* On some machines, a function with no call insns
3688 can run faster if it doesn't create its own register window.
3689 When output, the leaf function should use only the "output"
3690 registers. Ordinarily, the function would be compiled to use
3691 the "input" registers to find its arguments; it is a candidate
3692 for leaf treatment if it uses only the "input" registers.
3693 Leaf function treatment means renumbering so the function
3694 uses the "output" registers instead. */
3696 #ifdef LEAF_REGISTERS
3698 /* Return 1 if this function uses only the registers that can be
3699 safely renumbered. */
3702 only_leaf_regs_used (void)
3705 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3707 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3708 if ((regs_ever_live
[i
] || global_regs
[i
])
3709 && ! permitted_reg_in_leaf_functions
[i
])
3712 if (current_function_uses_pic_offset_table
3713 && pic_offset_table_rtx
!= 0
3714 && REG_P (pic_offset_table_rtx
)
3715 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3721 /* Scan all instructions and renumber all registers into those
3722 available in leaf functions. */
3725 leaf_renumber_regs (rtx first
)
3729 /* Renumber only the actual patterns.
3730 The reg-notes can contain frame pointer refs,
3731 and renumbering them could crash, and should not be needed. */
3732 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3734 leaf_renumber_regs_insn (PATTERN (insn
));
3735 for (insn
= current_function_epilogue_delay_list
;
3737 insn
= XEXP (insn
, 1))
3738 if (INSN_P (XEXP (insn
, 0)))
3739 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3742 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3743 available in leaf functions. */
3746 leaf_renumber_regs_insn (rtx in_rtx
)
3749 const char *format_ptr
;
3754 /* Renumber all input-registers into output-registers.
3755 renumbered_regs would be 1 for an output-register;
3762 /* Don't renumber the same reg twice. */
3766 newreg
= REGNO (in_rtx
);
3767 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3768 to reach here as part of a REG_NOTE. */
3769 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3774 newreg
= LEAF_REG_REMAP (newreg
);
3775 gcc_assert (newreg
>= 0);
3776 regs_ever_live
[REGNO (in_rtx
)] = 0;
3777 regs_ever_live
[newreg
] = 1;
3778 REGNO (in_rtx
) = newreg
;
3782 if (INSN_P (in_rtx
))
3784 /* Inside a SEQUENCE, we find insns.
3785 Renumber just the patterns of these insns,
3786 just as we do for the top-level insns. */
3787 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3791 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3793 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3794 switch (*format_ptr
++)
3797 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3801 if (NULL
!= XVEC (in_rtx
, i
))
3803 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3804 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3824 /* When -gused is used, emit debug info for only used symbols. But in
3825 addition to the standard intercepted debug_hooks there are some direct
3826 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3827 Those routines may also be called from a higher level intercepted routine. So
3828 to prevent recording data for an inner call to one of these for an intercept,
3829 we maintain an intercept nesting counter (debug_nesting). We only save the
3830 intercepted arguments if the nesting is 1. */
3831 int debug_nesting
= 0;
3833 static tree
*symbol_queue
;
3834 int symbol_queue_index
= 0;
3835 static int symbol_queue_size
= 0;
3837 /* Generate the symbols for any queued up type symbols we encountered
3838 while generating the type info for some originally used symbol.
3839 This might generate additional entries in the queue. Only when
3840 the nesting depth goes to 0 is this routine called. */
3843 debug_flush_symbol_queue (void)
3847 /* Make sure that additionally queued items are not flushed
3852 for (i
= 0; i
< symbol_queue_index
; ++i
)
3854 /* If we pushed queued symbols then such symbols are must be
3855 output no matter what anyone else says. Specifically,
3856 we need to make sure dbxout_symbol() thinks the symbol was
3857 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3858 which may be set for outside reasons. */
3859 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3860 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3861 TREE_USED (symbol_queue
[i
]) = 1;
3862 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3864 #ifdef DBX_DEBUGGING_INFO
3865 dbxout_symbol (symbol_queue
[i
], 0);
3868 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3869 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3872 symbol_queue_index
= 0;
3876 /* Queue a type symbol needed as part of the definition of a decl
3877 symbol. These symbols are generated when debug_flush_symbol_queue()
3881 debug_queue_symbol (tree decl
)
3883 if (symbol_queue_index
>= symbol_queue_size
)
3885 symbol_queue_size
+= 10;
3886 symbol_queue
= xrealloc (symbol_queue
,
3887 symbol_queue_size
* sizeof (tree
));
3890 symbol_queue
[symbol_queue_index
++] = decl
;
3893 /* Free symbol queue. */
3895 debug_free_queue (void)
3899 free (symbol_queue
);
3900 symbol_queue
= NULL
;
3901 symbol_queue_size
= 0;
3905 /* Turn the RTL into assembly. */
3907 rest_of_handle_final (void)
3912 /* Get the function's name, as described by its RTL. This may be
3913 different from the DECL_NAME name used in the source file. */
3915 x
= DECL_RTL (current_function_decl
);
3916 gcc_assert (MEM_P (x
));
3918 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
3919 fnname
= XSTR (x
, 0);
3921 assemble_start_function (current_function_decl
, fnname
);
3922 final_start_function (get_insns (), asm_out_file
, optimize
);
3923 final (get_insns (), asm_out_file
, optimize
);
3924 final_end_function ();
3926 #ifdef TARGET_UNWIND_INFO
3927 /* ??? The IA-64 ".handlerdata" directive must be issued before
3928 the ".endp" directive that closes the procedure descriptor. */
3929 output_function_exception_table ();
3932 assemble_end_function (current_function_decl
, fnname
);
3934 #ifndef TARGET_UNWIND_INFO
3935 /* Otherwise, it feels unclean to switch sections in the middle. */
3936 output_function_exception_table ();
3939 user_defined_section_attribute
= false;
3942 fflush (asm_out_file
);
3944 /* Release all memory allocated by flow. */
3945 free_basic_block_vars ();
3947 /* Write DBX symbols if requested. */
3949 /* Note that for those inline functions where we don't initially
3950 know for certain that we will be generating an out-of-line copy,
3951 the first invocation of this routine (rest_of_compilation) will
3952 skip over this code by doing a `goto exit_rest_of_compilation;'.
3953 Later on, wrapup_global_declarations will (indirectly) call
3954 rest_of_compilation again for those inline functions that need
3955 to have out-of-line copies generated. During that call, we
3956 *will* be routed past here. */
3958 timevar_push (TV_SYMOUT
);
3959 (*debug_hooks
->function_decl
) (current_function_decl
);
3960 timevar_pop (TV_SYMOUT
);
3963 struct tree_opt_pass pass_final
=
3967 rest_of_handle_final
, /* execute */
3970 0, /* static_pass_number */
3971 TV_FINAL
, /* tv_id */
3972 0, /* properties_required */
3973 0, /* properties_provided */
3974 0, /* properties_destroyed */
3975 0, /* todo_flags_start */
3976 TODO_ggc_collect
, /* todo_flags_finish */
3982 rest_of_handle_shorten_branches (void)
3984 /* Shorten branches. */
3985 shorten_branches (get_insns ());
3988 struct tree_opt_pass pass_shorten_branches
=
3990 "shorten", /* name */
3992 rest_of_handle_shorten_branches
, /* execute */
3995 0, /* static_pass_number */
3996 TV_FINAL
, /* tv_id */
3997 0, /* properties_required */
3998 0, /* properties_provided */
3999 0, /* properties_destroyed */
4000 0, /* todo_flags_start */
4001 TODO_dump_func
, /* todo_flags_finish */
4007 rest_of_clean_state (void)
4011 /* It is very important to decompose the RTL instruction chain here:
4012 debug information keeps pointing into CODE_LABEL insns inside the function
4013 body. If these remain pointing to the other insns, we end up preserving
4014 whole RTL chain and attached detailed debug info in memory. */
4015 for (insn
= get_insns (); insn
; insn
= next
)
4017 next
= NEXT_INSN (insn
);
4018 NEXT_INSN (insn
) = NULL
;
4019 PREV_INSN (insn
) = NULL
;
4022 /* In case the function was not output,
4023 don't leave any temporary anonymous types
4024 queued up for sdb output. */
4025 #ifdef SDB_DEBUGGING_INFO
4026 if (write_symbols
== SDB_DEBUG
)
4027 sdbout_types (NULL_TREE
);
4030 reload_completed
= 0;
4031 epilogue_completed
= 0;
4032 flow2_completed
= 0;
4035 /* Clear out the insn_length contents now that they are no
4037 init_insn_lengths ();
4039 /* Show no temporary slots allocated. */
4042 free_basic_block_vars ();
4043 free_bb_for_insn ();
4046 if (targetm
.binds_local_p (current_function_decl
))
4048 int pref
= cfun
->preferred_stack_boundary
;
4049 if (cfun
->stack_alignment_needed
> cfun
->preferred_stack_boundary
)
4050 pref
= cfun
->stack_alignment_needed
;
4051 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4055 /* Make sure volatile mem refs aren't considered valid operands for
4056 arithmetic insns. We must call this here if this is a nested inline
4057 function, since the above code leaves us in the init_recog state,
4058 and the function context push/pop code does not save/restore volatile_ok.
4060 ??? Maybe it isn't necessary for expand_start_function to call this
4061 anymore if we do it here? */
4063 init_recog_no_volatile ();
4065 /* We're done with this function. Free up memory if we can. */
4066 free_after_parsing (cfun
);
4067 free_after_compilation (cfun
);
4070 struct tree_opt_pass pass_clean_state
=
4074 rest_of_clean_state
, /* execute */
4077 0, /* static_pass_number */
4078 TV_FINAL
, /* tv_id */
4079 0, /* properties_required */
4080 0, /* properties_provided */
4081 PROP_rtl
, /* properties_destroyed */
4082 0, /* todo_flags_start */
4083 0, /* todo_flags_finish */