include/xtensa-dynconfig.h

   1 /* Xtensa configuration settings.
   2    Copyright (C) 2022-2023 Free Software Foundation, Inc.
   3
   4    This program is free software; you can redistribute it and/or modify
   5    it under the terms of the GNU General Public License as published by
   6    the Free Software Foundation; either version 2, or (at your option)
   7    any later version.
   8
   9    This program is distributed in the hope that it will be useful, but
  10    WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12    General Public License for more details.
  13
  14    You should have received a copy of the GNU General Public License
  15    along with this program; if not, write to the Free Software
  16    Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  17
  18 #ifndef XTENSA_DYNCONFIG_H
  19 #define XTENSA_DYNCONFIG_H
  20
  21 #ifdef __cplusplus
  22 extern "C" {
  23 #endif
  24
  25 /*
  26  * Config versioning.
  27  *
  28  * When new config entries need to be passed through dynconfig
  29  * create new xtensa_config_v<N> structure and put them there.
  30  * Declare new function xtensa_get_config_v<N> (void).
  31  * Define corresponding X*HAL_* macros by accessing xtensa_get_config_v<N> ().
  32  * Define macro XTENSA_CONFIG_V<N>_ENTRY_LIST by listing
  33  * XTENSA_CONFIG_ENTRY for every entry in the new structure.
  34  * Add constant definition for the new xtensa_config_v<N> to the
  35  * XTENSA_CONFIG_INSTANCE_LIST.
  36  * Add XTENSA_CONFIG_V<N>_ENTRY_LIST to the XTENSA_CONFIG_ENTRY_LIST.
  37  *
  38  * On the user side (gcc/binutils/...) add definition for the function
  39  * xtensa_get_config_v<N> (void).
  40  */
  41
  42 struct xtensa_config_v1
  43 {
  44   int xchal_have_be;
  45   int xchal_have_density;
  46   int xchal_have_const16;
  47   int xchal_have_abs;
  48   int xchal_have_addx;
  49   int xchal_have_l32r;
  50   int xshal_use_absolute_literals;
  51   int xshal_have_text_section_literals;
  52   int xchal_have_mac16;
  53   int xchal_have_mul16;
  54   int xchal_have_mul32;
  55   int xchal_have_mul32_high;
  56   int xchal_have_div32;
  57   int xchal_have_nsa;
  58   int xchal_have_minmax;
  59   int xchal_have_sext;
  60   int xchal_have_loops;
  61   int xchal_have_threadptr;
  62   int xchal_have_release_sync;
  63   int xchal_have_s32c1i;
  64   int xchal_have_booleans;
  65   int xchal_have_fp;
  66   int xchal_have_fp_div;
  67   int xchal_have_fp_recip;
  68   int xchal_have_fp_sqrt;
  69   int xchal_have_fp_rsqrt;
  70   int xchal_have_fp_postinc;
  71   int xchal_have_dfp;
  72   int xchal_have_dfp_div;
  73   int xchal_have_dfp_recip;
  74   int xchal_have_dfp_sqrt;
  75   int xchal_have_dfp_rsqrt;
  76   int xchal_have_windowed;
  77   int xchal_num_aregs;
  78   int xchal_have_wide_branches;
  79   int xchal_have_predicted_branches;
  80   int xchal_icache_size;
  81   int xchal_dcache_size;
  82   int xchal_icache_linesize;
  83   int xchal_dcache_linesize;
  84   int xchal_icache_linewidth;
  85   int xchal_dcache_linewidth;
  86   int xchal_dcache_is_writeback;
  87   int xchal_have_mmu;
  88   int xchal_mmu_min_pte_page_size;
  89   int xchal_have_debug;
  90   int xchal_num_ibreak;
  91   int xchal_num_dbreak;
  92   int xchal_debuglevel;
  93   int xchal_max_instruction_size;
  94   int xchal_inst_fetch_width;
  95   int xshal_abi;
  96   int xthal_abi_windowed;
  97   int xthal_abi_call0;
  98 };
  99
 100 struct xtensa_config_v2
 101 {
 102   int xchal_m_stage;
 103   int xtensa_march_latest;
 104   int xtensa_march_earliest;
 105 };
 106
 107 struct xtensa_config_v3
 108 {
 109   int xchal_have_clamps;
 110   int xchal_have_depbits;
 111   int xchal_have_exclusive;
 112   int xchal_have_xea3;
 113 };
 114
 115 struct xtensa_config_v4
 116 {
 117   int xchal_data_width;
 118   int xchal_unaligned_load_exception;
 119   int xchal_unaligned_store_exception;
 120   int xchal_unaligned_load_hw;
 121   int xchal_unaligned_store_hw;
 122 };
 123
 124 typedef struct xtensa_isa_internal_struct xtensa_isa_internal;
 125
 126 extern const void *xtensa_load_config (const char *name,
 127                                        const void *no_plugin_def,
 128                                        const void *no_name_def);
 129 extern const struct xtensa_config_v1 *xtensa_get_config_v1 (void);
 130 extern const struct xtensa_config_v2 *xtensa_get_config_v2 (void);
 131 extern const struct xtensa_config_v3 *xtensa_get_config_v3 (void);
 132 extern const struct xtensa_config_v4 *xtensa_get_config_v4 (void);
 133
 134 #ifdef XTENSA_CONFIG_DEFINITION
 135
 136 #ifndef XCHAL_HAVE_MUL32_HIGH
 137 #define XCHAL_HAVE_MUL32_HIGH 0
 138 #endif
 139
 140 #ifndef XCHAL_HAVE_RELEASE_SYNC
 141 #define XCHAL_HAVE_RELEASE_SYNC 0
 142 #endif
 143
 144 #ifndef XCHAL_HAVE_S32C1I
 145 #define XCHAL_HAVE_S32C1I 0
 146 #endif
 147
 148 #ifndef XCHAL_HAVE_THREADPTR
 149 #define XCHAL_HAVE_THREADPTR 0
 150 #endif
 151
 152 #ifndef XCHAL_HAVE_FP_POSTINC
 153 #define XCHAL_HAVE_FP_POSTINC 0
 154 #endif
 155
 156 #ifndef XCHAL_HAVE_DFP
 157 #define XCHAL_HAVE_DFP 0
 158 #endif
 159
 160 #ifndef XCHAL_HAVE_DFP_DIV
 161 #define XCHAL_HAVE_DFP_DIV 0
 162 #endif
 163
 164 #ifndef XCHAL_HAVE_DFP_RECIP
 165 #define XCHAL_HAVE_DFP_RECIP 0
 166 #endif
 167
 168 #ifndef XCHAL_HAVE_DFP_SQRT
 169 #define XCHAL_HAVE_DFP_SQRT 0
 170 #endif
 171
 172 #ifndef XCHAL_HAVE_DFP_RSQRT
 173 #define XCHAL_HAVE_DFP_RSQRT 0
 174 #endif
 175
 176 #ifndef XSHAL_HAVE_TEXT_SECTION_LITERALS
 177 #define XSHAL_HAVE_TEXT_SECTION_LITERALS 0
 178 #endif
 179
 180 #ifndef XCHAL_MMU_MIN_PTE_PAGE_SIZE
 181 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 1
 182 #endif
 183
 184 #ifndef XTHAL_ABI_WINDOWED
 185 #define XTHAL_ABI_WINDOWED 0
 186 #endif
 187
 188 #ifndef XTHAL_ABI_CALL0
 189 #define XTHAL_ABI_CALL0 1
 190 #endif
 191
 192 #ifndef XCHAL_M_STAGE
 193 #define XCHAL_M_STAGE 0
 194 #endif
 195
 196 #ifndef XTENSA_MARCH_LATEST
 197 #define XTENSA_MARCH_LATEST 0
 198 #endif
 199
 200 #ifndef XTENSA_MARCH_EARLIEST
 201 #define XTENSA_MARCH_EARLIEST 0
 202 #endif
 203
 204 #ifndef XCHAL_HAVE_CLAMPS
 205 #define XCHAL_HAVE_CLAMPS 0
 206 #endif
 207
 208 #ifndef XCHAL_HAVE_DEPBITS
 209 #define XCHAL_HAVE_DEPBITS 0
 210 #endif
 211
 212 #ifndef XCHAL_HAVE_EXCLUSIVE
 213 #define XCHAL_HAVE_EXCLUSIVE 0
 214 #endif
 215
 216 #ifndef XCHAL_HAVE_XEA3
 217 #define XCHAL_HAVE_XEA3 0
 218 #endif
 219
 220 #ifndef XCHAL_DATA_WIDTH
 221 #define XCHAL_DATA_WIDTH 16
 222 #endif
 223
 224 #ifndef XCHAL_UNALIGNED_LOAD_EXCEPTION
 225 #define XCHAL_UNALIGNED_LOAD_EXCEPTION 1
 226 #endif
 227
 228 #ifndef XCHAL_UNALIGNED_STORE_EXCEPTION
 229 #define XCHAL_UNALIGNED_STORE_EXCEPTION 1
 230 #endif
 231
 232 #ifndef XCHAL_UNALIGNED_LOAD_HW
 233 #define XCHAL_UNALIGNED_LOAD_HW 0
 234 #endif
 235
 236 #ifndef XCHAL_UNALIGNED_STORE_HW
 237 #define XCHAL_UNALIGNED_STORE_HW 0
 238 #endif
 239
 240 #define XTENSA_CONFIG_ENTRY(a) a
 241
 242 #define XTENSA_CONFIG_V1_ENTRY_LIST \
 243     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BE), \
 244     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DENSITY), \
 245     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_CONST16), \
 246     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ABS), \
 247     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ADDX), \
 248     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_L32R), \
 249     XTENSA_CONFIG_ENTRY(XSHAL_USE_ABSOLUTE_LITERALS), \
 250     XTENSA_CONFIG_ENTRY(XSHAL_HAVE_TEXT_SECTION_LITERALS), \
 251     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MAC16), \
 252     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL16), \
 253     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32), \
 254     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32_HIGH), \
 255     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DIV32), \
 256     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_NSA), \
 257     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MINMAX), \
 258     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_SEXT), \
 259     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_LOOPS), \
 260     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_THREADPTR), \
 261     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_RELEASE_SYNC), \
 262     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_S32C1I), \
 263     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BOOLEANS), \
 264     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP), \
 265     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_DIV), \
 266     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RECIP), \
 267     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_SQRT), \
 268     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RSQRT), \
 269     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_POSTINC), \
 270     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP), \
 271     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_DIV), \
 272     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RECIP), \
 273     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_SQRT), \
 274     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RSQRT), \
 275     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WINDOWED), \
 276     XTENSA_CONFIG_ENTRY(XCHAL_NUM_AREGS), \
 277     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WIDE_BRANCHES), \
 278     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_PREDICTED_BRANCHES), \
 279     XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_SIZE), \
 280     XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_SIZE), \
 281     XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINESIZE), \
 282     XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINESIZE), \
 283     XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINEWIDTH), \
 284     XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINEWIDTH), \
 285     XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_IS_WRITEBACK), \
 286     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MMU), \
 287     XTENSA_CONFIG_ENTRY(XCHAL_MMU_MIN_PTE_PAGE_SIZE), \
 288     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DEBUG), \
 289     XTENSA_CONFIG_ENTRY(XCHAL_NUM_IBREAK), \
 290     XTENSA_CONFIG_ENTRY(XCHAL_NUM_DBREAK), \
 291     XTENSA_CONFIG_ENTRY(XCHAL_DEBUGLEVEL), \
 292     XTENSA_CONFIG_ENTRY(XCHAL_MAX_INSTRUCTION_SIZE), \
 293     XTENSA_CONFIG_ENTRY(XCHAL_INST_FETCH_WIDTH), \
 294     XTENSA_CONFIG_ENTRY(XSHAL_ABI), \
 295     XTENSA_CONFIG_ENTRY(XTHAL_ABI_WINDOWED), \
 296     XTENSA_CONFIG_ENTRY(XTHAL_ABI_CALL0)
 297
 298 #define XTENSA_CONFIG_V2_ENTRY_LIST \
 299     XTENSA_CONFIG_ENTRY(XCHAL_M_STAGE), \
 300     XTENSA_CONFIG_ENTRY(XTENSA_MARCH_LATEST), \
 301     XTENSA_CONFIG_ENTRY(XTENSA_MARCH_EARLIEST)
 302
 303 #define XTENSA_CONFIG_V3_ENTRY_LIST \
 304     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_CLAMPS), \
 305     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DEPBITS), \
 306     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_EXCLUSIVE), \
 307     XTENSA_CONFIG_ENTRY(XCHAL_HAVE_XEA3)
 308
 309 #define XTENSA_CONFIG_V4_ENTRY_LIST \
 310     XTENSA_CONFIG_ENTRY(XCHAL_DATA_WIDTH), \
 311     XTENSA_CONFIG_ENTRY(XCHAL_UNALIGNED_LOAD_EXCEPTION), \
 312     XTENSA_CONFIG_ENTRY(XCHAL_UNALIGNED_STORE_EXCEPTION), \
 313     XTENSA_CONFIG_ENTRY(XCHAL_UNALIGNED_LOAD_HW), \
 314     XTENSA_CONFIG_ENTRY(XCHAL_UNALIGNED_STORE_HW)
 315
 316 #define XTENSA_CONFIG_INSTANCE_LIST \
 317 const struct xtensa_config_v1 xtensa_config_v1 = { \
 318     XTENSA_CONFIG_V1_ENTRY_LIST, \
 319 }; \
 320 const struct xtensa_config_v2 xtensa_config_v2 = { \
 321     XTENSA_CONFIG_V2_ENTRY_LIST, \
 322 }; \
 323 const struct xtensa_config_v3 xtensa_config_v3 = { \
 324     XTENSA_CONFIG_V3_ENTRY_LIST, \
 325 }; \
 326 const struct xtensa_config_v4 xtensa_config_v4 = { \
 327     XTENSA_CONFIG_V4_ENTRY_LIST, \
 328 }
 329
 330 #define XTENSA_CONFIG_ENTRY_LIST \
 331     XTENSA_CONFIG_V1_ENTRY_LIST, \
 332     XTENSA_CONFIG_V2_ENTRY_LIST, \
 333     XTENSA_CONFIG_V3_ENTRY_LIST, \
 334     XTENSA_CONFIG_V4_ENTRY_LIST
 335
 336 #else /* XTENSA_CONFIG_DEFINITION */
 337
 338 #undef XCHAL_HAVE_BE
 339 #define XCHAL_HAVE_BE                   (xtensa_get_config_v1 ()->xchal_have_be)
 340
 341 #undef XCHAL_HAVE_DENSITY
 342 #define XCHAL_HAVE_DENSITY              (xtensa_get_config_v1 ()->xchal_have_density)
 343
 344 #undef XCHAL_HAVE_CONST16
 345 #define XCHAL_HAVE_CONST16              (xtensa_get_config_v1 ()->xchal_have_const16)
 346
 347 #undef XCHAL_HAVE_ABS
 348 #define XCHAL_HAVE_ABS                  (xtensa_get_config_v1 ()->xchal_have_abs)
 349
 350 #undef XCHAL_HAVE_ADDX
 351 #define XCHAL_HAVE_ADDX                 (xtensa_get_config_v1 ()->xchal_have_addx)
 352
 353 #undef XCHAL_HAVE_L32R
 354 #define XCHAL_HAVE_L32R                 (xtensa_get_config_v1 ()->xchal_have_l32r)
 355
 356 #undef XSHAL_USE_ABSOLUTE_LITERALS
 357 #define XSHAL_USE_ABSOLUTE_LITERALS     (xtensa_get_config_v1 ()->xshal_use_absolute_literals)
 358
 359 #undef XSHAL_HAVE_TEXT_SECTION_LITERALS
 360 #define XSHAL_HAVE_TEXT_SECTION_LITERALS (xtensa_get_config_v1 ()->xshal_have_text_section_literals)
 361
 362 #undef XCHAL_HAVE_MAC16
 363 #define XCHAL_HAVE_MAC16                (xtensa_get_config_v1 ()->xchal_have_mac16)
 364
 365 #undef XCHAL_HAVE_MUL16
 366 #define XCHAL_HAVE_MUL16                (xtensa_get_config_v1 ()->xchal_have_mul16)
 367
 368 #undef XCHAL_HAVE_MUL32
 369 #define XCHAL_HAVE_MUL32                (xtensa_get_config_v1 ()->xchal_have_mul32)
 370
 371 #undef XCHAL_HAVE_MUL32_HIGH
 372 #define XCHAL_HAVE_MUL32_HIGH           (xtensa_get_config_v1 ()->xchal_have_mul32_high)
 373
 374 #undef XCHAL_HAVE_DIV32
 375 #define XCHAL_HAVE_DIV32                (xtensa_get_config_v1 ()->xchal_have_div32)
 376
 377 #undef XCHAL_HAVE_NSA
 378 #define XCHAL_HAVE_NSA                  (xtensa_get_config_v1 ()->xchal_have_nsa)
 379
 380 #undef XCHAL_HAVE_MINMAX
 381 #define XCHAL_HAVE_MINMAX               (xtensa_get_config_v1 ()->xchal_have_minmax)
 382
 383 #undef XCHAL_HAVE_SEXT
 384 #define XCHAL_HAVE_SEXT                 (xtensa_get_config_v1 ()->xchal_have_sext)
 385
 386 #undef XCHAL_HAVE_LOOPS
 387 #define XCHAL_HAVE_LOOPS                (xtensa_get_config_v1 ()->xchal_have_loops)
 388
 389 #undef XCHAL_HAVE_THREADPTR
 390 #define XCHAL_HAVE_THREADPTR            (xtensa_get_config_v1 ()->xchal_have_threadptr)
 391
 392 #undef XCHAL_HAVE_RELEASE_SYNC
 393 #define XCHAL_HAVE_RELEASE_SYNC         (xtensa_get_config_v1 ()->xchal_have_release_sync)
 394
 395 #undef XCHAL_HAVE_S32C1I
 396 #define XCHAL_HAVE_S32C1I               (xtensa_get_config_v1 ()->xchal_have_s32c1i)
 397
 398 #undef XCHAL_HAVE_BOOLEANS
 399 #define XCHAL_HAVE_BOOLEANS             (xtensa_get_config_v1 ()->xchal_have_booleans)
 400
 401 #undef XCHAL_HAVE_FP
 402 #define XCHAL_HAVE_FP                   (xtensa_get_config_v1 ()->xchal_have_fp)
 403
 404 #undef XCHAL_HAVE_FP_DIV
 405 #define XCHAL_HAVE_FP_DIV               (xtensa_get_config_v1 ()->xchal_have_fp_div)
 406
 407 #undef XCHAL_HAVE_FP_RECIP
 408 #define XCHAL_HAVE_FP_RECIP             (xtensa_get_config_v1 ()->xchal_have_fp_recip)
 409
 410 #undef XCHAL_HAVE_FP_SQRT
 411 #define XCHAL_HAVE_FP_SQRT              (xtensa_get_config_v1 ()->xchal_have_fp_sqrt)
 412
 413 #undef XCHAL_HAVE_FP_RSQRT
 414 #define XCHAL_HAVE_FP_RSQRT             (xtensa_get_config_v1 ()->xchal_have_fp_rsqrt)
 415
 416 #undef XCHAL_HAVE_FP_POSTINC
 417 #define XCHAL_HAVE_FP_POSTINC           (xtensa_get_config_v1 ()->xchal_have_fp_postinc)
 418
 419 #undef XCHAL_HAVE_DFP
 420 #define XCHAL_HAVE_DFP                  (xtensa_get_config_v1 ()->xchal_have_dfp)
 421
 422 #undef XCHAL_HAVE_DFP_DIV
 423 #define XCHAL_HAVE_DFP_DIV              (xtensa_get_config_v1 ()->xchal_have_dfp_div)
 424
 425 #undef XCHAL_HAVE_DFP_RECIP
 426 #define XCHAL_HAVE_DFP_RECIP            (xtensa_get_config_v1 ()->xchal_have_dfp_recip)
 427
 428 #undef XCHAL_HAVE_DFP_SQRT
 429 #define XCHAL_HAVE_DFP_SQRT             (xtensa_get_config_v1 ()->xchal_have_dfp_sqrt)
 430
 431 #undef XCHAL_HAVE_DFP_RSQRT
 432 #define XCHAL_HAVE_DFP_RSQRT            (xtensa_get_config_v1 ()->xchal_have_dfp_rsqrt)
 433
 434 #undef XCHAL_HAVE_WINDOWED
 435 #define XCHAL_HAVE_WINDOWED             (xtensa_get_config_v1 ()->xchal_have_windowed)
 436
 437 #undef XCHAL_NUM_AREGS
 438 #define XCHAL_NUM_AREGS                 (xtensa_get_config_v1 ()->xchal_num_aregs)
 439
 440 #undef XCHAL_HAVE_WIDE_BRANCHES
 441 #define XCHAL_HAVE_WIDE_BRANCHES        (xtensa_get_config_v1 ()->xchal_have_wide_branches)
 442
 443 #undef XCHAL_HAVE_PREDICTED_BRANCHES
 444 #define XCHAL_HAVE_PREDICTED_BRANCHES   (xtensa_get_config_v1 ()->xchal_have_predicted_branches)
 445
 446
 447 #undef XCHAL_ICACHE_SIZE
 448 #define XCHAL_ICACHE_SIZE               (xtensa_get_config_v1 ()->xchal_icache_size)
 449
 450 #undef XCHAL_DCACHE_SIZE
 451 #define XCHAL_DCACHE_SIZE               (xtensa_get_config_v1 ()->xchal_dcache_size)
 452
 453 #undef XCHAL_ICACHE_LINESIZE
 454 #define XCHAL_ICACHE_LINESIZE           (xtensa_get_config_v1 ()->xchal_icache_linesize)
 455
 456 #undef XCHAL_DCACHE_LINESIZE
 457 #define XCHAL_DCACHE_LINESIZE           (xtensa_get_config_v1 ()->xchal_dcache_linesize)
 458
 459 #undef XCHAL_ICACHE_LINEWIDTH
 460 #define XCHAL_ICACHE_LINEWIDTH          (xtensa_get_config_v1 ()->xchal_icache_linewidth)
 461
 462 #undef XCHAL_DCACHE_LINEWIDTH
 463 #define XCHAL_DCACHE_LINEWIDTH          (xtensa_get_config_v1 ()->xchal_dcache_linewidth)
 464
 465 #undef XCHAL_DCACHE_IS_WRITEBACK
 466 #define XCHAL_DCACHE_IS_WRITEBACK       (xtensa_get_config_v1 ()->xchal_dcache_is_writeback)
 467
 468
 469 #undef XCHAL_HAVE_MMU
 470 #define XCHAL_HAVE_MMU                  (xtensa_get_config_v1 ()->xchal_have_mmu)
 471
 472 #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
 473 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE     (xtensa_get_config_v1 ()->xchal_mmu_min_pte_page_size)
 474
 475
 476 #undef XCHAL_HAVE_DEBUG
 477 #define XCHAL_HAVE_DEBUG                (xtensa_get_config_v1 ()->xchal_have_debug)
 478
 479 #undef XCHAL_NUM_IBREAK
 480 #define XCHAL_NUM_IBREAK                (xtensa_get_config_v1 ()->xchal_num_ibreak)
 481
 482 #undef XCHAL_NUM_DBREAK
 483 #define XCHAL_NUM_DBREAK                (xtensa_get_config_v1 ()->xchal_num_dbreak)
 484
 485 #undef XCHAL_DEBUGLEVEL
 486 #define XCHAL_DEBUGLEVEL                (xtensa_get_config_v1 ()->xchal_debuglevel)
 487
 488
 489 #undef XCHAL_MAX_INSTRUCTION_SIZE
 490 #define XCHAL_MAX_INSTRUCTION_SIZE      (xtensa_get_config_v1 ()->xchal_max_instruction_size)
 491
 492 #undef XCHAL_INST_FETCH_WIDTH
 493 #define XCHAL_INST_FETCH_WIDTH          (xtensa_get_config_v1 ()->xchal_inst_fetch_width)
 494
 495
 496 #undef XSHAL_ABI
 497 #undef XTHAL_ABI_WINDOWED
 498 #undef XTHAL_ABI_CALL0
 499 #define XSHAL_ABI                       (xtensa_get_config_v1 ()->xshal_abi)
 500 #define XTHAL_ABI_WINDOWED              (xtensa_get_config_v1 ()->xthal_abi_windowed)
 501 #define XTHAL_ABI_CALL0                 (xtensa_get_config_v1 ()->xthal_abi_call0)
 502
 503
 504 #undef XCHAL_M_STAGE
 505 #define XCHAL_M_STAGE                   (xtensa_get_config_v2 ()->xchal_m_stage)
 506
 507 #undef XTENSA_MARCH_LATEST
 508 #define XTENSA_MARCH_LATEST             (xtensa_get_config_v2 ()->xtensa_march_latest)
 509
 510 #undef XTENSA_MARCH_EARLIEST
 511 #define XTENSA_MARCH_EARLIEST           (xtensa_get_config_v2 ()->xtensa_march_earliest)
 512
 513
 514 #undef XCHAL_HAVE_CLAMPS
 515 #define XCHAL_HAVE_CLAMPS               (xtensa_get_config_v3 ()->xchal_have_clamps)
 516
 517 #undef XCHAL_HAVE_DEPBITS
 518 #define XCHAL_HAVE_DEPBITS              (xtensa_get_config_v3 ()->xchal_have_depbits)
 519
 520 #undef XCHAL_HAVE_EXCLUSIVE
 521 #define XCHAL_HAVE_EXCLUSIVE            (xtensa_get_config_v3 ()->xchal_have_exclusive)
 522
 523 #undef XCHAL_HAVE_XEA3
 524 #define XCHAL_HAVE_XEA3                 (xtensa_get_config_v3 ()->xchal_have_xea3)
 525
 526
 527 #undef XCHAL_DATA_WIDTH
 528 #define XCHAL_DATA_WIDTH                (xtensa_get_config_v4 ()->xchal_data_width)
 529
 530 #undef XCHAL_UNALIGNED_LOAD_EXCEPTION
 531 #define XCHAL_UNALIGNED_LOAD_EXCEPTION  (xtensa_get_config_v4 ()->xchal_unaligned_load_exception)
 532
 533 #undef XCHAL_UNALIGNED_STORE_EXCEPTION
 534 #define XCHAL_UNALIGNED_STORE_EXCEPTION (xtensa_get_config_v4 ()->xchal_unaligned_store_exception)
 535
 536 #undef XCHAL_UNALIGNED_LOAD_HW
 537 #define XCHAL_UNALIGNED_LOAD_HW         (xtensa_get_config_v4 ()->xchal_unaligned_load_hw)
 538
 539 #undef XCHAL_UNALIGNED_STORE_HW
 540 #define XCHAL_UNALIGNED_STORE_HW        (xtensa_get_config_v4 ()->xchal_unaligned_store_hw)
 541
 542 #endif /* XTENSA_CONFIG_DEFINITION */
 543
 544 #ifdef __cplusplus
 545 }
 546 #endif
 547 #endif /* !XTENSA_DYNCONFIG_H */