1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
70 /* This is *not* reset after each function. It gives each CODE_LABEL
71 in the entire compilation a unique label number. */
73 static GTY(()) int label_num
= 1;
75 /* Nonzero means do not generate NOTEs for source line numbers. */
77 static int no_line_numbers
;
79 /* Commonly used rtx's, so that we only need space for one copy.
80 These are initialized once for the entire compilation.
81 All of these are unique; no other rtx-object will be equal to any
84 rtx global_rtl
[GR_MAX
];
86 /* Commonly used RTL for hard registers. These objects are not necessarily
87 unique, so we allocate them separately from global_rtl. They are
88 initialized once per compilation unit, then copied into regno_reg_rtx
89 at the beginning of each function. */
90 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
92 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
93 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
94 record a copy of const[012]_rtx. */
96 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
100 REAL_VALUE_TYPE dconst0
;
101 REAL_VALUE_TYPE dconst1
;
102 REAL_VALUE_TYPE dconst2
;
103 REAL_VALUE_TYPE dconst3
;
104 REAL_VALUE_TYPE dconst10
;
105 REAL_VALUE_TYPE dconstm1
;
106 REAL_VALUE_TYPE dconstm2
;
107 REAL_VALUE_TYPE dconsthalf
;
108 REAL_VALUE_TYPE dconstthird
;
109 REAL_VALUE_TYPE dconstsqrt2
;
110 REAL_VALUE_TYPE dconste
;
112 /* All references to the following fixed hard registers go through
113 these unique rtl objects. On machines where the frame-pointer and
114 arg-pointer are the same register, they use the same unique object.
116 After register allocation, other rtl objects which used to be pseudo-regs
117 may be clobbered to refer to the frame-pointer register.
118 But references that were originally to the frame-pointer can be
119 distinguished from the others because they contain frame_pointer_rtx.
121 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
122 tricky: until register elimination has taken place hard_frame_pointer_rtx
123 should be used if it is being set, and frame_pointer_rtx otherwise. After
124 register elimination hard_frame_pointer_rtx should always be used.
125 On machines where the two registers are same (most) then these are the
128 In an inline procedure, the stack and frame pointer rtxs may not be
129 used for anything else. */
130 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
131 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
132 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
134 /* This is used to implement __builtin_return_address for some machines.
135 See for instance the MIPS port. */
136 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
138 /* We make one copy of (const_int C) where C is in
139 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
140 to save space during the compilation and simplify comparisons of
143 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
145 /* A hash table storing CONST_INTs whose absolute value is greater
146 than MAX_SAVED_CONST_INT. */
148 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
149 htab_t const_int_htab
;
151 /* A hash table storing memory attribute structures. */
152 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
153 htab_t mem_attrs_htab
;
155 /* A hash table storing register attribute structures. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
157 htab_t reg_attrs_htab
;
159 /* A hash table storing all CONST_DOUBLEs. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
161 htab_t const_double_htab
;
163 #define first_insn (cfun->emit->x_first_insn)
164 #define last_insn (cfun->emit->x_last_insn)
165 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
166 #define last_location (cfun->emit->x_last_location)
167 #define first_label_num (cfun->emit->x_first_label_num)
169 static rtx
make_call_insn_raw (rtx
);
170 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
171 static void reset_used_decls (tree
);
172 static void mark_label_nuses (rtx
);
173 static hashval_t
const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t
const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx
lookup_const_double (rtx
);
178 static hashval_t
mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
182 static hashval_t
reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs
*get_reg_attrs (tree
, int);
185 static tree
component_ref_for_mem_expr (tree
);
186 static rtx
gen_const_vector (enum machine_mode
, int);
187 static void copy_rtx_if_shared_1 (rtx
*orig
);
189 /* Probability of the conditional branch currently proceeded by try_split.
190 Set to -1 otherwise. */
191 int split_branch_probability
= -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (const void *x
)
198 return (hashval_t
) INTVAL ((rtx
) x
);
201 /* Returns nonzero if the value represented by X (which is really a
202 CONST_INT) is the same as that given by Y (which is really a
206 const_int_htab_eq (const void *x
, const void *y
)
208 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
211 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
213 const_double_htab_hash (const void *x
)
218 if (GET_MODE (value
) == VOIDmode
)
219 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
222 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
223 /* MODE is used in the comparison, so it should be in the hash. */
224 h
^= GET_MODE (value
);
229 /* Returns nonzero if the value represented by X (really a ...)
230 is the same as that represented by Y (really a ...) */
232 const_double_htab_eq (const void *x
, const void *y
)
234 rtx a
= (rtx
)x
, b
= (rtx
)y
;
236 if (GET_MODE (a
) != GET_MODE (b
))
238 if (GET_MODE (a
) == VOIDmode
)
239 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
240 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
242 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
243 CONST_DOUBLE_REAL_VALUE (b
));
246 /* Returns a hash code for X (which is a really a mem_attrs *). */
249 mem_attrs_htab_hash (const void *x
)
251 mem_attrs
*p
= (mem_attrs
*) x
;
253 return (p
->alias
^ (p
->align
* 1000)
254 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
255 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
256 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
259 /* Returns nonzero if the value represented by X (which is really a
260 mem_attrs *) is the same as that given by Y (which is also really a
264 mem_attrs_htab_eq (const void *x
, const void *y
)
266 mem_attrs
*p
= (mem_attrs
*) x
;
267 mem_attrs
*q
= (mem_attrs
*) y
;
269 return (p
->alias
== q
->alias
&& p
->offset
== q
->offset
270 && p
->size
== q
->size
&& p
->align
== q
->align
271 && (p
->expr
== q
->expr
272 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
273 && operand_equal_p (p
->expr
, q
->expr
, 0))));
276 /* Allocate a new mem_attrs structure and insert it into the hash table if
277 one identical to it is not already in the table. We are doing this for
281 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
282 unsigned int align
, enum machine_mode mode
)
287 /* If everything is the default, we can just return zero.
288 This must match what the corresponding MEM_* macros return when the
289 field is not present. */
290 if (alias
== 0 && expr
== 0 && offset
== 0
292 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
293 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
294 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
299 attrs
.offset
= offset
;
303 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
306 *slot
= ggc_alloc (sizeof (mem_attrs
));
307 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
313 /* Returns a hash code for X (which is a really a reg_attrs *). */
316 reg_attrs_htab_hash (const void *x
)
318 reg_attrs
*p
= (reg_attrs
*) x
;
320 return ((p
->offset
* 1000) ^ (long) p
->decl
);
323 /* Returns nonzero if the value represented by X (which is really a
324 reg_attrs *) is the same as that given by Y (which is also really a
328 reg_attrs_htab_eq (const void *x
, const void *y
)
330 reg_attrs
*p
= (reg_attrs
*) x
;
331 reg_attrs
*q
= (reg_attrs
*) y
;
333 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
335 /* Allocate a new reg_attrs structure and insert it into the hash table if
336 one identical to it is not already in the table. We are doing this for
340 get_reg_attrs (tree decl
, int offset
)
345 /* If everything is the default, we can just return zero. */
346 if (decl
== 0 && offset
== 0)
350 attrs
.offset
= offset
;
352 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
355 *slot
= ggc_alloc (sizeof (reg_attrs
));
356 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
364 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
370 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
371 MEM_VOLATILE_P (x
) = true;
377 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
378 don't attempt to share with the various global pieces of rtl (such as
379 frame_pointer_rtx). */
382 gen_raw_REG (enum machine_mode mode
, int regno
)
384 rtx x
= gen_rtx_raw_REG (mode
, regno
);
385 ORIGINAL_REGNO (x
) = regno
;
389 /* There are some RTL codes that require special attention; the generation
390 functions do the raw handling. If you add to this list, modify
391 special_rtx in gengenrtl.c as well. */
394 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
398 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
399 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
401 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
402 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
403 return const_true_rtx
;
406 /* Look up the CONST_INT in the hash table. */
407 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
408 (hashval_t
) arg
, INSERT
);
410 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
416 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
418 return GEN_INT (trunc_int_for_mode (c
, mode
));
421 /* CONST_DOUBLEs might be created from pairs of integers, or from
422 REAL_VALUE_TYPEs. Also, their length is known only at run time,
423 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
425 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
426 hash table. If so, return its counterpart; otherwise add it
427 to the hash table and return it. */
429 lookup_const_double (rtx real
)
431 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
438 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
439 VALUE in mode MODE. */
441 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
443 rtx real
= rtx_alloc (CONST_DOUBLE
);
444 PUT_MODE (real
, mode
);
448 return lookup_const_double (real
);
451 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
452 of ints: I0 is the low-order word and I1 is the high-order word.
453 Do not use this routine for non-integer modes; convert to
454 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
457 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
462 /* There are the following cases (note that there are no modes with
463 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
465 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
467 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
468 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
469 from copies of the sign bit, and sign of i0 and i1 are the same), then
470 we return a CONST_INT for i0.
471 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
472 if (mode
!= VOIDmode
)
474 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
475 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
476 /* We can get a 0 for an error mark. */
477 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
478 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
480 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
481 return gen_int_mode (i0
, mode
);
483 gcc_assert (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
);
486 /* If this integer fits in one word, return a CONST_INT. */
487 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
490 /* We use VOIDmode for integers. */
491 value
= rtx_alloc (CONST_DOUBLE
);
492 PUT_MODE (value
, VOIDmode
);
494 CONST_DOUBLE_LOW (value
) = i0
;
495 CONST_DOUBLE_HIGH (value
) = i1
;
497 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
498 XWINT (value
, i
) = 0;
500 return lookup_const_double (value
);
504 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
506 /* In case the MD file explicitly references the frame pointer, have
507 all such references point to the same frame pointer. This is
508 used during frame pointer elimination to distinguish the explicit
509 references to these registers from pseudos that happened to be
512 If we have eliminated the frame pointer or arg pointer, we will
513 be using it as a normal register, for example as a spill
514 register. In such cases, we might be accessing it in a mode that
515 is not Pmode and therefore cannot use the pre-allocated rtx.
517 Also don't do this when we are making new REGs in reload, since
518 we don't want to get confused with the real pointers. */
520 if (mode
== Pmode
&& !reload_in_progress
)
522 if (regno
== FRAME_POINTER_REGNUM
523 && (!reload_completed
|| frame_pointer_needed
))
524 return frame_pointer_rtx
;
525 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
526 if (regno
== HARD_FRAME_POINTER_REGNUM
527 && (!reload_completed
|| frame_pointer_needed
))
528 return hard_frame_pointer_rtx
;
530 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
531 if (regno
== ARG_POINTER_REGNUM
)
532 return arg_pointer_rtx
;
534 #ifdef RETURN_ADDRESS_POINTER_REGNUM
535 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
536 return return_address_pointer_rtx
;
538 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
539 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
540 return pic_offset_table_rtx
;
541 if (regno
== STACK_POINTER_REGNUM
)
542 return stack_pointer_rtx
;
546 /* If the per-function register table has been set up, try to re-use
547 an existing entry in that table to avoid useless generation of RTL.
549 This code is disabled for now until we can fix the various backends
550 which depend on having non-shared hard registers in some cases. Long
551 term we want to re-enable this code as it can significantly cut down
552 on the amount of useless RTL that gets generated.
554 We'll also need to fix some code that runs after reload that wants to
555 set ORIGINAL_REGNO. */
560 && regno
< FIRST_PSEUDO_REGISTER
561 && reg_raw_mode
[regno
] == mode
)
562 return regno_reg_rtx
[regno
];
565 return gen_raw_REG (mode
, regno
);
569 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
571 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
573 /* This field is not cleared by the mere allocation of the rtx, so
580 /* Generate a memory referring to non-trapping constant memory. */
583 gen_const_mem (enum machine_mode mode
, rtx addr
)
585 rtx mem
= gen_rtx_MEM (mode
, addr
);
586 MEM_READONLY_P (mem
) = 1;
587 MEM_NOTRAP_P (mem
) = 1;
591 /* Generate a MEM referring to fixed portions of the frame, e.g., register
595 gen_frame_mem (enum machine_mode mode
, rtx addr
)
597 rtx mem
= gen_rtx_MEM (mode
, addr
);
598 MEM_NOTRAP_P (mem
) = 1;
599 set_mem_alias_set (mem
, get_frame_alias_set ());
603 /* Generate a MEM referring to a temporary use of the stack, not part
604 of the fixed stack frame. For example, something which is pushed
605 by a target splitter. */
607 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
609 rtx mem
= gen_rtx_MEM (mode
, addr
);
610 MEM_NOTRAP_P (mem
) = 1;
611 if (!current_function_calls_alloca
)
612 set_mem_alias_set (mem
, get_frame_alias_set ());
616 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
617 this construct would be valid, and false otherwise. */
620 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
621 rtx reg
, unsigned int offset
)
623 unsigned int isize
= GET_MODE_SIZE (imode
);
624 unsigned int osize
= GET_MODE_SIZE (omode
);
626 /* All subregs must be aligned. */
627 if (offset
% osize
!= 0)
630 /* The subreg offset cannot be outside the inner object. */
634 /* ??? This should not be here. Temporarily continue to allow word_mode
635 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
636 Generally, backends are doing something sketchy but it'll take time to
638 if (omode
== word_mode
)
640 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
641 is the culprit here, and not the backends. */
642 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
644 /* Allow component subregs of complex and vector. Though given the below
645 extraction rules, it's not always clear what that means. */
646 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
647 && GET_MODE_INNER (imode
) == omode
)
649 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
650 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
651 represent this. It's questionable if this ought to be represented at
652 all -- why can't this all be hidden in post-reload splitters that make
653 arbitrarily mode changes to the registers themselves. */
654 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
656 /* Subregs involving floating point modes are not allowed to
657 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
658 (subreg:SI (reg:DF) 0) isn't. */
659 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
665 /* Paradoxical subregs must have offset zero. */
669 /* This is a normal subreg. Verify that the offset is representable. */
671 /* For hard registers, we already have most of these rules collected in
672 subreg_offset_representable_p. */
673 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
675 unsigned int regno
= REGNO (reg
);
677 #ifdef CANNOT_CHANGE_MODE_CLASS
678 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
679 && GET_MODE_INNER (imode
) == omode
)
681 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
685 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
688 /* For pseudo registers, we want most of the same checks. Namely:
689 If the register no larger than a word, the subreg must be lowpart.
690 If the register is larger than a word, the subreg must be the lowpart
691 of a subword. A subreg does *not* perform arbitrary bit extraction.
692 Given that we've already checked mode/offset alignment, we only have
693 to check subword subregs here. */
694 if (osize
< UNITS_PER_WORD
)
696 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
697 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
698 if (offset
% UNITS_PER_WORD
!= low_off
)
705 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
707 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
708 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
711 /* Generate a SUBREG representing the least-significant part of REG if MODE
712 is smaller than mode of REG, otherwise paradoxical SUBREG. */
715 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
717 enum machine_mode inmode
;
719 inmode
= GET_MODE (reg
);
720 if (inmode
== VOIDmode
)
722 return gen_rtx_SUBREG (mode
, reg
,
723 subreg_lowpart_offset (mode
, inmode
));
726 /* gen_rtvec (n, [rt1, ..., rtn])
728 ** This routine creates an rtvec and stores within it the
729 ** pointers to rtx's which are its arguments.
734 gen_rtvec (int n
, ...)
743 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
745 vector
= alloca (n
* sizeof (rtx
));
747 for (i
= 0; i
< n
; i
++)
748 vector
[i
] = va_arg (p
, rtx
);
750 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
754 return gen_rtvec_v (save_n
, vector
);
758 gen_rtvec_v (int n
, rtx
*argp
)
764 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
766 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
768 for (i
= 0; i
< n
; i
++)
769 rt_val
->elem
[i
] = *argp
++;
774 /* Generate a REG rtx for a new pseudo register of mode MODE.
775 This pseudo is assigned the next sequential register number. */
778 gen_reg_rtx (enum machine_mode mode
)
780 struct function
*f
= cfun
;
783 /* Don't let anything called after initial flow analysis create new
785 gcc_assert (!no_new_pseudos
);
787 if (generating_concat_p
788 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
789 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
791 /* For complex modes, don't make a single pseudo.
792 Instead, make a CONCAT of two pseudos.
793 This allows noncontiguous allocation of the real and imaginary parts,
794 which makes much better code. Besides, allocating DCmode
795 pseudos overstrains reload on some machines like the 386. */
796 rtx realpart
, imagpart
;
797 enum machine_mode partmode
= GET_MODE_INNER (mode
);
799 realpart
= gen_reg_rtx (partmode
);
800 imagpart
= gen_reg_rtx (partmode
);
801 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
804 /* Make sure regno_pointer_align, and regno_reg_rtx are large
805 enough to have an element for this pseudo reg number. */
807 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
809 int old_size
= f
->emit
->regno_pointer_align_length
;
813 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
814 memset (new + old_size
, 0, old_size
);
815 f
->emit
->regno_pointer_align
= (unsigned char *) new;
817 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
818 old_size
* 2 * sizeof (rtx
));
819 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
820 regno_reg_rtx
= new1
;
822 f
->emit
->regno_pointer_align_length
= old_size
* 2;
825 val
= gen_raw_REG (mode
, reg_rtx_no
);
826 regno_reg_rtx
[reg_rtx_no
++] = val
;
830 /* Update NEW with the same attributes as REG, but offsetted by OFFSET.
831 Do the big endian correction if needed. */
834 update_reg_offset (rtx
new, rtx reg
, int offset
)
837 HOST_WIDE_INT var_size
;
839 /* PR middle-end/14084
840 The problem appears when a variable is stored in a larger register
841 and later it is used in the original mode or some mode in between
842 or some part of variable is accessed.
844 On little endian machines there is no problem because
845 the REG_OFFSET of the start of the variable is the same when
846 accessed in any mode (it is 0).
848 However, this is not true on big endian machines.
849 The offset of the start of the variable is different when accessed
851 When we are taking a part of the REG we have to change the OFFSET
852 from offset WRT size of mode of REG to offset WRT size of variable.
854 If we would not do the big endian correction the resulting REG_OFFSET
855 would be larger than the size of the DECL.
857 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
859 REG.mode MODE DECL size old offset new offset description
860 DI SI 4 4 0 int32 in SImode
861 DI SI 1 4 0 char in SImode
862 DI QI 1 7 0 char in QImode
863 DI QI 4 5 1 1st element in QImode
865 DI HI 4 6 2 1st element in HImode
868 If the size of DECL is equal or greater than the size of REG
869 we can't do this correction because the register holds the
870 whole variable or a part of the variable and thus the REG_OFFSET
871 is already correct. */
873 decl
= REG_EXPR (reg
);
874 if ((BYTES_BIG_ENDIAN
|| WORDS_BIG_ENDIAN
)
877 && GET_MODE_SIZE (GET_MODE (reg
)) > GET_MODE_SIZE (GET_MODE (new))
878 && ((var_size
= int_size_in_bytes (TREE_TYPE (decl
))) > 0
879 && var_size
< GET_MODE_SIZE (GET_MODE (reg
))))
883 /* Convert machine endian to little endian WRT size of mode of REG. */
884 if (WORDS_BIG_ENDIAN
)
885 offset_le
= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
886 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
888 offset_le
= (offset
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
890 if (BYTES_BIG_ENDIAN
)
891 offset_le
+= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
894 offset_le
+= offset
% UNITS_PER_WORD
;
896 if (offset_le
>= var_size
)
898 /* MODE is wider than the variable so the new reg will cover
899 the whole variable so the resulting OFFSET should be 0. */
904 /* Convert little endian to machine endian WRT size of variable. */
905 if (WORDS_BIG_ENDIAN
)
906 offset
= ((var_size
- 1 - offset_le
)
907 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
909 offset
= (offset_le
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
911 if (BYTES_BIG_ENDIAN
)
912 offset
+= ((var_size
- 1 - offset_le
)
915 offset
+= offset_le
% UNITS_PER_WORD
;
919 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
920 REG_OFFSET (reg
) + offset
);
923 /* Generate a register with same attributes as REG, but offsetted by
927 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
930 rtx
new = gen_rtx_REG (mode
, regno
);
932 update_reg_offset (new, reg
, offset
);
936 /* Generate a new pseudo-register with the same attributes as REG, but
937 offsetted by OFFSET. */
940 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
942 rtx
new = gen_reg_rtx (mode
);
944 update_reg_offset (new, reg
, offset
);
948 /* Set the decl for MEM to DECL. */
951 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
953 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
955 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
958 /* Set the register attributes for registers contained in PARM_RTX.
959 Use needed values from memory attributes of MEM. */
962 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
964 if (REG_P (parm_rtx
))
965 set_reg_attrs_from_mem (parm_rtx
, mem
);
966 else if (GET_CODE (parm_rtx
) == PARALLEL
)
968 /* Check for a NULL entry in the first slot, used to indicate that the
969 parameter goes both on the stack and in registers. */
970 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
971 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
973 rtx x
= XVECEXP (parm_rtx
, 0, i
);
974 if (REG_P (XEXP (x
, 0)))
975 REG_ATTRS (XEXP (x
, 0))
976 = get_reg_attrs (MEM_EXPR (mem
),
977 INTVAL (XEXP (x
, 1)));
982 /* Assign the RTX X to declaration T. */
984 set_decl_rtl (tree t
, rtx x
)
986 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
990 /* For register, we maintain the reverse information too. */
992 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
993 else if (GET_CODE (x
) == SUBREG
)
994 REG_ATTRS (SUBREG_REG (x
))
995 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
996 if (GET_CODE (x
) == CONCAT
)
998 if (REG_P (XEXP (x
, 0)))
999 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1000 if (REG_P (XEXP (x
, 1)))
1001 REG_ATTRS (XEXP (x
, 1))
1002 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1004 if (GET_CODE (x
) == PARALLEL
)
1007 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
1009 rtx y
= XVECEXP (x
, 0, i
);
1010 if (REG_P (XEXP (y
, 0)))
1011 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1016 /* Assign the RTX X to parameter declaration T. */
1018 set_decl_incoming_rtl (tree t
, rtx x
)
1020 DECL_INCOMING_RTL (t
) = x
;
1024 /* For register, we maintain the reverse information too. */
1026 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
1027 else if (GET_CODE (x
) == SUBREG
)
1028 REG_ATTRS (SUBREG_REG (x
))
1029 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
1030 if (GET_CODE (x
) == CONCAT
)
1032 if (REG_P (XEXP (x
, 0)))
1033 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1034 if (REG_P (XEXP (x
, 1)))
1035 REG_ATTRS (XEXP (x
, 1))
1036 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1038 if (GET_CODE (x
) == PARALLEL
)
1042 /* Check for a NULL entry, used to indicate that the parameter goes
1043 both on the stack and in registers. */
1044 if (XEXP (XVECEXP (x
, 0, 0), 0))
1049 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1051 rtx y
= XVECEXP (x
, 0, i
);
1052 if (REG_P (XEXP (y
, 0)))
1053 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1058 /* Identify REG (which may be a CONCAT) as a user register. */
1061 mark_user_reg (rtx reg
)
1063 if (GET_CODE (reg
) == CONCAT
)
1065 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1066 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1070 gcc_assert (REG_P (reg
));
1071 REG_USERVAR_P (reg
) = 1;
1075 /* Identify REG as a probable pointer register and show its alignment
1076 as ALIGN, if nonzero. */
1079 mark_reg_pointer (rtx reg
, int align
)
1081 if (! REG_POINTER (reg
))
1083 REG_POINTER (reg
) = 1;
1086 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1088 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1089 /* We can no-longer be sure just how aligned this pointer is. */
1090 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1093 /* Return 1 plus largest pseudo reg number used in the current function. */
1101 /* Return 1 + the largest label number used so far in the current function. */
1104 max_label_num (void)
1109 /* Return first label number used in this function (if any were used). */
1112 get_first_label_num (void)
1114 return first_label_num
;
1117 /* If the rtx for label was created during the expansion of a nested
1118 function, then first_label_num won't include this label number.
1119 Fix this now so that array indicies work later. */
1122 maybe_set_first_label_num (rtx x
)
1124 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1125 first_label_num
= CODE_LABEL_NUMBER (x
);
1128 /* Return a value representing some low-order bits of X, where the number
1129 of low-order bits is given by MODE. Note that no conversion is done
1130 between floating-point and fixed-point values, rather, the bit
1131 representation is returned.
1133 This function handles the cases in common between gen_lowpart, below,
1134 and two variants in cse.c and combine.c. These are the cases that can
1135 be safely handled at all points in the compilation.
1137 If this is not a case we can handle, return 0. */
1140 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1142 int msize
= GET_MODE_SIZE (mode
);
1145 enum machine_mode innermode
;
1147 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1148 so we have to make one up. Yuk. */
1149 innermode
= GET_MODE (x
);
1150 if (GET_CODE (x
) == CONST_INT
1151 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1152 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1153 else if (innermode
== VOIDmode
)
1154 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1156 xsize
= GET_MODE_SIZE (innermode
);
1158 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1160 if (innermode
== mode
)
1163 /* MODE must occupy no more words than the mode of X. */
1164 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1165 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1168 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1169 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1172 offset
= subreg_lowpart_offset (mode
, innermode
);
1174 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1175 && (GET_MODE_CLASS (mode
) == MODE_INT
1176 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1178 /* If we are getting the low-order part of something that has been
1179 sign- or zero-extended, we can either just use the object being
1180 extended or make a narrower extension. If we want an even smaller
1181 piece than the size of the object being extended, call ourselves
1184 This case is used mostly by combine and cse. */
1186 if (GET_MODE (XEXP (x
, 0)) == mode
)
1188 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1189 return gen_lowpart_common (mode
, XEXP (x
, 0));
1190 else if (msize
< xsize
)
1191 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1193 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1194 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1195 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1196 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1198 /* Otherwise, we can't do this. */
1203 gen_highpart (enum machine_mode mode
, rtx x
)
1205 unsigned int msize
= GET_MODE_SIZE (mode
);
1208 /* This case loses if X is a subreg. To catch bugs early,
1209 complain if an invalid MODE is used even in other cases. */
1210 gcc_assert (msize
<= UNITS_PER_WORD
1211 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1213 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1214 subreg_highpart_offset (mode
, GET_MODE (x
)));
1215 gcc_assert (result
);
1217 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1218 the target if we have a MEM. gen_highpart must return a valid operand,
1219 emitting code if necessary to do so. */
1222 result
= validize_mem (result
);
1223 gcc_assert (result
);
1229 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1230 be VOIDmode constant. */
1232 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1234 if (GET_MODE (exp
) != VOIDmode
)
1236 gcc_assert (GET_MODE (exp
) == innermode
);
1237 return gen_highpart (outermode
, exp
);
1239 return simplify_gen_subreg (outermode
, exp
, innermode
,
1240 subreg_highpart_offset (outermode
, innermode
));
1243 /* Return offset in bytes to get OUTERMODE low part
1244 of the value in mode INNERMODE stored in memory in target format. */
1247 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1249 unsigned int offset
= 0;
1250 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1254 if (WORDS_BIG_ENDIAN
)
1255 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1256 if (BYTES_BIG_ENDIAN
)
1257 offset
+= difference
% UNITS_PER_WORD
;
1263 /* Return offset in bytes to get OUTERMODE high part
1264 of the value in mode INNERMODE stored in memory in target format. */
1266 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1268 unsigned int offset
= 0;
1269 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1271 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1275 if (! WORDS_BIG_ENDIAN
)
1276 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1277 if (! BYTES_BIG_ENDIAN
)
1278 offset
+= difference
% UNITS_PER_WORD
;
1284 /* Return 1 iff X, assumed to be a SUBREG,
1285 refers to the least significant part of its containing reg.
1286 If X is not a SUBREG, always return 1 (it is its own low part!). */
1289 subreg_lowpart_p (rtx x
)
1291 if (GET_CODE (x
) != SUBREG
)
1293 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1296 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1297 == SUBREG_BYTE (x
));
1300 /* Return subword OFFSET of operand OP.
1301 The word number, OFFSET, is interpreted as the word number starting
1302 at the low-order address. OFFSET 0 is the low-order word if not
1303 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1305 If we cannot extract the required word, we return zero. Otherwise,
1306 an rtx corresponding to the requested word will be returned.
1308 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1309 reload has completed, a valid address will always be returned. After
1310 reload, if a valid address cannot be returned, we return zero.
1312 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1313 it is the responsibility of the caller.
1315 MODE is the mode of OP in case it is a CONST_INT.
1317 ??? This is still rather broken for some cases. The problem for the
1318 moment is that all callers of this thing provide no 'goal mode' to
1319 tell us to work with. This exists because all callers were written
1320 in a word based SUBREG world.
1321 Now use of this function can be deprecated by simplify_subreg in most
1326 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1328 if (mode
== VOIDmode
)
1329 mode
= GET_MODE (op
);
1331 gcc_assert (mode
!= VOIDmode
);
1333 /* If OP is narrower than a word, fail. */
1335 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1338 /* If we want a word outside OP, return zero. */
1340 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1343 /* Form a new MEM at the requested address. */
1346 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1348 if (! validate_address
)
1351 else if (reload_completed
)
1353 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1357 return replace_equiv_address (new, XEXP (new, 0));
1360 /* Rest can be handled by simplify_subreg. */
1361 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1364 /* Similar to `operand_subword', but never return 0. If we can't
1365 extract the required subword, put OP into a register and try again.
1366 The second attempt must succeed. We always validate the address in
1369 MODE is the mode of OP, in case it is CONST_INT. */
1372 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1374 rtx result
= operand_subword (op
, offset
, 1, mode
);
1379 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1381 /* If this is a register which can not be accessed by words, copy it
1382 to a pseudo register. */
1384 op
= copy_to_reg (op
);
1386 op
= force_reg (mode
, op
);
1389 result
= operand_subword (op
, offset
, 1, mode
);
1390 gcc_assert (result
);
1395 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1396 or (2) a component ref of something variable. Represent the later with
1397 a NULL expression. */
1400 component_ref_for_mem_expr (tree ref
)
1402 tree inner
= TREE_OPERAND (ref
, 0);
1404 if (TREE_CODE (inner
) == COMPONENT_REF
)
1405 inner
= component_ref_for_mem_expr (inner
);
1408 /* Now remove any conversions: they don't change what the underlying
1409 object is. Likewise for SAVE_EXPR. */
1410 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1411 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1412 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1413 || TREE_CODE (inner
) == SAVE_EXPR
)
1414 inner
= TREE_OPERAND (inner
, 0);
1416 if (! DECL_P (inner
))
1420 if (inner
== TREE_OPERAND (ref
, 0))
1423 return build3 (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1424 TREE_OPERAND (ref
, 1), NULL_TREE
);
1427 /* Returns 1 if both MEM_EXPR can be considered equal
1431 mem_expr_equal_p (tree expr1
, tree expr2
)
1436 if (! expr1
|| ! expr2
)
1439 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1442 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1444 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1445 TREE_OPERAND (expr2
, 0))
1446 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1447 TREE_OPERAND (expr2
, 1));
1449 if (INDIRECT_REF_P (expr1
))
1450 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1451 TREE_OPERAND (expr2
, 0));
1453 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1454 have been resolved here. */
1455 gcc_assert (DECL_P (expr1
));
1457 /* Decls with different pointers can't be equal. */
1461 /* Given REF, a MEM, and T, either the type of X or the expression
1462 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1463 if we are making a new object of this type. BITPOS is nonzero if
1464 there is an offset outstanding on T that will be applied later. */
1467 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1468 HOST_WIDE_INT bitpos
)
1470 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1471 tree expr
= MEM_EXPR (ref
);
1472 rtx offset
= MEM_OFFSET (ref
);
1473 rtx size
= MEM_SIZE (ref
);
1474 unsigned int align
= MEM_ALIGN (ref
);
1475 HOST_WIDE_INT apply_bitpos
= 0;
1478 /* It can happen that type_for_mode was given a mode for which there
1479 is no language-level type. In which case it returns NULL, which
1484 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1485 if (type
== error_mark_node
)
1488 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1489 wrong answer, as it assumes that DECL_RTL already has the right alias
1490 info. Callers should not set DECL_RTL until after the call to
1491 set_mem_attributes. */
1492 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1494 /* Get the alias set from the expression or type (perhaps using a
1495 front-end routine) and use it. */
1496 alias
= get_alias_set (t
);
1498 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1499 MEM_IN_STRUCT_P (ref
)
1500 = AGGREGATE_TYPE_P (type
) || TREE_CODE (type
) == COMPLEX_TYPE
;
1501 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1503 /* If we are making an object of this type, or if this is a DECL, we know
1504 that it is a scalar if the type is not an aggregate. */
1505 if ((objectp
|| DECL_P (t
))
1506 && ! AGGREGATE_TYPE_P (type
)
1507 && TREE_CODE (type
) != COMPLEX_TYPE
)
1508 MEM_SCALAR_P (ref
) = 1;
1510 /* We can set the alignment from the type if we are making an object,
1511 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1512 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1513 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1514 || TYPE_ALIGN_OK (type
))
1515 align
= MAX (align
, TYPE_ALIGN (type
));
1517 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1519 if (integer_zerop (TREE_OPERAND (t
, 1)))
1520 /* We don't know anything about the alignment. */
1521 align
= BITS_PER_UNIT
;
1523 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1526 /* If the size is known, we can set that. */
1527 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1528 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1530 /* If T is not a type, we may be able to deduce some more information about
1536 if (TREE_THIS_VOLATILE (t
))
1537 MEM_VOLATILE_P (ref
) = 1;
1539 /* Now remove any conversions: they don't change what the underlying
1540 object is. Likewise for SAVE_EXPR. */
1541 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1542 || TREE_CODE (t
) == NON_LVALUE_EXPR
1543 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1544 || TREE_CODE (t
) == SAVE_EXPR
)
1545 t
= TREE_OPERAND (t
, 0);
1547 /* We may look through structure-like accesses for the purposes of
1548 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1550 while (TREE_CODE (base
) == COMPONENT_REF
1551 || TREE_CODE (base
) == REALPART_EXPR
1552 || TREE_CODE (base
) == IMAGPART_EXPR
1553 || TREE_CODE (base
) == BIT_FIELD_REF
)
1554 base
= TREE_OPERAND (base
, 0);
1558 if (CODE_CONTAINS_STRUCT (TREE_CODE (base
), TS_DECL_WITH_VIS
))
1559 MEM_NOTRAP_P (ref
) = !DECL_WEAK (base
);
1561 MEM_NOTRAP_P (ref
) = 1;
1564 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (base
);
1566 base
= get_base_address (base
);
1567 if (base
&& DECL_P (base
)
1568 && TREE_READONLY (base
)
1569 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1571 tree base_type
= TREE_TYPE (base
);
1572 gcc_assert (!(base_type
&& TYPE_NEEDS_CONSTRUCTING (base_type
))
1573 || DECL_ARTIFICIAL (base
));
1574 MEM_READONLY_P (ref
) = 1;
1577 /* If this expression uses it's parent's alias set, mark it such
1578 that we won't change it. */
1579 if (component_uses_parent_alias_set (t
))
1580 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1582 /* If this is a decl, set the attributes of the MEM from it. */
1586 offset
= const0_rtx
;
1587 apply_bitpos
= bitpos
;
1588 size
= (DECL_SIZE_UNIT (t
)
1589 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1590 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1591 align
= DECL_ALIGN (t
);
1594 /* If this is a constant, we know the alignment. */
1595 else if (CONSTANT_CLASS_P (t
))
1597 align
= TYPE_ALIGN (type
);
1598 #ifdef CONSTANT_ALIGNMENT
1599 align
= CONSTANT_ALIGNMENT (t
, align
);
1603 /* If this is a field reference and not a bit-field, record it. */
1604 /* ??? There is some information that can be gleened from bit-fields,
1605 such as the word offset in the structure that might be modified.
1606 But skip it for now. */
1607 else if (TREE_CODE (t
) == COMPONENT_REF
1608 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1610 expr
= component_ref_for_mem_expr (t
);
1611 offset
= const0_rtx
;
1612 apply_bitpos
= bitpos
;
1613 /* ??? Any reason the field size would be different than
1614 the size we got from the type? */
1617 /* If this is an array reference, look for an outer field reference. */
1618 else if (TREE_CODE (t
) == ARRAY_REF
)
1620 tree off_tree
= size_zero_node
;
1621 /* We can't modify t, because we use it at the end of the
1627 tree index
= TREE_OPERAND (t2
, 1);
1628 tree low_bound
= array_ref_low_bound (t2
);
1629 tree unit_size
= array_ref_element_size (t2
);
1631 /* We assume all arrays have sizes that are a multiple of a byte.
1632 First subtract the lower bound, if any, in the type of the
1633 index, then convert to sizetype and multiply by the size of
1634 the array element. */
1635 if (! integer_zerop (low_bound
))
1636 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1639 off_tree
= size_binop (PLUS_EXPR
,
1640 size_binop (MULT_EXPR
,
1641 fold_convert (sizetype
,
1645 t2
= TREE_OPERAND (t2
, 0);
1647 while (TREE_CODE (t2
) == ARRAY_REF
);
1653 if (host_integerp (off_tree
, 1))
1655 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1656 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1657 align
= DECL_ALIGN (t2
);
1658 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1660 offset
= GEN_INT (ioff
);
1661 apply_bitpos
= bitpos
;
1664 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1666 expr
= component_ref_for_mem_expr (t2
);
1667 if (host_integerp (off_tree
, 1))
1669 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1670 apply_bitpos
= bitpos
;
1672 /* ??? Any reason the field size would be different than
1673 the size we got from the type? */
1675 else if (flag_argument_noalias
> 1
1676 && (INDIRECT_REF_P (t2
))
1677 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1684 /* If this is a Fortran indirect argument reference, record the
1686 else if (flag_argument_noalias
> 1
1687 && (INDIRECT_REF_P (t
))
1688 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1695 /* If we modified OFFSET based on T, then subtract the outstanding
1696 bit position offset. Similarly, increase the size of the accessed
1697 object to contain the negative offset. */
1700 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1702 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1705 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1707 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1708 we're overlapping. */
1713 /* Now set the attributes we computed above. */
1715 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1717 /* If this is already known to be a scalar or aggregate, we are done. */
1718 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1721 /* If it is a reference into an aggregate, this is part of an aggregate.
1722 Otherwise we don't know. */
1723 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1724 || TREE_CODE (t
) == ARRAY_RANGE_REF
1725 || TREE_CODE (t
) == BIT_FIELD_REF
)
1726 MEM_IN_STRUCT_P (ref
) = 1;
1730 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1732 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1735 /* Set the decl for MEM to DECL. */
1738 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1741 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1742 GEN_INT (REG_OFFSET (reg
)),
1743 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1746 /* Set the alias set of MEM to SET. */
1749 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1751 #ifdef ENABLE_CHECKING
1752 /* If the new and old alias sets don't conflict, something is wrong. */
1753 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1756 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1757 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1761 /* Set the alignment of MEM to ALIGN bits. */
1764 set_mem_align (rtx mem
, unsigned int align
)
1766 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1767 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1771 /* Set the expr for MEM to EXPR. */
1774 set_mem_expr (rtx mem
, tree expr
)
1777 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1778 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1781 /* Set the offset of MEM to OFFSET. */
1784 set_mem_offset (rtx mem
, rtx offset
)
1786 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1787 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1791 /* Set the size of MEM to SIZE. */
1794 set_mem_size (rtx mem
, rtx size
)
1796 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1797 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1801 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1802 and its address changed to ADDR. (VOIDmode means don't change the mode.
1803 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1804 returned memory location is required to be valid. The memory
1805 attributes are not changed. */
1808 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1812 gcc_assert (MEM_P (memref
));
1813 if (mode
== VOIDmode
)
1814 mode
= GET_MODE (memref
);
1816 addr
= XEXP (memref
, 0);
1817 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1818 && (!validate
|| memory_address_p (mode
, addr
)))
1823 if (reload_in_progress
|| reload_completed
)
1824 gcc_assert (memory_address_p (mode
, addr
));
1826 addr
= memory_address (mode
, addr
);
1829 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1832 new = gen_rtx_MEM (mode
, addr
);
1833 MEM_COPY_ATTRIBUTES (new, memref
);
1837 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1838 way we are changing MEMREF, so we only preserve the alias set. */
1841 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1843 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1844 enum machine_mode mmode
= GET_MODE (new);
1847 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1848 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1850 /* If there are no changes, just return the original memory reference. */
1853 if (MEM_ATTRS (memref
) == 0
1854 || (MEM_EXPR (memref
) == NULL
1855 && MEM_OFFSET (memref
) == NULL
1856 && MEM_SIZE (memref
) == size
1857 && MEM_ALIGN (memref
) == align
))
1860 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1861 MEM_COPY_ATTRIBUTES (new, memref
);
1865 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1870 /* Return a memory reference like MEMREF, but with its mode changed
1871 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1872 nonzero, the memory address is forced to be valid.
1873 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1874 and caller is responsible for adjusting MEMREF base register. */
1877 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1878 int validate
, int adjust
)
1880 rtx addr
= XEXP (memref
, 0);
1882 rtx memoffset
= MEM_OFFSET (memref
);
1884 unsigned int memalign
= MEM_ALIGN (memref
);
1886 /* If there are no changes, just return the original memory reference. */
1887 if (mode
== GET_MODE (memref
) && !offset
1888 && (!validate
|| memory_address_p (mode
, addr
)))
1891 /* ??? Prefer to create garbage instead of creating shared rtl.
1892 This may happen even if offset is nonzero -- consider
1893 (plus (plus reg reg) const_int) -- so do this always. */
1894 addr
= copy_rtx (addr
);
1898 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1899 object, we can merge it into the LO_SUM. */
1900 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1902 && (unsigned HOST_WIDE_INT
) offset
1903 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1904 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1905 plus_constant (XEXP (addr
, 1), offset
));
1907 addr
= plus_constant (addr
, offset
);
1910 new = change_address_1 (memref
, mode
, addr
, validate
);
1912 /* Compute the new values of the memory attributes due to this adjustment.
1913 We add the offsets and update the alignment. */
1915 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1917 /* Compute the new alignment by taking the MIN of the alignment and the
1918 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1923 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1925 /* We can compute the size in a number of ways. */
1926 if (GET_MODE (new) != BLKmode
)
1927 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1928 else if (MEM_SIZE (memref
))
1929 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1931 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1932 memoffset
, size
, memalign
, GET_MODE (new));
1934 /* At some point, we should validate that this offset is within the object,
1935 if all the appropriate values are known. */
1939 /* Return a memory reference like MEMREF, but with its mode changed
1940 to MODE and its address changed to ADDR, which is assumed to be
1941 MEMREF offseted by OFFSET bytes. If VALIDATE is
1942 nonzero, the memory address is forced to be valid. */
1945 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1946 HOST_WIDE_INT offset
, int validate
)
1948 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1949 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1952 /* Return a memory reference like MEMREF, but whose address is changed by
1953 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1954 known to be in OFFSET (possibly 1). */
1957 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1959 rtx
new, addr
= XEXP (memref
, 0);
1961 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1963 /* At this point we don't know _why_ the address is invalid. It
1964 could have secondary memory references, multiplies or anything.
1966 However, if we did go and rearrange things, we can wind up not
1967 being able to recognize the magic around pic_offset_table_rtx.
1968 This stuff is fragile, and is yet another example of why it is
1969 bad to expose PIC machinery too early. */
1970 if (! memory_address_p (GET_MODE (memref
), new)
1971 && GET_CODE (addr
) == PLUS
1972 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1974 addr
= force_reg (GET_MODE (addr
), addr
);
1975 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1978 update_temp_slot_address (XEXP (memref
, 0), new);
1979 new = change_address_1 (memref
, VOIDmode
, new, 1);
1981 /* If there are no changes, just return the original memory reference. */
1985 /* Update the alignment to reflect the offset. Reset the offset, which
1988 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
1989 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
1994 /* Return a memory reference like MEMREF, but with its address changed to
1995 ADDR. The caller is asserting that the actual piece of memory pointed
1996 to is the same, just the form of the address is being changed, such as
1997 by putting something into a register. */
2000 replace_equiv_address (rtx memref
, rtx addr
)
2002 /* change_address_1 copies the memory attribute structure without change
2003 and that's exactly what we want here. */
2004 update_temp_slot_address (XEXP (memref
, 0), addr
);
2005 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2008 /* Likewise, but the reference is not required to be valid. */
2011 replace_equiv_address_nv (rtx memref
, rtx addr
)
2013 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2016 /* Return a memory reference like MEMREF, but with its mode widened to
2017 MODE and offset by OFFSET. This would be used by targets that e.g.
2018 cannot issue QImode memory operations and have to use SImode memory
2019 operations plus masking logic. */
2022 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2024 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2025 tree expr
= MEM_EXPR (new);
2026 rtx memoffset
= MEM_OFFSET (new);
2027 unsigned int size
= GET_MODE_SIZE (mode
);
2029 /* If there are no changes, just return the original memory reference. */
2033 /* If we don't know what offset we were at within the expression, then
2034 we can't know if we've overstepped the bounds. */
2040 if (TREE_CODE (expr
) == COMPONENT_REF
)
2042 tree field
= TREE_OPERAND (expr
, 1);
2043 tree offset
= component_ref_field_offset (expr
);
2045 if (! DECL_SIZE_UNIT (field
))
2051 /* Is the field at least as large as the access? If so, ok,
2052 otherwise strip back to the containing structure. */
2053 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2054 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2055 && INTVAL (memoffset
) >= 0)
2058 if (! host_integerp (offset
, 1))
2064 expr
= TREE_OPERAND (expr
, 0);
2066 = (GEN_INT (INTVAL (memoffset
)
2067 + tree_low_cst (offset
, 1)
2068 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2071 /* Similarly for the decl. */
2072 else if (DECL_P (expr
)
2073 && DECL_SIZE_UNIT (expr
)
2074 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2075 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2076 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2080 /* The widened memory access overflows the expression, which means
2081 that it could alias another expression. Zap it. */
2088 memoffset
= NULL_RTX
;
2090 /* The widened memory may alias other stuff, so zap the alias set. */
2091 /* ??? Maybe use get_alias_set on any remaining expression. */
2093 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2094 MEM_ALIGN (new), mode
);
2099 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2102 gen_label_rtx (void)
2104 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2105 NULL
, label_num
++, NULL
);
2108 /* For procedure integration. */
2110 /* Install new pointers to the first and last insns in the chain.
2111 Also, set cur_insn_uid to one higher than the last in use.
2112 Used for an inline-procedure after copying the insn chain. */
2115 set_new_first_and_last_insn (rtx first
, rtx last
)
2123 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2124 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2129 /* Go through all the RTL insn bodies and copy any invalid shared
2130 structure. This routine should only be called once. */
2133 unshare_all_rtl_1 (rtx insn
)
2135 /* Unshare just about everything else. */
2136 unshare_all_rtl_in_chain (insn
);
2138 /* Make sure the addresses of stack slots found outside the insn chain
2139 (such as, in DECL_RTL of a variable) are not shared
2140 with the insn chain.
2142 This special care is necessary when the stack slot MEM does not
2143 actually appear in the insn chain. If it does appear, its address
2144 is unshared from all else at that point. */
2145 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2148 /* Go through all the RTL insn bodies and copy any invalid shared
2149 structure, again. This is a fairly expensive thing to do so it
2150 should be done sparingly. */
2153 unshare_all_rtl_again (rtx insn
)
2158 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2161 reset_used_flags (PATTERN (p
));
2162 reset_used_flags (REG_NOTES (p
));
2165 /* Make sure that virtual stack slots are not shared. */
2166 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2168 /* Make sure that virtual parameters are not shared. */
2169 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2170 reset_used_flags (DECL_RTL (decl
));
2172 reset_used_flags (stack_slot_list
);
2174 unshare_all_rtl_1 (insn
);
2178 unshare_all_rtl (void)
2180 unshare_all_rtl_1 (get_insns ());
2184 struct tree_opt_pass pass_unshare_all_rtl
=
2186 "unshare", /* name */
2188 unshare_all_rtl
, /* execute */
2191 0, /* static_pass_number */
2193 0, /* properties_required */
2194 0, /* properties_provided */
2195 0, /* properties_destroyed */
2196 0, /* todo_flags_start */
2197 TODO_dump_func
, /* todo_flags_finish */
2202 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2203 Recursively does the same for subexpressions. */
2206 verify_rtx_sharing (rtx orig
, rtx insn
)
2211 const char *format_ptr
;
2216 code
= GET_CODE (x
);
2218 /* These types may be freely shared. */
2233 /* SCRATCH must be shared because they represent distinct values. */
2235 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2240 if (shared_const_p (orig
))
2245 /* A MEM is allowed to be shared if its address is constant. */
2246 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2247 || reload_completed
|| reload_in_progress
)
2256 /* This rtx may not be shared. If it has already been seen,
2257 replace it with a copy of itself. */
2258 #ifdef ENABLE_CHECKING
2259 if (RTX_FLAG (x
, used
))
2261 error ("invalid rtl sharing found in the insn");
2263 error ("shared rtx");
2265 internal_error ("internal consistency failure");
2268 gcc_assert (!RTX_FLAG (x
, used
));
2270 RTX_FLAG (x
, used
) = 1;
2272 /* Now scan the subexpressions recursively. */
2274 format_ptr
= GET_RTX_FORMAT (code
);
2276 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2278 switch (*format_ptr
++)
2281 verify_rtx_sharing (XEXP (x
, i
), insn
);
2285 if (XVEC (x
, i
) != NULL
)
2288 int len
= XVECLEN (x
, i
);
2290 for (j
= 0; j
< len
; j
++)
2292 /* We allow sharing of ASM_OPERANDS inside single
2294 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2295 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2297 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2299 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2308 /* Go through all the RTL insn bodies and check that there is no unexpected
2309 sharing in between the subexpressions. */
2312 verify_rtl_sharing (void)
2316 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2319 reset_used_flags (PATTERN (p
));
2320 reset_used_flags (REG_NOTES (p
));
2321 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2324 rtx q
, sequence
= PATTERN (p
);
2326 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2328 q
= XVECEXP (sequence
, 0, i
);
2329 gcc_assert (INSN_P (q
));
2330 reset_used_flags (PATTERN (q
));
2331 reset_used_flags (REG_NOTES (q
));
2336 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2339 verify_rtx_sharing (PATTERN (p
), p
);
2340 verify_rtx_sharing (REG_NOTES (p
), p
);
2344 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2345 Assumes the mark bits are cleared at entry. */
2348 unshare_all_rtl_in_chain (rtx insn
)
2350 for (; insn
; insn
= NEXT_INSN (insn
))
2353 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2354 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2358 /* Go through all virtual stack slots of a function and mark them as
2361 reset_used_decls (tree blk
)
2366 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2367 if (DECL_RTL_SET_P (t
))
2368 reset_used_flags (DECL_RTL (t
));
2370 /* Now process sub-blocks. */
2371 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2372 reset_used_decls (t
);
2375 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2376 Recursively does the same for subexpressions. Uses
2377 copy_rtx_if_shared_1 to reduce stack space. */
2380 copy_rtx_if_shared (rtx orig
)
2382 copy_rtx_if_shared_1 (&orig
);
2386 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2387 use. Recursively does the same for subexpressions. */
2390 copy_rtx_if_shared_1 (rtx
*orig1
)
2396 const char *format_ptr
;
2400 /* Repeat is used to turn tail-recursion into iteration. */
2407 code
= GET_CODE (x
);
2409 /* These types may be freely shared. */
2423 /* SCRATCH must be shared because they represent distinct values. */
2426 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2431 if (shared_const_p (x
))
2440 /* The chain of insns is not being copied. */
2447 /* This rtx may not be shared. If it has already been seen,
2448 replace it with a copy of itself. */
2450 if (RTX_FLAG (x
, used
))
2452 x
= shallow_copy_rtx (x
);
2455 RTX_FLAG (x
, used
) = 1;
2457 /* Now scan the subexpressions recursively.
2458 We can store any replaced subexpressions directly into X
2459 since we know X is not shared! Any vectors in X
2460 must be copied if X was copied. */
2462 format_ptr
= GET_RTX_FORMAT (code
);
2463 length
= GET_RTX_LENGTH (code
);
2466 for (i
= 0; i
< length
; i
++)
2468 switch (*format_ptr
++)
2472 copy_rtx_if_shared_1 (last_ptr
);
2473 last_ptr
= &XEXP (x
, i
);
2477 if (XVEC (x
, i
) != NULL
)
2480 int len
= XVECLEN (x
, i
);
2482 /* Copy the vector iff I copied the rtx and the length
2484 if (copied
&& len
> 0)
2485 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2487 /* Call recursively on all inside the vector. */
2488 for (j
= 0; j
< len
; j
++)
2491 copy_rtx_if_shared_1 (last_ptr
);
2492 last_ptr
= &XVECEXP (x
, i
, j
);
2507 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2508 to look for shared sub-parts. */
2511 reset_used_flags (rtx x
)
2515 const char *format_ptr
;
2518 /* Repeat is used to turn tail-recursion into iteration. */
2523 code
= GET_CODE (x
);
2525 /* These types may be freely shared so we needn't do any resetting
2546 /* The chain of insns is not being copied. */
2553 RTX_FLAG (x
, used
) = 0;
2555 format_ptr
= GET_RTX_FORMAT (code
);
2556 length
= GET_RTX_LENGTH (code
);
2558 for (i
= 0; i
< length
; i
++)
2560 switch (*format_ptr
++)
2568 reset_used_flags (XEXP (x
, i
));
2572 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2573 reset_used_flags (XVECEXP (x
, i
, j
));
2579 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2580 to look for shared sub-parts. */
2583 set_used_flags (rtx x
)
2587 const char *format_ptr
;
2592 code
= GET_CODE (x
);
2594 /* These types may be freely shared so we needn't do any resetting
2615 /* The chain of insns is not being copied. */
2622 RTX_FLAG (x
, used
) = 1;
2624 format_ptr
= GET_RTX_FORMAT (code
);
2625 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2627 switch (*format_ptr
++)
2630 set_used_flags (XEXP (x
, i
));
2634 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2635 set_used_flags (XVECEXP (x
, i
, j
));
2641 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2642 Return X or the rtx for the pseudo reg the value of X was copied into.
2643 OTHER must be valid as a SET_DEST. */
2646 make_safe_from (rtx x
, rtx other
)
2649 switch (GET_CODE (other
))
2652 other
= SUBREG_REG (other
);
2654 case STRICT_LOW_PART
:
2657 other
= XEXP (other
, 0);
2666 && GET_CODE (x
) != SUBREG
)
2668 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2669 || reg_mentioned_p (other
, x
))))
2671 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2672 emit_move_insn (temp
, x
);
2678 /* Emission of insns (adding them to the doubly-linked list). */
2680 /* Return the first insn of the current sequence or current function. */
2688 /* Specify a new insn as the first in the chain. */
2691 set_first_insn (rtx insn
)
2693 gcc_assert (!PREV_INSN (insn
));
2697 /* Return the last insn emitted in current sequence or current function. */
2700 get_last_insn (void)
2705 /* Specify a new insn as the last in the chain. */
2708 set_last_insn (rtx insn
)
2710 gcc_assert (!NEXT_INSN (insn
));
2714 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2717 get_last_insn_anywhere (void)
2719 struct sequence_stack
*stack
;
2722 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2723 if (stack
->last
!= 0)
2728 /* Return the first nonnote insn emitted in current sequence or current
2729 function. This routine looks inside SEQUENCEs. */
2732 get_first_nonnote_insn (void)
2734 rtx insn
= first_insn
;
2739 for (insn
= next_insn (insn
);
2740 insn
&& NOTE_P (insn
);
2741 insn
= next_insn (insn
))
2745 if (NONJUMP_INSN_P (insn
)
2746 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2747 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2754 /* Return the last nonnote insn emitted in current sequence or current
2755 function. This routine looks inside SEQUENCEs. */
2758 get_last_nonnote_insn (void)
2760 rtx insn
= last_insn
;
2765 for (insn
= previous_insn (insn
);
2766 insn
&& NOTE_P (insn
);
2767 insn
= previous_insn (insn
))
2771 if (NONJUMP_INSN_P (insn
)
2772 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2773 insn
= XVECEXP (PATTERN (insn
), 0,
2774 XVECLEN (PATTERN (insn
), 0) - 1);
2781 /* Return a number larger than any instruction's uid in this function. */
2786 return cur_insn_uid
;
2789 /* Return the next insn. If it is a SEQUENCE, return the first insn
2793 next_insn (rtx insn
)
2797 insn
= NEXT_INSN (insn
);
2798 if (insn
&& NONJUMP_INSN_P (insn
)
2799 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2800 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2806 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2810 previous_insn (rtx insn
)
2814 insn
= PREV_INSN (insn
);
2815 if (insn
&& NONJUMP_INSN_P (insn
)
2816 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2817 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2823 /* Return the next insn after INSN that is not a NOTE. This routine does not
2824 look inside SEQUENCEs. */
2827 next_nonnote_insn (rtx insn
)
2831 insn
= NEXT_INSN (insn
);
2832 if (insn
== 0 || !NOTE_P (insn
))
2839 /* Return the previous insn before INSN that is not a NOTE. This routine does
2840 not look inside SEQUENCEs. */
2843 prev_nonnote_insn (rtx insn
)
2847 insn
= PREV_INSN (insn
);
2848 if (insn
== 0 || !NOTE_P (insn
))
2855 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2856 or 0, if there is none. This routine does not look inside
2860 next_real_insn (rtx insn
)
2864 insn
= NEXT_INSN (insn
);
2865 if (insn
== 0 || INSN_P (insn
))
2872 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2873 or 0, if there is none. This routine does not look inside
2877 prev_real_insn (rtx insn
)
2881 insn
= PREV_INSN (insn
);
2882 if (insn
== 0 || INSN_P (insn
))
2889 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2890 This routine does not look inside SEQUENCEs. */
2893 last_call_insn (void)
2897 for (insn
= get_last_insn ();
2898 insn
&& !CALL_P (insn
);
2899 insn
= PREV_INSN (insn
))
2905 /* Find the next insn after INSN that really does something. This routine
2906 does not look inside SEQUENCEs. Until reload has completed, this is the
2907 same as next_real_insn. */
2910 active_insn_p (rtx insn
)
2912 return (CALL_P (insn
) || JUMP_P (insn
)
2913 || (NONJUMP_INSN_P (insn
)
2914 && (! reload_completed
2915 || (GET_CODE (PATTERN (insn
)) != USE
2916 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2920 next_active_insn (rtx insn
)
2924 insn
= NEXT_INSN (insn
);
2925 if (insn
== 0 || active_insn_p (insn
))
2932 /* Find the last insn before INSN that really does something. This routine
2933 does not look inside SEQUENCEs. Until reload has completed, this is the
2934 same as prev_real_insn. */
2937 prev_active_insn (rtx insn
)
2941 insn
= PREV_INSN (insn
);
2942 if (insn
== 0 || active_insn_p (insn
))
2949 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2952 next_label (rtx insn
)
2956 insn
= NEXT_INSN (insn
);
2957 if (insn
== 0 || LABEL_P (insn
))
2964 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2967 prev_label (rtx insn
)
2971 insn
= PREV_INSN (insn
);
2972 if (insn
== 0 || LABEL_P (insn
))
2979 /* Return the last label to mark the same position as LABEL. Return null
2980 if LABEL itself is null. */
2983 skip_consecutive_labels (rtx label
)
2987 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
2995 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2996 and REG_CC_USER notes so we can find it. */
2999 link_cc0_insns (rtx insn
)
3001 rtx user
= next_nonnote_insn (insn
);
3003 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3004 user
= XVECEXP (PATTERN (user
), 0, 0);
3006 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3008 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3011 /* Return the next insn that uses CC0 after INSN, which is assumed to
3012 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3013 applied to the result of this function should yield INSN).
3015 Normally, this is simply the next insn. However, if a REG_CC_USER note
3016 is present, it contains the insn that uses CC0.
3018 Return 0 if we can't find the insn. */
3021 next_cc0_user (rtx insn
)
3023 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3026 return XEXP (note
, 0);
3028 insn
= next_nonnote_insn (insn
);
3029 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3030 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3032 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3038 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3039 note, it is the previous insn. */
3042 prev_cc0_setter (rtx insn
)
3044 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3047 return XEXP (note
, 0);
3049 insn
= prev_nonnote_insn (insn
);
3050 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3057 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3060 find_auto_inc (rtx
*xp
, void *data
)
3065 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3068 switch (GET_CODE (x
))
3076 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3087 /* Increment the label uses for all labels present in rtx. */
3090 mark_label_nuses (rtx x
)
3096 code
= GET_CODE (x
);
3097 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3098 LABEL_NUSES (XEXP (x
, 0))++;
3100 fmt
= GET_RTX_FORMAT (code
);
3101 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3104 mark_label_nuses (XEXP (x
, i
));
3105 else if (fmt
[i
] == 'E')
3106 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3107 mark_label_nuses (XVECEXP (x
, i
, j
));
3112 /* Try splitting insns that can be split for better scheduling.
3113 PAT is the pattern which might split.
3114 TRIAL is the insn providing PAT.
3115 LAST is nonzero if we should return the last insn of the sequence produced.
3117 If this routine succeeds in splitting, it returns the first or last
3118 replacement insn depending on the value of LAST. Otherwise, it
3119 returns TRIAL. If the insn to be returned can be split, it will be. */
3122 try_split (rtx pat
, rtx trial
, int last
)
3124 rtx before
= PREV_INSN (trial
);
3125 rtx after
= NEXT_INSN (trial
);
3126 int has_barrier
= 0;
3130 rtx insn_last
, insn
;
3133 if (any_condjump_p (trial
)
3134 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3135 split_branch_probability
= INTVAL (XEXP (note
, 0));
3136 probability
= split_branch_probability
;
3138 seq
= split_insns (pat
, trial
);
3140 split_branch_probability
= -1;
3142 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3143 We may need to handle this specially. */
3144 if (after
&& BARRIER_P (after
))
3147 after
= NEXT_INSN (after
);
3153 /* Avoid infinite loop if any insn of the result matches
3154 the original pattern. */
3158 if (INSN_P (insn_last
)
3159 && rtx_equal_p (PATTERN (insn_last
), pat
))
3161 if (!NEXT_INSN (insn_last
))
3163 insn_last
= NEXT_INSN (insn_last
);
3166 /* We will be adding the new sequence to the function. The splitters
3167 may have introduced invalid RTL sharing, so unshare the sequence now. */
3168 unshare_all_rtl_in_chain (seq
);
3171 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3175 mark_jump_label (PATTERN (insn
), insn
, 0);
3177 if (probability
!= -1
3178 && any_condjump_p (insn
)
3179 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3181 /* We can preserve the REG_BR_PROB notes only if exactly
3182 one jump is created, otherwise the machine description
3183 is responsible for this step using
3184 split_branch_probability variable. */
3185 gcc_assert (njumps
== 1);
3187 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3188 GEN_INT (probability
),
3194 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3195 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3198 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3201 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3204 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3205 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3209 /* Copy notes, particularly those related to the CFG. */
3210 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3212 switch (REG_NOTE_KIND (note
))
3215 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3218 || (flag_non_call_exceptions
&& INSN_P (insn
)
3219 && may_trap_p (PATTERN (insn
))))
3221 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3229 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3233 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3239 case REG_NON_LOCAL_GOTO
:
3240 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3244 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3252 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3254 rtx reg
= XEXP (note
, 0);
3255 if (!FIND_REG_INC_NOTE (insn
, reg
)
3256 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3257 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_INC
, reg
,
3268 /* If there are LABELS inside the split insns increment the
3269 usage count so we don't delete the label. */
3270 if (NONJUMP_INSN_P (trial
))
3273 while (insn
!= NULL_RTX
)
3275 if (NONJUMP_INSN_P (insn
))
3276 mark_label_nuses (PATTERN (insn
));
3278 insn
= PREV_INSN (insn
);
3282 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3284 delete_insn (trial
);
3286 emit_barrier_after (tem
);
3288 /* Recursively call try_split for each new insn created; by the
3289 time control returns here that insn will be fully split, so
3290 set LAST and continue from the insn after the one returned.
3291 We can't use next_active_insn here since AFTER may be a note.
3292 Ignore deleted insns, which can be occur if not optimizing. */
3293 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3294 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3295 tem
= try_split (PATTERN (tem
), tem
, 1);
3297 /* Return either the first or the last insn, depending on which was
3300 ? (after
? PREV_INSN (after
) : last_insn
)
3301 : NEXT_INSN (before
);
3304 /* Make and return an INSN rtx, initializing all its slots.
3305 Store PATTERN in the pattern slots. */
3308 make_insn_raw (rtx pattern
)
3312 insn
= rtx_alloc (INSN
);
3314 INSN_UID (insn
) = cur_insn_uid
++;
3315 PATTERN (insn
) = pattern
;
3316 INSN_CODE (insn
) = -1;
3317 REG_NOTES (insn
) = NULL
;
3318 INSN_LOCATOR (insn
) = curr_insn_locator ();
3319 BLOCK_FOR_INSN (insn
) = NULL
;
3321 #ifdef ENABLE_RTL_CHECKING
3324 && (returnjump_p (insn
)
3325 || (GET_CODE (insn
) == SET
3326 && SET_DEST (insn
) == pc_rtx
)))
3328 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3336 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3339 make_jump_insn_raw (rtx pattern
)
3343 insn
= rtx_alloc (JUMP_INSN
);
3344 INSN_UID (insn
) = cur_insn_uid
++;
3346 PATTERN (insn
) = pattern
;
3347 INSN_CODE (insn
) = -1;
3348 REG_NOTES (insn
) = NULL
;
3349 JUMP_LABEL (insn
) = NULL
;
3350 INSN_LOCATOR (insn
) = curr_insn_locator ();
3351 BLOCK_FOR_INSN (insn
) = NULL
;
3356 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3359 make_call_insn_raw (rtx pattern
)
3363 insn
= rtx_alloc (CALL_INSN
);
3364 INSN_UID (insn
) = cur_insn_uid
++;
3366 PATTERN (insn
) = pattern
;
3367 INSN_CODE (insn
) = -1;
3368 REG_NOTES (insn
) = NULL
;
3369 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3370 INSN_LOCATOR (insn
) = curr_insn_locator ();
3371 BLOCK_FOR_INSN (insn
) = NULL
;
3376 /* Add INSN to the end of the doubly-linked list.
3377 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3382 PREV_INSN (insn
) = last_insn
;
3383 NEXT_INSN (insn
) = 0;
3385 if (NULL
!= last_insn
)
3386 NEXT_INSN (last_insn
) = insn
;
3388 if (NULL
== first_insn
)
3394 /* Add INSN into the doubly-linked list after insn AFTER. This and
3395 the next should be the only functions called to insert an insn once
3396 delay slots have been filled since only they know how to update a
3400 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3402 rtx next
= NEXT_INSN (after
);
3404 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3406 NEXT_INSN (insn
) = next
;
3407 PREV_INSN (insn
) = after
;
3411 PREV_INSN (next
) = insn
;
3412 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3413 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3415 else if (last_insn
== after
)
3419 struct sequence_stack
*stack
= seq_stack
;
3420 /* Scan all pending sequences too. */
3421 for (; stack
; stack
= stack
->next
)
3422 if (after
== stack
->last
)
3431 if (!BARRIER_P (after
)
3432 && !BARRIER_P (insn
)
3433 && (bb
= BLOCK_FOR_INSN (after
)))
3435 set_block_for_insn (insn
, bb
);
3437 df_insn_rescan (insn
);
3438 /* Should not happen as first in the BB is always
3439 either NOTE or LABEL. */
3440 if (BB_END (bb
) == after
3441 /* Avoid clobbering of structure when creating new BB. */
3442 && !BARRIER_P (insn
)
3443 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3447 NEXT_INSN (after
) = insn
;
3448 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3450 rtx sequence
= PATTERN (after
);
3451 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3455 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3456 the previous should be the only functions called to insert an insn
3457 once delay slots have been filled since only they know how to
3458 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3462 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3464 rtx prev
= PREV_INSN (before
);
3466 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3468 PREV_INSN (insn
) = prev
;
3469 NEXT_INSN (insn
) = before
;
3473 NEXT_INSN (prev
) = insn
;
3474 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3476 rtx sequence
= PATTERN (prev
);
3477 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3480 else if (first_insn
== before
)
3484 struct sequence_stack
*stack
= seq_stack
;
3485 /* Scan all pending sequences too. */
3486 for (; stack
; stack
= stack
->next
)
3487 if (before
== stack
->first
)
3489 stack
->first
= insn
;
3497 && !BARRIER_P (before
)
3498 && !BARRIER_P (insn
))
3499 bb
= BLOCK_FOR_INSN (before
);
3503 set_block_for_insn (insn
, bb
);
3505 df_insn_rescan (insn
);
3506 /* Should not happen as first in the BB is always either NOTE or
3508 gcc_assert (BB_HEAD (bb
) != insn
3509 /* Avoid clobbering of structure when creating new BB. */
3511 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3514 PREV_INSN (before
) = insn
;
3515 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3516 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3520 /* Replace insn with an deleted instruction note. */
3522 void set_insn_deleted (rtx insn
)
3524 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3525 PUT_CODE (insn
, NOTE
);
3526 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3530 /* Remove an insn from its doubly-linked list. This function knows how
3531 to handle sequences. */
3533 remove_insn (rtx insn
)
3535 rtx next
= NEXT_INSN (insn
);
3536 rtx prev
= PREV_INSN (insn
);
3539 /* Later in the code, the block will be marked dirty. */
3540 df_insn_delete (NULL
, INSN_UID (insn
));
3544 NEXT_INSN (prev
) = next
;
3545 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3547 rtx sequence
= PATTERN (prev
);
3548 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3551 else if (first_insn
== insn
)
3555 struct sequence_stack
*stack
= seq_stack
;
3556 /* Scan all pending sequences too. */
3557 for (; stack
; stack
= stack
->next
)
3558 if (insn
== stack
->first
)
3560 stack
->first
= next
;
3569 PREV_INSN (next
) = prev
;
3570 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3571 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3573 else if (last_insn
== insn
)
3577 struct sequence_stack
*stack
= seq_stack
;
3578 /* Scan all pending sequences too. */
3579 for (; stack
; stack
= stack
->next
)
3580 if (insn
== stack
->last
)
3588 if (!BARRIER_P (insn
)
3589 && (bb
= BLOCK_FOR_INSN (insn
)))
3592 df_set_bb_dirty (bb
);
3593 if (BB_HEAD (bb
) == insn
)
3595 /* Never ever delete the basic block note without deleting whole
3597 gcc_assert (!NOTE_P (insn
));
3598 BB_HEAD (bb
) = next
;
3600 if (BB_END (bb
) == insn
)
3605 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3608 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3610 gcc_assert (call_insn
&& CALL_P (call_insn
));
3612 /* Put the register usage information on the CALL. If there is already
3613 some usage information, put ours at the end. */
3614 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3618 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3619 link
= XEXP (link
, 1))
3622 XEXP (link
, 1) = call_fusage
;
3625 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3628 /* Delete all insns made since FROM.
3629 FROM becomes the new last instruction. */
3632 delete_insns_since (rtx from
)
3637 NEXT_INSN (from
) = 0;
3641 /* This function is deprecated, please use sequences instead.
3643 Move a consecutive bunch of insns to a different place in the chain.
3644 The insns to be moved are those between FROM and TO.
3645 They are moved to a new position after the insn AFTER.
3646 AFTER must not be FROM or TO or any insn in between.
3648 This function does not know about SEQUENCEs and hence should not be
3649 called after delay-slot filling has been done. */
3652 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3654 /* Splice this bunch out of where it is now. */
3655 if (PREV_INSN (from
))
3656 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3658 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3659 if (last_insn
== to
)
3660 last_insn
= PREV_INSN (from
);
3661 if (first_insn
== from
)
3662 first_insn
= NEXT_INSN (to
);
3664 /* Make the new neighbors point to it and it to them. */
3665 if (NEXT_INSN (after
))
3666 PREV_INSN (NEXT_INSN (after
)) = to
;
3668 NEXT_INSN (to
) = NEXT_INSN (after
);
3669 PREV_INSN (from
) = after
;
3670 NEXT_INSN (after
) = from
;
3671 if (after
== last_insn
)
3675 /* Same as function above, but take care to update BB boundaries. */
3677 reorder_insns (rtx from
, rtx to
, rtx after
)
3679 rtx prev
= PREV_INSN (from
);
3680 basic_block bb
, bb2
;
3682 reorder_insns_nobb (from
, to
, after
);
3684 if (!BARRIER_P (after
)
3685 && (bb
= BLOCK_FOR_INSN (after
)))
3688 df_set_bb_dirty (bb
);
3690 if (!BARRIER_P (from
)
3691 && (bb2
= BLOCK_FOR_INSN (from
)))
3693 if (BB_END (bb2
) == to
)
3694 BB_END (bb2
) = prev
;
3695 df_set_bb_dirty (bb2
);
3698 if (BB_END (bb
) == after
)
3701 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3704 set_block_for_insn (x
, bb
);
3705 df_insn_change_bb (x
);
3711 /* Emit insn(s) of given code and pattern
3712 at a specified place within the doubly-linked list.
3714 All of the emit_foo global entry points accept an object
3715 X which is either an insn list or a PATTERN of a single
3718 There are thus a few canonical ways to generate code and
3719 emit it at a specific place in the instruction stream. For
3720 example, consider the instruction named SPOT and the fact that
3721 we would like to emit some instructions before SPOT. We might
3725 ... emit the new instructions ...
3726 insns_head = get_insns ();
3729 emit_insn_before (insns_head, SPOT);
3731 It used to be common to generate SEQUENCE rtl instead, but that
3732 is a relic of the past which no longer occurs. The reason is that
3733 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3734 generated would almost certainly die right after it was created. */
3736 /* Make X be output before the instruction BEFORE. */
3739 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
3744 gcc_assert (before
);
3749 switch (GET_CODE (x
))
3760 rtx next
= NEXT_INSN (insn
);
3761 add_insn_before (insn
, before
, bb
);
3767 #ifdef ENABLE_RTL_CHECKING
3774 last
= make_insn_raw (x
);
3775 add_insn_before (last
, before
, bb
);
3782 /* Make an instruction with body X and code JUMP_INSN
3783 and output it before the instruction BEFORE. */
3786 emit_jump_insn_before_noloc (rtx x
, rtx before
)
3788 rtx insn
, last
= NULL_RTX
;
3790 gcc_assert (before
);
3792 switch (GET_CODE (x
))
3803 rtx next
= NEXT_INSN (insn
);
3804 add_insn_before (insn
, before
, NULL
);
3810 #ifdef ENABLE_RTL_CHECKING
3817 last
= make_jump_insn_raw (x
);
3818 add_insn_before (last
, before
, NULL
);
3825 /* Make an instruction with body X and code CALL_INSN
3826 and output it before the instruction BEFORE. */
3829 emit_call_insn_before_noloc (rtx x
, rtx before
)
3831 rtx last
= NULL_RTX
, insn
;
3833 gcc_assert (before
);
3835 switch (GET_CODE (x
))
3846 rtx next
= NEXT_INSN (insn
);
3847 add_insn_before (insn
, before
, NULL
);
3853 #ifdef ENABLE_RTL_CHECKING
3860 last
= make_call_insn_raw (x
);
3861 add_insn_before (last
, before
, NULL
);
3868 /* Make an insn of code BARRIER
3869 and output it before the insn BEFORE. */
3872 emit_barrier_before (rtx before
)
3874 rtx insn
= rtx_alloc (BARRIER
);
3876 INSN_UID (insn
) = cur_insn_uid
++;
3878 add_insn_before (insn
, before
, NULL
);
3882 /* Emit the label LABEL before the insn BEFORE. */
3885 emit_label_before (rtx label
, rtx before
)
3887 /* This can be called twice for the same label as a result of the
3888 confusion that follows a syntax error! So make it harmless. */
3889 if (INSN_UID (label
) == 0)
3891 INSN_UID (label
) = cur_insn_uid
++;
3892 add_insn_before (label
, before
, NULL
);
3898 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3901 emit_note_before (enum insn_note subtype
, rtx before
)
3903 rtx note
= rtx_alloc (NOTE
);
3904 INSN_UID (note
) = cur_insn_uid
++;
3905 NOTE_KIND (note
) = subtype
;
3906 BLOCK_FOR_INSN (note
) = NULL
;
3907 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3909 add_insn_before (note
, before
, NULL
);
3913 /* Helper for emit_insn_after, handles lists of instructions
3917 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
3921 if (!bb
&& !BARRIER_P (after
))
3922 bb
= BLOCK_FOR_INSN (after
);
3926 df_set_bb_dirty (bb
);
3927 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3928 if (!BARRIER_P (last
))
3930 set_block_for_insn (last
, bb
);
3931 df_insn_rescan (last
);
3933 if (!BARRIER_P (last
))
3935 set_block_for_insn (last
, bb
);
3936 df_insn_rescan (last
);
3938 if (BB_END (bb
) == after
)
3942 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3945 after_after
= NEXT_INSN (after
);
3947 NEXT_INSN (after
) = first
;
3948 PREV_INSN (first
) = after
;
3949 NEXT_INSN (last
) = after_after
;
3951 PREV_INSN (after_after
) = last
;
3953 if (after
== last_insn
)
3958 /* Make X be output after the insn AFTER and set the BB of insn. If
3959 BB is NULL, an attempt is made to infer the BB from AFTER. */
3962 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
3971 switch (GET_CODE (x
))
3979 last
= emit_insn_after_1 (x
, after
, bb
);
3982 #ifdef ENABLE_RTL_CHECKING
3989 last
= make_insn_raw (x
);
3990 add_insn_after (last
, after
, bb
);
3998 /* Make an insn of code JUMP_INSN with body X
3999 and output it after the insn AFTER. */
4002 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4008 switch (GET_CODE (x
))
4016 last
= emit_insn_after_1 (x
, after
, NULL
);
4019 #ifdef ENABLE_RTL_CHECKING
4026 last
= make_jump_insn_raw (x
);
4027 add_insn_after (last
, after
, NULL
);
4034 /* Make an instruction with body X and code CALL_INSN
4035 and output it after the instruction AFTER. */
4038 emit_call_insn_after_noloc (rtx x
, rtx after
)
4044 switch (GET_CODE (x
))
4052 last
= emit_insn_after_1 (x
, after
, NULL
);
4055 #ifdef ENABLE_RTL_CHECKING
4062 last
= make_call_insn_raw (x
);
4063 add_insn_after (last
, after
, NULL
);
4070 /* Make an insn of code BARRIER
4071 and output it after the insn AFTER. */
4074 emit_barrier_after (rtx after
)
4076 rtx insn
= rtx_alloc (BARRIER
);
4078 INSN_UID (insn
) = cur_insn_uid
++;
4080 add_insn_after (insn
, after
, NULL
);
4084 /* Emit the label LABEL after the insn AFTER. */
4087 emit_label_after (rtx label
, rtx after
)
4089 /* This can be called twice for the same label
4090 as a result of the confusion that follows a syntax error!
4091 So make it harmless. */
4092 if (INSN_UID (label
) == 0)
4094 INSN_UID (label
) = cur_insn_uid
++;
4095 add_insn_after (label
, after
, NULL
);
4101 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4104 emit_note_after (enum insn_note subtype
, rtx after
)
4106 rtx note
= rtx_alloc (NOTE
);
4107 INSN_UID (note
) = cur_insn_uid
++;
4108 NOTE_KIND (note
) = subtype
;
4109 BLOCK_FOR_INSN (note
) = NULL
;
4110 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4111 add_insn_after (note
, after
, NULL
);
4115 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4117 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4119 rtx last
= emit_insn_after_noloc (pattern
, after
, NULL
);
4121 if (pattern
== NULL_RTX
|| !loc
)
4124 after
= NEXT_INSN (after
);
4127 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4128 INSN_LOCATOR (after
) = loc
;
4131 after
= NEXT_INSN (after
);
4136 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4138 emit_insn_after (rtx pattern
, rtx after
)
4141 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4143 return emit_insn_after_noloc (pattern
, after
, NULL
);
4146 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4148 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4150 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4152 if (pattern
== NULL_RTX
|| !loc
)
4155 after
= NEXT_INSN (after
);
4158 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4159 INSN_LOCATOR (after
) = loc
;
4162 after
= NEXT_INSN (after
);
4167 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4169 emit_jump_insn_after (rtx pattern
, rtx after
)
4172 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4174 return emit_jump_insn_after_noloc (pattern
, after
);
4177 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4179 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4181 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4183 if (pattern
== NULL_RTX
|| !loc
)
4186 after
= NEXT_INSN (after
);
4189 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4190 INSN_LOCATOR (after
) = loc
;
4193 after
= NEXT_INSN (after
);
4198 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4200 emit_call_insn_after (rtx pattern
, rtx after
)
4203 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4205 return emit_call_insn_after_noloc (pattern
, after
);
4208 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4210 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4212 rtx first
= PREV_INSN (before
);
4213 rtx last
= emit_insn_before_noloc (pattern
, before
, NULL
);
4215 if (pattern
== NULL_RTX
|| !loc
)
4219 first
= get_insns ();
4221 first
= NEXT_INSN (first
);
4224 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4225 INSN_LOCATOR (first
) = loc
;
4228 first
= NEXT_INSN (first
);
4233 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4235 emit_insn_before (rtx pattern
, rtx before
)
4237 if (INSN_P (before
))
4238 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4240 return emit_insn_before_noloc (pattern
, before
, NULL
);
4243 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4245 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4247 rtx first
= PREV_INSN (before
);
4248 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4250 if (pattern
== NULL_RTX
)
4253 first
= NEXT_INSN (first
);
4256 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4257 INSN_LOCATOR (first
) = loc
;
4260 first
= NEXT_INSN (first
);
4265 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4267 emit_jump_insn_before (rtx pattern
, rtx before
)
4269 if (INSN_P (before
))
4270 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4272 return emit_jump_insn_before_noloc (pattern
, before
);
4275 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4277 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4279 rtx first
= PREV_INSN (before
);
4280 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4282 if (pattern
== NULL_RTX
)
4285 first
= NEXT_INSN (first
);
4288 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4289 INSN_LOCATOR (first
) = loc
;
4292 first
= NEXT_INSN (first
);
4297 /* like emit_call_insn_before_noloc,
4298 but set insn_locator according to before. */
4300 emit_call_insn_before (rtx pattern
, rtx before
)
4302 if (INSN_P (before
))
4303 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4305 return emit_call_insn_before_noloc (pattern
, before
);
4308 /* Take X and emit it at the end of the doubly-linked
4311 Returns the last insn emitted. */
4316 rtx last
= last_insn
;
4322 switch (GET_CODE (x
))
4333 rtx next
= NEXT_INSN (insn
);
4340 #ifdef ENABLE_RTL_CHECKING
4347 last
= make_insn_raw (x
);
4355 /* Make an insn of code JUMP_INSN with pattern X
4356 and add it to the end of the doubly-linked list. */
4359 emit_jump_insn (rtx x
)
4361 rtx last
= NULL_RTX
, insn
;
4363 switch (GET_CODE (x
))
4374 rtx next
= NEXT_INSN (insn
);
4381 #ifdef ENABLE_RTL_CHECKING
4388 last
= make_jump_insn_raw (x
);
4396 /* Make an insn of code CALL_INSN with pattern X
4397 and add it to the end of the doubly-linked list. */
4400 emit_call_insn (rtx x
)
4404 switch (GET_CODE (x
))
4412 insn
= emit_insn (x
);
4415 #ifdef ENABLE_RTL_CHECKING
4422 insn
= make_call_insn_raw (x
);
4430 /* Add the label LABEL to the end of the doubly-linked list. */
4433 emit_label (rtx label
)
4435 /* This can be called twice for the same label
4436 as a result of the confusion that follows a syntax error!
4437 So make it harmless. */
4438 if (INSN_UID (label
) == 0)
4440 INSN_UID (label
) = cur_insn_uid
++;
4446 /* Make an insn of code BARRIER
4447 and add it to the end of the doubly-linked list. */
4452 rtx barrier
= rtx_alloc (BARRIER
);
4453 INSN_UID (barrier
) = cur_insn_uid
++;
4458 /* Emit a copy of note ORIG. */
4461 emit_note_copy (rtx orig
)
4465 note
= rtx_alloc (NOTE
);
4467 INSN_UID (note
) = cur_insn_uid
++;
4468 NOTE_DATA (note
) = NOTE_DATA (orig
);
4469 NOTE_KIND (note
) = NOTE_KIND (orig
);
4470 BLOCK_FOR_INSN (note
) = NULL
;
4476 /* Make an insn of code NOTE or type NOTE_NO
4477 and add it to the end of the doubly-linked list. */
4480 emit_note (enum insn_note kind
)
4484 note
= rtx_alloc (NOTE
);
4485 INSN_UID (note
) = cur_insn_uid
++;
4486 NOTE_KIND (note
) = kind
;
4487 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4488 BLOCK_FOR_INSN (note
) = NULL
;
4493 /* Cause next statement to emit a line note even if the line number
4497 force_next_line_note (void)
4499 #ifdef USE_MAPPED_LOCATION
4502 last_location
.line
= -1;
4506 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4507 note of this type already exists, remove it first. */
4510 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4512 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4513 rtx new_note
= NULL
;
4519 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4520 has multiple sets (some callers assume single_set
4521 means the insn only has one set, when in fact it
4522 means the insn only has one * useful * set). */
4523 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4529 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4530 It serves no useful purpose and breaks eliminate_regs. */
4531 if (GET_CODE (datum
) == ASM_OPERANDS
)
4536 XEXP (note
, 0) = datum
;
4537 df_notes_rescan (insn
);
4545 XEXP (note
, 0) = datum
;
4551 new_note
= gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4552 REG_NOTES (insn
) = new_note
;
4558 df_notes_rescan (insn
);
4564 return REG_NOTES (insn
);
4567 /* Return an indication of which type of insn should have X as a body.
4568 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4570 static enum rtx_code
4571 classify_insn (rtx x
)
4575 if (GET_CODE (x
) == CALL
)
4577 if (GET_CODE (x
) == RETURN
)
4579 if (GET_CODE (x
) == SET
)
4581 if (SET_DEST (x
) == pc_rtx
)
4583 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4588 if (GET_CODE (x
) == PARALLEL
)
4591 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4592 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4594 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4595 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4597 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4598 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4604 /* Emit the rtl pattern X as an appropriate kind of insn.
4605 If X is a label, it is simply added into the insn chain. */
4610 enum rtx_code code
= classify_insn (x
);
4615 return emit_label (x
);
4617 return emit_insn (x
);
4620 rtx insn
= emit_jump_insn (x
);
4621 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4622 return emit_barrier ();
4626 return emit_call_insn (x
);
4632 /* Space for free sequence stack entries. */
4633 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
4635 /* Begin emitting insns to a sequence. If this sequence will contain
4636 something that might cause the compiler to pop arguments to function
4637 calls (because those pops have previously been deferred; see
4638 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4639 before calling this function. That will ensure that the deferred
4640 pops are not accidentally emitted in the middle of this sequence. */
4643 start_sequence (void)
4645 struct sequence_stack
*tem
;
4647 if (free_sequence_stack
!= NULL
)
4649 tem
= free_sequence_stack
;
4650 free_sequence_stack
= tem
->next
;
4653 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4655 tem
->next
= seq_stack
;
4656 tem
->first
= first_insn
;
4657 tem
->last
= last_insn
;
4665 /* Set up the insn chain starting with FIRST as the current sequence,
4666 saving the previously current one. See the documentation for
4667 start_sequence for more information about how to use this function. */
4670 push_to_sequence (rtx first
)
4676 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4682 /* Like push_to_sequence, but take the last insn as an argument to avoid
4683 looping through the list. */
4686 push_to_sequence2 (rtx first
, rtx last
)
4694 /* Set up the outer-level insn chain
4695 as the current sequence, saving the previously current one. */
4698 push_topmost_sequence (void)
4700 struct sequence_stack
*stack
, *top
= NULL
;
4704 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4707 first_insn
= top
->first
;
4708 last_insn
= top
->last
;
4711 /* After emitting to the outer-level insn chain, update the outer-level
4712 insn chain, and restore the previous saved state. */
4715 pop_topmost_sequence (void)
4717 struct sequence_stack
*stack
, *top
= NULL
;
4719 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4722 top
->first
= first_insn
;
4723 top
->last
= last_insn
;
4728 /* After emitting to a sequence, restore previous saved state.
4730 To get the contents of the sequence just made, you must call
4731 `get_insns' *before* calling here.
4733 If the compiler might have deferred popping arguments while
4734 generating this sequence, and this sequence will not be immediately
4735 inserted into the instruction stream, use do_pending_stack_adjust
4736 before calling get_insns. That will ensure that the deferred
4737 pops are inserted into this sequence, and not into some random
4738 location in the instruction stream. See INHIBIT_DEFER_POP for more
4739 information about deferred popping of arguments. */
4744 struct sequence_stack
*tem
= seq_stack
;
4746 first_insn
= tem
->first
;
4747 last_insn
= tem
->last
;
4748 seq_stack
= tem
->next
;
4750 memset (tem
, 0, sizeof (*tem
));
4751 tem
->next
= free_sequence_stack
;
4752 free_sequence_stack
= tem
;
4755 /* Return 1 if currently emitting into a sequence. */
4758 in_sequence_p (void)
4760 return seq_stack
!= 0;
4763 /* Put the various virtual registers into REGNO_REG_RTX. */
4766 init_virtual_regs (struct emit_status
*es
)
4768 rtx
*ptr
= es
->x_regno_reg_rtx
;
4769 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4770 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4771 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4772 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4773 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4777 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4778 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4779 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4780 static int copy_insn_n_scratches
;
4782 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4783 copied an ASM_OPERANDS.
4784 In that case, it is the original input-operand vector. */
4785 static rtvec orig_asm_operands_vector
;
4787 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4788 copied an ASM_OPERANDS.
4789 In that case, it is the copied input-operand vector. */
4790 static rtvec copy_asm_operands_vector
;
4792 /* Likewise for the constraints vector. */
4793 static rtvec orig_asm_constraints_vector
;
4794 static rtvec copy_asm_constraints_vector
;
4796 /* Recursively create a new copy of an rtx for copy_insn.
4797 This function differs from copy_rtx in that it handles SCRATCHes and
4798 ASM_OPERANDs properly.
4799 Normally, this function is not used directly; use copy_insn as front end.
4800 However, you could first copy an insn pattern with copy_insn and then use
4801 this function afterwards to properly copy any REG_NOTEs containing
4805 copy_insn_1 (rtx orig
)
4810 const char *format_ptr
;
4812 code
= GET_CODE (orig
);
4826 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4831 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4832 if (copy_insn_scratch_in
[i
] == orig
)
4833 return copy_insn_scratch_out
[i
];
4837 if (shared_const_p (orig
))
4841 /* A MEM with a constant address is not sharable. The problem is that
4842 the constant address may need to be reloaded. If the mem is shared,
4843 then reloading one copy of this mem will cause all copies to appear
4844 to have been reloaded. */
4850 /* Copy the various flags, fields, and other information. We assume
4851 that all fields need copying, and then clear the fields that should
4852 not be copied. That is the sensible default behavior, and forces
4853 us to explicitly document why we are *not* copying a flag. */
4854 copy
= shallow_copy_rtx (orig
);
4856 /* We do not copy the USED flag, which is used as a mark bit during
4857 walks over the RTL. */
4858 RTX_FLAG (copy
, used
) = 0;
4860 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4863 RTX_FLAG (copy
, jump
) = 0;
4864 RTX_FLAG (copy
, call
) = 0;
4865 RTX_FLAG (copy
, frame_related
) = 0;
4868 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4870 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4871 switch (*format_ptr
++)
4874 if (XEXP (orig
, i
) != NULL
)
4875 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4880 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4881 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4882 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4883 XVEC (copy
, i
) = copy_asm_operands_vector
;
4884 else if (XVEC (orig
, i
) != NULL
)
4886 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4887 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4888 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4899 /* These are left unchanged. */
4906 if (code
== SCRATCH
)
4908 i
= copy_insn_n_scratches
++;
4909 gcc_assert (i
< MAX_RECOG_OPERANDS
);
4910 copy_insn_scratch_in
[i
] = orig
;
4911 copy_insn_scratch_out
[i
] = copy
;
4913 else if (code
== ASM_OPERANDS
)
4915 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4916 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4917 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4918 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4924 /* Create a new copy of an rtx.
4925 This function differs from copy_rtx in that it handles SCRATCHes and
4926 ASM_OPERANDs properly.
4927 INSN doesn't really have to be a full INSN; it could be just the
4930 copy_insn (rtx insn
)
4932 copy_insn_n_scratches
= 0;
4933 orig_asm_operands_vector
= 0;
4934 orig_asm_constraints_vector
= 0;
4935 copy_asm_operands_vector
= 0;
4936 copy_asm_constraints_vector
= 0;
4937 return copy_insn_1 (insn
);
4940 /* Initialize data structures and variables in this file
4941 before generating rtl for each function. */
4946 struct function
*f
= cfun
;
4948 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
4952 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
4953 last_location
= UNKNOWN_LOCATION
;
4954 first_label_num
= label_num
;
4957 /* Init the tables that describe all the pseudo regs. */
4959 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
4961 f
->emit
->regno_pointer_align
4962 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
4963 * sizeof (unsigned char));
4966 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
4968 /* Put copies of all the hard registers into regno_reg_rtx. */
4969 memcpy (regno_reg_rtx
,
4970 static_regno_reg_rtx
,
4971 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
4973 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4974 init_virtual_regs (f
->emit
);
4976 /* Indicate that the virtual registers and stack locations are
4978 REG_POINTER (stack_pointer_rtx
) = 1;
4979 REG_POINTER (frame_pointer_rtx
) = 1;
4980 REG_POINTER (hard_frame_pointer_rtx
) = 1;
4981 REG_POINTER (arg_pointer_rtx
) = 1;
4983 REG_POINTER (virtual_incoming_args_rtx
) = 1;
4984 REG_POINTER (virtual_stack_vars_rtx
) = 1;
4985 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
4986 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
4987 REG_POINTER (virtual_cfa_rtx
) = 1;
4989 #ifdef STACK_BOUNDARY
4990 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
4991 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4992 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4993 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
4995 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4996 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
4997 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
4998 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4999 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5002 #ifdef INIT_EXPANDERS
5007 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5010 gen_const_vector (enum machine_mode mode
, int constant
)
5015 enum machine_mode inner
;
5017 units
= GET_MODE_NUNITS (mode
);
5018 inner
= GET_MODE_INNER (mode
);
5020 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5022 v
= rtvec_alloc (units
);
5024 /* We need to call this function after we set the scalar const_tiny_rtx
5026 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5028 for (i
= 0; i
< units
; ++i
)
5029 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5031 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5035 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5036 all elements are zero, and the one vector when all elements are one. */
5038 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5040 enum machine_mode inner
= GET_MODE_INNER (mode
);
5041 int nunits
= GET_MODE_NUNITS (mode
);
5045 /* Check to see if all of the elements have the same value. */
5046 x
= RTVEC_ELT (v
, nunits
- 1);
5047 for (i
= nunits
- 2; i
>= 0; i
--)
5048 if (RTVEC_ELT (v
, i
) != x
)
5051 /* If the values are all the same, check to see if we can use one of the
5052 standard constant vectors. */
5055 if (x
== CONST0_RTX (inner
))
5056 return CONST0_RTX (mode
);
5057 else if (x
== CONST1_RTX (inner
))
5058 return CONST1_RTX (mode
);
5061 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5064 /* Create some permanent unique rtl objects shared between all functions.
5065 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5068 init_emit_once (int line_numbers
)
5071 enum machine_mode mode
;
5072 enum machine_mode double_mode
;
5074 /* We need reg_raw_mode, so initialize the modes now. */
5075 init_reg_modes_once ();
5077 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5079 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5080 const_int_htab_eq
, NULL
);
5082 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5083 const_double_htab_eq
, NULL
);
5085 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5086 mem_attrs_htab_eq
, NULL
);
5087 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5088 reg_attrs_htab_eq
, NULL
);
5090 no_line_numbers
= ! line_numbers
;
5092 /* Compute the word and byte modes. */
5094 byte_mode
= VOIDmode
;
5095 word_mode
= VOIDmode
;
5096 double_mode
= VOIDmode
;
5098 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5100 mode
= GET_MODE_WIDER_MODE (mode
))
5102 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5103 && byte_mode
== VOIDmode
)
5106 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5107 && word_mode
== VOIDmode
)
5111 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5113 mode
= GET_MODE_WIDER_MODE (mode
))
5115 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5116 && double_mode
== VOIDmode
)
5120 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5122 /* Assign register numbers to the globally defined register rtx.
5123 This must be done at runtime because the register number field
5124 is in a union and some compilers can't initialize unions. */
5126 pc_rtx
= gen_rtx_PC (VOIDmode
);
5127 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5128 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5129 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5130 if (hard_frame_pointer_rtx
== 0)
5131 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5132 HARD_FRAME_POINTER_REGNUM
);
5133 if (arg_pointer_rtx
== 0)
5134 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5135 virtual_incoming_args_rtx
=
5136 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5137 virtual_stack_vars_rtx
=
5138 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5139 virtual_stack_dynamic_rtx
=
5140 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5141 virtual_outgoing_args_rtx
=
5142 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5143 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5145 /* Initialize RTL for commonly used hard registers. These are
5146 copied into regno_reg_rtx as we begin to compile each function. */
5147 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5148 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5150 #ifdef INIT_EXPANDERS
5151 /* This is to initialize {init|mark|free}_machine_status before the first
5152 call to push_function_context_to. This is needed by the Chill front
5153 end which calls push_function_context_to before the first call to
5154 init_function_start. */
5158 /* Create the unique rtx's for certain rtx codes and operand values. */
5160 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5161 tries to use these variables. */
5162 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5163 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5164 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5166 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5167 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5168 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5170 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5172 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5173 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5174 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5175 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5176 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5177 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5178 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5180 dconsthalf
= dconst1
;
5181 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5183 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5185 /* Initialize mathematical constants for constant folding builtins.
5186 These constants need to be given to at least 160 bits precision. */
5187 real_from_string (&dconstsqrt2
,
5188 "1.4142135623730950488016887242096980785696718753769480731766797379907");
5189 real_from_string (&dconste
,
5190 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5192 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5194 REAL_VALUE_TYPE
*r
=
5195 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5197 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5199 mode
= GET_MODE_WIDER_MODE (mode
))
5200 const_tiny_rtx
[i
][(int) mode
] =
5201 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5203 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5205 mode
= GET_MODE_WIDER_MODE (mode
))
5206 const_tiny_rtx
[i
][(int) mode
] =
5207 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5209 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5211 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5213 mode
= GET_MODE_WIDER_MODE (mode
))
5214 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5216 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5218 mode
= GET_MODE_WIDER_MODE (mode
))
5219 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5222 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5224 mode
= GET_MODE_WIDER_MODE (mode
))
5226 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5227 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5230 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5232 mode
= GET_MODE_WIDER_MODE (mode
))
5234 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5235 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5238 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5240 mode
= GET_MODE_WIDER_MODE (mode
))
5242 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5243 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5246 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5248 mode
= GET_MODE_WIDER_MODE (mode
))
5250 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5251 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5254 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5255 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5256 const_tiny_rtx
[0][i
] = const0_rtx
;
5258 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5259 if (STORE_FLAG_VALUE
== 1)
5260 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5262 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5263 return_address_pointer_rtx
5264 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5267 #ifdef STATIC_CHAIN_REGNUM
5268 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5270 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5271 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5272 static_chain_incoming_rtx
5273 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5276 static_chain_incoming_rtx
= static_chain_rtx
;
5280 static_chain_rtx
= STATIC_CHAIN
;
5282 #ifdef STATIC_CHAIN_INCOMING
5283 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5285 static_chain_incoming_rtx
= static_chain_rtx
;
5289 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5290 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5293 /* Produce exact duplicate of insn INSN after AFTER.
5294 Care updating of libcall regions if present. */
5297 emit_copy_of_insn_after (rtx insn
, rtx after
)
5300 rtx note1
, note2
, link
;
5302 switch (GET_CODE (insn
))
5305 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5309 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5313 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5314 if (CALL_INSN_FUNCTION_USAGE (insn
))
5315 CALL_INSN_FUNCTION_USAGE (new)
5316 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5317 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5318 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5325 /* Update LABEL_NUSES. */
5326 mark_jump_label (PATTERN (new), new, 0);
5328 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5330 /* If the old insn is frame related, then so is the new one. This is
5331 primarily needed for IA-64 unwind info which marks epilogue insns,
5332 which may be duplicated by the basic block reordering code. */
5333 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn
);
5335 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5337 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5338 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5340 if (GET_CODE (link
) == EXPR_LIST
)
5342 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5343 copy_insn_1 (XEXP (link
, 0)), REG_NOTES (new));
5346 = gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5347 XEXP (link
, 0), REG_NOTES (new));
5350 /* Fix the libcall sequences. */
5351 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5354 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5356 XEXP (note1
, 0) = p
;
5357 XEXP (note2
, 0) = new;
5359 INSN_CODE (new) = INSN_CODE (insn
);
5363 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5365 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5367 if (hard_reg_clobbers
[mode
][regno
])
5368 return hard_reg_clobbers
[mode
][regno
];
5370 return (hard_reg_clobbers
[mode
][regno
] =
5371 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5374 #include "gt-emit-rtl.h"