1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
76 Before life analysis, the mode of each insn is set based on whether
77 or not any stack registers are mentioned within that insn. VOIDmode
78 means that no regs are mentioned anyway, and QImode means that at
79 least one pattern within the insn mentions stack registers. This
80 information is valid until after reg_to_stack returns, and is used
85 There are several rules on the usage of stack-like regs in
86 asm_operands insns. These rules apply only to the operands that are
89 1. Given a set of input regs that die in an asm_operands, it is
90 necessary to know which are implicitly popped by the asm, and
91 which must be explicitly popped by gcc.
93 An input reg that is implicitly popped by the asm must be
94 explicitly clobbered, unless it is constrained to match an
97 2. For any input reg that is implicitly popped by an asm, it is
98 necessary to know how to adjust the stack to compensate for the pop.
99 If any non-popped input is closer to the top of the reg-stack than
100 the implicitly popped reg, it would not be possible to know what the
101 stack looked like - it's not clear how the rest of the stack "slides
104 All implicitly popped input regs must be closer to the top of
105 the reg-stack than any input that is not implicitly popped.
107 3. It is possible that if an input dies in an insn, reload might
108 use the input reg for an output reload. Consider this example:
110 asm ("foo" : "=t" (a) : "f" (b));
112 This asm says that input B is not popped by the asm, and that
113 the asm pushes a result onto the reg-stack, ie, the stack is one
114 deeper after the asm than it was before. But, it is possible that
115 reload will think that it can use the same reg for both the input and
116 the output, if input B dies in this insn.
118 If any input operand uses the "f" constraint, all output reg
119 constraints must use the "&" earlyclobber.
121 The asm above would be written as
123 asm ("foo" : "=&t" (a) : "f" (b));
125 4. Some operands need to be in particular places on the stack. All
126 output operands fall in this category - there is no other way to
127 know which regs the outputs appear in unless the user indicates
128 this in the constraints.
130 Output operands must specifically indicate which reg an output
131 appears in after an asm. "=f" is not allowed: the operand
132 constraints must select a class with a single reg.
134 5. Output operands may not be "inserted" between existing stack regs.
135 Since no 387 opcode uses a read/write operand, all output operands
136 are dead before the asm_operands, and are pushed by the asm_operands.
137 It makes no sense to push anywhere but the top of the reg-stack.
139 Output operands must start at the top of the reg-stack: output
140 operands may not "skip" a reg.
142 6. Some asm statements may need extra stack space for internal
143 calculations. This can be guaranteed by clobbering stack registers
144 unrelated to the inputs and outputs.
146 Here are a couple of reasonable asms to want to write. This asm
147 takes one input, which is internally popped, and produces two outputs.
149 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
151 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
152 and replaces them with one output. The user must code the "st(1)"
153 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
155 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
163 #include "insn-config.h"
165 #include "hard-reg-set.h"
170 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
172 /* True if the current function returns a real value. */
173 static int current_function_returns_real
;
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
182 REG_SET indicates which registers are live. */
184 typedef struct stack_def
186 int top
; /* index to top stack element */
187 HARD_REG_SET reg_set
; /* set of live registers */
188 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
191 /* highest instruction uid */
192 static int max_uid
= 0;
194 /* Number of basic blocks in the current function. */
197 /* Element N is first insn in basic block N.
198 This info lasts until we finish compiling the function. */
199 static rtx
*block_begin
;
201 /* Element N is last insn in basic block N.
202 This info lasts until we finish compiling the function. */
203 static rtx
*block_end
;
205 /* Element N is nonzero if control can drop into basic block N */
206 static char *block_drops_in
;
208 /* Element N says all about the stack at entry block N */
209 static stack block_stack_in
;
211 /* Element N says all about the stack life at the end of block N */
212 static HARD_REG_SET
*block_out_reg_set
;
214 /* This is where the BLOCK_NUM values are really stored. This is set
215 up by find_blocks and used there and in life_analysis. It can be used
216 later, but only to look up an insn that is the head or tail of some
217 block. life_analysis and the stack register conversion process can
218 add insns within a block. */
219 static int *block_number
;
221 /* This is the register file for all register after conversion */
222 static rtx FP_mode_reg
[FIRST_PSEUDO_REGISTER
][(int) MAX_MACHINE_MODE
];
224 /* Get the basic block number of an insn. See note at block_number
225 definition are validity of this information. */
227 #define BLOCK_NUM(INSN) \
228 ((INSN_UID (INSN) > max_uid) \
229 ? (abort() , -1) : block_number[INSN_UID (INSN)])
231 extern rtx forced_labels
;
232 extern rtx
gen_jump ();
233 extern rtx
gen_movdf (), gen_movxf ();
234 extern rtx
find_regno_note ();
235 extern rtx
emit_jump_insn_before ();
236 extern rtx
emit_label_after ();
238 /* Forward declarations */
240 static void find_blocks ();
241 static uses_reg_or_mem ();
242 static void stack_reg_life_analysis ();
243 static void change_stack ();
244 static void convert_regs ();
245 static void dump_stack_info ();
247 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
250 stack_regs_mentioned_p (pat
)
256 if (STACK_REG_P (pat
))
259 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
260 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
266 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
267 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
270 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
277 /* Convert register usage from "flat" register file usage to a "stack
278 register file. FIRST is the first insn in the function, FILE is the
281 First compute the beginning and end of each basic block. Do a
282 register life analysis on the stack registers, recording the result
283 for the head and tail of each basic block. The convert each insn one
284 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
285 any cross-jumping created when the converter inserts pop insns.*/
288 reg_to_stack (first
, file
)
294 int stack_reg_seen
= 0;
295 enum machine_mode mode
;
297 current_function_returns_real
298 = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl
))) == REAL_TYPE
;
300 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
301 mode
= GET_MODE_WIDER_MODE (mode
))
302 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
303 FP_mode_reg
[i
][(int) mode
] = gen_rtx (REG
, mode
, i
);
305 /* Count the basic blocks. Also find maximum insn uid. */
307 register RTX_CODE prev_code
= BARRIER
;
308 register RTX_CODE code
;
312 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
314 /* Note that this loop must select the same block boundaries
315 as code in find_blocks. Also note that this code is not the
316 same as that used in flow.c. */
318 if (INSN_UID (insn
) > max_uid
)
319 max_uid
= INSN_UID (insn
);
321 code
= GET_CODE (insn
);
323 if (code
== CODE_LABEL
324 || (prev_code
!= INSN
325 && prev_code
!= CALL_INSN
326 && prev_code
!= CODE_LABEL
327 && GET_RTX_CLASS (code
) == 'i'))
330 /* Remember whether or not this insn mentions an FP regs.
331 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
333 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
334 && stack_regs_mentioned_p (PATTERN (insn
)))
337 PUT_MODE (insn
, QImode
);
340 PUT_MODE (insn
, VOIDmode
);
342 if (code
== CODE_LABEL
)
343 LABEL_REFS (insn
) = insn
; /* delete old chain */
350 /* If no stack register reference exists in this insn, there isn't
351 anything to convert. */
353 if (! stack_reg_seen
)
356 /* If there are stack registers, there must be at least one block. */
361 /* Allocate some tables that last till end of compiling this function
362 and some needed only in find_blocks and life_analysis. */
364 block_begin
= (rtx
*) alloca (blocks
* sizeof (rtx
));
365 block_end
= (rtx
*) alloca (blocks
* sizeof (rtx
));
366 block_drops_in
= (char *) alloca (blocks
);
368 block_stack_in
= (stack
) alloca (blocks
* sizeof (struct stack_def
));
369 block_out_reg_set
= (HARD_REG_SET
*) alloca (blocks
* sizeof (HARD_REG_SET
));
370 bzero ((char *) block_stack_in
, blocks
* sizeof (struct stack_def
));
371 bzero ((char *) block_out_reg_set
, blocks
* sizeof (HARD_REG_SET
));
373 block_number
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
376 stack_reg_life_analysis (first
);
378 /* Dump the life analysis debug information before jump
379 optimization, as that will destroy the LABEL_REFS we keep the
383 dump_stack_info (file
);
388 jump_optimize (first
, 2, 0, 0);
391 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
392 label's chain of references, and note which insn contains each
396 record_label_references (insn
, pat
)
399 register enum rtx_code code
= GET_CODE (pat
);
403 if (code
== LABEL_REF
)
405 register rtx label
= XEXP (pat
, 0);
408 if (GET_CODE (label
) != CODE_LABEL
)
411 /* Don't make a duplicate in the code_label's chain. */
413 for (ref
= LABEL_REFS (label
);
415 ref
= LABEL_NEXTREF (ref
))
416 if (CONTAINING_INSN (ref
) == insn
)
419 CONTAINING_INSN (pat
) = insn
;
420 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
421 LABEL_REFS (label
) = pat
;
426 fmt
= GET_RTX_FORMAT (code
);
427 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
430 record_label_references (insn
, XEXP (pat
, i
));
434 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
435 record_label_references (insn
, XVECEXP (pat
, i
, j
));
440 /* Return a pointer to the REG expression within PAT. If PAT is not a
441 REG, possible enclosed by a conversion rtx, return the inner part of
442 PAT that stopped the search. */
448 while (GET_CODE (*pat
) == SUBREG
449 || GET_CODE (*pat
) == FLOAT
450 || GET_CODE (*pat
) == FIX
451 || GET_CODE (*pat
) == FLOAT_EXTEND
)
452 pat
= & XEXP (*pat
, 0);
457 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
458 N_OPERANDS is the total number of operands. Return which alternative
459 matched, or -1 is no alternative matches.
461 OPERAND_MATCHES is an array which indicates which operand this
462 operand matches due to the constraints, or -1 if no match is required.
463 If two operands match by coincidence, but are not required to match by
464 the constraints, -1 is returned.
466 OPERAND_CLASS is an array which indicates the smallest class
467 required by the constraints. If the alternative that matches calls
468 for some class `class', and the operand matches a subclass of `class',
469 OPERAND_CLASS is set to `class' as required by the constraints, not to
470 the subclass. If an alternative allows more than one class,
471 OPERAND_CLASS is set to the smallest class that is a union of the
475 constrain_asm_operands (n_operands
, operands
, operand_constraints
,
476 operand_matches
, operand_class
)
479 char **operand_constraints
;
480 int *operand_matches
;
481 enum reg_class
*operand_class
;
483 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
485 int this_alternative
, this_operand
;
489 for (j
= 0; j
< n_operands
; j
++)
490 constraints
[j
] = operand_constraints
[j
];
492 /* Compute the number of alternatives in the operands. reload has
493 already guaranteed that all operands have the same number of
497 for (q
= constraints
[0]; *q
; q
++)
498 n_alternatives
+= (*q
== ',');
500 this_alternative
= 0;
501 while (this_alternative
< n_alternatives
)
506 /* No operands match, no narrow class requirements yet. */
507 for (i
= 0; i
< n_operands
; i
++)
509 operand_matches
[i
] = -1;
510 operand_class
[i
] = NO_REGS
;
513 for (this_operand
= 0; this_operand
< n_operands
; this_operand
++)
515 rtx op
= operands
[this_operand
];
516 enum machine_mode mode
= GET_MODE (op
);
517 char *p
= constraints
[this_operand
];
522 if (GET_CODE (op
) == SUBREG
)
524 if (GET_CODE (SUBREG_REG (op
)) == REG
525 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
526 offset
= SUBREG_WORD (op
);
527 op
= SUBREG_REG (op
);
530 /* An empty constraint or empty alternative
531 allows anything which matched the pattern. */
532 if (*p
== 0 || *p
== ',')
535 while (*p
&& (c
= *p
++) != ',')
549 /* Ignore rest of this alternative. */
550 while (*p
&& *p
!= ',') p
++;
559 /* This operand must be the same as a previous one.
560 This kind of constraint is used for instructions such
561 as add when they take only two operands.
563 Note that the lower-numbered operand is passed first. */
565 if (operands_match_p (operands
[c
- '0'],
566 operands
[this_operand
]))
568 operand_matches
[this_operand
] = c
- '0';
574 /* p is used for address_operands. Since this is an asm,
575 just to make sure that the operand is valid for Pmode. */
577 if (strict_memory_address_p (Pmode
, op
))
582 /* Anything goes unless it is a REG and really has a hard reg
583 but the hard reg is not in the class GENERAL_REGS. */
584 if (GENERAL_REGS
== ALL_REGS
585 || GET_CODE (op
) != REG
586 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
588 if (GET_CODE (op
) == REG
)
589 operand_class
[this_operand
]
590 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
596 if (GET_CODE (op
) == REG
597 && (GENERAL_REGS
== ALL_REGS
598 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
)))
600 operand_class
[this_operand
]
601 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
607 /* This is used for a MATCH_SCRATCH in the cases when we
608 don't actually need anything. So anything goes any time. */
613 if (GET_CODE (op
) == MEM
)
618 if (GET_CODE (op
) == MEM
619 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
620 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
625 if (GET_CODE (op
) == MEM
626 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
627 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
632 /* Match any CONST_DOUBLE, but only if
633 we can examine the bits of it reliably. */
634 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
635 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
636 && GET_CODE (op
) != VOIDmode
&& ! flag_pretend_float
)
638 if (GET_CODE (op
) == CONST_DOUBLE
)
643 if (GET_CODE (op
) == CONST_DOUBLE
)
649 if (GET_CODE (op
) == CONST_DOUBLE
650 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
655 if (GET_CODE (op
) == CONST_INT
656 || (GET_CODE (op
) == CONST_DOUBLE
657 && GET_MODE (op
) == VOIDmode
))
666 if (GET_CODE (op
) == CONST_INT
667 || (GET_CODE (op
) == CONST_DOUBLE
668 && GET_MODE (op
) == VOIDmode
))
680 if (GET_CODE (op
) == CONST_INT
681 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
685 #ifdef EXTRA_CONSTRAINT
691 if (EXTRA_CONSTRAINT (op
, c
))
697 if (GET_CODE (op
) == MEM
&& ! offsettable_memref_p (op
))
702 if (offsettable_memref_p (op
))
707 if (GET_CODE (op
) == REG
708 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
711 operand_class
[this_operand
]
712 = reg_class_subunion
[(int)operand_class
[this_operand
]][(int) REG_CLASS_FROM_LETTER (c
)];
717 constraints
[this_operand
] = p
;
718 /* If this operand did not win somehow,
719 this alternative loses. */
723 /* This alternative won; the operands are ok.
724 Change whichever operands this alternative says to change. */
731 /* For operands constrained to match another operand, copy the other
732 operand's class to this operand's class. */
733 for (j
= 0; j
< n_operands
; j
++)
734 if (operand_matches
[j
] >= 0)
735 operand_class
[j
] = operand_class
[operand_matches
[j
]];
737 return this_alternative
== n_alternatives
? -1 : this_alternative
;
740 /* Record the life info of each stack reg in INSN, updating REGSTACK.
741 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
742 is an array of the constraint strings used in the asm statement.
743 OPERANDS is an array of all operands for the insn, and is assumed to
744 contain all output operands, then all inputs operands.
746 There are many rules that an asm statement for stack-like regs must
747 follow. Those rules are explained at the top of this file: the rule
748 numbers below refer to that explanation. */
751 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
757 int n_inputs
, n_outputs
;
760 int n_operands
= n_inputs
+ n_outputs
;
761 int first_input
= n_outputs
;
763 int malformed_asm
= 0;
764 rtx body
= PATTERN (insn
);
766 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
768 enum reg_class
*operand_class
769 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
771 int reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
772 int implicitly_dies
[FIRST_PSEUDO_REGISTER
];
776 /* Find out what the constraints require. If no constraint
777 alternative matches, this asm is malformed. */
778 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
779 operand_matches
, operand_class
);
783 /* Strip SUBREGs here to make the following code simpler. */
784 for (i
= 0; i
< n_operands
; i
++)
785 if (GET_CODE (operands
[i
]) == SUBREG
786 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
787 operands
[i
] = SUBREG_REG (operands
[i
]);
789 /* Set up CLOBBER_REG. */
793 if (GET_CODE (body
) == PARALLEL
)
795 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
797 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
798 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
800 rtx clobber
= XVECEXP (body
, 0, i
);
801 rtx reg
= XEXP (clobber
, 0);
803 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
804 reg
= SUBREG_REG (reg
);
806 if (STACK_REG_P (reg
))
808 clobber_reg
[n_clobbers
] = reg
;
814 /* Enforce rule #4: Output operands must specifically indicate which
815 reg an output appears in after an asm. "=f" is not allowed: the
816 operand constraints must select a class with a single reg.
818 Also enforce rule #5: Output operands must start at the top of
819 the reg-stack: output operands may not "skip" a reg. */
821 bzero ((char *) reg_used_as_output
, sizeof (reg_used_as_output
));
822 for (i
= 0; i
< n_outputs
; i
++)
823 if (STACK_REG_P (operands
[i
]))
824 if (reg_class_size
[(int) operand_class
[i
]] != 1)
827 (insn
, "Output constraint %d must specify a single register", i
);
831 reg_used_as_output
[REGNO (operands
[i
])] = 1;
834 /* Search for first non-popped reg. */
835 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
836 if (! reg_used_as_output
[i
])
839 /* If there are any other popped regs, that's an error. */
840 for (; i
< LAST_STACK_REG
+ 1; i
++)
841 if (reg_used_as_output
[i
])
844 if (i
!= LAST_STACK_REG
+ 1)
846 error_for_asm (insn
, "Output regs must be grouped at top of stack");
850 /* Enforce rule #2: All implicitly popped input regs must be closer
851 to the top of the reg-stack than any input that is not implicitly
854 bzero ((char *) implicitly_dies
, sizeof (implicitly_dies
));
855 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
856 if (STACK_REG_P (operands
[i
]))
858 /* An input reg is implicitly popped if it is tied to an
859 output, or if there is a CLOBBER for it. */
862 for (j
= 0; j
< n_clobbers
; j
++)
863 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
866 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
867 implicitly_dies
[REGNO (operands
[i
])] = 1;
870 /* Search for first non-popped reg. */
871 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
872 if (! implicitly_dies
[i
])
875 /* If there are any other popped regs, that's an error. */
876 for (; i
< LAST_STACK_REG
+ 1; i
++)
877 if (implicitly_dies
[i
])
880 if (i
!= LAST_STACK_REG
+ 1)
883 "Implicitly popped regs must be grouped at top of stack");
887 /* Enfore rule #3: If any input operand uses the "f" constraint, all
888 output constraints must use the "&" earlyclobber.
890 ??? Detect this more deterministically by having constraint_asm_operands
891 record any earlyclobber. */
893 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
894 if (operand_matches
[i
] == -1)
898 for (j
= 0; j
< n_outputs
; j
++)
899 if (operands_match_p (operands
[j
], operands
[i
]))
902 "Output operand %d must use `&' constraint", j
);
909 /* Avoid further trouble with this insn. */
910 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
911 PUT_MODE (insn
, VOIDmode
);
915 /* Process all outputs */
916 for (i
= 0; i
< n_outputs
; i
++)
918 rtx op
= operands
[i
];
920 if (! STACK_REG_P (op
))
921 if (stack_regs_mentioned_p (op
))
926 /* Each destination is dead before this insn. If the
927 destination is not used after this insn, record this with
930 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
)))
931 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
, op
,
934 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
));
937 /* Process all inputs */
938 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
940 if (! STACK_REG_P (operands
[i
]))
941 if (stack_regs_mentioned_p (operands
[i
]))
946 /* If an input is dead after the insn, record a death note.
947 But don't record a death note if there is already a death note,
948 or if the input is also an output. */
950 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]))
951 && operand_matches
[i
] == -1
952 && find_regno_note (insn
, REG_DEAD
, REGNO (operands
[i
])) == NULL_RTX
)
953 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, operands
[i
],
956 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]));
960 /* Scan PAT, which is part of INSN, and record registers appearing in
961 a SET_DEST in DEST, and other registers in SRC.
963 This function does not know about SET_DESTs that are both input and
964 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
967 record_reg_life_pat (pat
, src
, dest
)
969 HARD_REG_SET
*src
, *dest
;
974 if (STACK_REG_P (pat
))
977 SET_HARD_REG_BIT (*src
, REGNO (pat
));
980 SET_HARD_REG_BIT (*dest
, REGNO (pat
));
985 if (GET_CODE (pat
) == SET
)
987 record_reg_life_pat (XEXP (pat
, 0), NULL_PTR
, dest
);
988 record_reg_life_pat (XEXP (pat
, 1), src
, NULL_PTR
);
992 /* We don't need to consider either of these cases. */
993 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
996 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
997 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1003 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1004 record_reg_life_pat (XVECEXP (pat
, i
, j
), src
, dest
);
1006 else if (fmt
[i
] == 'e')
1007 record_reg_life_pat (XEXP (pat
, i
), src
, dest
);
1011 /* Calculate the number of inputs and outputs in BODY, an
1012 asm_operands. N_OPERANDS is the total number of operands, and
1013 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1017 get_asm_operand_lengths (body
, n_operands
, n_inputs
, n_outputs
)
1020 int *n_inputs
, *n_outputs
;
1022 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1023 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
1025 else if (GET_CODE (body
) == ASM_OPERANDS
)
1026 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (body
);
1028 else if (GET_CODE (body
) == PARALLEL
1029 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1030 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
1032 else if (GET_CODE (body
) == PARALLEL
1033 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1034 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1038 *n_outputs
= n_operands
- *n_inputs
;
1041 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1042 registers in REGSTACK. This function is called to process insns from
1043 the last insn in a block to the first. The actual scanning is done in
1044 record_reg_life_pat.
1046 If a register is live after a CALL_INSN, but is not a value return
1047 register for that CALL_INSN, then code is emitted to initialize that
1048 register. The block_end[] data is kept accurate.
1050 Existing death and unset notes for stack registers are deleted
1051 before processing the insn. */
1054 record_reg_life (insn
, block
, regstack
)
1059 rtx note
, *note_link
;
1062 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
1063 || INSN_DELETED_P (insn
))
1066 /* Strip death notes for stack regs from this insn */
1068 note_link
= ®_NOTES(insn
);
1069 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
1070 if (STACK_REG_P (XEXP (note
, 0))
1071 && (REG_NOTE_KIND (note
) == REG_DEAD
1072 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1073 *note_link
= XEXP (note
, 1);
1075 note_link
= &XEXP (note
, 1);
1077 /* Process all patterns in the insn. */
1079 n_operands
= asm_noperands (PATTERN (insn
));
1080 if (n_operands
>= 0)
1082 /* This insn is an `asm' with operands. Decode the operands,
1083 decide how many are inputs, and record the life information. */
1085 rtx operands
[MAX_RECOG_OPERANDS
];
1086 rtx body
= PATTERN (insn
);
1087 int n_inputs
, n_outputs
;
1088 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
1090 decode_asm_operands (body
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
1091 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
1092 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
1093 n_inputs
, n_outputs
);
1097 /* An insn referencing a stack reg has a mode of QImode. */
1098 if (GET_MODE (insn
) == QImode
)
1100 HARD_REG_SET src
, dest
;
1103 CLEAR_HARD_REG_SET (src
);
1104 CLEAR_HARD_REG_SET (dest
);
1105 record_reg_life_pat (PATTERN (insn
), &src
, &dest
);
1107 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
1108 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, regno
))
1110 if (TEST_HARD_REG_BIT (src
, regno
)
1111 && ! TEST_HARD_REG_BIT (dest
, regno
))
1112 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1113 FP_mode_reg
[regno
][(int) DFmode
],
1115 else if (TEST_HARD_REG_BIT (dest
, regno
))
1116 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
,
1117 FP_mode_reg
[regno
][(int) DFmode
],
1121 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, dest
);
1122 IOR_HARD_REG_SET (regstack
->reg_set
, src
);
1125 /* There might be a reg that is live after a function call.
1126 Initialize it to zero so that the program does not crash. See comment
1127 towards the end of stack_reg_life_analysis(). */
1129 if (GET_CODE (insn
) == CALL_INSN
)
1131 int reg
= FIRST_FLOAT_REG
;
1133 /* If a stack reg is mentioned in a CALL_INSN, it must be as the
1136 if (stack_regs_mentioned_p (PATTERN (insn
)))
1139 for (; reg
<= LAST_STACK_REG
; reg
++)
1140 if (TEST_HARD_REG_BIT (regstack
->reg_set
, reg
))
1144 /* The insn will use virtual register numbers, and so
1145 convert_regs is expected to process these. But BLOCK_NUM
1146 cannot be used on these insns, because they do not appear in
1149 pat
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[reg
][(int) DFmode
],
1150 CONST0_RTX (DFmode
));
1151 init
= emit_insn_after (pat
, insn
);
1152 PUT_MODE (init
, QImode
);
1154 CLEAR_HARD_REG_BIT (regstack
->reg_set
, reg
);
1156 /* If the CALL_INSN was the end of a block, move the
1157 block_end to point to the new insn. */
1159 if (block_end
[block
] == insn
)
1160 block_end
[block
] = init
;
1163 /* Some regs do not survive a CALL */
1165 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, call_used_reg_set
);
1169 /* Find all basic blocks of the function, which starts with FIRST.
1170 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1178 register RTX_CODE prev_code
= BARRIER
;
1179 register RTX_CODE code
;
1180 rtx label_value_list
= 0;
1182 /* Record where all the blocks start and end.
1183 Record which basic blocks control can drop in to. */
1186 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1188 /* Note that this loop must select the same block boundaries
1189 as code in reg_to_stack, but that these are not the same
1190 as those selected in flow.c. */
1192 code
= GET_CODE (insn
);
1194 if (code
== CODE_LABEL
1195 || (prev_code
!= INSN
1196 && prev_code
!= CALL_INSN
1197 && prev_code
!= CODE_LABEL
1198 && GET_RTX_CLASS (code
) == 'i'))
1200 block_begin
[++block
] = insn
;
1201 block_end
[block
] = insn
;
1202 block_drops_in
[block
] = prev_code
!= BARRIER
;
1204 else if (GET_RTX_CLASS (code
) == 'i')
1205 block_end
[block
] = insn
;
1207 if (GET_RTX_CLASS (code
) == 'i')
1211 /* Make a list of all labels referred to other than by jumps. */
1212 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1213 if (REG_NOTE_KIND (note
) == REG_LABEL
)
1214 label_value_list
= gen_rtx (EXPR_LIST
, VOIDmode
, XEXP (note
, 0),
1218 block_number
[INSN_UID (insn
)] = block
;
1224 if (block
+ 1 != blocks
)
1227 /* generate all label references to the corresponding jump insn */
1228 for (block
= 0; block
< blocks
; block
++)
1230 insn
= block_end
[block
];
1232 if (GET_CODE (insn
) == JUMP_INSN
)
1234 rtx pat
= PATTERN (insn
);
1235 int computed_jump
= 0;
1238 if (GET_CODE (pat
) == PARALLEL
)
1240 int len
= XVECLEN (pat
, 0);
1241 int has_use_labelref
= 0;
1244 for (i
= len
- 1; i
>= 0; i
--)
1245 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
1246 && GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0)) == LABEL_REF
)
1247 has_use_labelref
= 1;
1249 if (! has_use_labelref
)
1250 for (i
= len
- 1; i
>= 0; i
--)
1251 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
1252 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
1253 && uses_reg_or_mem (SET_SRC (XVECEXP (pat
, 0, i
))))
1256 else if (GET_CODE (pat
) == SET
1257 && SET_DEST (pat
) == pc_rtx
1258 && uses_reg_or_mem (SET_SRC (pat
)))
1263 for (x
= label_value_list
; x
; x
= XEXP (x
, 1))
1264 record_label_references (insn
,
1265 gen_rtx (LABEL_REF
, VOIDmode
,
1268 for (x
= forced_labels
; x
; x
= XEXP (x
, 1))
1269 record_label_references (insn
,
1270 gen_rtx (LABEL_REF
, VOIDmode
,
1274 record_label_references (insn
, pat
);
1279 /* Return 1 if X contain a REG or MEM that is not in the constant pool. */
1285 enum rtx_code code
= GET_CODE (x
);
1291 && ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
1292 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)))))
1295 fmt
= GET_RTX_FORMAT (code
);
1296 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1299 && uses_reg_or_mem (XEXP (x
, i
)))
1303 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1304 if (uses_reg_or_mem (XVECEXP (x
, i
, j
)))
1311 /* If current function returns its result in an fp stack register,
1312 return the register number. Otherwise return -1. */
1315 stack_result_p (decl
)
1318 rtx result
= DECL_RTL (DECL_RESULT (decl
));
1321 && !(GET_CODE (result
) == REG
1322 && REGNO (result
) < FIRST_PSEUDO_REGISTER
))
1324 #ifdef FUNCTION_OUTGOING_VALUE
1326 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1328 result
= FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1332 return STACK_REG_P (result
) ? REGNO (result
) : -1;
1335 /* Determine the which registers are live at the start of each basic
1336 block of the function whose first insn is FIRST.
1338 First, if the function returns a real_type, mark the function
1339 return type as live at each return point, as the RTL may not give any
1340 hint that the register is live.
1342 Then, start with the last block and work back to the first block.
1343 Similarly, work backwards within each block, insn by insn, recording
1344 which regs are die and which are used (and therefore live) in the
1345 hard reg set of block_stack_in[].
1347 After processing each basic block, if there is a label at the start
1348 of the block, propagate the live registers to all jumps to this block.
1350 As a special case, if there are regs live in this block, that are
1351 not live in a block containing a jump to this label, and the block
1352 containing the jump has already been processed, we must propagate this
1353 block's entry register life back to the block containing the jump, and
1354 restart life analysis from there.
1356 In the worst case, this function may traverse the insns
1357 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1358 of the insns may not know that a reg is live at a target that is early
1359 in the insns. So we back up and start over with the new reg live.
1361 If there are registers that are live at the start of the function,
1362 insns are emitted to initialize these registers. Something similar is
1363 done after CALL_INSNs in record_reg_life. */
1366 stack_reg_life_analysis (first
)
1370 struct stack_def regstack
;
1372 if (current_function_returns_real
1373 && stack_result_p (current_function_decl
) >= 0)
1375 /* Find all RETURN insns and mark them. */
1377 int value_regno
= stack_result_p (current_function_decl
);
1379 for (block
= blocks
- 1; block
>= 0; block
--)
1380 if (GET_CODE (block_end
[block
]) == JUMP_INSN
1381 && GET_CODE (PATTERN (block_end
[block
])) == RETURN
)
1382 SET_HARD_REG_BIT (block_out_reg_set
[block
], value_regno
);
1384 /* Mark of the end of last block if we "fall off" the end of the
1385 function into the epilogue. */
1387 if (GET_CODE (block_end
[blocks
-1]) != JUMP_INSN
1388 || GET_CODE (PATTERN (block_end
[blocks
-1])) == RETURN
)
1389 SET_HARD_REG_BIT (block_out_reg_set
[blocks
-1], value_regno
);
1392 /* now scan all blocks backward for stack register use */
1397 register rtx insn
, prev
;
1399 /* current register status at last instruction */
1401 COPY_HARD_REG_SET (regstack
.reg_set
, block_out_reg_set
[block
]);
1403 prev
= block_end
[block
];
1407 prev
= PREV_INSN (insn
);
1409 /* If the insn is a CALL_INSN, we need to ensure that
1410 everything dies. But otherwise don't process unless there
1411 are some stack regs present. */
1413 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
1414 record_reg_life (insn
, block
, ®stack
);
1416 } while (insn
!= block_begin
[block
]);
1418 /* Set the state at the start of the block. Mark that no
1419 register mapping information known yet. */
1421 COPY_HARD_REG_SET (block_stack_in
[block
].reg_set
, regstack
.reg_set
);
1422 block_stack_in
[block
].top
= -2;
1424 /* If there is a label, propagate our register life to all jumps
1427 if (GET_CODE (insn
) == CODE_LABEL
)
1430 int must_restart
= 0;
1432 for (label
= LABEL_REFS (insn
); label
!= insn
;
1433 label
= LABEL_NEXTREF (label
))
1435 int jump_block
= BLOCK_NUM (CONTAINING_INSN (label
));
1437 if (jump_block
< block
)
1438 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1439 block_stack_in
[block
].reg_set
);
1442 /* The block containing the jump has already been
1443 processed. If there are registers that were not known
1444 to be live then, but are live now, we must back up
1445 and restart life analysis from that point with the new
1446 life information. */
1448 GO_IF_HARD_REG_SUBSET (block_stack_in
[block
].reg_set
,
1449 block_out_reg_set
[jump_block
],
1452 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1453 block_stack_in
[block
].reg_set
);
1466 if (block_drops_in
[block
])
1467 IOR_HARD_REG_SET (block_out_reg_set
[block
-1],
1468 block_stack_in
[block
].reg_set
);
1474 /* If any reg is live at the start of the first block of a
1475 function, then we must guarantee that the reg holds some value by
1476 generating our own "load" of that register. Otherwise a 387 would
1477 fault trying to access an empty register. */
1479 HARD_REG_SET empty_regs
;
1480 CLEAR_HARD_REG_SET (empty_regs
);
1481 GO_IF_HARD_REG_SUBSET (block_stack_in
[0].reg_set
, empty_regs
,
1485 /* Load zero into each live register. The fact that a register
1486 appears live at the function start does not necessarily imply an error
1487 in the user program: it merely means that we could not determine that
1488 there wasn't such an error, just as -Wunused sometimes gives
1489 "incorrect" warnings. In those cases, these initializations will do
1492 Note that we are inserting virtual register references here:
1493 these insns must be processed by convert_regs later. Also, these
1494 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1496 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
1497 if (TEST_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
))
1501 init_rtx
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[reg
][(int) DFmode
],
1502 CONST0_RTX (DFmode
));
1503 block_begin
[0] = emit_insn_after (init_rtx
, first
);
1504 PUT_MODE (block_begin
[0], QImode
);
1506 CLEAR_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
);
1513 /*****************************************************************************
1514 This section deals with stack register substitution, and forms the second
1516 *****************************************************************************/
1518 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1519 the desired hard REGNO. */
1522 replace_reg (reg
, regno
)
1526 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
1527 || ! STACK_REG_P (*reg
))
1530 if (GET_MODE_CLASS (GET_MODE (*reg
)) != MODE_FLOAT
)
1533 *reg
= FP_mode_reg
[regno
][(int) GET_MODE (*reg
)];
1536 /* Remove a note of type NOTE, which must be found, for register
1537 number REGNO from INSN. Remove only one such note. */
1540 remove_regno_note (insn
, note
, regno
)
1545 register rtx
*note_link
, this;
1547 note_link
= ®_NOTES(insn
);
1548 for (this = *note_link
; this; this = XEXP (this, 1))
1549 if (REG_NOTE_KIND (this) == note
1550 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
1552 *note_link
= XEXP (this, 1);
1556 note_link
= &XEXP (this, 1);
1561 /* Find the hard register number of virtual register REG in REGSTACK.
1562 The hard register number is relative to the top of the stack. -1 is
1563 returned if the register is not found. */
1566 get_hard_regnum (regstack
, reg
)
1572 if (! STACK_REG_P (reg
))
1575 for (i
= regstack
->top
; i
>= 0; i
--)
1576 if (regstack
->reg
[i
] == REGNO (reg
))
1579 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
1582 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1583 the chain of insns. Doing so could confuse block_begin and block_end
1584 if this were the only insn in the block. */
1587 delete_insn_for_stacker (insn
)
1590 PUT_CODE (insn
, NOTE
);
1591 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1592 NOTE_SOURCE_FILE (insn
) = 0;
1595 /* Emit an insn to pop virtual register REG before or after INSN.
1596 REGSTACK is the stack state after INSN and is updated to reflect this
1597 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1598 is represented as a SET whose destination is the register to be popped
1599 and source is the top of stack. A death note for the top of stack
1600 cases the movdf pattern to pop. */
1603 emit_pop_insn (insn
, regstack
, reg
, when
)
1609 rtx pop_insn
, pop_rtx
;
1612 hard_regno
= get_hard_regnum (regstack
, reg
);
1614 if (hard_regno
< FIRST_STACK_REG
)
1617 pop_rtx
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[hard_regno
][(int) DFmode
],
1618 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
]);
1620 pop_insn
= (*when
) (pop_rtx
, insn
);
1621 /* ??? This used to be VOIDmode, but that seems wrong. */
1622 PUT_MODE (pop_insn
, QImode
);
1624 REG_NOTES (pop_insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1625 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
],
1626 REG_NOTES (pop_insn
));
1628 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
1629 = regstack
->reg
[regstack
->top
];
1631 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
1636 /* Emit an insn before or after INSN to swap virtual register REG with the
1637 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1638 REGSTACK is the stack state before the swap, and is updated to reflect
1639 the swap. A swap insn is represented as a PARALLEL of two patterns:
1640 each pattern moves one reg to the other.
1642 If REG is already at the top of the stack, no insn is emitted. */
1645 emit_swap_insn (insn
, regstack
, reg
)
1652 rtx swap_rtx
, swap_insn
;
1653 int tmp
, other_reg
; /* swap regno temps */
1654 rtx i1
; /* the stack-reg insn prior to INSN */
1655 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
1657 hard_regno
= get_hard_regnum (regstack
, reg
);
1659 if (hard_regno
< FIRST_STACK_REG
)
1661 if (hard_regno
== FIRST_STACK_REG
)
1664 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
1666 tmp
= regstack
->reg
[other_reg
];
1667 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
1668 regstack
->reg
[regstack
->top
] = tmp
;
1670 /* Find the previous insn involving stack regs, but don't go past
1671 any labels, calls or jumps. */
1672 i1
= prev_nonnote_insn (insn
);
1673 while (i1
&& GET_CODE (i1
) == INSN
&& GET_MODE (i1
) != QImode
)
1674 i1
= prev_nonnote_insn (i1
);
1677 i1set
= single_set (i1
);
1681 rtx i2
; /* the stack-reg insn prior to I1 */
1682 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
1683 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
1685 /* If the previous register stack push was from the reg we are to
1686 swap with, omit the swap. */
1688 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
1689 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
1690 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1693 /* If the previous insn wrote to the reg we are to swap with,
1696 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1697 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1698 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1702 if (GET_RTX_CLASS (GET_CODE (i1
)) == 'i' && sets_cc0_p (PATTERN (i1
)))
1704 i1
= next_nonnote_insn (i1
);
1709 swap_rtx
= gen_swapdf (FP_mode_reg
[hard_regno
][(int) DFmode
],
1710 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
]);
1711 swap_insn
= emit_insn_after (swap_rtx
, i1
);
1712 /* ??? This used to be VOIDmode, but that seems wrong. */
1713 PUT_MODE (swap_insn
, QImode
);
1716 /* Handle a move to or from a stack register in PAT, which is in INSN.
1717 REGSTACK is the current stack. */
1720 move_for_stack_reg (insn
, regstack
, pat
)
1725 rtx
*src
= get_true_reg (&SET_SRC (pat
));
1726 rtx
*dest
= get_true_reg (&SET_DEST (pat
));
1729 if (STACK_REG_P (*src
) && STACK_REG_P (*dest
))
1731 /* Write from one stack reg to another. If SRC dies here, then
1732 just change the register mapping and delete the insn. */
1734 note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src
));
1739 /* If this is a no-op move, there must not be a REG_DEAD note. */
1740 if (REGNO (*src
) == REGNO (*dest
))
1743 for (i
= regstack
->top
; i
>= 0; i
--)
1744 if (regstack
->reg
[i
] == REGNO (*src
))
1747 /* The source must be live, and the dest must be dead. */
1748 if (i
< 0 || get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1751 /* It is possible that the dest is unused after this insn.
1752 If so, just pop the src. */
1754 if (find_regno_note (insn
, REG_UNUSED
, REGNO (*dest
)))
1756 emit_pop_insn (insn
, regstack
, *src
, emit_insn_after
);
1758 delete_insn_for_stacker (insn
);
1762 regstack
->reg
[i
] = REGNO (*dest
);
1764 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1765 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
));
1767 delete_insn_for_stacker (insn
);
1772 /* The source reg does not die. */
1774 /* If this appears to be a no-op move, delete it, or else it
1775 will confuse the machine description output patterns. But if
1776 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1777 for REG_UNUSED will not work for deleted insns. */
1779 if (REGNO (*src
) == REGNO (*dest
))
1781 if (find_regno_note (insn
, REG_UNUSED
, REGNO (*dest
)))
1782 emit_pop_insn (insn
, regstack
, *dest
, emit_insn_after
);
1784 delete_insn_for_stacker (insn
);
1788 /* The destination ought to be dead */
1789 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1792 replace_reg (src
, get_hard_regnum (regstack
, *src
));
1794 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1795 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1796 replace_reg (dest
, FIRST_STACK_REG
);
1798 else if (STACK_REG_P (*src
))
1800 /* Save from a stack reg to MEM, or possibly integer reg. Since
1801 only top of stack may be saved, emit an exchange first if
1804 emit_swap_insn (insn
, regstack
, *src
);
1806 note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src
));
1809 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1811 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
));
1813 else if (GET_MODE (*src
) == XFmode
&& regstack
->top
!= REG_STACK_SIZE
)
1815 /* A 387 cannot write an XFmode value to a MEM without
1816 clobbering the source reg. The output code can handle
1817 this by reading back the value from the MEM.
1818 But it is more efficient to use a temp register if one is
1819 available. Push the source value here if the register
1820 stack is not full, and then write the value to memory via
1822 rtx push_rtx
, push_insn
;
1823 rtx top_stack_reg
= FP_mode_reg
[FIRST_STACK_REG
][(int) XFmode
];
1825 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1826 push_insn
= emit_insn_before (push_rtx
, insn
);
1827 PUT_MODE (push_insn
, QImode
);
1828 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, top_stack_reg
,
1832 replace_reg (src
, FIRST_STACK_REG
);
1834 else if (STACK_REG_P (*dest
))
1836 /* Load from MEM, or possibly integer REG or constant, into the
1837 stack regs. The actual target is always the top of the
1838 stack. The stack mapping is changed to reflect that DEST is
1839 now at top of stack. */
1841 /* The destination ought to be dead */
1842 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1845 if (regstack
->top
>= REG_STACK_SIZE
)
1848 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1849 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1850 replace_reg (dest
, FIRST_STACK_REG
);
1857 swap_rtx_condition (pat
)
1863 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1865 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1869 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1870 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1876 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1877 swap_rtx_condition (XVECEXP (pat
, i
, j
));
1879 else if (fmt
[i
] == 'e')
1880 swap_rtx_condition (XEXP (pat
, i
));
1884 /* Handle a comparison. Special care needs to be taken to avoid
1885 causing comparisons that a 387 cannot do correctly, such as EQ.
1887 Also, a pop insn may need to be emitted. The 387 does have an
1888 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1889 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1893 compare_for_stack_reg (insn
, regstack
, pat
)
1899 rtx src1_note
, src2_note
;
1901 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1902 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1904 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1905 registers that die in this insn - move those to stack top first. */
1906 if (! STACK_REG_P (*src1
)
1907 || (STACK_REG_P (*src2
)
1908 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1912 temp
= XEXP (SET_SRC (pat
), 0);
1913 XEXP (SET_SRC (pat
), 0) = XEXP (SET_SRC (pat
), 1);
1914 XEXP (SET_SRC (pat
), 1) = temp
;
1916 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1917 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1919 next
= next_cc0_user (insn
);
1920 if (next
== NULL_RTX
)
1923 swap_rtx_condition (PATTERN (next
));
1924 INSN_CODE (next
) = -1;
1925 INSN_CODE (insn
) = -1;
1928 /* We will fix any death note later. */
1930 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1932 if (STACK_REG_P (*src2
))
1933 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1935 src2_note
= NULL_RTX
;
1937 emit_swap_insn (insn
, regstack
, *src1
);
1939 replace_reg (src1
, FIRST_STACK_REG
);
1941 if (STACK_REG_P (*src2
))
1942 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1946 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src1_note
, 0)));
1947 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1951 /* If the second operand dies, handle that. But if the operands are
1952 the same stack register, don't bother, because only one death is
1953 needed, and it was just handled. */
1956 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1957 && REGNO (*src1
) == REGNO (*src2
)))
1959 /* As a special case, two regs may die in this insn if src2 is
1960 next to top of stack and the top of stack also dies. Since
1961 we have already popped src1, "next to top of stack" is really
1962 at top (FIRST_STACK_REG) now. */
1964 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1967 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src2_note
, 0)));
1968 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1973 /* The 386 can only represent death of the first operand in
1974 the case handled above. In all other cases, emit a separate
1975 pop and remove the death note from here. */
1977 link_cc0_insns (insn
);
1979 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1981 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1987 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1988 is the current register layout. */
1991 subst_stack_regs_pat (insn
, regstack
, pat
)
1997 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
1998 rtx src1_note
, src2_note
;
2000 if (GET_CODE (pat
) != SET
)
2003 dest
= get_true_reg (&SET_DEST (pat
));
2004 src
= get_true_reg (&SET_SRC (pat
));
2006 /* See if this is a `movM' pattern, and handle elsewhere if so. */
2008 if (*dest
!= cc0_rtx
2009 && (STACK_REG_P (*src
)
2010 || (STACK_REG_P (*dest
)
2011 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
2012 || GET_CODE (*src
) == CONST_DOUBLE
))))
2013 move_for_stack_reg (insn
, regstack
, pat
);
2015 switch (GET_CODE (SET_SRC (pat
)))
2018 compare_for_stack_reg (insn
, regstack
, pat
);
2022 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
2023 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2024 replace_reg (dest
, FIRST_STACK_REG
);
2028 /* This is a `tstM2' case. */
2029 if (*dest
!= cc0_rtx
)
2036 case FLOAT_TRUNCATE
:
2040 /* These insns only operate on the top of the stack. DEST might
2041 be cc0_rtx if we're processing a tstM pattern. Also, it's
2042 possible that the tstM case results in a REG_DEAD note on the
2046 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2048 emit_swap_insn (insn
, regstack
, *src1
);
2050 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2052 if (STACK_REG_P (*dest
))
2053 replace_reg (dest
, FIRST_STACK_REG
);
2057 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2059 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2062 replace_reg (src1
, FIRST_STACK_REG
);
2068 /* On i386, reversed forms of subM3 and divM3 exist for
2069 MODE_FLOAT, so the same code that works for addM3 and mulM3
2073 /* These insns can accept the top of stack as a destination
2074 from a stack reg or mem, or can use the top of stack as a
2075 source and some other stack register (possibly top of stack)
2076 as a destination. */
2078 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2079 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2081 /* We will fix any death note later. */
2083 if (STACK_REG_P (*src1
))
2084 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2086 src1_note
= NULL_RTX
;
2087 if (STACK_REG_P (*src2
))
2088 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2090 src2_note
= NULL_RTX
;
2092 /* If either operand is not a stack register, then the dest
2093 must be top of stack. */
2095 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
2096 emit_swap_insn (insn
, regstack
, *dest
);
2099 /* Both operands are REG. If neither operand is already
2100 at the top of stack, choose to make the one that is the dest
2101 the new top of stack. */
2103 int src1_hard_regnum
, src2_hard_regnum
;
2105 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
2106 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
2107 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
2110 if (src1_hard_regnum
!= FIRST_STACK_REG
2111 && src2_hard_regnum
!= FIRST_STACK_REG
)
2112 emit_swap_insn (insn
, regstack
, *dest
);
2115 if (STACK_REG_P (*src1
))
2116 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
2117 if (STACK_REG_P (*src2
))
2118 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2122 /* If the register that dies is at the top of stack, then
2123 the destination is somewhere else - merely substitute it.
2124 But if the reg that dies is not at top of stack, then
2125 move the top of stack to the dead reg, as though we had
2126 done the insn and then a store-with-pop. */
2128 if (REGNO (XEXP (src1_note
, 0)) == regstack
->reg
[regstack
->top
])
2130 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2131 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2135 int regno
= get_hard_regnum (regstack
, XEXP (src1_note
, 0));
2137 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2138 replace_reg (dest
, regno
);
2140 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2141 = regstack
->reg
[regstack
->top
];
2144 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2145 REGNO (XEXP (src1_note
, 0)));
2146 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2151 if (REGNO (XEXP (src2_note
, 0)) == regstack
->reg
[regstack
->top
])
2153 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2154 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2158 int regno
= get_hard_regnum (regstack
, XEXP (src2_note
, 0));
2160 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2161 replace_reg (dest
, regno
);
2163 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2164 = regstack
->reg
[regstack
->top
];
2167 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2168 REGNO (XEXP (src2_note
, 0)));
2169 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
2174 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2175 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2181 switch (XINT (SET_SRC (pat
), 1))
2185 /* These insns only operate on the top of the stack. */
2187 src1
= get_true_reg (&XVECEXP (SET_SRC (pat
), 0, 0));
2189 emit_swap_insn (insn
, regstack
, *src1
);
2191 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2193 if (STACK_REG_P (*dest
))
2194 replace_reg (dest
, FIRST_STACK_REG
);
2198 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2200 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2203 replace_reg (src1
, FIRST_STACK_REG
);
2217 /* Substitute hard regnums for any stack regs in INSN, which has
2218 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2219 before the insn, and is updated with changes made here. CONSTRAINTS is
2220 an array of the constraint strings used in the asm statement.
2222 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2223 parallel array of where the operands were found. The output operands
2224 all precede the input operands.
2226 There are several requirements and assumptions about the use of
2227 stack-like regs in asm statements. These rules are enforced by
2228 record_asm_stack_regs; see comments there for details. Any
2229 asm_operands left in the RTL at this point may be assume to meet the
2230 requirements, since record_asm_stack_regs removes any problem asm. */
2233 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
, constraints
,
2234 n_inputs
, n_outputs
)
2237 rtx
*operands
, **operands_loc
;
2239 int n_inputs
, n_outputs
;
2241 int n_operands
= n_inputs
+ n_outputs
;
2242 int first_input
= n_outputs
;
2243 rtx body
= PATTERN (insn
);
2245 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
2246 enum reg_class
*operand_class
2247 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
2249 rtx
*note_reg
; /* Array of note contents */
2250 rtx
**note_loc
; /* Address of REG field of each note */
2251 enum reg_note
*note_kind
; /* The type of each note */
2256 struct stack_def temp_stack
;
2262 /* Find out what the constraints required. If no constraint
2263 alternative matches, that is a compiler bug: we should have caught
2264 such an insn during the life analysis pass (and reload should have
2265 caught it regardless). */
2267 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
2268 operand_matches
, operand_class
);
2272 /* Strip SUBREGs here to make the following code simpler. */
2273 for (i
= 0; i
< n_operands
; i
++)
2274 if (GET_CODE (operands
[i
]) == SUBREG
2275 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
2277 operands_loc
[i
] = & SUBREG_REG (operands
[i
]);
2278 operands
[i
] = SUBREG_REG (operands
[i
]);
2281 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2283 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2286 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
2287 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
2288 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
2291 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2293 rtx reg
= XEXP (note
, 0);
2294 rtx
*loc
= & XEXP (note
, 0);
2296 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2298 loc
= & SUBREG_REG (reg
);
2299 reg
= SUBREG_REG (reg
);
2302 if (STACK_REG_P (reg
)
2303 && (REG_NOTE_KIND (note
) == REG_DEAD
2304 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2306 note_reg
[n_notes
] = reg
;
2307 note_loc
[n_notes
] = loc
;
2308 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2313 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2317 if (GET_CODE (body
) == PARALLEL
)
2319 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2320 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
**));
2322 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2323 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2325 rtx clobber
= XVECEXP (body
, 0, i
);
2326 rtx reg
= XEXP (clobber
, 0);
2327 rtx
*loc
= & XEXP (clobber
, 0);
2329 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2331 loc
= & SUBREG_REG (reg
);
2332 reg
= SUBREG_REG (reg
);
2335 if (STACK_REG_P (reg
))
2337 clobber_reg
[n_clobbers
] = reg
;
2338 clobber_loc
[n_clobbers
] = loc
;
2344 bcopy ((char *) regstack
, (char *) &temp_stack
, sizeof (temp_stack
));
2346 /* Put the input regs into the desired place in TEMP_STACK. */
2348 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2349 if (STACK_REG_P (operands
[i
])
2350 && reg_class_subset_p (operand_class
[i
], FLOAT_REGS
)
2351 && operand_class
[i
] != FLOAT_REGS
)
2353 /* If an operand needs to be in a particular reg in
2354 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2355 these constraints are for single register classes, and reload
2356 guaranteed that operand[i] is already in that class, we can
2357 just use REGNO (operands[i]) to know which actual reg this
2358 operand needs to be in. */
2360 int regno
= get_hard_regnum (&temp_stack
, operands
[i
]);
2365 if (regno
!= REGNO (operands
[i
]))
2367 /* operands[i] is not in the right place. Find it
2368 and swap it with whatever is already in I's place.
2369 K is where operands[i] is now. J is where it should
2373 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2375 - (REGNO (operands
[i
]) - FIRST_STACK_REG
));
2377 temp
= temp_stack
.reg
[k
];
2378 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2379 temp_stack
.reg
[j
] = temp
;
2383 /* emit insns before INSN to make sure the reg-stack is in the right
2386 change_stack (insn
, regstack
, &temp_stack
, emit_insn_before
);
2388 /* Make the needed input register substitutions. Do death notes and
2389 clobbers too, because these are for inputs, not outputs. */
2391 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2392 if (STACK_REG_P (operands
[i
]))
2394 int regnum
= get_hard_regnum (regstack
, operands
[i
]);
2399 replace_reg (operands_loc
[i
], regnum
);
2402 for (i
= 0; i
< n_notes
; i
++)
2403 if (note_kind
[i
] == REG_DEAD
)
2405 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2410 replace_reg (note_loc
[i
], regnum
);
2413 for (i
= 0; i
< n_clobbers
; i
++)
2415 /* It's OK for a CLOBBER to reference a reg that is not live.
2416 Don't try to replace it in that case. */
2417 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2421 /* Sigh - clobbers always have QImode. But replace_reg knows
2422 that these regs can't be MODE_INT and will abort. Just put
2423 the right reg there without calling replace_reg. */
2425 *clobber_loc
[i
] = FP_mode_reg
[regnum
][(int) DFmode
];
2429 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2431 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2432 if (STACK_REG_P (operands
[i
]))
2434 /* An input reg is implicitly popped if it is tied to an
2435 output, or if there is a CLOBBER for it. */
2438 for (j
= 0; j
< n_clobbers
; j
++)
2439 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
2442 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
2444 /* operands[i] might not be at the top of stack. But that's OK,
2445 because all we need to do is pop the right number of regs
2446 off of the top of the reg-stack. record_asm_stack_regs
2447 guaranteed that all implicitly popped regs were grouped
2448 at the top of the reg-stack. */
2450 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2451 regstack
->reg
[regstack
->top
]);
2456 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2457 Note that there isn't any need to substitute register numbers.
2458 ??? Explain why this is true. */
2460 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2462 /* See if there is an output for this hard reg. */
2465 for (j
= 0; j
< n_outputs
; j
++)
2466 if (STACK_REG_P (operands
[j
]) && REGNO (operands
[j
]) == i
)
2468 regstack
->reg
[++regstack
->top
] = i
;
2469 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2474 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2475 input that the asm didn't implicitly pop. If the asm didn't
2476 implicitly pop an input reg, that reg will still be live.
2478 Note that we can't use find_regno_note here: the register numbers
2479 in the death notes have already been substituted. */
2481 for (i
= 0; i
< n_outputs
; i
++)
2482 if (STACK_REG_P (operands
[i
]))
2486 for (j
= 0; j
< n_notes
; j
++)
2487 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2488 && note_kind
[j
] == REG_UNUSED
)
2490 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2496 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2497 if (STACK_REG_P (operands
[i
]))
2501 for (j
= 0; j
< n_notes
; j
++)
2502 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2503 && note_kind
[j
] == REG_DEAD
2504 && TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
])))
2506 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2513 /* Substitute stack hard reg numbers for stack virtual registers in
2514 INSN. Non-stack register numbers are not changed. REGSTACK is the
2515 current stack content. Insns may be emitted as needed to arrange the
2516 stack for the 387 based on the contents of the insn. */
2519 subst_stack_regs (insn
, regstack
)
2523 register rtx
*note_link
, note
;
2527 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
2528 || INSN_DELETED_P (insn
))
2531 /* The stack should be empty at a call. */
2533 if (GET_CODE (insn
) == CALL_INSN
)
2534 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
2535 if (TEST_HARD_REG_BIT (regstack
->reg_set
, i
))
2538 /* Do the actual substitution if any stack regs are mentioned.
2539 Since we only record whether entire insn mentions stack regs, and
2540 subst_stack_regs_pat only works for patterns that contain stack regs,
2541 we must check each pattern in a parallel here. A call_value_pop could
2544 if (GET_MODE (insn
) == QImode
)
2546 n_operands
= asm_noperands (PATTERN (insn
));
2547 if (n_operands
>= 0)
2549 /* This insn is an `asm' with operands. Decode the operands,
2550 decide how many are inputs, and do register substitution.
2551 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2553 rtx operands
[MAX_RECOG_OPERANDS
];
2554 rtx
*operands_loc
[MAX_RECOG_OPERANDS
];
2555 rtx body
= PATTERN (insn
);
2556 int n_inputs
, n_outputs
;
2558 = (char **) alloca (n_operands
* sizeof (char *));
2560 decode_asm_operands (body
, operands
, operands_loc
,
2561 constraints
, NULL_PTR
);
2562 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
2563 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
,
2564 constraints
, n_inputs
, n_outputs
);
2568 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2569 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2571 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2572 subst_stack_regs_pat (insn
, regstack
,
2573 XVECEXP (PATTERN (insn
), 0, i
));
2576 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2579 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2580 REG_UNUSED will already have been dealt with, so just return. */
2582 if (GET_CODE (insn
) == NOTE
)
2585 /* If there is a REG_UNUSED note on a stack register on this insn,
2586 the indicated reg must be popped. The REG_UNUSED note is removed,
2587 since the form of the newly emitted pop insn references the reg,
2588 making it no longer `unset'. */
2590 note_link
= ®_NOTES(insn
);
2591 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2592 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2594 *note_link
= XEXP (note
, 1);
2595 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), emit_insn_after
);
2598 note_link
= &XEXP (note
, 1);
2601 /* Change the organization of the stack so that it fits a new basic
2602 block. Some registers might have to be popped, but there can never be
2603 a register live in the new block that is not now live.
2605 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2606 or emit_insn_after. OLD is the original stack layout, and NEW is
2607 the desired form. OLD is updated to reflect the code emitted, ie, it
2608 will be the same as NEW upon return.
2610 This function will not preserve block_end[]. But that information
2611 is no longer needed once this has executed. */
2614 change_stack (insn
, old
, new, when
)
2622 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2623 If we are to insert after INSN, find the next insn, and insert before
2626 if (when
== emit_insn_after
)
2627 insn
= NEXT_INSN (insn
);
2629 /* Pop any registers that are not needed in the new block. */
2631 for (reg
= old
->top
; reg
>= 0; reg
--)
2632 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2633 emit_pop_insn (insn
, old
, FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
],
2638 /* If the new block has never been processed, then it can inherit
2639 the old stack order. */
2641 new->top
= old
->top
;
2642 bcopy (old
->reg
, new->reg
, sizeof (new->reg
));
2646 /* This block has been entered before, and we must match the
2647 previously selected stack order. */
2649 /* By now, the only difference should be the order of the stack,
2650 not their depth or liveliness. */
2652 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2658 if (old
->top
!= new->top
)
2661 /* Loop here emitting swaps until the stack is correct. The
2662 worst case number of swaps emitted is N + 2, where N is the
2663 depth of the stack. In some cases, the reg at the top of
2664 stack may be correct, but swapped anyway in order to fix
2665 other regs. But since we never swap any other reg away from
2666 its correct slot, this algorithm will converge. */
2670 /* Swap the reg at top of stack into the position it is
2671 supposed to be in, until the correct top of stack appears. */
2673 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2675 for (reg
= new->top
; reg
>= 0; reg
--)
2676 if (new->reg
[reg
] == old
->reg
[old
->top
])
2682 emit_swap_insn (insn
, old
,
2683 FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
]);
2686 /* See if any regs remain incorrect. If so, bring an
2687 incorrect reg to the top of stack, and let the while loop
2690 for (reg
= new->top
; reg
>= 0; reg
--)
2691 if (new->reg
[reg
] != old
->reg
[reg
])
2693 emit_swap_insn (insn
, old
,
2694 FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
]);
2699 /* At this point there must be no differences. */
2701 for (reg
= old
->top
; reg
>= 0; reg
--)
2702 if (old
->reg
[reg
] != new->reg
[reg
])
2707 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2708 found, ensure that a jump from INSN to the code_label to which the
2709 label_ref points ends up with the same stack as that at the
2710 code_label. Do this by inserting insns just before the code_label to
2711 pop and rotate the stack until it is in the correct order. REGSTACK
2712 is the order of the register stack in INSN.
2714 Any code that is emitted here must not be later processed as part
2715 of any block, as it will already contain hard register numbers. */
2718 goto_block_pat (insn
, regstack
, pat
)
2724 rtx new_jump
, new_label
, new_barrier
;
2727 struct stack_def temp_stack
;
2730 if (GET_CODE (pat
) != LABEL_REF
)
2733 char *fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
2735 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
2738 goto_block_pat (insn
, regstack
, XEXP (pat
, i
));
2740 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2741 goto_block_pat (insn
, regstack
, XVECEXP (pat
, i
, j
));
2746 label
= XEXP (pat
, 0);
2747 if (GET_CODE (label
) != CODE_LABEL
)
2750 /* First, see if in fact anything needs to be done to the stack at all. */
2751 if (INSN_UID (label
) <= 0)
2754 label_stack
= &block_stack_in
[BLOCK_NUM (label
)];
2756 if (label_stack
->top
== -2)
2758 /* If the target block hasn't had a stack order selected, then
2759 we need merely ensure that no pops are needed. */
2761 for (reg
= regstack
->top
; reg
>= 0; reg
--)
2762 if (! TEST_HARD_REG_BIT (label_stack
->reg_set
, regstack
->reg
[reg
]))
2767 /* change_stack will not emit any code in this case. */
2769 change_stack (label
, regstack
, label_stack
, emit_insn_after
);
2773 else if (label_stack
->top
== regstack
->top
)
2775 for (reg
= label_stack
->top
; reg
>= 0; reg
--)
2776 if (label_stack
->reg
[reg
] != regstack
->reg
[reg
])
2783 /* At least one insn will need to be inserted before label. Insert
2784 a jump around the code we are about to emit. Emit a label for the new
2785 code, and point the original insn at this new label. We can't use
2786 redirect_jump here, because we're using fld[4] of the code labels as
2787 LABEL_REF chains, no NUSES counters. */
2789 new_jump
= emit_jump_insn_before (gen_jump (label
), label
);
2790 record_label_references (new_jump
, PATTERN (new_jump
));
2791 JUMP_LABEL (new_jump
) = label
;
2793 new_barrier
= emit_barrier_after (new_jump
);
2795 new_label
= gen_label_rtx ();
2796 emit_label_after (new_label
, new_barrier
);
2797 LABEL_REFS (new_label
) = new_label
;
2799 /* The old label_ref will no longer point to the code_label if now uses,
2800 so strip the label_ref from the code_label's chain of references. */
2802 for (ref
= &LABEL_REFS (label
); *ref
!= label
; ref
= &LABEL_NEXTREF (*ref
))
2809 *ref
= LABEL_NEXTREF (*ref
);
2811 XEXP (pat
, 0) = new_label
;
2812 record_label_references (insn
, PATTERN (insn
));
2814 if (JUMP_LABEL (insn
) == label
)
2815 JUMP_LABEL (insn
) = new_label
;
2817 /* Now emit the needed code. */
2819 temp_stack
= *regstack
;
2821 change_stack (new_label
, &temp_stack
, label_stack
, emit_insn_after
);
2824 /* Traverse all basic blocks in a function, converting the register
2825 references in each insn from the "flat" register file that gcc uses, to
2826 the stack-like registers the 387 uses. */
2831 register int block
, reg
;
2832 register rtx insn
, next
;
2833 struct stack_def regstack
;
2835 for (block
= 0; block
< blocks
; block
++)
2837 if (block_stack_in
[block
].top
== -2)
2839 /* This block has not been previously encountered. Choose a
2840 default mapping for any stack regs live on entry */
2842 block_stack_in
[block
].top
= -1;
2844 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
2845 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, reg
))
2846 block_stack_in
[block
].reg
[++block_stack_in
[block
].top
] = reg
;
2849 /* Process all insns in this block. Keep track of `next' here,
2850 so that we don't process any insns emitted while making
2851 substitutions in INSN. */
2853 next
= block_begin
[block
];
2854 regstack
= block_stack_in
[block
];
2858 next
= NEXT_INSN (insn
);
2860 /* Don't bother processing unless there is a stack reg
2863 ??? For now, process CALL_INSNs too to make sure that the
2864 stack regs are dead after a call. Remove this eventually. */
2866 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
2867 subst_stack_regs (insn
, ®stack
);
2869 } while (insn
!= block_end
[block
]);
2871 /* Something failed if the stack life doesn't match. */
2873 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, block_out_reg_set
[block
], win
);
2879 /* Adjust the stack of this block on exit to match the stack of
2880 the target block, or copy stack information into stack of
2881 jump target if the target block's stack order hasn't been set
2884 if (GET_CODE (insn
) == JUMP_INSN
)
2885 goto_block_pat (insn
, ®stack
, PATTERN (insn
));
2887 /* Likewise handle the case where we fall into the next block. */
2889 if ((block
< blocks
- 1) && block_drops_in
[block
+1])
2890 change_stack (insn
, ®stack
, &block_stack_in
[block
+1],
2894 /* If the last basic block is the end of a loop, and that loop has
2895 regs live at its start, then the last basic block will have regs live
2896 at its end that need to be popped before the function returns. */
2898 for (reg
= regstack
.top
; reg
>= 0; reg
--)
2899 if (! current_function_returns_real
2900 || regstack
.reg
[reg
] != FIRST_STACK_REG
)
2901 insn
= emit_pop_insn (insn
, ®stack
,
2902 FP_mode_reg
[regstack
.reg
[reg
]][(int) DFmode
],
2906 /* Check expression PAT, which is in INSN, for label references. if
2907 one is found, print the block number of destination to FILE. */
2910 print_blocks (file
, insn
, pat
)
2914 register RTX_CODE code
= GET_CODE (pat
);
2918 if (code
== LABEL_REF
)
2920 register rtx label
= XEXP (pat
, 0);
2922 if (GET_CODE (label
) != CODE_LABEL
)
2925 fprintf (file
, " %d", BLOCK_NUM (label
));
2930 fmt
= GET_RTX_FORMAT (code
);
2931 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2934 print_blocks (file
, insn
, XEXP (pat
, i
));
2938 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2939 print_blocks (file
, insn
, XVECEXP (pat
, i
, j
));
2944 /* Write information about stack registers and stack blocks into FILE.
2945 This is part of making a debugging dump. */
2947 dump_stack_info (file
)
2952 fprintf (file
, "\n%d stack blocks.\n", blocks
);
2953 for (block
= 0; block
< blocks
; block
++)
2955 register rtx head
, jump
, end
;
2958 fprintf (file
, "\nStack block %d: first insn %d, last %d.\n",
2959 block
, INSN_UID (block_begin
[block
]),
2960 INSN_UID (block_end
[block
]));
2962 head
= block_begin
[block
];
2964 fprintf (file
, "Reached from blocks: ");
2965 if (GET_CODE (head
) == CODE_LABEL
)
2966 for (jump
= LABEL_REFS (head
);
2968 jump
= LABEL_NEXTREF (jump
))
2970 register int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
2971 fprintf (file
, " %d", from_block
);
2973 if (block_drops_in
[block
])
2974 fprintf (file
, " previous");
2976 fprintf (file
, "\nlive stack registers on block entry: ");
2977 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
2979 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, regno
))
2980 fprintf (file
, "%d ", regno
);
2983 fprintf (file
, "\nlive stack registers on block exit: ");
2984 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
2986 if (TEST_HARD_REG_BIT (block_out_reg_set
[block
], regno
))
2987 fprintf (file
, "%d ", regno
);
2990 end
= block_end
[block
];
2992 fprintf (file
, "\nJumps to blocks: ");
2993 if (GET_CODE (end
) == JUMP_INSN
)
2994 print_blocks (file
, end
, PATTERN (end
));
2996 if (block
+ 1 < blocks
&& block_drops_in
[block
+1])
2997 fprintf (file
, " next");
2998 else if (block
+ 1 == blocks
2999 || (GET_CODE (end
) == JUMP_INSN
3000 && GET_CODE (PATTERN (end
)) == RETURN
))
3001 fprintf (file
, " return");
3003 fprintf (file
, "\n");
3006 #endif /* STACK_REGS */