gcc/sched-int.h

   1 /* Instruction scheduling pass.  This file contains definitions used
   2    internally in the scheduler.
   3    Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
   4    1999, 2000, 2001, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
   5
   6 This file is part of GCC.
   7
   8 GCC is free software; you can redistribute it and/or modify it under
   9 the terms of the GNU General Public License as published by the Free
  10 Software Foundation; either version 2, or (at your option) any later
  11 version.
  12
  13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16 for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GCC; see the file COPYING.  If not, write to the Free
  20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
  21 02110-1301, USA.  */
  22
  23 #ifndef GCC_SCHED_INT_H
  24 #define GCC_SCHED_INT_H
  25
  26 /* For state_t.  */
  27 #include "insn-attr.h"
  28 /* For regset_head.  */
  29 #include "basic-block.h"
  30 /* For reg_note.  */
  31 #include "rtl.h"
  32
  33 /* Pointer to data describing the current DFA state.  */
  34 extern state_t curr_state;
  35
  36 /* Forward declaration.  */
  37 struct ready_list;
  38
  39 /* Type to represent status of a dependence.  */
  40 typedef int ds_t;
  41
  42 /* Type to represent weakness of speculative dependence.  */
  43 typedef int dw_t;
  44
  45 /* Describe state of dependencies used during sched_analyze phase.  */
  46 struct deps
  47 {
  48   /* The *_insns and *_mems are paired lists.  Each pending memory operation
  49      will have a pointer to the MEM rtx on one list and a pointer to the
  50      containing insn on the other list in the same place in the list.  */
  51
  52   /* We can't use add_dependence like the old code did, because a single insn
  53      may have multiple memory accesses, and hence needs to be on the list
  54      once for each memory access.  Add_dependence won't let you add an insn
  55      to a list more than once.  */
  56
  57   /* An INSN_LIST containing all insns with pending read operations.  */
  58   rtx pending_read_insns;
  59
  60   /* An EXPR_LIST containing all MEM rtx's which are pending reads.  */
  61   rtx pending_read_mems;
  62
  63   /* An INSN_LIST containing all insns with pending write operations.  */
  64   rtx pending_write_insns;
  65
  66   /* An EXPR_LIST containing all MEM rtx's which are pending writes.  */
  67   rtx pending_write_mems;
  68
  69   /* Indicates the combined length of the two pending lists.  We must prevent
  70      these lists from ever growing too large since the number of dependencies
  71      produced is at least O(N*N), and execution time is at least O(4*N*N), as
  72      a function of the length of these pending lists.  */
  73   int pending_lists_length;
  74
  75   /* Length of the pending memory flush list. Large functions with no
  76      calls may build up extremely large lists.  */
  77   int pending_flush_length;
  78
  79   /* The last insn upon which all memory references must depend.
  80      This is an insn which flushed the pending lists, creating a dependency
  81      between it and all previously pending memory references.  This creates
  82      a barrier (or a checkpoint) which no memory reference is allowed to cross.
  83
  84      This includes all non constant CALL_INSNs.  When we do interprocedural
  85      alias analysis, this restriction can be relaxed.
  86      This may also be an INSN that writes memory if the pending lists grow
  87      too large.  */
  88   rtx last_pending_memory_flush;
  89
  90   /* A list of the last function calls we have seen.  We use a list to
  91      represent last function calls from multiple predecessor blocks.
  92      Used to prevent register lifetimes from expanding unnecessarily.  */
  93   rtx last_function_call;
  94
  95   /* A list of insns which use a pseudo register that does not already
  96      cross a call.  We create dependencies between each of those insn
  97      and the next call insn, to ensure that they won't cross a call after
  98      scheduling is done.  */
  99   rtx sched_before_next_call;
 100
 101   /* Used to keep post-call pseudo/hard reg movements together with
 102      the call.  */
 103   enum { not_post_call, post_call, post_call_initial } in_post_call_group_p;
 104
 105   /* Set to the tail insn of the outermost libcall block.
 106
 107      When nonzero, we will mark each insn processed by sched_analyze_insn
 108      with SCHED_GROUP_P to ensure libcalls are scheduled as a unit.  */
 109   rtx libcall_block_tail_insn;
 110
 111   /* The maximum register number for the following arrays.  Before reload
 112      this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER.  */
 113   int max_reg;
 114
 115   /* Element N is the next insn that sets (hard or pseudo) register
 116      N within the current basic block; or zero, if there is no
 117      such insn.  Needed for new registers which may be introduced
 118      by splitting insns.  */
 119   struct deps_reg
 120     {
 121       rtx uses;
 122       rtx sets;
 123       rtx clobbers;
 124       int uses_length;
 125       int clobbers_length;
 126     } *reg_last;
 127
 128   /* Element N is set for each register that has any nonzero element
 129      in reg_last[N].{uses,sets,clobbers}.  */
 130   regset_head reg_last_in_use;
 131
 132   /* Element N is set for each register that is conditionally set.  */
 133   regset_head reg_conditional_sets;
 134 };
 135
 136 /* This structure holds some state of the current scheduling pass, and
 137    contains some function pointers that abstract out some of the non-generic
 138    functionality from functions such as schedule_block or schedule_insn.
 139    There is one global variable, current_sched_info, which points to the
 140    sched_info structure currently in use.  */
 141 struct sched_info
 142 {
 143   /* Add all insns that are initially ready to the ready list.  Called once
 144      before scheduling a set of insns.  */
 145   void (*init_ready_list) (void);
 146   /* Called after taking an insn from the ready list.  Returns nonzero if
 147      this insn can be scheduled, nonzero if we should silently discard it.  */
 148   int (*can_schedule_ready_p) (rtx);
 149   /* Return nonzero if there are more insns that should be scheduled.  */
 150   int (*schedule_more_p) (void);
 151   /* Called after an insn has all its hard dependencies resolved.
 152      Adjusts status of instruction (which is passed through second parameter)
 153      to indicate if instruction should be moved to the ready list or the
 154      queue, or if it should silently discard it (until next resolved
 155      dependence).  */
 156   ds_t (*new_ready) (rtx, ds_t);
 157   /* Compare priority of two insns.  Return a positive number if the second
 158      insn is to be preferred for scheduling, and a negative one if the first
 159      is to be preferred.  Zero if they are equally good.  */
 160   int (*rank) (rtx, rtx);
 161   /* Return a string that contains the insn uid and optionally anything else
 162      necessary to identify this insn in an output.  It's valid to use a
 163      static buffer for this.  The ALIGNED parameter should cause the string
 164      to be formatted so that multiple output lines will line up nicely.  */
 165   const char *(*print_insn) (rtx, int);
 166   /* Return nonzero if an insn should be included in priority
 167      calculations.  */
 168   int (*contributes_to_priority) (rtx, rtx);
 169   /* Called when computing dependencies for a JUMP_INSN.  This function
 170      should store the set of registers that must be considered as set by
 171      the jump in the regset.  */
 172   void (*compute_jump_reg_dependencies) (rtx, regset, regset, regset);
 173
 174   /* The boundaries of the set of insns to be scheduled.  */
 175   rtx prev_head, next_tail;
 176
 177   /* Filled in after the schedule is finished; the first and last scheduled
 178      insns.  */
 179   rtx head, tail;
 180
 181   /* If nonzero, enables an additional sanity check in schedule_block.  */
 182   unsigned int queue_must_finish_empty:1;
 183   /* Nonzero if we should use cselib for better alias analysis.  This
 184      must be 0 if the dependency information is used after sched_analyze
 185      has completed, e.g. if we're using it to initialize state for successor
 186      blocks in region scheduling.  */
 187   unsigned int use_cselib:1;
 188
 189   /* Maximum priority that has been assigned to an insn.  */
 190   int sched_max_insns_priority;
 191
 192   /* Hooks to support speculative scheduling.  */
 193
 194   /* Called to notify frontend that instruction is being added (second
 195      parameter == 0) or removed (second parameter == 1).  */
 196   void (*add_remove_insn) (rtx, int);
 197
 198   /* Called to notify frontend that instruction is being scheduled.
 199      The first parameter - instruction to scheduled, the second parameter -
 200      last scheduled instruction.  */
 201   void (*begin_schedule_ready) (rtx, rtx);
 202
 203   /* Called to notify frontend, that new basic block is being added.
 204      The first parameter - new basic block.
 205      The second parameter - block, after which new basic block is being added,
 206      or EXIT_BLOCK_PTR, if recovery block is being added,
 207      or NULL, if standalone block is being added.  */
 208   void (*add_block) (basic_block, basic_block);
 209
 210   /* If the second parameter is not NULL, return nonnull value, if the
 211      basic block should be advanced.
 212      If the second parameter is NULL, return the next basic block in EBB.
 213      The first parameter is the current basic block in EBB.  */
 214   basic_block (*advance_target_bb) (basic_block, rtx);
 215
 216   /* Called after blocks were rearranged due to movement of jump instruction.
 217      The first parameter - index of basic block, in which jump currently is.
 218      The second parameter - index of basic block, in which jump used
 219      to be.
 220      The third parameter - index of basic block, that follows the second
 221      parameter.  */
 222   void (*fix_recovery_cfg) (int, int, int);
 223
 224 #ifdef ENABLE_CHECKING
 225   /* If the second parameter is zero, return nonzero, if block is head of the
 226      region.
 227      If the second parameter is nonzero, return nonzero, if block is leaf of
 228      the region.
 229      global_live_at_start should not change in region heads and
 230      global_live_at_end should not change in region leafs due to scheduling.  */
 231   int (*region_head_or_leaf_p) (basic_block, int);
 232 #endif
 233
 234   /* ??? FIXME: should use straight bitfields inside sched_info instead of
 235      this flag field.  */
 236   unsigned int flags;
 237 };
 238
 239 /* This structure holds description of the properties for speculative
 240    scheduling.  */
 241 struct spec_info_def
 242 {
 243   /* Holds types of allowed speculations: BEGIN_{DATA|CONTROL},
 244      BE_IN_{DATA_CONTROL}.  */
 245   int mask;
 246
 247   /* A dump file for additional information on speculative scheduling.  */
 248   FILE *dump;
 249
 250   /* Minimal cumulative weakness of speculative instruction's
 251      dependencies, so that insn will be scheduled.  */
 252   dw_t weakness_cutoff;
 253
 254   /* Flags from the enum SPEC_SCHED_FLAGS.  */
 255   int flags;
 256 };
 257 typedef struct spec_info_def *spec_info_t;
 258
 259 extern struct sched_info *current_sched_info;
 260
 261 /* Indexed by INSN_UID, the collection of all data associated with
 262    a single instruction.  */
 263
 264 struct haifa_insn_data
 265 {
 266   /* A list of insns which depend on the instruction.  Unlike LOG_LINKS,
 267      it represents forward dependencies.  */
 268   rtx depend;
 269
 270   /* A list of scheduled producers of the instruction.  Links are being moved
 271      from LOG_LINKS to RESOLVED_DEPS during scheduling.  */
 272   rtx resolved_deps;
 273
 274   /* Logical uid gives the original ordering of the insns.  */
 275   int luid;
 276
 277   /* A priority for each insn.  */
 278   int priority;
 279
 280   /* The number of incoming edges in the forward dependency graph.
 281      As scheduling proceeds, counts are decreased.  An insn moves to
 282      the ready queue when its counter reaches zero.  */
 283   int dep_count;
 284
 285   /* Number of instructions referring to this insn.  */
 286   int ref_count;
 287
 288   /* The minimum clock tick at which the insn becomes ready.  This is
 289      used to note timing constraints for the insns in the pending list.  */
 290   int tick;
 291
 292   /* INTER_TICK is used to adjust INSN_TICKs of instructions from the
 293      subsequent blocks in a region.  */
 294   int inter_tick;
 295
 296   /* See comment on QUEUE_INDEX macro in haifa-sched.c.  */
 297   int queue_index;
 298
 299   short cost;
 300
 301   /* This weight is an estimation of the insn's contribution to
 302      register pressure.  */
 303   short reg_weight;
 304
 305   /* Some insns (e.g. call) are not allowed to move across blocks.  */
 306   unsigned int cant_move : 1;
 307
 308   /* Set if there's DEF-USE dependence between some speculatively
 309      moved load insn and this one.  */
 310   unsigned int fed_by_spec_load : 1;
 311   unsigned int is_load_insn : 1;
 312
 313   /* Nonzero if priority has been computed already.  */
 314   unsigned int priority_known : 1;
 315
 316   /* Nonzero if instruction has internal dependence
 317      (e.g. add_dependence was invoked with (insn == elem)).  */
 318   unsigned int has_internal_dep : 1;
 319
 320   /* What speculations are necessary to apply to schedule the instruction.  */
 321   ds_t todo_spec;
 322   /* What speculations were already applied.  */
 323   ds_t done_spec;
 324   /* What speculations are checked by this instruction.  */
 325   ds_t check_spec;
 326
 327   /* Recovery block for speculation checks.  */
 328   basic_block recovery_block;
 329
 330   /* Original pattern of the instruction.  */
 331   rtx orig_pat;
 332 };
 333
 334 extern struct haifa_insn_data *h_i_d;
 335 /* Used only if (current_sched_info->flags & USE_GLAT) != 0.
 336    These regsets store global_live_at_{start, end} information
 337    for each basic block.  */
 338 extern regset *glat_start, *glat_end;
 339
 340 /* Accessor macros for h_i_d.  There are more in haifa-sched.c and
 341    sched-rgn.c.  */
 342 #define INSN_DEPEND(INSN)       (h_i_d[INSN_UID (INSN)].depend)
 343 #define RESOLVED_DEPS(INSN)     (h_i_d[INSN_UID (INSN)].resolved_deps)
 344 #define INSN_LUID(INSN)         (h_i_d[INSN_UID (INSN)].luid)
 345 #define CANT_MOVE(insn)         (h_i_d[INSN_UID (insn)].cant_move)
 346 #define INSN_DEP_COUNT(INSN)    (h_i_d[INSN_UID (INSN)].dep_count)
 347 #define INSN_PRIORITY(INSN)     (h_i_d[INSN_UID (INSN)].priority)
 348 #define INSN_PRIORITY_KNOWN(INSN) (h_i_d[INSN_UID (INSN)].priority_known)
 349 #define INSN_COST(INSN)         (h_i_d[INSN_UID (INSN)].cost)
 350 #define INSN_REG_WEIGHT(INSN)   (h_i_d[INSN_UID (INSN)].reg_weight)
 351 #define HAS_INTERNAL_DEP(INSN)  (h_i_d[INSN_UID (INSN)].has_internal_dep)
 352 #define TODO_SPEC(INSN)         (h_i_d[INSN_UID (INSN)].todo_spec)
 353 #define DONE_SPEC(INSN)         (h_i_d[INSN_UID (INSN)].done_spec)
 354 #define CHECK_SPEC(INSN)        (h_i_d[INSN_UID (INSN)].check_spec)
 355 #define RECOVERY_BLOCK(INSN)    (h_i_d[INSN_UID (INSN)].recovery_block)
 356 #define ORIG_PAT(INSN)          (h_i_d[INSN_UID (INSN)].orig_pat)
 357
 358 /* INSN is either a simple or a branchy speculation check.  */
 359 #define IS_SPECULATION_CHECK_P(INSN) (RECOVERY_BLOCK (INSN) != NULL)
 360
 361 /* INSN is a speculation check that will simply reexecute the speculatively
 362    scheduled instruction if the speculation fails.  */
 363 #define IS_SPECULATION_SIMPLE_CHECK_P(INSN) \
 364   (RECOVERY_BLOCK (INSN) == EXIT_BLOCK_PTR)
 365
 366 /* INSN is a speculation check that will branch to RECOVERY_BLOCK if the
 367    speculation fails.  Insns in that block will reexecute the speculatively
 368    scheduled code and then will return immediately after INSN thus preserving
 369    semantics of the program.  */
 370 #define IS_SPECULATION_BRANCHY_CHECK_P(INSN) \
 371   (RECOVERY_BLOCK (INSN) != NULL && RECOVERY_BLOCK (INSN) != EXIT_BLOCK_PTR)
 372
 373 /* DEP_STATUS of the link encapsulates information, that is needed for
 374    speculative scheduling.  Namely, it is 4 integers in the range
 375    [0, MAX_DEP_WEAK] and 3 bits.
 376    The integers correspond to the probability of the dependence to *not*
 377    exist, it is the probability, that overcoming of this dependence will
 378    not be followed by execution of the recovery code.  Nevertheless,
 379    whatever high the probability of success is, recovery code should still
 380    be generated to preserve semantics of the program.  To find a way to
 381    get/set these integers, please refer to the {get, set}_dep_weak ()
 382    functions in sched-deps.c .
 383    The 3 bits in the DEP_STATUS correspond to 3 dependence types: true-,
 384    output- and anti- dependence.  It is not enough for speculative scheduling
 385    to know just the major type of all the dependence between two instructions,
 386    as only true dependence can be overcome.
 387    There also is the 4-th bit in the DEP_STATUS (HARD_DEP), that is reserved
 388    for using to describe instruction's status.  It is set whenever instruction
 389    has at least one dependence, that cannot be overcome.
 390    See also: check_dep_status () in sched-deps.c .  */
 391 #define DEP_STATUS(LINK) XINT (LINK, 2)
 392
 393 /* We exclude sign bit.  */
 394 #define BITS_PER_DEP_STATUS (HOST_BITS_PER_INT - 1)
 395
 396 /* First '4' stands for 3 dep type bits and HARD_DEP bit.
 397    Second '4' stands for BEGIN_{DATA, CONTROL}, BE_IN_{DATA, CONTROL}
 398    dep weakness.  */
 399 #define BITS_PER_DEP_WEAK ((BITS_PER_DEP_STATUS - 4) / 4)
 400
 401 /* Mask of speculative weakness in dep_status.  */
 402 #define DEP_WEAK_MASK ((1 << BITS_PER_DEP_WEAK) - 1)
 403
 404 /* This constant means that dependence is fake with 99.999...% probability.
 405    This is the maximum value, that can appear in dep_status.
 406    Note, that we don't want MAX_DEP_WEAK to be the same as DEP_WEAK_MASK for
 407    debugging reasons.  Though, it can be set to DEP_WEAK_MASK, and, when
 408    done so, we'll get fast (mul for)/(div by) NO_DEP_WEAK.  */
 409 #define MAX_DEP_WEAK (DEP_WEAK_MASK - 1)
 410
 411 /* This constant means that dependence is 99.999...% real and it is a really
 412    bad idea to overcome it (though this can be done, preserving program
 413    semantics).  */
 414 #define MIN_DEP_WEAK 1
 415
 416 /* This constant represents 100% probability.
 417    E.g. it is used to represent weakness of dependence, that doesn't exist.  */
 418 #define NO_DEP_WEAK (MAX_DEP_WEAK + MIN_DEP_WEAK)
 419
 420 /* Default weakness of speculative dependence.  Used when we can't say
 421    neither bad nor good about the dependence.  */
 422 #define UNCERTAIN_DEP_WEAK (MAX_DEP_WEAK - MAX_DEP_WEAK / 4)
 423
 424 /* Offset for speculative weaknesses in dep_status.  */
 425 enum SPEC_TYPES_OFFSETS {
 426   BEGIN_DATA_BITS_OFFSET = 0,
 427   BE_IN_DATA_BITS_OFFSET = BEGIN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
 428   BEGIN_CONTROL_BITS_OFFSET = BE_IN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
 429   BE_IN_CONTROL_BITS_OFFSET = BEGIN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK
 430 };
 431
 432 /* The following defines provide numerous constants used to distinguish between
 433    different types of speculative dependencies.  */
 434
 435 /* Dependence can be overcome with generation of new data speculative
 436    instruction.  */
 437 #define BEGIN_DATA (((ds_t) DEP_WEAK_MASK) << BEGIN_DATA_BITS_OFFSET)
 438
 439 /* This dependence is to the instruction in the recovery block, that was
 440    formed to recover after data-speculation failure.
 441    Thus, this dependence can overcome with generating of the copy of
 442    this instruction in the recovery block.  */
 443 #define BE_IN_DATA (((ds_t) DEP_WEAK_MASK) << BE_IN_DATA_BITS_OFFSET)
 444
 445 /* Dependence can be overcome with generation of new control speculative
 446    instruction.  */
 447 #define BEGIN_CONTROL (((ds_t) DEP_WEAK_MASK) << BEGIN_CONTROL_BITS_OFFSET)
 448
 449 /* This dependence is to the instruction in the recovery block, that was
 450    formed to recover after control-speculation failure.
 451    Thus, this dependence can be overcome with generating of the copy of
 452    this instruction in the recovery block.  */
 453 #define BE_IN_CONTROL (((ds_t) DEP_WEAK_MASK) << BE_IN_CONTROL_BITS_OFFSET)
 454
 455 /* A few convenient combinations.  */
 456 #define BEGIN_SPEC (BEGIN_DATA | BEGIN_CONTROL)
 457 #define DATA_SPEC (BEGIN_DATA | BE_IN_DATA)
 458 #define CONTROL_SPEC (BEGIN_CONTROL | BE_IN_CONTROL)
 459 #define SPECULATIVE (DATA_SPEC | CONTROL_SPEC)
 460 #define BE_IN_SPEC (BE_IN_DATA | BE_IN_CONTROL)
 461
 462 /* Constants, that are helpful in iterating through dep_status.  */
 463 #define FIRST_SPEC_TYPE BEGIN_DATA
 464 #define LAST_SPEC_TYPE BE_IN_CONTROL
 465 #define SPEC_TYPE_SHIFT BITS_PER_DEP_WEAK
 466
 467 /* Dependence on instruction can be of multiple types
 468    (e.g. true and output). This fields enhance REG_NOTE_KIND information
 469    of the dependence.  */
 470 #define DEP_TRUE (((ds_t) 1) << (BE_IN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK))
 471 #define DEP_OUTPUT (DEP_TRUE << 1)
 472 #define DEP_ANTI (DEP_OUTPUT << 1)
 473
 474 #define DEP_TYPES (DEP_TRUE | DEP_OUTPUT | DEP_ANTI)
 475
 476 /* Instruction has non-speculative dependence.  This bit represents the
 477    property of an instruction - not the one of a dependence.
 478    Therefore, it can appear only in TODO_SPEC field of an instruction.  */
 479 #define HARD_DEP (DEP_ANTI << 1)
 480
 481 /* This represents the results of calling sched-deps.c functions,
 482    which modify dependencies.  Possible choices are: a dependence
 483    is already present and nothing has been changed; a dependence type
 484    has been changed; brand new dependence has been created.  */
 485 enum DEPS_ADJUST_RESULT {
 486   DEP_PRESENT = 1,
 487   DEP_CHANGED = 2,
 488   DEP_CREATED = 3
 489 };
 490
 491 /* Represents the bits that can be set in the flags field of the
 492    sched_info structure.  */
 493 enum SCHED_FLAGS {
 494   /* If set, generate links between instruction as DEPS_LIST.
 495      Otherwise, generate usual INSN_LIST links.  */
 496   USE_DEPS_LIST = 1,
 497   /* Perform data or control (or both) speculation.
 498      Results in generation of data and control speculative dependencies.
 499      Requires USE_DEPS_LIST set.  */
 500   DO_SPECULATION = USE_DEPS_LIST << 1,
 501   SCHED_RGN = DO_SPECULATION << 1,
 502   SCHED_EBB = SCHED_RGN << 1,
 503   /* Detach register live information from basic block headers.
 504      This is necessary to invoke functions, that change CFG (e.g. split_edge).
 505      Requires USE_GLAT.  */
 506   DETACH_LIFE_INFO = SCHED_EBB << 1,
 507   /* Save register live information from basic block headers to
 508      glat_{start, end} arrays.  */
 509   USE_GLAT = DETACH_LIFE_INFO << 1
 510 };
 511
 512 enum SPEC_SCHED_FLAGS {
 513   COUNT_SPEC_IN_CRITICAL_PATH = 1,
 514   PREFER_NON_DATA_SPEC = COUNT_SPEC_IN_CRITICAL_PATH << 1,
 515   PREFER_NON_CONTROL_SPEC = PREFER_NON_DATA_SPEC << 1
 516 };
 517
 518 #define NOTE_NOT_BB_P(NOTE) (NOTE_P (NOTE) && (NOTE_LINE_NUMBER (NOTE)  \
 519                                                != NOTE_INSN_BASIC_BLOCK))
 520
 521 extern FILE *sched_dump;
 522 extern int sched_verbose;
 523
 524 /* Exception Free Loads:
 525
 526    We define five classes of speculative loads: IFREE, IRISKY,
 527    PFREE, PRISKY, and MFREE.
 528
 529    IFREE loads are loads that are proved to be exception-free, just
 530    by examining the load insn.  Examples for such loads are loads
 531    from TOC and loads of global data.
 532
 533    IRISKY loads are loads that are proved to be exception-risky,
 534    just by examining the load insn.  Examples for such loads are
 535    volatile loads and loads from shared memory.
 536
 537    PFREE loads are loads for which we can prove, by examining other
 538    insns, that they are exception-free.  Currently, this class consists
 539    of loads for which we are able to find a "similar load", either in
 540    the target block, or, if only one split-block exists, in that split
 541    block.  Load2 is similar to load1 if both have same single base
 542    register.  We identify only part of the similar loads, by finding
 543    an insn upon which both load1 and load2 have a DEF-USE dependence.
 544
 545    PRISKY loads are loads for which we can prove, by examining other
 546    insns, that they are exception-risky.  Currently we have two proofs for
 547    such loads.  The first proof detects loads that are probably guarded by a
 548    test on the memory address.  This proof is based on the
 549    backward and forward data dependence information for the region.
 550    Let load-insn be the examined load.
 551    Load-insn is PRISKY iff ALL the following hold:
 552
 553    - insn1 is not in the same block as load-insn
 554    - there is a DEF-USE dependence chain (insn1, ..., load-insn)
 555    - test-insn is either a compare or a branch, not in the same block
 556      as load-insn
 557    - load-insn is reachable from test-insn
 558    - there is a DEF-USE dependence chain (insn1, ..., test-insn)
 559
 560    This proof might fail when the compare and the load are fed
 561    by an insn not in the region.  To solve this, we will add to this
 562    group all loads that have no input DEF-USE dependence.
 563
 564    The second proof detects loads that are directly or indirectly
 565    fed by a speculative load.  This proof is affected by the
 566    scheduling process.  We will use the flag  fed_by_spec_load.
 567    Initially, all insns have this flag reset.  After a speculative
 568    motion of an insn, if insn is either a load, or marked as
 569    fed_by_spec_load, we will also mark as fed_by_spec_load every
 570    insn1 for which a DEF-USE dependence (insn, insn1) exists.  A
 571    load which is fed_by_spec_load is also PRISKY.
 572
 573    MFREE (maybe-free) loads are all the remaining loads. They may be
 574    exception-free, but we cannot prove it.
 575
 576    Now, all loads in IFREE and PFREE classes are considered
 577    exception-free, while all loads in IRISKY and PRISKY classes are
 578    considered exception-risky.  As for loads in the MFREE class,
 579    these are considered either exception-free or exception-risky,
 580    depending on whether we are pessimistic or optimistic.  We have
 581    to take the pessimistic approach to assure the safety of
 582    speculative scheduling, but we can take the optimistic approach
 583    by invoking the -fsched_spec_load_dangerous option.  */
 584
 585 enum INSN_TRAP_CLASS
 586 {
 587   TRAP_FREE = 0, IFREE = 1, PFREE_CANDIDATE = 2,
 588   PRISKY_CANDIDATE = 3, IRISKY = 4, TRAP_RISKY = 5
 589 };
 590
 591 #define WORST_CLASS(class1, class2) \
 592 ((class1 > class2) ? class1 : class2)
 593
 594 #ifndef __GNUC__
 595 #define __inline
 596 #endif
 597
 598 #ifndef HAIFA_INLINE
 599 #define HAIFA_INLINE __inline
 600 #endif
 601
 602 /* Functions in sched-vis.c.  */
 603 extern void print_insn (char *, rtx, int);
 604
 605 /* Functions in sched-deps.c.  */
 606 extern bool sched_insns_conditions_mutex_p (rtx, rtx);
 607 extern void add_dependence (rtx, rtx, enum reg_note);
 608 extern void sched_analyze (struct deps *, rtx, rtx);
 609 extern void init_deps (struct deps *);
 610 extern void free_deps (struct deps *);
 611 extern void init_deps_global (void);
 612 extern void finish_deps_global (void);
 613 extern void add_forw_dep (rtx, rtx);
 614 extern void compute_forward_dependences (rtx, rtx);
 615 extern rtx find_insn_list (rtx, rtx);
 616 extern void init_dependency_caches (int);
 617 extern void free_dependency_caches (void);
 618 extern void extend_dependency_caches (int, bool);
 619 extern enum DEPS_ADJUST_RESULT add_or_update_back_dep (rtx, rtx,
 620                                                        enum reg_note, ds_t);
 621 extern void add_or_update_back_forw_dep (rtx, rtx, enum reg_note, ds_t);
 622 extern void add_back_forw_dep (rtx, rtx, enum reg_note, ds_t);
 623 extern void delete_back_forw_dep (rtx, rtx);
 624 extern dw_t get_dep_weak (ds_t, ds_t);
 625 extern ds_t set_dep_weak (ds_t, ds_t, dw_t);
 626 extern ds_t ds_merge (ds_t, ds_t);
 627
 628 /* Functions in haifa-sched.c.  */
 629 extern int haifa_classify_insn (rtx);
 630 extern void get_ebb_head_tail (basic_block, basic_block, rtx *, rtx *);
 631 extern int no_real_insns_p (rtx, rtx);
 632
 633 extern void rm_other_notes (rtx, rtx);
 634
 635 extern int insn_cost (rtx, rtx, rtx);
 636 extern int set_priorities (rtx, rtx);
 637
 638 extern void schedule_block (basic_block *, int);
 639 extern void sched_init (void);
 640 extern void sched_finish (void);
 641
 642 extern int try_ready (rtx);
 643 extern void * xrecalloc (void *, size_t, size_t, size_t);
 644 extern void unlink_bb_notes (basic_block, basic_block);
 645 extern void add_block (basic_block, basic_block);
 646 extern void attach_life_info (void);
 647 extern rtx bb_note (basic_block);
 648
 649 #ifdef ENABLE_CHECKING
 650 extern void check_reg_live (bool);
 651 #endif
 652
 653 #endif /* GCC_SCHED_INT_H */