[AArch64 Testsuite] Add a test of the vst[234](q?) intrinics
[official-gcc.git] / gcc / reorg.c
blobc37ae1e96ca39afd83c1ec0ffd6f0ae21b8cabc9
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2014 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "expr.h"
111 #include "function.h"
112 #include "insn-config.h"
113 #include "conditions.h"
114 #include "hard-reg-set.h"
115 #include "basic-block.h"
116 #include "regs.h"
117 #include "recog.h"
118 #include "flags.h"
119 #include "obstack.h"
120 #include "insn-attr.h"
121 #include "resource.h"
122 #include "except.h"
123 #include "params.h"
124 #include "target.h"
125 #include "tree-pass.h"
126 #include "emit-rtl.h"
128 #ifdef DELAY_SLOTS
130 #ifndef ANNUL_IFTRUE_SLOTS
131 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
132 #endif
133 #ifndef ANNUL_IFFALSE_SLOTS
134 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
135 #endif
138 /* First, some functions that were used before GCC got a control flow graph.
139 These functions are now only used here in reorg.c, and have therefore
140 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
142 /* Return the last label to mark the same position as LABEL. Return LABEL
143 itself if it is null or any return rtx. */
145 static rtx
146 skip_consecutive_labels (rtx label_or_return)
148 rtx_insn *insn;
150 if (label_or_return && ANY_RETURN_P (label_or_return))
151 return label_or_return;
153 rtx_insn *label = as_a <rtx_insn *> (label_or_return);
155 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
156 if (LABEL_P (insn))
157 label = insn;
159 return label;
162 #ifdef HAVE_cc0
163 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
164 and REG_CC_USER notes so we can find it. */
166 static void
167 link_cc0_insns (rtx insn)
169 rtx user = next_nonnote_insn (insn);
171 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
172 user = XVECEXP (PATTERN (user), 0, 0);
174 add_reg_note (user, REG_CC_SETTER, insn);
175 add_reg_note (insn, REG_CC_USER, user);
177 #endif
179 /* Insns which have delay slots that have not yet been filled. */
181 static struct obstack unfilled_slots_obstack;
182 static rtx *unfilled_firstobj;
184 /* Define macros to refer to the first and last slot containing unfilled
185 insns. These are used because the list may move and its address
186 should be recomputed at each use. */
188 #define unfilled_slots_base \
189 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
191 #define unfilled_slots_next \
192 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
194 /* Points to the label before the end of the function, or before a
195 return insn. */
196 static rtx_code_label *function_return_label;
197 /* Likewise for a simple_return. */
198 static rtx_code_label *function_simple_return_label;
200 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
201 not always monotonically increase. */
202 static int *uid_to_ruid;
204 /* Highest valid index in `uid_to_ruid'. */
205 static int max_uid;
207 static int stop_search_p (rtx, int);
208 static int resource_conflicts_p (struct resources *, struct resources *);
209 static int insn_references_resource_p (rtx, struct resources *, bool);
210 static int insn_sets_resource_p (rtx, struct resources *, bool);
211 static rtx_code_label *find_end_label (rtx);
212 static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int);
213 static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *);
214 static rtx_insn *delete_from_delay_slot (rtx_insn *);
215 static void delete_scheduled_jump (rtx_insn *);
216 static void note_delay_statistics (int, int);
217 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
218 static rtx_insn_list *optimize_skip (rtx_insn *);
219 #endif
220 static int get_jump_flags (const rtx_insn *, rtx);
221 static int mostly_true_jump (rtx);
222 static rtx get_branch_condition (const rtx_insn *, rtx);
223 static int condition_dominates_p (rtx, const rtx_insn *);
224 static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
225 static int redirect_with_delay_list_safe_p (rtx_insn *, rtx, rtx_insn_list *);
226 static int check_annul_list_true_false (int, rtx);
227 static rtx_insn_list *steal_delay_list_from_target (rtx_insn *, rtx,
228 rtx_sequence *,
229 rtx_insn_list *,
230 struct resources *,
231 struct resources *,
232 struct resources *,
233 int, int *, int *,
234 rtx *);
235 static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx,
236 rtx_sequence *,
237 rtx_insn_list *,
238 struct resources *,
239 struct resources *,
240 struct resources *,
241 int, int *, int *);
242 static void try_merge_delay_insns (rtx, rtx_insn *);
243 static rtx redundant_insn (rtx, rtx_insn *, rtx);
244 static int own_thread_p (rtx, rtx, int);
245 static void update_block (rtx_insn *, rtx);
246 static int reorg_redirect_jump (rtx_insn *, rtx);
247 static void update_reg_dead_notes (rtx, rtx);
248 static void fix_reg_dead_note (rtx, rtx);
249 static void update_reg_unused_notes (rtx, rtx);
250 static void fill_simple_delay_slots (int);
251 static rtx_insn_list *fill_slots_from_thread (rtx_insn *, rtx, rtx, rtx,
252 int, int, int, int,
253 int *, rtx_insn_list *);
254 static void fill_eager_delay_slots (void);
255 static void relax_delay_slots (rtx_insn *);
256 static void make_return_insns (rtx_insn *);
258 /* A wrapper around next_active_insn which takes care to return ret_rtx
259 unchanged. */
261 static rtx
262 first_active_target_insn (rtx insn)
264 if (ANY_RETURN_P (insn))
265 return insn;
266 return next_active_insn (as_a <rtx_insn *> (insn));
269 /* Return true iff INSN is a simplejump, or any kind of return insn. */
271 static bool
272 simplejump_or_return_p (rtx insn)
274 return (JUMP_P (insn)
275 && (simplejump_p (as_a <rtx_insn *> (insn))
276 || ANY_RETURN_P (PATTERN (insn))));
279 /* Return TRUE if this insn should stop the search for insn to fill delay
280 slots. LABELS_P indicates that labels should terminate the search.
281 In all cases, jumps terminate the search. */
283 static int
284 stop_search_p (rtx insn, int labels_p)
286 if (insn == 0)
287 return 1;
289 /* If the insn can throw an exception that is caught within the function,
290 it may effectively perform a jump from the viewpoint of the function.
291 Therefore act like for a jump. */
292 if (can_throw_internal (insn))
293 return 1;
295 switch (GET_CODE (insn))
297 case NOTE:
298 case CALL_INSN:
299 return 0;
301 case CODE_LABEL:
302 return labels_p;
304 case JUMP_INSN:
305 case BARRIER:
306 return 1;
308 case INSN:
309 /* OK unless it contains a delay slot or is an `asm' insn of some type.
310 We don't know anything about these. */
311 return (GET_CODE (PATTERN (insn)) == SEQUENCE
312 || GET_CODE (PATTERN (insn)) == ASM_INPUT
313 || asm_noperands (PATTERN (insn)) >= 0);
315 default:
316 gcc_unreachable ();
320 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
321 resource set contains a volatile memory reference. Otherwise, return FALSE. */
323 static int
324 resource_conflicts_p (struct resources *res1, struct resources *res2)
326 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
327 || res1->volatil || res2->volatil)
328 return 1;
330 return hard_reg_set_intersect_p (res1->regs, res2->regs);
333 /* Return TRUE if any resource marked in RES, a `struct resources', is
334 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
335 routine is using those resources.
337 We compute this by computing all the resources referenced by INSN and
338 seeing if this conflicts with RES. It might be faster to directly check
339 ourselves, and this is the way it used to work, but it means duplicating
340 a large block of complex code. */
342 static int
343 insn_references_resource_p (rtx insn, struct resources *res,
344 bool include_delayed_effects)
346 struct resources insn_res;
348 CLEAR_RESOURCE (&insn_res);
349 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
350 return resource_conflicts_p (&insn_res, res);
353 /* Return TRUE if INSN modifies resources that are marked in RES.
354 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
355 included. CC0 is only modified if it is explicitly set; see comments
356 in front of mark_set_resources for details. */
358 static int
359 insn_sets_resource_p (rtx insn, struct resources *res,
360 bool include_delayed_effects)
362 struct resources insn_sets;
364 CLEAR_RESOURCE (&insn_sets);
365 mark_set_resources (insn, &insn_sets, 0,
366 (include_delayed_effects
367 ? MARK_SRC_DEST_CALL
368 : MARK_SRC_DEST));
369 return resource_conflicts_p (&insn_sets, res);
372 /* Find a label at the end of the function or before a RETURN. If there
373 is none, try to make one. If that fails, returns 0.
375 The property of such a label is that it is placed just before the
376 epilogue or a bare RETURN insn, so that another bare RETURN can be
377 turned into a jump to the label unconditionally. In particular, the
378 label cannot be placed before a RETURN insn with a filled delay slot.
380 ??? There may be a problem with the current implementation. Suppose
381 we start with a bare RETURN insn and call find_end_label. It may set
382 function_return_label just before the RETURN. Suppose the machinery
383 is able to fill the delay slot of the RETURN insn afterwards. Then
384 function_return_label is no longer valid according to the property
385 described above and find_end_label will still return it unmodified.
386 Note that this is probably mitigated by the following observation:
387 once function_return_label is made, it is very likely the target of
388 a jump, so filling the delay slot of the RETURN will be much more
389 difficult.
390 KIND is either simple_return_rtx or ret_rtx, indicating which type of
391 return we're looking for. */
393 static rtx_code_label *
394 find_end_label (rtx kind)
396 rtx_insn *insn;
397 rtx_code_label **plabel;
399 if (kind == ret_rtx)
400 plabel = &function_return_label;
401 else
403 gcc_assert (kind == simple_return_rtx);
404 plabel = &function_simple_return_label;
407 /* If we found one previously, return it. */
408 if (*plabel)
409 return *plabel;
411 /* Otherwise, see if there is a label at the end of the function. If there
412 is, it must be that RETURN insns aren't needed, so that is our return
413 label and we don't have to do anything else. */
415 insn = get_last_insn ();
416 while (NOTE_P (insn)
417 || (NONJUMP_INSN_P (insn)
418 && (GET_CODE (PATTERN (insn)) == USE
419 || GET_CODE (PATTERN (insn)) == CLOBBER)))
420 insn = PREV_INSN (insn);
422 /* When a target threads its epilogue we might already have a
423 suitable return insn. If so put a label before it for the
424 function_return_label. */
425 if (BARRIER_P (insn)
426 && JUMP_P (PREV_INSN (insn))
427 && PATTERN (PREV_INSN (insn)) == kind)
429 rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
430 rtx_code_label *label = gen_label_rtx ();
431 LABEL_NUSES (label) = 0;
433 /* Put the label before any USE insns that may precede the RETURN
434 insn. */
435 while (GET_CODE (temp) == USE)
436 temp = PREV_INSN (temp);
438 emit_label_after (label, temp);
439 *plabel = label;
442 else if (LABEL_P (insn))
443 *plabel = as_a <rtx_code_label *> (insn);
444 else
446 rtx_code_label *label = gen_label_rtx ();
447 LABEL_NUSES (label) = 0;
448 /* If the basic block reorder pass moves the return insn to
449 some other place try to locate it again and put our
450 function_return_label there. */
451 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
452 insn = PREV_INSN (insn);
453 if (insn)
455 insn = PREV_INSN (insn);
457 /* Put the label before any USE insns that may precede the
458 RETURN insn. */
459 while (GET_CODE (insn) == USE)
460 insn = PREV_INSN (insn);
462 emit_label_after (label, insn);
464 else
466 #ifdef HAVE_epilogue
467 if (HAVE_epilogue
468 #ifdef HAVE_return
469 && ! HAVE_return
470 #endif
472 /* The RETURN insn has its delay slot filled so we cannot
473 emit the label just before it. Since we already have
474 an epilogue and cannot emit a new RETURN, we cannot
475 emit the label at all. */
476 return NULL;
477 #endif /* HAVE_epilogue */
479 /* Otherwise, make a new label and emit a RETURN and BARRIER,
480 if needed. */
481 emit_label (label);
482 #ifdef HAVE_return
483 if (HAVE_return)
485 /* The return we make may have delay slots too. */
486 rtx insn = gen_return ();
487 insn = emit_jump_insn (insn);
488 set_return_jump_label (insn);
489 emit_barrier ();
490 if (num_delay_slots (insn) > 0)
491 obstack_ptr_grow (&unfilled_slots_obstack, insn);
493 #endif
495 *plabel = label;
498 /* Show one additional use for this label so it won't go away until
499 we are done. */
500 ++LABEL_NUSES (*plabel);
502 return *plabel;
505 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
506 the pattern of INSN with the SEQUENCE.
508 Returns the insn containing the SEQUENCE that replaces INSN. */
510 static rtx_insn *
511 emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length)
513 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
514 rtvec seqv = rtvec_alloc (length + 1);
515 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
516 rtx_insn *seq_insn = make_insn_raw (seq);
518 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
519 not have a location, but one of the delayed insns does, we pick up a
520 location from there later. */
521 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
523 /* Unlink INSN from the insn chain, so that we can put it into
524 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
525 rtx after = PREV_INSN (insn);
526 remove_insn (insn);
527 SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
529 /* Build our SEQUENCE and rebuild the insn chain. */
530 int i = 1;
531 start_sequence ();
532 XVECEXP (seq, 0, 0) = emit_insn (insn);
533 for (rtx_insn_list *li = list; li; li = li->next (), i++)
535 rtx_insn *tem = li->insn ();
536 rtx note, next;
538 /* Show that this copy of the insn isn't deleted. */
539 INSN_DELETED_P (tem) = 0;
541 /* Unlink insn from its original place, and re-emit it into
542 the sequence. */
543 SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
544 XVECEXP (seq, 0, i) = emit_insn (tem);
546 /* SPARC assembler, for instance, emit warning when debug info is output
547 into the delay slot. */
548 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
549 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
550 INSN_LOCATION (tem) = 0;
552 for (note = REG_NOTES (tem); note; note = next)
554 next = XEXP (note, 1);
555 switch (REG_NOTE_KIND (note))
557 case REG_DEAD:
558 /* Remove any REG_DEAD notes because we can't rely on them now
559 that the insn has been moved. */
560 remove_note (tem, note);
561 break;
563 case REG_LABEL_OPERAND:
564 case REG_LABEL_TARGET:
565 /* Keep the label reference count up to date. */
566 if (LABEL_P (XEXP (note, 0)))
567 LABEL_NUSES (XEXP (note, 0)) ++;
568 break;
570 default:
571 break;
575 end_sequence ();
576 gcc_assert (i == length + 1);
578 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
579 add_insn_after (seq_insn, after, NULL);
581 return seq_insn;
584 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
585 be in the order in which the insns are to be executed. */
587 static rtx_insn_list *
588 add_to_delay_list (rtx_insn *insn, rtx_insn_list *delay_list)
590 /* If we have an empty list, just make a new list element. If
591 INSN has its block number recorded, clear it since we may
592 be moving the insn to a new block. */
594 if (delay_list == 0)
596 clear_hashed_info_for_insn (insn);
597 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
600 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
601 list. */
602 XEXP (delay_list, 1) = add_to_delay_list (insn, delay_list->next ());
604 return delay_list;
607 /* Delete INSN from the delay slot of the insn that it is in, which may
608 produce an insn with no delay slots. Return the new insn. */
610 static rtx_insn *
611 delete_from_delay_slot (rtx_insn *insn)
613 rtx_insn *trial, *seq_insn, *prev;
614 rtx_sequence *seq;
615 rtx_insn_list *delay_list = 0;
616 int i;
617 int had_barrier = 0;
619 /* We first must find the insn containing the SEQUENCE with INSN in its
620 delay slot. Do this by finding an insn, TRIAL, where
621 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
623 for (trial = insn;
624 PREV_INSN (NEXT_INSN (trial)) == trial;
625 trial = NEXT_INSN (trial))
628 seq_insn = PREV_INSN (NEXT_INSN (trial));
629 seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
631 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
632 had_barrier = 1;
634 /* Create a delay list consisting of all the insns other than the one
635 we are deleting (unless we were the only one). */
636 if (seq->len () > 2)
637 for (i = 1; i < seq->len (); i++)
638 if (seq->insn (i) != insn)
639 delay_list = add_to_delay_list (seq->insn (i), delay_list);
641 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
642 list, and rebuild the delay list if non-empty. */
643 prev = PREV_INSN (seq_insn);
644 trial = seq->insn (0);
645 delete_related_insns (seq_insn);
646 add_insn_after (trial, prev, NULL);
648 /* If there was a barrier after the old SEQUENCE, remit it. */
649 if (had_barrier)
650 emit_barrier_after (trial);
652 /* If there are any delay insns, remit them. Otherwise clear the
653 annul flag. */
654 if (delay_list)
655 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
656 else if (JUMP_P (trial))
657 INSN_ANNULLED_BRANCH_P (trial) = 0;
659 INSN_FROM_TARGET_P (insn) = 0;
661 /* Show we need to fill this insn again. */
662 obstack_ptr_grow (&unfilled_slots_obstack, trial);
664 return trial;
667 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
668 the insn that sets CC0 for it and delete it too. */
670 static void
671 delete_scheduled_jump (rtx_insn *insn)
673 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
674 delete the insn that sets the condition code, but it is hard to find it.
675 Since this case is rare anyway, don't bother trying; there would likely
676 be other insns that became dead anyway, which we wouldn't know to
677 delete. */
679 #ifdef HAVE_cc0
680 if (reg_mentioned_p (cc0_rtx, insn))
682 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
684 /* If a reg-note was found, it points to an insn to set CC0. This
685 insn is in the delay list of some other insn. So delete it from
686 the delay list it was in. */
687 if (note)
689 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
690 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
691 delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
693 else
695 /* The insn setting CC0 is our previous insn, but it may be in
696 a delay slot. It will be the last insn in the delay slot, if
697 it is. */
698 rtx_insn *trial = previous_insn (insn);
699 if (NOTE_P (trial))
700 trial = prev_nonnote_insn (trial);
701 if (sets_cc0_p (PATTERN (trial)) != 1
702 || FIND_REG_INC_NOTE (trial, NULL_RTX))
703 return;
704 if (PREV_INSN (NEXT_INSN (trial)) == trial)
705 delete_related_insns (trial);
706 else
707 delete_from_delay_slot (trial);
710 #endif
712 delete_related_insns (insn);
715 /* Counters for delay-slot filling. */
717 #define NUM_REORG_FUNCTIONS 2
718 #define MAX_DELAY_HISTOGRAM 3
719 #define MAX_REORG_PASSES 2
721 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
723 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
725 static int reorg_pass_number;
727 static void
728 note_delay_statistics (int slots_filled, int index)
730 num_insns_needing_delays[index][reorg_pass_number]++;
731 if (slots_filled > MAX_DELAY_HISTOGRAM)
732 slots_filled = MAX_DELAY_HISTOGRAM;
733 num_filled_delays[index][slots_filled][reorg_pass_number]++;
736 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
738 /* Optimize the following cases:
740 1. When a conditional branch skips over only one instruction,
741 use an annulling branch and put that insn in the delay slot.
742 Use either a branch that annuls when the condition if true or
743 invert the test with a branch that annuls when the condition is
744 false. This saves insns, since otherwise we must copy an insn
745 from the L1 target.
747 (orig) (skip) (otherwise)
748 Bcc.n L1 Bcc',a L1 Bcc,a L1'
749 insn insn insn2
750 L1: L1: L1:
751 insn2 insn2 insn2
752 insn3 insn3 L1':
753 insn3
755 2. When a conditional branch skips over only one instruction,
756 and after that, it unconditionally branches somewhere else,
757 perform the similar optimization. This saves executing the
758 second branch in the case where the inverted condition is true.
760 Bcc.n L1 Bcc',a L2
761 insn insn
762 L1: L1:
763 Bra L2 Bra L2
765 INSN is a JUMP_INSN.
767 This should be expanded to skip over N insns, where N is the number
768 of delay slots required. */
770 static rtx_insn_list *
771 optimize_skip (rtx_insn *insn)
773 rtx_insn *trial = next_nonnote_insn (insn);
774 rtx_insn *next_trial = next_active_insn (trial);
775 rtx_insn_list *delay_list = 0;
776 int flags;
778 flags = get_jump_flags (insn, JUMP_LABEL (insn));
780 if (trial == 0
781 || !NONJUMP_INSN_P (trial)
782 || GET_CODE (PATTERN (trial)) == SEQUENCE
783 || recog_memoized (trial) < 0
784 || (! eligible_for_annul_false (insn, 0, trial, flags)
785 && ! eligible_for_annul_true (insn, 0, trial, flags))
786 || can_throw_internal (trial))
787 return 0;
789 /* There are two cases where we are just executing one insn (we assume
790 here that a branch requires only one insn; this should be generalized
791 at some point): Where the branch goes around a single insn or where
792 we have one insn followed by a branch to the same label we branch to.
793 In both of these cases, inverting the jump and annulling the delay
794 slot give the same effect in fewer insns. */
795 if (next_trial == next_active_insn (JUMP_LABEL (insn))
796 || (next_trial != 0
797 && simplejump_or_return_p (next_trial)
798 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
800 if (eligible_for_annul_false (insn, 0, trial, flags))
802 if (invert_jump (insn, JUMP_LABEL (insn), 1))
803 INSN_FROM_TARGET_P (trial) = 1;
804 else if (! eligible_for_annul_true (insn, 0, trial, flags))
805 return 0;
808 delay_list = add_to_delay_list (trial, NULL);
809 next_trial = next_active_insn (trial);
810 update_block (trial, trial);
811 delete_related_insns (trial);
813 /* Also, if we are targeting an unconditional
814 branch, thread our jump to the target of that branch. Don't
815 change this into a RETURN here, because it may not accept what
816 we have in the delay slot. We'll fix this up later. */
817 if (next_trial && simplejump_or_return_p (next_trial))
819 rtx target_label = JUMP_LABEL (next_trial);
820 if (ANY_RETURN_P (target_label))
821 target_label = find_end_label (target_label);
823 if (target_label)
825 /* Recompute the flags based on TARGET_LABEL since threading
826 the jump to TARGET_LABEL may change the direction of the
827 jump (which may change the circumstances in which the
828 delay slot is nullified). */
829 flags = get_jump_flags (insn, target_label);
830 if (eligible_for_annul_true (insn, 0, trial, flags))
831 reorg_redirect_jump (insn, target_label);
835 INSN_ANNULLED_BRANCH_P (insn) = 1;
838 return delay_list;
840 #endif
842 /* Encode and return branch direction and prediction information for
843 INSN assuming it will jump to LABEL.
845 Non conditional branches return no direction information and
846 are predicted as very likely taken. */
848 static int
849 get_jump_flags (const rtx_insn *insn, rtx label)
851 int flags;
853 /* get_jump_flags can be passed any insn with delay slots, these may
854 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
855 direction information, and only if they are conditional jumps.
857 If LABEL is a return, then there is no way to determine the branch
858 direction. */
859 if (JUMP_P (insn)
860 && (condjump_p (insn) || condjump_in_parallel_p (insn))
861 && !ANY_RETURN_P (label)
862 && INSN_UID (insn) <= max_uid
863 && INSN_UID (label) <= max_uid)
864 flags
865 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
866 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
867 /* No valid direction information. */
868 else
869 flags = 0;
871 return flags;
874 /* Return truth value of the statement that this branch
875 is mostly taken. If we think that the branch is extremely likely
876 to be taken, we return 2. If the branch is slightly more likely to be
877 taken, return 1. If the branch is slightly less likely to be taken,
878 return 0 and if the branch is highly unlikely to be taken, return -1. */
880 static int
881 mostly_true_jump (rtx jump_insn)
883 /* If branch probabilities are available, then use that number since it
884 always gives a correct answer. */
885 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
886 if (note)
888 int prob = XINT (note, 0);
890 if (prob >= REG_BR_PROB_BASE * 9 / 10)
891 return 2;
892 else if (prob >= REG_BR_PROB_BASE / 2)
893 return 1;
894 else if (prob >= REG_BR_PROB_BASE / 10)
895 return 0;
896 else
897 return -1;
900 /* If there is no note, assume branches are not taken.
901 This should be rare. */
902 return 0;
905 /* Return the condition under which INSN will branch to TARGET. If TARGET
906 is zero, return the condition under which INSN will return. If INSN is
907 an unconditional branch, return const_true_rtx. If INSN isn't a simple
908 type of jump, or it doesn't go to TARGET, return 0. */
910 static rtx
911 get_branch_condition (const rtx_insn *insn, rtx target)
913 rtx pat = PATTERN (insn);
914 rtx src;
916 if (condjump_in_parallel_p (insn))
917 pat = XVECEXP (pat, 0, 0);
919 if (ANY_RETURN_P (pat) && pat == target)
920 return const_true_rtx;
922 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
923 return 0;
925 src = SET_SRC (pat);
926 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
927 return const_true_rtx;
929 else if (GET_CODE (src) == IF_THEN_ELSE
930 && XEXP (src, 2) == pc_rtx
931 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
932 && XEXP (XEXP (src, 1), 0) == target)
933 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
934 return XEXP (src, 0);
936 else if (GET_CODE (src) == IF_THEN_ELSE
937 && XEXP (src, 1) == pc_rtx
938 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
939 && XEXP (XEXP (src, 2), 0) == target)
940 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
942 enum rtx_code rev;
943 rev = reversed_comparison_code (XEXP (src, 0), insn);
944 if (rev != UNKNOWN)
945 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
946 XEXP (XEXP (src, 0), 0),
947 XEXP (XEXP (src, 0), 1));
950 return 0;
953 /* Return nonzero if CONDITION is more strict than the condition of
954 INSN, i.e., if INSN will always branch if CONDITION is true. */
956 static int
957 condition_dominates_p (rtx condition, const rtx_insn *insn)
959 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
960 enum rtx_code code = GET_CODE (condition);
961 enum rtx_code other_code;
963 if (rtx_equal_p (condition, other_condition)
964 || other_condition == const_true_rtx)
965 return 1;
967 else if (condition == const_true_rtx || other_condition == 0)
968 return 0;
970 other_code = GET_CODE (other_condition);
971 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
972 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
973 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
974 return 0;
976 return comparison_dominates_p (code, other_code);
979 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
980 any insns already in the delay slot of JUMP. */
982 static int
983 redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
985 int flags, i;
986 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
988 /* Make sure all the delay slots of this jump would still
989 be valid after threading the jump. If they are still
990 valid, then return nonzero. */
992 flags = get_jump_flags (jump, newlabel);
993 for (i = 1; i < pat->len (); i++)
994 if (! (
995 #ifdef ANNUL_IFFALSE_SLOTS
996 (INSN_ANNULLED_BRANCH_P (jump)
997 && INSN_FROM_TARGET_P (pat->insn (i)))
998 ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
999 #endif
1000 #ifdef ANNUL_IFTRUE_SLOTS
1001 (INSN_ANNULLED_BRANCH_P (jump)
1002 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1003 ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
1004 #endif
1005 eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
1006 break;
1008 return (i == pat->len ());
1011 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1012 any insns we wish to place in the delay slot of JUMP. */
1014 static int
1015 redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
1016 rtx_insn_list *delay_list)
1018 int flags, i;
1019 rtx_insn_list *li;
1021 /* Make sure all the insns in DELAY_LIST would still be
1022 valid after threading the jump. If they are still
1023 valid, then return nonzero. */
1025 flags = get_jump_flags (jump, newlabel);
1026 for (li = delay_list, i = 0; li; li = li->next (), i++)
1027 if (! (
1028 #ifdef ANNUL_IFFALSE_SLOTS
1029 (INSN_ANNULLED_BRANCH_P (jump)
1030 && INSN_FROM_TARGET_P (li->insn ()))
1031 ? eligible_for_annul_false (jump, i, li->insn (), flags) :
1032 #endif
1033 #ifdef ANNUL_IFTRUE_SLOTS
1034 (INSN_ANNULLED_BRANCH_P (jump)
1035 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1036 ? eligible_for_annul_true (jump, i, li->insn (), flags) :
1037 #endif
1038 eligible_for_delay (jump, i, li->insn (), flags)))
1039 break;
1041 return (li == NULL);
1044 /* DELAY_LIST is a list of insns that have already been placed into delay
1045 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1046 If not, return 0; otherwise return 1. */
1048 static int
1049 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1051 rtx temp;
1053 if (delay_list)
1055 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1057 rtx trial = XEXP (temp, 0);
1059 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1060 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1061 return 0;
1065 return 1;
1068 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1069 the condition tested by INSN is CONDITION and the resources shown in
1070 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1071 from SEQ's delay list, in addition to whatever insns it may execute
1072 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1073 needed while searching for delay slot insns. Return the concatenated
1074 delay list if possible, otherwise, return 0.
1076 SLOTS_TO_FILL is the total number of slots required by INSN, and
1077 PSLOTS_FILLED points to the number filled so far (also the number of
1078 insns in DELAY_LIST). It is updated with the number that have been
1079 filled from the SEQUENCE, if any.
1081 PANNUL_P points to a nonzero value if we already know that we need
1082 to annul INSN. If this routine determines that annulling is needed,
1083 it may set that value nonzero.
1085 PNEW_THREAD points to a location that is to receive the place at which
1086 execution should continue. */
1088 static rtx_insn_list *
1089 steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
1090 rtx_insn_list *delay_list, struct resources *sets,
1091 struct resources *needed,
1092 struct resources *other_needed,
1093 int slots_to_fill, int *pslots_filled,
1094 int *pannul_p, rtx *pnew_thread)
1096 int slots_remaining = slots_to_fill - *pslots_filled;
1097 int total_slots_filled = *pslots_filled;
1098 rtx_insn_list *new_delay_list = 0;
1099 int must_annul = *pannul_p;
1100 int used_annul = 0;
1101 int i;
1102 struct resources cc_set;
1103 bool *redundant;
1105 /* We can't do anything if there are more delay slots in SEQ than we
1106 can handle, or if we don't know that it will be a taken branch.
1107 We know that it will be a taken branch if it is either an unconditional
1108 branch or a conditional branch with a stricter branch condition.
1110 Also, exit if the branch has more than one set, since then it is computing
1111 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1112 ??? It may be possible to move other sets into INSN in addition to
1113 moving the instructions in the delay slots.
1115 We can not steal the delay list if one of the instructions in the
1116 current delay_list modifies the condition codes and the jump in the
1117 sequence is a conditional jump. We can not do this because we can
1118 not change the direction of the jump because the condition codes
1119 will effect the direction of the jump in the sequence. */
1121 CLEAR_RESOURCE (&cc_set);
1122 for (rtx_insn_list *temp = delay_list; temp; temp = temp->next ())
1124 rtx_insn *trial = temp->insn ();
1126 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1127 if (insn_references_resource_p (seq->insn (0), &cc_set, false))
1128 return delay_list;
1131 if (XVECLEN (seq, 0) - 1 > slots_remaining
1132 || ! condition_dominates_p (condition, seq->insn (0))
1133 || ! single_set (seq->insn (0)))
1134 return delay_list;
1136 #ifdef MD_CAN_REDIRECT_BRANCH
1137 /* On some targets, branches with delay slots can have a limited
1138 displacement. Give the back end a chance to tell us we can't do
1139 this. */
1140 if (! MD_CAN_REDIRECT_BRANCH (insn, seq->insn (0)))
1141 return delay_list;
1142 #endif
1144 redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
1145 for (i = 1; i < seq->len (); i++)
1147 rtx_insn *trial = seq->insn (i);
1148 int flags;
1150 if (insn_references_resource_p (trial, sets, false)
1151 || insn_sets_resource_p (trial, needed, false)
1152 || insn_sets_resource_p (trial, sets, false)
1153 #ifdef HAVE_cc0
1154 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1155 delay list. */
1156 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1157 #endif
1158 /* If TRIAL is from the fallthrough code of an annulled branch insn
1159 in SEQ, we cannot use it. */
1160 || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
1161 && ! INSN_FROM_TARGET_P (trial)))
1162 return delay_list;
1164 /* If this insn was already done (usually in a previous delay slot),
1165 pretend we put it in our delay slot. */
1166 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1167 if (redundant[i])
1168 continue;
1170 /* We will end up re-vectoring this branch, so compute flags
1171 based on jumping to the new label. */
1172 flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
1174 if (! must_annul
1175 && ((condition == const_true_rtx
1176 || (! insn_sets_resource_p (trial, other_needed, false)
1177 && ! may_trap_or_fault_p (PATTERN (trial)))))
1178 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1179 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1180 && (must_annul = 1,
1181 check_annul_list_true_false (0, delay_list)
1182 && check_annul_list_true_false (0, new_delay_list)
1183 && eligible_for_annul_false (insn, total_slots_filled,
1184 trial, flags)))
1186 if (must_annul)
1187 used_annul = 1;
1188 rtx_insn *temp = copy_delay_slot_insn (trial);
1189 INSN_FROM_TARGET_P (temp) = 1;
1190 new_delay_list = add_to_delay_list (temp, new_delay_list);
1191 total_slots_filled++;
1193 if (--slots_remaining == 0)
1194 break;
1196 else
1197 return delay_list;
1200 /* Record the effect of the instructions that were redundant and which
1201 we therefore decided not to copy. */
1202 for (i = 1; i < seq->len (); i++)
1203 if (redundant[i])
1204 update_block (seq->insn (i), insn);
1206 /* Show the place to which we will be branching. */
1207 *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0)));
1209 /* Add any new insns to the delay list and update the count of the
1210 number of slots filled. */
1211 *pslots_filled = total_slots_filled;
1212 if (used_annul)
1213 *pannul_p = 1;
1215 if (delay_list == 0)
1216 return new_delay_list;
1218 for (rtx_insn_list *temp = new_delay_list; temp; temp = temp->next ())
1219 delay_list = add_to_delay_list (temp->insn (), delay_list);
1221 return delay_list;
1224 /* Similar to steal_delay_list_from_target except that SEQ is on the
1225 fallthrough path of INSN. Here we only do something if the delay insn
1226 of SEQ is an unconditional branch. In that case we steal its delay slot
1227 for INSN since unconditional branches are much easier to fill. */
1229 static rtx_insn_list *
1230 steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
1231 rtx_sequence *seq,
1232 rtx_insn_list *delay_list,
1233 struct resources *sets,
1234 struct resources *needed,
1235 struct resources *other_needed,
1236 int slots_to_fill, int *pslots_filled,
1237 int *pannul_p)
1239 int i;
1240 int flags;
1241 int must_annul = *pannul_p;
1242 int used_annul = 0;
1244 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1246 /* We can't do anything if SEQ's delay insn isn't an
1247 unconditional branch. */
1249 if (! simplejump_or_return_p (seq->insn (0)))
1250 return delay_list;
1252 for (i = 1; i < seq->len (); i++)
1254 rtx_insn *trial = seq->insn (i);
1256 /* If TRIAL sets CC0, stealing it will move it too far from the use
1257 of CC0. */
1258 if (insn_references_resource_p (trial, sets, false)
1259 || insn_sets_resource_p (trial, needed, false)
1260 || insn_sets_resource_p (trial, sets, false)
1261 #ifdef HAVE_cc0
1262 || sets_cc0_p (PATTERN (trial))
1263 #endif
1266 break;
1268 /* If this insn was already done, we don't need it. */
1269 if (redundant_insn (trial, insn, delay_list))
1271 update_block (trial, insn);
1272 delete_from_delay_slot (trial);
1273 continue;
1276 if (! must_annul
1277 && ((condition == const_true_rtx
1278 || (! insn_sets_resource_p (trial, other_needed, false)
1279 && ! may_trap_or_fault_p (PATTERN (trial)))))
1280 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1281 : (must_annul || delay_list == NULL) && (must_annul = 1,
1282 check_annul_list_true_false (1, delay_list)
1283 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1285 if (must_annul)
1286 used_annul = 1;
1287 delete_from_delay_slot (trial);
1288 delay_list = add_to_delay_list (trial, delay_list);
1290 if (++(*pslots_filled) == slots_to_fill)
1291 break;
1293 else
1294 break;
1297 if (used_annul)
1298 *pannul_p = 1;
1299 return delay_list;
1302 /* Try merging insns starting at THREAD which match exactly the insns in
1303 INSN's delay list.
1305 If all insns were matched and the insn was previously annulling, the
1306 annul bit will be cleared.
1308 For each insn that is merged, if the branch is or will be non-annulling,
1309 we delete the merged insn. */
1311 static void
1312 try_merge_delay_insns (rtx insn, rtx_insn *thread)
1314 rtx_insn *trial, *next_trial;
1315 rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
1316 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1317 int slot_number = 1;
1318 int num_slots = XVECLEN (PATTERN (insn), 0);
1319 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1320 struct resources set, needed;
1321 rtx_insn_list *merged_insns = 0;
1322 int i;
1323 int flags;
1325 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1327 CLEAR_RESOURCE (&needed);
1328 CLEAR_RESOURCE (&set);
1330 /* If this is not an annulling branch, take into account anything needed in
1331 INSN's delay slot. This prevents two increments from being incorrectly
1332 folded into one. If we are annulling, this would be the correct
1333 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1334 will essentially disable this optimization. This method is somewhat of
1335 a kludge, but I don't see a better way.) */
1336 if (! annul_p)
1337 for (i = 1 ; i < num_slots; i++)
1338 if (XVECEXP (PATTERN (insn), 0, i))
1339 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1340 true);
1342 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1344 rtx pat = PATTERN (trial);
1345 rtx oldtrial = trial;
1347 next_trial = next_nonnote_insn (trial);
1349 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1350 if (NONJUMP_INSN_P (trial)
1351 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1352 continue;
1354 if (GET_CODE (next_to_match) == GET_CODE (trial)
1355 #ifdef HAVE_cc0
1356 /* We can't share an insn that sets cc0. */
1357 && ! sets_cc0_p (pat)
1358 #endif
1359 && ! insn_references_resource_p (trial, &set, true)
1360 && ! insn_sets_resource_p (trial, &set, true)
1361 && ! insn_sets_resource_p (trial, &needed, true)
1362 && (trial = try_split (pat, trial, 0)) != 0
1363 /* Update next_trial, in case try_split succeeded. */
1364 && (next_trial = next_nonnote_insn (trial))
1365 /* Likewise THREAD. */
1366 && (thread = oldtrial == thread ? trial : thread)
1367 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1368 /* Have to test this condition if annul condition is different
1369 from (and less restrictive than) non-annulling one. */
1370 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1373 if (! annul_p)
1375 update_block (trial, thread);
1376 if (trial == thread)
1377 thread = next_active_insn (thread);
1379 delete_related_insns (trial);
1380 INSN_FROM_TARGET_P (next_to_match) = 0;
1382 else
1383 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1385 if (++slot_number == num_slots)
1386 break;
1388 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1391 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1392 mark_referenced_resources (trial, &needed, true);
1395 /* See if we stopped on a filled insn. If we did, try to see if its
1396 delay slots match. */
1397 if (slot_number != num_slots
1398 && trial && NONJUMP_INSN_P (trial)
1399 && GET_CODE (PATTERN (trial)) == SEQUENCE
1400 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1401 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1403 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
1404 rtx filled_insn = XVECEXP (pat, 0, 0);
1406 /* Account for resources set/needed by the filled insn. */
1407 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1408 mark_referenced_resources (filled_insn, &needed, true);
1410 for (i = 1; i < pat->len (); i++)
1412 rtx_insn *dtrial = pat->insn (i);
1414 if (! insn_references_resource_p (dtrial, &set, true)
1415 && ! insn_sets_resource_p (dtrial, &set, true)
1416 && ! insn_sets_resource_p (dtrial, &needed, true)
1417 #ifdef HAVE_cc0
1418 && ! sets_cc0_p (PATTERN (dtrial))
1419 #endif
1420 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1421 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1423 if (! annul_p)
1425 rtx_insn *new_rtx;
1427 update_block (dtrial, thread);
1428 new_rtx = delete_from_delay_slot (dtrial);
1429 if (INSN_DELETED_P (thread))
1430 thread = new_rtx;
1431 INSN_FROM_TARGET_P (next_to_match) = 0;
1433 else
1434 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1435 merged_insns);
1437 if (++slot_number == num_slots)
1438 break;
1440 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1442 else
1444 /* Keep track of the set/referenced resources for the delay
1445 slots of any trial insns we encounter. */
1446 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1447 mark_referenced_resources (dtrial, &needed, true);
1452 /* If all insns in the delay slot have been matched and we were previously
1453 annulling the branch, we need not any more. In that case delete all the
1454 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1455 the delay list so that we know that it isn't only being used at the
1456 target. */
1457 if (slot_number == num_slots && annul_p)
1459 for (; merged_insns; merged_insns = merged_insns->next ())
1461 if (GET_MODE (merged_insns) == SImode)
1463 rtx_insn *new_rtx;
1465 update_block (merged_insns->insn (), thread);
1466 new_rtx = delete_from_delay_slot (merged_insns->insn ());
1467 if (INSN_DELETED_P (thread))
1468 thread = new_rtx;
1470 else
1472 update_block (merged_insns->insn (), thread);
1473 delete_related_insns (merged_insns->insn ());
1477 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1479 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1480 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1484 /* See if INSN is redundant with an insn in front of TARGET. Often this
1485 is called when INSN is a candidate for a delay slot of TARGET.
1486 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1487 of INSN. Often INSN will be redundant with an insn in a delay slot of
1488 some previous insn. This happens when we have a series of branches to the
1489 same label; in that case the first insn at the target might want to go
1490 into each of the delay slots.
1492 If we are not careful, this routine can take up a significant fraction
1493 of the total compilation time (4%), but only wins rarely. Hence we
1494 speed this routine up by making two passes. The first pass goes back
1495 until it hits a label and sees if it finds an insn with an identical
1496 pattern. Only in this (relatively rare) event does it check for
1497 data conflicts.
1499 We do not split insns we encounter. This could cause us not to find a
1500 redundant insn, but the cost of splitting seems greater than the possible
1501 gain in rare cases. */
1503 static rtx
1504 redundant_insn (rtx insn, rtx_insn *target, rtx delay_list)
1506 rtx target_main = target;
1507 rtx ipat = PATTERN (insn);
1508 rtx_insn *trial;
1509 rtx pat;
1510 struct resources needed, set;
1511 int i;
1512 unsigned insns_to_search;
1514 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1515 are allowed to not actually assign to such a register. */
1516 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1517 return 0;
1519 /* Scan backwards looking for a match. */
1520 for (trial = PREV_INSN (target),
1521 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1522 trial && insns_to_search > 0;
1523 trial = PREV_INSN (trial))
1525 /* (use (insn))s can come immediately after a barrier if the
1526 label that used to precede them has been deleted as dead.
1527 See delete_related_insns. */
1528 if (LABEL_P (trial) || BARRIER_P (trial))
1529 return 0;
1531 if (!INSN_P (trial))
1532 continue;
1533 --insns_to_search;
1535 pat = PATTERN (trial);
1536 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1537 continue;
1539 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1541 /* Stop for a CALL and its delay slots because it is difficult to
1542 track its resource needs correctly. */
1543 if (CALL_P (seq->element (0)))
1544 return 0;
1546 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1547 slots because it is difficult to track its resource needs
1548 correctly. */
1550 #ifdef INSN_SETS_ARE_DELAYED
1551 if (INSN_SETS_ARE_DELAYED (seq->element (0)))
1552 return 0;
1553 #endif
1555 #ifdef INSN_REFERENCES_ARE_DELAYED
1556 if (INSN_REFERENCES_ARE_DELAYED (seq->element (0)))
1557 return 0;
1558 #endif
1560 /* See if any of the insns in the delay slot match, updating
1561 resource requirements as we go. */
1562 for (i = seq->len () - 1; i > 0; i--)
1563 if (GET_CODE (seq->element (i)) == GET_CODE (insn)
1564 && rtx_equal_p (PATTERN (seq->element (i)), ipat)
1565 && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
1566 break;
1568 /* If found a match, exit this loop early. */
1569 if (i > 0)
1570 break;
1573 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1574 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1575 break;
1578 /* If we didn't find an insn that matches, return 0. */
1579 if (trial == 0)
1580 return 0;
1582 /* See what resources this insn sets and needs. If they overlap, or
1583 if this insn references CC0, it can't be redundant. */
1585 CLEAR_RESOURCE (&needed);
1586 CLEAR_RESOURCE (&set);
1587 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1588 mark_referenced_resources (insn, &needed, true);
1590 /* If TARGET is a SEQUENCE, get the main insn. */
1591 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1592 target_main = XVECEXP (PATTERN (target), 0, 0);
1594 if (resource_conflicts_p (&needed, &set)
1595 #ifdef HAVE_cc0
1596 || reg_mentioned_p (cc0_rtx, ipat)
1597 #endif
1598 /* The insn requiring the delay may not set anything needed or set by
1599 INSN. */
1600 || insn_sets_resource_p (target_main, &needed, true)
1601 || insn_sets_resource_p (target_main, &set, true))
1602 return 0;
1604 /* Insns we pass may not set either NEEDED or SET, so merge them for
1605 simpler tests. */
1606 needed.memory |= set.memory;
1607 IOR_HARD_REG_SET (needed.regs, set.regs);
1609 /* This insn isn't redundant if it conflicts with an insn that either is
1610 or will be in a delay slot of TARGET. */
1612 while (delay_list)
1614 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1615 return 0;
1616 delay_list = XEXP (delay_list, 1);
1619 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1620 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1621 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1622 true))
1623 return 0;
1625 /* Scan backwards until we reach a label or an insn that uses something
1626 INSN sets or sets something insn uses or sets. */
1628 for (trial = PREV_INSN (target),
1629 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1630 trial && !LABEL_P (trial) && insns_to_search > 0;
1631 trial = PREV_INSN (trial))
1633 if (!INSN_P (trial))
1634 continue;
1635 --insns_to_search;
1637 pat = PATTERN (trial);
1638 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1639 continue;
1641 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1643 bool annul_p = false;
1644 rtx control = seq->element (0);
1646 /* If this is a CALL_INSN and its delay slots, it is hard to track
1647 the resource needs properly, so give up. */
1648 if (CALL_P (control))
1649 return 0;
1651 /* If this is an INSN or JUMP_INSN with delayed effects, it
1652 is hard to track the resource needs properly, so give up. */
1654 #ifdef INSN_SETS_ARE_DELAYED
1655 if (INSN_SETS_ARE_DELAYED (control))
1656 return 0;
1657 #endif
1659 #ifdef INSN_REFERENCES_ARE_DELAYED
1660 if (INSN_REFERENCES_ARE_DELAYED (control))
1661 return 0;
1662 #endif
1664 if (JUMP_P (control))
1665 annul_p = INSN_ANNULLED_BRANCH_P (control);
1667 /* See if any of the insns in the delay slot match, updating
1668 resource requirements as we go. */
1669 for (i = seq->len () - 1; i > 0; i--)
1671 rtx candidate = seq->element (i);
1673 /* If an insn will be annulled if the branch is false, it isn't
1674 considered as a possible duplicate insn. */
1675 if (rtx_equal_p (PATTERN (candidate), ipat)
1676 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1678 /* Show that this insn will be used in the sequel. */
1679 INSN_FROM_TARGET_P (candidate) = 0;
1680 return candidate;
1683 /* Unless this is an annulled insn from the target of a branch,
1684 we must stop if it sets anything needed or set by INSN. */
1685 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1686 && insn_sets_resource_p (candidate, &needed, true))
1687 return 0;
1690 /* If the insn requiring the delay slot conflicts with INSN, we
1691 must stop. */
1692 if (insn_sets_resource_p (control, &needed, true))
1693 return 0;
1695 else
1697 /* See if TRIAL is the same as INSN. */
1698 pat = PATTERN (trial);
1699 if (rtx_equal_p (pat, ipat))
1700 return trial;
1702 /* Can't go any further if TRIAL conflicts with INSN. */
1703 if (insn_sets_resource_p (trial, &needed, true))
1704 return 0;
1708 return 0;
1711 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1712 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1713 is nonzero, we are allowed to fall into this thread; otherwise, we are
1714 not.
1716 If LABEL is used more than one or we pass a label other than LABEL before
1717 finding an active insn, we do not own this thread. */
1719 static int
1720 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1722 rtx_insn *active_insn;
1723 rtx_insn *insn;
1725 /* We don't own the function end. */
1726 if (thread == 0 || ANY_RETURN_P (thread))
1727 return 0;
1729 /* We have a non-NULL insn. */
1730 rtx_insn *thread_insn = as_a <rtx_insn *> (thread);
1732 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1733 active_insn = next_active_insn (PREV_INSN (thread_insn));
1735 for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn))
1736 if (LABEL_P (insn)
1737 && (insn != label || LABEL_NUSES (insn) != 1))
1738 return 0;
1740 if (allow_fallthrough)
1741 return 1;
1743 /* Ensure that we reach a BARRIER before any insn or label. */
1744 for (insn = prev_nonnote_insn (thread_insn);
1745 insn == 0 || !BARRIER_P (insn);
1746 insn = prev_nonnote_insn (insn))
1747 if (insn == 0
1748 || LABEL_P (insn)
1749 || (NONJUMP_INSN_P (insn)
1750 && GET_CODE (PATTERN (insn)) != USE
1751 && GET_CODE (PATTERN (insn)) != CLOBBER))
1752 return 0;
1754 return 1;
1757 /* Called when INSN is being moved from a location near the target of a jump.
1758 We leave a marker of the form (use (INSN)) immediately in front
1759 of WHERE for mark_target_live_regs. These markers will be deleted when
1760 reorg finishes.
1762 We used to try to update the live status of registers if WHERE is at
1763 the start of a basic block, but that can't work since we may remove a
1764 BARRIER in relax_delay_slots. */
1766 static void
1767 update_block (rtx_insn *insn, rtx where)
1769 /* Ignore if this was in a delay slot and it came from the target of
1770 a branch. */
1771 if (INSN_FROM_TARGET_P (insn))
1772 return;
1774 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1776 /* INSN might be making a value live in a block where it didn't use to
1777 be. So recompute liveness information for this block. */
1779 incr_ticks_for_insn (insn);
1782 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1783 the basic block containing the jump. */
1785 static int
1786 reorg_redirect_jump (rtx_insn *jump, rtx nlabel)
1788 incr_ticks_for_insn (jump);
1789 return redirect_jump (jump, nlabel, 1);
1792 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1793 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1794 that reference values used in INSN. If we find one, then we move the
1795 REG_DEAD note to INSN.
1797 This is needed to handle the case where a later insn (after INSN) has a
1798 REG_DEAD note for a register used by INSN, and this later insn subsequently
1799 gets moved before a CODE_LABEL because it is a redundant insn. In this
1800 case, mark_target_live_regs may be confused into thinking the register
1801 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1803 static void
1804 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1806 rtx p, link, next;
1808 for (p = next_nonnote_insn (insn); p != delayed_insn;
1809 p = next_nonnote_insn (p))
1810 for (link = REG_NOTES (p); link; link = next)
1812 next = XEXP (link, 1);
1814 if (REG_NOTE_KIND (link) != REG_DEAD
1815 || !REG_P (XEXP (link, 0)))
1816 continue;
1818 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1820 /* Move the REG_DEAD note from P to INSN. */
1821 remove_note (p, link);
1822 XEXP (link, 1) = REG_NOTES (insn);
1823 REG_NOTES (insn) = link;
1828 /* Called when an insn redundant with start_insn is deleted. If there
1829 is a REG_DEAD note for the target of start_insn between start_insn
1830 and stop_insn, then the REG_DEAD note needs to be deleted since the
1831 value no longer dies there.
1833 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1834 confused into thinking the register is dead. */
1836 static void
1837 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1839 rtx p, link, next;
1841 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1842 p = next_nonnote_insn (p))
1843 for (link = REG_NOTES (p); link; link = next)
1845 next = XEXP (link, 1);
1847 if (REG_NOTE_KIND (link) != REG_DEAD
1848 || !REG_P (XEXP (link, 0)))
1849 continue;
1851 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1853 remove_note (p, link);
1854 return;
1859 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1861 This handles the case of udivmodXi4 instructions which optimize their
1862 output depending on whether any REG_UNUSED notes are present.
1863 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1864 does. */
1866 static void
1867 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1869 rtx link, next;
1871 for (link = REG_NOTES (insn); link; link = next)
1873 next = XEXP (link, 1);
1875 if (REG_NOTE_KIND (link) != REG_UNUSED
1876 || !REG_P (XEXP (link, 0)))
1877 continue;
1879 if (! find_regno_note (redundant_insn, REG_UNUSED,
1880 REGNO (XEXP (link, 0))))
1881 remove_note (insn, link);
1885 static vec <rtx> sibling_labels;
1887 /* Return the label before INSN, or put a new label there. If SIBLING is
1888 non-zero, it is another label associated with the new label (if any),
1889 typically the former target of the jump that will be redirected to
1890 the new label. */
1892 static rtx_insn *
1893 get_label_before (rtx_insn *insn, rtx sibling)
1895 rtx_insn *label;
1897 /* Find an existing label at this point
1898 or make a new one if there is none. */
1899 label = prev_nonnote_insn (insn);
1901 if (label == 0 || !LABEL_P (label))
1903 rtx_insn *prev = PREV_INSN (insn);
1905 label = gen_label_rtx ();
1906 emit_label_after (label, prev);
1907 LABEL_NUSES (label) = 0;
1908 if (sibling)
1910 sibling_labels.safe_push (label);
1911 sibling_labels.safe_push (sibling);
1914 return label;
1917 /* Scan a function looking for insns that need a delay slot and find insns to
1918 put into the delay slot.
1920 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1921 as calls). We do these first since we don't want jump insns (that are
1922 easier to fill) to get the only insns that could be used for non-jump insns.
1923 When it is zero, only try to fill JUMP_INSNs.
1925 When slots are filled in this manner, the insns (including the
1926 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1927 it is possible to tell whether a delay slot has really been filled
1928 or not. `final' knows how to deal with this, by communicating
1929 through FINAL_SEQUENCE. */
1931 static void
1932 fill_simple_delay_slots (int non_jumps_p)
1934 rtx_insn *insn, *trial, *next_trial;
1935 rtx pat;
1936 int i;
1937 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1938 struct resources needed, set;
1939 int slots_to_fill, slots_filled;
1940 rtx_insn_list *delay_list;
1942 for (i = 0; i < num_unfilled_slots; i++)
1944 int flags;
1945 /* Get the next insn to fill. If it has already had any slots assigned,
1946 we can't do anything with it. Maybe we'll improve this later. */
1948 insn = unfilled_slots_base[i];
1949 if (insn == 0
1950 || INSN_DELETED_P (insn)
1951 || (NONJUMP_INSN_P (insn)
1952 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1953 || (JUMP_P (insn) && non_jumps_p)
1954 || (!JUMP_P (insn) && ! non_jumps_p))
1955 continue;
1957 /* It may have been that this insn used to need delay slots, but
1958 now doesn't; ignore in that case. This can happen, for example,
1959 on the HP PA RISC, where the number of delay slots depends on
1960 what insns are nearby. */
1961 slots_to_fill = num_delay_slots (insn);
1963 /* Some machine description have defined instructions to have
1964 delay slots only in certain circumstances which may depend on
1965 nearby insns (which change due to reorg's actions).
1967 For example, the PA port normally has delay slots for unconditional
1968 jumps.
1970 However, the PA port claims such jumps do not have a delay slot
1971 if they are immediate successors of certain CALL_INSNs. This
1972 allows the port to favor filling the delay slot of the call with
1973 the unconditional jump. */
1974 if (slots_to_fill == 0)
1975 continue;
1977 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1978 says how many. After initialization, first try optimizing
1980 call _foo call _foo
1981 nop add %o7,.-L1,%o7
1982 b,a L1
1985 If this case applies, the delay slot of the call is filled with
1986 the unconditional jump. This is done first to avoid having the
1987 delay slot of the call filled in the backward scan. Also, since
1988 the unconditional jump is likely to also have a delay slot, that
1989 insn must exist when it is subsequently scanned.
1991 This is tried on each insn with delay slots as some machines
1992 have insns which perform calls, but are not represented as
1993 CALL_INSNs. */
1995 slots_filled = 0;
1996 delay_list = 0;
1998 if (JUMP_P (insn))
1999 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2000 else
2001 flags = get_jump_flags (insn, NULL_RTX);
2003 if ((trial = next_active_insn (insn))
2004 && JUMP_P (trial)
2005 && simplejump_p (trial)
2006 && eligible_for_delay (insn, slots_filled, trial, flags)
2007 && no_labels_between_p (insn, trial)
2008 && ! can_throw_internal (trial))
2010 rtx_insn **tmp;
2011 slots_filled++;
2012 delay_list = add_to_delay_list (trial, delay_list);
2014 /* TRIAL may have had its delay slot filled, then unfilled. When
2015 the delay slot is unfilled, TRIAL is placed back on the unfilled
2016 slots obstack. Unfortunately, it is placed on the end of the
2017 obstack, not in its original location. Therefore, we must search
2018 from entry i + 1 to the end of the unfilled slots obstack to
2019 try and find TRIAL. */
2020 tmp = &unfilled_slots_base[i + 1];
2021 while (*tmp != trial && tmp != unfilled_slots_next)
2022 tmp++;
2024 /* Remove the unconditional jump from consideration for delay slot
2025 filling and unthread it. */
2026 if (*tmp == trial)
2027 *tmp = 0;
2029 rtx_insn *next = NEXT_INSN (trial);
2030 rtx_insn *prev = PREV_INSN (trial);
2031 if (prev)
2032 SET_NEXT_INSN (prev) = next;
2033 if (next)
2034 SET_PREV_INSN (next) = prev;
2038 /* Now, scan backwards from the insn to search for a potential
2039 delay-slot candidate. Stop searching when a label or jump is hit.
2041 For each candidate, if it is to go into the delay slot (moved
2042 forward in execution sequence), it must not need or set any resources
2043 that were set by later insns and must not set any resources that
2044 are needed for those insns.
2046 The delay slot insn itself sets resources unless it is a call
2047 (in which case the called routine, not the insn itself, is doing
2048 the setting). */
2050 if (slots_filled < slots_to_fill)
2052 CLEAR_RESOURCE (&needed);
2053 CLEAR_RESOURCE (&set);
2054 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2055 mark_referenced_resources (insn, &needed, false);
2057 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2058 trial = next_trial)
2060 next_trial = prev_nonnote_insn (trial);
2062 /* This must be an INSN or CALL_INSN. */
2063 pat = PATTERN (trial);
2065 /* Stand-alone USE and CLOBBER are just for flow. */
2066 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2067 continue;
2069 /* Check for resource conflict first, to avoid unnecessary
2070 splitting. */
2071 if (! insn_references_resource_p (trial, &set, true)
2072 && ! insn_sets_resource_p (trial, &set, true)
2073 && ! insn_sets_resource_p (trial, &needed, true)
2074 #ifdef HAVE_cc0
2075 /* Can't separate set of cc0 from its use. */
2076 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2077 #endif
2078 && ! can_throw_internal (trial))
2080 trial = try_split (pat, trial, 1);
2081 next_trial = prev_nonnote_insn (trial);
2082 if (eligible_for_delay (insn, slots_filled, trial, flags))
2084 /* In this case, we are searching backward, so if we
2085 find insns to put on the delay list, we want
2086 to put them at the head, rather than the
2087 tail, of the list. */
2089 update_reg_dead_notes (trial, insn);
2090 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2091 trial, delay_list);
2092 update_block (trial, trial);
2093 delete_related_insns (trial);
2094 if (slots_to_fill == ++slots_filled)
2095 break;
2096 continue;
2100 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2101 mark_referenced_resources (trial, &needed, true);
2105 /* If all needed slots haven't been filled, we come here. */
2107 /* Try to optimize case of jumping around a single insn. */
2108 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2109 if (slots_filled != slots_to_fill
2110 && delay_list == 0
2111 && JUMP_P (insn)
2112 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2113 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2115 delay_list = optimize_skip (insn);
2116 if (delay_list)
2117 slots_filled += 1;
2119 #endif
2121 /* Try to get insns from beyond the insn needing the delay slot.
2122 These insns can neither set or reference resources set in insns being
2123 skipped, cannot set resources in the insn being skipped, and, if this
2124 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2125 call might not return).
2127 There used to be code which continued past the target label if
2128 we saw all uses of the target label. This code did not work,
2129 because it failed to account for some instructions which were
2130 both annulled and marked as from the target. This can happen as a
2131 result of optimize_skip. Since this code was redundant with
2132 fill_eager_delay_slots anyways, it was just deleted. */
2134 if (slots_filled != slots_to_fill
2135 /* If this instruction could throw an exception which is
2136 caught in the same function, then it's not safe to fill
2137 the delay slot with an instruction from beyond this
2138 point. For example, consider:
2140 int i = 2;
2142 try {
2143 f();
2144 i = 3;
2145 } catch (...) {}
2147 return i;
2149 Even though `i' is a local variable, we must be sure not
2150 to put `i = 3' in the delay slot if `f' might throw an
2151 exception.
2153 Presumably, we should also check to see if we could get
2154 back to this function via `setjmp'. */
2155 && ! can_throw_internal (insn)
2156 && !JUMP_P (insn))
2158 int maybe_never = 0;
2159 rtx pat, trial_delay;
2161 CLEAR_RESOURCE (&needed);
2162 CLEAR_RESOURCE (&set);
2163 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2164 mark_referenced_resources (insn, &needed, true);
2166 if (CALL_P (insn))
2167 maybe_never = 1;
2169 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2170 trial = next_trial)
2172 next_trial = next_nonnote_insn (trial);
2174 /* This must be an INSN or CALL_INSN. */
2175 pat = PATTERN (trial);
2177 /* Stand-alone USE and CLOBBER are just for flow. */
2178 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2179 continue;
2181 /* If this already has filled delay slots, get the insn needing
2182 the delay slots. */
2183 if (GET_CODE (pat) == SEQUENCE)
2184 trial_delay = XVECEXP (pat, 0, 0);
2185 else
2186 trial_delay = trial;
2188 /* Stop our search when seeing a jump. */
2189 if (JUMP_P (trial_delay))
2190 break;
2192 /* See if we have a resource problem before we try to split. */
2193 if (GET_CODE (pat) != SEQUENCE
2194 && ! insn_references_resource_p (trial, &set, true)
2195 && ! insn_sets_resource_p (trial, &set, true)
2196 && ! insn_sets_resource_p (trial, &needed, true)
2197 #ifdef HAVE_cc0
2198 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2199 #endif
2200 && ! (maybe_never && may_trap_or_fault_p (pat))
2201 && (trial = try_split (pat, trial, 0))
2202 && eligible_for_delay (insn, slots_filled, trial, flags)
2203 && ! can_throw_internal (trial))
2205 next_trial = next_nonnote_insn (trial);
2206 delay_list = add_to_delay_list (trial, delay_list);
2207 #ifdef HAVE_cc0
2208 if (reg_mentioned_p (cc0_rtx, pat))
2209 link_cc0_insns (trial);
2210 #endif
2211 delete_related_insns (trial);
2212 if (slots_to_fill == ++slots_filled)
2213 break;
2214 continue;
2217 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2218 mark_referenced_resources (trial, &needed, true);
2220 /* Ensure we don't put insns between the setting of cc and the
2221 comparison by moving a setting of cc into an earlier delay
2222 slot since these insns could clobber the condition code. */
2223 set.cc = 1;
2225 /* If this is a call, we might not get here. */
2226 if (CALL_P (trial_delay))
2227 maybe_never = 1;
2230 /* If there are slots left to fill and our search was stopped by an
2231 unconditional branch, try the insn at the branch target. We can
2232 redirect the branch if it works.
2234 Don't do this if the insn at the branch target is a branch. */
2235 if (slots_to_fill != slots_filled
2236 && trial
2237 && jump_to_label_p (trial)
2238 && simplejump_p (trial)
2239 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2240 && ! (NONJUMP_INSN_P (next_trial)
2241 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2242 && !JUMP_P (next_trial)
2243 && ! insn_references_resource_p (next_trial, &set, true)
2244 && ! insn_sets_resource_p (next_trial, &set, true)
2245 && ! insn_sets_resource_p (next_trial, &needed, true)
2246 #ifdef HAVE_cc0
2247 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2248 #endif
2249 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2250 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2251 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2252 && ! can_throw_internal (trial))
2254 /* See comment in relax_delay_slots about necessity of using
2255 next_real_insn here. */
2256 rtx_insn *new_label = next_real_insn (next_trial);
2258 if (new_label != 0)
2259 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2260 else
2261 new_label = find_end_label (simple_return_rtx);
2263 if (new_label)
2265 delay_list
2266 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2267 delay_list);
2268 slots_filled++;
2269 reorg_redirect_jump (trial, new_label);
2274 /* If this is an unconditional jump, then try to get insns from the
2275 target of the jump. */
2276 if (JUMP_P (insn)
2277 && simplejump_p (insn)
2278 && slots_filled != slots_to_fill)
2279 delay_list
2280 = fill_slots_from_thread (insn, const_true_rtx,
2281 next_active_insn (JUMP_LABEL (insn)),
2282 NULL, 1, 1,
2283 own_thread_p (JUMP_LABEL (insn),
2284 JUMP_LABEL (insn), 0),
2285 slots_to_fill, &slots_filled,
2286 delay_list);
2288 if (delay_list)
2289 unfilled_slots_base[i]
2290 = emit_delay_sequence (insn, delay_list, slots_filled);
2292 if (slots_to_fill == slots_filled)
2293 unfilled_slots_base[i] = 0;
2295 note_delay_statistics (slots_filled, 0);
2299 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2300 return the ultimate label reached by any such chain of jumps.
2301 Return a suitable return rtx if the chain ultimately leads to a
2302 return instruction.
2303 If LABEL is not followed by a jump, return LABEL.
2304 If the chain loops or we can't find end, return LABEL,
2305 since that tells caller to avoid changing the insn.
2306 If the returned label is obtained by following a crossing jump,
2307 set *CROSSING to true, otherwise set it to false. */
2309 static rtx
2310 follow_jumps (rtx label, rtx jump, bool *crossing)
2312 rtx_insn *insn;
2313 rtx_insn *next;
2314 int depth;
2316 *crossing = false;
2317 if (ANY_RETURN_P (label))
2318 return label;
2320 rtx_insn *value = as_a <rtx_insn *> (label);
2322 for (depth = 0;
2323 (depth < 10
2324 && (insn = next_active_insn (value)) != 0
2325 && JUMP_P (insn)
2326 && JUMP_LABEL (insn) != NULL_RTX
2327 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2328 || ANY_RETURN_P (PATTERN (insn)))
2329 && (next = NEXT_INSN (insn))
2330 && BARRIER_P (next));
2331 depth++)
2333 rtx this_label_or_return = JUMP_LABEL (insn);
2335 /* If we have found a cycle, make the insn jump to itself. */
2336 if (this_label_or_return == label)
2337 return label;
2339 /* Cannot follow returns and cannot look through tablejumps. */
2340 if (ANY_RETURN_P (this_label_or_return))
2341 return this_label_or_return;
2343 rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return);
2344 if (NEXT_INSN (this_label)
2345 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2346 break;
2348 if (!targetm.can_follow_jump (jump, insn))
2349 break;
2350 if (!*crossing)
2351 *crossing = CROSSING_JUMP_P (jump);
2352 value = this_label;
2354 if (depth == 10)
2355 return label;
2356 return value;
2359 /* Try to find insns to place in delay slots.
2361 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2362 or is an unconditional branch if CONDITION is const_true_rtx.
2363 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2365 THREAD is a flow-of-control, either the insns to be executed if the
2366 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2368 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2369 to see if any potential delay slot insns set things needed there.
2371 LIKELY is nonzero if it is extremely likely that the branch will be
2372 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2373 end of a loop back up to the top.
2375 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2376 thread. I.e., it is the fallthrough code of our jump or the target of the
2377 jump when we are the only jump going there.
2379 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2380 case, we can only take insns from the head of the thread for our delay
2381 slot. We then adjust the jump to point after the insns we have taken. */
2383 static rtx_insn_list *
2384 fill_slots_from_thread (rtx_insn *insn, rtx condition, rtx thread_or_return,
2385 rtx opposite_thread, int likely,
2386 int thread_if_true,
2387 int own_thread, int slots_to_fill,
2388 int *pslots_filled, rtx_insn_list *delay_list)
2390 rtx new_thread;
2391 struct resources opposite_needed, set, needed;
2392 rtx_insn *trial;
2393 int lose = 0;
2394 int must_annul = 0;
2395 int flags;
2397 /* Validate our arguments. */
2398 gcc_assert (condition != const_true_rtx || thread_if_true);
2399 gcc_assert (own_thread || thread_if_true);
2401 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2403 /* If our thread is the end of subroutine, we can't get any delay
2404 insns from that. */
2405 if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return))
2406 return delay_list;
2408 rtx_insn *thread = as_a <rtx_insn *> (thread_or_return);
2410 /* If this is an unconditional branch, nothing is needed at the
2411 opposite thread. Otherwise, compute what is needed there. */
2412 if (condition == const_true_rtx)
2413 CLEAR_RESOURCE (&opposite_needed);
2414 else
2415 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2417 /* If the insn at THREAD can be split, do it here to avoid having to
2418 update THREAD and NEW_THREAD if it is done in the loop below. Also
2419 initialize NEW_THREAD. */
2421 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2423 /* Scan insns at THREAD. We are looking for an insn that can be removed
2424 from THREAD (it neither sets nor references resources that were set
2425 ahead of it and it doesn't set anything needs by the insns ahead of
2426 it) and that either can be placed in an annulling insn or aren't
2427 needed at OPPOSITE_THREAD. */
2429 CLEAR_RESOURCE (&needed);
2430 CLEAR_RESOURCE (&set);
2432 /* If we do not own this thread, we must stop as soon as we find
2433 something that we can't put in a delay slot, since all we can do
2434 is branch into THREAD at a later point. Therefore, labels stop
2435 the search if this is not the `true' thread. */
2437 for (trial = thread;
2438 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2439 trial = next_nonnote_insn (trial))
2441 rtx pat, old_trial;
2443 /* If we have passed a label, we no longer own this thread. */
2444 if (LABEL_P (trial))
2446 own_thread = 0;
2447 continue;
2450 pat = PATTERN (trial);
2451 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2452 continue;
2454 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2455 don't separate or copy insns that set and use CC0. */
2456 if (! insn_references_resource_p (trial, &set, true)
2457 && ! insn_sets_resource_p (trial, &set, true)
2458 && ! insn_sets_resource_p (trial, &needed, true)
2459 #ifdef HAVE_cc0
2460 && ! (reg_mentioned_p (cc0_rtx, pat)
2461 && (! own_thread || ! sets_cc0_p (pat)))
2462 #endif
2463 && ! can_throw_internal (trial))
2465 rtx prior_insn;
2467 /* If TRIAL is redundant with some insn before INSN, we don't
2468 actually need to add it to the delay list; we can merely pretend
2469 we did. */
2470 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2472 fix_reg_dead_note (prior_insn, insn);
2473 if (own_thread)
2475 update_block (trial, thread);
2476 if (trial == thread)
2478 thread = next_active_insn (thread);
2479 if (new_thread == trial)
2480 new_thread = thread;
2483 delete_related_insns (trial);
2485 else
2487 update_reg_unused_notes (prior_insn, trial);
2488 new_thread = next_active_insn (trial);
2491 continue;
2494 /* There are two ways we can win: If TRIAL doesn't set anything
2495 needed at the opposite thread and can't trap, or if it can
2496 go into an annulled delay slot. */
2497 if (!must_annul
2498 && (condition == const_true_rtx
2499 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2500 && ! may_trap_or_fault_p (pat)
2501 && ! RTX_FRAME_RELATED_P (trial))))
2503 old_trial = trial;
2504 trial = try_split (pat, trial, 0);
2505 if (new_thread == old_trial)
2506 new_thread = trial;
2507 if (thread == old_trial)
2508 thread = trial;
2509 pat = PATTERN (trial);
2510 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2511 goto winner;
2513 else if (0
2514 #ifdef ANNUL_IFTRUE_SLOTS
2515 || ! thread_if_true
2516 #endif
2517 #ifdef ANNUL_IFFALSE_SLOTS
2518 || thread_if_true
2519 #endif
2522 old_trial = trial;
2523 trial = try_split (pat, trial, 0);
2524 if (new_thread == old_trial)
2525 new_thread = trial;
2526 if (thread == old_trial)
2527 thread = trial;
2528 pat = PATTERN (trial);
2529 if ((must_annul || delay_list == NULL) && (thread_if_true
2530 ? check_annul_list_true_false (0, delay_list)
2531 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2532 : check_annul_list_true_false (1, delay_list)
2533 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2535 rtx_insn *temp;
2537 must_annul = 1;
2538 winner:
2540 #ifdef HAVE_cc0
2541 if (reg_mentioned_p (cc0_rtx, pat))
2542 link_cc0_insns (trial);
2543 #endif
2545 /* If we own this thread, delete the insn. If this is the
2546 destination of a branch, show that a basic block status
2547 may have been updated. In any case, mark the new
2548 starting point of this thread. */
2549 if (own_thread)
2551 rtx note;
2553 update_block (trial, thread);
2554 if (trial == thread)
2556 thread = next_active_insn (thread);
2557 if (new_thread == trial)
2558 new_thread = thread;
2561 /* We are moving this insn, not deleting it. We must
2562 temporarily increment the use count on any referenced
2563 label lest it be deleted by delete_related_insns. */
2564 for (note = REG_NOTES (trial);
2565 note != NULL_RTX;
2566 note = XEXP (note, 1))
2567 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2568 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2570 /* REG_LABEL_OPERAND could be
2571 NOTE_INSN_DELETED_LABEL too. */
2572 if (LABEL_P (XEXP (note, 0)))
2573 LABEL_NUSES (XEXP (note, 0))++;
2574 else
2575 gcc_assert (REG_NOTE_KIND (note)
2576 == REG_LABEL_OPERAND);
2578 if (jump_to_label_p (trial))
2579 LABEL_NUSES (JUMP_LABEL (trial))++;
2581 delete_related_insns (trial);
2583 for (note = REG_NOTES (trial);
2584 note != NULL_RTX;
2585 note = XEXP (note, 1))
2586 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2587 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2589 /* REG_LABEL_OPERAND could be
2590 NOTE_INSN_DELETED_LABEL too. */
2591 if (LABEL_P (XEXP (note, 0)))
2592 LABEL_NUSES (XEXP (note, 0))--;
2593 else
2594 gcc_assert (REG_NOTE_KIND (note)
2595 == REG_LABEL_OPERAND);
2597 if (jump_to_label_p (trial))
2598 LABEL_NUSES (JUMP_LABEL (trial))--;
2600 else
2601 new_thread = next_active_insn (trial);
2603 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2604 if (thread_if_true)
2605 INSN_FROM_TARGET_P (temp) = 1;
2607 delay_list = add_to_delay_list (temp, delay_list);
2609 if (slots_to_fill == ++(*pslots_filled))
2611 /* Even though we have filled all the slots, we
2612 may be branching to a location that has a
2613 redundant insn. Skip any if so. */
2614 while (new_thread && ! own_thread
2615 && ! insn_sets_resource_p (new_thread, &set, true)
2616 && ! insn_sets_resource_p (new_thread, &needed,
2617 true)
2618 && ! insn_references_resource_p (new_thread,
2619 &set, true)
2620 && (prior_insn
2621 = redundant_insn (new_thread, insn,
2622 delay_list)))
2624 /* We know we do not own the thread, so no need
2625 to call update_block and delete_insn. */
2626 fix_reg_dead_note (prior_insn, insn);
2627 update_reg_unused_notes (prior_insn, new_thread);
2628 new_thread = next_active_insn (new_thread);
2630 break;
2633 continue;
2638 /* This insn can't go into a delay slot. */
2639 lose = 1;
2640 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2641 mark_referenced_resources (trial, &needed, true);
2643 /* Ensure we don't put insns between the setting of cc and the comparison
2644 by moving a setting of cc into an earlier delay slot since these insns
2645 could clobber the condition code. */
2646 set.cc = 1;
2648 /* If this insn is a register-register copy and the next insn has
2649 a use of our destination, change it to use our source. That way,
2650 it will become a candidate for our delay slot the next time
2651 through this loop. This case occurs commonly in loops that
2652 scan a list.
2654 We could check for more complex cases than those tested below,
2655 but it doesn't seem worth it. It might also be a good idea to try
2656 to swap the two insns. That might do better.
2658 We can't do this if the next insn modifies our destination, because
2659 that would make the replacement into the insn invalid. We also can't
2660 do this if it modifies our source, because it might be an earlyclobber
2661 operand. This latter test also prevents updating the contents of
2662 a PRE_INC. We also can't do this if there's overlap of source and
2663 destination. Overlap may happen for larger-than-register-size modes. */
2665 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2666 && REG_P (SET_SRC (pat))
2667 && REG_P (SET_DEST (pat))
2668 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2670 rtx next = next_nonnote_insn (trial);
2672 if (next && NONJUMP_INSN_P (next)
2673 && GET_CODE (PATTERN (next)) != USE
2674 && ! reg_set_p (SET_DEST (pat), next)
2675 && ! reg_set_p (SET_SRC (pat), next)
2676 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2677 && ! modified_in_p (SET_DEST (pat), next))
2678 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2682 /* If we stopped on a branch insn that has delay slots, see if we can
2683 steal some of the insns in those slots. */
2684 if (trial && NONJUMP_INSN_P (trial)
2685 && GET_CODE (PATTERN (trial)) == SEQUENCE
2686 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2688 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
2689 /* If this is the `true' thread, we will want to follow the jump,
2690 so we can only do this if we have taken everything up to here. */
2691 if (thread_if_true && trial == new_thread)
2693 delay_list
2694 = steal_delay_list_from_target (insn, condition, sequence,
2695 delay_list, &set, &needed,
2696 &opposite_needed, slots_to_fill,
2697 pslots_filled, &must_annul,
2698 &new_thread);
2699 /* If we owned the thread and are told that it branched
2700 elsewhere, make sure we own the thread at the new location. */
2701 if (own_thread && trial != new_thread)
2702 own_thread = own_thread_p (new_thread, new_thread, 0);
2704 else if (! thread_if_true)
2705 delay_list
2706 = steal_delay_list_from_fallthrough (insn, condition,
2707 sequence,
2708 delay_list, &set, &needed,
2709 &opposite_needed, slots_to_fill,
2710 pslots_filled, &must_annul);
2713 /* If we haven't found anything for this delay slot and it is very
2714 likely that the branch will be taken, see if the insn at our target
2715 increments or decrements a register with an increment that does not
2716 depend on the destination register. If so, try to place the opposite
2717 arithmetic insn after the jump insn and put the arithmetic insn in the
2718 delay slot. If we can't do this, return. */
2719 if (delay_list == 0 && likely
2720 && new_thread && !ANY_RETURN_P (new_thread)
2721 && NONJUMP_INSN_P (new_thread)
2722 && !RTX_FRAME_RELATED_P (new_thread)
2723 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2724 && asm_noperands (PATTERN (new_thread)) < 0)
2726 rtx pat = PATTERN (new_thread);
2727 rtx dest;
2728 rtx src;
2730 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2731 above. */
2732 trial = as_a <rtx_insn *> (new_thread);
2733 pat = PATTERN (trial);
2735 if (!NONJUMP_INSN_P (trial)
2736 || GET_CODE (pat) != SET
2737 || ! eligible_for_delay (insn, 0, trial, flags)
2738 || can_throw_internal (trial))
2739 return 0;
2741 dest = SET_DEST (pat), src = SET_SRC (pat);
2742 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2743 && rtx_equal_p (XEXP (src, 0), dest)
2744 && (!FLOAT_MODE_P (GET_MODE (src))
2745 || flag_unsafe_math_optimizations)
2746 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2747 && ! side_effects_p (pat))
2749 rtx other = XEXP (src, 1);
2750 rtx new_arith;
2751 rtx_insn *ninsn;
2753 /* If this is a constant adjustment, use the same code with
2754 the negated constant. Otherwise, reverse the sense of the
2755 arithmetic. */
2756 if (CONST_INT_P (other))
2757 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2758 negate_rtx (GET_MODE (src), other));
2759 else
2760 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2761 GET_MODE (src), dest, other);
2763 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2764 insn);
2766 if (recog_memoized (ninsn) < 0
2767 || (extract_insn (ninsn), ! constrain_operands (1)))
2769 delete_related_insns (ninsn);
2770 return 0;
2773 if (own_thread)
2775 update_block (trial, thread);
2776 if (trial == thread)
2778 thread = next_active_insn (thread);
2779 if (new_thread == trial)
2780 new_thread = thread;
2782 delete_related_insns (trial);
2784 else
2785 new_thread = next_active_insn (trial);
2787 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2788 if (thread_if_true)
2789 INSN_FROM_TARGET_P (ninsn) = 1;
2791 delay_list = add_to_delay_list (ninsn, NULL);
2792 (*pslots_filled)++;
2796 if (delay_list && must_annul)
2797 INSN_ANNULLED_BRANCH_P (insn) = 1;
2799 /* If we are to branch into the middle of this thread, find an appropriate
2800 label or make a new one if none, and redirect INSN to it. If we hit the
2801 end of the function, use the end-of-function label. */
2802 if (new_thread != thread)
2804 rtx label;
2805 bool crossing = false;
2807 gcc_assert (thread_if_true);
2809 if (new_thread && simplejump_or_return_p (new_thread)
2810 && redirect_with_delay_list_safe_p (insn,
2811 JUMP_LABEL (new_thread),
2812 delay_list))
2813 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn,
2814 &crossing);
2816 if (ANY_RETURN_P (new_thread))
2817 label = find_end_label (new_thread);
2818 else if (LABEL_P (new_thread))
2819 label = new_thread;
2820 else
2821 label = get_label_before (as_a <rtx_insn *> (new_thread),
2822 JUMP_LABEL (insn));
2824 if (label)
2826 reorg_redirect_jump (insn, label);
2827 if (crossing)
2828 CROSSING_JUMP_P (insn) = 1;
2832 return delay_list;
2835 /* Make another attempt to find insns to place in delay slots.
2837 We previously looked for insns located in front of the delay insn
2838 and, for non-jump delay insns, located behind the delay insn.
2840 Here only try to schedule jump insns and try to move insns from either
2841 the target or the following insns into the delay slot. If annulling is
2842 supported, we will be likely to do this. Otherwise, we can do this only
2843 if safe. */
2845 static void
2846 fill_eager_delay_slots (void)
2848 rtx_insn *insn;
2849 int i;
2850 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2852 for (i = 0; i < num_unfilled_slots; i++)
2854 rtx condition;
2855 rtx target_label, insn_at_target;
2856 rtx_insn *fallthrough_insn;
2857 rtx_insn_list *delay_list = 0;
2858 int own_target;
2859 int own_fallthrough;
2860 int prediction, slots_to_fill, slots_filled;
2862 insn = unfilled_slots_base[i];
2863 if (insn == 0
2864 || INSN_DELETED_P (insn)
2865 || !JUMP_P (insn)
2866 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2867 continue;
2869 slots_to_fill = num_delay_slots (insn);
2870 /* Some machine description have defined instructions to have
2871 delay slots only in certain circumstances which may depend on
2872 nearby insns (which change due to reorg's actions).
2874 For example, the PA port normally has delay slots for unconditional
2875 jumps.
2877 However, the PA port claims such jumps do not have a delay slot
2878 if they are immediate successors of certain CALL_INSNs. This
2879 allows the port to favor filling the delay slot of the call with
2880 the unconditional jump. */
2881 if (slots_to_fill == 0)
2882 continue;
2884 slots_filled = 0;
2885 target_label = JUMP_LABEL (insn);
2886 condition = get_branch_condition (insn, target_label);
2888 if (condition == 0)
2889 continue;
2891 /* Get the next active fallthrough and target insns and see if we own
2892 them. Then see whether the branch is likely true. We don't need
2893 to do a lot of this for unconditional branches. */
2895 insn_at_target = first_active_target_insn (target_label);
2896 own_target = own_thread_p (target_label, target_label, 0);
2898 if (condition == const_true_rtx)
2900 own_fallthrough = 0;
2901 fallthrough_insn = 0;
2902 prediction = 2;
2904 else
2906 fallthrough_insn = next_active_insn (insn);
2907 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2908 prediction = mostly_true_jump (insn);
2911 /* If this insn is expected to branch, first try to get insns from our
2912 target, then our fallthrough insns. If it is not expected to branch,
2913 try the other order. */
2915 if (prediction > 0)
2917 delay_list
2918 = fill_slots_from_thread (insn, condition, insn_at_target,
2919 fallthrough_insn, prediction == 2, 1,
2920 own_target,
2921 slots_to_fill, &slots_filled, delay_list);
2923 if (delay_list == 0 && own_fallthrough)
2925 /* Even though we didn't find anything for delay slots,
2926 we might have found a redundant insn which we deleted
2927 from the thread that was filled. So we have to recompute
2928 the next insn at the target. */
2929 target_label = JUMP_LABEL (insn);
2930 insn_at_target = first_active_target_insn (target_label);
2932 delay_list
2933 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2934 insn_at_target, 0, 0,
2935 own_fallthrough,
2936 slots_to_fill, &slots_filled,
2937 delay_list);
2940 else
2942 if (own_fallthrough)
2943 delay_list
2944 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2945 insn_at_target, 0, 0,
2946 own_fallthrough,
2947 slots_to_fill, &slots_filled,
2948 delay_list);
2950 if (delay_list == 0)
2951 delay_list
2952 = fill_slots_from_thread (insn, condition, insn_at_target,
2953 next_active_insn (insn), 0, 1,
2954 own_target,
2955 slots_to_fill, &slots_filled,
2956 delay_list);
2959 if (delay_list)
2960 unfilled_slots_base[i]
2961 = emit_delay_sequence (insn, delay_list, slots_filled);
2963 if (slots_to_fill == slots_filled)
2964 unfilled_slots_base[i] = 0;
2966 note_delay_statistics (slots_filled, 1);
2970 static void delete_computation (rtx insn);
2972 /* Recursively delete prior insns that compute the value (used only by INSN
2973 which the caller is deleting) stored in the register mentioned by NOTE
2974 which is a REG_DEAD note associated with INSN. */
2976 static void
2977 delete_prior_computation (rtx note, rtx insn)
2979 rtx our_prev;
2980 rtx reg = XEXP (note, 0);
2982 for (our_prev = prev_nonnote_insn (insn);
2983 our_prev && (NONJUMP_INSN_P (our_prev)
2984 || CALL_P (our_prev));
2985 our_prev = prev_nonnote_insn (our_prev))
2987 rtx pat = PATTERN (our_prev);
2989 /* If we reach a CALL which is not calling a const function
2990 or the callee pops the arguments, then give up. */
2991 if (CALL_P (our_prev)
2992 && (! RTL_CONST_CALL_P (our_prev)
2993 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
2994 break;
2996 /* If we reach a SEQUENCE, it is too complex to try to
2997 do anything with it, so give up. We can be run during
2998 and after reorg, so SEQUENCE rtl can legitimately show
2999 up here. */
3000 if (GET_CODE (pat) == SEQUENCE)
3001 break;
3003 if (GET_CODE (pat) == USE
3004 && NONJUMP_INSN_P (XEXP (pat, 0)))
3005 /* reorg creates USEs that look like this. We leave them
3006 alone because reorg needs them for its own purposes. */
3007 break;
3009 if (reg_set_p (reg, pat))
3011 if (side_effects_p (pat) && !CALL_P (our_prev))
3012 break;
3014 if (GET_CODE (pat) == PARALLEL)
3016 /* If we find a SET of something else, we can't
3017 delete the insn. */
3019 int i;
3021 for (i = 0; i < XVECLEN (pat, 0); i++)
3023 rtx part = XVECEXP (pat, 0, i);
3025 if (GET_CODE (part) == SET
3026 && SET_DEST (part) != reg)
3027 break;
3030 if (i == XVECLEN (pat, 0))
3031 delete_computation (our_prev);
3033 else if (GET_CODE (pat) == SET
3034 && REG_P (SET_DEST (pat)))
3036 int dest_regno = REGNO (SET_DEST (pat));
3037 int dest_endregno = END_REGNO (SET_DEST (pat));
3038 int regno = REGNO (reg);
3039 int endregno = END_REGNO (reg);
3041 if (dest_regno >= regno
3042 && dest_endregno <= endregno)
3043 delete_computation (our_prev);
3045 /* We may have a multi-word hard register and some, but not
3046 all, of the words of the register are needed in subsequent
3047 insns. Write REG_UNUSED notes for those parts that were not
3048 needed. */
3049 else if (dest_regno <= regno
3050 && dest_endregno >= endregno)
3052 int i;
3054 add_reg_note (our_prev, REG_UNUSED, reg);
3056 for (i = dest_regno; i < dest_endregno; i++)
3057 if (! find_regno_note (our_prev, REG_UNUSED, i))
3058 break;
3060 if (i == dest_endregno)
3061 delete_computation (our_prev);
3065 break;
3068 /* If PAT references the register that dies here, it is an
3069 additional use. Hence any prior SET isn't dead. However, this
3070 insn becomes the new place for the REG_DEAD note. */
3071 if (reg_overlap_mentioned_p (reg, pat))
3073 XEXP (note, 1) = REG_NOTES (our_prev);
3074 REG_NOTES (our_prev) = note;
3075 break;
3080 /* Delete INSN and recursively delete insns that compute values used only
3081 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3083 Look at all our REG_DEAD notes. If a previous insn does nothing other
3084 than set a register that dies in this insn, we can delete that insn
3085 as well.
3087 On machines with CC0, if CC0 is used in this insn, we may be able to
3088 delete the insn that set it. */
3090 static void
3091 delete_computation (rtx insn)
3093 rtx note, next;
3095 #ifdef HAVE_cc0
3096 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3098 rtx prev = prev_nonnote_insn (insn);
3099 /* We assume that at this stage
3100 CC's are always set explicitly
3101 and always immediately before the jump that
3102 will use them. So if the previous insn
3103 exists to set the CC's, delete it
3104 (unless it performs auto-increments, etc.). */
3105 if (prev && NONJUMP_INSN_P (prev)
3106 && sets_cc0_p (PATTERN (prev)))
3108 if (sets_cc0_p (PATTERN (prev)) > 0
3109 && ! side_effects_p (PATTERN (prev)))
3110 delete_computation (prev);
3111 else
3112 /* Otherwise, show that cc0 won't be used. */
3113 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3116 #endif
3118 for (note = REG_NOTES (insn); note; note = next)
3120 next = XEXP (note, 1);
3122 if (REG_NOTE_KIND (note) != REG_DEAD
3123 /* Verify that the REG_NOTE is legitimate. */
3124 || !REG_P (XEXP (note, 0)))
3125 continue;
3127 delete_prior_computation (note, insn);
3130 delete_related_insns (insn);
3133 /* If all INSN does is set the pc, delete it,
3134 and delete the insn that set the condition codes for it
3135 if that's what the previous thing was. */
3137 static void
3138 delete_jump (rtx_insn *insn)
3140 rtx set = single_set (insn);
3142 if (set && GET_CODE (SET_DEST (set)) == PC)
3143 delete_computation (insn);
3146 static rtx_insn *
3147 label_before_next_insn (rtx x, rtx scan_limit)
3149 rtx_insn *insn = next_active_insn (x);
3150 while (insn)
3152 insn = PREV_INSN (insn);
3153 if (insn == scan_limit || insn == NULL_RTX)
3154 return NULL;
3155 if (LABEL_P (insn))
3156 break;
3158 return insn;
3162 /* Once we have tried two ways to fill a delay slot, make a pass over the
3163 code to try to improve the results and to do such things as more jump
3164 threading. */
3166 static void
3167 relax_delay_slots (rtx_insn *first)
3169 rtx_insn *insn, *next;
3170 rtx_sequence *pat;
3171 rtx trial;
3172 rtx_insn *delay_insn;
3173 rtx target_label;
3175 /* Look at every JUMP_INSN and see if we can improve it. */
3176 for (insn = first; insn; insn = next)
3178 rtx_insn *other;
3179 bool crossing;
3181 next = next_active_insn (insn);
3183 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3184 the next insn, or jumps to a label that is not the last of a
3185 group of consecutive labels. */
3186 if (JUMP_P (insn)
3187 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3188 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3190 target_label
3191 = skip_consecutive_labels (follow_jumps (target_label, insn,
3192 &crossing));
3193 if (ANY_RETURN_P (target_label))
3194 target_label = find_end_label (target_label);
3196 if (target_label && next_active_insn (target_label) == next
3197 && ! condjump_in_parallel_p (insn))
3199 delete_jump (insn);
3200 continue;
3203 if (target_label && target_label != JUMP_LABEL (insn))
3205 reorg_redirect_jump (insn, target_label);
3206 if (crossing)
3207 CROSSING_JUMP_P (insn) = 1;
3210 /* See if this jump conditionally branches around an unconditional
3211 jump. If so, invert this jump and point it to the target of the
3212 second jump. */
3213 if (next && simplejump_or_return_p (next)
3214 && any_condjump_p (insn)
3215 && target_label
3216 && next_active_insn (target_label) == next_active_insn (next)
3217 && no_labels_between_p (insn, next))
3219 rtx label = JUMP_LABEL (next);
3221 /* Be careful how we do this to avoid deleting code or
3222 labels that are momentarily dead. See similar optimization
3223 in jump.c.
3225 We also need to ensure we properly handle the case when
3226 invert_jump fails. */
3228 ++LABEL_NUSES (target_label);
3229 if (!ANY_RETURN_P (label))
3230 ++LABEL_NUSES (label);
3232 if (invert_jump (insn, label, 1))
3234 delete_related_insns (next);
3235 next = insn;
3238 if (!ANY_RETURN_P (label))
3239 --LABEL_NUSES (label);
3241 if (--LABEL_NUSES (target_label) == 0)
3242 delete_related_insns (target_label);
3244 continue;
3248 /* If this is an unconditional jump and the previous insn is a
3249 conditional jump, try reversing the condition of the previous
3250 insn and swapping our targets. The next pass might be able to
3251 fill the slots.
3253 Don't do this if we expect the conditional branch to be true, because
3254 we would then be making the more common case longer. */
3256 if (simplejump_or_return_p (insn)
3257 && (other = prev_active_insn (insn)) != 0
3258 && any_condjump_p (other)
3259 && no_labels_between_p (other, insn)
3260 && 0 > mostly_true_jump (other))
3262 rtx other_target = JUMP_LABEL (other);
3263 target_label = JUMP_LABEL (insn);
3265 if (invert_jump (other, target_label, 0))
3266 reorg_redirect_jump (insn, other_target);
3269 /* Now look only at cases where we have a filled delay slot. */
3270 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3271 continue;
3273 pat = as_a <rtx_sequence *> (PATTERN (insn));
3274 delay_insn = pat->insn (0);
3276 /* See if the first insn in the delay slot is redundant with some
3277 previous insn. Remove it from the delay slot if so; then set up
3278 to reprocess this insn. */
3279 if (redundant_insn (pat->insn (1), delay_insn, 0))
3281 update_block (pat->insn (1), insn);
3282 delete_from_delay_slot (pat->insn (1));
3283 next = prev_active_insn (next);
3284 continue;
3287 /* See if we have a RETURN insn with a filled delay slot followed
3288 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3289 the first RETURN (but not its delay insn). This gives the same
3290 effect in fewer instructions.
3292 Only do so if optimizing for size since this results in slower, but
3293 smaller code. */
3294 if (optimize_function_for_size_p (cfun)
3295 && ANY_RETURN_P (PATTERN (delay_insn))
3296 && next
3297 && JUMP_P (next)
3298 && PATTERN (next) == PATTERN (delay_insn))
3300 rtx_insn *after;
3301 int i;
3303 /* Delete the RETURN and just execute the delay list insns.
3305 We do this by deleting the INSN containing the SEQUENCE, then
3306 re-emitting the insns separately, and then deleting the RETURN.
3307 This allows the count of the jump target to be properly
3308 decremented.
3310 Note that we need to change the INSN_UID of the re-emitted insns
3311 since it is used to hash the insns for mark_target_live_regs and
3312 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3314 Clear the from target bit, since these insns are no longer
3315 in delay slots. */
3316 for (i = 0; i < XVECLEN (pat, 0); i++)
3317 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3319 trial = PREV_INSN (insn);
3320 delete_related_insns (insn);
3321 gcc_assert (GET_CODE (pat) == SEQUENCE);
3322 add_insn_after (delay_insn, trial, NULL);
3323 after = delay_insn;
3324 for (i = 1; i < pat->len (); i++)
3325 after = emit_copy_of_insn_after (pat->insn (i), after);
3326 delete_scheduled_jump (delay_insn);
3327 continue;
3330 /* Now look only at the cases where we have a filled JUMP_INSN. */
3331 if (!JUMP_P (delay_insn)
3332 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3333 continue;
3335 target_label = JUMP_LABEL (delay_insn);
3336 if (target_label && ANY_RETURN_P (target_label))
3337 continue;
3339 /* If this jump goes to another unconditional jump, thread it, but
3340 don't convert a jump into a RETURN here. */
3341 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3342 &crossing));
3343 if (ANY_RETURN_P (trial))
3344 trial = find_end_label (trial);
3346 if (trial && trial != target_label
3347 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3349 reorg_redirect_jump (delay_insn, trial);
3350 target_label = trial;
3351 if (crossing)
3352 CROSSING_JUMP_P (insn) = 1;
3355 /* If the first insn at TARGET_LABEL is redundant with a previous
3356 insn, redirect the jump to the following insn and process again.
3357 We use next_real_insn instead of next_active_insn so we
3358 don't skip USE-markers, or we'll end up with incorrect
3359 liveness info. */
3360 trial = next_real_insn (target_label);
3361 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3362 && redundant_insn (trial, insn, 0)
3363 && ! can_throw_internal (trial))
3365 /* Figure out where to emit the special USE insn so we don't
3366 later incorrectly compute register live/death info. */
3367 rtx_insn *tmp = next_active_insn (trial);
3368 if (tmp == 0)
3369 tmp = find_end_label (simple_return_rtx);
3371 if (tmp)
3373 /* Insert the special USE insn and update dataflow info.
3374 We know "trial" is an insn here as it is the output of
3375 next_real_insn () above. */
3376 update_block (as_a <rtx_insn *> (trial), tmp);
3378 /* Now emit a label before the special USE insn, and
3379 redirect our jump to the new label. */
3380 target_label = get_label_before (PREV_INSN (tmp), target_label);
3381 reorg_redirect_jump (delay_insn, target_label);
3382 next = insn;
3383 continue;
3387 /* Similarly, if it is an unconditional jump with one insn in its
3388 delay list and that insn is redundant, thread the jump. */
3389 rtx_sequence *trial_seq =
3390 trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL;
3391 if (trial_seq
3392 && trial_seq->len () == 2
3393 && JUMP_P (trial_seq->insn (0))
3394 && simplejump_or_return_p (trial_seq->insn (0))
3395 && redundant_insn (trial_seq->insn (1), insn, 0))
3397 target_label = JUMP_LABEL (trial_seq->insn (0));
3398 if (ANY_RETURN_P (target_label))
3399 target_label = find_end_label (target_label);
3401 if (target_label
3402 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3403 insn))
3405 update_block (trial_seq->insn (1), insn);
3406 reorg_redirect_jump (delay_insn, target_label);
3407 next = insn;
3408 continue;
3412 /* See if we have a simple (conditional) jump that is useless. */
3413 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3414 && ! condjump_in_parallel_p (delay_insn)
3415 && prev_active_insn (target_label) == insn
3416 && ! BARRIER_P (prev_nonnote_insn (target_label))
3417 #ifdef HAVE_cc0
3418 /* If the last insn in the delay slot sets CC0 for some insn,
3419 various code assumes that it is in a delay slot. We could
3420 put it back where it belonged and delete the register notes,
3421 but it doesn't seem worthwhile in this uncommon case. */
3422 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3423 REG_CC_USER, NULL_RTX)
3424 #endif
3427 rtx_insn *after;
3428 int i;
3430 /* All this insn does is execute its delay list and jump to the
3431 following insn. So delete the jump and just execute the delay
3432 list insns.
3434 We do this by deleting the INSN containing the SEQUENCE, then
3435 re-emitting the insns separately, and then deleting the jump.
3436 This allows the count of the jump target to be properly
3437 decremented.
3439 Note that we need to change the INSN_UID of the re-emitted insns
3440 since it is used to hash the insns for mark_target_live_regs and
3441 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3443 Clear the from target bit, since these insns are no longer
3444 in delay slots. */
3445 for (i = 0; i < XVECLEN (pat, 0); i++)
3446 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3448 trial = PREV_INSN (insn);
3449 delete_related_insns (insn);
3450 gcc_assert (GET_CODE (pat) == SEQUENCE);
3451 add_insn_after (delay_insn, trial, NULL);
3452 after = delay_insn;
3453 for (i = 1; i < pat->len (); i++)
3454 after = emit_copy_of_insn_after (pat->insn (i), after);
3455 delete_scheduled_jump (delay_insn);
3456 continue;
3459 /* See if this is an unconditional jump around a single insn which is
3460 identical to the one in its delay slot. In this case, we can just
3461 delete the branch and the insn in its delay slot. */
3462 if (next && NONJUMP_INSN_P (next)
3463 && label_before_next_insn (next, insn) == target_label
3464 && simplejump_p (insn)
3465 && XVECLEN (pat, 0) == 2
3466 && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
3468 delete_related_insns (insn);
3469 continue;
3472 /* See if this jump (with its delay slots) conditionally branches
3473 around an unconditional jump (without delay slots). If so, invert
3474 this jump and point it to the target of the second jump. We cannot
3475 do this for annulled jumps, though. Again, don't convert a jump to
3476 a RETURN here. */
3477 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3478 && any_condjump_p (delay_insn)
3479 && next && simplejump_or_return_p (next)
3480 && next_active_insn (target_label) == next_active_insn (next)
3481 && no_labels_between_p (insn, next))
3483 rtx label = JUMP_LABEL (next);
3484 rtx old_label = JUMP_LABEL (delay_insn);
3486 if (ANY_RETURN_P (label))
3487 label = find_end_label (label);
3489 /* find_end_label can generate a new label. Check this first. */
3490 if (label
3491 && no_labels_between_p (insn, next)
3492 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3494 /* Be careful how we do this to avoid deleting code or labels
3495 that are momentarily dead. See similar optimization in
3496 jump.c */
3497 if (old_label)
3498 ++LABEL_NUSES (old_label);
3500 if (invert_jump (delay_insn, label, 1))
3502 int i;
3504 /* Must update the INSN_FROM_TARGET_P bits now that
3505 the branch is reversed, so that mark_target_live_regs
3506 will handle the delay slot insn correctly. */
3507 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3509 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3510 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3513 delete_related_insns (next);
3514 next = insn;
3517 if (old_label && --LABEL_NUSES (old_label) == 0)
3518 delete_related_insns (old_label);
3519 continue;
3523 /* If we own the thread opposite the way this insn branches, see if we
3524 can merge its delay slots with following insns. */
3525 if (INSN_FROM_TARGET_P (pat->insn (1))
3526 && own_thread_p (NEXT_INSN (insn), 0, 1))
3527 try_merge_delay_insns (insn, next);
3528 else if (! INSN_FROM_TARGET_P (pat->insn (1))
3529 && own_thread_p (target_label, target_label, 0))
3530 try_merge_delay_insns (insn, next_active_insn (target_label));
3532 /* If we get here, we haven't deleted INSN. But we may have deleted
3533 NEXT, so recompute it. */
3534 next = next_active_insn (insn);
3539 /* Look for filled jumps to the end of function label. We can try to convert
3540 them into RETURN insns if the insns in the delay slot are valid for the
3541 RETURN as well. */
3543 static void
3544 make_return_insns (rtx_insn *first)
3546 rtx_insn *insn;
3547 rtx_insn *jump_insn;
3548 rtx real_return_label = function_return_label;
3549 rtx real_simple_return_label = function_simple_return_label;
3550 int slots, i;
3552 /* See if there is a RETURN insn in the function other than the one we
3553 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3554 into a RETURN to jump to it. */
3555 for (insn = first; insn; insn = NEXT_INSN (insn))
3556 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3558 rtx t = get_label_before (insn, NULL_RTX);
3559 if (PATTERN (insn) == ret_rtx)
3560 real_return_label = t;
3561 else
3562 real_simple_return_label = t;
3563 break;
3566 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3567 was equal to END_OF_FUNCTION_LABEL. */
3568 if (real_return_label)
3569 LABEL_NUSES (real_return_label)++;
3570 if (real_simple_return_label)
3571 LABEL_NUSES (real_simple_return_label)++;
3573 /* Clear the list of insns to fill so we can use it. */
3574 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3576 for (insn = first; insn; insn = NEXT_INSN (insn))
3578 int flags;
3579 rtx kind, real_label;
3581 /* Only look at filled JUMP_INSNs that go to the end of function
3582 label. */
3583 if (!NONJUMP_INSN_P (insn))
3584 continue;
3586 if (GET_CODE (PATTERN (insn)) != SEQUENCE)
3587 continue;
3589 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
3591 if (!jump_to_label_p (pat->insn (0)))
3592 continue;
3594 if (JUMP_LABEL (pat->insn (0)) == function_return_label)
3596 kind = ret_rtx;
3597 real_label = real_return_label;
3599 else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label)
3601 kind = simple_return_rtx;
3602 real_label = real_simple_return_label;
3604 else
3605 continue;
3607 jump_insn = pat->insn (0);
3609 /* If we can't make the jump into a RETURN, try to redirect it to the best
3610 RETURN and go on to the next insn. */
3611 if (!reorg_redirect_jump (jump_insn, kind))
3613 /* Make sure redirecting the jump will not invalidate the delay
3614 slot insns. */
3615 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3616 reorg_redirect_jump (jump_insn, real_label);
3617 continue;
3620 /* See if this RETURN can accept the insns current in its delay slot.
3621 It can if it has more or an equal number of slots and the contents
3622 of each is valid. */
3624 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3625 slots = num_delay_slots (jump_insn);
3626 if (slots >= XVECLEN (pat, 0) - 1)
3628 for (i = 1; i < XVECLEN (pat, 0); i++)
3629 if (! (
3630 #ifdef ANNUL_IFFALSE_SLOTS
3631 (INSN_ANNULLED_BRANCH_P (jump_insn)
3632 && INSN_FROM_TARGET_P (pat->insn (i)))
3633 ? eligible_for_annul_false (jump_insn, i - 1,
3634 pat->insn (i), flags) :
3635 #endif
3636 #ifdef ANNUL_IFTRUE_SLOTS
3637 (INSN_ANNULLED_BRANCH_P (jump_insn)
3638 && ! INSN_FROM_TARGET_P (pat->insn (i)))
3639 ? eligible_for_annul_true (jump_insn, i - 1,
3640 pat->insn (i), flags) :
3641 #endif
3642 eligible_for_delay (jump_insn, i - 1,
3643 pat->insn (i), flags)))
3644 break;
3646 else
3647 i = 0;
3649 if (i == XVECLEN (pat, 0))
3650 continue;
3652 /* We have to do something with this insn. If it is an unconditional
3653 RETURN, delete the SEQUENCE and output the individual insns,
3654 followed by the RETURN. Then set things up so we try to find
3655 insns for its delay slots, if it needs some. */
3656 if (ANY_RETURN_P (PATTERN (jump_insn)))
3658 rtx_insn *prev = PREV_INSN (insn);
3660 delete_related_insns (insn);
3661 for (i = 1; i < XVECLEN (pat, 0); i++)
3662 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3664 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3665 emit_barrier_after (insn);
3667 if (slots)
3668 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3670 else
3671 /* It is probably more efficient to keep this with its current
3672 delay slot as a branch to a RETURN. */
3673 reorg_redirect_jump (jump_insn, real_label);
3676 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3677 new delay slots we have created. */
3678 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3679 delete_related_insns (real_return_label);
3680 if (real_simple_return_label != NULL_RTX
3681 && --LABEL_NUSES (real_simple_return_label) == 0)
3682 delete_related_insns (real_simple_return_label);
3684 fill_simple_delay_slots (1);
3685 fill_simple_delay_slots (0);
3688 /* Try to find insns to place in delay slots. */
3690 static void
3691 dbr_schedule (rtx_insn *first)
3693 rtx_insn *insn, *next, *epilogue_insn = 0;
3694 int i;
3695 bool need_return_insns;
3697 /* If the current function has no insns other than the prologue and
3698 epilogue, then do not try to fill any delay slots. */
3699 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3700 return;
3702 /* Find the highest INSN_UID and allocate and initialize our map from
3703 INSN_UID's to position in code. */
3704 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3706 if (INSN_UID (insn) > max_uid)
3707 max_uid = INSN_UID (insn);
3708 if (NOTE_P (insn)
3709 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3710 epilogue_insn = insn;
3713 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3714 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3715 uid_to_ruid[INSN_UID (insn)] = i;
3717 /* Initialize the list of insns that need filling. */
3718 if (unfilled_firstobj == 0)
3720 gcc_obstack_init (&unfilled_slots_obstack);
3721 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3724 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3726 rtx target;
3728 /* Skip vector tables. We can't get attributes for them. */
3729 if (JUMP_TABLE_DATA_P (insn))
3730 continue;
3732 if (JUMP_P (insn))
3733 INSN_ANNULLED_BRANCH_P (insn) = 0;
3734 INSN_FROM_TARGET_P (insn) = 0;
3736 if (num_delay_slots (insn) > 0)
3737 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3739 /* Ensure all jumps go to the last of a set of consecutive labels. */
3740 if (JUMP_P (insn)
3741 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3742 && !ANY_RETURN_P (JUMP_LABEL (insn))
3743 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3744 != JUMP_LABEL (insn)))
3745 redirect_jump (insn, target, 1);
3748 init_resource_info (epilogue_insn);
3750 /* Show we haven't computed an end-of-function label yet. */
3751 function_return_label = function_simple_return_label = NULL;
3753 /* Initialize the statistics for this function. */
3754 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3755 memset (num_filled_delays, 0, sizeof num_filled_delays);
3757 /* Now do the delay slot filling. Try everything twice in case earlier
3758 changes make more slots fillable. */
3760 for (reorg_pass_number = 0;
3761 reorg_pass_number < MAX_REORG_PASSES;
3762 reorg_pass_number++)
3764 fill_simple_delay_slots (1);
3765 fill_simple_delay_slots (0);
3766 fill_eager_delay_slots ();
3767 relax_delay_slots (first);
3770 /* If we made an end of function label, indicate that it is now
3771 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3772 If it is now unused, delete it. */
3773 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3774 delete_related_insns (function_return_label);
3775 if (function_simple_return_label
3776 && --LABEL_NUSES (function_simple_return_label) == 0)
3777 delete_related_insns (function_simple_return_label);
3779 need_return_insns = false;
3780 #ifdef HAVE_return
3781 need_return_insns |= HAVE_return && function_return_label != 0;
3782 #endif
3783 #ifdef HAVE_simple_return
3784 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3785 #endif
3786 if (need_return_insns)
3787 make_return_insns (first);
3789 /* Delete any USE insns made by update_block; subsequent passes don't need
3790 them or know how to deal with them. */
3791 for (insn = first; insn; insn = next)
3793 next = NEXT_INSN (insn);
3795 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3796 && INSN_P (XEXP (PATTERN (insn), 0)))
3797 next = delete_related_insns (insn);
3800 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3802 /* It is not clear why the line below is needed, but it does seem to be. */
3803 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3805 if (dump_file)
3807 int i, j, need_comma;
3808 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3809 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3811 for (reorg_pass_number = 0;
3812 reorg_pass_number < MAX_REORG_PASSES;
3813 reorg_pass_number++)
3815 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3816 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3818 need_comma = 0;
3819 fprintf (dump_file, ";; Reorg function #%d\n", i);
3821 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3822 num_insns_needing_delays[i][reorg_pass_number]);
3824 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3825 if (num_filled_delays[i][j][reorg_pass_number])
3827 if (need_comma)
3828 fprintf (dump_file, ", ");
3829 need_comma = 1;
3830 fprintf (dump_file, "%d got %d delays",
3831 num_filled_delays[i][j][reorg_pass_number], j);
3833 fprintf (dump_file, "\n");
3836 memset (total_delay_slots, 0, sizeof total_delay_slots);
3837 memset (total_annul_slots, 0, sizeof total_annul_slots);
3838 for (insn = first; insn; insn = NEXT_INSN (insn))
3840 if (! INSN_DELETED_P (insn)
3841 && NONJUMP_INSN_P (insn)
3842 && GET_CODE (PATTERN (insn)) != USE
3843 && GET_CODE (PATTERN (insn)) != CLOBBER)
3845 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3847 rtx control;
3848 j = XVECLEN (PATTERN (insn), 0) - 1;
3849 if (j > MAX_DELAY_HISTOGRAM)
3850 j = MAX_DELAY_HISTOGRAM;
3851 control = XVECEXP (PATTERN (insn), 0, 0);
3852 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3853 total_annul_slots[j]++;
3854 else
3855 total_delay_slots[j]++;
3857 else if (num_delay_slots (insn) > 0)
3858 total_delay_slots[0]++;
3861 fprintf (dump_file, ";; Reorg totals: ");
3862 need_comma = 0;
3863 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3865 if (total_delay_slots[j])
3867 if (need_comma)
3868 fprintf (dump_file, ", ");
3869 need_comma = 1;
3870 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3873 fprintf (dump_file, "\n");
3874 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3875 fprintf (dump_file, ";; Reorg annuls: ");
3876 need_comma = 0;
3877 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3879 if (total_annul_slots[j])
3881 if (need_comma)
3882 fprintf (dump_file, ", ");
3883 need_comma = 1;
3884 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3887 fprintf (dump_file, "\n");
3888 #endif
3889 fprintf (dump_file, "\n");
3892 if (!sibling_labels.is_empty ())
3894 update_alignments (sibling_labels);
3895 sibling_labels.release ();
3898 free_resource_info ();
3899 free (uid_to_ruid);
3900 crtl->dbr_scheduled_p = true;
3902 #endif /* DELAY_SLOTS */
3904 /* Run delay slot optimization. */
3905 static unsigned int
3906 rest_of_handle_delay_slots (void)
3908 #ifdef DELAY_SLOTS
3909 dbr_schedule (get_insns ());
3910 #endif
3911 return 0;
3914 namespace {
3916 const pass_data pass_data_delay_slots =
3918 RTL_PASS, /* type */
3919 "dbr", /* name */
3920 OPTGROUP_NONE, /* optinfo_flags */
3921 TV_DBR_SCHED, /* tv_id */
3922 0, /* properties_required */
3923 0, /* properties_provided */
3924 0, /* properties_destroyed */
3925 0, /* todo_flags_start */
3926 0, /* todo_flags_finish */
3929 class pass_delay_slots : public rtl_opt_pass
3931 public:
3932 pass_delay_slots (gcc::context *ctxt)
3933 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3936 /* opt_pass methods: */
3937 virtual bool gate (function *);
3938 virtual unsigned int execute (function *)
3940 return rest_of_handle_delay_slots ();
3943 }; // class pass_delay_slots
3945 bool
3946 pass_delay_slots::gate (function *)
3948 #ifdef DELAY_SLOTS
3949 /* At -O0 dataflow info isn't updated after RA. */
3950 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3951 #else
3952 return 0;
3953 #endif
3956 } // anon namespace
3958 rtl_opt_pass *
3959 make_pass_delay_slots (gcc::context *ctxt)
3961 return new pass_delay_slots (ctxt);
3964 /* Machine dependent reorg pass. */
3966 namespace {
3968 const pass_data pass_data_machine_reorg =
3970 RTL_PASS, /* type */
3971 "mach", /* name */
3972 OPTGROUP_NONE, /* optinfo_flags */
3973 TV_MACH_DEP, /* tv_id */
3974 0, /* properties_required */
3975 0, /* properties_provided */
3976 0, /* properties_destroyed */
3977 0, /* todo_flags_start */
3978 0, /* todo_flags_finish */
3981 class pass_machine_reorg : public rtl_opt_pass
3983 public:
3984 pass_machine_reorg (gcc::context *ctxt)
3985 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
3988 /* opt_pass methods: */
3989 virtual bool gate (function *)
3991 return targetm.machine_dependent_reorg != 0;
3994 virtual unsigned int execute (function *)
3996 targetm.machine_dependent_reorg ();
3997 return 0;
4000 }; // class pass_machine_reorg
4002 } // anon namespace
4004 rtl_opt_pass *
4005 make_pass_machine_reorg (gcc::context *ctxt)
4007 return new pass_machine_reorg (ctxt);