RISC-V: Support FP l/ll round and rint HF mode autovec
[official-gcc.git] / gcc / testsuite / gdc.dg / simd19224.d
blobc9d42aa2af23f9bea8a51f78b48224925094294c
1 // https://issues.dlang.org/show_bug.cgi?id=19224
2 // { dg-additional-options "-mavx" { target avx_runtime } }
3 // { dg-do compile { target { avx_runtime || vect_sizes_16B_8B } } }
4 import core.simd;
6 float test19224(const float[4] val)
8 float sum = 0;
9 foreach (x; val) sum += x;
10 return sum;
13 enum x19224 = test19224(float4.init.array);
14 static assert(x19224 is float.nan);
16 enum y19224 = test19224(float4(1).array);
17 static assert(y19224 == 4);