gcc/regs.h

   1 /* Define per-register tables for data flow info and register allocation.
   2    Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
   3    1999, 2000, 2003, 2004, 2007 Free Software Foundation, Inc.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_REGS_H
  22 #define GCC_REGS_H
  23
  24 #include "varray.h"
  25 #include "obstack.h"
  26 #include "hard-reg-set.h"
  27 #include "basic-block.h"
  28
  29 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
  30
  31 /* When you only have the mode of a pseudo register before it has a hard
  32    register chosen for it, this reports the size of each hard register
  33    a pseudo in such a mode would get allocated to.  A target may
  34    override this.  */
  35
  36 #ifndef REGMODE_NATURAL_SIZE
  37 #define REGMODE_NATURAL_SIZE(MODE)      UNITS_PER_WORD
  38 #endif
  39
  40 #ifndef SMALL_REGISTER_CLASSES
  41 #define SMALL_REGISTER_CLASSES 0
  42 #endif
  43
  44 /* Maximum register number used in this function, plus one.  */
  45
  46 extern int max_regno;
  47
  48 /* Register information indexed by register number */
  49 typedef struct reg_info_def
  50 {                               /* fields set by reg_scan */
  51   int first_uid;                /* UID of first insn to use (REG n) */
  52   int last_uid;                 /* UID of last insn to use (REG n) */
  53
  54                                 /* fields set by reg_scan & flow_analysis */
  55   int sets;                     /* # of times (REG n) is set */
  56
  57                                 /* fields set by flow_analysis */
  58   int refs;                     /* # of times (REG n) is used or set */
  59   int freq;                     /* # estimated frequency (REG n) is used or set */
  60   int deaths;                   /* # of times (REG n) dies */
  61   int live_length;              /* # of instructions (REG n) is live */
  62   int calls_crossed;            /* # of calls (REG n) is live across */
  63   int throw_calls_crossed;      /* # of calls that may throw (REG n) is live across */
  64   int basic_block;              /* # of basic blocks (REG n) is used in */
  65 } reg_info;
  66
  67 typedef reg_info *reg_info_p;
  68
  69 DEF_VEC_P(reg_info_p);
  70 DEF_VEC_ALLOC_P(reg_info_p,heap);
  71
  72 extern VEC(reg_info_p,heap) *reg_n_info;
  73
  74 /* Indexed by n, gives number of times (REG n) is used or set.  */
  75
  76 #define REG_N_REFS(N) (VEC_index (reg_info_p, reg_n_info, N)->refs)
  77
  78 /* Estimate frequency of references to register N.  */
  79
  80 #define REG_FREQ(N) (VEC_index (reg_info_p, reg_n_info, N)->freq)
  81
  82 /* The weights for each insn varries from 0 to REG_FREQ_BASE.
  83    This constant does not need to be high, as in infrequently executed
  84    regions we want to count instructions equivalently to optimize for
  85    size instead of speed.  */
  86 #define REG_FREQ_MAX 1000
  87
  88 /* Compute register frequency from the BB frequency.  When optimizing for size,
  89    or profile driven feedback is available and the function is never executed,
  90    frequency is always equivalent.  Otherwise rescale the basic block
  91    frequency.  */
  92 #define REG_FREQ_FROM_BB(bb) (optimize_size                                   \
  93                               || (flag_branch_probabilities                   \
  94                                   && !ENTRY_BLOCK_PTR->count)                 \
  95                               ? REG_FREQ_MAX                                  \
  96                               : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
  97                               ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
  98                               : 1)
  99
 100 /* Indexed by n, gives number of times (REG n) is set.
 101    ??? both regscan and flow allocate space for this.  We should settle
 102    on just copy.  */
 103
 104 #define REG_N_SETS(N) (VEC_index (reg_info_p, reg_n_info, N)->sets)
 105
 106 /* Indexed by N, gives number of insns in which register N dies.
 107    Note that if register N is live around loops, it can die
 108    in transitions between basic blocks, and that is not counted here.
 109    So this is only a reliable indicator of how many regions of life there are
 110    for registers that are contained in one basic block.  */
 111
 112 #define REG_N_DEATHS(N) (VEC_index (reg_info_p, reg_n_info, N)->deaths)
 113
 114 /* Get the number of consecutive words required to hold pseudo-reg N.  */
 115
 116 #define PSEUDO_REGNO_SIZE(N) \
 117   ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1)         \
 118    / UNITS_PER_WORD)
 119
 120 /* Get the number of bytes required to hold pseudo-reg N.  */
 121
 122 #define PSEUDO_REGNO_BYTES(N) \
 123   GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
 124
 125 /* Get the machine mode of pseudo-reg N.  */
 126
 127 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
 128
 129 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */
 130
 131 #define REG_N_CALLS_CROSSED(N)                                  \
 132   (VEC_index (reg_info_p, reg_n_info, N)->calls_crossed)
 133
 134 /* Indexed by N, gives number of CALL_INSNS that may throw, across which
 135    (REG n) is live.  */
 136
 137 #define REG_N_THROWING_CALLS_CROSSED(N) \
 138   (VEC_index (reg_info_p, reg_n_info, N)->throw_calls_crossed)
 139
 140 /* Total number of instructions at which (REG n) is live.
 141    The larger this is, the less priority (REG n) gets for
 142    allocation in a hard register (in global-alloc).
 143    This is set in flow.c and remains valid for the rest of the compilation
 144    of the function; it is used to control register allocation.
 145
 146    local-alloc.c may alter this number to change the priority.
 147
 148    Negative values are special.
 149    -1 is used to mark a pseudo reg which has a constant or memory equivalent
 150    and is used infrequently enough that it should not get a hard register.
 151    -2 is used to mark a pseudo reg for a parameter, when a frame pointer
 152    is not required.  global.c makes an allocno for this but does
 153    not try to assign a hard register to it.  */
 154
 155 #define REG_LIVE_LENGTH(N)                              \
 156   (VEC_index (reg_info_p, reg_n_info, N)->live_length)
 157
 158 /* Vector of substitutions of register numbers,
 159    used to map pseudo regs into hardware regs.
 160
 161    This can't be folded into reg_n_info without changing all of the
 162    machine dependent directories, since the reload functions
 163    in the machine dependent files access it.  */
 164
 165 extern short *reg_renumber;
 166
 167 /* Vector indexed by hardware reg saying whether that reg is ever used.  */
 168
 169 extern char regs_ever_live[FIRST_PSEUDO_REGISTER];
 170
 171 /* Like regs_ever_live, but saying whether reg is set by asm statements.  */
 172
 173 extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
 174
 175 /* Vector indexed by machine mode saying whether there are regs of that mode.  */
 176
 177 extern bool have_regs_of_mode [MAX_MACHINE_MODE];
 178
 179 /* For each hard register, the widest mode object that it can contain.
 180    This will be a MODE_INT mode if the register can hold integers.  Otherwise
 181    it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
 182    register.  */
 183
 184 extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
 185
 186 /* Vector indexed by regno; gives uid of first insn using that reg.
 187    This is computed by reg_scan for use by cse and loop.
 188    It is sometimes adjusted for subsequent changes during loop,
 189    but not adjusted by cse even if cse invalidates it.  */
 190
 191 #define REGNO_FIRST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->first_uid)
 192
 193 /* Vector indexed by regno; gives uid of last insn using that reg.
 194    This is computed by reg_scan for use by cse and loop.
 195    It is sometimes adjusted for subsequent changes during loop,
 196    but not adjusted by cse even if cse invalidates it.
 197    This is harmless since cse won't scan through a loop end.  */
 198
 199 #define REGNO_LAST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->last_uid)
 200
 201 /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
 202    that have to go in the same hard reg.  */
 203 extern rtx regs_may_share;
 204
 205 /* Flag set by local-alloc or global-alloc if they decide to allocate
 206    something in a call-clobbered register.  */
 207
 208 extern int caller_save_needed;
 209
 210 /* Predicate to decide whether to give a hard reg to a pseudo which
 211    is referenced REFS times and would need to be saved and restored
 212    around a call CALLS times.  */
 213
 214 #ifndef CALLER_SAVE_PROFITABLE
 215 #define CALLER_SAVE_PROFITABLE(REFS, CALLS)  (4 * (CALLS) < (REFS))
 216 #endif
 217
 218 /* On most machines a register class is likely to be spilled if it
 219    only has one register.  */
 220 #ifndef CLASS_LIKELY_SPILLED_P
 221 #define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
 222 #endif
 223
 224 /* Select a register mode required for caller save of hard regno REGNO.  */
 225 #ifndef HARD_REGNO_CALLER_SAVE_MODE
 226 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
 227   choose_hard_reg_mode (REGNO, NREGS, false)
 228 #endif
 229
 230 /* Registers that get partially clobbered by a call in a given mode.
 231    These must not be call used registers.  */
 232 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
 233 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
 234 #endif
 235
 236 /* Allocate reg_n_info tables */
 237 extern void allocate_reg_info (size_t, int, int);
 238
 239 /* Specify number of hard registers given machine mode occupy.  */
 240 extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
 241
 242 #endif /* GCC_REGS_H */