1 /* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987, 88, 91, 94, 95, 97, 98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
28 static struct obstack obstack
;
29 struct obstack
*rtl_obstack
= &obstack
;
31 #define obstack_chunk_alloc xmalloc
32 #define obstack_chunk_free free
35 static int max_dup_opno
;
36 static int max_scratch_opno
;
37 static int register_constraints
;
38 static int insn_code_number
;
39 static int insn_index_number
;
41 /* Data structure for recording the patterns of insns that have CLOBBERs.
42 We use this to output a function that adds these CLOBBERs to a
43 previously-allocated PARALLEL expression. */
47 struct clobber_ent
*insns
;
50 struct clobber_pat
*next
;
53 /* Records one insn that uses the clobber list. */
57 int code_number
; /* Counts only insns. */
58 struct clobber_ent
*next
;
61 static void max_operand_1
PROTO((rtx
));
62 static int max_operand_vec
PROTO((rtx
, int));
63 static void print_code
PROTO((RTX_CODE
));
64 static void gen_exp
PROTO((rtx
, enum rtx_code
));
65 static void gen_insn
PROTO((rtx
));
66 static void gen_expand
PROTO((rtx
));
67 static void gen_split
PROTO((rtx
));
68 static void output_add_clobbers
PROTO((void));
69 static void gen_rtx_scratch
PROTO((rtx
, enum rtx_code
));
70 static void output_peephole2_scratches
PROTO((rtx
));
77 register RTX_CODE code
;
80 register const char *fmt
;
87 if (code
== MATCH_OPERAND
&& XSTR (x
, 2) != 0 && *XSTR (x
, 2) != '\0')
88 register_constraints
= 1;
89 if (code
== MATCH_SCRATCH
&& XSTR (x
, 1) != 0 && *XSTR (x
, 1) != '\0')
90 register_constraints
= 1;
91 if (code
== MATCH_OPERAND
|| code
== MATCH_OPERATOR
92 || code
== MATCH_PARALLEL
)
93 max_opno
= MAX (max_opno
, XINT (x
, 0));
94 if (code
== MATCH_DUP
|| code
== MATCH_OP_DUP
|| code
== MATCH_PAR_DUP
)
95 max_dup_opno
= MAX (max_dup_opno
, XINT (x
, 0));
96 if (code
== MATCH_SCRATCH
)
97 max_scratch_opno
= MAX (max_scratch_opno
, XINT (x
, 0));
99 fmt
= GET_RTX_FORMAT (code
);
100 len
= GET_RTX_LENGTH (code
);
101 for (i
= 0; i
< len
; i
++)
103 if (fmt
[i
] == 'e' || fmt
[i
] == 'u')
104 max_operand_1 (XEXP (x
, i
));
105 else if (fmt
[i
] == 'E')
108 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
109 max_operand_1 (XVECEXP (x
, i
, j
));
115 max_operand_vec (insn
, arg
)
119 register int len
= XVECLEN (insn
, arg
);
124 max_scratch_opno
= -1;
126 for (i
= 0; i
< len
; i
++)
127 max_operand_1 (XVECEXP (insn
, arg
, i
));
136 register const char *p1
;
137 for (p1
= GET_RTX_NAME (code
); *p1
; p1
++)
138 putchar (TOUPPER(*p1
));
142 gen_rtx_scratch (x
, subroutine_type
)
144 enum rtx_code subroutine_type
;
146 if (subroutine_type
== DEFINE_PEEPHOLE2
)
148 printf ("operand%d", XINT (x
, 0));
152 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x
)));
156 /* Print a C expression to construct an RTX just like X,
157 substituting any operand references appearing within. */
160 gen_exp (x
, subroutine_type
)
162 enum rtx_code subroutine_type
;
164 register RTX_CODE code
;
167 register const char *fmt
;
181 printf ("operand%d", XINT (x
, 0));
185 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x
, 0));
186 if (GET_MODE (x
) == VOIDmode
)
187 printf ("GET_MODE (operand%d)", XINT (x
, 0));
189 printf ("%smode", GET_MODE_NAME (GET_MODE (x
)));
190 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
193 gen_exp (XVECEXP (x
, 1, i
), subroutine_type
);
199 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x
, 0));
200 printf (", %smode", GET_MODE_NAME (GET_MODE (x
)));
201 for (i
= 0; i
< XVECLEN (x
, 2); i
++)
204 gen_exp (XVECEXP (x
, 2, i
), subroutine_type
);
211 printf ("operand%d", XINT (x
, 0));
215 gen_rtx_scratch (x
, subroutine_type
);
219 fatal ("ADDRESS expression code used in named instruction pattern");
231 printf ("const0_rtx");
232 else if (INTVAL (x
) == 1)
233 printf ("const1_rtx");
234 else if (INTVAL (x
) == -1)
235 printf ("constm1_rtx");
236 else if (INTVAL (x
) == STORE_FLAG_VALUE
)
237 printf ("const_true_rtx");
240 printf ("GEN_INT (");
241 printf (HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
247 /* These shouldn't be written in MD files. Instead, the appropriate
248 routines in varasm.c should be called. */
257 printf (" (%smode", GET_MODE_NAME (GET_MODE (x
)));
259 fmt
= GET_RTX_FORMAT (code
);
260 len
= GET_RTX_LENGTH (code
);
261 for (i
= 0; i
< len
; i
++)
266 if (fmt
[i
] == 'e' || fmt
[i
] == 'u')
267 gen_exp (XEXP (x
, i
), subroutine_type
);
268 else if (fmt
[i
] == 'i')
269 printf ("%u", XINT (x
, i
));
270 else if (fmt
[i
] == 's')
271 printf ("\"%s\"", XSTR (x
, i
));
272 else if (fmt
[i
] == 'E')
275 printf ("gen_rtvec (%d", XVECLEN (x
, i
));
276 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
279 gen_exp (XVECEXP (x
, i
, j
), subroutine_type
);
289 /* Generate the `gen_...' function for a DEFINE_INSN. */
298 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
299 registers or MATCH_SCRATCHes. If so, store away the information for
304 for (i
= XVECLEN (insn
, 1) - 1; i
> 0; i
--)
305 if (GET_CODE (XVECEXP (insn
, 1, i
)) != CLOBBER
306 || (GET_CODE (XEXP (XVECEXP (insn
, 1, i
), 0)) != REG
307 && GET_CODE (XEXP (XVECEXP (insn
, 1, i
), 0)) != MATCH_SCRATCH
))
310 if (i
!= XVECLEN (insn
, 1) - 1)
312 register struct clobber_pat
*p
;
313 register struct clobber_ent
*link
314 = (struct clobber_ent
*) xmalloc (sizeof (struct clobber_ent
));
317 link
->code_number
= insn_code_number
;
319 /* See if any previous CLOBBER_LIST entry is the same as this
322 for (p
= clobber_list
; p
; p
= p
->next
)
324 if (p
->first_clobber
!= i
+ 1
325 || XVECLEN (p
->pattern
, 1) != XVECLEN (insn
, 1))
328 for (j
= i
+ 1; j
< XVECLEN (insn
, 1); j
++)
330 rtx old
= XEXP (XVECEXP (p
->pattern
, 1, j
), 0);
331 rtx
new = XEXP (XVECEXP (insn
, 1, j
), 0);
333 /* OLD and NEW are the same if both are to be a SCRATCH
335 or if both are registers of the same mode and number. */
336 if (! (GET_MODE (old
) == GET_MODE (new)
337 && ((GET_CODE (old
) == MATCH_SCRATCH
338 && GET_CODE (new) == MATCH_SCRATCH
)
339 || (GET_CODE (old
) == REG
&& GET_CODE (new) == REG
340 && REGNO (old
) == REGNO (new)))))
344 if (j
== XVECLEN (insn
, 1))
350 p
= (struct clobber_pat
*) xmalloc (sizeof (struct clobber_pat
));
354 p
->first_clobber
= i
+ 1;
355 p
->next
= clobber_list
;
359 link
->next
= p
->insns
;
364 /* Don't mention instructions whose names are the null string
365 or begin with '*'. They are in the machine description just
367 if (XSTR (insn
, 0)[0] == 0 || XSTR (insn
, 0)[0] == '*')
370 /* Find out how many operands this function has,
371 and also whether any of them have register constraints. */
372 register_constraints
= 0;
373 operands
= max_operand_vec (insn
, 1);
374 if (max_dup_opno
>= operands
)
375 fatal ("match_dup operand number has no match_operand");
377 /* Output the function name and argument declarations. */
378 printf ("rtx\ngen_%s (", XSTR (insn
, 0));
379 for (i
= 0; i
< operands
; i
++)
380 printf (i
? ", operand%d" : "operand%d", i
);
382 for (i
= 0; i
< operands
; i
++)
383 printf (" rtx operand%d;\n", i
);
386 /* Output code to construct and return the rtl for the instruction body */
388 if (XVECLEN (insn
, 1) == 1)
391 gen_exp (XVECEXP (insn
, 1, 0), DEFINE_INSN
);
396 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
399 for (i
= 0; i
< XVECLEN (insn
, 1); i
++)
402 gen_exp (XVECEXP (insn
, 1, i
), DEFINE_INSN
);
404 printf ("));\n}\n\n");
408 /* Generate the `gen_...' function for a DEFINE_EXPAND. */
417 if (strlen (XSTR (expand
, 0)) == 0)
418 fatal ("define_expand lacks a name");
419 if (XVEC (expand
, 1) == 0)
420 fatal ("define_expand for %s lacks a pattern", XSTR (expand
, 0));
422 /* Find out how many operands this function has,
423 and also whether any of them have register constraints. */
424 register_constraints
= 0;
426 operands
= max_operand_vec (expand
, 1);
428 /* Output the function name and argument declarations. */
429 printf ("rtx\ngen_%s (", XSTR (expand
, 0));
430 for (i
= 0; i
< operands
; i
++)
431 printf (i
? ", operand%d" : "operand%d", i
);
433 for (i
= 0; i
< operands
; i
++)
434 printf (" rtx operand%d;\n", i
);
437 /* If we don't have any C code to write, only one insn is being written,
438 and no MATCH_DUPs are present, we can just return the desired insn
439 like we do for a DEFINE_INSN. This saves memory. */
440 if ((XSTR (expand
, 3) == 0 || *XSTR (expand
, 3) == '\0')
441 && operands
> max_dup_opno
442 && XVECLEN (expand
, 1) == 1)
445 gen_exp (XVECEXP (expand
, 1, 0), DEFINE_EXPAND
);
450 /* For each operand referred to only with MATCH_DUPs,
451 make a local variable. */
452 for (i
= operands
; i
<= max_dup_opno
; i
++)
453 printf (" rtx operand%d;\n", i
);
454 for (; i
<= max_scratch_opno
; i
++)
455 printf (" rtx operand%d;\n", i
);
456 printf (" rtx _val = 0;\n");
457 printf (" start_sequence ();\n");
459 /* The fourth operand of DEFINE_EXPAND is some code to be executed
460 before the actual construction.
461 This code expects to refer to `operands'
462 just as the output-code in a DEFINE_INSN does,
463 but here `operands' is an automatic array.
464 So copy the operand values there before executing it. */
465 if (XSTR (expand
, 3) && *XSTR (expand
, 3))
468 if (operands
> 0 || max_dup_opno
>= 0 || max_scratch_opno
>= 0)
469 printf (" rtx operands[%d];\n",
470 MAX (operands
, MAX (max_scratch_opno
, max_dup_opno
) + 1));
471 /* Output code to copy the arguments into `operands'. */
472 for (i
= 0; i
< operands
; i
++)
473 printf (" operands[%d] = operand%d;\n", i
, i
);
475 /* Output the special code to be executed before the sequence
477 printf ("%s\n", XSTR (expand
, 3));
479 /* Output code to copy the arguments back out of `operands'
480 (unless we aren't going to use them at all). */
481 if (XVEC (expand
, 1) != 0)
483 for (i
= 0; i
< operands
; i
++)
484 printf (" operand%d = operands[%d];\n", i
, i
);
485 for (; i
<= max_dup_opno
; i
++)
486 printf (" operand%d = operands[%d];\n", i
, i
);
487 for (; i
<= max_scratch_opno
; i
++)
488 printf (" operand%d = operands[%d];\n", i
, i
);
493 /* Output code to construct the rtl for the instruction bodies.
494 Use emit_insn to add them to the sequence being accumulated.
495 But don't do this if the user's code has set `no_more' nonzero. */
497 for (i
= 0; i
< XVECLEN (expand
, 1); i
++)
499 rtx next
= XVECEXP (expand
, 1, i
);
500 if ((GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
)
501 || (GET_CODE (next
) == PARALLEL
502 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
503 && GET_CODE (SET_DEST (XVECEXP (next
, 0, 0))) == PC
)
504 || GET_CODE (next
) == RETURN
)
505 printf (" emit_jump_insn (");
506 else if ((GET_CODE (next
) == SET
&& GET_CODE (SET_SRC (next
)) == CALL
)
507 || GET_CODE (next
) == CALL
508 || (GET_CODE (next
) == PARALLEL
509 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
510 && GET_CODE (SET_SRC (XVECEXP (next
, 0, 0))) == CALL
)
511 || (GET_CODE (next
) == PARALLEL
512 && GET_CODE (XVECEXP (next
, 0, 0)) == CALL
))
513 printf (" emit_call_insn (");
514 else if (GET_CODE (next
) == CODE_LABEL
)
515 printf (" emit_label (");
516 else if (GET_CODE (next
) == MATCH_OPERAND
517 || GET_CODE (next
) == MATCH_DUP
518 || GET_CODE (next
) == MATCH_OPERATOR
519 || GET_CODE (next
) == MATCH_OP_DUP
520 || GET_CODE (next
) == MATCH_PARALLEL
521 || GET_CODE (next
) == MATCH_PAR_DUP
522 || GET_CODE (next
) == PARALLEL
)
525 printf (" emit_insn (");
526 gen_exp (next
, DEFINE_EXPAND
);
528 if (GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
529 && GET_CODE (SET_SRC (next
)) == LABEL_REF
)
530 printf (" emit_barrier ();");
533 /* Call `gen_sequence' to make a SEQUENCE out of all the
534 insns emitted within this gen_... function. */
536 printf (" _val = gen_sequence ();\n");
537 printf (" end_sequence ();\n");
538 printf (" return _val;\n}\n\n");
541 /* Like gen_expand, but generates a SEQUENCE. */
549 const char *name
= "split";
551 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
554 if (XVEC (split
, 0) == 0)
555 fatal ("define_%s (definition %d) lacks a pattern", name
,
557 else if (XVEC (split
, 2) == 0)
558 fatal ("define_%s (definition %d) lacks a replacement pattern", name
,
561 /* Find out how many operands this function has. */
563 max_operand_vec (split
, 2);
564 operands
= MAX (max_opno
, MAX (max_dup_opno
, max_scratch_opno
)) + 1;
566 /* Output the prototype, function name and argument declarations. */
567 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
569 printf ("extern rtx gen_%s_%d PROTO ((rtx, rtx *));\n",
570 name
, insn_code_number
);
571 printf ("rtx\ngen_%s_%d (curr_insn, operands)\n\
572 rtx curr_insn ATTRIBUTE_UNUSED;\n\
574 name
, insn_code_number
);
578 printf ("extern rtx gen_split_%d PROTO ((rtx *));\n", insn_code_number
);
579 printf ("rtx\ngen_%s_%d (operands)\n rtx *operands;\n", name
,
584 /* Declare all local variables. */
585 for (i
= 0; i
< operands
; i
++)
586 printf (" rtx operand%d;\n", i
);
587 printf (" rtx _val = 0;\n");
589 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
590 output_peephole2_scratches (split
);
592 printf (" start_sequence ();\n");
594 /* The fourth operand of DEFINE_SPLIT is some code to be executed
595 before the actual construction. */
598 printf ("%s\n", XSTR (split
, 3));
600 /* Output code to copy the arguments back out of `operands' */
601 for (i
= 0; i
< operands
; i
++)
602 printf (" operand%d = operands[%d];\n", i
, i
);
604 /* Output code to construct the rtl for the instruction bodies.
605 Use emit_insn to add them to the sequence being accumulated.
606 But don't do this if the user's code has set `no_more' nonzero. */
608 for (i
= 0; i
< XVECLEN (split
, 2); i
++)
610 rtx next
= XVECEXP (split
, 2, i
);
611 if ((GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
)
612 || (GET_CODE (next
) == PARALLEL
613 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
614 && GET_CODE (SET_DEST (XVECEXP (next
, 0, 0))) == PC
)
615 || GET_CODE (next
) == RETURN
)
616 printf (" emit_jump_insn (");
617 else if ((GET_CODE (next
) == SET
&& GET_CODE (SET_SRC (next
)) == CALL
)
618 || GET_CODE (next
) == CALL
619 || (GET_CODE (next
) == PARALLEL
620 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
621 && GET_CODE (SET_SRC (XVECEXP (next
, 0, 0))) == CALL
)
622 || (GET_CODE (next
) == PARALLEL
623 && GET_CODE (XVECEXP (next
, 0, 0)) == CALL
))
624 printf (" emit_call_insn (");
625 else if (GET_CODE (next
) == CODE_LABEL
)
626 printf (" emit_label (");
627 else if (GET_CODE (next
) == MATCH_OPERAND
628 || GET_CODE (next
) == MATCH_OPERATOR
629 || GET_CODE (next
) == MATCH_PARALLEL
630 || GET_CODE (next
) == MATCH_OP_DUP
631 || GET_CODE (next
) == MATCH_DUP
632 || GET_CODE (next
) == PARALLEL
)
635 printf (" emit_insn (");
636 gen_exp (next
, GET_CODE (split
));
638 if (GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
639 && GET_CODE (SET_SRC (next
)) == LABEL_REF
)
640 printf (" emit_barrier ();");
643 /* Call `gen_sequence' to make a SEQUENCE out of all the
644 insns emitted within this gen_... function. */
646 printf (" _val = gen_sequence ();\n");
647 printf (" end_sequence ();\n");
648 printf (" return _val;\n}\n\n");
651 /* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
652 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
653 the end of the vector. */
656 output_add_clobbers ()
658 struct clobber_pat
*clobber
;
659 struct clobber_ent
*ent
;
662 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
663 printf (" rtx pattern;\n int insn_code_number;\n");
665 printf (" switch (insn_code_number)\n");
668 for (clobber
= clobber_list
; clobber
; clobber
= clobber
->next
)
670 for (ent
= clobber
->insns
; ent
; ent
= ent
->next
)
671 printf (" case %d:\n", ent
->code_number
);
673 for (i
= clobber
->first_clobber
; i
< XVECLEN (clobber
->pattern
, 1); i
++)
675 printf (" XVECEXP (pattern, 0, %d) = ", i
);
676 gen_exp (XVECEXP (clobber
->pattern
, 1, i
),
677 GET_CODE (clobber
->pattern
));
681 printf (" break;\n\n");
684 printf (" default:\n");
685 printf (" abort ();\n");
690 /* Generate code to invoke find_free_register () as needed for the
691 scratch registers used by the peephole2 pattern in SPLIT. */
694 output_peephole2_scratches (split
)
700 printf (" rtx first_insn ATTRIBUTE_UNUSED;\n");
701 printf (" rtx last_insn ATTRIBUTE_UNUSED;\n");
702 printf (" HARD_REG_SET _regs_allocated;\n");
704 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
706 for (i
= 0; i
< XVECLEN (split
, 0); i
++)
708 rtx elt
= XVECEXP (split
, 0, i
);
709 if (GET_CODE (elt
) == MATCH_SCRATCH
)
711 int last_insn_nr
= insn_nr
;
712 int cur_insn_nr
= insn_nr
;
714 for (j
= i
+ 1; j
< XVECLEN (split
, 0); j
++)
715 if (GET_CODE (XVECEXP (split
, 0, j
)) == MATCH_DUP
)
717 if (XINT (XVECEXP (split
, 0, j
), 0) == XINT (elt
, 0))
718 last_insn_nr
= cur_insn_nr
;
720 else if (GET_CODE (XVECEXP (split
, 0, j
)) != MATCH_SCRATCH
)
722 printf (" first_insn = recog_next_insn (curr_insn, %d);\n", insn_nr
);
723 if (last_insn_nr
> insn_nr
)
724 printf (" last_insn = recog_next_insn (curr_insn, %d);\n",
727 printf (" last_insn = 0;\n");
728 printf (" if ((operands[%d] = find_free_register (first_insn, last_insn, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
732 GET_MODE_NAME (GET_MODE (elt
)));
735 else if (GET_CODE (elt
) != MATCH_DUP
)
744 register PTR val
= (PTR
) malloc (size
);
747 fatal ("virtual memory exhausted");
759 ptr
= (PTR
) realloc (old
, size
);
761 ptr
= (PTR
) malloc (size
);
763 fatal ("virtual memory exhausted");
767 extern int main
PROTO ((int, char **));
778 progname
= "genemit";
779 obstack_init (rtl_obstack
);
782 fatal ("No input file name.");
784 infile
= fopen (argv
[1], "r");
788 return (FATAL_EXIT_CODE
);
790 read_rtx_filename
= argv
[1];
792 /* Assign sequential codes to all entries in the machine description
793 in parallel with the tables in insn-output.c. */
795 insn_code_number
= 0;
796 insn_index_number
= 0;
798 printf ("/* Generated automatically by the program `genemit'\n\
799 from the machine description file `md'. */\n\n");
801 printf ("#include \"config.h\"\n");
802 printf ("#include \"system.h\"\n");
803 printf ("#include \"rtl.h\"\n");
804 printf ("#include \"tm_p.h\"\n");
805 printf ("#include \"function.h\"\n");
806 printf ("#include \"expr.h\"\n");
807 printf ("#include \"real.h\"\n");
808 printf ("#include \"flags.h\"\n");
809 printf ("#include \"output.h\"\n");
810 printf ("#include \"insn-config.h\"\n");
811 printf ("#include \"insn-flags.h\"\n");
812 printf ("#include \"insn-codes.h\"\n");
813 printf ("#include \"recog.h\"\n");
814 printf ("#include \"hard-reg-set.h\"\n");
815 printf ("#include \"resource.h\"\n");
816 printf ("#include \"reload.h\"\n\n");
817 printf ("#define FAIL return (end_sequence (), _val)\n");
818 printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n");
820 /* Read the machine description. */
824 c
= read_skip_spaces (infile
);
829 desc
= read_rtx (infile
);
831 if (GET_CODE (desc
) == DEFINE_INSN
)
836 if (GET_CODE (desc
) == DEFINE_EXPAND
)
841 if (GET_CODE (desc
) == DEFINE_SPLIT
)
846 if (GET_CODE (desc
) == DEFINE_PEEPHOLE2
)
851 if (GET_CODE (desc
) == DEFINE_PEEPHOLE
)
858 /* Write out the routine to add CLOBBERs to a pattern. */
859 output_add_clobbers ();
862 return (ferror (stdout
) != 0 ? FATAL_EXIT_CODE
: SUCCESS_EXIT_CODE
);
865 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
868 int code ATTRIBUTE_UNUSED
;