PR c/68024
[official-gcc.git] / gcc / reorg.c
blobc51e03cf366effb8f5be3cb2a12ec9df25e55a53
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "backend.h"
107 #include "predict.h"
108 #include "tree.h"
109 #include "rtl.h"
110 #include "df.h"
111 #include "diagnostic-core.h"
112 #include "tm_p.h"
113 #include "flags.h"
114 #include "alias.h"
115 #include "insn-config.h"
116 #include "expmed.h"
117 #include "dojump.h"
118 #include "explow.h"
119 #include "calls.h"
120 #include "emit-rtl.h"
121 #include "varasm.h"
122 #include "stmt.h"
123 #include "expr.h"
124 #include "conditions.h"
125 #include "regs.h"
126 #include "recog.h"
127 #include "insn-attr.h"
128 #include "resource.h"
129 #include "except.h"
130 #include "params.h"
131 #include "target.h"
132 #include "tree-pass.h"
134 #ifdef DELAY_SLOTS
136 #ifndef ANNUL_IFTRUE_SLOTS
137 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
138 #endif
139 #ifndef ANNUL_IFFALSE_SLOTS
140 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
141 #endif
144 /* First, some functions that were used before GCC got a control flow graph.
145 These functions are now only used here in reorg.c, and have therefore
146 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
148 /* Return the last label to mark the same position as LABEL. Return LABEL
149 itself if it is null or any return rtx. */
151 static rtx
152 skip_consecutive_labels (rtx label_or_return)
154 rtx_insn *insn;
156 if (label_or_return && ANY_RETURN_P (label_or_return))
157 return label_or_return;
159 rtx_insn *label = as_a <rtx_insn *> (label_or_return);
161 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
162 if (LABEL_P (insn))
163 label = insn;
165 return label;
168 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
169 and REG_CC_USER notes so we can find it. */
171 static void
172 link_cc0_insns (rtx_insn *insn)
174 rtx user = next_nonnote_insn (insn);
176 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
177 user = XVECEXP (PATTERN (user), 0, 0);
179 add_reg_note (user, REG_CC_SETTER, insn);
180 add_reg_note (insn, REG_CC_USER, user);
183 /* Insns which have delay slots that have not yet been filled. */
185 static struct obstack unfilled_slots_obstack;
186 static rtx *unfilled_firstobj;
188 /* Define macros to refer to the first and last slot containing unfilled
189 insns. These are used because the list may move and its address
190 should be recomputed at each use. */
192 #define unfilled_slots_base \
193 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
195 #define unfilled_slots_next \
196 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
198 /* Points to the label before the end of the function, or before a
199 return insn. */
200 static rtx_code_label *function_return_label;
201 /* Likewise for a simple_return. */
202 static rtx_code_label *function_simple_return_label;
204 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
205 not always monotonically increase. */
206 static int *uid_to_ruid;
208 /* Highest valid index in `uid_to_ruid'. */
209 static int max_uid;
211 static int stop_search_p (rtx_insn *, int);
212 static int resource_conflicts_p (struct resources *, struct resources *);
213 static int insn_references_resource_p (rtx, struct resources *, bool);
214 static int insn_sets_resource_p (rtx, struct resources *, bool);
215 static rtx_code_label *find_end_label (rtx);
216 static rtx_insn *emit_delay_sequence (rtx_insn *, const vec<rtx_insn *> &,
217 int);
218 static void add_to_delay_list (rtx_insn *, vec<rtx_insn *> *);
219 static rtx_insn *delete_from_delay_slot (rtx_insn *);
220 static void delete_scheduled_jump (rtx_insn *);
221 static void note_delay_statistics (int, int);
222 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
223 static void optimize_skip (rtx_jump_insn *, vec<rtx_insn *> *);
224 #endif
225 static int get_jump_flags (const rtx_insn *, rtx);
226 static int mostly_true_jump (rtx);
227 static rtx get_branch_condition (const rtx_insn *, rtx);
228 static int condition_dominates_p (rtx, const rtx_insn *);
229 static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
230 static int redirect_with_delay_list_safe_p (rtx_insn *, rtx,
231 const vec<rtx_insn *> &);
232 static int check_annul_list_true_false (int, const vec<rtx_insn *> &);
233 static void steal_delay_list_from_target (rtx_insn *, rtx, rtx_sequence *,
234 vec<rtx_insn *> *,
235 struct resources *,
236 struct resources *,
237 struct resources *,
238 int, int *, int *,
239 rtx *);
240 static void steal_delay_list_from_fallthrough (rtx_insn *, rtx, rtx_sequence *,
241 vec<rtx_insn *> *,
242 struct resources *,
243 struct resources *,
244 struct resources *,
245 int, int *, int *);
246 static void try_merge_delay_insns (rtx_insn *, rtx_insn *);
247 static rtx redundant_insn (rtx, rtx_insn *, const vec<rtx_insn *> &);
248 static int own_thread_p (rtx, rtx, int);
249 static void update_block (rtx_insn *, rtx);
250 static int reorg_redirect_jump (rtx_jump_insn *, rtx);
251 static void update_reg_dead_notes (rtx_insn *, rtx_insn *);
252 static void fix_reg_dead_note (rtx, rtx);
253 static void update_reg_unused_notes (rtx, rtx);
254 static void fill_simple_delay_slots (int);
255 static void fill_slots_from_thread (rtx_jump_insn *, rtx, rtx, rtx,
256 int, int, int, int,
257 int *, vec<rtx_insn *> *);
258 static void fill_eager_delay_slots (void);
259 static void relax_delay_slots (rtx_insn *);
260 static void make_return_insns (rtx_insn *);
262 /* A wrapper around next_active_insn which takes care to return ret_rtx
263 unchanged. */
265 static rtx
266 first_active_target_insn (rtx insn)
268 if (ANY_RETURN_P (insn))
269 return insn;
270 return next_active_insn (as_a <rtx_insn *> (insn));
273 /* Return true iff INSN is a simplejump, or any kind of return insn. */
275 static bool
276 simplejump_or_return_p (rtx insn)
278 return (JUMP_P (insn)
279 && (simplejump_p (as_a <rtx_insn *> (insn))
280 || ANY_RETURN_P (PATTERN (insn))));
283 /* Return TRUE if this insn should stop the search for insn to fill delay
284 slots. LABELS_P indicates that labels should terminate the search.
285 In all cases, jumps terminate the search. */
287 static int
288 stop_search_p (rtx_insn *insn, int labels_p)
290 if (insn == 0)
291 return 1;
293 /* If the insn can throw an exception that is caught within the function,
294 it may effectively perform a jump from the viewpoint of the function.
295 Therefore act like for a jump. */
296 if (can_throw_internal (insn))
297 return 1;
299 switch (GET_CODE (insn))
301 case NOTE:
302 case CALL_INSN:
303 return 0;
305 case CODE_LABEL:
306 return labels_p;
308 case JUMP_INSN:
309 case BARRIER:
310 return 1;
312 case INSN:
313 /* OK unless it contains a delay slot or is an `asm' insn of some type.
314 We don't know anything about these. */
315 return (GET_CODE (PATTERN (insn)) == SEQUENCE
316 || GET_CODE (PATTERN (insn)) == ASM_INPUT
317 || asm_noperands (PATTERN (insn)) >= 0);
319 default:
320 gcc_unreachable ();
324 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
325 resource set contains a volatile memory reference. Otherwise, return FALSE. */
327 static int
328 resource_conflicts_p (struct resources *res1, struct resources *res2)
330 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
331 || res1->volatil || res2->volatil)
332 return 1;
334 return hard_reg_set_intersect_p (res1->regs, res2->regs);
337 /* Return TRUE if any resource marked in RES, a `struct resources', is
338 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
339 routine is using those resources.
341 We compute this by computing all the resources referenced by INSN and
342 seeing if this conflicts with RES. It might be faster to directly check
343 ourselves, and this is the way it used to work, but it means duplicating
344 a large block of complex code. */
346 static int
347 insn_references_resource_p (rtx insn, struct resources *res,
348 bool include_delayed_effects)
350 struct resources insn_res;
352 CLEAR_RESOURCE (&insn_res);
353 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
354 return resource_conflicts_p (&insn_res, res);
357 /* Return TRUE if INSN modifies resources that are marked in RES.
358 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
359 included. CC0 is only modified if it is explicitly set; see comments
360 in front of mark_set_resources for details. */
362 static int
363 insn_sets_resource_p (rtx insn, struct resources *res,
364 bool include_delayed_effects)
366 struct resources insn_sets;
368 CLEAR_RESOURCE (&insn_sets);
369 mark_set_resources (insn, &insn_sets, 0,
370 (include_delayed_effects
371 ? MARK_SRC_DEST_CALL
372 : MARK_SRC_DEST));
373 return resource_conflicts_p (&insn_sets, res);
376 /* Find a label at the end of the function or before a RETURN. If there
377 is none, try to make one. If that fails, returns 0.
379 The property of such a label is that it is placed just before the
380 epilogue or a bare RETURN insn, so that another bare RETURN can be
381 turned into a jump to the label unconditionally. In particular, the
382 label cannot be placed before a RETURN insn with a filled delay slot.
384 ??? There may be a problem with the current implementation. Suppose
385 we start with a bare RETURN insn and call find_end_label. It may set
386 function_return_label just before the RETURN. Suppose the machinery
387 is able to fill the delay slot of the RETURN insn afterwards. Then
388 function_return_label is no longer valid according to the property
389 described above and find_end_label will still return it unmodified.
390 Note that this is probably mitigated by the following observation:
391 once function_return_label is made, it is very likely the target of
392 a jump, so filling the delay slot of the RETURN will be much more
393 difficult.
394 KIND is either simple_return_rtx or ret_rtx, indicating which type of
395 return we're looking for. */
397 static rtx_code_label *
398 find_end_label (rtx kind)
400 rtx_insn *insn;
401 rtx_code_label **plabel;
403 if (kind == ret_rtx)
404 plabel = &function_return_label;
405 else
407 gcc_assert (kind == simple_return_rtx);
408 plabel = &function_simple_return_label;
411 /* If we found one previously, return it. */
412 if (*plabel)
413 return *plabel;
415 /* Otherwise, see if there is a label at the end of the function. If there
416 is, it must be that RETURN insns aren't needed, so that is our return
417 label and we don't have to do anything else. */
419 insn = get_last_insn ();
420 while (NOTE_P (insn)
421 || (NONJUMP_INSN_P (insn)
422 && (GET_CODE (PATTERN (insn)) == USE
423 || GET_CODE (PATTERN (insn)) == CLOBBER)))
424 insn = PREV_INSN (insn);
426 /* When a target threads its epilogue we might already have a
427 suitable return insn. If so put a label before it for the
428 function_return_label. */
429 if (BARRIER_P (insn)
430 && JUMP_P (PREV_INSN (insn))
431 && PATTERN (PREV_INSN (insn)) == kind)
433 rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
434 rtx_code_label *label = gen_label_rtx ();
435 LABEL_NUSES (label) = 0;
437 /* Put the label before any USE insns that may precede the RETURN
438 insn. */
439 while (GET_CODE (temp) == USE)
440 temp = PREV_INSN (temp);
442 emit_label_after (label, temp);
443 *plabel = label;
446 else if (LABEL_P (insn))
447 *plabel = as_a <rtx_code_label *> (insn);
448 else
450 rtx_code_label *label = gen_label_rtx ();
451 LABEL_NUSES (label) = 0;
452 /* If the basic block reorder pass moves the return insn to
453 some other place try to locate it again and put our
454 function_return_label there. */
455 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
456 insn = PREV_INSN (insn);
457 if (insn)
459 insn = PREV_INSN (insn);
461 /* Put the label before any USE insns that may precede the
462 RETURN insn. */
463 while (GET_CODE (insn) == USE)
464 insn = PREV_INSN (insn);
466 emit_label_after (label, insn);
468 else
470 if (targetm.have_epilogue () && ! targetm.have_return ())
471 /* The RETURN insn has its delay slot filled so we cannot
472 emit the label just before it. Since we already have
473 an epilogue and cannot emit a new RETURN, we cannot
474 emit the label at all. */
475 return NULL;
477 /* Otherwise, make a new label and emit a RETURN and BARRIER,
478 if needed. */
479 emit_label (label);
480 if (targetm.have_return ())
482 /* The return we make may have delay slots too. */
483 rtx_insn *pat = targetm.gen_return ();
484 rtx_insn *insn = emit_jump_insn (pat);
485 set_return_jump_label (insn);
486 emit_barrier ();
487 if (num_delay_slots (insn) > 0)
488 obstack_ptr_grow (&unfilled_slots_obstack, insn);
491 *plabel = label;
494 /* Show one additional use for this label so it won't go away until
495 we are done. */
496 ++LABEL_NUSES (*plabel);
498 return *plabel;
501 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
502 the pattern of INSN with the SEQUENCE.
504 Returns the insn containing the SEQUENCE that replaces INSN. */
506 static rtx_insn *
507 emit_delay_sequence (rtx_insn *insn, const vec<rtx_insn *> &list, int length)
509 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
510 rtvec seqv = rtvec_alloc (length + 1);
511 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
512 rtx_insn *seq_insn = make_insn_raw (seq);
514 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
515 not have a location, but one of the delayed insns does, we pick up a
516 location from there later. */
517 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
519 /* Unlink INSN from the insn chain, so that we can put it into
520 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
521 rtx_insn *after = PREV_INSN (insn);
522 remove_insn (insn);
523 SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
525 /* Build our SEQUENCE and rebuild the insn chain. */
526 start_sequence ();
527 XVECEXP (seq, 0, 0) = emit_insn (insn);
529 unsigned int delay_insns = list.length ();
530 gcc_assert (delay_insns == (unsigned int) length);
531 for (unsigned int i = 0; i < delay_insns; i++)
533 rtx_insn *tem = list[i];
534 rtx note, next;
536 /* Show that this copy of the insn isn't deleted. */
537 tem->set_undeleted ();
539 /* Unlink insn from its original place, and re-emit it into
540 the sequence. */
541 SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
542 XVECEXP (seq, 0, i + 1) = emit_insn (tem);
544 /* SPARC assembler, for instance, emit warning when debug info is output
545 into the delay slot. */
546 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
547 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
548 INSN_LOCATION (tem) = 0;
550 for (note = REG_NOTES (tem); note; note = next)
552 next = XEXP (note, 1);
553 switch (REG_NOTE_KIND (note))
555 case REG_DEAD:
556 /* Remove any REG_DEAD notes because we can't rely on them now
557 that the insn has been moved. */
558 remove_note (tem, note);
559 break;
561 case REG_LABEL_OPERAND:
562 case REG_LABEL_TARGET:
563 /* Keep the label reference count up to date. */
564 if (LABEL_P (XEXP (note, 0)))
565 LABEL_NUSES (XEXP (note, 0)) ++;
566 break;
568 default:
569 break;
573 end_sequence ();
575 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
576 add_insn_after (seq_insn, after, NULL);
578 return seq_insn;
581 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
582 be in the order in which the insns are to be executed. */
584 static void
585 add_to_delay_list (rtx_insn *insn, vec<rtx_insn *> *delay_list)
587 /* If INSN has its block number recorded, clear it since we may
588 be moving the insn to a new block. */
589 clear_hashed_info_for_insn (insn);
590 delay_list->safe_push (insn);
593 /* Delete INSN from the delay slot of the insn that it is in, which may
594 produce an insn with no delay slots. Return the new insn. */
596 static rtx_insn *
597 delete_from_delay_slot (rtx_insn *insn)
599 rtx_insn *trial, *seq_insn, *prev;
600 rtx_sequence *seq;
601 int i;
602 int had_barrier = 0;
604 /* We first must find the insn containing the SEQUENCE with INSN in its
605 delay slot. Do this by finding an insn, TRIAL, where
606 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
608 for (trial = insn;
609 PREV_INSN (NEXT_INSN (trial)) == trial;
610 trial = NEXT_INSN (trial))
613 seq_insn = PREV_INSN (NEXT_INSN (trial));
614 seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
616 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
617 had_barrier = 1;
619 /* Create a delay list consisting of all the insns other than the one
620 we are deleting (unless we were the only one). */
621 auto_vec<rtx_insn *, 5> delay_list;
622 if (seq->len () > 2)
623 for (i = 1; i < seq->len (); i++)
624 if (seq->insn (i) != insn)
625 add_to_delay_list (seq->insn (i), &delay_list);
627 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
628 list, and rebuild the delay list if non-empty. */
629 prev = PREV_INSN (seq_insn);
630 trial = seq->insn (0);
631 delete_related_insns (seq_insn);
632 add_insn_after (trial, prev, NULL);
634 /* If there was a barrier after the old SEQUENCE, remit it. */
635 if (had_barrier)
636 emit_barrier_after (trial);
638 /* If there are any delay insns, remit them. Otherwise clear the
639 annul flag. */
640 if (!delay_list.is_empty ())
641 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
642 else if (JUMP_P (trial))
643 INSN_ANNULLED_BRANCH_P (trial) = 0;
645 INSN_FROM_TARGET_P (insn) = 0;
647 /* Show we need to fill this insn again. */
648 obstack_ptr_grow (&unfilled_slots_obstack, trial);
650 return trial;
653 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
654 the insn that sets CC0 for it and delete it too. */
656 static void
657 delete_scheduled_jump (rtx_insn *insn)
659 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
660 delete the insn that sets the condition code, but it is hard to find it.
661 Since this case is rare anyway, don't bother trying; there would likely
662 be other insns that became dead anyway, which we wouldn't know to
663 delete. */
665 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, insn))
667 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
669 /* If a reg-note was found, it points to an insn to set CC0. This
670 insn is in the delay list of some other insn. So delete it from
671 the delay list it was in. */
672 if (note)
674 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
675 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
676 delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
678 else
680 /* The insn setting CC0 is our previous insn, but it may be in
681 a delay slot. It will be the last insn in the delay slot, if
682 it is. */
683 rtx_insn *trial = previous_insn (insn);
684 if (NOTE_P (trial))
685 trial = prev_nonnote_insn (trial);
686 if (sets_cc0_p (PATTERN (trial)) != 1
687 || FIND_REG_INC_NOTE (trial, NULL_RTX))
688 return;
689 if (PREV_INSN (NEXT_INSN (trial)) == trial)
690 delete_related_insns (trial);
691 else
692 delete_from_delay_slot (trial);
696 delete_related_insns (insn);
699 /* Counters for delay-slot filling. */
701 #define NUM_REORG_FUNCTIONS 2
702 #define MAX_DELAY_HISTOGRAM 3
703 #define MAX_REORG_PASSES 2
705 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
707 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
709 static int reorg_pass_number;
711 static void
712 note_delay_statistics (int slots_filled, int index)
714 num_insns_needing_delays[index][reorg_pass_number]++;
715 if (slots_filled > MAX_DELAY_HISTOGRAM)
716 slots_filled = MAX_DELAY_HISTOGRAM;
717 num_filled_delays[index][slots_filled][reorg_pass_number]++;
720 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
722 /* Optimize the following cases:
724 1. When a conditional branch skips over only one instruction,
725 use an annulling branch and put that insn in the delay slot.
726 Use either a branch that annuls when the condition if true or
727 invert the test with a branch that annuls when the condition is
728 false. This saves insns, since otherwise we must copy an insn
729 from the L1 target.
731 (orig) (skip) (otherwise)
732 Bcc.n L1 Bcc',a L1 Bcc,a L1'
733 insn insn insn2
734 L1: L1: L1:
735 insn2 insn2 insn2
736 insn3 insn3 L1':
737 insn3
739 2. When a conditional branch skips over only one instruction,
740 and after that, it unconditionally branches somewhere else,
741 perform the similar optimization. This saves executing the
742 second branch in the case where the inverted condition is true.
744 Bcc.n L1 Bcc',a L2
745 insn insn
746 L1: L1:
747 Bra L2 Bra L2
749 INSN is a JUMP_INSN.
751 This should be expanded to skip over N insns, where N is the number
752 of delay slots required. */
754 static void
755 optimize_skip (rtx_jump_insn *insn, vec<rtx_insn *> *delay_list)
757 rtx_insn *trial = next_nonnote_insn (insn);
758 rtx_insn *next_trial = next_active_insn (trial);
759 int flags;
761 flags = get_jump_flags (insn, JUMP_LABEL (insn));
763 if (trial == 0
764 || !NONJUMP_INSN_P (trial)
765 || GET_CODE (PATTERN (trial)) == SEQUENCE
766 || recog_memoized (trial) < 0
767 || (! eligible_for_annul_false (insn, 0, trial, flags)
768 && ! eligible_for_annul_true (insn, 0, trial, flags))
769 || can_throw_internal (trial))
770 return;
772 /* There are two cases where we are just executing one insn (we assume
773 here that a branch requires only one insn; this should be generalized
774 at some point): Where the branch goes around a single insn or where
775 we have one insn followed by a branch to the same label we branch to.
776 In both of these cases, inverting the jump and annulling the delay
777 slot give the same effect in fewer insns. */
778 if (next_trial == next_active_insn (JUMP_LABEL (insn))
779 || (next_trial != 0
780 && simplejump_or_return_p (next_trial)
781 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
783 if (eligible_for_annul_false (insn, 0, trial, flags))
785 if (invert_jump (insn, JUMP_LABEL (insn), 1))
786 INSN_FROM_TARGET_P (trial) = 1;
787 else if (! eligible_for_annul_true (insn, 0, trial, flags))
788 return;
791 add_to_delay_list (trial, delay_list);
792 next_trial = next_active_insn (trial);
793 update_block (trial, trial);
794 delete_related_insns (trial);
796 /* Also, if we are targeting an unconditional
797 branch, thread our jump to the target of that branch. Don't
798 change this into a RETURN here, because it may not accept what
799 we have in the delay slot. We'll fix this up later. */
800 if (next_trial && simplejump_or_return_p (next_trial))
802 rtx target_label = JUMP_LABEL (next_trial);
803 if (ANY_RETURN_P (target_label))
804 target_label = find_end_label (target_label);
806 if (target_label)
808 /* Recompute the flags based on TARGET_LABEL since threading
809 the jump to TARGET_LABEL may change the direction of the
810 jump (which may change the circumstances in which the
811 delay slot is nullified). */
812 flags = get_jump_flags (insn, target_label);
813 if (eligible_for_annul_true (insn, 0, trial, flags))
814 reorg_redirect_jump (insn, target_label);
818 INSN_ANNULLED_BRANCH_P (insn) = 1;
821 #endif
823 /* Encode and return branch direction and prediction information for
824 INSN assuming it will jump to LABEL.
826 Non conditional branches return no direction information and
827 are predicted as very likely taken. */
829 static int
830 get_jump_flags (const rtx_insn *insn, rtx label)
832 int flags;
834 /* get_jump_flags can be passed any insn with delay slots, these may
835 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
836 direction information, and only if they are conditional jumps.
838 If LABEL is a return, then there is no way to determine the branch
839 direction. */
840 if (JUMP_P (insn)
841 && (condjump_p (insn) || condjump_in_parallel_p (insn))
842 && !ANY_RETURN_P (label)
843 && INSN_UID (insn) <= max_uid
844 && INSN_UID (label) <= max_uid)
845 flags
846 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
847 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
848 /* No valid direction information. */
849 else
850 flags = 0;
852 return flags;
855 /* Return truth value of the statement that this branch
856 is mostly taken. If we think that the branch is extremely likely
857 to be taken, we return 2. If the branch is slightly more likely to be
858 taken, return 1. If the branch is slightly less likely to be taken,
859 return 0 and if the branch is highly unlikely to be taken, return -1. */
861 static int
862 mostly_true_jump (rtx jump_insn)
864 /* If branch probabilities are available, then use that number since it
865 always gives a correct answer. */
866 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
867 if (note)
869 int prob = XINT (note, 0);
871 if (prob >= REG_BR_PROB_BASE * 9 / 10)
872 return 2;
873 else if (prob >= REG_BR_PROB_BASE / 2)
874 return 1;
875 else if (prob >= REG_BR_PROB_BASE / 10)
876 return 0;
877 else
878 return -1;
881 /* If there is no note, assume branches are not taken.
882 This should be rare. */
883 return 0;
886 /* Return the condition under which INSN will branch to TARGET. If TARGET
887 is zero, return the condition under which INSN will return. If INSN is
888 an unconditional branch, return const_true_rtx. If INSN isn't a simple
889 type of jump, or it doesn't go to TARGET, return 0. */
891 static rtx
892 get_branch_condition (const rtx_insn *insn, rtx target)
894 rtx pat = PATTERN (insn);
895 rtx src;
897 if (condjump_in_parallel_p (insn))
898 pat = XVECEXP (pat, 0, 0);
900 if (ANY_RETURN_P (pat) && pat == target)
901 return const_true_rtx;
903 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
904 return 0;
906 src = SET_SRC (pat);
907 if (GET_CODE (src) == LABEL_REF && LABEL_REF_LABEL (src) == target)
908 return const_true_rtx;
910 else if (GET_CODE (src) == IF_THEN_ELSE
911 && XEXP (src, 2) == pc_rtx
912 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
913 && LABEL_REF_LABEL (XEXP (src, 1)) == target)
914 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
915 return XEXP (src, 0);
917 else if (GET_CODE (src) == IF_THEN_ELSE
918 && XEXP (src, 1) == pc_rtx
919 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
920 && LABEL_REF_LABEL (XEXP (src, 2)) == target)
921 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
923 enum rtx_code rev;
924 rev = reversed_comparison_code (XEXP (src, 0), insn);
925 if (rev != UNKNOWN)
926 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
927 XEXP (XEXP (src, 0), 0),
928 XEXP (XEXP (src, 0), 1));
931 return 0;
934 /* Return nonzero if CONDITION is more strict than the condition of
935 INSN, i.e., if INSN will always branch if CONDITION is true. */
937 static int
938 condition_dominates_p (rtx condition, const rtx_insn *insn)
940 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
941 enum rtx_code code = GET_CODE (condition);
942 enum rtx_code other_code;
944 if (rtx_equal_p (condition, other_condition)
945 || other_condition == const_true_rtx)
946 return 1;
948 else if (condition == const_true_rtx || other_condition == 0)
949 return 0;
951 other_code = GET_CODE (other_condition);
952 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
953 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
954 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
955 return 0;
957 return comparison_dominates_p (code, other_code);
960 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
961 any insns already in the delay slot of JUMP. */
963 static int
964 redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
966 int flags, i;
967 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
969 /* Make sure all the delay slots of this jump would still
970 be valid after threading the jump. If they are still
971 valid, then return nonzero. */
973 flags = get_jump_flags (jump, newlabel);
974 for (i = 1; i < pat->len (); i++)
975 if (! (
976 #ifdef ANNUL_IFFALSE_SLOTS
977 (INSN_ANNULLED_BRANCH_P (jump)
978 && INSN_FROM_TARGET_P (pat->insn (i)))
979 ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
980 #endif
981 #ifdef ANNUL_IFTRUE_SLOTS
982 (INSN_ANNULLED_BRANCH_P (jump)
983 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
984 ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
985 #endif
986 eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
987 break;
989 return (i == pat->len ());
992 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
993 any insns we wish to place in the delay slot of JUMP. */
995 static int
996 redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
997 const vec<rtx_insn *> &delay_list)
999 /* Make sure all the insns in DELAY_LIST would still be
1000 valid after threading the jump. If they are still
1001 valid, then return nonzero. */
1003 int flags = get_jump_flags (jump, newlabel);
1004 unsigned int delay_insns = delay_list.length ();
1005 unsigned int i = 0;
1006 for (; i < delay_insns; i++)
1007 if (! (
1008 #ifdef ANNUL_IFFALSE_SLOTS
1009 (INSN_ANNULLED_BRANCH_P (jump)
1010 && INSN_FROM_TARGET_P (delay_list[i]))
1011 ? eligible_for_annul_false (jump, i, delay_list[i], flags) :
1012 #endif
1013 #ifdef ANNUL_IFTRUE_SLOTS
1014 (INSN_ANNULLED_BRANCH_P (jump)
1015 && ! INSN_FROM_TARGET_P (delay_list[i]))
1016 ? eligible_for_annul_true (jump, i, delay_list[i], flags) :
1017 #endif
1018 eligible_for_delay (jump, i, delay_list[i], flags)))
1019 break;
1021 return i == delay_insns;
1024 /* DELAY_LIST is a list of insns that have already been placed into delay
1025 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1026 If not, return 0; otherwise return 1. */
1028 static int
1029 check_annul_list_true_false (int annul_true_p,
1030 const vec<rtx_insn *> &delay_list)
1032 rtx_insn *trial;
1033 unsigned int i;
1034 FOR_EACH_VEC_ELT (delay_list, i, trial)
1035 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1036 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1037 return 0;
1039 return 1;
1042 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1043 the condition tested by INSN is CONDITION and the resources shown in
1044 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1045 from SEQ's delay list, in addition to whatever insns it may execute
1046 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1047 needed while searching for delay slot insns. Return the concatenated
1048 delay list if possible, otherwise, return 0.
1050 SLOTS_TO_FILL is the total number of slots required by INSN, and
1051 PSLOTS_FILLED points to the number filled so far (also the number of
1052 insns in DELAY_LIST). It is updated with the number that have been
1053 filled from the SEQUENCE, if any.
1055 PANNUL_P points to a nonzero value if we already know that we need
1056 to annul INSN. If this routine determines that annulling is needed,
1057 it may set that value nonzero.
1059 PNEW_THREAD points to a location that is to receive the place at which
1060 execution should continue. */
1062 static void
1063 steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
1064 vec<rtx_insn *> *delay_list, resources *sets,
1065 struct resources *needed,
1066 struct resources *other_needed,
1067 int slots_to_fill, int *pslots_filled,
1068 int *pannul_p, rtx *pnew_thread)
1070 int slots_remaining = slots_to_fill - *pslots_filled;
1071 int total_slots_filled = *pslots_filled;
1072 auto_vec<rtx_insn *, 5> new_delay_list;
1073 int must_annul = *pannul_p;
1074 int used_annul = 0;
1075 int i;
1076 struct resources cc_set;
1077 bool *redundant;
1079 /* We can't do anything if there are more delay slots in SEQ than we
1080 can handle, or if we don't know that it will be a taken branch.
1081 We know that it will be a taken branch if it is either an unconditional
1082 branch or a conditional branch with a stricter branch condition.
1084 Also, exit if the branch has more than one set, since then it is computing
1085 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1086 ??? It may be possible to move other sets into INSN in addition to
1087 moving the instructions in the delay slots.
1089 We can not steal the delay list if one of the instructions in the
1090 current delay_list modifies the condition codes and the jump in the
1091 sequence is a conditional jump. We can not do this because we can
1092 not change the direction of the jump because the condition codes
1093 will effect the direction of the jump in the sequence. */
1095 CLEAR_RESOURCE (&cc_set);
1097 rtx_insn *trial;
1098 FOR_EACH_VEC_ELT (*delay_list, i, trial)
1100 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1101 if (insn_references_resource_p (seq->insn (0), &cc_set, false))
1102 return;
1105 if (XVECLEN (seq, 0) - 1 > slots_remaining
1106 || ! condition_dominates_p (condition, seq->insn (0))
1107 || ! single_set (seq->insn (0)))
1108 return;
1110 /* On some targets, branches with delay slots can have a limited
1111 displacement. Give the back end a chance to tell us we can't do
1112 this. */
1113 if (! targetm.can_follow_jump (insn, seq->insn (0)))
1114 return;
1116 redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
1117 for (i = 1; i < seq->len (); i++)
1119 rtx_insn *trial = seq->insn (i);
1120 int flags;
1122 if (insn_references_resource_p (trial, sets, false)
1123 || insn_sets_resource_p (trial, needed, false)
1124 || insn_sets_resource_p (trial, sets, false)
1125 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1126 delay list. */
1127 || (HAVE_cc0 && find_reg_note (trial, REG_CC_USER, NULL_RTX))
1128 /* If TRIAL is from the fallthrough code of an annulled branch insn
1129 in SEQ, we cannot use it. */
1130 || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
1131 && ! INSN_FROM_TARGET_P (trial)))
1132 return;
1134 /* If this insn was already done (usually in a previous delay slot),
1135 pretend we put it in our delay slot. */
1136 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1137 if (redundant[i])
1138 continue;
1140 /* We will end up re-vectoring this branch, so compute flags
1141 based on jumping to the new label. */
1142 flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
1144 if (! must_annul
1145 && ((condition == const_true_rtx
1146 || (! insn_sets_resource_p (trial, other_needed, false)
1147 && ! may_trap_or_fault_p (PATTERN (trial)))))
1148 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1149 : (must_annul || (delay_list->is_empty () && new_delay_list.is_empty ()))
1150 && (must_annul = 1,
1151 check_annul_list_true_false (0, *delay_list)
1152 && check_annul_list_true_false (0, new_delay_list)
1153 && eligible_for_annul_false (insn, total_slots_filled,
1154 trial, flags)))
1156 if (must_annul)
1157 used_annul = 1;
1158 rtx_insn *temp = copy_delay_slot_insn (trial);
1159 INSN_FROM_TARGET_P (temp) = 1;
1160 add_to_delay_list (temp, &new_delay_list);
1161 total_slots_filled++;
1163 if (--slots_remaining == 0)
1164 break;
1166 else
1167 return;
1170 /* Record the effect of the instructions that were redundant and which
1171 we therefore decided not to copy. */
1172 for (i = 1; i < seq->len (); i++)
1173 if (redundant[i])
1174 update_block (seq->insn (i), insn);
1176 /* Show the place to which we will be branching. */
1177 *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0)));
1179 /* Add any new insns to the delay list and update the count of the
1180 number of slots filled. */
1181 *pslots_filled = total_slots_filled;
1182 if (used_annul)
1183 *pannul_p = 1;
1185 rtx_insn *temp;
1186 FOR_EACH_VEC_ELT (new_delay_list, i, temp)
1187 add_to_delay_list (temp, delay_list);
1190 /* Similar to steal_delay_list_from_target except that SEQ is on the
1191 fallthrough path of INSN. Here we only do something if the delay insn
1192 of SEQ is an unconditional branch. In that case we steal its delay slot
1193 for INSN since unconditional branches are much easier to fill. */
1195 static void
1196 steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
1197 rtx_sequence *seq,
1198 vec<rtx_insn *> *delay_list,
1199 struct resources *sets,
1200 struct resources *needed,
1201 struct resources *other_needed,
1202 int slots_to_fill, int *pslots_filled,
1203 int *pannul_p)
1205 int i;
1206 int flags;
1207 int must_annul = *pannul_p;
1208 int used_annul = 0;
1210 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1212 /* We can't do anything if SEQ's delay insn isn't an
1213 unconditional branch. */
1215 if (! simplejump_or_return_p (seq->insn (0)))
1216 return;
1218 for (i = 1; i < seq->len (); i++)
1220 rtx_insn *trial = seq->insn (i);
1222 /* If TRIAL sets CC0, stealing it will move it too far from the use
1223 of CC0. */
1224 if (insn_references_resource_p (trial, sets, false)
1225 || insn_sets_resource_p (trial, needed, false)
1226 || insn_sets_resource_p (trial, sets, false)
1227 || (HAVE_cc0 && sets_cc0_p (PATTERN (trial))))
1229 break;
1231 /* If this insn was already done, we don't need it. */
1232 if (redundant_insn (trial, insn, *delay_list))
1234 update_block (trial, insn);
1235 delete_from_delay_slot (trial);
1236 continue;
1239 if (! must_annul
1240 && ((condition == const_true_rtx
1241 || (! insn_sets_resource_p (trial, other_needed, false)
1242 && ! may_trap_or_fault_p (PATTERN (trial)))))
1243 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1244 : (must_annul || delay_list->is_empty ()) && (must_annul = 1,
1245 check_annul_list_true_false (1, *delay_list)
1246 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1248 if (must_annul)
1249 used_annul = 1;
1250 delete_from_delay_slot (trial);
1251 add_to_delay_list (trial, delay_list);
1253 if (++(*pslots_filled) == slots_to_fill)
1254 break;
1256 else
1257 break;
1260 if (used_annul)
1261 *pannul_p = 1;
1264 /* Try merging insns starting at THREAD which match exactly the insns in
1265 INSN's delay list.
1267 If all insns were matched and the insn was previously annulling, the
1268 annul bit will be cleared.
1270 For each insn that is merged, if the branch is or will be non-annulling,
1271 we delete the merged insn. */
1273 static void
1274 try_merge_delay_insns (rtx_insn *insn, rtx_insn *thread)
1276 rtx_insn *trial, *next_trial;
1277 rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
1278 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1279 int slot_number = 1;
1280 int num_slots = XVECLEN (PATTERN (insn), 0);
1281 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1282 struct resources set, needed, modified;
1283 rtx_insn_list *merged_insns = 0;
1284 int i, j;
1285 int flags;
1287 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1289 CLEAR_RESOURCE (&needed);
1290 CLEAR_RESOURCE (&set);
1292 /* If this is not an annulling branch, take into account anything needed in
1293 INSN's delay slot. This prevents two increments from being incorrectly
1294 folded into one. If we are annulling, this would be the correct
1295 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1296 will essentially disable this optimization. This method is somewhat of
1297 a kludge, but I don't see a better way.) */
1298 if (! annul_p)
1299 for (i = 1 ; i < num_slots; i++)
1300 if (XVECEXP (PATTERN (insn), 0, i))
1301 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1302 true);
1304 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1306 rtx pat = PATTERN (trial);
1307 rtx oldtrial = trial;
1309 next_trial = next_nonnote_insn (trial);
1311 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1312 if (NONJUMP_INSN_P (trial)
1313 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1314 continue;
1316 if (GET_CODE (next_to_match) == GET_CODE (trial)
1317 /* We can't share an insn that sets cc0. */
1318 && (!HAVE_cc0 || ! sets_cc0_p (pat))
1319 && ! insn_references_resource_p (trial, &set, true)
1320 && ! insn_sets_resource_p (trial, &set, true)
1321 && ! insn_sets_resource_p (trial, &needed, true)
1322 && (trial = try_split (pat, trial, 0)) != 0
1323 /* Update next_trial, in case try_split succeeded. */
1324 && (next_trial = next_nonnote_insn (trial))
1325 /* Likewise THREAD. */
1326 && (thread = oldtrial == thread ? trial : thread)
1327 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1328 /* Have to test this condition if annul condition is different
1329 from (and less restrictive than) non-annulling one. */
1330 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1333 if (! annul_p)
1335 update_block (trial, thread);
1336 if (trial == thread)
1337 thread = next_active_insn (thread);
1339 delete_related_insns (trial);
1340 INSN_FROM_TARGET_P (next_to_match) = 0;
1342 else
1343 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1345 if (++slot_number == num_slots)
1346 break;
1348 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1351 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1352 mark_referenced_resources (trial, &needed, true);
1355 /* See if we stopped on a filled insn. If we did, try to see if its
1356 delay slots match. */
1357 if (slot_number != num_slots
1358 && trial && NONJUMP_INSN_P (trial)
1359 && GET_CODE (PATTERN (trial)) == SEQUENCE
1360 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1361 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1363 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
1364 rtx filled_insn = XVECEXP (pat, 0, 0);
1366 /* Account for resources set/needed by the filled insn. */
1367 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1368 mark_referenced_resources (filled_insn, &needed, true);
1370 for (i = 1; i < pat->len (); i++)
1372 rtx_insn *dtrial = pat->insn (i);
1374 CLEAR_RESOURCE (&modified);
1375 /* Account for resources set by the insn following NEXT_TO_MATCH
1376 inside INSN's delay list. */
1377 for (j = 1; slot_number + j < num_slots; j++)
1378 mark_set_resources (XVECEXP (PATTERN (insn), 0, slot_number + j),
1379 &modified, 0, MARK_SRC_DEST_CALL);
1380 /* Account for resources set by the insn before DTRIAL and inside
1381 TRIAL's delay list. */
1382 for (j = 1; j < i; j++)
1383 mark_set_resources (XVECEXP (pat, 0, j),
1384 &modified, 0, MARK_SRC_DEST_CALL);
1385 if (! insn_references_resource_p (dtrial, &set, true)
1386 && ! insn_sets_resource_p (dtrial, &set, true)
1387 && ! insn_sets_resource_p (dtrial, &needed, true)
1388 && (!HAVE_cc0 || ! sets_cc0_p (PATTERN (dtrial)))
1389 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1390 /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
1391 resource modified between them (only dtrial is checked because
1392 next_to_match and dtrial shall to be equal in order to hit
1393 this line) */
1394 && ! insn_references_resource_p (dtrial, &modified, true)
1395 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1397 if (! annul_p)
1399 rtx_insn *new_rtx;
1401 update_block (dtrial, thread);
1402 new_rtx = delete_from_delay_slot (dtrial);
1403 if (thread->deleted ())
1404 thread = new_rtx;
1405 INSN_FROM_TARGET_P (next_to_match) = 0;
1407 else
1408 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1409 merged_insns);
1411 if (++slot_number == num_slots)
1412 break;
1414 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1416 else
1418 /* Keep track of the set/referenced resources for the delay
1419 slots of any trial insns we encounter. */
1420 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1421 mark_referenced_resources (dtrial, &needed, true);
1426 /* If all insns in the delay slot have been matched and we were previously
1427 annulling the branch, we need not any more. In that case delete all the
1428 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1429 the delay list so that we know that it isn't only being used at the
1430 target. */
1431 if (slot_number == num_slots && annul_p)
1433 for (; merged_insns; merged_insns = merged_insns->next ())
1435 if (GET_MODE (merged_insns) == SImode)
1437 rtx_insn *new_rtx;
1439 update_block (merged_insns->insn (), thread);
1440 new_rtx = delete_from_delay_slot (merged_insns->insn ());
1441 if (thread->deleted ())
1442 thread = new_rtx;
1444 else
1446 update_block (merged_insns->insn (), thread);
1447 delete_related_insns (merged_insns->insn ());
1451 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1453 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1454 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1458 /* See if INSN is redundant with an insn in front of TARGET. Often this
1459 is called when INSN is a candidate for a delay slot of TARGET.
1460 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1461 of INSN. Often INSN will be redundant with an insn in a delay slot of
1462 some previous insn. This happens when we have a series of branches to the
1463 same label; in that case the first insn at the target might want to go
1464 into each of the delay slots.
1466 If we are not careful, this routine can take up a significant fraction
1467 of the total compilation time (4%), but only wins rarely. Hence we
1468 speed this routine up by making two passes. The first pass goes back
1469 until it hits a label and sees if it finds an insn with an identical
1470 pattern. Only in this (relatively rare) event does it check for
1471 data conflicts.
1473 We do not split insns we encounter. This could cause us not to find a
1474 redundant insn, but the cost of splitting seems greater than the possible
1475 gain in rare cases. */
1477 static rtx
1478 redundant_insn (rtx insn, rtx_insn *target, const vec<rtx_insn *> &delay_list)
1480 rtx target_main = target;
1481 rtx ipat = PATTERN (insn);
1482 rtx_insn *trial;
1483 rtx pat;
1484 struct resources needed, set;
1485 int i;
1486 unsigned insns_to_search;
1488 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1489 are allowed to not actually assign to such a register. */
1490 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1491 return 0;
1493 /* Scan backwards looking for a match. */
1494 for (trial = PREV_INSN (target),
1495 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1496 trial && insns_to_search > 0;
1497 trial = PREV_INSN (trial))
1499 /* (use (insn))s can come immediately after a barrier if the
1500 label that used to precede them has been deleted as dead.
1501 See delete_related_insns. */
1502 if (LABEL_P (trial) || BARRIER_P (trial))
1503 return 0;
1505 if (!INSN_P (trial))
1506 continue;
1507 --insns_to_search;
1509 pat = PATTERN (trial);
1510 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1511 continue;
1513 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1515 /* Stop for a CALL and its delay slots because it is difficult to
1516 track its resource needs correctly. */
1517 if (CALL_P (seq->element (0)))
1518 return 0;
1520 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1521 slots because it is difficult to track its resource needs
1522 correctly. */
1524 if (INSN_SETS_ARE_DELAYED (seq->insn (0)))
1525 return 0;
1527 if (INSN_REFERENCES_ARE_DELAYED (seq->insn (0)))
1528 return 0;
1530 /* See if any of the insns in the delay slot match, updating
1531 resource requirements as we go. */
1532 for (i = seq->len () - 1; i > 0; i--)
1533 if (GET_CODE (seq->element (i)) == GET_CODE (insn)
1534 && rtx_equal_p (PATTERN (seq->element (i)), ipat)
1535 && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
1536 break;
1538 /* If found a match, exit this loop early. */
1539 if (i > 0)
1540 break;
1543 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1544 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1545 break;
1548 /* If we didn't find an insn that matches, return 0. */
1549 if (trial == 0)
1550 return 0;
1552 /* See what resources this insn sets and needs. If they overlap, or
1553 if this insn references CC0, it can't be redundant. */
1555 CLEAR_RESOURCE (&needed);
1556 CLEAR_RESOURCE (&set);
1557 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1558 mark_referenced_resources (insn, &needed, true);
1560 /* If TARGET is a SEQUENCE, get the main insn. */
1561 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1562 target_main = XVECEXP (PATTERN (target), 0, 0);
1564 if (resource_conflicts_p (&needed, &set)
1565 || (HAVE_cc0 && reg_mentioned_p (cc0_rtx, ipat))
1566 /* The insn requiring the delay may not set anything needed or set by
1567 INSN. */
1568 || insn_sets_resource_p (target_main, &needed, true)
1569 || insn_sets_resource_p (target_main, &set, true))
1570 return 0;
1572 /* Insns we pass may not set either NEEDED or SET, so merge them for
1573 simpler tests. */
1574 needed.memory |= set.memory;
1575 IOR_HARD_REG_SET (needed.regs, set.regs);
1577 /* This insn isn't redundant if it conflicts with an insn that either is
1578 or will be in a delay slot of TARGET. */
1580 unsigned int j;
1581 rtx_insn *temp;
1582 FOR_EACH_VEC_ELT (delay_list, j, temp)
1583 if (insn_sets_resource_p (temp, &needed, true))
1584 return 0;
1586 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1587 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1588 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1589 true))
1590 return 0;
1592 /* Scan backwards until we reach a label or an insn that uses something
1593 INSN sets or sets something insn uses or sets. */
1595 for (trial = PREV_INSN (target),
1596 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1597 trial && !LABEL_P (trial) && insns_to_search > 0;
1598 trial = PREV_INSN (trial))
1600 if (!INSN_P (trial))
1601 continue;
1602 --insns_to_search;
1604 pat = PATTERN (trial);
1605 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1606 continue;
1608 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1610 bool annul_p = false;
1611 rtx_insn *control = seq->insn (0);
1613 /* If this is a CALL_INSN and its delay slots, it is hard to track
1614 the resource needs properly, so give up. */
1615 if (CALL_P (control))
1616 return 0;
1618 /* If this is an INSN or JUMP_INSN with delayed effects, it
1619 is hard to track the resource needs properly, so give up. */
1621 if (INSN_SETS_ARE_DELAYED (control))
1622 return 0;
1624 if (INSN_REFERENCES_ARE_DELAYED (control))
1625 return 0;
1627 if (JUMP_P (control))
1628 annul_p = INSN_ANNULLED_BRANCH_P (control);
1630 /* See if any of the insns in the delay slot match, updating
1631 resource requirements as we go. */
1632 for (i = seq->len () - 1; i > 0; i--)
1634 rtx candidate = seq->element (i);
1636 /* If an insn will be annulled if the branch is false, it isn't
1637 considered as a possible duplicate insn. */
1638 if (rtx_equal_p (PATTERN (candidate), ipat)
1639 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1641 /* Show that this insn will be used in the sequel. */
1642 INSN_FROM_TARGET_P (candidate) = 0;
1643 return candidate;
1646 /* Unless this is an annulled insn from the target of a branch,
1647 we must stop if it sets anything needed or set by INSN. */
1648 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1649 && insn_sets_resource_p (candidate, &needed, true))
1650 return 0;
1653 /* If the insn requiring the delay slot conflicts with INSN, we
1654 must stop. */
1655 if (insn_sets_resource_p (control, &needed, true))
1656 return 0;
1658 else
1660 /* See if TRIAL is the same as INSN. */
1661 pat = PATTERN (trial);
1662 if (rtx_equal_p (pat, ipat))
1663 return trial;
1665 /* Can't go any further if TRIAL conflicts with INSN. */
1666 if (insn_sets_resource_p (trial, &needed, true))
1667 return 0;
1671 return 0;
1674 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1675 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1676 is nonzero, we are allowed to fall into this thread; otherwise, we are
1677 not.
1679 If LABEL is used more than one or we pass a label other than LABEL before
1680 finding an active insn, we do not own this thread. */
1682 static int
1683 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1685 rtx_insn *active_insn;
1686 rtx_insn *insn;
1688 /* We don't own the function end. */
1689 if (thread == 0 || ANY_RETURN_P (thread))
1690 return 0;
1692 /* We have a non-NULL insn. */
1693 rtx_insn *thread_insn = as_a <rtx_insn *> (thread);
1695 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1696 active_insn = next_active_insn (PREV_INSN (thread_insn));
1698 for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn))
1699 if (LABEL_P (insn)
1700 && (insn != label || LABEL_NUSES (insn) != 1))
1701 return 0;
1703 if (allow_fallthrough)
1704 return 1;
1706 /* Ensure that we reach a BARRIER before any insn or label. */
1707 for (insn = prev_nonnote_insn (thread_insn);
1708 insn == 0 || !BARRIER_P (insn);
1709 insn = prev_nonnote_insn (insn))
1710 if (insn == 0
1711 || LABEL_P (insn)
1712 || (NONJUMP_INSN_P (insn)
1713 && GET_CODE (PATTERN (insn)) != USE
1714 && GET_CODE (PATTERN (insn)) != CLOBBER))
1715 return 0;
1717 return 1;
1720 /* Called when INSN is being moved from a location near the target of a jump.
1721 We leave a marker of the form (use (INSN)) immediately in front
1722 of WHERE for mark_target_live_regs. These markers will be deleted when
1723 reorg finishes.
1725 We used to try to update the live status of registers if WHERE is at
1726 the start of a basic block, but that can't work since we may remove a
1727 BARRIER in relax_delay_slots. */
1729 static void
1730 update_block (rtx_insn *insn, rtx where)
1732 /* Ignore if this was in a delay slot and it came from the target of
1733 a branch. */
1734 if (INSN_FROM_TARGET_P (insn))
1735 return;
1737 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1739 /* INSN might be making a value live in a block where it didn't use to
1740 be. So recompute liveness information for this block. */
1742 incr_ticks_for_insn (insn);
1745 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1746 the basic block containing the jump. */
1748 static int
1749 reorg_redirect_jump (rtx_jump_insn *jump, rtx nlabel)
1751 incr_ticks_for_insn (jump);
1752 return redirect_jump (jump, nlabel, 1);
1755 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1756 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1757 that reference values used in INSN. If we find one, then we move the
1758 REG_DEAD note to INSN.
1760 This is needed to handle the case where a later insn (after INSN) has a
1761 REG_DEAD note for a register used by INSN, and this later insn subsequently
1762 gets moved before a CODE_LABEL because it is a redundant insn. In this
1763 case, mark_target_live_regs may be confused into thinking the register
1764 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1766 static void
1767 update_reg_dead_notes (rtx_insn *insn, rtx_insn *delayed_insn)
1769 rtx link, next;
1770 rtx_insn *p;
1772 for (p = next_nonnote_insn (insn); p != delayed_insn;
1773 p = next_nonnote_insn (p))
1774 for (link = REG_NOTES (p); link; link = next)
1776 next = XEXP (link, 1);
1778 if (REG_NOTE_KIND (link) != REG_DEAD
1779 || !REG_P (XEXP (link, 0)))
1780 continue;
1782 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1784 /* Move the REG_DEAD note from P to INSN. */
1785 remove_note (p, link);
1786 XEXP (link, 1) = REG_NOTES (insn);
1787 REG_NOTES (insn) = link;
1792 /* Called when an insn redundant with start_insn is deleted. If there
1793 is a REG_DEAD note for the target of start_insn between start_insn
1794 and stop_insn, then the REG_DEAD note needs to be deleted since the
1795 value no longer dies there.
1797 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1798 confused into thinking the register is dead. */
1800 static void
1801 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1803 rtx link, next;
1804 rtx_insn *p;
1806 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1807 p = next_nonnote_insn (p))
1808 for (link = REG_NOTES (p); link; link = next)
1810 next = XEXP (link, 1);
1812 if (REG_NOTE_KIND (link) != REG_DEAD
1813 || !REG_P (XEXP (link, 0)))
1814 continue;
1816 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1818 remove_note (p, link);
1819 return;
1824 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1826 This handles the case of udivmodXi4 instructions which optimize their
1827 output depending on whether any REG_UNUSED notes are present.
1828 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1829 does. */
1831 static void
1832 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1834 rtx link, next;
1836 for (link = REG_NOTES (insn); link; link = next)
1838 next = XEXP (link, 1);
1840 if (REG_NOTE_KIND (link) != REG_UNUSED
1841 || !REG_P (XEXP (link, 0)))
1842 continue;
1844 if (! find_regno_note (redundant_insn, REG_UNUSED,
1845 REGNO (XEXP (link, 0))))
1846 remove_note (insn, link);
1850 static vec <rtx> sibling_labels;
1852 /* Return the label before INSN, or put a new label there. If SIBLING is
1853 non-zero, it is another label associated with the new label (if any),
1854 typically the former target of the jump that will be redirected to
1855 the new label. */
1857 static rtx_insn *
1858 get_label_before (rtx_insn *insn, rtx sibling)
1860 rtx_insn *label;
1862 /* Find an existing label at this point
1863 or make a new one if there is none. */
1864 label = prev_nonnote_insn (insn);
1866 if (label == 0 || !LABEL_P (label))
1868 rtx_insn *prev = PREV_INSN (insn);
1870 label = gen_label_rtx ();
1871 emit_label_after (label, prev);
1872 LABEL_NUSES (label) = 0;
1873 if (sibling)
1875 sibling_labels.safe_push (label);
1876 sibling_labels.safe_push (sibling);
1879 return label;
1882 /* Scan a function looking for insns that need a delay slot and find insns to
1883 put into the delay slot.
1885 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1886 as calls). We do these first since we don't want jump insns (that are
1887 easier to fill) to get the only insns that could be used for non-jump insns.
1888 When it is zero, only try to fill JUMP_INSNs.
1890 When slots are filled in this manner, the insns (including the
1891 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1892 it is possible to tell whether a delay slot has really been filled
1893 or not. `final' knows how to deal with this, by communicating
1894 through FINAL_SEQUENCE. */
1896 static void
1897 fill_simple_delay_slots (int non_jumps_p)
1899 rtx_insn *insn, *trial, *next_trial;
1900 rtx pat;
1901 int i;
1902 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1903 struct resources needed, set;
1904 int slots_to_fill, slots_filled;
1905 auto_vec<rtx_insn *, 5> delay_list;
1907 for (i = 0; i < num_unfilled_slots; i++)
1909 int flags;
1910 /* Get the next insn to fill. If it has already had any slots assigned,
1911 we can't do anything with it. Maybe we'll improve this later. */
1913 insn = unfilled_slots_base[i];
1914 if (insn == 0
1915 || insn->deleted ()
1916 || (NONJUMP_INSN_P (insn)
1917 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1918 || (JUMP_P (insn) && non_jumps_p)
1919 || (!JUMP_P (insn) && ! non_jumps_p))
1920 continue;
1922 /* It may have been that this insn used to need delay slots, but
1923 now doesn't; ignore in that case. This can happen, for example,
1924 on the HP PA RISC, where the number of delay slots depends on
1925 what insns are nearby. */
1926 slots_to_fill = num_delay_slots (insn);
1928 /* Some machine description have defined instructions to have
1929 delay slots only in certain circumstances which may depend on
1930 nearby insns (which change due to reorg's actions).
1932 For example, the PA port normally has delay slots for unconditional
1933 jumps.
1935 However, the PA port claims such jumps do not have a delay slot
1936 if they are immediate successors of certain CALL_INSNs. This
1937 allows the port to favor filling the delay slot of the call with
1938 the unconditional jump. */
1939 if (slots_to_fill == 0)
1940 continue;
1942 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1943 says how many. After initialization, first try optimizing
1945 call _foo call _foo
1946 nop add %o7,.-L1,%o7
1947 b,a L1
1950 If this case applies, the delay slot of the call is filled with
1951 the unconditional jump. This is done first to avoid having the
1952 delay slot of the call filled in the backward scan. Also, since
1953 the unconditional jump is likely to also have a delay slot, that
1954 insn must exist when it is subsequently scanned.
1956 This is tried on each insn with delay slots as some machines
1957 have insns which perform calls, but are not represented as
1958 CALL_INSNs. */
1960 slots_filled = 0;
1961 delay_list.truncate (0);
1963 if (JUMP_P (insn))
1964 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1965 else
1966 flags = get_jump_flags (insn, NULL_RTX);
1968 if ((trial = next_active_insn (insn))
1969 && JUMP_P (trial)
1970 && simplejump_p (trial)
1971 && eligible_for_delay (insn, slots_filled, trial, flags)
1972 && no_labels_between_p (insn, trial)
1973 && ! can_throw_internal (trial))
1975 rtx_insn **tmp;
1976 slots_filled++;
1977 add_to_delay_list (trial, &delay_list);
1979 /* TRIAL may have had its delay slot filled, then unfilled. When
1980 the delay slot is unfilled, TRIAL is placed back on the unfilled
1981 slots obstack. Unfortunately, it is placed on the end of the
1982 obstack, not in its original location. Therefore, we must search
1983 from entry i + 1 to the end of the unfilled slots obstack to
1984 try and find TRIAL. */
1985 tmp = &unfilled_slots_base[i + 1];
1986 while (*tmp != trial && tmp != unfilled_slots_next)
1987 tmp++;
1989 /* Remove the unconditional jump from consideration for delay slot
1990 filling and unthread it. */
1991 if (*tmp == trial)
1992 *tmp = 0;
1994 rtx_insn *next = NEXT_INSN (trial);
1995 rtx_insn *prev = PREV_INSN (trial);
1996 if (prev)
1997 SET_NEXT_INSN (prev) = next;
1998 if (next)
1999 SET_PREV_INSN (next) = prev;
2003 /* Now, scan backwards from the insn to search for a potential
2004 delay-slot candidate. Stop searching when a label or jump is hit.
2006 For each candidate, if it is to go into the delay slot (moved
2007 forward in execution sequence), it must not need or set any resources
2008 that were set by later insns and must not set any resources that
2009 are needed for those insns.
2011 The delay slot insn itself sets resources unless it is a call
2012 (in which case the called routine, not the insn itself, is doing
2013 the setting). */
2015 if (slots_filled < slots_to_fill)
2017 /* If the flags register is dead after the insn, then we want to be
2018 able to accept a candidate that clobbers it. For this purpose,
2019 we need to filter the flags register during life analysis, so
2020 that it doesn't create RAW and WAW dependencies, while still
2021 creating the necessary WAR dependencies. */
2022 bool filter_flags
2023 = (slots_to_fill == 1
2024 && targetm.flags_regnum != INVALID_REGNUM
2025 && find_regno_note (insn, REG_DEAD, targetm.flags_regnum));
2026 struct resources fset;
2027 CLEAR_RESOURCE (&needed);
2028 CLEAR_RESOURCE (&set);
2029 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2030 if (filter_flags)
2032 CLEAR_RESOURCE (&fset);
2033 mark_set_resources (insn, &fset, 0, MARK_SRC_DEST);
2035 mark_referenced_resources (insn, &needed, false);
2037 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2038 trial = next_trial)
2040 next_trial = prev_nonnote_insn (trial);
2042 /* This must be an INSN or CALL_INSN. */
2043 pat = PATTERN (trial);
2045 /* Stand-alone USE and CLOBBER are just for flow. */
2046 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2047 continue;
2049 /* Check for resource conflict first, to avoid unnecessary
2050 splitting. */
2051 if (! insn_references_resource_p (trial, &set, true)
2052 && ! insn_sets_resource_p (trial,
2053 filter_flags ? &fset : &set,
2054 true)
2055 && ! insn_sets_resource_p (trial, &needed, true)
2056 /* Can't separate set of cc0 from its use. */
2057 && (!HAVE_cc0 || ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2058 && ! can_throw_internal (trial))
2060 trial = try_split (pat, trial, 1);
2061 next_trial = prev_nonnote_insn (trial);
2062 if (eligible_for_delay (insn, slots_filled, trial, flags))
2064 /* In this case, we are searching backward, so if we
2065 find insns to put on the delay list, we want
2066 to put them at the head, rather than the
2067 tail, of the list. */
2069 update_reg_dead_notes (trial, insn);
2070 delay_list.safe_insert (0, trial);
2071 update_block (trial, trial);
2072 delete_related_insns (trial);
2073 if (slots_to_fill == ++slots_filled)
2074 break;
2075 continue;
2079 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2080 if (filter_flags)
2082 mark_set_resources (trial, &fset, 0, MARK_SRC_DEST_CALL);
2083 /* If the flags register is set, then it doesn't create RAW
2084 dependencies any longer and it also doesn't create WAW
2085 dependencies since it's dead after the original insn. */
2086 if (TEST_HARD_REG_BIT (fset.regs, targetm.flags_regnum))
2088 CLEAR_HARD_REG_BIT (needed.regs, targetm.flags_regnum);
2089 CLEAR_HARD_REG_BIT (fset.regs, targetm.flags_regnum);
2092 mark_referenced_resources (trial, &needed, true);
2096 /* If all needed slots haven't been filled, we come here. */
2098 /* Try to optimize case of jumping around a single insn. */
2099 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2100 if (slots_filled != slots_to_fill
2101 && delay_list.is_empty ()
2102 && JUMP_P (insn)
2103 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2104 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2106 optimize_skip (as_a <rtx_jump_insn *> (insn), &delay_list);
2107 if (!delay_list.is_empty ())
2108 slots_filled += 1;
2110 #endif
2112 /* Try to get insns from beyond the insn needing the delay slot.
2113 These insns can neither set or reference resources set in insns being
2114 skipped, cannot set resources in the insn being skipped, and, if this
2115 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2116 call might not return).
2118 There used to be code which continued past the target label if
2119 we saw all uses of the target label. This code did not work,
2120 because it failed to account for some instructions which were
2121 both annulled and marked as from the target. This can happen as a
2122 result of optimize_skip. Since this code was redundant with
2123 fill_eager_delay_slots anyways, it was just deleted. */
2125 if (slots_filled != slots_to_fill
2126 /* If this instruction could throw an exception which is
2127 caught in the same function, then it's not safe to fill
2128 the delay slot with an instruction from beyond this
2129 point. For example, consider:
2131 int i = 2;
2133 try {
2134 f();
2135 i = 3;
2136 } catch (...) {}
2138 return i;
2140 Even though `i' is a local variable, we must be sure not
2141 to put `i = 3' in the delay slot if `f' might throw an
2142 exception.
2144 Presumably, we should also check to see if we could get
2145 back to this function via `setjmp'. */
2146 && ! can_throw_internal (insn)
2147 && !JUMP_P (insn))
2149 int maybe_never = 0;
2150 rtx pat, trial_delay;
2152 CLEAR_RESOURCE (&needed);
2153 CLEAR_RESOURCE (&set);
2154 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2155 mark_referenced_resources (insn, &needed, true);
2157 if (CALL_P (insn))
2158 maybe_never = 1;
2160 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2161 trial = next_trial)
2163 next_trial = next_nonnote_insn (trial);
2165 /* This must be an INSN or CALL_INSN. */
2166 pat = PATTERN (trial);
2168 /* Stand-alone USE and CLOBBER are just for flow. */
2169 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2170 continue;
2172 /* If this already has filled delay slots, get the insn needing
2173 the delay slots. */
2174 if (GET_CODE (pat) == SEQUENCE)
2175 trial_delay = XVECEXP (pat, 0, 0);
2176 else
2177 trial_delay = trial;
2179 /* Stop our search when seeing a jump. */
2180 if (JUMP_P (trial_delay))
2181 break;
2183 /* See if we have a resource problem before we try to split. */
2184 if (GET_CODE (pat) != SEQUENCE
2185 && ! insn_references_resource_p (trial, &set, true)
2186 && ! insn_sets_resource_p (trial, &set, true)
2187 && ! insn_sets_resource_p (trial, &needed, true)
2188 && (!HAVE_cc0 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2189 && ! (maybe_never && may_trap_or_fault_p (pat))
2190 && (trial = try_split (pat, trial, 0))
2191 && eligible_for_delay (insn, slots_filled, trial, flags)
2192 && ! can_throw_internal (trial))
2194 next_trial = next_nonnote_insn (trial);
2195 add_to_delay_list (trial, &delay_list);
2196 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2197 link_cc0_insns (trial);
2199 delete_related_insns (trial);
2200 if (slots_to_fill == ++slots_filled)
2201 break;
2202 continue;
2205 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2206 mark_referenced_resources (trial, &needed, true);
2208 /* Ensure we don't put insns between the setting of cc and the
2209 comparison by moving a setting of cc into an earlier delay
2210 slot since these insns could clobber the condition code. */
2211 set.cc = 1;
2213 /* If this is a call, we might not get here. */
2214 if (CALL_P (trial_delay))
2215 maybe_never = 1;
2218 /* If there are slots left to fill and our search was stopped by an
2219 unconditional branch, try the insn at the branch target. We can
2220 redirect the branch if it works.
2222 Don't do this if the insn at the branch target is a branch. */
2223 if (slots_to_fill != slots_filled
2224 && trial
2225 && jump_to_label_p (trial)
2226 && simplejump_p (trial)
2227 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2228 && ! (NONJUMP_INSN_P (next_trial)
2229 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2230 && !JUMP_P (next_trial)
2231 && ! insn_references_resource_p (next_trial, &set, true)
2232 && ! insn_sets_resource_p (next_trial, &set, true)
2233 && ! insn_sets_resource_p (next_trial, &needed, true)
2234 && (!HAVE_cc0 || ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial)))
2235 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2236 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2237 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2238 && ! can_throw_internal (trial))
2240 /* See comment in relax_delay_slots about necessity of using
2241 next_real_insn here. */
2242 rtx_insn *new_label = next_real_insn (next_trial);
2244 if (new_label != 0)
2245 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2246 else
2247 new_label = find_end_label (simple_return_rtx);
2249 if (new_label)
2251 add_to_delay_list (copy_delay_slot_insn (next_trial),
2252 &delay_list);
2253 slots_filled++;
2254 reorg_redirect_jump (as_a <rtx_jump_insn *> (trial),
2255 new_label);
2260 /* If this is an unconditional jump, then try to get insns from the
2261 target of the jump. */
2262 rtx_jump_insn *jump_insn;
2263 if ((jump_insn = dyn_cast <rtx_jump_insn *> (insn))
2264 && simplejump_p (jump_insn)
2265 && slots_filled != slots_to_fill)
2266 fill_slots_from_thread (jump_insn, const_true_rtx,
2267 next_active_insn (JUMP_LABEL (insn)), NULL, 1,
2268 1, own_thread_p (JUMP_LABEL (insn),
2269 JUMP_LABEL (insn), 0),
2270 slots_to_fill, &slots_filled, &delay_list);
2272 if (!delay_list.is_empty ())
2273 unfilled_slots_base[i]
2274 = emit_delay_sequence (insn, delay_list, slots_filled);
2276 if (slots_to_fill == slots_filled)
2277 unfilled_slots_base[i] = 0;
2279 note_delay_statistics (slots_filled, 0);
2283 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2284 return the ultimate label reached by any such chain of jumps.
2285 Return a suitable return rtx if the chain ultimately leads to a
2286 return instruction.
2287 If LABEL is not followed by a jump, return LABEL.
2288 If the chain loops or we can't find end, return LABEL,
2289 since that tells caller to avoid changing the insn.
2290 If the returned label is obtained by following a crossing jump,
2291 set *CROSSING to true, otherwise set it to false. */
2293 static rtx
2294 follow_jumps (rtx label, rtx_insn *jump, bool *crossing)
2296 rtx_insn *insn;
2297 rtx_insn *next;
2298 int depth;
2300 *crossing = false;
2301 if (ANY_RETURN_P (label))
2302 return label;
2304 rtx_insn *value = as_a <rtx_insn *> (label);
2306 for (depth = 0;
2307 (depth < 10
2308 && (insn = next_active_insn (value)) != 0
2309 && JUMP_P (insn)
2310 && JUMP_LABEL (insn) != NULL_RTX
2311 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2312 || ANY_RETURN_P (PATTERN (insn)))
2313 && (next = NEXT_INSN (insn))
2314 && BARRIER_P (next));
2315 depth++)
2317 rtx this_label_or_return = JUMP_LABEL (insn);
2319 /* If we have found a cycle, make the insn jump to itself. */
2320 if (this_label_or_return == label)
2321 return label;
2323 /* Cannot follow returns and cannot look through tablejumps. */
2324 if (ANY_RETURN_P (this_label_or_return))
2325 return this_label_or_return;
2327 rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return);
2328 if (NEXT_INSN (this_label)
2329 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2330 break;
2332 if (!targetm.can_follow_jump (jump, insn))
2333 break;
2334 if (!*crossing)
2335 *crossing = CROSSING_JUMP_P (jump);
2336 value = this_label;
2338 if (depth == 10)
2339 return label;
2340 return value;
2343 /* Try to find insns to place in delay slots.
2345 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2346 or is an unconditional branch if CONDITION is const_true_rtx.
2347 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2349 THREAD is a flow-of-control, either the insns to be executed if the
2350 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2352 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2353 to see if any potential delay slot insns set things needed there.
2355 LIKELY is nonzero if it is extremely likely that the branch will be
2356 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2357 end of a loop back up to the top.
2359 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2360 thread. I.e., it is the fallthrough code of our jump or the target of the
2361 jump when we are the only jump going there.
2363 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2364 case, we can only take insns from the head of the thread for our delay
2365 slot. We then adjust the jump to point after the insns we have taken. */
2367 static void
2368 fill_slots_from_thread (rtx_jump_insn *insn, rtx condition,
2369 rtx thread_or_return, rtx opposite_thread, int likely,
2370 int thread_if_true, int own_thread, int slots_to_fill,
2371 int *pslots_filled, vec<rtx_insn *> *delay_list)
2373 rtx new_thread;
2374 struct resources opposite_needed, set, needed;
2375 rtx_insn *trial;
2376 int lose = 0;
2377 int must_annul = 0;
2378 int flags;
2380 /* Validate our arguments. */
2381 gcc_assert (condition != const_true_rtx || thread_if_true);
2382 gcc_assert (own_thread || thread_if_true);
2384 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2386 /* If our thread is the end of subroutine, we can't get any delay
2387 insns from that. */
2388 if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return))
2389 return;
2391 rtx_insn *thread = as_a <rtx_insn *> (thread_or_return);
2393 /* If this is an unconditional branch, nothing is needed at the
2394 opposite thread. Otherwise, compute what is needed there. */
2395 if (condition == const_true_rtx)
2396 CLEAR_RESOURCE (&opposite_needed);
2397 else
2398 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2400 /* If the insn at THREAD can be split, do it here to avoid having to
2401 update THREAD and NEW_THREAD if it is done in the loop below. Also
2402 initialize NEW_THREAD. */
2404 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2406 /* Scan insns at THREAD. We are looking for an insn that can be removed
2407 from THREAD (it neither sets nor references resources that were set
2408 ahead of it and it doesn't set anything needs by the insns ahead of
2409 it) and that either can be placed in an annulling insn or aren't
2410 needed at OPPOSITE_THREAD. */
2412 CLEAR_RESOURCE (&needed);
2413 CLEAR_RESOURCE (&set);
2415 /* If we do not own this thread, we must stop as soon as we find
2416 something that we can't put in a delay slot, since all we can do
2417 is branch into THREAD at a later point. Therefore, labels stop
2418 the search if this is not the `true' thread. */
2420 for (trial = thread;
2421 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2422 trial = next_nonnote_insn (trial))
2424 rtx pat, old_trial;
2426 /* If we have passed a label, we no longer own this thread. */
2427 if (LABEL_P (trial))
2429 own_thread = 0;
2430 continue;
2433 pat = PATTERN (trial);
2434 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2435 continue;
2437 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2438 don't separate or copy insns that set and use CC0. */
2439 if (! insn_references_resource_p (trial, &set, true)
2440 && ! insn_sets_resource_p (trial, &set, true)
2441 && ! insn_sets_resource_p (trial, &needed, true)
2442 && (!HAVE_cc0 || (! (reg_mentioned_p (cc0_rtx, pat)
2443 && (! own_thread || ! sets_cc0_p (pat)))))
2444 && ! can_throw_internal (trial))
2446 rtx prior_insn;
2448 /* If TRIAL is redundant with some insn before INSN, we don't
2449 actually need to add it to the delay list; we can merely pretend
2450 we did. */
2451 if ((prior_insn = redundant_insn (trial, insn, *delay_list)))
2453 fix_reg_dead_note (prior_insn, insn);
2454 if (own_thread)
2456 update_block (trial, thread);
2457 if (trial == thread)
2459 thread = next_active_insn (thread);
2460 if (new_thread == trial)
2461 new_thread = thread;
2464 delete_related_insns (trial);
2466 else
2468 update_reg_unused_notes (prior_insn, trial);
2469 new_thread = next_active_insn (trial);
2472 continue;
2475 /* There are two ways we can win: If TRIAL doesn't set anything
2476 needed at the opposite thread and can't trap, or if it can
2477 go into an annulled delay slot. But we want neither to copy
2478 nor to speculate frame-related insns. */
2479 if (!must_annul
2480 && ((condition == const_true_rtx
2481 && (own_thread || !RTX_FRAME_RELATED_P (trial)))
2482 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2483 && ! may_trap_or_fault_p (pat)
2484 && ! RTX_FRAME_RELATED_P (trial))))
2486 old_trial = trial;
2487 trial = try_split (pat, trial, 0);
2488 if (new_thread == old_trial)
2489 new_thread = trial;
2490 if (thread == old_trial)
2491 thread = trial;
2492 pat = PATTERN (trial);
2493 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2494 goto winner;
2496 else if (0
2497 #ifdef ANNUL_IFTRUE_SLOTS
2498 || ! thread_if_true
2499 #endif
2500 #ifdef ANNUL_IFFALSE_SLOTS
2501 || thread_if_true
2502 #endif
2505 old_trial = trial;
2506 trial = try_split (pat, trial, 0);
2507 if (new_thread == old_trial)
2508 new_thread = trial;
2509 if (thread == old_trial)
2510 thread = trial;
2511 pat = PATTERN (trial);
2512 if ((must_annul || delay_list->is_empty ()) && (thread_if_true
2513 ? check_annul_list_true_false (0, *delay_list)
2514 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2515 : check_annul_list_true_false (1, *delay_list)
2516 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2518 rtx_insn *temp;
2520 must_annul = 1;
2521 winner:
2523 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2524 link_cc0_insns (trial);
2526 /* If we own this thread, delete the insn. If this is the
2527 destination of a branch, show that a basic block status
2528 may have been updated. In any case, mark the new
2529 starting point of this thread. */
2530 if (own_thread)
2532 rtx note;
2534 update_block (trial, thread);
2535 if (trial == thread)
2537 thread = next_active_insn (thread);
2538 if (new_thread == trial)
2539 new_thread = thread;
2542 /* We are moving this insn, not deleting it. We must
2543 temporarily increment the use count on any referenced
2544 label lest it be deleted by delete_related_insns. */
2545 for (note = REG_NOTES (trial);
2546 note != NULL_RTX;
2547 note = XEXP (note, 1))
2548 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2549 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2551 /* REG_LABEL_OPERAND could be
2552 NOTE_INSN_DELETED_LABEL too. */
2553 if (LABEL_P (XEXP (note, 0)))
2554 LABEL_NUSES (XEXP (note, 0))++;
2555 else
2556 gcc_assert (REG_NOTE_KIND (note)
2557 == REG_LABEL_OPERAND);
2559 if (jump_to_label_p (trial))
2560 LABEL_NUSES (JUMP_LABEL (trial))++;
2562 delete_related_insns (trial);
2564 for (note = REG_NOTES (trial);
2565 note != NULL_RTX;
2566 note = XEXP (note, 1))
2567 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2568 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2570 /* REG_LABEL_OPERAND could be
2571 NOTE_INSN_DELETED_LABEL too. */
2572 if (LABEL_P (XEXP (note, 0)))
2573 LABEL_NUSES (XEXP (note, 0))--;
2574 else
2575 gcc_assert (REG_NOTE_KIND (note)
2576 == REG_LABEL_OPERAND);
2578 if (jump_to_label_p (trial))
2579 LABEL_NUSES (JUMP_LABEL (trial))--;
2581 else
2582 new_thread = next_active_insn (trial);
2584 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2585 if (thread_if_true)
2586 INSN_FROM_TARGET_P (temp) = 1;
2588 add_to_delay_list (temp, delay_list);
2590 if (slots_to_fill == ++(*pslots_filled))
2592 /* Even though we have filled all the slots, we
2593 may be branching to a location that has a
2594 redundant insn. Skip any if so. */
2595 while (new_thread && ! own_thread
2596 && ! insn_sets_resource_p (new_thread, &set, true)
2597 && ! insn_sets_resource_p (new_thread, &needed,
2598 true)
2599 && ! insn_references_resource_p (new_thread,
2600 &set, true)
2601 && (prior_insn
2602 = redundant_insn (new_thread, insn,
2603 *delay_list)))
2605 /* We know we do not own the thread, so no need
2606 to call update_block and delete_insn. */
2607 fix_reg_dead_note (prior_insn, insn);
2608 update_reg_unused_notes (prior_insn, new_thread);
2609 new_thread = next_active_insn (new_thread);
2611 break;
2614 continue;
2619 /* This insn can't go into a delay slot. */
2620 lose = 1;
2621 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2622 mark_referenced_resources (trial, &needed, true);
2624 /* Ensure we don't put insns between the setting of cc and the comparison
2625 by moving a setting of cc into an earlier delay slot since these insns
2626 could clobber the condition code. */
2627 set.cc = 1;
2629 /* If this insn is a register-register copy and the next insn has
2630 a use of our destination, change it to use our source. That way,
2631 it will become a candidate for our delay slot the next time
2632 through this loop. This case occurs commonly in loops that
2633 scan a list.
2635 We could check for more complex cases than those tested below,
2636 but it doesn't seem worth it. It might also be a good idea to try
2637 to swap the two insns. That might do better.
2639 We can't do this if the next insn modifies our destination, because
2640 that would make the replacement into the insn invalid. We also can't
2641 do this if it modifies our source, because it might be an earlyclobber
2642 operand. This latter test also prevents updating the contents of
2643 a PRE_INC. We also can't do this if there's overlap of source and
2644 destination. Overlap may happen for larger-than-register-size modes. */
2646 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2647 && REG_P (SET_SRC (pat))
2648 && REG_P (SET_DEST (pat))
2649 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2651 rtx_insn *next = next_nonnote_insn (trial);
2653 if (next && NONJUMP_INSN_P (next)
2654 && GET_CODE (PATTERN (next)) != USE
2655 && ! reg_set_p (SET_DEST (pat), next)
2656 && ! reg_set_p (SET_SRC (pat), next)
2657 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2658 && ! modified_in_p (SET_DEST (pat), next))
2659 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2663 /* If we stopped on a branch insn that has delay slots, see if we can
2664 steal some of the insns in those slots. */
2665 if (trial && NONJUMP_INSN_P (trial)
2666 && GET_CODE (PATTERN (trial)) == SEQUENCE
2667 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2669 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
2670 /* If this is the `true' thread, we will want to follow the jump,
2671 so we can only do this if we have taken everything up to here. */
2672 if (thread_if_true && trial == new_thread)
2674 steal_delay_list_from_target (insn, condition, sequence,
2675 delay_list, &set, &needed,
2676 &opposite_needed, slots_to_fill,
2677 pslots_filled, &must_annul,
2678 &new_thread);
2679 /* If we owned the thread and are told that it branched
2680 elsewhere, make sure we own the thread at the new location. */
2681 if (own_thread && trial != new_thread)
2682 own_thread = own_thread_p (new_thread, new_thread, 0);
2684 else if (! thread_if_true)
2685 steal_delay_list_from_fallthrough (insn, condition, sequence,
2686 delay_list, &set, &needed,
2687 &opposite_needed, slots_to_fill,
2688 pslots_filled, &must_annul);
2691 /* If we haven't found anything for this delay slot and it is very
2692 likely that the branch will be taken, see if the insn at our target
2693 increments or decrements a register with an increment that does not
2694 depend on the destination register. If so, try to place the opposite
2695 arithmetic insn after the jump insn and put the arithmetic insn in the
2696 delay slot. If we can't do this, return. */
2697 if (delay_list->is_empty () && likely
2698 && new_thread && !ANY_RETURN_P (new_thread)
2699 && NONJUMP_INSN_P (new_thread)
2700 && !RTX_FRAME_RELATED_P (new_thread)
2701 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2702 && asm_noperands (PATTERN (new_thread)) < 0)
2704 rtx pat = PATTERN (new_thread);
2705 rtx dest;
2706 rtx src;
2708 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2709 above. */
2710 trial = as_a <rtx_insn *> (new_thread);
2711 pat = PATTERN (trial);
2713 if (!NONJUMP_INSN_P (trial)
2714 || GET_CODE (pat) != SET
2715 || ! eligible_for_delay (insn, 0, trial, flags)
2716 || can_throw_internal (trial))
2717 return;
2719 dest = SET_DEST (pat), src = SET_SRC (pat);
2720 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2721 && rtx_equal_p (XEXP (src, 0), dest)
2722 && (!FLOAT_MODE_P (GET_MODE (src))
2723 || flag_unsafe_math_optimizations)
2724 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2725 && ! side_effects_p (pat))
2727 rtx other = XEXP (src, 1);
2728 rtx new_arith;
2729 rtx_insn *ninsn;
2731 /* If this is a constant adjustment, use the same code with
2732 the negated constant. Otherwise, reverse the sense of the
2733 arithmetic. */
2734 if (CONST_INT_P (other))
2735 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2736 negate_rtx (GET_MODE (src), other));
2737 else
2738 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2739 GET_MODE (src), dest, other);
2741 ninsn = emit_insn_after (gen_rtx_SET (dest, new_arith), insn);
2743 if (recog_memoized (ninsn) < 0
2744 || (extract_insn (ninsn),
2745 !constrain_operands (1, get_preferred_alternatives (ninsn))))
2747 delete_related_insns (ninsn);
2748 return;
2751 if (own_thread)
2753 update_block (trial, thread);
2754 if (trial == thread)
2756 thread = next_active_insn (thread);
2757 if (new_thread == trial)
2758 new_thread = thread;
2760 delete_related_insns (trial);
2762 else
2763 new_thread = next_active_insn (trial);
2765 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2766 if (thread_if_true)
2767 INSN_FROM_TARGET_P (ninsn) = 1;
2769 add_to_delay_list (ninsn, delay_list);
2770 (*pslots_filled)++;
2774 if (!delay_list->is_empty () && must_annul)
2775 INSN_ANNULLED_BRANCH_P (insn) = 1;
2777 /* If we are to branch into the middle of this thread, find an appropriate
2778 label or make a new one if none, and redirect INSN to it. If we hit the
2779 end of the function, use the end-of-function label. */
2780 if (new_thread != thread)
2782 rtx label;
2783 bool crossing = false;
2785 gcc_assert (thread_if_true);
2787 if (new_thread && simplejump_or_return_p (new_thread)
2788 && redirect_with_delay_list_safe_p (insn,
2789 JUMP_LABEL (new_thread),
2790 *delay_list))
2791 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn,
2792 &crossing);
2794 if (ANY_RETURN_P (new_thread))
2795 label = find_end_label (new_thread);
2796 else if (LABEL_P (new_thread))
2797 label = new_thread;
2798 else
2799 label = get_label_before (as_a <rtx_insn *> (new_thread),
2800 JUMP_LABEL (insn));
2802 if (label)
2804 reorg_redirect_jump (insn, label);
2805 if (crossing)
2806 CROSSING_JUMP_P (insn) = 1;
2811 /* Make another attempt to find insns to place in delay slots.
2813 We previously looked for insns located in front of the delay insn
2814 and, for non-jump delay insns, located behind the delay insn.
2816 Here only try to schedule jump insns and try to move insns from either
2817 the target or the following insns into the delay slot. If annulling is
2818 supported, we will be likely to do this. Otherwise, we can do this only
2819 if safe. */
2821 static void
2822 fill_eager_delay_slots (void)
2824 rtx_insn *insn;
2825 int i;
2826 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2828 for (i = 0; i < num_unfilled_slots; i++)
2830 rtx condition;
2831 rtx target_label, insn_at_target;
2832 rtx_insn *fallthrough_insn;
2833 auto_vec<rtx_insn *, 5> delay_list;
2834 rtx_jump_insn *jump_insn;
2835 int own_target;
2836 int own_fallthrough;
2837 int prediction, slots_to_fill, slots_filled;
2839 insn = unfilled_slots_base[i];
2840 if (insn == 0
2841 || insn->deleted ()
2842 || ! (jump_insn = dyn_cast <rtx_jump_insn *> (insn))
2843 || ! (condjump_p (jump_insn) || condjump_in_parallel_p (jump_insn)))
2844 continue;
2846 slots_to_fill = num_delay_slots (jump_insn);
2847 /* Some machine description have defined instructions to have
2848 delay slots only in certain circumstances which may depend on
2849 nearby insns (which change due to reorg's actions).
2851 For example, the PA port normally has delay slots for unconditional
2852 jumps.
2854 However, the PA port claims such jumps do not have a delay slot
2855 if they are immediate successors of certain CALL_INSNs. This
2856 allows the port to favor filling the delay slot of the call with
2857 the unconditional jump. */
2858 if (slots_to_fill == 0)
2859 continue;
2861 slots_filled = 0;
2862 target_label = JUMP_LABEL (jump_insn);
2863 condition = get_branch_condition (jump_insn, target_label);
2865 if (condition == 0)
2866 continue;
2868 /* Get the next active fallthrough and target insns and see if we own
2869 them. Then see whether the branch is likely true. We don't need
2870 to do a lot of this for unconditional branches. */
2872 insn_at_target = first_active_target_insn (target_label);
2873 own_target = own_thread_p (target_label, target_label, 0);
2875 if (condition == const_true_rtx)
2877 own_fallthrough = 0;
2878 fallthrough_insn = 0;
2879 prediction = 2;
2881 else
2883 fallthrough_insn = next_active_insn (jump_insn);
2884 own_fallthrough = own_thread_p (NEXT_INSN (jump_insn), NULL_RTX, 1);
2885 prediction = mostly_true_jump (jump_insn);
2888 /* If this insn is expected to branch, first try to get insns from our
2889 target, then our fallthrough insns. If it is not expected to branch,
2890 try the other order. */
2892 if (prediction > 0)
2894 fill_slots_from_thread (jump_insn, condition, insn_at_target,
2895 fallthrough_insn, prediction == 2, 1,
2896 own_target,
2897 slots_to_fill, &slots_filled, &delay_list);
2899 if (delay_list.is_empty () && own_fallthrough)
2901 /* Even though we didn't find anything for delay slots,
2902 we might have found a redundant insn which we deleted
2903 from the thread that was filled. So we have to recompute
2904 the next insn at the target. */
2905 target_label = JUMP_LABEL (jump_insn);
2906 insn_at_target = first_active_target_insn (target_label);
2908 fill_slots_from_thread (jump_insn, condition, fallthrough_insn,
2909 insn_at_target, 0, 0, own_fallthrough,
2910 slots_to_fill, &slots_filled,
2911 &delay_list);
2914 else
2916 if (own_fallthrough)
2917 fill_slots_from_thread (jump_insn, condition, fallthrough_insn,
2918 insn_at_target, 0, 0, own_fallthrough,
2919 slots_to_fill, &slots_filled, &delay_list);
2921 if (delay_list.is_empty ())
2922 fill_slots_from_thread (jump_insn, condition, insn_at_target,
2923 next_active_insn (insn), 0, 1, own_target,
2924 slots_to_fill, &slots_filled, &delay_list);
2927 if (!delay_list.is_empty ())
2928 unfilled_slots_base[i]
2929 = emit_delay_sequence (jump_insn, delay_list, slots_filled);
2931 if (slots_to_fill == slots_filled)
2932 unfilled_slots_base[i] = 0;
2934 note_delay_statistics (slots_filled, 1);
2938 static void delete_computation (rtx insn);
2940 /* Recursively delete prior insns that compute the value (used only by INSN
2941 which the caller is deleting) stored in the register mentioned by NOTE
2942 which is a REG_DEAD note associated with INSN. */
2944 static void
2945 delete_prior_computation (rtx note, rtx insn)
2947 rtx our_prev;
2948 rtx reg = XEXP (note, 0);
2950 for (our_prev = prev_nonnote_insn (insn);
2951 our_prev && (NONJUMP_INSN_P (our_prev)
2952 || CALL_P (our_prev));
2953 our_prev = prev_nonnote_insn (our_prev))
2955 rtx pat = PATTERN (our_prev);
2957 /* If we reach a CALL which is not calling a const function
2958 or the callee pops the arguments, then give up. */
2959 if (CALL_P (our_prev)
2960 && (! RTL_CONST_CALL_P (our_prev)
2961 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
2962 break;
2964 /* If we reach a SEQUENCE, it is too complex to try to
2965 do anything with it, so give up. We can be run during
2966 and after reorg, so SEQUENCE rtl can legitimately show
2967 up here. */
2968 if (GET_CODE (pat) == SEQUENCE)
2969 break;
2971 if (GET_CODE (pat) == USE
2972 && NONJUMP_INSN_P (XEXP (pat, 0)))
2973 /* reorg creates USEs that look like this. We leave them
2974 alone because reorg needs them for its own purposes. */
2975 break;
2977 if (reg_set_p (reg, pat))
2979 if (side_effects_p (pat) && !CALL_P (our_prev))
2980 break;
2982 if (GET_CODE (pat) == PARALLEL)
2984 /* If we find a SET of something else, we can't
2985 delete the insn. */
2987 int i;
2989 for (i = 0; i < XVECLEN (pat, 0); i++)
2991 rtx part = XVECEXP (pat, 0, i);
2993 if (GET_CODE (part) == SET
2994 && SET_DEST (part) != reg)
2995 break;
2998 if (i == XVECLEN (pat, 0))
2999 delete_computation (our_prev);
3001 else if (GET_CODE (pat) == SET
3002 && REG_P (SET_DEST (pat)))
3004 int dest_regno = REGNO (SET_DEST (pat));
3005 int dest_endregno = END_REGNO (SET_DEST (pat));
3006 int regno = REGNO (reg);
3007 int endregno = END_REGNO (reg);
3009 if (dest_regno >= regno
3010 && dest_endregno <= endregno)
3011 delete_computation (our_prev);
3013 /* We may have a multi-word hard register and some, but not
3014 all, of the words of the register are needed in subsequent
3015 insns. Write REG_UNUSED notes for those parts that were not
3016 needed. */
3017 else if (dest_regno <= regno
3018 && dest_endregno >= endregno)
3020 int i;
3022 add_reg_note (our_prev, REG_UNUSED, reg);
3024 for (i = dest_regno; i < dest_endregno; i++)
3025 if (! find_regno_note (our_prev, REG_UNUSED, i))
3026 break;
3028 if (i == dest_endregno)
3029 delete_computation (our_prev);
3033 break;
3036 /* If PAT references the register that dies here, it is an
3037 additional use. Hence any prior SET isn't dead. However, this
3038 insn becomes the new place for the REG_DEAD note. */
3039 if (reg_overlap_mentioned_p (reg, pat))
3041 XEXP (note, 1) = REG_NOTES (our_prev);
3042 REG_NOTES (our_prev) = note;
3043 break;
3048 /* Delete INSN and recursively delete insns that compute values used only
3049 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3051 Look at all our REG_DEAD notes. If a previous insn does nothing other
3052 than set a register that dies in this insn, we can delete that insn
3053 as well.
3055 On machines with CC0, if CC0 is used in this insn, we may be able to
3056 delete the insn that set it. */
3058 static void
3059 delete_computation (rtx insn)
3061 rtx note, next;
3063 if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
3065 rtx_insn *prev = prev_nonnote_insn (insn);
3066 /* We assume that at this stage
3067 CC's are always set explicitly
3068 and always immediately before the jump that
3069 will use them. So if the previous insn
3070 exists to set the CC's, delete it
3071 (unless it performs auto-increments, etc.). */
3072 if (prev && NONJUMP_INSN_P (prev)
3073 && sets_cc0_p (PATTERN (prev)))
3075 if (sets_cc0_p (PATTERN (prev)) > 0
3076 && ! side_effects_p (PATTERN (prev)))
3077 delete_computation (prev);
3078 else
3079 /* Otherwise, show that cc0 won't be used. */
3080 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3084 for (note = REG_NOTES (insn); note; note = next)
3086 next = XEXP (note, 1);
3088 if (REG_NOTE_KIND (note) != REG_DEAD
3089 /* Verify that the REG_NOTE is legitimate. */
3090 || !REG_P (XEXP (note, 0)))
3091 continue;
3093 delete_prior_computation (note, insn);
3096 delete_related_insns (insn);
3099 /* If all INSN does is set the pc, delete it,
3100 and delete the insn that set the condition codes for it
3101 if that's what the previous thing was. */
3103 static void
3104 delete_jump (rtx_insn *insn)
3106 rtx set = single_set (insn);
3108 if (set && GET_CODE (SET_DEST (set)) == PC)
3109 delete_computation (insn);
3112 static rtx_insn *
3113 label_before_next_insn (rtx x, rtx scan_limit)
3115 rtx_insn *insn = next_active_insn (x);
3116 while (insn)
3118 insn = PREV_INSN (insn);
3119 if (insn == scan_limit || insn == NULL_RTX)
3120 return NULL;
3121 if (LABEL_P (insn))
3122 break;
3124 return insn;
3127 /* Return TRUE if there is a NOTE_INSN_SWITCH_TEXT_SECTIONS note in between
3128 BEG and END. */
3130 static bool
3131 switch_text_sections_between_p (const rtx_insn *beg, const rtx_insn *end)
3133 const rtx_insn *p;
3134 for (p = beg; p != end; p = NEXT_INSN (p))
3135 if (NOTE_P (p) && NOTE_KIND (p) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
3136 return true;
3137 return false;
3141 /* Once we have tried two ways to fill a delay slot, make a pass over the
3142 code to try to improve the results and to do such things as more jump
3143 threading. */
3145 static void
3146 relax_delay_slots (rtx_insn *first)
3148 rtx_insn *insn, *next;
3149 rtx_sequence *pat;
3150 rtx trial;
3151 rtx_insn *delay_insn;
3152 rtx target_label;
3154 /* Look at every JUMP_INSN and see if we can improve it. */
3155 for (insn = first; insn; insn = next)
3157 rtx_insn *other;
3158 bool crossing;
3160 next = next_active_insn (insn);
3162 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3163 the next insn, or jumps to a label that is not the last of a
3164 group of consecutive labels. */
3165 if (is_a <rtx_jump_insn *> (insn)
3166 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3167 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3169 rtx_jump_insn *jump_insn = as_a <rtx_jump_insn *> (insn);
3170 target_label
3171 = skip_consecutive_labels (follow_jumps (target_label, jump_insn,
3172 &crossing));
3173 if (ANY_RETURN_P (target_label))
3174 target_label = find_end_label (target_label);
3176 if (target_label && next_active_insn (target_label) == next
3177 && ! condjump_in_parallel_p (jump_insn)
3178 && ! (next && switch_text_sections_between_p (jump_insn, next)))
3180 delete_jump (jump_insn);
3181 continue;
3184 if (target_label && target_label != JUMP_LABEL (jump_insn))
3186 reorg_redirect_jump (jump_insn, target_label);
3187 if (crossing)
3188 CROSSING_JUMP_P (jump_insn) = 1;
3191 /* See if this jump conditionally branches around an unconditional
3192 jump. If so, invert this jump and point it to the target of the
3193 second jump. Check if it's possible on the target. */
3194 if (next && simplejump_or_return_p (next)
3195 && any_condjump_p (jump_insn)
3196 && target_label
3197 && next_active_insn (target_label) == next_active_insn (next)
3198 && no_labels_between_p (jump_insn, next)
3199 && targetm.can_follow_jump (jump_insn, next))
3201 rtx label = JUMP_LABEL (next);
3203 /* Be careful how we do this to avoid deleting code or
3204 labels that are momentarily dead. See similar optimization
3205 in jump.c.
3207 We also need to ensure we properly handle the case when
3208 invert_jump fails. */
3210 ++LABEL_NUSES (target_label);
3211 if (!ANY_RETURN_P (label))
3212 ++LABEL_NUSES (label);
3214 if (invert_jump (jump_insn, label, 1))
3216 delete_related_insns (next);
3217 next = jump_insn;
3220 if (!ANY_RETURN_P (label))
3221 --LABEL_NUSES (label);
3223 if (--LABEL_NUSES (target_label) == 0)
3224 delete_related_insns (target_label);
3226 continue;
3230 /* If this is an unconditional jump and the previous insn is a
3231 conditional jump, try reversing the condition of the previous
3232 insn and swapping our targets. The next pass might be able to
3233 fill the slots.
3235 Don't do this if we expect the conditional branch to be true, because
3236 we would then be making the more common case longer. */
3238 if (simplejump_or_return_p (insn)
3239 && (other = prev_active_insn (insn)) != 0
3240 && any_condjump_p (other)
3241 && no_labels_between_p (other, insn)
3242 && 0 > mostly_true_jump (other))
3244 rtx other_target = JUMP_LABEL (other);
3245 target_label = JUMP_LABEL (insn);
3247 if (invert_jump (as_a <rtx_jump_insn *> (other), target_label, 0))
3248 reorg_redirect_jump (as_a <rtx_jump_insn *> (insn), other_target);
3251 /* Now look only at cases where we have a filled delay slot. */
3252 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3253 continue;
3255 pat = as_a <rtx_sequence *> (PATTERN (insn));
3256 delay_insn = pat->insn (0);
3258 /* See if the first insn in the delay slot is redundant with some
3259 previous insn. Remove it from the delay slot if so; then set up
3260 to reprocess this insn. */
3261 if (redundant_insn (pat->insn (1), delay_insn, vNULL))
3263 update_block (pat->insn (1), insn);
3264 delete_from_delay_slot (pat->insn (1));
3265 next = prev_active_insn (next);
3266 continue;
3269 /* See if we have a RETURN insn with a filled delay slot followed
3270 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3271 the first RETURN (but not its delay insn). This gives the same
3272 effect in fewer instructions.
3274 Only do so if optimizing for size since this results in slower, but
3275 smaller code. */
3276 if (optimize_function_for_size_p (cfun)
3277 && ANY_RETURN_P (PATTERN (delay_insn))
3278 && next
3279 && JUMP_P (next)
3280 && PATTERN (next) == PATTERN (delay_insn))
3282 rtx_insn *after;
3283 int i;
3285 /* Delete the RETURN and just execute the delay list insns.
3287 We do this by deleting the INSN containing the SEQUENCE, then
3288 re-emitting the insns separately, and then deleting the RETURN.
3289 This allows the count of the jump target to be properly
3290 decremented.
3292 Note that we need to change the INSN_UID of the re-emitted insns
3293 since it is used to hash the insns for mark_target_live_regs and
3294 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3296 Clear the from target bit, since these insns are no longer
3297 in delay slots. */
3298 for (i = 0; i < XVECLEN (pat, 0); i++)
3299 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3301 trial = PREV_INSN (insn);
3302 delete_related_insns (insn);
3303 gcc_assert (GET_CODE (pat) == SEQUENCE);
3304 add_insn_after (delay_insn, trial, NULL);
3305 after = delay_insn;
3306 for (i = 1; i < pat->len (); i++)
3307 after = emit_copy_of_insn_after (pat->insn (i), after);
3308 delete_scheduled_jump (delay_insn);
3309 continue;
3312 /* Now look only at the cases where we have a filled JUMP_INSN. */
3313 rtx_jump_insn *delay_jump_insn =
3314 dyn_cast <rtx_jump_insn *> (delay_insn);
3315 if (! delay_jump_insn || !(condjump_p (delay_jump_insn)
3316 || condjump_in_parallel_p (delay_jump_insn)))
3317 continue;
3319 target_label = JUMP_LABEL (delay_jump_insn);
3320 if (target_label && ANY_RETURN_P (target_label))
3321 continue;
3323 /* If this jump goes to another unconditional jump, thread it, but
3324 don't convert a jump into a RETURN here. */
3325 trial = skip_consecutive_labels (follow_jumps (target_label,
3326 delay_jump_insn,
3327 &crossing));
3328 if (ANY_RETURN_P (trial))
3329 trial = find_end_label (trial);
3331 if (trial && trial != target_label
3332 && redirect_with_delay_slots_safe_p (delay_jump_insn, trial, insn))
3334 reorg_redirect_jump (delay_jump_insn, trial);
3335 target_label = trial;
3336 if (crossing)
3337 CROSSING_JUMP_P (insn) = 1;
3340 /* If the first insn at TARGET_LABEL is redundant with a previous
3341 insn, redirect the jump to the following insn and process again.
3342 We use next_real_insn instead of next_active_insn so we
3343 don't skip USE-markers, or we'll end up with incorrect
3344 liveness info. */
3345 trial = next_real_insn (target_label);
3346 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3347 && redundant_insn (trial, insn, vNULL)
3348 && ! can_throw_internal (trial))
3350 /* Figure out where to emit the special USE insn so we don't
3351 later incorrectly compute register live/death info. */
3352 rtx_insn *tmp = next_active_insn (trial);
3353 if (tmp == 0)
3354 tmp = find_end_label (simple_return_rtx);
3356 if (tmp)
3358 /* Insert the special USE insn and update dataflow info.
3359 We know "trial" is an insn here as it is the output of
3360 next_real_insn () above. */
3361 update_block (as_a <rtx_insn *> (trial), tmp);
3363 /* Now emit a label before the special USE insn, and
3364 redirect our jump to the new label. */
3365 target_label = get_label_before (PREV_INSN (tmp), target_label);
3366 reorg_redirect_jump (delay_jump_insn, target_label);
3367 next = insn;
3368 continue;
3372 /* Similarly, if it is an unconditional jump with one insn in its
3373 delay list and that insn is redundant, thread the jump. */
3374 rtx_sequence *trial_seq =
3375 trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL;
3376 if (trial_seq
3377 && trial_seq->len () == 2
3378 && JUMP_P (trial_seq->insn (0))
3379 && simplejump_or_return_p (trial_seq->insn (0))
3380 && redundant_insn (trial_seq->insn (1), insn, vNULL))
3382 target_label = JUMP_LABEL (trial_seq->insn (0));
3383 if (ANY_RETURN_P (target_label))
3384 target_label = find_end_label (target_label);
3386 if (target_label
3387 && redirect_with_delay_slots_safe_p (delay_jump_insn,
3388 target_label, insn))
3390 update_block (trial_seq->insn (1), insn);
3391 reorg_redirect_jump (delay_jump_insn, target_label);
3392 next = insn;
3393 continue;
3397 /* See if we have a simple (conditional) jump that is useless. */
3398 if (! INSN_ANNULLED_BRANCH_P (delay_jump_insn)
3399 && ! condjump_in_parallel_p (delay_jump_insn)
3400 && prev_active_insn (target_label) == insn
3401 && ! BARRIER_P (prev_nonnote_insn (target_label))
3402 /* If the last insn in the delay slot sets CC0 for some insn,
3403 various code assumes that it is in a delay slot. We could
3404 put it back where it belonged and delete the register notes,
3405 but it doesn't seem worthwhile in this uncommon case. */
3406 && (!HAVE_cc0
3407 || ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3408 REG_CC_USER, NULL_RTX)))
3410 rtx_insn *after;
3411 int i;
3413 /* All this insn does is execute its delay list and jump to the
3414 following insn. So delete the jump and just execute the delay
3415 list insns.
3417 We do this by deleting the INSN containing the SEQUENCE, then
3418 re-emitting the insns separately, and then deleting the jump.
3419 This allows the count of the jump target to be properly
3420 decremented.
3422 Note that we need to change the INSN_UID of the re-emitted insns
3423 since it is used to hash the insns for mark_target_live_regs and
3424 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3426 Clear the from target bit, since these insns are no longer
3427 in delay slots. */
3428 for (i = 0; i < XVECLEN (pat, 0); i++)
3429 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3431 trial = PREV_INSN (insn);
3432 delete_related_insns (insn);
3433 gcc_assert (GET_CODE (pat) == SEQUENCE);
3434 add_insn_after (delay_jump_insn, trial, NULL);
3435 after = delay_jump_insn;
3436 for (i = 1; i < pat->len (); i++)
3437 after = emit_copy_of_insn_after (pat->insn (i), after);
3438 delete_scheduled_jump (delay_jump_insn);
3439 continue;
3442 /* See if this is an unconditional jump around a single insn which is
3443 identical to the one in its delay slot. In this case, we can just
3444 delete the branch and the insn in its delay slot. */
3445 if (next && NONJUMP_INSN_P (next)
3446 && label_before_next_insn (next, insn) == target_label
3447 && simplejump_p (insn)
3448 && XVECLEN (pat, 0) == 2
3449 && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
3451 delete_related_insns (insn);
3452 continue;
3455 /* See if this jump (with its delay slots) conditionally branches
3456 around an unconditional jump (without delay slots). If so, invert
3457 this jump and point it to the target of the second jump. We cannot
3458 do this for annulled jumps, though. Again, don't convert a jump to
3459 a RETURN here. */
3460 if (! INSN_ANNULLED_BRANCH_P (delay_jump_insn)
3461 && any_condjump_p (delay_jump_insn)
3462 && next && simplejump_or_return_p (next)
3463 && next_active_insn (target_label) == next_active_insn (next)
3464 && no_labels_between_p (insn, next))
3466 rtx label = JUMP_LABEL (next);
3467 rtx old_label = JUMP_LABEL (delay_jump_insn);
3469 if (ANY_RETURN_P (label))
3470 label = find_end_label (label);
3472 /* find_end_label can generate a new label. Check this first. */
3473 if (label
3474 && no_labels_between_p (insn, next)
3475 && redirect_with_delay_slots_safe_p (delay_jump_insn,
3476 label, insn))
3478 /* Be careful how we do this to avoid deleting code or labels
3479 that are momentarily dead. See similar optimization in
3480 jump.c */
3481 if (old_label)
3482 ++LABEL_NUSES (old_label);
3484 if (invert_jump (delay_jump_insn, label, 1))
3486 int i;
3488 /* Must update the INSN_FROM_TARGET_P bits now that
3489 the branch is reversed, so that mark_target_live_regs
3490 will handle the delay slot insn correctly. */
3491 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3493 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3494 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3497 delete_related_insns (next);
3498 next = insn;
3501 if (old_label && --LABEL_NUSES (old_label) == 0)
3502 delete_related_insns (old_label);
3503 continue;
3507 /* If we own the thread opposite the way this insn branches, see if we
3508 can merge its delay slots with following insns. */
3509 if (INSN_FROM_TARGET_P (pat->insn (1))
3510 && own_thread_p (NEXT_INSN (insn), 0, 1))
3511 try_merge_delay_insns (insn, next);
3512 else if (! INSN_FROM_TARGET_P (pat->insn (1))
3513 && own_thread_p (target_label, target_label, 0))
3514 try_merge_delay_insns (insn, next_active_insn (target_label));
3516 /* If we get here, we haven't deleted INSN. But we may have deleted
3517 NEXT, so recompute it. */
3518 next = next_active_insn (insn);
3523 /* Look for filled jumps to the end of function label. We can try to convert
3524 them into RETURN insns if the insns in the delay slot are valid for the
3525 RETURN as well. */
3527 static void
3528 make_return_insns (rtx_insn *first)
3530 rtx_insn *insn;
3531 rtx_jump_insn *jump_insn;
3532 rtx real_return_label = function_return_label;
3533 rtx real_simple_return_label = function_simple_return_label;
3534 int slots, i;
3536 /* See if there is a RETURN insn in the function other than the one we
3537 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3538 into a RETURN to jump to it. */
3539 for (insn = first; insn; insn = NEXT_INSN (insn))
3540 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3542 rtx t = get_label_before (insn, NULL_RTX);
3543 if (PATTERN (insn) == ret_rtx)
3544 real_return_label = t;
3545 else
3546 real_simple_return_label = t;
3547 break;
3550 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3551 was equal to END_OF_FUNCTION_LABEL. */
3552 if (real_return_label)
3553 LABEL_NUSES (real_return_label)++;
3554 if (real_simple_return_label)
3555 LABEL_NUSES (real_simple_return_label)++;
3557 /* Clear the list of insns to fill so we can use it. */
3558 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3560 for (insn = first; insn; insn = NEXT_INSN (insn))
3562 int flags;
3563 rtx kind, real_label;
3565 /* Only look at filled JUMP_INSNs that go to the end of function
3566 label. */
3567 if (!NONJUMP_INSN_P (insn))
3568 continue;
3570 if (GET_CODE (PATTERN (insn)) != SEQUENCE)
3571 continue;
3573 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
3575 if (!jump_to_label_p (pat->insn (0)))
3576 continue;
3578 if (JUMP_LABEL (pat->insn (0)) == function_return_label)
3580 kind = ret_rtx;
3581 real_label = real_return_label;
3583 else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label)
3585 kind = simple_return_rtx;
3586 real_label = real_simple_return_label;
3588 else
3589 continue;
3591 jump_insn = as_a <rtx_jump_insn *> (pat->insn (0));
3593 /* If we can't make the jump into a RETURN, try to redirect it to the best
3594 RETURN and go on to the next insn. */
3595 if (!reorg_redirect_jump (jump_insn, kind))
3597 /* Make sure redirecting the jump will not invalidate the delay
3598 slot insns. */
3599 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3600 reorg_redirect_jump (jump_insn, real_label);
3601 continue;
3604 /* See if this RETURN can accept the insns current in its delay slot.
3605 It can if it has more or an equal number of slots and the contents
3606 of each is valid. */
3608 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3609 slots = num_delay_slots (jump_insn);
3610 if (slots >= XVECLEN (pat, 0) - 1)
3612 for (i = 1; i < XVECLEN (pat, 0); i++)
3613 if (! (
3614 #ifdef ANNUL_IFFALSE_SLOTS
3615 (INSN_ANNULLED_BRANCH_P (jump_insn)
3616 && INSN_FROM_TARGET_P (pat->insn (i)))
3617 ? eligible_for_annul_false (jump_insn, i - 1,
3618 pat->insn (i), flags) :
3619 #endif
3620 #ifdef ANNUL_IFTRUE_SLOTS
3621 (INSN_ANNULLED_BRANCH_P (jump_insn)
3622 && ! INSN_FROM_TARGET_P (pat->insn (i)))
3623 ? eligible_for_annul_true (jump_insn, i - 1,
3624 pat->insn (i), flags) :
3625 #endif
3626 eligible_for_delay (jump_insn, i - 1,
3627 pat->insn (i), flags)))
3628 break;
3630 else
3631 i = 0;
3633 if (i == XVECLEN (pat, 0))
3634 continue;
3636 /* We have to do something with this insn. If it is an unconditional
3637 RETURN, delete the SEQUENCE and output the individual insns,
3638 followed by the RETURN. Then set things up so we try to find
3639 insns for its delay slots, if it needs some. */
3640 if (ANY_RETURN_P (PATTERN (jump_insn)))
3642 rtx_insn *prev = PREV_INSN (insn);
3644 delete_related_insns (insn);
3645 for (i = 1; i < XVECLEN (pat, 0); i++)
3646 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3648 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3649 emit_barrier_after (insn);
3651 if (slots)
3652 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3654 else
3655 /* It is probably more efficient to keep this with its current
3656 delay slot as a branch to a RETURN. */
3657 reorg_redirect_jump (jump_insn, real_label);
3660 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3661 new delay slots we have created. */
3662 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3663 delete_related_insns (real_return_label);
3664 if (real_simple_return_label != NULL_RTX
3665 && --LABEL_NUSES (real_simple_return_label) == 0)
3666 delete_related_insns (real_simple_return_label);
3668 fill_simple_delay_slots (1);
3669 fill_simple_delay_slots (0);
3672 /* Try to find insns to place in delay slots. */
3674 static void
3675 dbr_schedule (rtx_insn *first)
3677 rtx_insn *insn, *next, *epilogue_insn = 0;
3678 int i;
3679 bool need_return_insns;
3681 /* If the current function has no insns other than the prologue and
3682 epilogue, then do not try to fill any delay slots. */
3683 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3684 return;
3686 /* Find the highest INSN_UID and allocate and initialize our map from
3687 INSN_UID's to position in code. */
3688 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3690 if (INSN_UID (insn) > max_uid)
3691 max_uid = INSN_UID (insn);
3692 if (NOTE_P (insn)
3693 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3694 epilogue_insn = insn;
3697 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3698 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3699 uid_to_ruid[INSN_UID (insn)] = i;
3701 /* Initialize the list of insns that need filling. */
3702 if (unfilled_firstobj == 0)
3704 gcc_obstack_init (&unfilled_slots_obstack);
3705 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3708 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3710 rtx target;
3712 /* Skip vector tables. We can't get attributes for them. */
3713 if (JUMP_TABLE_DATA_P (insn))
3714 continue;
3716 if (JUMP_P (insn))
3717 INSN_ANNULLED_BRANCH_P (insn) = 0;
3718 INSN_FROM_TARGET_P (insn) = 0;
3720 if (num_delay_slots (insn) > 0)
3721 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3723 /* Ensure all jumps go to the last of a set of consecutive labels. */
3724 if (JUMP_P (insn)
3725 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3726 && !ANY_RETURN_P (JUMP_LABEL (insn))
3727 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3728 != JUMP_LABEL (insn)))
3729 redirect_jump (as_a <rtx_jump_insn *> (insn), target, 1);
3732 init_resource_info (epilogue_insn);
3734 /* Show we haven't computed an end-of-function label yet. */
3735 function_return_label = function_simple_return_label = NULL;
3737 /* Initialize the statistics for this function. */
3738 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3739 memset (num_filled_delays, 0, sizeof num_filled_delays);
3741 /* Now do the delay slot filling. Try everything twice in case earlier
3742 changes make more slots fillable. */
3744 for (reorg_pass_number = 0;
3745 reorg_pass_number < MAX_REORG_PASSES;
3746 reorg_pass_number++)
3748 fill_simple_delay_slots (1);
3749 fill_simple_delay_slots (0);
3750 fill_eager_delay_slots ();
3751 relax_delay_slots (first);
3754 /* If we made an end of function label, indicate that it is now
3755 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3756 If it is now unused, delete it. */
3757 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3758 delete_related_insns (function_return_label);
3759 if (function_simple_return_label
3760 && --LABEL_NUSES (function_simple_return_label) == 0)
3761 delete_related_insns (function_simple_return_label);
3763 need_return_insns = false;
3764 need_return_insns |= targetm.have_return () && function_return_label != 0;
3765 need_return_insns |= (targetm.have_simple_return ()
3766 && function_simple_return_label != 0);
3767 if (need_return_insns)
3768 make_return_insns (first);
3770 /* Delete any USE insns made by update_block; subsequent passes don't need
3771 them or know how to deal with them. */
3772 for (insn = first; insn; insn = next)
3774 next = NEXT_INSN (insn);
3776 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3777 && INSN_P (XEXP (PATTERN (insn), 0)))
3778 next = delete_related_insns (insn);
3781 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3783 /* It is not clear why the line below is needed, but it does seem to be. */
3784 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3786 if (dump_file)
3788 int i, j, need_comma;
3789 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3790 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3792 for (reorg_pass_number = 0;
3793 reorg_pass_number < MAX_REORG_PASSES;
3794 reorg_pass_number++)
3796 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3797 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3799 need_comma = 0;
3800 fprintf (dump_file, ";; Reorg function #%d\n", i);
3802 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3803 num_insns_needing_delays[i][reorg_pass_number]);
3805 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3806 if (num_filled_delays[i][j][reorg_pass_number])
3808 if (need_comma)
3809 fprintf (dump_file, ", ");
3810 need_comma = 1;
3811 fprintf (dump_file, "%d got %d delays",
3812 num_filled_delays[i][j][reorg_pass_number], j);
3814 fprintf (dump_file, "\n");
3817 memset (total_delay_slots, 0, sizeof total_delay_slots);
3818 memset (total_annul_slots, 0, sizeof total_annul_slots);
3819 for (insn = first; insn; insn = NEXT_INSN (insn))
3821 if (! insn->deleted ()
3822 && NONJUMP_INSN_P (insn)
3823 && GET_CODE (PATTERN (insn)) != USE
3824 && GET_CODE (PATTERN (insn)) != CLOBBER)
3826 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3828 rtx control;
3829 j = XVECLEN (PATTERN (insn), 0) - 1;
3830 if (j > MAX_DELAY_HISTOGRAM)
3831 j = MAX_DELAY_HISTOGRAM;
3832 control = XVECEXP (PATTERN (insn), 0, 0);
3833 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3834 total_annul_slots[j]++;
3835 else
3836 total_delay_slots[j]++;
3838 else if (num_delay_slots (insn) > 0)
3839 total_delay_slots[0]++;
3842 fprintf (dump_file, ";; Reorg totals: ");
3843 need_comma = 0;
3844 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3846 if (total_delay_slots[j])
3848 if (need_comma)
3849 fprintf (dump_file, ", ");
3850 need_comma = 1;
3851 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3854 fprintf (dump_file, "\n");
3855 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3856 fprintf (dump_file, ";; Reorg annuls: ");
3857 need_comma = 0;
3858 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3860 if (total_annul_slots[j])
3862 if (need_comma)
3863 fprintf (dump_file, ", ");
3864 need_comma = 1;
3865 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3868 fprintf (dump_file, "\n");
3869 #endif
3870 fprintf (dump_file, "\n");
3873 if (!sibling_labels.is_empty ())
3875 update_alignments (sibling_labels);
3876 sibling_labels.release ();
3879 free_resource_info ();
3880 free (uid_to_ruid);
3881 crtl->dbr_scheduled_p = true;
3883 #endif /* DELAY_SLOTS */
3885 /* Run delay slot optimization. */
3886 static unsigned int
3887 rest_of_handle_delay_slots (void)
3889 #ifdef DELAY_SLOTS
3890 dbr_schedule (get_insns ());
3891 #endif
3892 return 0;
3895 namespace {
3897 const pass_data pass_data_delay_slots =
3899 RTL_PASS, /* type */
3900 "dbr", /* name */
3901 OPTGROUP_NONE, /* optinfo_flags */
3902 TV_DBR_SCHED, /* tv_id */
3903 0, /* properties_required */
3904 0, /* properties_provided */
3905 0, /* properties_destroyed */
3906 0, /* todo_flags_start */
3907 0, /* todo_flags_finish */
3910 class pass_delay_slots : public rtl_opt_pass
3912 public:
3913 pass_delay_slots (gcc::context *ctxt)
3914 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3917 /* opt_pass methods: */
3918 virtual bool gate (function *);
3919 virtual unsigned int execute (function *)
3921 return rest_of_handle_delay_slots ();
3924 }; // class pass_delay_slots
3926 bool
3927 pass_delay_slots::gate (function *)
3929 #ifdef DELAY_SLOTS
3930 /* At -O0 dataflow info isn't updated after RA. */
3931 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3932 #else
3933 return 0;
3934 #endif
3937 } // anon namespace
3939 rtl_opt_pass *
3940 make_pass_delay_slots (gcc::context *ctxt)
3942 return new pass_delay_slots (ctxt);
3945 /* Machine dependent reorg pass. */
3947 namespace {
3949 const pass_data pass_data_machine_reorg =
3951 RTL_PASS, /* type */
3952 "mach", /* name */
3953 OPTGROUP_NONE, /* optinfo_flags */
3954 TV_MACH_DEP, /* tv_id */
3955 0, /* properties_required */
3956 0, /* properties_provided */
3957 0, /* properties_destroyed */
3958 0, /* todo_flags_start */
3959 0, /* todo_flags_finish */
3962 class pass_machine_reorg : public rtl_opt_pass
3964 public:
3965 pass_machine_reorg (gcc::context *ctxt)
3966 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
3969 /* opt_pass methods: */
3970 virtual bool gate (function *)
3972 return targetm.machine_dependent_reorg != 0;
3975 virtual unsigned int execute (function *)
3977 targetm.machine_dependent_reorg ();
3978 return 0;
3981 }; // class pass_machine_reorg
3983 } // anon namespace
3985 rtl_opt_pass *
3986 make_pass_machine_reorg (gcc::context *ctxt)
3988 return new pass_machine_reorg (ctxt);