1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl
[GR_MAX
];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
102 REAL_VALUE_TYPE dconst0
;
103 REAL_VALUE_TYPE dconst1
;
104 REAL_VALUE_TYPE dconst2
;
105 REAL_VALUE_TYPE dconstm1
;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab
;
147 /* A hash table storing memory attribute structures. */
148 static htab_t mem_attrs_htab
;
150 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
151 shortly thrown away. We use two mechanisms to prevent this waste:
153 For sizes up to 5 elements, we keep a SEQUENCE and its associated
154 rtvec for use by gen_sequence. One entry for each size is
155 sufficient because most cases are calls to gen_sequence followed by
156 immediately emitting the SEQUENCE. Reuse is safe since emitting a
157 sequence is destructive on the insn in it anyway and hence can't be
160 We do not bother to save this cached data over nested function calls.
161 Instead, we just reinitialize them. */
163 #define SEQUENCE_RESULT_SIZE 5
165 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
167 /* During RTL generation, we also keep a list of free INSN rtl codes. */
168 static rtx free_insn
;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw
PARAMS ((rtx
));
178 static rtx make_call_insn_raw
PARAMS ((rtx
));
179 static rtx find_line_note
PARAMS ((rtx
));
180 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
181 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
183 static void unshare_all_rtl_1
PARAMS ((rtx
));
184 static void unshare_all_decls
PARAMS ((tree
));
185 static void reset_used_decls
PARAMS ((tree
));
186 static void mark_label_nuses
PARAMS ((rtx
));
187 static hashval_t const_int_htab_hash
PARAMS ((const void *));
188 static int const_int_htab_eq
PARAMS ((const void *,
190 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
191 static int mem_attrs_htab_eq
PARAMS ((const void *,
193 static void mem_attrs_mark
PARAMS ((const void *));
194 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
198 /* Probability of the conditional branch currently proceeded by try_split.
199 Set to -1 otherwise. */
200 int split_branch_probability
= -1;
202 /* Returns a hash code for X (which is a really a CONST_INT). */
205 const_int_htab_hash (x
)
208 return (hashval_t
) INTVAL ((const struct rtx_def
*) x
);
211 /* Returns non-zero if the value represented by X (which is really a
212 CONST_INT) is the same as that given by Y (which is really a
216 const_int_htab_eq (x
, y
)
220 return (INTVAL ((const struct rtx_def
*) x
) == *((const HOST_WIDE_INT
*) y
));
223 /* Returns a hash code for X (which is a really a mem_attrs *). */
226 mem_attrs_htab_hash (x
)
229 mem_attrs
*p
= (mem_attrs
*) x
;
231 return (p
->alias
^ (p
->align
* 1000)
232 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
233 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
237 /* Returns non-zero if the value represented by X (which is really a
238 mem_attrs *) is the same as that given by Y (which is also really a
242 mem_attrs_htab_eq (x
, y
)
246 mem_attrs
*p
= (mem_attrs
*) x
;
247 mem_attrs
*q
= (mem_attrs
*) y
;
249 return (p
->alias
== q
->alias
&& p
->decl
== q
->decl
&& p
->offset
== q
->offset
250 && p
->size
== q
->size
&& p
->align
== q
->align
);
253 /* This routine is called when we determine that we need a mem_attrs entry.
254 It marks the associated decl and RTL as being used, if present. */
260 mem_attrs
*p
= (mem_attrs
*) x
;
263 ggc_mark_tree (p
->decl
);
266 ggc_mark_rtx (p
->offset
);
269 ggc_mark_rtx (p
->size
);
272 /* Allocate a new mem_attrs structure and insert it into the hash table if
273 one identical to it is not already in the table. We are doing this for
277 get_mem_attrs (alias
, decl
, offset
, size
, align
, mode
)
283 enum machine_mode mode
;
288 /* If everything is the default, we can just return zero. */
289 if (alias
== 0 && decl
== 0 && offset
== 0
291 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
293 || (mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
298 attrs
.offset
= offset
;
302 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
305 *slot
= ggc_alloc (sizeof (mem_attrs
));
306 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
312 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
313 don't attempt to share with the various global pieces of rtl (such as
314 frame_pointer_rtx). */
317 gen_raw_REG (mode
, regno
)
318 enum machine_mode mode
;
321 rtx x
= gen_rtx_raw_REG (mode
, regno
);
322 ORIGINAL_REGNO (x
) = regno
;
326 /* There are some RTL codes that require special attention; the generation
327 functions do the raw handling. If you add to this list, modify
328 special_rtx in gengenrtl.c as well. */
331 gen_rtx_CONST_INT (mode
, arg
)
332 enum machine_mode mode ATTRIBUTE_UNUSED
;
337 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
338 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
340 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
341 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
342 return const_true_rtx
;
345 /* Look up the CONST_INT in the hash table. */
346 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
347 (hashval_t
) arg
, INSERT
);
349 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
354 /* CONST_DOUBLEs needs special handling because their length is known
358 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
359 enum machine_mode mode
;
361 HOST_WIDE_INT arg1
, arg2
;
363 rtx r
= rtx_alloc (CONST_DOUBLE
);
368 X0EXP (r
, 1) = NULL_RTX
;
372 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 3; --i
)
379 gen_rtx_REG (mode
, regno
)
380 enum machine_mode mode
;
383 /* In case the MD file explicitly references the frame pointer, have
384 all such references point to the same frame pointer. This is
385 used during frame pointer elimination to distinguish the explicit
386 references to these registers from pseudos that happened to be
389 If we have eliminated the frame pointer or arg pointer, we will
390 be using it as a normal register, for example as a spill
391 register. In such cases, we might be accessing it in a mode that
392 is not Pmode and therefore cannot use the pre-allocated rtx.
394 Also don't do this when we are making new REGs in reload, since
395 we don't want to get confused with the real pointers. */
397 if (mode
== Pmode
&& !reload_in_progress
)
399 if (regno
== FRAME_POINTER_REGNUM
)
400 return frame_pointer_rtx
;
401 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
402 if (regno
== HARD_FRAME_POINTER_REGNUM
)
403 return hard_frame_pointer_rtx
;
405 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
406 if (regno
== ARG_POINTER_REGNUM
)
407 return arg_pointer_rtx
;
409 #ifdef RETURN_ADDRESS_POINTER_REGNUM
410 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
411 return return_address_pointer_rtx
;
413 if (regno
== STACK_POINTER_REGNUM
)
414 return stack_pointer_rtx
;
417 return gen_raw_REG (mode
, regno
);
421 gen_rtx_MEM (mode
, addr
)
422 enum machine_mode mode
;
425 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
427 /* This field is not cleared by the mere allocation of the rtx, so
435 gen_rtx_SUBREG (mode
, reg
, offset
)
436 enum machine_mode mode
;
440 /* This is the most common failure type.
441 Catch it early so we can see who does it. */
442 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
445 /* This check isn't usable right now because combine will
446 throw arbitrary crap like a CALL into a SUBREG in
447 gen_lowpart_for_combine so we must just eat it. */
449 /* Check for this too. */
450 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
453 return gen_rtx_fmt_ei (SUBREG
, mode
, reg
, offset
);
456 /* Generate a SUBREG representing the least-significant part of REG if MODE
457 is smaller than mode of REG, otherwise paradoxical SUBREG. */
460 gen_lowpart_SUBREG (mode
, reg
)
461 enum machine_mode mode
;
464 enum machine_mode inmode
;
466 inmode
= GET_MODE (reg
);
467 if (inmode
== VOIDmode
)
469 return gen_rtx_SUBREG (mode
, reg
,
470 subreg_lowpart_offset (mode
, inmode
));
473 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
475 ** This routine generates an RTX of the size specified by
476 ** <code>, which is an RTX code. The RTX structure is initialized
477 ** from the arguments <element1> through <elementn>, which are
478 ** interpreted according to the specific RTX type's format. The
479 ** special machine mode associated with the rtx (if any) is specified
482 ** gen_rtx can be invoked in a way which resembles the lisp-like
483 ** rtx it will generate. For example, the following rtx structure:
485 ** (plus:QI (mem:QI (reg:SI 1))
486 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
488 ** ...would be generated by the following C code:
490 ** gen_rtx (PLUS, QImode,
491 ** gen_rtx (MEM, QImode,
492 ** gen_rtx (REG, SImode, 1)),
493 ** gen_rtx (MEM, QImode,
494 ** gen_rtx (PLUS, SImode,
495 ** gen_rtx (REG, SImode, 2),
496 ** gen_rtx (REG, SImode, 3)))),
501 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
503 int i
; /* Array indices... */
504 const char *fmt
; /* Current rtx's format... */
505 rtx rt_val
; /* RTX to return to caller... */
508 VA_FIXEDARG (p
, enum rtx_code
, code
);
509 VA_FIXEDARG (p
, enum machine_mode
, mode
);
514 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
519 rtx arg0
= va_arg (p
, rtx
);
520 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
521 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
522 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
527 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
531 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
535 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
536 rt_val
->mode
= mode
; /* Store the machine mode... */
538 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
539 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
543 case '0': /* Unused field. */
546 case 'i': /* An integer? */
547 XINT (rt_val
, i
) = va_arg (p
, int);
550 case 'w': /* A wide integer? */
551 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
554 case 's': /* A string? */
555 XSTR (rt_val
, i
) = va_arg (p
, char *);
558 case 'e': /* An expression? */
559 case 'u': /* An insn? Same except when printing. */
560 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
563 case 'E': /* An RTX vector? */
564 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
567 case 'b': /* A bitmap? */
568 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
571 case 't': /* A tree? */
572 XTREE (rt_val
, i
) = va_arg (p
, tree
);
586 /* gen_rtvec (n, [rt1, ..., rtn])
588 ** This routine creates an rtvec and stores within it the
589 ** pointers to rtx's which are its arguments.
594 gen_rtvec
VPARAMS ((int n
, ...))
600 VA_FIXEDARG (p
, int, n
);
603 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
605 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
607 for (i
= 0; i
< n
; i
++)
608 vector
[i
] = va_arg (p
, rtx
);
610 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
614 return gen_rtvec_v (save_n
, vector
);
618 gen_rtvec_v (n
, argp
)
626 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
628 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
630 for (i
= 0; i
< n
; i
++)
631 rt_val
->elem
[i
] = *argp
++;
636 /* Generate a REG rtx for a new pseudo register of mode MODE.
637 This pseudo is assigned the next sequential register number. */
641 enum machine_mode mode
;
643 struct function
*f
= cfun
;
646 /* Don't let anything called after initial flow analysis create new
651 if (generating_concat_p
652 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
653 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
655 /* For complex modes, don't make a single pseudo.
656 Instead, make a CONCAT of two pseudos.
657 This allows noncontiguous allocation of the real and imaginary parts,
658 which makes much better code. Besides, allocating DCmode
659 pseudos overstrains reload on some machines like the 386. */
660 rtx realpart
, imagpart
;
661 int size
= GET_MODE_UNIT_SIZE (mode
);
662 enum machine_mode partmode
663 = mode_for_size (size
* BITS_PER_UNIT
,
664 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
665 ? MODE_FLOAT
: MODE_INT
),
668 realpart
= gen_reg_rtx (partmode
);
669 imagpart
= gen_reg_rtx (partmode
);
670 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
673 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
674 enough to have an element for this pseudo reg number. */
676 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
678 int old_size
= f
->emit
->regno_pointer_align_length
;
683 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
684 memset (new + old_size
, 0, old_size
);
685 f
->emit
->regno_pointer_align
= (unsigned char *) new;
687 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
688 old_size
* 2 * sizeof (rtx
));
689 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
690 regno_reg_rtx
= new1
;
692 new2
= (tree
*) xrealloc (f
->emit
->regno_decl
,
693 old_size
* 2 * sizeof (tree
));
694 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
695 f
->emit
->regno_decl
= new2
;
697 f
->emit
->regno_pointer_align_length
= old_size
* 2;
700 val
= gen_raw_REG (mode
, reg_rtx_no
);
701 regno_reg_rtx
[reg_rtx_no
++] = val
;
705 /* Identify REG (which may be a CONCAT) as a user register. */
711 if (GET_CODE (reg
) == CONCAT
)
713 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
714 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
716 else if (GET_CODE (reg
) == REG
)
717 REG_USERVAR_P (reg
) = 1;
722 /* Identify REG as a probable pointer register and show its alignment
723 as ALIGN, if nonzero. */
726 mark_reg_pointer (reg
, align
)
730 if (! REG_POINTER (reg
))
732 REG_POINTER (reg
) = 1;
735 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
737 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
738 /* We can no-longer be sure just how aligned this pointer is */
739 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
742 /* Return 1 plus largest pseudo reg number used in the current function. */
750 /* Return 1 + the largest label number used so far in the current function. */
755 if (last_label_num
&& label_num
== base_label_num
)
756 return last_label_num
;
760 /* Return first label number used in this function (if any were used). */
763 get_first_label_num ()
765 return first_label_num
;
768 /* Return the final regno of X, which is a SUBREG of a hard
771 subreg_hard_regno (x
, check_mode
)
775 enum machine_mode mode
= GET_MODE (x
);
776 unsigned int byte_offset
, base_regno
, final_regno
;
777 rtx reg
= SUBREG_REG (x
);
779 /* This is where we attempt to catch illegal subregs
780 created by the compiler. */
781 if (GET_CODE (x
) != SUBREG
782 || GET_CODE (reg
) != REG
)
784 base_regno
= REGNO (reg
);
785 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
787 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
790 /* Catch non-congruent offsets too. */
791 byte_offset
= SUBREG_BYTE (x
);
792 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
795 final_regno
= subreg_regno (x
);
800 /* Return a value representing some low-order bits of X, where the number
801 of low-order bits is given by MODE. Note that no conversion is done
802 between floating-point and fixed-point values, rather, the bit
803 representation is returned.
805 This function handles the cases in common between gen_lowpart, below,
806 and two variants in cse.c and combine.c. These are the cases that can
807 be safely handled at all points in the compilation.
809 If this is not a case we can handle, return 0. */
812 gen_lowpart_common (mode
, x
)
813 enum machine_mode mode
;
816 int msize
= GET_MODE_SIZE (mode
);
817 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
820 if (GET_MODE (x
) == mode
)
823 /* MODE must occupy no more words than the mode of X. */
824 if (GET_MODE (x
) != VOIDmode
825 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
826 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
829 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
831 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
832 && (GET_MODE_CLASS (mode
) == MODE_INT
833 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
835 /* If we are getting the low-order part of something that has been
836 sign- or zero-extended, we can either just use the object being
837 extended or make a narrower extension. If we want an even smaller
838 piece than the size of the object being extended, call ourselves
841 This case is used mostly by combine and cse. */
843 if (GET_MODE (XEXP (x
, 0)) == mode
)
845 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
846 return gen_lowpart_common (mode
, XEXP (x
, 0));
847 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
848 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
850 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
851 || GET_CODE (x
) == CONCAT
)
852 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
853 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
854 from the low-order part of the constant. */
855 else if ((GET_MODE_CLASS (mode
) == MODE_INT
856 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
857 && GET_MODE (x
) == VOIDmode
858 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
860 /* If MODE is twice the host word size, X is already the desired
861 representation. Otherwise, if MODE is wider than a word, we can't
862 do this. If MODE is exactly a word, return just one CONST_INT. */
864 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
866 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
868 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
869 return (GET_CODE (x
) == CONST_INT
? x
870 : GEN_INT (CONST_DOUBLE_LOW (x
)));
873 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
874 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
875 : CONST_DOUBLE_LOW (x
));
877 /* Sign extend to HOST_WIDE_INT. */
878 val
= trunc_int_for_mode (val
, mode
);
880 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
885 #ifndef REAL_ARITHMETIC
886 /* If X is an integral constant but we want it in floating-point, it
887 must be the case that we have a union of an integer and a floating-point
888 value. If the machine-parameters allow it, simulate that union here
889 and return the result. The two-word and single-word cases are
892 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
893 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
894 || flag_pretend_float
)
895 && GET_MODE_CLASS (mode
) == MODE_FLOAT
896 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
897 && GET_CODE (x
) == CONST_INT
898 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
900 union {HOST_WIDE_INT i
; float d
; } u
;
903 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
905 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
906 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
907 || flag_pretend_float
)
908 && GET_MODE_CLASS (mode
) == MODE_FLOAT
909 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
910 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
911 && GET_MODE (x
) == VOIDmode
912 && (sizeof (double) * HOST_BITS_PER_CHAR
913 == 2 * HOST_BITS_PER_WIDE_INT
))
915 union {HOST_WIDE_INT i
[2]; double d
; } u
;
916 HOST_WIDE_INT low
, high
;
918 if (GET_CODE (x
) == CONST_INT
)
919 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
921 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
923 #ifdef HOST_WORDS_BIG_ENDIAN
924 u
.i
[0] = high
, u
.i
[1] = low
;
926 u
.i
[0] = low
, u
.i
[1] = high
;
929 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
932 /* Similarly, if this is converting a floating-point value into a
933 single-word integer. Only do this is the host and target parameters are
936 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
937 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
938 || flag_pretend_float
)
939 && (GET_MODE_CLASS (mode
) == MODE_INT
940 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
941 && GET_CODE (x
) == CONST_DOUBLE
942 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
943 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
944 return constant_subword (x
, (offset
/ UNITS_PER_WORD
), GET_MODE (x
));
946 /* Similarly, if this is converting a floating-point value into a
947 two-word integer, we can do this one word at a time and make an
948 integer. Only do this is the host and target parameters are
951 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
952 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
953 || flag_pretend_float
)
954 && (GET_MODE_CLASS (mode
) == MODE_INT
955 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
956 && GET_CODE (x
) == CONST_DOUBLE
957 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
958 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
960 rtx lowpart
, highpart
;
962 lowpart
= constant_subword (x
,
963 (offset
/ UNITS_PER_WORD
) + WORDS_BIG_ENDIAN
,
965 highpart
= constant_subword (x
,
966 (offset
/ UNITS_PER_WORD
) + (! WORDS_BIG_ENDIAN
),
968 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
969 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
970 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
972 #else /* ifndef REAL_ARITHMETIC */
974 /* When we have a FP emulator, we can handle all conversions between
975 FP and integer operands. This simplifies reload because it
976 doesn't have to deal with constructs like (subreg:DI
977 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
978 /* Single-precision floats are always 32-bits and double-precision
979 floats are always 64-bits. */
981 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
982 && GET_MODE_BITSIZE (mode
) == 32
983 && GET_CODE (x
) == CONST_INT
)
989 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
990 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
992 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
993 && GET_MODE_BITSIZE (mode
) == 64
994 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
995 && GET_MODE (x
) == VOIDmode
)
999 HOST_WIDE_INT low
, high
;
1001 if (GET_CODE (x
) == CONST_INT
)
1004 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1008 low
= CONST_DOUBLE_LOW (x
);
1009 high
= CONST_DOUBLE_HIGH (x
);
1012 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1014 if (WORDS_BIG_ENDIAN
)
1015 i
[0] = high
, i
[1] = low
;
1017 i
[0] = low
, i
[1] = high
;
1019 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
1020 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1022 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1023 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1024 && GET_CODE (x
) == CONST_DOUBLE
1025 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1028 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1029 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1031 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1032 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1035 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[endian
]);
1039 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
);
1042 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1046 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1052 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1054 #if HOST_BITS_PER_WIDE_INT == 32
1055 return immed_double_const (i
[endian
], i
[1 - endian
], mode
);
1060 if (HOST_BITS_PER_WIDE_INT
!= 64)
1063 for (c
= 0; c
< 4; c
++)
1066 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1070 return immed_double_const (((unsigned long) i
[endian
]) |
1071 (((HOST_WIDE_INT
) i
[1-endian
]) << 32),
1075 return immed_double_const (((unsigned long) i
[endian
*3]) |
1076 (((HOST_WIDE_INT
) i
[1+endian
]) << 32),
1077 ((unsigned long) i
[2-endian
]) |
1078 (((HOST_WIDE_INT
) i
[3-endian
*3]) << 32),
1086 #endif /* ifndef REAL_ARITHMETIC */
1088 /* Otherwise, we can't do this. */
1092 /* Return the real part (which has mode MODE) of a complex value X.
1093 This always comes at the low address in memory. */
1096 gen_realpart (mode
, x
)
1097 enum machine_mode mode
;
1100 if (WORDS_BIG_ENDIAN
1101 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1103 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1105 ("Can't access real part of complex value in hard register");
1106 else if (WORDS_BIG_ENDIAN
)
1107 return gen_highpart (mode
, x
);
1109 return gen_lowpart (mode
, x
);
1112 /* Return the imaginary part (which has mode MODE) of a complex value X.
1113 This always comes at the high address in memory. */
1116 gen_imagpart (mode
, x
)
1117 enum machine_mode mode
;
1120 if (WORDS_BIG_ENDIAN
)
1121 return gen_lowpart (mode
, x
);
1122 else if (! WORDS_BIG_ENDIAN
1123 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1125 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1127 ("can't access imaginary part of complex value in hard register");
1129 return gen_highpart (mode
, x
);
1132 /* Return 1 iff X, assumed to be a SUBREG,
1133 refers to the real part of the complex value in its containing reg.
1134 Complex values are always stored with the real part in the first word,
1135 regardless of WORDS_BIG_ENDIAN. */
1138 subreg_realpart_p (x
)
1141 if (GET_CODE (x
) != SUBREG
)
1144 return ((unsigned int) SUBREG_BYTE (x
)
1145 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1148 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1149 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1150 least-significant part of X.
1151 MODE specifies how big a part of X to return;
1152 it usually should not be larger than a word.
1153 If X is a MEM whose address is a QUEUED, the value may be so also. */
1156 gen_lowpart (mode
, x
)
1157 enum machine_mode mode
;
1160 rtx result
= gen_lowpart_common (mode
, x
);
1164 else if (GET_CODE (x
) == REG
)
1166 /* Must be a hard reg that's not valid in MODE. */
1167 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1172 else if (GET_CODE (x
) == MEM
)
1174 /* The only additional case we can do is MEM. */
1176 if (WORDS_BIG_ENDIAN
)
1177 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1178 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1180 if (BYTES_BIG_ENDIAN
)
1181 /* Adjust the address so that the address-after-the-data
1183 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1184 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1186 return adjust_address (x
, mode
, offset
);
1188 else if (GET_CODE (x
) == ADDRESSOF
)
1189 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1194 /* Like `gen_lowpart', but refer to the most significant part.
1195 This is used to access the imaginary part of a complex number. */
1198 gen_highpart (mode
, x
)
1199 enum machine_mode mode
;
1202 unsigned int msize
= GET_MODE_SIZE (mode
);
1205 /* This case loses if X is a subreg. To catch bugs early,
1206 complain if an invalid MODE is used even in other cases. */
1207 if (msize
> UNITS_PER_WORD
1208 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1211 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1212 subreg_highpart_offset (mode
, GET_MODE (x
)));
1214 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1215 the target if we have a MEM. gen_highpart must return a valid operand,
1216 emitting code if necessary to do so. */
1217 if (GET_CODE (result
) == MEM
)
1218 result
= validize_mem (result
);
1225 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1226 be VOIDmode constant. */
1228 gen_highpart_mode (outermode
, innermode
, exp
)
1229 enum machine_mode outermode
, innermode
;
1232 if (GET_MODE (exp
) != VOIDmode
)
1234 if (GET_MODE (exp
) != innermode
)
1236 return gen_highpart (outermode
, exp
);
1238 return simplify_gen_subreg (outermode
, exp
, innermode
,
1239 subreg_highpart_offset (outermode
, innermode
));
1241 /* Return offset in bytes to get OUTERMODE low part
1242 of the value in mode INNERMODE stored in memory in target format. */
1245 subreg_lowpart_offset (outermode
, innermode
)
1246 enum machine_mode outermode
, innermode
;
1248 unsigned int offset
= 0;
1249 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1253 if (WORDS_BIG_ENDIAN
)
1254 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1255 if (BYTES_BIG_ENDIAN
)
1256 offset
+= difference
% UNITS_PER_WORD
;
1262 /* Return offset in bytes to get OUTERMODE high part
1263 of the value in mode INNERMODE stored in memory in target format. */
1265 subreg_highpart_offset (outermode
, innermode
)
1266 enum machine_mode outermode
, innermode
;
1268 unsigned int offset
= 0;
1269 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1271 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1276 if (! WORDS_BIG_ENDIAN
)
1277 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1278 if (! BYTES_BIG_ENDIAN
)
1279 offset
+= difference
% UNITS_PER_WORD
;
1285 /* Return 1 iff X, assumed to be a SUBREG,
1286 refers to the least significant part of its containing reg.
1287 If X is not a SUBREG, always return 1 (it is its own low part!). */
1290 subreg_lowpart_p (x
)
1293 if (GET_CODE (x
) != SUBREG
)
1295 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1298 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1299 == SUBREG_BYTE (x
));
1303 /* Helper routine for all the constant cases of operand_subword.
1304 Some places invoke this directly. */
1307 constant_subword (op
, offset
, mode
)
1310 enum machine_mode mode
;
1312 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1315 /* If OP is already an integer word, return it. */
1316 if (GET_MODE_CLASS (mode
) == MODE_INT
1317 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1320 #ifdef REAL_ARITHMETIC
1321 /* The output is some bits, the width of the target machine's word.
1322 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1324 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1325 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1326 && GET_MODE_BITSIZE (mode
) == 64
1327 && GET_CODE (op
) == CONST_DOUBLE
)
1332 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1333 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1335 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1336 which the words are written depends on the word endianness.
1337 ??? This is a potential portability problem and should
1338 be fixed at some point.
1340 We must excercise caution with the sign bit. By definition there
1341 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1342 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1343 So we explicitly mask and sign-extend as necessary. */
1344 if (BITS_PER_WORD
== 32)
1347 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1348 return GEN_INT (val
);
1350 #if HOST_BITS_PER_WIDE_INT >= 64
1351 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1353 val
= k
[! WORDS_BIG_ENDIAN
];
1354 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1355 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1356 return GEN_INT (val
);
1359 else if (BITS_PER_WORD
== 16)
1361 val
= k
[offset
>> 1];
1362 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1364 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1365 return GEN_INT (val
);
1370 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1371 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1372 && GET_MODE_BITSIZE (mode
) > 64
1373 && GET_CODE (op
) == CONST_DOUBLE
)
1378 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1379 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1381 if (BITS_PER_WORD
== 32)
1384 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1385 return GEN_INT (val
);
1387 #if HOST_BITS_PER_WIDE_INT >= 64
1388 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1390 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1391 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1392 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1393 return GEN_INT (val
);
1399 #else /* no REAL_ARITHMETIC */
1400 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1401 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1402 || flag_pretend_float
)
1403 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1404 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1405 && GET_CODE (op
) == CONST_DOUBLE
)
1407 /* The constant is stored in the host's word-ordering,
1408 but we want to access it in the target's word-ordering. Some
1409 compilers don't like a conditional inside macro args, so we have two
1410 copies of the return. */
1411 #ifdef HOST_WORDS_BIG_ENDIAN
1412 return GEN_INT (offset
== WORDS_BIG_ENDIAN
1413 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1415 return GEN_INT (offset
!= WORDS_BIG_ENDIAN
1416 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1419 #endif /* no REAL_ARITHMETIC */
1421 /* Single word float is a little harder, since single- and double-word
1422 values often do not have the same high-order bits. We have already
1423 verified that we want the only defined word of the single-word value. */
1424 #ifdef REAL_ARITHMETIC
1425 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1426 && GET_MODE_BITSIZE (mode
) == 32
1427 && GET_CODE (op
) == CONST_DOUBLE
)
1432 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1433 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1435 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1437 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1439 if (BITS_PER_WORD
== 16)
1441 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1443 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1446 return GEN_INT (val
);
1449 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1450 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1451 || flag_pretend_float
)
1452 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1453 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1454 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1455 && GET_CODE (op
) == CONST_DOUBLE
)
1458 union {float f
; HOST_WIDE_INT i
; } u
;
1460 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1463 return GEN_INT (u
.i
);
1465 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1466 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1467 || flag_pretend_float
)
1468 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1469 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1470 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1471 && GET_CODE (op
) == CONST_DOUBLE
)
1474 union {double d
; HOST_WIDE_INT i
; } u
;
1476 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1479 return GEN_INT (u
.i
);
1481 #endif /* no REAL_ARITHMETIC */
1483 /* The only remaining cases that we can handle are integers.
1484 Convert to proper endianness now since these cases need it.
1485 At this point, offset == 0 means the low-order word.
1487 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1488 in general. However, if OP is (const_int 0), we can just return
1491 if (op
== const0_rtx
)
1494 if (GET_MODE_CLASS (mode
) != MODE_INT
1495 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1496 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1499 if (WORDS_BIG_ENDIAN
)
1500 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1502 /* Find out which word on the host machine this value is in and get
1503 it from the constant. */
1504 val
= (offset
/ size_ratio
== 0
1505 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1506 : (GET_CODE (op
) == CONST_INT
1507 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1509 /* Get the value we want into the low bits of val. */
1510 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1511 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1513 val
= trunc_int_for_mode (val
, word_mode
);
1515 return GEN_INT (val
);
1518 /* Return subword OFFSET of operand OP.
1519 The word number, OFFSET, is interpreted as the word number starting
1520 at the low-order address. OFFSET 0 is the low-order word if not
1521 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1523 If we cannot extract the required word, we return zero. Otherwise,
1524 an rtx corresponding to the requested word will be returned.
1526 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1527 reload has completed, a valid address will always be returned. After
1528 reload, if a valid address cannot be returned, we return zero.
1530 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1531 it is the responsibility of the caller.
1533 MODE is the mode of OP in case it is a CONST_INT.
1535 ??? This is still rather broken for some cases. The problem for the
1536 moment is that all callers of this thing provide no 'goal mode' to
1537 tell us to work with. This exists because all callers were written
1538 in a word based SUBREG world.
1539 Now use of this function can be deprecated by simplify_subreg in most
1544 operand_subword (op
, offset
, validate_address
, mode
)
1546 unsigned int offset
;
1547 int validate_address
;
1548 enum machine_mode mode
;
1550 if (mode
== VOIDmode
)
1551 mode
= GET_MODE (op
);
1553 if (mode
== VOIDmode
)
1556 /* If OP is narrower than a word, fail. */
1558 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1561 /* If we want a word outside OP, return zero. */
1563 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1566 /* Form a new MEM at the requested address. */
1567 if (GET_CODE (op
) == MEM
)
1569 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1571 if (! validate_address
)
1574 else if (reload_completed
)
1576 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1580 return replace_equiv_address (new, XEXP (new, 0));
1583 /* Rest can be handled by simplify_subreg. */
1584 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1587 /* Similar to `operand_subword', but never return 0. If we can't extract
1588 the required subword, put OP into a register and try again. If that fails,
1589 abort. We always validate the address in this case.
1591 MODE is the mode of OP, in case it is CONST_INT. */
1594 operand_subword_force (op
, offset
, mode
)
1596 unsigned int offset
;
1597 enum machine_mode mode
;
1599 rtx result
= operand_subword (op
, offset
, 1, mode
);
1604 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1606 /* If this is a register which can not be accessed by words, copy it
1607 to a pseudo register. */
1608 if (GET_CODE (op
) == REG
)
1609 op
= copy_to_reg (op
);
1611 op
= force_reg (mode
, op
);
1614 result
= operand_subword (op
, offset
, 1, mode
);
1621 /* Given a compare instruction, swap the operands.
1622 A test instruction is changed into a compare of 0 against the operand. */
1625 reverse_comparison (insn
)
1628 rtx body
= PATTERN (insn
);
1631 if (GET_CODE (body
) == SET
)
1632 comp
= SET_SRC (body
);
1634 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1636 if (GET_CODE (comp
) == COMPARE
)
1638 rtx op0
= XEXP (comp
, 0);
1639 rtx op1
= XEXP (comp
, 1);
1640 XEXP (comp
, 0) = op1
;
1641 XEXP (comp
, 1) = op0
;
1645 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1646 CONST0_RTX (GET_MODE (comp
)), comp
);
1647 if (GET_CODE (body
) == SET
)
1648 SET_SRC (body
) = new;
1650 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1655 /* Given REF, a MEM, and T, either the type of X or the expression
1656 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1657 if we are making a new object of this type. */
1660 set_mem_attributes (ref
, t
, objectp
)
1665 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1666 tree decl
= MEM_DECL (ref
);
1667 rtx offset
= MEM_OFFSET (ref
);
1668 rtx size
= MEM_SIZE (ref
);
1669 unsigned int align
= MEM_ALIGN (ref
);
1672 /* It can happen that type_for_mode was given a mode for which there
1673 is no language-level type. In which case it returns NULL, which
1678 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1680 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1681 wrong answer, as it assumes that DECL_RTL already has the right alias
1682 info. Callers should not set DECL_RTL until after the call to
1683 set_mem_attributes. */
1684 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1687 /* Get the alias set from the expression or type (perhaps using a
1688 front-end routine) and use it. */
1689 alias
= get_alias_set (t
);
1691 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1692 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1693 RTX_UNCHANGING_P (ref
)
1694 |= (lang_hooks
.honor_readonly
1695 && (TYPE_READONLY (type
) || TREE_READONLY (t
)));
1697 /* If we are making an object of this type, or if this is a DECL, we know
1698 that it is a scalar if the type is not an aggregate. */
1699 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1700 MEM_SCALAR_P (ref
) = 1;
1702 /* If the size is known, we can set that. */
1703 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1704 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1706 /* If T is not a type, we may be able to deduce some more information about
1710 maybe_set_unchanging (ref
, t
);
1711 if (TREE_THIS_VOLATILE (t
))
1712 MEM_VOLATILE_P (ref
) = 1;
1714 /* Now remove any NOPs: they don't change what the underlying object is.
1715 Likewise for SAVE_EXPR. */
1716 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1717 || TREE_CODE (t
) == NON_LVALUE_EXPR
|| TREE_CODE (t
) == SAVE_EXPR
)
1718 t
= TREE_OPERAND (t
, 0);
1720 /* If this expression can't be addressed (e.g., it contains a reference
1721 to a non-addressable field), show we don't change its alias set. */
1722 if (! can_address_p (t
))
1723 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1725 /* If this is a decl, set the attributes of the MEM from it. */
1729 offset
= GEN_INT (0);
1730 size
= (DECL_SIZE_UNIT (t
)
1731 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1732 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1733 align
= DECL_ALIGN (t
);
1736 /* If this is an INDIRECT_REF, we know its alignment. */
1737 else if (TREE_CODE (t
) == INDIRECT_REF
)
1738 align
= TYPE_ALIGN (type
);
1741 /* Now set the attributes we computed above. */
1743 = get_mem_attrs (alias
, decl
, offset
, size
, align
, GET_MODE (ref
));
1745 /* If this is already known to be a scalar or aggregate, we are done. */
1746 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1749 /* If it is a reference into an aggregate, this is part of an aggregate.
1750 Otherwise we don't know. */
1751 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1752 || TREE_CODE (t
) == ARRAY_RANGE_REF
1753 || TREE_CODE (t
) == BIT_FIELD_REF
)
1754 MEM_IN_STRUCT_P (ref
) = 1;
1757 /* Set the alias set of MEM to SET. */
1760 set_mem_alias_set (mem
, set
)
1764 #ifdef ENABLE_CHECKING
1765 /* If the new and old alias sets don't conflict, something is wrong. */
1766 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1770 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_DECL (mem
), MEM_OFFSET (mem
),
1771 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1775 /* Set the alignment of MEM to ALIGN bits. */
1778 set_mem_align (mem
, align
)
1782 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_DECL (mem
),
1783 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1787 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1788 and its address changed to ADDR. (VOIDmode means don't change the mode.
1789 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1790 returned memory location is required to be valid. The memory
1791 attributes are not changed. */
1794 change_address_1 (memref
, mode
, addr
, validate
)
1796 enum machine_mode mode
;
1802 if (GET_CODE (memref
) != MEM
)
1804 if (mode
== VOIDmode
)
1805 mode
= GET_MODE (memref
);
1807 addr
= XEXP (memref
, 0);
1811 if (reload_in_progress
|| reload_completed
)
1813 if (! memory_address_p (mode
, addr
))
1817 addr
= memory_address (mode
, addr
);
1820 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1823 new = gen_rtx_MEM (mode
, addr
);
1824 MEM_COPY_ATTRIBUTES (new, memref
);
1828 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1829 way we are changing MEMREF, so we only preserve the alias set. */
1832 change_address (memref
, mode
, addr
)
1834 enum machine_mode mode
;
1837 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
1838 enum machine_mode mmode
= GET_MODE (new);
1841 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
1842 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
1843 (mmode
== BLKmode
? 1
1844 : GET_MODE_ALIGNMENT (mmode
) / BITS_PER_UNIT
),
1850 /* Return a memory reference like MEMREF, but with its mode changed
1851 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1852 nonzero, the memory address is forced to be valid. */
1855 adjust_address_1 (memref
, mode
, offset
, validate
)
1857 enum machine_mode mode
;
1858 HOST_WIDE_INT offset
;
1861 rtx addr
= XEXP (memref
, 0);
1863 rtx memoffset
= MEM_OFFSET (memref
);
1865 unsigned int memalign
= MEM_ALIGN (memref
);
1867 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1868 object, we can merge it into the LO_SUM. */
1869 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1871 && (unsigned HOST_WIDE_INT
) offset
1872 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1873 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1874 plus_constant (XEXP (addr
, 1), offset
));
1875 else if (offset
== 0)
1876 /* ??? Prefer to create garbage instead of creating shared rtl. */
1877 addr
= copy_rtx (addr
);
1879 addr
= plus_constant (addr
, offset
);
1881 new = change_address_1 (memref
, mode
, addr
, validate
);
1883 /* Compute the new values of the memory attributes due to this adjustment.
1884 We add the offsets and update the alignment. */
1886 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1888 /* Compute the new alignment by taking the MIN of the alignment and the
1889 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1892 memalign
= MIN (memalign
, (offset
& -offset
) * BITS_PER_UNIT
);
1894 /* We can compute the size in a number of ways. */
1895 if (mode
!= BLKmode
)
1896 size
= GEN_INT (GET_MODE_SIZE (mode
));
1897 else if (MEM_SIZE (memref
))
1898 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1900 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_DECL (memref
),
1901 memoffset
, size
, memalign
, GET_MODE (new));
1903 /* At some point, we should validate that this offset is within the object,
1904 if all the appropriate values are known. */
1908 /* Return a memory reference like MEMREF, but whose address is changed by
1909 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1910 known to be in OFFSET (possibly 1). */
1913 offset_address (memref
, offset
, pow2
)
1918 rtx
new = change_address_1 (memref
, VOIDmode
,
1919 gen_rtx_PLUS (Pmode
, XEXP (memref
, 0),
1920 force_reg (Pmode
, offset
)), 1);
1922 /* Update the alignment to reflect the offset. Reset the offset, which
1924 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_DECL (memref
),
1925 0, 0, MIN (MEM_ALIGN (memref
),
1926 pow2
* BITS_PER_UNIT
),
1931 /* Return a memory reference like MEMREF, but with its address changed to
1932 ADDR. The caller is asserting that the actual piece of memory pointed
1933 to is the same, just the form of the address is being changed, such as
1934 by putting something into a register. */
1937 replace_equiv_address (memref
, addr
)
1941 /* change_address_1 copies the memory attribute structure without change
1942 and that's exactly what we want here. */
1943 return change_address_1 (memref
, VOIDmode
, addr
, 1);
1946 /* Likewise, but the reference is not required to be valid. */
1949 replace_equiv_address_nv (memref
, addr
)
1953 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1956 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1963 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1964 NULL_RTX
, label_num
++, NULL
, NULL
);
1966 LABEL_NUSES (label
) = 0;
1967 LABEL_ALTERNATE_NAME (label
) = NULL
;
1971 /* For procedure integration. */
1973 /* Install new pointers to the first and last insns in the chain.
1974 Also, set cur_insn_uid to one higher than the last in use.
1975 Used for an inline-procedure after copying the insn chain. */
1978 set_new_first_and_last_insn (first
, last
)
1987 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1988 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1993 /* Set the range of label numbers found in the current function.
1994 This is used when belatedly compiling an inline function. */
1997 set_new_first_and_last_label_num (first
, last
)
2000 base_label_num
= label_num
;
2001 first_label_num
= first
;
2002 last_label_num
= last
;
2005 /* Set the last label number found in the current function.
2006 This is used when belatedly compiling an inline function. */
2009 set_new_last_label_num (last
)
2012 base_label_num
= label_num
;
2013 last_label_num
= last
;
2016 /* Restore all variables describing the current status from the structure *P.
2017 This is used after a nested function. */
2020 restore_emit_status (p
)
2021 struct function
*p ATTRIBUTE_UNUSED
;
2024 clear_emit_caches ();
2027 /* Clear out all parts of the state in F that can safely be discarded
2028 after the function has been compiled, to let garbage collection
2029 reclaim the memory. */
2032 free_emit_status (f
)
2035 free (f
->emit
->x_regno_reg_rtx
);
2036 free (f
->emit
->regno_pointer_align
);
2037 free (f
->emit
->regno_decl
);
2042 /* Go through all the RTL insn bodies and copy any invalid shared
2043 structure. This routine should only be called once. */
2046 unshare_all_rtl (fndecl
, insn
)
2052 /* Make sure that virtual parameters are not shared. */
2053 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2054 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2056 /* Make sure that virtual stack slots are not shared. */
2057 unshare_all_decls (DECL_INITIAL (fndecl
));
2059 /* Unshare just about everything else. */
2060 unshare_all_rtl_1 (insn
);
2062 /* Make sure the addresses of stack slots found outside the insn chain
2063 (such as, in DECL_RTL of a variable) are not shared
2064 with the insn chain.
2066 This special care is necessary when the stack slot MEM does not
2067 actually appear in the insn chain. If it does appear, its address
2068 is unshared from all else at that point. */
2069 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2072 /* Go through all the RTL insn bodies and copy any invalid shared
2073 structure, again. This is a fairly expensive thing to do so it
2074 should be done sparingly. */
2077 unshare_all_rtl_again (insn
)
2083 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2086 reset_used_flags (PATTERN (p
));
2087 reset_used_flags (REG_NOTES (p
));
2088 reset_used_flags (LOG_LINKS (p
));
2091 /* Make sure that virtual stack slots are not shared. */
2092 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2094 /* Make sure that virtual parameters are not shared. */
2095 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2096 reset_used_flags (DECL_RTL (decl
));
2098 reset_used_flags (stack_slot_list
);
2100 unshare_all_rtl (cfun
->decl
, insn
);
2103 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2104 Assumes the mark bits are cleared at entry. */
2107 unshare_all_rtl_1 (insn
)
2110 for (; insn
; insn
= NEXT_INSN (insn
))
2113 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2114 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2115 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2119 /* Go through all virtual stack slots of a function and copy any
2120 shared structure. */
2122 unshare_all_decls (blk
)
2127 /* Copy shared decls. */
2128 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2129 if (DECL_RTL_SET_P (t
))
2130 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2132 /* Now process sub-blocks. */
2133 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2134 unshare_all_decls (t
);
2137 /* Go through all virtual stack slots of a function and mark them as
2140 reset_used_decls (blk
)
2146 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2147 if (DECL_RTL_SET_P (t
))
2148 reset_used_flags (DECL_RTL (t
));
2150 /* Now process sub-blocks. */
2151 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2152 reset_used_decls (t
);
2155 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2156 Recursively does the same for subexpressions. */
2159 copy_rtx_if_shared (orig
)
2165 const char *format_ptr
;
2171 code
= GET_CODE (x
);
2173 /* These types may be freely shared. */
2186 /* SCRATCH must be shared because they represent distinct values. */
2190 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2191 a LABEL_REF, it isn't sharable. */
2192 if (GET_CODE (XEXP (x
, 0)) == PLUS
2193 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2194 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2203 /* The chain of insns is not being copied. */
2207 /* A MEM is allowed to be shared if its address is constant.
2209 We used to allow sharing of MEMs which referenced
2210 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2211 that can lose. instantiate_virtual_regs will not unshare
2212 the MEMs, and combine may change the structure of the address
2213 because it looks safe and profitable in one context, but
2214 in some other context it creates unrecognizable RTL. */
2215 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2224 /* This rtx may not be shared. If it has already been seen,
2225 replace it with a copy of itself. */
2231 copy
= rtx_alloc (code
);
2233 (sizeof (*copy
) - sizeof (copy
->fld
)
2234 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2240 /* Now scan the subexpressions recursively.
2241 We can store any replaced subexpressions directly into X
2242 since we know X is not shared! Any vectors in X
2243 must be copied if X was copied. */
2245 format_ptr
= GET_RTX_FORMAT (code
);
2247 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2249 switch (*format_ptr
++)
2252 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2256 if (XVEC (x
, i
) != NULL
)
2259 int len
= XVECLEN (x
, i
);
2261 if (copied
&& len
> 0)
2262 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2263 for (j
= 0; j
< len
; j
++)
2264 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2272 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2273 to look for shared sub-parts. */
2276 reset_used_flags (x
)
2281 const char *format_ptr
;
2286 code
= GET_CODE (x
);
2288 /* These types may be freely shared so we needn't do any resetting
2309 /* The chain of insns is not being copied. */
2318 format_ptr
= GET_RTX_FORMAT (code
);
2319 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2321 switch (*format_ptr
++)
2324 reset_used_flags (XEXP (x
, i
));
2328 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2329 reset_used_flags (XVECEXP (x
, i
, j
));
2335 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2336 Return X or the rtx for the pseudo reg the value of X was copied into.
2337 OTHER must be valid as a SET_DEST. */
2340 make_safe_from (x
, other
)
2344 switch (GET_CODE (other
))
2347 other
= SUBREG_REG (other
);
2349 case STRICT_LOW_PART
:
2352 other
= XEXP (other
, 0);
2358 if ((GET_CODE (other
) == MEM
2360 && GET_CODE (x
) != REG
2361 && GET_CODE (x
) != SUBREG
)
2362 || (GET_CODE (other
) == REG
2363 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2364 || reg_mentioned_p (other
, x
))))
2366 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2367 emit_move_insn (temp
, x
);
2373 /* Emission of insns (adding them to the doubly-linked list). */
2375 /* Return the first insn of the current sequence or current function. */
2383 /* Return the last insn emitted in current sequence or current function. */
2391 /* Specify a new insn as the last in the chain. */
2394 set_last_insn (insn
)
2397 if (NEXT_INSN (insn
) != 0)
2402 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2405 get_last_insn_anywhere ()
2407 struct sequence_stack
*stack
;
2410 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2411 if (stack
->last
!= 0)
2416 /* Return a number larger than any instruction's uid in this function. */
2421 return cur_insn_uid
;
2424 /* Renumber instructions so that no instruction UIDs are wasted. */
2427 renumber_insns (stream
)
2432 /* If we're not supposed to renumber instructions, don't. */
2433 if (!flag_renumber_insns
)
2436 /* If there aren't that many instructions, then it's not really
2437 worth renumbering them. */
2438 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2443 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2446 fprintf (stream
, "Renumbering insn %d to %d\n",
2447 INSN_UID (insn
), cur_insn_uid
);
2448 INSN_UID (insn
) = cur_insn_uid
++;
2452 /* Return the next insn. If it is a SEQUENCE, return the first insn
2461 insn
= NEXT_INSN (insn
);
2462 if (insn
&& GET_CODE (insn
) == INSN
2463 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2464 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2470 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2474 previous_insn (insn
)
2479 insn
= PREV_INSN (insn
);
2480 if (insn
&& GET_CODE (insn
) == INSN
2481 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2482 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2488 /* Return the next insn after INSN that is not a NOTE. This routine does not
2489 look inside SEQUENCEs. */
2492 next_nonnote_insn (insn
)
2497 insn
= NEXT_INSN (insn
);
2498 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2505 /* Return the previous insn before INSN that is not a NOTE. This routine does
2506 not look inside SEQUENCEs. */
2509 prev_nonnote_insn (insn
)
2514 insn
= PREV_INSN (insn
);
2515 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2522 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2523 or 0, if there is none. This routine does not look inside
2527 next_real_insn (insn
)
2532 insn
= NEXT_INSN (insn
);
2533 if (insn
== 0 || GET_CODE (insn
) == INSN
2534 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2541 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2542 or 0, if there is none. This routine does not look inside
2546 prev_real_insn (insn
)
2551 insn
= PREV_INSN (insn
);
2552 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2553 || GET_CODE (insn
) == JUMP_INSN
)
2560 /* Find the next insn after INSN that really does something. This routine
2561 does not look inside SEQUENCEs. Until reload has completed, this is the
2562 same as next_real_insn. */
2565 active_insn_p (insn
)
2568 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2569 || (GET_CODE (insn
) == INSN
2570 && (! reload_completed
2571 || (GET_CODE (PATTERN (insn
)) != USE
2572 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2576 next_active_insn (insn
)
2581 insn
= NEXT_INSN (insn
);
2582 if (insn
== 0 || active_insn_p (insn
))
2589 /* Find the last insn before INSN that really does something. This routine
2590 does not look inside SEQUENCEs. Until reload has completed, this is the
2591 same as prev_real_insn. */
2594 prev_active_insn (insn
)
2599 insn
= PREV_INSN (insn
);
2600 if (insn
== 0 || active_insn_p (insn
))
2607 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2615 insn
= NEXT_INSN (insn
);
2616 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2623 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2631 insn
= PREV_INSN (insn
);
2632 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2640 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2641 and REG_CC_USER notes so we can find it. */
2644 link_cc0_insns (insn
)
2647 rtx user
= next_nonnote_insn (insn
);
2649 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2650 user
= XVECEXP (PATTERN (user
), 0, 0);
2652 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2654 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2657 /* Return the next insn that uses CC0 after INSN, which is assumed to
2658 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2659 applied to the result of this function should yield INSN).
2661 Normally, this is simply the next insn. However, if a REG_CC_USER note
2662 is present, it contains the insn that uses CC0.
2664 Return 0 if we can't find the insn. */
2667 next_cc0_user (insn
)
2670 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2673 return XEXP (note
, 0);
2675 insn
= next_nonnote_insn (insn
);
2676 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2677 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2679 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2685 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2686 note, it is the previous insn. */
2689 prev_cc0_setter (insn
)
2692 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2695 return XEXP (note
, 0);
2697 insn
= prev_nonnote_insn (insn
);
2698 if (! sets_cc0_p (PATTERN (insn
)))
2705 /* Increment the label uses for all labels present in rtx. */
2715 code
= GET_CODE (x
);
2716 if (code
== LABEL_REF
)
2717 LABEL_NUSES (XEXP (x
, 0))++;
2719 fmt
= GET_RTX_FORMAT (code
);
2720 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2723 mark_label_nuses (XEXP (x
, i
));
2724 else if (fmt
[i
] == 'E')
2725 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2726 mark_label_nuses (XVECEXP (x
, i
, j
));
2731 /* Try splitting insns that can be split for better scheduling.
2732 PAT is the pattern which might split.
2733 TRIAL is the insn providing PAT.
2734 LAST is non-zero if we should return the last insn of the sequence produced.
2736 If this routine succeeds in splitting, it returns the first or last
2737 replacement insn depending on the value of LAST. Otherwise, it
2738 returns TRIAL. If the insn to be returned can be split, it will be. */
2741 try_split (pat
, trial
, last
)
2745 rtx before
= PREV_INSN (trial
);
2746 rtx after
= NEXT_INSN (trial
);
2747 int has_barrier
= 0;
2752 if (any_condjump_p (trial
)
2753 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
2754 split_branch_probability
= INTVAL (XEXP (note
, 0));
2755 probability
= split_branch_probability
;
2757 seq
= split_insns (pat
, trial
);
2759 split_branch_probability
= -1;
2761 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2762 We may need to handle this specially. */
2763 if (after
&& GET_CODE (after
) == BARRIER
)
2766 after
= NEXT_INSN (after
);
2771 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2772 The latter case will normally arise only when being done so that
2773 it, in turn, will be split (SFmode on the 29k is an example). */
2774 if (GET_CODE (seq
) == SEQUENCE
)
2778 /* Avoid infinite loop if any insn of the result matches
2779 the original pattern. */
2780 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2781 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
2782 && rtx_equal_p (PATTERN (XVECEXP (seq
, 0, i
)), pat
))
2786 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2787 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2789 rtx insn
= XVECEXP (seq
, 0, i
);
2790 mark_jump_label (PATTERN (insn
),
2791 XVECEXP (seq
, 0, i
), 0);
2793 if (probability
!= -1
2794 && any_condjump_p (insn
)
2795 && !find_reg_note (insn
, REG_BR_PROB
, 0))
2797 /* We can preserve the REG_BR_PROB notes only if exactly
2798 one jump is created, otherwise the machinde description
2799 is responsible for this step using
2800 split_branch_probability variable. */
2804 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
2805 GEN_INT (probability
),
2810 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2811 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2812 if (GET_CODE (trial
) == CALL_INSN
)
2813 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2814 if (GET_CODE (XVECEXP (seq
, 0, i
)) == CALL_INSN
)
2815 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq
, 0, i
))
2816 = CALL_INSN_FUNCTION_USAGE (trial
);
2818 /* Copy notes, particularly those related to the CFG. */
2819 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
2821 switch (REG_NOTE_KIND (note
))
2824 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2826 rtx insn
= XVECEXP (seq
, 0, i
);
2827 if (GET_CODE (insn
) == CALL_INSN
2828 || (flag_non_call_exceptions
2829 && may_trap_p (PATTERN (insn
))))
2831 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
2839 case REG_ALWAYS_RETURN
:
2840 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2842 rtx insn
= XVECEXP (seq
, 0, i
);
2843 if (GET_CODE (insn
) == CALL_INSN
)
2845 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
2851 case REG_NON_LOCAL_GOTO
:
2852 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2854 rtx insn
= XVECEXP (seq
, 0, i
);
2855 if (GET_CODE (insn
) == JUMP_INSN
)
2857 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
2868 /* If there are LABELS inside the split insns increment the
2869 usage count so we don't delete the label. */
2870 if (GET_CODE (trial
) == INSN
)
2871 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2872 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
)
2873 mark_label_nuses (PATTERN (XVECEXP (seq
, 0, i
)));
2875 tem
= emit_insn_after (seq
, trial
);
2877 delete_related_insns (trial
);
2879 emit_barrier_after (tem
);
2881 /* Recursively call try_split for each new insn created; by the
2882 time control returns here that insn will be fully split, so
2883 set LAST and continue from the insn after the one returned.
2884 We can't use next_active_insn here since AFTER may be a note.
2885 Ignore deleted insns, which can be occur if not optimizing. */
2886 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
2887 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
2888 tem
= try_split (PATTERN (tem
), tem
, 1);
2890 /* Avoid infinite loop if the result matches the original pattern. */
2891 else if (rtx_equal_p (seq
, pat
))
2895 PATTERN (trial
) = seq
;
2896 INSN_CODE (trial
) = -1;
2897 try_split (seq
, trial
, last
);
2900 /* Return either the first or the last insn, depending on which was
2903 ? (after
? PREV_INSN (after
) : last_insn
)
2904 : NEXT_INSN (before
);
2910 /* Make and return an INSN rtx, initializing all its slots.
2911 Store PATTERN in the pattern slots. */
2914 make_insn_raw (pattern
)
2919 insn
= rtx_alloc (INSN
);
2921 INSN_UID (insn
) = cur_insn_uid
++;
2922 PATTERN (insn
) = pattern
;
2923 INSN_CODE (insn
) = -1;
2924 LOG_LINKS (insn
) = NULL
;
2925 REG_NOTES (insn
) = NULL
;
2927 #ifdef ENABLE_RTL_CHECKING
2930 && (returnjump_p (insn
)
2931 || (GET_CODE (insn
) == SET
2932 && SET_DEST (insn
) == pc_rtx
)))
2934 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2942 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2945 make_jump_insn_raw (pattern
)
2950 insn
= rtx_alloc (JUMP_INSN
);
2951 INSN_UID (insn
) = cur_insn_uid
++;
2953 PATTERN (insn
) = pattern
;
2954 INSN_CODE (insn
) = -1;
2955 LOG_LINKS (insn
) = NULL
;
2956 REG_NOTES (insn
) = NULL
;
2957 JUMP_LABEL (insn
) = NULL
;
2962 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2965 make_call_insn_raw (pattern
)
2970 insn
= rtx_alloc (CALL_INSN
);
2971 INSN_UID (insn
) = cur_insn_uid
++;
2973 PATTERN (insn
) = pattern
;
2974 INSN_CODE (insn
) = -1;
2975 LOG_LINKS (insn
) = NULL
;
2976 REG_NOTES (insn
) = NULL
;
2977 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2982 /* Add INSN to the end of the doubly-linked list.
2983 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2989 PREV_INSN (insn
) = last_insn
;
2990 NEXT_INSN (insn
) = 0;
2992 if (NULL
!= last_insn
)
2993 NEXT_INSN (last_insn
) = insn
;
2995 if (NULL
== first_insn
)
3001 /* Add INSN into the doubly-linked list after insn AFTER. This and
3002 the next should be the only functions called to insert an insn once
3003 delay slots have been filled since only they know how to update a
3007 add_insn_after (insn
, after
)
3010 rtx next
= NEXT_INSN (after
);
3013 if (optimize
&& INSN_DELETED_P (after
))
3016 NEXT_INSN (insn
) = next
;
3017 PREV_INSN (insn
) = after
;
3021 PREV_INSN (next
) = insn
;
3022 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3023 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3025 else if (last_insn
== after
)
3029 struct sequence_stack
*stack
= seq_stack
;
3030 /* Scan all pending sequences too. */
3031 for (; stack
; stack
= stack
->next
)
3032 if (after
== stack
->last
)
3042 if (basic_block_for_insn
3043 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3044 && (bb
= BLOCK_FOR_INSN (after
)))
3046 set_block_for_insn (insn
, bb
);
3047 /* Should not happen as first in the BB is always
3048 eigther NOTE or LABEL. */
3049 if (bb
->end
== after
3050 /* Avoid clobbering of structure when creating new BB. */
3051 && GET_CODE (insn
) != BARRIER
3052 && (GET_CODE (insn
) != NOTE
3053 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3057 NEXT_INSN (after
) = insn
;
3058 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3060 rtx sequence
= PATTERN (after
);
3061 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3065 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3066 the previous should be the only functions called to insert an insn once
3067 delay slots have been filled since only they know how to update a
3071 add_insn_before (insn
, before
)
3074 rtx prev
= PREV_INSN (before
);
3077 if (optimize
&& INSN_DELETED_P (before
))
3080 PREV_INSN (insn
) = prev
;
3081 NEXT_INSN (insn
) = before
;
3085 NEXT_INSN (prev
) = insn
;
3086 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3088 rtx sequence
= PATTERN (prev
);
3089 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3092 else if (first_insn
== before
)
3096 struct sequence_stack
*stack
= seq_stack
;
3097 /* Scan all pending sequences too. */
3098 for (; stack
; stack
= stack
->next
)
3099 if (before
== stack
->first
)
3101 stack
->first
= insn
;
3109 if (basic_block_for_insn
3110 && (unsigned int)INSN_UID (before
) < basic_block_for_insn
->num_elements
3111 && (bb
= BLOCK_FOR_INSN (before
)))
3113 set_block_for_insn (insn
, bb
);
3114 /* Should not happen as first in the BB is always
3115 eigther NOTE or LABEl. */
3116 if (bb
->head
== insn
3117 /* Avoid clobbering of structure when creating new BB. */
3118 && GET_CODE (insn
) != BARRIER
3119 && (GET_CODE (insn
) != NOTE
3120 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3124 PREV_INSN (before
) = insn
;
3125 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3126 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3129 /* Remove an insn from its doubly-linked list. This function knows how
3130 to handle sequences. */
3135 rtx next
= NEXT_INSN (insn
);
3136 rtx prev
= PREV_INSN (insn
);
3141 NEXT_INSN (prev
) = next
;
3142 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3144 rtx sequence
= PATTERN (prev
);
3145 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3148 else if (first_insn
== insn
)
3152 struct sequence_stack
*stack
= seq_stack
;
3153 /* Scan all pending sequences too. */
3154 for (; stack
; stack
= stack
->next
)
3155 if (insn
== stack
->first
)
3157 stack
->first
= next
;
3167 PREV_INSN (next
) = prev
;
3168 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3169 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3171 else if (last_insn
== insn
)
3175 struct sequence_stack
*stack
= seq_stack
;
3176 /* Scan all pending sequences too. */
3177 for (; stack
; stack
= stack
->next
)
3178 if (insn
== stack
->last
)
3187 if (basic_block_for_insn
3188 && (unsigned int)INSN_UID (insn
) < basic_block_for_insn
->num_elements
3189 && (bb
= BLOCK_FOR_INSN (insn
)))
3191 if (bb
->head
== insn
)
3193 /* Never ever delete the basic block note without deleting whole basic
3195 if (GET_CODE (insn
) == NOTE
)
3199 if (bb
->end
== insn
)
3204 /* Delete all insns made since FROM.
3205 FROM becomes the new last instruction. */
3208 delete_insns_since (from
)
3214 NEXT_INSN (from
) = 0;
3218 /* This function is deprecated, please use sequences instead.
3220 Move a consecutive bunch of insns to a different place in the chain.
3221 The insns to be moved are those between FROM and TO.
3222 They are moved to a new position after the insn AFTER.
3223 AFTER must not be FROM or TO or any insn in between.
3225 This function does not know about SEQUENCEs and hence should not be
3226 called after delay-slot filling has been done. */
3229 reorder_insns_nobb (from
, to
, after
)
3230 rtx from
, to
, after
;
3232 /* Splice this bunch out of where it is now. */
3233 if (PREV_INSN (from
))
3234 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3236 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3237 if (last_insn
== to
)
3238 last_insn
= PREV_INSN (from
);
3239 if (first_insn
== from
)
3240 first_insn
= NEXT_INSN (to
);
3242 /* Make the new neighbors point to it and it to them. */
3243 if (NEXT_INSN (after
))
3244 PREV_INSN (NEXT_INSN (after
)) = to
;
3246 NEXT_INSN (to
) = NEXT_INSN (after
);
3247 PREV_INSN (from
) = after
;
3248 NEXT_INSN (after
) = from
;
3249 if (after
== last_insn
)
3253 /* Same as function above, but take care to update BB boundaries. */
3255 reorder_insns (from
, to
, after
)
3256 rtx from
, to
, after
;
3258 rtx prev
= PREV_INSN (from
);
3259 basic_block bb
, bb2
;
3261 reorder_insns_nobb (from
, to
, after
);
3263 if (basic_block_for_insn
3264 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3265 && (bb
= BLOCK_FOR_INSN (after
)))
3269 if (basic_block_for_insn
3270 && (unsigned int)INSN_UID (from
) < basic_block_for_insn
->num_elements
3271 && (bb2
= BLOCK_FOR_INSN (from
)))
3277 if (bb
->end
== after
)
3280 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3281 set_block_for_insn (x
, bb
);
3285 /* Return the line note insn preceding INSN. */
3288 find_line_note (insn
)
3291 if (no_line_numbers
)
3294 for (; insn
; insn
= PREV_INSN (insn
))
3295 if (GET_CODE (insn
) == NOTE
3296 && NOTE_LINE_NUMBER (insn
) >= 0)
3302 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3303 of the moved insns when debugging. This may insert a note between AFTER
3304 and FROM, and another one after TO. */
3307 reorder_insns_with_line_notes (from
, to
, after
)
3308 rtx from
, to
, after
;
3310 rtx from_line
= find_line_note (from
);
3311 rtx after_line
= find_line_note (after
);
3313 reorder_insns (from
, to
, after
);
3315 if (from_line
== after_line
)
3319 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3320 NOTE_LINE_NUMBER (from_line
),
3323 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3324 NOTE_LINE_NUMBER (after_line
),
3328 /* Remove unnecessary notes from the instruction stream. */
3331 remove_unnecessary_notes ()
3333 rtx block_stack
= NULL_RTX
;
3334 rtx eh_stack
= NULL_RTX
;
3339 /* We must not remove the first instruction in the function because
3340 the compiler depends on the first instruction being a note. */
3341 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3343 /* Remember what's next. */
3344 next
= NEXT_INSN (insn
);
3346 /* We're only interested in notes. */
3347 if (GET_CODE (insn
) != NOTE
)
3350 switch (NOTE_LINE_NUMBER (insn
))
3352 case NOTE_INSN_DELETED
:
3356 case NOTE_INSN_EH_REGION_BEG
:
3357 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3360 case NOTE_INSN_EH_REGION_END
:
3361 /* Too many end notes. */
3362 if (eh_stack
== NULL_RTX
)
3364 /* Mismatched nesting. */
3365 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3368 eh_stack
= XEXP (eh_stack
, 1);
3369 free_INSN_LIST_node (tmp
);
3372 case NOTE_INSN_BLOCK_BEG
:
3373 /* By now, all notes indicating lexical blocks should have
3374 NOTE_BLOCK filled in. */
3375 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3377 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3380 case NOTE_INSN_BLOCK_END
:
3381 /* Too many end notes. */
3382 if (block_stack
== NULL_RTX
)
3384 /* Mismatched nesting. */
3385 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3388 block_stack
= XEXP (block_stack
, 1);
3389 free_INSN_LIST_node (tmp
);
3391 /* Scan back to see if there are any non-note instructions
3392 between INSN and the beginning of this block. If not,
3393 then there is no PC range in the generated code that will
3394 actually be in this block, so there's no point in
3395 remembering the existence of the block. */
3396 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3398 /* This block contains a real instruction. Note that we
3399 don't include labels; if the only thing in the block
3400 is a label, then there are still no PC values that
3401 lie within the block. */
3405 /* We're only interested in NOTEs. */
3406 if (GET_CODE (tmp
) != NOTE
)
3409 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3411 /* We just verified that this BLOCK matches us with
3412 the block_stack check above. Never delete the
3413 BLOCK for the outermost scope of the function; we
3414 can refer to names from that scope even if the
3415 block notes are messed up. */
3416 if (! is_body_block (NOTE_BLOCK (insn
))
3417 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3424 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3425 /* There's a nested block. We need to leave the
3426 current block in place since otherwise the debugger
3427 wouldn't be able to show symbols from our block in
3428 the nested block. */
3434 /* Too many begin notes. */
3435 if (block_stack
|| eh_stack
)
3440 /* Emit an insn of given code and pattern
3441 at a specified place within the doubly-linked list. */
3443 /* Make an instruction with body PATTERN
3444 and output it before the instruction BEFORE. */
3447 emit_insn_before (pattern
, before
)
3448 rtx pattern
, before
;
3452 if (GET_CODE (pattern
) == SEQUENCE
)
3456 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3458 insn
= XVECEXP (pattern
, 0, i
);
3459 add_insn_before (insn
, before
);
3464 insn
= make_insn_raw (pattern
);
3465 add_insn_before (insn
, before
);
3471 /* Make an instruction with body PATTERN and code JUMP_INSN
3472 and output it before the instruction BEFORE. */
3475 emit_jump_insn_before (pattern
, before
)
3476 rtx pattern
, before
;
3480 if (GET_CODE (pattern
) == SEQUENCE
)
3481 insn
= emit_insn_before (pattern
, before
);
3484 insn
= make_jump_insn_raw (pattern
);
3485 add_insn_before (insn
, before
);
3491 /* Make an instruction with body PATTERN and code CALL_INSN
3492 and output it before the instruction BEFORE. */
3495 emit_call_insn_before (pattern
, before
)
3496 rtx pattern
, before
;
3500 if (GET_CODE (pattern
) == SEQUENCE
)
3501 insn
= emit_insn_before (pattern
, before
);
3504 insn
= make_call_insn_raw (pattern
);
3505 add_insn_before (insn
, before
);
3506 PUT_CODE (insn
, CALL_INSN
);
3512 /* Make an insn of code BARRIER
3513 and output it before the insn BEFORE. */
3516 emit_barrier_before (before
)
3519 rtx insn
= rtx_alloc (BARRIER
);
3521 INSN_UID (insn
) = cur_insn_uid
++;
3523 add_insn_before (insn
, before
);
3527 /* Emit the label LABEL before the insn BEFORE. */
3530 emit_label_before (label
, before
)
3533 /* This can be called twice for the same label as a result of the
3534 confusion that follows a syntax error! So make it harmless. */
3535 if (INSN_UID (label
) == 0)
3537 INSN_UID (label
) = cur_insn_uid
++;
3538 add_insn_before (label
, before
);
3544 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3547 emit_note_before (subtype
, before
)
3551 rtx note
= rtx_alloc (NOTE
);
3552 INSN_UID (note
) = cur_insn_uid
++;
3553 NOTE_SOURCE_FILE (note
) = 0;
3554 NOTE_LINE_NUMBER (note
) = subtype
;
3556 add_insn_before (note
, before
);
3560 /* Make an insn of code INSN with body PATTERN
3561 and output it after the insn AFTER. */
3564 emit_insn_after (pattern
, after
)
3569 if (GET_CODE (pattern
) == SEQUENCE
)
3573 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3575 insn
= XVECEXP (pattern
, 0, i
);
3576 add_insn_after (insn
, after
);
3582 insn
= make_insn_raw (pattern
);
3583 add_insn_after (insn
, after
);
3589 /* Similar to emit_insn_after, except that line notes are to be inserted so
3590 as to act as if this insn were at FROM. */
3593 emit_insn_after_with_line_notes (pattern
, after
, from
)
3594 rtx pattern
, after
, from
;
3596 rtx from_line
= find_line_note (from
);
3597 rtx after_line
= find_line_note (after
);
3598 rtx insn
= emit_insn_after (pattern
, after
);
3601 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3602 NOTE_LINE_NUMBER (from_line
),
3606 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3607 NOTE_LINE_NUMBER (after_line
),
3611 /* Make an insn of code JUMP_INSN with body PATTERN
3612 and output it after the insn AFTER. */
3615 emit_jump_insn_after (pattern
, after
)
3620 if (GET_CODE (pattern
) == SEQUENCE
)
3621 insn
= emit_insn_after (pattern
, after
);
3624 insn
= make_jump_insn_raw (pattern
);
3625 add_insn_after (insn
, after
);
3631 /* Make an insn of code BARRIER
3632 and output it after the insn AFTER. */
3635 emit_barrier_after (after
)
3638 rtx insn
= rtx_alloc (BARRIER
);
3640 INSN_UID (insn
) = cur_insn_uid
++;
3642 add_insn_after (insn
, after
);
3646 /* Emit the label LABEL after the insn AFTER. */
3649 emit_label_after (label
, after
)
3652 /* This can be called twice for the same label
3653 as a result of the confusion that follows a syntax error!
3654 So make it harmless. */
3655 if (INSN_UID (label
) == 0)
3657 INSN_UID (label
) = cur_insn_uid
++;
3658 add_insn_after (label
, after
);
3664 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3667 emit_note_after (subtype
, after
)
3671 rtx note
= rtx_alloc (NOTE
);
3672 INSN_UID (note
) = cur_insn_uid
++;
3673 NOTE_SOURCE_FILE (note
) = 0;
3674 NOTE_LINE_NUMBER (note
) = subtype
;
3675 add_insn_after (note
, after
);
3679 /* Emit a line note for FILE and LINE after the insn AFTER. */
3682 emit_line_note_after (file
, line
, after
)
3689 if (no_line_numbers
&& line
> 0)
3695 note
= rtx_alloc (NOTE
);
3696 INSN_UID (note
) = cur_insn_uid
++;
3697 NOTE_SOURCE_FILE (note
) = file
;
3698 NOTE_LINE_NUMBER (note
) = line
;
3699 add_insn_after (note
, after
);
3703 /* Make an insn of code INSN with pattern PATTERN
3704 and add it to the end of the doubly-linked list.
3705 If PATTERN is a SEQUENCE, take the elements of it
3706 and emit an insn for each element.
3708 Returns the last insn emitted. */
3714 rtx insn
= last_insn
;
3716 if (GET_CODE (pattern
) == SEQUENCE
)
3720 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3722 insn
= XVECEXP (pattern
, 0, i
);
3728 insn
= make_insn_raw (pattern
);
3735 /* Emit the insns in a chain starting with INSN.
3736 Return the last insn emitted. */
3746 rtx next
= NEXT_INSN (insn
);
3755 /* Emit the insns in a chain starting with INSN and place them in front of
3756 the insn BEFORE. Return the last insn emitted. */
3759 emit_insns_before (insn
, before
)
3767 rtx next
= NEXT_INSN (insn
);
3768 add_insn_before (insn
, before
);
3776 /* Emit the insns in a chain starting with FIRST and place them in back of
3777 the insn AFTER. Return the last insn emitted. */
3780 emit_insns_after (first
, after
)
3794 if (basic_block_for_insn
3795 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3796 && (bb
= BLOCK_FOR_INSN (after
)))
3798 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3799 set_block_for_insn (last
, bb
);
3800 set_block_for_insn (last
, bb
);
3801 if (bb
->end
== after
)
3805 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3808 after_after
= NEXT_INSN (after
);
3810 NEXT_INSN (after
) = first
;
3811 PREV_INSN (first
) = after
;
3812 NEXT_INSN (last
) = after_after
;
3814 PREV_INSN (after_after
) = last
;
3816 if (after
== last_insn
)
3821 /* Make an insn of code JUMP_INSN with pattern PATTERN
3822 and add it to the end of the doubly-linked list. */
3825 emit_jump_insn (pattern
)
3828 if (GET_CODE (pattern
) == SEQUENCE
)
3829 return emit_insn (pattern
);
3832 rtx insn
= make_jump_insn_raw (pattern
);
3838 /* Make an insn of code CALL_INSN with pattern PATTERN
3839 and add it to the end of the doubly-linked list. */
3842 emit_call_insn (pattern
)
3845 if (GET_CODE (pattern
) == SEQUENCE
)
3846 return emit_insn (pattern
);
3849 rtx insn
= make_call_insn_raw (pattern
);
3851 PUT_CODE (insn
, CALL_INSN
);
3856 /* Add the label LABEL to the end of the doubly-linked list. */
3862 /* This can be called twice for the same label
3863 as a result of the confusion that follows a syntax error!
3864 So make it harmless. */
3865 if (INSN_UID (label
) == 0)
3867 INSN_UID (label
) = cur_insn_uid
++;
3873 /* Make an insn of code BARRIER
3874 and add it to the end of the doubly-linked list. */
3879 rtx barrier
= rtx_alloc (BARRIER
);
3880 INSN_UID (barrier
) = cur_insn_uid
++;
3885 /* Make an insn of code NOTE
3886 with data-fields specified by FILE and LINE
3887 and add it to the end of the doubly-linked list,
3888 but only if line-numbers are desired for debugging info. */
3891 emit_line_note (file
, line
)
3895 set_file_and_line_for_stmt (file
, line
);
3898 if (no_line_numbers
)
3902 return emit_note (file
, line
);
3905 /* Make an insn of code NOTE
3906 with data-fields specified by FILE and LINE
3907 and add it to the end of the doubly-linked list.
3908 If it is a line-number NOTE, omit it if it matches the previous one. */
3911 emit_note (file
, line
)
3919 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3920 && line
== last_linenum
)
3922 last_filename
= file
;
3923 last_linenum
= line
;
3926 if (no_line_numbers
&& line
> 0)
3932 note
= rtx_alloc (NOTE
);
3933 INSN_UID (note
) = cur_insn_uid
++;
3934 NOTE_SOURCE_FILE (note
) = file
;
3935 NOTE_LINE_NUMBER (note
) = line
;
3940 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3943 emit_line_note_force (file
, line
)
3948 return emit_line_note (file
, line
);
3951 /* Cause next statement to emit a line note even if the line number
3952 has not changed. This is used at the beginning of a function. */
3955 force_next_line_note ()
3960 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3961 note of this type already exists, remove it first. */
3964 set_unique_reg_note (insn
, kind
, datum
)
3969 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3971 /* First remove the note if there already is one. */
3973 remove_note (insn
, note
);
3975 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3978 /* Return an indication of which type of insn should have X as a body.
3979 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3985 if (GET_CODE (x
) == CODE_LABEL
)
3987 if (GET_CODE (x
) == CALL
)
3989 if (GET_CODE (x
) == RETURN
)
3991 if (GET_CODE (x
) == SET
)
3993 if (SET_DEST (x
) == pc_rtx
)
3995 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4000 if (GET_CODE (x
) == PARALLEL
)
4003 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4004 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4006 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4007 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4009 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4010 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4016 /* Emit the rtl pattern X as an appropriate kind of insn.
4017 If X is a label, it is simply added into the insn chain. */
4023 enum rtx_code code
= classify_insn (x
);
4025 if (code
== CODE_LABEL
)
4026 return emit_label (x
);
4027 else if (code
== INSN
)
4028 return emit_insn (x
);
4029 else if (code
== JUMP_INSN
)
4031 rtx insn
= emit_jump_insn (x
);
4032 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4033 return emit_barrier ();
4036 else if (code
== CALL_INSN
)
4037 return emit_call_insn (x
);
4042 /* Begin emitting insns to a sequence which can be packaged in an
4043 RTL_EXPR. If this sequence will contain something that might cause
4044 the compiler to pop arguments to function calls (because those
4045 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4046 details), use do_pending_stack_adjust before calling this function.
4047 That will ensure that the deferred pops are not accidentally
4048 emitted in the middle of this sequence. */
4053 struct sequence_stack
*tem
;
4055 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
4057 tem
->next
= seq_stack
;
4058 tem
->first
= first_insn
;
4059 tem
->last
= last_insn
;
4060 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4068 /* Similarly, but indicate that this sequence will be placed in T, an
4069 RTL_EXPR. See the documentation for start_sequence for more
4070 information about how to use this function. */
4073 start_sequence_for_rtl_expr (t
)
4081 /* Set up the insn chain starting with FIRST as the current sequence,
4082 saving the previously current one. See the documentation for
4083 start_sequence for more information about how to use this function. */
4086 push_to_sequence (first
)
4093 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4099 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4102 push_to_full_sequence (first
, last
)
4108 /* We really should have the end of the insn chain here. */
4109 if (last
&& NEXT_INSN (last
))
4113 /* Set up the outer-level insn chain
4114 as the current sequence, saving the previously current one. */
4117 push_topmost_sequence ()
4119 struct sequence_stack
*stack
, *top
= NULL
;
4123 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4126 first_insn
= top
->first
;
4127 last_insn
= top
->last
;
4128 seq_rtl_expr
= top
->sequence_rtl_expr
;
4131 /* After emitting to the outer-level insn chain, update the outer-level
4132 insn chain, and restore the previous saved state. */
4135 pop_topmost_sequence ()
4137 struct sequence_stack
*stack
, *top
= NULL
;
4139 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4142 top
->first
= first_insn
;
4143 top
->last
= last_insn
;
4144 /* ??? Why don't we save seq_rtl_expr here? */
4149 /* After emitting to a sequence, restore previous saved state.
4151 To get the contents of the sequence just made, you must call
4152 `gen_sequence' *before* calling here.
4154 If the compiler might have deferred popping arguments while
4155 generating this sequence, and this sequence will not be immediately
4156 inserted into the instruction stream, use do_pending_stack_adjust
4157 before calling gen_sequence. That will ensure that the deferred
4158 pops are inserted into this sequence, and not into some random
4159 location in the instruction stream. See INHIBIT_DEFER_POP for more
4160 information about deferred popping of arguments. */
4165 struct sequence_stack
*tem
= seq_stack
;
4167 first_insn
= tem
->first
;
4168 last_insn
= tem
->last
;
4169 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4170 seq_stack
= tem
->next
;
4175 /* This works like end_sequence, but records the old sequence in FIRST
4179 end_full_sequence (first
, last
)
4182 *first
= first_insn
;
4187 /* Return 1 if currently emitting into a sequence. */
4192 return seq_stack
!= 0;
4195 /* Generate a SEQUENCE rtx containing the insns already emitted
4196 to the current sequence.
4198 This is how the gen_... function from a DEFINE_EXPAND
4199 constructs the SEQUENCE that it returns. */
4209 /* Count the insns in the chain. */
4211 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
4214 /* If only one insn, return it rather than a SEQUENCE.
4215 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4216 the case of an empty list.)
4217 We only return the pattern of an insn if its code is INSN and it
4218 has no notes. This ensures that no information gets lost. */
4220 && ! RTX_FRAME_RELATED_P (first_insn
)
4221 && GET_CODE (first_insn
) == INSN
4222 /* Don't throw away any reg notes. */
4223 && REG_NOTES (first_insn
) == 0)
4224 return PATTERN (first_insn
);
4226 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
4228 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
4229 XVECEXP (result
, 0, i
) = tem
;
4234 /* Put the various virtual registers into REGNO_REG_RTX. */
4237 init_virtual_regs (es
)
4238 struct emit_status
*es
;
4240 rtx
*ptr
= es
->x_regno_reg_rtx
;
4241 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4242 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4243 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4244 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4245 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4249 clear_emit_caches ()
4253 /* Clear the start_sequence/gen_sequence cache. */
4254 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
4255 sequence_result
[i
] = 0;
4259 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4260 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4261 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4262 static int copy_insn_n_scratches
;
4264 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4265 copied an ASM_OPERANDS.
4266 In that case, it is the original input-operand vector. */
4267 static rtvec orig_asm_operands_vector
;
4269 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4270 copied an ASM_OPERANDS.
4271 In that case, it is the copied input-operand vector. */
4272 static rtvec copy_asm_operands_vector
;
4274 /* Likewise for the constraints vector. */
4275 static rtvec orig_asm_constraints_vector
;
4276 static rtvec copy_asm_constraints_vector
;
4278 /* Recursively create a new copy of an rtx for copy_insn.
4279 This function differs from copy_rtx in that it handles SCRATCHes and
4280 ASM_OPERANDs properly.
4281 Normally, this function is not used directly; use copy_insn as front end.
4282 However, you could first copy an insn pattern with copy_insn and then use
4283 this function afterwards to properly copy any REG_NOTEs containing
4293 const char *format_ptr
;
4295 code
= GET_CODE (orig
);
4311 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4312 if (copy_insn_scratch_in
[i
] == orig
)
4313 return copy_insn_scratch_out
[i
];
4317 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4318 a LABEL_REF, it isn't sharable. */
4319 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4320 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4321 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4325 /* A MEM with a constant address is not sharable. The problem is that
4326 the constant address may need to be reloaded. If the mem is shared,
4327 then reloading one copy of this mem will cause all copies to appear
4328 to have been reloaded. */
4334 copy
= rtx_alloc (code
);
4336 /* Copy the various flags, and other information. We assume that
4337 all fields need copying, and then clear the fields that should
4338 not be copied. That is the sensible default behavior, and forces
4339 us to explicitly document why we are *not* copying a flag. */
4340 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
4342 /* We do not copy the USED flag, which is used as a mark bit during
4343 walks over the RTL. */
4346 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4347 if (GET_RTX_CLASS (code
) == 'i')
4351 copy
->frame_related
= 0;
4354 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4356 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4358 copy
->fld
[i
] = orig
->fld
[i
];
4359 switch (*format_ptr
++)
4362 if (XEXP (orig
, i
) != NULL
)
4363 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4368 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4369 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4370 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4371 XVEC (copy
, i
) = copy_asm_operands_vector
;
4372 else if (XVEC (orig
, i
) != NULL
)
4374 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4375 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4376 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4387 /* These are left unchanged. */
4395 if (code
== SCRATCH
)
4397 i
= copy_insn_n_scratches
++;
4398 if (i
>= MAX_RECOG_OPERANDS
)
4400 copy_insn_scratch_in
[i
] = orig
;
4401 copy_insn_scratch_out
[i
] = copy
;
4403 else if (code
== ASM_OPERANDS
)
4405 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4406 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4407 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4408 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4414 /* Create a new copy of an rtx.
4415 This function differs from copy_rtx in that it handles SCRATCHes and
4416 ASM_OPERANDs properly.
4417 INSN doesn't really have to be a full INSN; it could be just the
4423 copy_insn_n_scratches
= 0;
4424 orig_asm_operands_vector
= 0;
4425 orig_asm_constraints_vector
= 0;
4426 copy_asm_operands_vector
= 0;
4427 copy_asm_constraints_vector
= 0;
4428 return copy_insn_1 (insn
);
4431 /* Initialize data structures and variables in this file
4432 before generating rtl for each function. */
4437 struct function
*f
= cfun
;
4439 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
4442 seq_rtl_expr
= NULL
;
4444 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
4447 first_label_num
= label_num
;
4451 clear_emit_caches ();
4453 /* Init the tables that describe all the pseudo regs. */
4455 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
4457 f
->emit
->regno_pointer_align
4458 = (unsigned char *) xcalloc (f
->emit
->regno_pointer_align_length
,
4459 sizeof (unsigned char));
4462 = (rtx
*) xcalloc (f
->emit
->regno_pointer_align_length
, sizeof (rtx
));
4465 = (tree
*) xcalloc (f
->emit
->regno_pointer_align_length
, sizeof (tree
));
4467 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4468 init_virtual_regs (f
->emit
);
4470 /* Indicate that the virtual registers and stack locations are
4472 REG_POINTER (stack_pointer_rtx
) = 1;
4473 REG_POINTER (frame_pointer_rtx
) = 1;
4474 REG_POINTER (hard_frame_pointer_rtx
) = 1;
4475 REG_POINTER (arg_pointer_rtx
) = 1;
4477 REG_POINTER (virtual_incoming_args_rtx
) = 1;
4478 REG_POINTER (virtual_stack_vars_rtx
) = 1;
4479 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
4480 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
4481 REG_POINTER (virtual_cfa_rtx
) = 1;
4483 #ifdef STACK_BOUNDARY
4484 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
4485 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4486 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4487 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
4489 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4490 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
4491 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
4492 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4493 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
4496 #ifdef INIT_EXPANDERS
4501 /* Mark SS for GC. */
4504 mark_sequence_stack (ss
)
4505 struct sequence_stack
*ss
;
4509 ggc_mark_rtx (ss
->first
);
4510 ggc_mark_tree (ss
->sequence_rtl_expr
);
4515 /* Mark ES for GC. */
4518 mark_emit_status (es
)
4519 struct emit_status
*es
;
4528 for (i
= es
->regno_pointer_align_length
, r
= es
->x_regno_reg_rtx
,
4530 i
> 0; --i
, ++r
, ++t
)
4536 mark_sequence_stack (es
->sequence_stack
);
4537 ggc_mark_tree (es
->sequence_rtl_expr
);
4538 ggc_mark_rtx (es
->x_first_insn
);
4541 /* Create some permanent unique rtl objects shared between all functions.
4542 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4545 init_emit_once (line_numbers
)
4549 enum machine_mode mode
;
4550 enum machine_mode double_mode
;
4552 /* Initialize the CONST_INT and memory attribute hash tables. */
4553 const_int_htab
= htab_create (37, const_int_htab_hash
,
4554 const_int_htab_eq
, NULL
);
4555 ggc_add_deletable_htab (const_int_htab
, 0, 0);
4557 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
4558 mem_attrs_htab_eq
, NULL
);
4559 ggc_add_deletable_htab (mem_attrs_htab
, 0, mem_attrs_mark
);
4561 no_line_numbers
= ! line_numbers
;
4563 /* Compute the word and byte modes. */
4565 byte_mode
= VOIDmode
;
4566 word_mode
= VOIDmode
;
4567 double_mode
= VOIDmode
;
4569 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4570 mode
= GET_MODE_WIDER_MODE (mode
))
4572 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
4573 && byte_mode
== VOIDmode
)
4576 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
4577 && word_mode
== VOIDmode
)
4581 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4582 mode
= GET_MODE_WIDER_MODE (mode
))
4584 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
4585 && double_mode
== VOIDmode
)
4589 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
4591 /* Assign register numbers to the globally defined register rtx.
4592 This must be done at runtime because the register number field
4593 is in a union and some compilers can't initialize unions. */
4595 pc_rtx
= gen_rtx (PC
, VOIDmode
);
4596 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
4597 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
4598 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
4599 if (hard_frame_pointer_rtx
== 0)
4600 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
4601 HARD_FRAME_POINTER_REGNUM
);
4602 if (arg_pointer_rtx
== 0)
4603 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
4604 virtual_incoming_args_rtx
=
4605 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
4606 virtual_stack_vars_rtx
=
4607 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
4608 virtual_stack_dynamic_rtx
=
4609 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
4610 virtual_outgoing_args_rtx
=
4611 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
4612 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
4614 /* These rtx must be roots if GC is enabled. */
4615 ggc_add_rtx_root (global_rtl
, GR_MAX
);
4617 #ifdef INIT_EXPANDERS
4618 /* This is to initialize {init|mark|free}_machine_status before the first
4619 call to push_function_context_to. This is needed by the Chill front
4620 end which calls push_function_context_to before the first cal to
4621 init_function_start. */
4625 /* Create the unique rtx's for certain rtx codes and operand values. */
4627 /* Don't use gen_rtx here since gen_rtx in this case
4628 tries to use these variables. */
4629 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
4630 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
4631 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
4632 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
4634 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
4635 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
4636 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
4638 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
4640 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
4641 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
4642 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
4643 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
4645 for (i
= 0; i
<= 2; i
++)
4647 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4648 mode
= GET_MODE_WIDER_MODE (mode
))
4650 rtx tem
= rtx_alloc (CONST_DOUBLE
);
4651 union real_extract u
;
4653 /* Zero any holes in a structure. */
4654 memset ((char *) &u
, 0, sizeof u
);
4655 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
4657 /* Avoid trailing garbage in the rtx. */
4658 if (sizeof (u
) < sizeof (HOST_WIDE_INT
))
4659 CONST_DOUBLE_LOW (tem
) = 0;
4660 if (sizeof (u
) < 2 * sizeof (HOST_WIDE_INT
))
4661 CONST_DOUBLE_HIGH (tem
) = 0;
4663 memcpy (&CONST_DOUBLE_LOW (tem
), &u
, sizeof u
);
4664 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
4665 CONST_DOUBLE_CHAIN (tem
) = NULL_RTX
;
4666 PUT_MODE (tem
, mode
);
4668 const_tiny_rtx
[i
][(int) mode
] = tem
;
4671 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
4673 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4674 mode
= GET_MODE_WIDER_MODE (mode
))
4675 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4677 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
4679 mode
= GET_MODE_WIDER_MODE (mode
))
4680 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4683 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
4684 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
4685 const_tiny_rtx
[0][i
] = const0_rtx
;
4687 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
4688 if (STORE_FLAG_VALUE
== 1)
4689 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
4691 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4692 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4693 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4694 ggc_add_rtx_root ((rtx
*) const_tiny_rtx
, sizeof const_tiny_rtx
/ sizeof (rtx
));
4695 ggc_add_rtx_root (&const_true_rtx
, 1);
4697 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4698 return_address_pointer_rtx
4699 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
4703 struct_value_rtx
= STRUCT_VALUE
;
4705 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
4708 #ifdef STRUCT_VALUE_INCOMING
4709 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
4711 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4712 struct_value_incoming_rtx
4713 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
4715 struct_value_incoming_rtx
= struct_value_rtx
;
4719 #ifdef STATIC_CHAIN_REGNUM
4720 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
4722 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4723 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
4724 static_chain_incoming_rtx
4725 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
4728 static_chain_incoming_rtx
= static_chain_rtx
;
4732 static_chain_rtx
= STATIC_CHAIN
;
4734 #ifdef STATIC_CHAIN_INCOMING
4735 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
4737 static_chain_incoming_rtx
= static_chain_rtx
;
4741 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
4742 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
4744 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
4745 ggc_add_rtx_root (&struct_value_rtx
, 1);
4746 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
4747 ggc_add_rtx_root (&static_chain_rtx
, 1);
4748 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
4749 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
4752 /* Query and clear/ restore no_line_numbers. This is used by the
4753 switch / case handling in stmt.c to give proper line numbers in
4754 warnings about unreachable code. */
4757 force_line_numbers ()
4759 int old
= no_line_numbers
;
4761 no_line_numbers
= 0;
4763 force_next_line_note ();
4768 restore_line_number_status (old_value
)
4771 no_line_numbers
= old_value
;