1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
34 #include "insn-flags.h"
35 #include "insn-codes.h"
44 /* Each optab contains info on how this target machine
45 can perform a particular operation
46 for all sizes and kinds of operands.
48 The operation to be performed is often specified
49 by passing one of these optabs as an argument.
51 See expr.h for documentation of these optabs. */
53 optab optab_table
[OTI_MAX
];
55 rtx libfunc_table
[LTI_MAX
];
57 /* Tables of patterns for extending one integer mode to another. */
58 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
60 /* Tables of patterns for converting between fixed and floating point. */
61 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
62 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
63 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
65 /* Contains the optab used for each rtx code. */
66 optab code_to_optab
[NUM_RTX_CODE
+ 1];
68 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
69 gives the gen_function to make a branch to test that condition. */
71 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
73 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
74 gives the insn code to make a store-condition insn
75 to test that condition. */
77 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
79 #ifdef HAVE_conditional_move
80 /* Indexed by the machine mode, gives the insn code to make a conditional
81 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
82 setcc_gen_code to cut down on the number of named patterns. Consider a day
83 when a lot more rtx codes are conditional (eg: for the ARM). */
85 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
88 static int add_equal_note
PARAMS ((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
89 static rtx widen_operand
PARAMS ((rtx
, enum machine_mode
,
90 enum machine_mode
, int, int));
91 static int expand_cmplxdiv_straight
PARAMS ((rtx
, rtx
, rtx
, rtx
,
92 rtx
, rtx
, enum machine_mode
,
93 int, enum optab_methods
,
94 enum mode_class
, optab
));
95 static int expand_cmplxdiv_wide
PARAMS ((rtx
, rtx
, rtx
, rtx
,
96 rtx
, rtx
, enum machine_mode
,
97 int, enum optab_methods
,
98 enum mode_class
, optab
));
99 static enum insn_code can_fix_p
PARAMS ((enum machine_mode
, enum machine_mode
,
101 static enum insn_code can_float_p
PARAMS ((enum machine_mode
, enum machine_mode
,
103 static rtx ftruncify
PARAMS ((rtx
));
104 static optab init_optab
PARAMS ((enum rtx_code
));
105 static void init_libfuncs
PARAMS ((optab
, int, int, const char *, int));
106 static void init_integral_libfuncs
PARAMS ((optab
, const char *, int));
107 static void init_floating_libfuncs
PARAMS ((optab
, const char *, int));
108 #ifdef HAVE_conditional_trap
109 static void init_traps
PARAMS ((void));
111 static void emit_cmp_and_jump_insn_1
PARAMS ((rtx
, rtx
, enum machine_mode
,
112 enum rtx_code
, int, rtx
));
113 static void prepare_float_lib_cmp
PARAMS ((rtx
*, rtx
*, enum rtx_code
*,
114 enum machine_mode
*, int *));
116 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
117 the result of operation CODE applied to OP0 (and OP1 if it is a binary
120 If the last insn does not set TARGET, don't do anything, but return 1.
122 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
123 don't add the REG_EQUAL note but return 0. Our caller can then try
124 again, ensuring that TARGET is not one of the operands. */
127 add_equal_note (seq
, target
, code
, op0
, op1
)
137 if ((GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
138 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
139 || GET_CODE (seq
) != SEQUENCE
140 || (set
= single_set (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))) == 0
141 || GET_CODE (target
) == ZERO_EXTRACT
142 || (! rtx_equal_p (SET_DEST (set
), target
)
143 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
145 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
146 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set
), 0)),
150 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
151 besides the last insn. */
152 if (reg_overlap_mentioned_p (target
, op0
)
153 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
154 for (i
= XVECLEN (seq
, 0) - 2; i
>= 0; i
--)
155 if (reg_set_p (target
, XVECEXP (seq
, 0, i
)))
158 if (GET_RTX_CLASS (code
) == '1')
159 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
161 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
163 set_unique_reg_note (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1), REG_EQUAL
, note
);
168 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
169 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
170 not actually do a sign-extend or zero-extend, but can leave the
171 higher-order bits of the result rtx undefined, for example, in the case
172 of logical operations, but not right shifts. */
175 widen_operand (op
, mode
, oldmode
, unsignedp
, no_extend
)
177 enum machine_mode mode
, oldmode
;
183 /* If we must extend do so. If OP is either a constant or a SUBREG
184 for a promoted object, also extend since it will be more efficient to
187 || GET_MODE (op
) == VOIDmode
188 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)))
189 return convert_modes (mode
, oldmode
, op
, unsignedp
);
191 /* If MODE is no wider than a single word, we return a paradoxical
193 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
194 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
196 /* Otherwise, get an object of MODE, clobber it, and set the low-order
199 result
= gen_reg_rtx (mode
);
200 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
201 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
205 /* Generate code to perform a straightforward complex divide. */
208 expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
209 unsignedp
, methods
, class, binoptab
)
210 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
211 enum machine_mode submode
;
213 enum optab_methods methods
;
214 enum mode_class
class;
222 /* Don't fetch these from memory more than once. */
223 real0
= force_reg (submode
, real0
);
224 real1
= force_reg (submode
, real1
);
227 imag0
= force_reg (submode
, imag0
);
229 imag1
= force_reg (submode
, imag1
);
231 /* Divisor: c*c + d*d. */
232 temp1
= expand_binop (submode
, smul_optab
, real1
, real1
,
233 NULL_RTX
, unsignedp
, methods
);
235 temp2
= expand_binop (submode
, smul_optab
, imag1
, imag1
,
236 NULL_RTX
, unsignedp
, methods
);
238 if (temp1
== 0 || temp2
== 0)
241 divisor
= expand_binop (submode
, add_optab
, temp1
, temp2
,
242 NULL_RTX
, unsignedp
, methods
);
248 /* Mathematically, ((a)(c-id))/divisor. */
249 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
251 /* Calculate the dividend. */
252 real_t
= expand_binop (submode
, smul_optab
, real0
, real1
,
253 NULL_RTX
, unsignedp
, methods
);
255 imag_t
= expand_binop (submode
, smul_optab
, real0
, imag1
,
256 NULL_RTX
, unsignedp
, methods
);
258 if (real_t
== 0 || imag_t
== 0)
261 imag_t
= expand_unop (submode
, neg_optab
, imag_t
,
262 NULL_RTX
, unsignedp
);
266 /* Mathematically, ((a+ib)(c-id))/divider. */
267 /* Calculate the dividend. */
268 temp1
= expand_binop (submode
, smul_optab
, real0
, real1
,
269 NULL_RTX
, unsignedp
, methods
);
271 temp2
= expand_binop (submode
, smul_optab
, imag0
, imag1
,
272 NULL_RTX
, unsignedp
, methods
);
274 if (temp1
== 0 || temp2
== 0)
277 real_t
= expand_binop (submode
, add_optab
, temp1
, temp2
,
278 NULL_RTX
, unsignedp
, methods
);
280 temp1
= expand_binop (submode
, smul_optab
, imag0
, real1
,
281 NULL_RTX
, unsignedp
, methods
);
283 temp2
= expand_binop (submode
, smul_optab
, real0
, imag1
,
284 NULL_RTX
, unsignedp
, methods
);
286 if (temp1
== 0 || temp2
== 0)
289 imag_t
= expand_binop (submode
, sub_optab
, temp1
, temp2
,
290 NULL_RTX
, unsignedp
, methods
);
292 if (real_t
== 0 || imag_t
== 0)
296 if (class == MODE_COMPLEX_FLOAT
)
297 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
298 realr
, unsignedp
, methods
);
300 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
301 real_t
, divisor
, realr
, unsignedp
);
307 emit_move_insn (realr
, res
);
309 if (class == MODE_COMPLEX_FLOAT
)
310 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
311 imagr
, unsignedp
, methods
);
313 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
314 imag_t
, divisor
, imagr
, unsignedp
);
320 emit_move_insn (imagr
, res
);
325 /* Generate code to perform a wide-input-range-acceptable complex divide. */
328 expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
329 unsignedp
, methods
, class, binoptab
)
330 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
331 enum machine_mode submode
;
333 enum optab_methods methods
;
334 enum mode_class
class;
339 rtx temp1
, temp2
, lab1
, lab2
;
340 enum machine_mode mode
;
344 /* Don't fetch these from memory more than once. */
345 real0
= force_reg (submode
, real0
);
346 real1
= force_reg (submode
, real1
);
349 imag0
= force_reg (submode
, imag0
);
351 imag1
= force_reg (submode
, imag1
);
353 /* XXX What's an "unsigned" complex number? */
361 temp1
= expand_abs (submode
, real1
, NULL_RTX
, 1);
362 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, 1);
365 if (temp1
== 0 || temp2
== 0)
368 mode
= GET_MODE (temp1
);
369 align
= GET_MODE_ALIGNMENT (mode
);
370 lab1
= gen_label_rtx ();
371 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
372 mode
, unsignedp
, align
, lab1
);
374 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
376 if (class == MODE_COMPLEX_FLOAT
)
377 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
378 NULL_RTX
, unsignedp
, methods
);
380 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
381 imag1
, real1
, NULL_RTX
, unsignedp
);
386 /* Calculate divisor. */
388 temp1
= expand_binop (submode
, smul_optab
, imag1
, ratio
,
389 NULL_RTX
, unsignedp
, methods
);
394 divisor
= expand_binop (submode
, add_optab
, temp1
, real1
,
395 NULL_RTX
, unsignedp
, methods
);
400 /* Calculate dividend. */
406 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
408 imag_t
= expand_binop (submode
, smul_optab
, real0
, ratio
,
409 NULL_RTX
, unsignedp
, methods
);
414 imag_t
= expand_unop (submode
, neg_optab
, imag_t
,
415 NULL_RTX
, unsignedp
);
417 if (real_t
== 0 || imag_t
== 0)
422 /* Compute (a+ib)/(c+id) as
423 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
425 temp1
= expand_binop (submode
, smul_optab
, imag0
, ratio
,
426 NULL_RTX
, unsignedp
, methods
);
431 real_t
= expand_binop (submode
, add_optab
, temp1
, real0
,
432 NULL_RTX
, unsignedp
, methods
);
434 temp1
= expand_binop (submode
, smul_optab
, real0
, ratio
,
435 NULL_RTX
, unsignedp
, methods
);
440 imag_t
= expand_binop (submode
, sub_optab
, imag0
, temp1
,
441 NULL_RTX
, unsignedp
, methods
);
443 if (real_t
== 0 || imag_t
== 0)
447 if (class == MODE_COMPLEX_FLOAT
)
448 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
449 realr
, unsignedp
, methods
);
451 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
452 real_t
, divisor
, realr
, unsignedp
);
458 emit_move_insn (realr
, res
);
460 if (class == MODE_COMPLEX_FLOAT
)
461 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
462 imagr
, unsignedp
, methods
);
464 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
465 imag_t
, divisor
, imagr
, unsignedp
);
471 emit_move_insn (imagr
, res
);
473 lab2
= gen_label_rtx ();
474 emit_jump_insn (gen_jump (lab2
));
479 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
481 if (class == MODE_COMPLEX_FLOAT
)
482 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
483 NULL_RTX
, unsignedp
, methods
);
485 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
486 real1
, imag1
, NULL_RTX
, unsignedp
);
491 /* Calculate divisor. */
493 temp1
= expand_binop (submode
, smul_optab
, real1
, ratio
,
494 NULL_RTX
, unsignedp
, methods
);
499 divisor
= expand_binop (submode
, add_optab
, temp1
, imag1
,
500 NULL_RTX
, unsignedp
, methods
);
505 /* Calculate dividend. */
509 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
511 real_t
= expand_binop (submode
, smul_optab
, real0
, ratio
,
512 NULL_RTX
, unsignedp
, methods
);
514 imag_t
= expand_unop (submode
, neg_optab
, real0
,
515 NULL_RTX
, unsignedp
);
517 if (real_t
== 0 || imag_t
== 0)
522 /* Compute (a+ib)/(c+id) as
523 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
525 temp1
= expand_binop (submode
, smul_optab
, real0
, ratio
,
526 NULL_RTX
, unsignedp
, methods
);
531 real_t
= expand_binop (submode
, add_optab
, temp1
, imag0
,
532 NULL_RTX
, unsignedp
, methods
);
534 temp1
= expand_binop (submode
, smul_optab
, imag0
, ratio
,
535 NULL_RTX
, unsignedp
, methods
);
540 imag_t
= expand_binop (submode
, sub_optab
, temp1
, real0
,
541 NULL_RTX
, unsignedp
, methods
);
543 if (real_t
== 0 || imag_t
== 0)
547 if (class == MODE_COMPLEX_FLOAT
)
548 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
549 realr
, unsignedp
, methods
);
551 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
552 real_t
, divisor
, realr
, unsignedp
);
558 emit_move_insn (realr
, res
);
560 if (class == MODE_COMPLEX_FLOAT
)
561 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
562 imagr
, unsignedp
, methods
);
564 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
565 imag_t
, divisor
, imagr
, unsignedp
);
571 emit_move_insn (imagr
, res
);
578 /* Generate code to perform an operation specified by BINOPTAB
579 on operands OP0 and OP1, with result having machine-mode MODE.
581 UNSIGNEDP is for the case where we have to widen the operands
582 to perform the operation. It says to use zero-extension.
584 If TARGET is nonzero, the value
585 is generated there, if it is convenient to do so.
586 In all cases an rtx is returned for the locus of the value;
587 this may or may not be TARGET. */
590 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
591 enum machine_mode mode
;
596 enum optab_methods methods
;
598 enum optab_methods next_methods
599 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
600 ? OPTAB_WIDEN
: methods
);
601 enum mode_class
class;
602 enum machine_mode wider_mode
;
604 int commutative_op
= 0;
605 int shift_op
= (binoptab
->code
== ASHIFT
606 || binoptab
->code
== ASHIFTRT
607 || binoptab
->code
== LSHIFTRT
608 || binoptab
->code
== ROTATE
609 || binoptab
->code
== ROTATERT
);
610 rtx entry_last
= get_last_insn ();
613 class = GET_MODE_CLASS (mode
);
615 op0
= protect_from_queue (op0
, 0);
616 op1
= protect_from_queue (op1
, 0);
618 target
= protect_from_queue (target
, 1);
622 op0
= force_not_mem (op0
);
623 op1
= force_not_mem (op1
);
626 /* If subtracting an integer constant, convert this into an addition of
627 the negated constant. */
629 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
631 op1
= negate_rtx (mode
, op1
);
632 binoptab
= add_optab
;
635 /* If we are inside an appropriately-short loop and one operand is an
636 expensive constant, force it into a register. */
637 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
638 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
639 op0
= force_reg (mode
, op0
);
641 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
642 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
643 op1
= force_reg (mode
, op1
);
645 /* Record where to delete back to if we backtrack. */
646 last
= get_last_insn ();
648 /* If operation is commutative,
649 try to make the first operand a register.
650 Even better, try to make it the same as the target.
651 Also try to make the last operand a constant. */
652 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
653 || binoptab
== smul_widen_optab
654 || binoptab
== umul_widen_optab
655 || binoptab
== smul_highpart_optab
656 || binoptab
== umul_highpart_optab
)
660 if (((target
== 0 || GET_CODE (target
) == REG
)
661 ? ((GET_CODE (op1
) == REG
662 && GET_CODE (op0
) != REG
)
664 : rtx_equal_p (op1
, target
))
665 || GET_CODE (op0
) == CONST_INT
)
673 /* If we can do it with a three-operand insn, do so. */
675 if (methods
!= OPTAB_MUST_WIDEN
676 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
678 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
679 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
680 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
682 rtx xop0
= op0
, xop1
= op1
;
687 temp
= gen_reg_rtx (mode
);
689 /* If it is a commutative operator and the modes would match
690 if we would swap the operands, we can save the conversions. */
693 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
694 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
698 tmp
= op0
; op0
= op1
; op1
= tmp
;
699 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
703 /* In case the insn wants input operands in modes different from
704 the result, convert the operands. */
706 if (GET_MODE (op0
) != VOIDmode
707 && GET_MODE (op0
) != mode0
708 && mode0
!= VOIDmode
)
709 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
711 if (GET_MODE (xop1
) != VOIDmode
712 && GET_MODE (xop1
) != mode1
713 && mode1
!= VOIDmode
)
714 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
716 /* Now, if insn's predicates don't allow our operands, put them into
719 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
720 && mode0
!= VOIDmode
)
721 xop0
= copy_to_mode_reg (mode0
, xop0
);
723 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
724 && mode1
!= VOIDmode
)
725 xop1
= copy_to_mode_reg (mode1
, xop1
);
727 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
728 temp
= gen_reg_rtx (mode
);
730 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
733 /* If PAT is a multi-insn sequence, try to add an appropriate
734 REG_EQUAL note to it. If we can't because TEMP conflicts with an
735 operand, call ourselves again, this time without a target. */
736 if (GET_CODE (pat
) == SEQUENCE
737 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
739 delete_insns_since (last
);
740 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
748 delete_insns_since (last
);
751 /* If this is a multiply, see if we can do a widening operation that
752 takes operands of this mode and makes a wider mode. */
754 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
755 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
756 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
757 != CODE_FOR_nothing
))
759 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
760 unsignedp
? umul_widen_optab
: smul_widen_optab
,
761 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
765 if (GET_MODE_CLASS (mode
) == MODE_INT
)
766 return gen_lowpart (mode
, temp
);
768 return convert_to_mode (mode
, temp
, unsignedp
);
772 /* Look for a wider mode of the same class for which we think we
773 can open-code the operation. Check for a widening multiply at the
774 wider mode as well. */
776 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
777 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
778 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
779 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
781 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
782 || (binoptab
== smul_optab
783 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
784 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
785 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
786 != CODE_FOR_nothing
)))
788 rtx xop0
= op0
, xop1
= op1
;
791 /* For certain integer operations, we need not actually extend
792 the narrow operands, as long as we will truncate
793 the results to the same narrowness. */
795 if ((binoptab
== ior_optab
|| binoptab
== and_optab
796 || binoptab
== xor_optab
797 || binoptab
== add_optab
|| binoptab
== sub_optab
798 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
799 && class == MODE_INT
)
802 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
804 /* The second operand of a shift must always be extended. */
805 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
806 no_extend
&& binoptab
!= ashl_optab
);
808 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
809 unsignedp
, OPTAB_DIRECT
);
812 if (class != MODE_INT
)
815 target
= gen_reg_rtx (mode
);
816 convert_move (target
, temp
, 0);
820 return gen_lowpart (mode
, temp
);
823 delete_insns_since (last
);
827 /* These can be done a word at a time. */
828 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
830 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
831 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
837 /* If TARGET is the same as one of the operands, the REG_EQUAL note
838 won't be accurate, so use a new target. */
839 if (target
== 0 || target
== op0
|| target
== op1
)
840 target
= gen_reg_rtx (mode
);
844 /* Do the actual arithmetic. */
845 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
847 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
848 rtx x
= expand_binop (word_mode
, binoptab
,
849 operand_subword_force (op0
, i
, mode
),
850 operand_subword_force (op1
, i
, mode
),
851 target_piece
, unsignedp
, next_methods
);
856 if (target_piece
!= x
)
857 emit_move_insn (target_piece
, x
);
860 insns
= get_insns ();
863 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
865 if (binoptab
->code
!= UNKNOWN
)
867 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
868 copy_rtx (op0
), copy_rtx (op1
));
872 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
877 /* Synthesize double word shifts from single word shifts. */
878 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
879 || binoptab
== ashr_optab
)
881 && GET_CODE (op1
) == CONST_INT
882 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
883 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
884 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
885 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
887 rtx insns
, inter
, equiv_value
;
888 rtx into_target
, outof_target
;
889 rtx into_input
, outof_input
;
890 int shift_count
, left_shift
, outof_word
;
892 /* If TARGET is the same as one of the operands, the REG_EQUAL note
893 won't be accurate, so use a new target. */
894 if (target
== 0 || target
== op0
|| target
== op1
)
895 target
= gen_reg_rtx (mode
);
899 shift_count
= INTVAL (op1
);
901 /* OUTOF_* is the word we are shifting bits away from, and
902 INTO_* is the word that we are shifting bits towards, thus
903 they differ depending on the direction of the shift and
906 left_shift
= binoptab
== ashl_optab
;
907 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
909 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
910 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
912 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
913 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
915 if (shift_count
>= BITS_PER_WORD
)
917 inter
= expand_binop (word_mode
, binoptab
,
919 GEN_INT (shift_count
- BITS_PER_WORD
),
920 into_target
, unsignedp
, next_methods
);
922 if (inter
!= 0 && inter
!= into_target
)
923 emit_move_insn (into_target
, inter
);
925 /* For a signed right shift, we must fill the word we are shifting
926 out of with copies of the sign bit. Otherwise it is zeroed. */
927 if (inter
!= 0 && binoptab
!= ashr_optab
)
928 inter
= CONST0_RTX (word_mode
);
930 inter
= expand_binop (word_mode
, binoptab
,
932 GEN_INT (BITS_PER_WORD
- 1),
933 outof_target
, unsignedp
, next_methods
);
935 if (inter
!= 0 && inter
!= outof_target
)
936 emit_move_insn (outof_target
, inter
);
941 optab reverse_unsigned_shift
, unsigned_shift
;
943 /* For a shift of less then BITS_PER_WORD, to compute the carry,
944 we must do a logical shift in the opposite direction of the
947 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
949 /* For a shift of less than BITS_PER_WORD, to compute the word
950 shifted towards, we need to unsigned shift the orig value of
953 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
955 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
957 GEN_INT (BITS_PER_WORD
- shift_count
),
958 0, unsignedp
, next_methods
);
963 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
964 op1
, 0, unsignedp
, next_methods
);
967 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
968 into_target
, unsignedp
, next_methods
);
970 if (inter
!= 0 && inter
!= into_target
)
971 emit_move_insn (into_target
, inter
);
974 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
975 op1
, outof_target
, unsignedp
, next_methods
);
977 if (inter
!= 0 && inter
!= outof_target
)
978 emit_move_insn (outof_target
, inter
);
981 insns
= get_insns ();
986 if (binoptab
->code
!= UNKNOWN
)
987 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
991 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
996 /* Synthesize double word rotates from single word shifts. */
997 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
999 && GET_CODE (op1
) == CONST_INT
1000 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1001 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1002 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1004 rtx insns
, equiv_value
;
1005 rtx into_target
, outof_target
;
1006 rtx into_input
, outof_input
;
1008 int shift_count
, left_shift
, outof_word
;
1010 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1011 won't be accurate, so use a new target. */
1012 if (target
== 0 || target
== op0
|| target
== op1
)
1013 target
= gen_reg_rtx (mode
);
1017 shift_count
= INTVAL (op1
);
1019 /* OUTOF_* is the word we are shifting bits away from, and
1020 INTO_* is the word that we are shifting bits towards, thus
1021 they differ depending on the direction of the shift and
1022 WORDS_BIG_ENDIAN. */
1024 left_shift
= (binoptab
== rotl_optab
);
1025 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1027 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1028 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1030 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1031 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1033 if (shift_count
== BITS_PER_WORD
)
1035 /* This is just a word swap. */
1036 emit_move_insn (outof_target
, into_input
);
1037 emit_move_insn (into_target
, outof_input
);
1042 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1043 rtx first_shift_count
, second_shift_count
;
1044 optab reverse_unsigned_shift
, unsigned_shift
;
1046 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1047 ? lshr_optab
: ashl_optab
);
1049 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1050 ? ashl_optab
: lshr_optab
);
1052 if (shift_count
> BITS_PER_WORD
)
1054 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1055 second_shift_count
= GEN_INT (2*BITS_PER_WORD
- shift_count
);
1059 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1060 second_shift_count
= GEN_INT (shift_count
);
1063 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1064 outof_input
, first_shift_count
,
1065 NULL_RTX
, unsignedp
, next_methods
);
1066 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1067 into_input
, second_shift_count
,
1068 into_target
, unsignedp
, next_methods
);
1070 if (into_temp1
!= 0 && into_temp2
!= 0)
1071 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1072 into_target
, unsignedp
, next_methods
);
1076 if (inter
!= 0 && inter
!= into_target
)
1077 emit_move_insn (into_target
, inter
);
1079 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1080 into_input
, first_shift_count
,
1081 NULL_RTX
, unsignedp
, next_methods
);
1082 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1083 outof_input
, second_shift_count
,
1084 outof_target
, unsignedp
, next_methods
);
1086 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1087 inter
= expand_binop (word_mode
, ior_optab
,
1088 outof_temp1
, outof_temp2
,
1089 outof_target
, unsignedp
, next_methods
);
1091 if (inter
!= 0 && inter
!= outof_target
)
1092 emit_move_insn (outof_target
, inter
);
1095 insns
= get_insns ();
1100 if (binoptab
->code
!= UNKNOWN
)
1101 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1105 /* We can't make this a no conflict block if this is a word swap,
1106 because the word swap case fails if the input and output values
1107 are in the same register. */
1108 if (shift_count
!= BITS_PER_WORD
)
1109 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1118 /* These can be done a word at a time by propagating carries. */
1119 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1120 && class == MODE_INT
1121 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1122 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1125 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1126 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1127 unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1128 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1131 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1132 value is one of those, use it. Otherwise, use 1 since it is the
1133 one easiest to get. */
1134 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1135 int normalizep
= STORE_FLAG_VALUE
;
1140 /* Prepare the operands. */
1141 xop0
= force_reg (mode
, op0
);
1142 xop1
= force_reg (mode
, op1
);
1144 if (target
== 0 || GET_CODE (target
) != REG
1145 || target
== xop0
|| target
== xop1
)
1146 target
= gen_reg_rtx (mode
);
1148 /* Indicate for flow that the entire target reg is being set. */
1149 if (GET_CODE (target
) == REG
)
1150 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
1152 /* Do the actual arithmetic. */
1153 for (i
= 0; i
< nwords
; i
++)
1155 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1156 rtx target_piece
= operand_subword (target
, index
, 1, mode
);
1157 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1158 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1161 /* Main add/subtract of the input operands. */
1162 x
= expand_binop (word_mode
, binoptab
,
1163 op0_piece
, op1_piece
,
1164 target_piece
, unsignedp
, next_methods
);
1170 /* Store carry from main add/subtract. */
1171 carry_out
= gen_reg_rtx (word_mode
);
1172 carry_out
= emit_store_flag_force (carry_out
,
1173 (binoptab
== add_optab
1176 word_mode
, 1, normalizep
);
1181 /* Add/subtract previous carry to main result. */
1182 x
= expand_binop (word_mode
,
1183 normalizep
== 1 ? binoptab
: otheroptab
,
1185 target_piece
, 1, next_methods
);
1188 else if (target_piece
!= x
)
1189 emit_move_insn (target_piece
, x
);
1193 /* THIS CODE HAS NOT BEEN TESTED. */
1194 /* Get out carry from adding/subtracting carry in. */
1195 carry_tmp
= emit_store_flag_force (carry_tmp
,
1196 binoptab
== add_optab
1199 word_mode
, 1, normalizep
);
1201 /* Logical-ior the two poss. carry together. */
1202 carry_out
= expand_binop (word_mode
, ior_optab
,
1203 carry_out
, carry_tmp
,
1204 carry_out
, 0, next_methods
);
1210 carry_in
= carry_out
;
1213 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1215 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1217 rtx temp
= emit_move_insn (target
, target
);
1219 set_unique_reg_note (temp
,
1221 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1230 delete_insns_since (last
);
1233 /* If we want to multiply two two-word values and have normal and widening
1234 multiplies of single-word values, we can do this with three smaller
1235 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1236 because we are not operating on one word at a time.
1238 The multiplication proceeds as follows:
1239 _______________________
1240 [__op0_high_|__op0_low__]
1241 _______________________
1242 * [__op1_high_|__op1_low__]
1243 _______________________________________________
1244 _______________________
1245 (1) [__op0_low__*__op1_low__]
1246 _______________________
1247 (2a) [__op0_low__*__op1_high_]
1248 _______________________
1249 (2b) [__op0_high_*__op1_low__]
1250 _______________________
1251 (3) [__op0_high_*__op1_high_]
1254 This gives a 4-word result. Since we are only interested in the
1255 lower 2 words, partial result (3) and the upper words of (2a) and
1256 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1257 calculated using non-widening multiplication.
1259 (1), however, needs to be calculated with an unsigned widening
1260 multiplication. If this operation is not directly supported we
1261 try using a signed widening multiplication and adjust the result.
1262 This adjustment works as follows:
1264 If both operands are positive then no adjustment is needed.
1266 If the operands have different signs, for example op0_low < 0 and
1267 op1_low >= 0, the instruction treats the most significant bit of
1268 op0_low as a sign bit instead of a bit with significance
1269 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1270 with 2**BITS_PER_WORD - op0_low, and two's complements the
1271 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1274 Similarly, if both operands are negative, we need to add
1275 (op0_low + op1_low) * 2**BITS_PER_WORD.
1277 We use a trick to adjust quickly. We logically shift op0_low right
1278 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1279 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1280 logical shift exists, we do an arithmetic right shift and subtract
1283 if (binoptab
== smul_optab
1284 && class == MODE_INT
1285 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1286 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1287 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1288 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1289 != CODE_FOR_nothing
)
1290 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1291 != CODE_FOR_nothing
)))
1293 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1294 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1295 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1296 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1297 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1298 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1300 rtx op0_xhigh
= NULL_RTX
;
1301 rtx op1_xhigh
= NULL_RTX
;
1303 /* If the target is the same as one of the inputs, don't use it. This
1304 prevents problems with the REG_EQUAL note. */
1305 if (target
== op0
|| target
== op1
1306 || (target
!= 0 && GET_CODE (target
) != REG
))
1309 /* Multiply the two lower words to get a double-word product.
1310 If unsigned widening multiplication is available, use that;
1311 otherwise use the signed form and compensate. */
1313 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1315 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1316 target
, 1, OPTAB_DIRECT
);
1318 /* If we didn't succeed, delete everything we did so far. */
1320 delete_insns_since (last
);
1322 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1326 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1327 != CODE_FOR_nothing
)
1329 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1330 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1331 target
, 1, OPTAB_DIRECT
);
1332 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1333 NULL_RTX
, 1, next_methods
);
1335 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1336 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1339 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1340 NULL_RTX
, 0, next_methods
);
1342 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1343 op0_xhigh
, op0_xhigh
, 0,
1347 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1348 NULL_RTX
, 1, next_methods
);
1350 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1351 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1354 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1355 NULL_RTX
, 0, next_methods
);
1357 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1358 op1_xhigh
, op1_xhigh
, 0,
1363 /* If we have been able to directly compute the product of the
1364 low-order words of the operands and perform any required adjustments
1365 of the operands, we proceed by trying two more multiplications
1366 and then computing the appropriate sum.
1368 We have checked above that the required addition is provided.
1369 Full-word addition will normally always succeed, especially if
1370 it is provided at all, so we don't worry about its failure. The
1371 multiplication may well fail, however, so we do handle that. */
1373 if (product
&& op0_xhigh
&& op1_xhigh
)
1375 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1376 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1377 NULL_RTX
, 0, OPTAB_DIRECT
);
1380 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1381 product_high
, 0, next_methods
);
1383 if (temp
!= 0 && temp
!= product_high
)
1384 emit_move_insn (product_high
, temp
);
1387 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1388 NULL_RTX
, 0, OPTAB_DIRECT
);
1391 temp
= expand_binop (word_mode
, add_optab
, temp
,
1392 product_high
, product_high
,
1395 if (temp
!= 0 && temp
!= product_high
)
1396 emit_move_insn (product_high
, temp
);
1400 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1402 temp
= emit_move_insn (product
, product
);
1403 set_unique_reg_note (temp
,
1405 gen_rtx_fmt_ee (MULT
, mode
,
1414 /* If we get here, we couldn't do it for some reason even though we
1415 originally thought we could. Delete anything we've emitted in
1418 delete_insns_since (last
);
1421 /* We need to open-code the complex type operations: '+, -, * and /' */
1423 /* At this point we allow operations between two similar complex
1424 numbers, and also if one of the operands is not a complex number
1425 but rather of MODE_FLOAT or MODE_INT. However, the caller
1426 must make sure that the MODE of the non-complex operand matches
1427 the SUBMODE of the complex operand. */
1429 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1431 rtx real0
= 0, imag0
= 0;
1432 rtx real1
= 0, imag1
= 0;
1433 rtx realr
, imagr
, res
;
1438 /* Find the correct mode for the real and imaginary parts */
1439 enum machine_mode submode
1440 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1441 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1444 if (submode
== BLKmode
)
1448 target
= gen_reg_rtx (mode
);
1452 realr
= gen_realpart (submode
, target
);
1453 imagr
= gen_imagpart (submode
, target
);
1455 if (GET_MODE (op0
) == mode
)
1457 real0
= gen_realpart (submode
, op0
);
1458 imag0
= gen_imagpart (submode
, op0
);
1463 if (GET_MODE (op1
) == mode
)
1465 real1
= gen_realpart (submode
, op1
);
1466 imag1
= gen_imagpart (submode
, op1
);
1471 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0|| imag1
!= 0))
1474 switch (binoptab
->code
)
1477 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1479 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1480 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1481 realr
, unsignedp
, methods
);
1485 else if (res
!= realr
)
1486 emit_move_insn (realr
, res
);
1489 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1490 imagr
, unsignedp
, methods
);
1493 else if (binoptab
->code
== MINUS
)
1494 res
= expand_unop (submode
, neg_optab
, imag1
, imagr
, unsignedp
);
1500 else if (res
!= imagr
)
1501 emit_move_insn (imagr
, res
);
1507 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1513 /* Don't fetch these from memory more than once. */
1514 real0
= force_reg (submode
, real0
);
1515 real1
= force_reg (submode
, real1
);
1516 imag0
= force_reg (submode
, imag0
);
1517 imag1
= force_reg (submode
, imag1
);
1519 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1520 unsignedp
, methods
);
1522 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1523 unsignedp
, methods
);
1525 if (temp1
== 0 || temp2
== 0)
1528 res
= expand_binop (submode
, sub_optab
, temp1
, temp2
,
1529 realr
, unsignedp
, methods
);
1533 else if (res
!= realr
)
1534 emit_move_insn (realr
, res
);
1536 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1537 NULL_RTX
, unsignedp
, methods
);
1539 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1540 NULL_RTX
, unsignedp
, methods
);
1542 if (temp1
== 0 || temp2
== 0)
1545 res
= expand_binop (submode
, add_optab
, temp1
, temp2
,
1546 imagr
, unsignedp
, methods
);
1550 else if (res
!= imagr
)
1551 emit_move_insn (imagr
, res
);
1557 /* Don't fetch these from memory more than once. */
1558 real0
= force_reg (submode
, real0
);
1559 real1
= force_reg (submode
, real1
);
1561 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1562 realr
, unsignedp
, methods
);
1565 else if (res
!= realr
)
1566 emit_move_insn (realr
, res
);
1569 res
= expand_binop (submode
, binoptab
,
1570 real1
, imag0
, imagr
, unsignedp
, methods
);
1572 res
= expand_binop (submode
, binoptab
,
1573 real0
, imag1
, imagr
, unsignedp
, methods
);
1577 else if (res
!= imagr
)
1578 emit_move_insn (imagr
, res
);
1585 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1589 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1591 /* Don't fetch these from memory more than once. */
1592 real1
= force_reg (submode
, real1
);
1594 /* Simply divide the real and imaginary parts by `c' */
1595 if (class == MODE_COMPLEX_FLOAT
)
1596 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1597 realr
, unsignedp
, methods
);
1599 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1600 real0
, real1
, realr
, unsignedp
);
1604 else if (res
!= realr
)
1605 emit_move_insn (realr
, res
);
1607 if (class == MODE_COMPLEX_FLOAT
)
1608 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1609 imagr
, unsignedp
, methods
);
1611 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1612 imag0
, real1
, imagr
, unsignedp
);
1616 else if (res
!= imagr
)
1617 emit_move_insn (imagr
, res
);
1623 switch (flag_complex_divide_method
)
1626 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1627 realr
, imagr
, submode
,
1633 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1634 realr
, imagr
, submode
,
1654 if (binoptab
->code
!= UNKNOWN
)
1656 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1657 copy_rtx (op0
), copy_rtx (op1
));
1661 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1667 /* It can't be open-coded in this mode.
1668 Use a library call if one is available and caller says that's ok. */
1670 if (binoptab
->handlers
[(int) mode
].libfunc
1671 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1675 enum machine_mode op1_mode
= mode
;
1682 op1_mode
= word_mode
;
1683 /* Specify unsigned here,
1684 since negative shift counts are meaningless. */
1685 op1x
= convert_to_mode (word_mode
, op1
, 1);
1688 if (GET_MODE (op0
) != VOIDmode
1689 && GET_MODE (op0
) != mode
)
1690 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1692 /* Pass 1 for NO_QUEUE so we don't lose any increments
1693 if the libcall is cse'd or moved. */
1694 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1695 NULL_RTX
, LCT_CONST
, mode
, 2,
1696 op0
, mode
, op1x
, op1_mode
);
1698 insns
= get_insns ();
1701 target
= gen_reg_rtx (mode
);
1702 emit_libcall_block (insns
, target
, value
,
1703 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1708 delete_insns_since (last
);
1710 /* It can't be done in this mode. Can we do it in a wider mode? */
1712 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1713 || methods
== OPTAB_MUST_WIDEN
))
1715 /* Caller says, don't even try. */
1716 delete_insns_since (entry_last
);
1720 /* Compute the value of METHODS to pass to recursive calls.
1721 Don't allow widening to be tried recursively. */
1723 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1725 /* Look for a wider mode of the same class for which it appears we can do
1728 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1730 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1731 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1733 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1734 != CODE_FOR_nothing
)
1735 || (methods
== OPTAB_LIB
1736 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1738 rtx xop0
= op0
, xop1
= op1
;
1741 /* For certain integer operations, we need not actually extend
1742 the narrow operands, as long as we will truncate
1743 the results to the same narrowness. */
1745 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1746 || binoptab
== xor_optab
1747 || binoptab
== add_optab
|| binoptab
== sub_optab
1748 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1749 && class == MODE_INT
)
1752 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1753 unsignedp
, no_extend
);
1755 /* The second operand of a shift must always be extended. */
1756 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1757 no_extend
&& binoptab
!= ashl_optab
);
1759 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1760 unsignedp
, methods
);
1763 if (class != MODE_INT
)
1766 target
= gen_reg_rtx (mode
);
1767 convert_move (target
, temp
, 0);
1771 return gen_lowpart (mode
, temp
);
1774 delete_insns_since (last
);
1779 delete_insns_since (entry_last
);
1783 /* Expand a binary operator which has both signed and unsigned forms.
1784 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1787 If we widen unsigned operands, we may use a signed wider operation instead
1788 of an unsigned wider operation, since the result would be the same. */
1791 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
1792 enum machine_mode mode
;
1793 optab uoptab
, soptab
;
1794 rtx op0
, op1
, target
;
1796 enum optab_methods methods
;
1799 optab direct_optab
= unsignedp
? uoptab
: soptab
;
1800 struct optab wide_soptab
;
1802 /* Do it without widening, if possible. */
1803 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
1804 unsignedp
, OPTAB_DIRECT
);
1805 if (temp
|| methods
== OPTAB_DIRECT
)
1808 /* Try widening to a signed int. Make a fake signed optab that
1809 hides any signed insn for direct use. */
1810 wide_soptab
= *soptab
;
1811 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
1812 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
1814 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1815 unsignedp
, OPTAB_WIDEN
);
1817 /* For unsigned operands, try widening to an unsigned int. */
1818 if (temp
== 0 && unsignedp
)
1819 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
1820 unsignedp
, OPTAB_WIDEN
);
1821 if (temp
|| methods
== OPTAB_WIDEN
)
1824 /* Use the right width lib call if that exists. */
1825 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
1826 if (temp
|| methods
== OPTAB_LIB
)
1829 /* Must widen and use a lib call, use either signed or unsigned. */
1830 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1831 unsignedp
, methods
);
1835 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
1836 unsignedp
, methods
);
1840 /* Generate code to perform an operation specified by BINOPTAB
1841 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1842 We assume that the order of the operands for the instruction
1843 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1844 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1846 Either TARG0 or TARG1 may be zero, but what that means is that
1847 the result is not actually wanted. We will generate it into
1848 a dummy pseudo-reg and discard it. They may not both be zero.
1850 Returns 1 if this operation can be performed; 0 if not. */
1853 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
1859 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1860 enum mode_class
class;
1861 enum machine_mode wider_mode
;
1862 rtx entry_last
= get_last_insn ();
1865 class = GET_MODE_CLASS (mode
);
1867 op0
= protect_from_queue (op0
, 0);
1868 op1
= protect_from_queue (op1
, 0);
1872 op0
= force_not_mem (op0
);
1873 op1
= force_not_mem (op1
);
1876 /* If we are inside an appropriately-short loop and one operand is an
1877 expensive constant, force it into a register. */
1878 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
1879 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
1880 op0
= force_reg (mode
, op0
);
1882 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
1883 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
1884 op1
= force_reg (mode
, op1
);
1887 targ0
= protect_from_queue (targ0
, 1);
1889 targ0
= gen_reg_rtx (mode
);
1891 targ1
= protect_from_queue (targ1
, 1);
1893 targ1
= gen_reg_rtx (mode
);
1895 /* Record where to go back to if we fail. */
1896 last
= get_last_insn ();
1898 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1900 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
1901 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
1902 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
1904 rtx xop0
= op0
, xop1
= op1
;
1906 /* In case this insn wants input operands in modes different from the
1907 result, convert the operands. */
1908 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (op0
) != mode0
)
1909 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1911 if (GET_MODE (op1
) != VOIDmode
&& GET_MODE (op1
) != mode1
)
1912 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
1914 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1915 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
1916 xop0
= copy_to_mode_reg (mode0
, xop0
);
1918 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
1919 xop1
= copy_to_mode_reg (mode1
, xop1
);
1921 /* We could handle this, but we should always be called with a pseudo
1922 for our targets and all insns should take them as outputs. */
1923 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
1924 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
1927 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
1934 delete_insns_since (last
);
1937 /* It can't be done in this mode. Can we do it in a wider mode? */
1939 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1941 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1942 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1944 if (binoptab
->handlers
[(int) wider_mode
].insn_code
1945 != CODE_FOR_nothing
)
1947 register rtx t0
= gen_reg_rtx (wider_mode
);
1948 register rtx t1
= gen_reg_rtx (wider_mode
);
1950 if (expand_twoval_binop (binoptab
,
1951 convert_modes (wider_mode
, mode
, op0
,
1953 convert_modes (wider_mode
, mode
, op1
,
1957 convert_move (targ0
, t0
, unsignedp
);
1958 convert_move (targ1
, t1
, unsignedp
);
1962 delete_insns_since (last
);
1967 delete_insns_since (entry_last
);
1971 /* Generate code to perform an operation specified by UNOPTAB
1972 on operand OP0, with result having machine-mode MODE.
1974 UNSIGNEDP is for the case where we have to widen the operands
1975 to perform the operation. It says to use zero-extension.
1977 If TARGET is nonzero, the value
1978 is generated there, if it is convenient to do so.
1979 In all cases an rtx is returned for the locus of the value;
1980 this may or may not be TARGET. */
1983 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
1984 enum machine_mode mode
;
1990 enum mode_class
class;
1991 enum machine_mode wider_mode
;
1993 rtx last
= get_last_insn ();
1996 class = GET_MODE_CLASS (mode
);
1998 op0
= protect_from_queue (op0
, 0);
2002 op0
= force_not_mem (op0
);
2006 target
= protect_from_queue (target
, 1);
2008 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2010 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2011 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2017 temp
= gen_reg_rtx (mode
);
2019 if (GET_MODE (xop0
) != VOIDmode
2020 && GET_MODE (xop0
) != mode0
)
2021 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2023 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2025 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2026 xop0
= copy_to_mode_reg (mode0
, xop0
);
2028 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2029 temp
= gen_reg_rtx (mode
);
2031 pat
= GEN_FCN (icode
) (temp
, xop0
);
2034 if (GET_CODE (pat
) == SEQUENCE
2035 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2037 delete_insns_since (last
);
2038 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2046 delete_insns_since (last
);
2049 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2051 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2052 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2053 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2055 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2059 /* For certain operations, we need not actually extend
2060 the narrow operand, as long as we will truncate the
2061 results to the same narrowness. */
2063 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2064 (unoptab
== neg_optab
2065 || unoptab
== one_cmpl_optab
)
2066 && class == MODE_INT
);
2068 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2073 if (class != MODE_INT
)
2076 target
= gen_reg_rtx (mode
);
2077 convert_move (target
, temp
, 0);
2081 return gen_lowpart (mode
, temp
);
2084 delete_insns_since (last
);
2088 /* These can be done a word at a time. */
2089 if (unoptab
== one_cmpl_optab
2090 && class == MODE_INT
2091 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2092 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2097 if (target
== 0 || target
== op0
)
2098 target
= gen_reg_rtx (mode
);
2102 /* Do the actual arithmetic. */
2103 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2105 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2106 rtx x
= expand_unop (word_mode
, unoptab
,
2107 operand_subword_force (op0
, i
, mode
),
2108 target_piece
, unsignedp
);
2109 if (target_piece
!= x
)
2110 emit_move_insn (target_piece
, x
);
2113 insns
= get_insns ();
2116 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2117 gen_rtx_fmt_e (unoptab
->code
, mode
,
2122 /* Open-code the complex negation operation. */
2123 else if (unoptab
== neg_optab
2124 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2130 /* Find the correct mode for the real and imaginary parts */
2131 enum machine_mode submode
2132 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2133 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2136 if (submode
== BLKmode
)
2140 target
= gen_reg_rtx (mode
);
2144 target_piece
= gen_imagpart (submode
, target
);
2145 x
= expand_unop (submode
, unoptab
,
2146 gen_imagpart (submode
, op0
),
2147 target_piece
, unsignedp
);
2148 if (target_piece
!= x
)
2149 emit_move_insn (target_piece
, x
);
2151 target_piece
= gen_realpart (submode
, target
);
2152 x
= expand_unop (submode
, unoptab
,
2153 gen_realpart (submode
, op0
),
2154 target_piece
, unsignedp
);
2155 if (target_piece
!= x
)
2156 emit_move_insn (target_piece
, x
);
2161 emit_no_conflict_block (seq
, target
, op0
, 0,
2162 gen_rtx_fmt_e (unoptab
->code
, mode
,
2167 /* Now try a library call in this mode. */
2168 if (unoptab
->handlers
[(int) mode
].libfunc
)
2175 /* Pass 1 for NO_QUEUE so we don't lose any increments
2176 if the libcall is cse'd or moved. */
2177 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2178 NULL_RTX
, LCT_CONST
, mode
, 1, op0
, mode
);
2179 insns
= get_insns ();
2182 target
= gen_reg_rtx (mode
);
2183 emit_libcall_block (insns
, target
, value
,
2184 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2189 /* It can't be done in this mode. Can we do it in a wider mode? */
2191 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2193 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2194 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2196 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2197 != CODE_FOR_nothing
)
2198 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2202 /* For certain operations, we need not actually extend
2203 the narrow operand, as long as we will truncate the
2204 results to the same narrowness. */
2206 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2207 (unoptab
== neg_optab
2208 || unoptab
== one_cmpl_optab
)
2209 && class == MODE_INT
);
2211 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2216 if (class != MODE_INT
)
2219 target
= gen_reg_rtx (mode
);
2220 convert_move (target
, temp
, 0);
2224 return gen_lowpart (mode
, temp
);
2227 delete_insns_since (last
);
2232 /* If there is no negate operation, try doing a subtract from zero.
2233 The US Software GOFAST library needs this. */
2234 if (unoptab
== neg_optab
)
2237 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2238 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2246 /* Emit code to compute the absolute value of OP0, with result to
2247 TARGET if convenient. (TARGET may be 0.) The return value says
2248 where the result actually is to be found.
2250 MODE is the mode of the operand; the mode of the result is
2251 different but can be deduced from MODE.
2256 expand_abs (mode
, op0
, target
, safe
)
2257 enum machine_mode mode
;
2264 /* First try to do it with a special abs instruction. */
2265 temp
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
2269 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2270 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2272 rtx last
= get_last_insn ();
2274 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2276 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2282 delete_insns_since (last
);
2285 /* If this machine has expensive jumps, we can do integer absolute
2286 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2287 where W is the width of MODE. But don't do this if the machine has
2288 conditional arithmetic since the branches will be converted into
2289 a conditional negation insn. */
2291 #ifndef HAVE_conditional_arithmetic
2292 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2294 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2295 size_int (GET_MODE_BITSIZE (mode
) - 1),
2298 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2301 temp
= expand_binop (mode
, sub_optab
, temp
, extended
, target
, 0,
2309 /* If that does not win, use conditional jump and negate. */
2311 /* It is safe to use the target if it is the same
2312 as the source if this is also a pseudo register */
2313 if (op0
== target
&& GET_CODE (op0
) == REG
2314 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2317 op1
= gen_label_rtx ();
2318 if (target
== 0 || ! safe
2319 || GET_MODE (target
) != mode
2320 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2321 || (GET_CODE (target
) == REG
2322 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2323 target
= gen_reg_rtx (mode
);
2325 emit_move_insn (target
, op0
);
2328 /* If this mode is an integer too wide to compare properly,
2329 compare word by word. Rely on CSE to optimize constant cases. */
2330 if (GET_MODE_CLASS (mode
) == MODE_INT
2331 && ! can_compare_p (GE
, mode
, ccp_jump
))
2332 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2335 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2336 NULL_RTX
, 0, NULL_RTX
, op1
);
2338 op0
= expand_unop (mode
, neg_optab
, target
, target
, 0);
2340 emit_move_insn (target
, op0
);
2346 /* Emit code to compute the absolute value of OP0, with result to
2347 TARGET if convenient. (TARGET may be 0.) The return value says
2348 where the result actually is to be found.
2350 MODE is the mode of the operand; the mode of the result is
2351 different but can be deduced from MODE.
2353 UNSIGNEDP is relevant for complex integer modes. */
2356 expand_complex_abs (mode
, op0
, target
, unsignedp
)
2357 enum machine_mode mode
;
2362 enum mode_class
class = GET_MODE_CLASS (mode
);
2363 enum machine_mode wider_mode
;
2365 rtx entry_last
= get_last_insn ();
2369 /* Find the correct mode for the real and imaginary parts. */
2370 enum machine_mode submode
2371 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2372 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2375 if (submode
== BLKmode
)
2378 op0
= protect_from_queue (op0
, 0);
2382 op0
= force_not_mem (op0
);
2385 last
= get_last_insn ();
2388 target
= protect_from_queue (target
, 1);
2390 if (abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2392 int icode
= (int) abs_optab
->handlers
[(int) mode
].insn_code
;
2393 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2399 temp
= gen_reg_rtx (submode
);
2401 if (GET_MODE (xop0
) != VOIDmode
2402 && GET_MODE (xop0
) != mode0
)
2403 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2405 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2407 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2408 xop0
= copy_to_mode_reg (mode0
, xop0
);
2410 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
2411 temp
= gen_reg_rtx (submode
);
2413 pat
= GEN_FCN (icode
) (temp
, xop0
);
2416 if (GET_CODE (pat
) == SEQUENCE
2417 && ! add_equal_note (pat
, temp
, abs_optab
->code
, xop0
, NULL_RTX
))
2419 delete_insns_since (last
);
2420 return expand_unop (mode
, abs_optab
, op0
, NULL_RTX
, unsignedp
);
2428 delete_insns_since (last
);
2431 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2433 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2434 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2436 if (abs_optab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2440 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2441 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2445 if (class != MODE_COMPLEX_INT
)
2448 target
= gen_reg_rtx (submode
);
2449 convert_move (target
, temp
, 0);
2453 return gen_lowpart (submode
, temp
);
2456 delete_insns_since (last
);
2460 /* Open-code the complex absolute-value operation
2461 if we can open-code sqrt. Otherwise it's not worth while. */
2462 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
)
2464 rtx real
, imag
, total
;
2466 real
= gen_realpart (submode
, op0
);
2467 imag
= gen_imagpart (submode
, op0
);
2469 /* Square both parts. */
2470 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
2471 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
2473 /* Sum the parts. */
2474 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
2475 0, OPTAB_LIB_WIDEN
);
2477 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2478 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
2480 delete_insns_since (last
);
2485 /* Now try a library call in this mode. */
2486 if (abs_optab
->handlers
[(int) mode
].libfunc
)
2493 /* Pass 1 for NO_QUEUE so we don't lose any increments
2494 if the libcall is cse'd or moved. */
2495 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
2496 NULL_RTX
, LCT_CONST
, submode
, 1, op0
, mode
);
2497 insns
= get_insns ();
2500 target
= gen_reg_rtx (submode
);
2501 emit_libcall_block (insns
, target
, value
,
2502 gen_rtx_fmt_e (abs_optab
->code
, mode
, op0
));
2507 /* It can't be done in this mode. Can we do it in a wider mode? */
2509 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2510 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2512 if ((abs_optab
->handlers
[(int) wider_mode
].insn_code
2513 != CODE_FOR_nothing
)
2514 || abs_optab
->handlers
[(int) wider_mode
].libfunc
)
2518 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2520 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2524 if (class != MODE_COMPLEX_INT
)
2527 target
= gen_reg_rtx (submode
);
2528 convert_move (target
, temp
, 0);
2532 return gen_lowpart (submode
, temp
);
2535 delete_insns_since (last
);
2539 delete_insns_since (entry_last
);
2543 /* Generate an instruction whose insn-code is INSN_CODE,
2544 with two operands: an output TARGET and an input OP0.
2545 TARGET *must* be nonzero, and the output is always stored there.
2546 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2547 the value that is stored into TARGET. */
2550 emit_unop_insn (icode
, target
, op0
, code
)
2557 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2560 temp
= target
= protect_from_queue (target
, 1);
2562 op0
= protect_from_queue (op0
, 0);
2564 /* Sign and zero extension from memory is often done specially on
2565 RISC machines, so forcing into a register here can pessimize
2567 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
2568 op0
= force_not_mem (op0
);
2570 /* Now, if insn does not accept our operands, put them into pseudos. */
2572 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
2573 op0
= copy_to_mode_reg (mode0
, op0
);
2575 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
2576 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
2577 temp
= gen_reg_rtx (GET_MODE (temp
));
2579 pat
= GEN_FCN (icode
) (temp
, op0
);
2581 if (GET_CODE (pat
) == SEQUENCE
&& code
!= UNKNOWN
)
2582 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
2587 emit_move_insn (target
, temp
);
2590 /* Emit code to perform a series of operations on a multi-word quantity, one
2593 Such a block is preceded by a CLOBBER of the output, consists of multiple
2594 insns, each setting one word of the output, and followed by a SET copying
2595 the output to itself.
2597 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2598 note indicating that it doesn't conflict with the (also multi-word)
2599 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2602 INSNS is a block of code generated to perform the operation, not including
2603 the CLOBBER and final copy. All insns that compute intermediate values
2604 are first emitted, followed by the block as described above.
2606 TARGET, OP0, and OP1 are the output and inputs of the operations,
2607 respectively. OP1 may be zero for a unary operation.
2609 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2612 If TARGET is not a register, INSNS is simply emitted with no special
2613 processing. Likewise if anything in INSNS is not an INSN or if
2614 there is a libcall block inside INSNS.
2616 The final insn emitted is returned. */
2619 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
2625 rtx prev
, next
, first
, last
, insn
;
2627 if (GET_CODE (target
) != REG
|| reload_in_progress
)
2628 return emit_insns (insns
);
2630 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2631 if (GET_CODE (insn
) != INSN
2632 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
2633 return emit_insns (insns
);
2635 /* First emit all insns that do not store into words of the output and remove
2636 these from the list. */
2637 for (insn
= insns
; insn
; insn
= next
)
2642 next
= NEXT_INSN (insn
);
2644 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
2645 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
2646 set
= PATTERN (insn
);
2647 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2649 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2650 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
2652 set
= XVECEXP (PATTERN (insn
), 0, i
);
2660 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
2662 if (PREV_INSN (insn
))
2663 NEXT_INSN (PREV_INSN (insn
)) = next
;
2668 PREV_INSN (next
) = PREV_INSN (insn
);
2674 prev
= get_last_insn ();
2676 /* Now write the CLOBBER of the output, followed by the setting of each
2677 of the words, followed by the final copy. */
2678 if (target
!= op0
&& target
!= op1
)
2679 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
2681 for (insn
= insns
; insn
; insn
= next
)
2683 next
= NEXT_INSN (insn
);
2686 if (op1
&& GET_CODE (op1
) == REG
)
2687 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
2690 if (op0
&& GET_CODE (op0
) == REG
)
2691 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
2695 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2696 != CODE_FOR_nothing
)
2698 last
= emit_move_insn (target
, target
);
2700 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
2704 last
= get_last_insn ();
2706 /* Remove any existing REG_EQUAL note from "last", or else it will
2707 be mistaken for a note referring to the full contents of the
2708 alleged libcall value when found together with the REG_RETVAL
2709 note added below. An existing note can come from an insn
2710 expansion at "last". */
2711 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
2715 first
= get_insns ();
2717 first
= NEXT_INSN (prev
);
2719 /* Encapsulate the block so it gets manipulated as a unit. */
2720 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2722 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2727 /* Emit code to make a call to a constant function or a library call.
2729 INSNS is a list containing all insns emitted in the call.
2730 These insns leave the result in RESULT. Our block is to copy RESULT
2731 to TARGET, which is logically equivalent to EQUIV.
2733 We first emit any insns that set a pseudo on the assumption that these are
2734 loading constants into registers; doing so allows them to be safely cse'ed
2735 between blocks. Then we emit all the other insns in the block, followed by
2736 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2737 note with an operand of EQUIV.
2739 Moving assignments to pseudos outside of the block is done to improve
2740 the generated code, but is not required to generate correct code,
2741 hence being unable to move an assignment is not grounds for not making
2742 a libcall block. There are two reasons why it is safe to leave these
2743 insns inside the block: First, we know that these pseudos cannot be
2744 used in generated RTL outside the block since they are created for
2745 temporary purposes within the block. Second, CSE will not record the
2746 values of anything set inside a libcall block, so we know they must
2747 be dead at the end of the block.
2749 Except for the first group of insns (the ones setting pseudos), the
2750 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2753 emit_libcall_block (insns
, target
, result
, equiv
)
2759 rtx final_dest
= target
;
2760 rtx prev
, next
, first
, last
, insn
;
2762 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
2763 into a MEM later. Protect the libcall block from this change. */
2764 if (! REG_P (target
) || REG_USERVAR_P (target
))
2765 target
= gen_reg_rtx (GET_MODE (target
));
2767 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
2768 reg note to indicate that this call cannot throw or execute a nonlocal
2769 goto (unless there is already a REG_EH_REGION note, in which case
2770 we update it). Also set the CONST_CALL_P flag. */
2772 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2773 if (GET_CODE (insn
) == CALL_INSN
)
2775 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
2777 CONST_CALL_P (insn
) = 1;
2779 XEXP (note
, 0) = GEN_INT (-1);
2781 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, GEN_INT (-1),
2785 /* First emit all insns that set pseudos. Remove them from the list as
2786 we go. Avoid insns that set pseudos which were referenced in previous
2787 insns. These can be generated by move_by_pieces, for example,
2788 to update an address. Similarly, avoid insns that reference things
2789 set in previous insns. */
2791 for (insn
= insns
; insn
; insn
= next
)
2793 rtx set
= single_set (insn
);
2795 next
= NEXT_INSN (insn
);
2797 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
2798 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
2800 || ((! INSN_P(insns
)
2801 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
2802 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
2803 && ! modified_in_p (SET_SRC (set
), insns
)
2804 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
2806 if (PREV_INSN (insn
))
2807 NEXT_INSN (PREV_INSN (insn
)) = next
;
2812 PREV_INSN (next
) = PREV_INSN (insn
);
2818 prev
= get_last_insn ();
2820 /* Write the remaining insns followed by the final copy. */
2822 for (insn
= insns
; insn
; insn
= next
)
2824 next
= NEXT_INSN (insn
);
2829 last
= emit_move_insn (target
, result
);
2830 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2831 != CODE_FOR_nothing
)
2832 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
2835 /* Remove any existing REG_EQUAL note from "last", or else it will
2836 be mistaken for a note referring to the full contents of the
2837 libcall value when found together with the REG_RETVAL note added
2838 below. An existing note can come from an insn expansion at
2840 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
2843 if (final_dest
!= target
)
2844 emit_move_insn (final_dest
, target
);
2847 first
= get_insns ();
2849 first
= NEXT_INSN (prev
);
2851 /* Encapsulate the block so it gets manipulated as a unit. */
2852 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2854 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2857 /* Generate code to store zero in X. */
2863 emit_move_insn (x
, const0_rtx
);
2866 /* Generate code to store 1 in X
2867 assuming it contains zero beforehand. */
2870 emit_0_to_1_insn (x
)
2873 emit_move_insn (x
, const1_rtx
);
2876 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
2877 PURPOSE describes how this comparison will be used. CODE is the rtx
2878 comparison code we will be using.
2880 ??? Actually, CODE is slightly weaker than that. A target is still
2881 required to implement all of the normal bcc operations, but not
2882 required to implement all (or any) of the unordered bcc operations. */
2885 can_compare_p (code
, mode
, purpose
)
2887 enum machine_mode mode
;
2888 enum can_compare_purpose purpose
;
2892 if (cmp_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2894 if (purpose
== ccp_jump
)
2895 return bcc_gen_fctn
[(int)code
] != NULL
;
2896 else if (purpose
== ccp_store_flag
)
2897 return setcc_gen_code
[(int)code
] != CODE_FOR_nothing
;
2899 /* There's only one cmov entry point, and it's allowed to fail. */
2902 if (purpose
== ccp_jump
2903 && cbranch_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2905 if (purpose
== ccp_cmov
2906 && cmov_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2908 if (purpose
== ccp_store_flag
2909 && cstore_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2912 mode
= GET_MODE_WIDER_MODE (mode
);
2914 while (mode
!= VOIDmode
);
2919 /* This function is called when we are going to emit a compare instruction that
2920 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
2922 *PMODE is the mode of the inputs (in case they are const_int).
2923 *PUNSIGNEDP nonzero says that the operands are unsigned;
2924 this matters if they need to be widened.
2926 If they have mode BLKmode, then SIZE specifies the size of both operands,
2927 and ALIGN specifies the known shared alignment of the operands.
2929 This function performs all the setup necessary so that the caller only has
2930 to emit a single comparison insn. This setup can involve doing a BLKmode
2931 comparison or emitting a library call to perform the comparison if no insn
2932 is available to handle it.
2933 The values which are passed in through pointers can be modified; the caller
2934 should perform the comparison on the modified values. */
2937 prepare_cmp_insn (px
, py
, pcomparison
, size
, pmode
, punsignedp
, align
,
2940 enum rtx_code
*pcomparison
;
2942 enum machine_mode
*pmode
;
2944 int align ATTRIBUTE_UNUSED
;
2945 enum can_compare_purpose purpose
;
2947 enum machine_mode mode
= *pmode
;
2948 rtx x
= *px
, y
= *py
;
2949 int unsignedp
= *punsignedp
;
2950 enum mode_class
class;
2951 rtx opalign ATTRIBUTE_UNUSED
= GEN_INT (align
/ BITS_PER_UNIT
);;
2953 class = GET_MODE_CLASS (mode
);
2955 /* They could both be VOIDmode if both args are immediate constants,
2956 but we should fold that at an earlier stage.
2957 With no special code here, this will call abort,
2958 reminding the programmer to implement such folding. */
2960 if (mode
!= BLKmode
&& flag_force_mem
)
2962 x
= force_not_mem (x
);
2963 y
= force_not_mem (y
);
2966 /* If we are inside an appropriately-short loop and one operand is an
2967 expensive constant, force it into a register. */
2968 if (CONSTANT_P (x
) && preserve_subexpressions_p ()
2969 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
2970 x
= force_reg (mode
, x
);
2972 if (CONSTANT_P (y
) && preserve_subexpressions_p ()
2973 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
2974 y
= force_reg (mode
, y
);
2977 /* Abort if we have a non-canonical comparison. The RTL documentation
2978 states that canonical comparisons are required only for targets which
2980 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
2984 /* Don't let both operands fail to indicate the mode. */
2985 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
2986 x
= force_reg (mode
, x
);
2988 /* Handle all BLKmode compares. */
2990 if (mode
== BLKmode
)
2993 enum machine_mode result_mode
;
2996 x
= protect_from_queue (x
, 0);
2997 y
= protect_from_queue (y
, 0);
3001 #ifdef HAVE_cmpstrqi
3003 && GET_CODE (size
) == CONST_INT
3004 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
3006 result_mode
= insn_data
[(int) CODE_FOR_cmpstrqi
].operand
[0].mode
;
3007 result
= gen_reg_rtx (result_mode
);
3008 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, opalign
));
3012 #ifdef HAVE_cmpstrhi
3014 && GET_CODE (size
) == CONST_INT
3015 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
3017 result_mode
= insn_data
[(int) CODE_FOR_cmpstrhi
].operand
[0].mode
;
3018 result
= gen_reg_rtx (result_mode
);
3019 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, opalign
));
3023 #ifdef HAVE_cmpstrsi
3026 result_mode
= insn_data
[(int) CODE_FOR_cmpstrsi
].operand
[0].mode
;
3027 result
= gen_reg_rtx (result_mode
);
3028 size
= protect_from_queue (size
, 0);
3029 emit_insn (gen_cmpstrsi (result
, x
, y
,
3030 convert_to_mode (SImode
, size
, 1),
3036 #ifdef TARGET_MEM_FUNCTIONS
3037 emit_library_call (memcmp_libfunc
, LCT_PURE_MAKE_BLOCK
,
3038 TYPE_MODE (integer_type_node
), 3,
3039 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3040 convert_to_mode (TYPE_MODE (sizetype
), size
,
3041 TREE_UNSIGNED (sizetype
)),
3042 TYPE_MODE (sizetype
));
3044 emit_library_call (bcmp_libfunc
, LCT_PURE_MAKE_BLOCK
,
3045 TYPE_MODE (integer_type_node
), 3,
3046 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3047 convert_to_mode (TYPE_MODE (integer_type_node
),
3049 TREE_UNSIGNED (integer_type_node
)),
3050 TYPE_MODE (integer_type_node
));
3053 /* Immediately move the result of the libcall into a pseudo
3054 register so reload doesn't clobber the value if it needs
3055 the return register for a spill reg. */
3056 result
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
3057 result_mode
= TYPE_MODE (integer_type_node
);
3058 emit_move_insn (result
,
3059 hard_libcall_value (result_mode
));
3063 *pmode
= result_mode
;
3069 if (can_compare_p (*pcomparison
, mode
, purpose
))
3072 /* Handle a lib call just for the mode we are using. */
3074 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3076 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3079 /* If we want unsigned, and this mode has a distinct unsigned
3080 comparison routine, use that. */
3081 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3082 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3084 emit_library_call (libfunc
, 1,
3085 word_mode
, 2, x
, mode
, y
, mode
);
3087 /* Immediately move the result of the libcall into a pseudo
3088 register so reload doesn't clobber the value if it needs
3089 the return register for a spill reg. */
3090 result
= gen_reg_rtx (word_mode
);
3091 emit_move_insn (result
, hard_libcall_value (word_mode
));
3093 /* Integer comparison returns a result that must be compared against 1,
3094 so that even if we do an unsigned compare afterward,
3095 there is still a value that can represent the result "less than". */
3102 if (class == MODE_FLOAT
)
3103 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3109 /* Before emitting an insn with code ICODE, make sure that X, which is going
3110 to be used for operand OPNUM of the insn, is converted from mode MODE to
3111 WIDER_MODE (UNSIGNEDP determines whether it is a unsigned conversion), and
3112 that it is accepted by the operand predicate. Return the new value. */
3115 prepare_operand (icode
, x
, opnum
, mode
, wider_mode
, unsignedp
)
3119 enum machine_mode mode
, wider_mode
;
3122 x
= protect_from_queue (x
, 0);
3124 if (mode
!= wider_mode
)
3125 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3127 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3128 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3129 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3133 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3134 we can do the comparison.
3135 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3136 be NULL_RTX which indicates that only a comparison is to be generated. */
3139 emit_cmp_and_jump_insn_1 (x
, y
, mode
, comparison
, unsignedp
, label
)
3141 enum machine_mode mode
;
3142 enum rtx_code comparison
;
3146 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3147 enum mode_class
class = GET_MODE_CLASS (mode
);
3148 enum machine_mode wider_mode
= mode
;
3150 /* Try combined insns first. */
3153 enum insn_code icode
;
3154 PUT_MODE (test
, wider_mode
);
3158 icode
= cbranch_optab
->handlers
[(int)wider_mode
].insn_code
;
3160 if (icode
!= CODE_FOR_nothing
3161 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3163 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3164 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3165 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3170 /* Handle some compares against zero. */
3171 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3172 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3174 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3175 emit_insn (GEN_FCN (icode
) (x
));
3177 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3181 /* Handle compares for which there is a directly suitable insn. */
3183 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3184 if (icode
!= CODE_FOR_nothing
)
3186 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3187 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3188 emit_insn (GEN_FCN (icode
) (x
, y
));
3190 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3194 if (class != MODE_INT
&& class != MODE_FLOAT
3195 && class != MODE_COMPLEX_FLOAT
)
3198 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3199 } while (wider_mode
!= VOIDmode
);
3204 /* Generate code to compare X with Y so that the condition codes are
3205 set and to jump to LABEL if the condition is true. If X is a
3206 constant and Y is not a constant, then the comparison is swapped to
3207 ensure that the comparison RTL has the canonical form.
3209 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3210 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3211 the proper branch condition code.
3213 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y,
3214 and ALIGN specifies the known shared alignment of X and Y.
3216 MODE is the mode of the inputs (in case they are const_int).
3218 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3219 be passed unchanged to emit_cmp_insn, then potentially converted into an
3220 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3223 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, align
, label
)
3225 enum rtx_code comparison
;
3227 enum machine_mode mode
;
3235 if ((CONSTANT_P (x
) && ! CONSTANT_P (y
))
3236 || (GET_CODE (x
) == CONST_INT
&& GET_CODE (y
) != CONST_INT
))
3238 /* Swap operands and condition to ensure canonical RTL. */
3241 comparison
= swap_condition (comparison
);
3250 /* If OP0 is still a constant, then both X and Y must be constants. Force
3251 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3253 if (CONSTANT_P (op0
))
3254 op0
= force_reg (mode
, op0
);
3259 comparison
= unsigned_condition (comparison
);
3260 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
, align
,
3262 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3265 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3268 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
, align
)
3270 enum rtx_code comparison
;
3272 enum machine_mode mode
;
3276 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, align
, 0);
3279 /* Emit a library call comparison between floating point X and Y.
3280 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3283 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
)
3285 enum rtx_code
*pcomparison
;
3286 enum machine_mode
*pmode
;
3289 enum rtx_code comparison
= *pcomparison
;
3290 rtx x
= *px
= protect_from_queue (*px
, 0);
3291 rtx y
= *py
= protect_from_queue (*py
, 0);
3292 enum machine_mode mode
= GET_MODE (x
);
3300 libfunc
= eqhf2_libfunc
;
3304 libfunc
= nehf2_libfunc
;
3308 libfunc
= gthf2_libfunc
;
3312 libfunc
= gehf2_libfunc
;
3316 libfunc
= lthf2_libfunc
;
3320 libfunc
= lehf2_libfunc
;
3324 libfunc
= unordhf2_libfunc
;
3330 else if (mode
== SFmode
)
3334 libfunc
= eqsf2_libfunc
;
3338 libfunc
= nesf2_libfunc
;
3342 libfunc
= gtsf2_libfunc
;
3346 libfunc
= gesf2_libfunc
;
3350 libfunc
= ltsf2_libfunc
;
3354 libfunc
= lesf2_libfunc
;
3358 libfunc
= unordsf2_libfunc
;
3364 else if (mode
== DFmode
)
3368 libfunc
= eqdf2_libfunc
;
3372 libfunc
= nedf2_libfunc
;
3376 libfunc
= gtdf2_libfunc
;
3380 libfunc
= gedf2_libfunc
;
3384 libfunc
= ltdf2_libfunc
;
3388 libfunc
= ledf2_libfunc
;
3392 libfunc
= unorddf2_libfunc
;
3398 else if (mode
== XFmode
)
3402 libfunc
= eqxf2_libfunc
;
3406 libfunc
= nexf2_libfunc
;
3410 libfunc
= gtxf2_libfunc
;
3414 libfunc
= gexf2_libfunc
;
3418 libfunc
= ltxf2_libfunc
;
3422 libfunc
= lexf2_libfunc
;
3426 libfunc
= unordxf2_libfunc
;
3432 else if (mode
== TFmode
)
3436 libfunc
= eqtf2_libfunc
;
3440 libfunc
= netf2_libfunc
;
3444 libfunc
= gttf2_libfunc
;
3448 libfunc
= getf2_libfunc
;
3452 libfunc
= lttf2_libfunc
;
3456 libfunc
= letf2_libfunc
;
3460 libfunc
= unordtf2_libfunc
;
3468 enum machine_mode wider_mode
;
3470 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3471 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3473 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
3474 != CODE_FOR_nothing
)
3475 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
3477 x
= protect_from_queue (x
, 0);
3478 y
= protect_from_queue (y
, 0);
3479 *px
= convert_to_mode (wider_mode
, x
, 0);
3480 *py
= convert_to_mode (wider_mode
, y
, 0);
3481 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3491 emit_library_call (libfunc
, LCT_CONST_MAKE_BLOCK
, word_mode
, 2, x
, mode
, y
,
3494 /* Immediately move the result of the libcall into a pseudo
3495 register so reload doesn't clobber the value if it needs
3496 the return register for a spill reg. */
3497 result
= gen_reg_rtx (word_mode
);
3498 emit_move_insn (result
, hard_libcall_value (word_mode
));
3502 if (comparison
== UNORDERED
)
3504 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
3505 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
3511 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3514 emit_indirect_jump (loc
)
3517 if (! ((*insn_data
[(int)CODE_FOR_indirect_jump
].operand
[0].predicate
)
3519 loc
= copy_to_mode_reg (Pmode
, loc
);
3521 emit_jump_insn (gen_indirect_jump (loc
));
3525 #ifdef HAVE_conditional_move
3527 /* Emit a conditional move instruction if the machine supports one for that
3528 condition and machine mode.
3530 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3531 the mode to use should they be constants. If it is VOIDmode, they cannot
3534 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3535 should be stored there. MODE is the mode to use should they be constants.
3536 If it is VOIDmode, they cannot both be constants.
3538 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3539 is not supported. */
3542 emit_conditional_move (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
3547 enum machine_mode cmode
;
3549 enum machine_mode mode
;
3552 rtx tem
, subtarget
, comparison
, insn
;
3553 enum insn_code icode
;
3555 /* If one operand is constant, make it the second one. Only do this
3556 if the other operand is not constant as well. */
3558 if ((CONSTANT_P (op0
) && ! CONSTANT_P (op1
))
3559 || (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) != CONST_INT
))
3564 code
= swap_condition (code
);
3567 /* get_condition will prefer to generate LT and GT even if the old
3568 comparison was against zero, so undo that canonicalization here since
3569 comparisons against zero are cheaper. */
3570 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
3571 code
= LE
, op1
= const0_rtx
;
3572 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
3573 code
= GE
, op1
= const0_rtx
;
3575 if (cmode
== VOIDmode
)
3576 cmode
= GET_MODE (op0
);
3578 if (((CONSTANT_P (op2
) && ! CONSTANT_P (op3
))
3579 || (GET_CODE (op2
) == CONST_INT
&& GET_CODE (op3
) != CONST_INT
))
3580 && (GET_MODE_CLASS (GET_MODE (op1
)) != MODE_FLOAT
3581 || TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
|| flag_fast_math
))
3586 code
= reverse_condition (code
);
3589 if (mode
== VOIDmode
)
3590 mode
= GET_MODE (op2
);
3592 icode
= movcc_gen_code
[mode
];
3594 if (icode
== CODE_FOR_nothing
)
3599 op2
= force_not_mem (op2
);
3600 op3
= force_not_mem (op3
);
3604 target
= protect_from_queue (target
, 1);
3606 target
= gen_reg_rtx (mode
);
3612 op2
= protect_from_queue (op2
, 0);
3613 op3
= protect_from_queue (op3
, 0);
3615 /* If the insn doesn't accept these operands, put them in pseudos. */
3617 if (! (*insn_data
[icode
].operand
[0].predicate
)
3618 (subtarget
, insn_data
[icode
].operand
[0].mode
))
3619 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
3621 if (! (*insn_data
[icode
].operand
[2].predicate
)
3622 (op2
, insn_data
[icode
].operand
[2].mode
))
3623 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
3625 if (! (*insn_data
[icode
].operand
[3].predicate
)
3626 (op3
, insn_data
[icode
].operand
[3].mode
))
3627 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
3629 /* Everything should now be in the suitable form, so emit the compare insn
3630 and then the conditional move. */
3633 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
, 0);
3635 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3636 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
3637 return NULL and let the caller figure out how best to deal with this
3639 if (GET_CODE (comparison
) != code
)
3642 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
3644 /* If that failed, then give up. */
3650 if (subtarget
!= target
)
3651 convert_move (target
, subtarget
, 0);
3656 /* Return non-zero if a conditional move of mode MODE is supported.
3658 This function is for combine so it can tell whether an insn that looks
3659 like a conditional move is actually supported by the hardware. If we
3660 guess wrong we lose a bit on optimization, but that's it. */
3661 /* ??? sparc64 supports conditionally moving integers values based on fp
3662 comparisons, and vice versa. How do we handle them? */
3665 can_conditionally_move_p (mode
)
3666 enum machine_mode mode
;
3668 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
3674 #endif /* HAVE_conditional_move */
3676 /* These three functions generate an insn body and return it
3677 rather than emitting the insn.
3679 They do not protect from queued increments,
3680 because they may be used 1) in protect_from_queue itself
3681 and 2) in other passes where there is no queue. */
3683 /* Generate and return an insn body to add Y to X. */
3686 gen_add2_insn (x
, y
)
3689 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3691 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3692 (x
, insn_data
[icode
].operand
[0].mode
))
3693 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3694 (x
, insn_data
[icode
].operand
[1].mode
))
3695 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3696 (y
, insn_data
[icode
].operand
[2].mode
)))
3699 return (GEN_FCN (icode
) (x
, x
, y
));
3703 have_add2_insn (mode
)
3704 enum machine_mode mode
;
3706 return add_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3709 /* Generate and return an insn body to subtract Y from X. */
3712 gen_sub2_insn (x
, y
)
3715 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3717 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3718 (x
, insn_data
[icode
].operand
[0].mode
))
3719 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3720 (x
, insn_data
[icode
].operand
[1].mode
))
3721 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3722 (y
, insn_data
[icode
].operand
[2].mode
)))
3725 return (GEN_FCN (icode
) (x
, x
, y
));
3729 have_sub2_insn (mode
)
3730 enum machine_mode mode
;
3732 return sub_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3735 /* Generate the body of an instruction to copy Y into X.
3736 It may be a SEQUENCE, if one insn isn't enough. */
3739 gen_move_insn (x
, y
)
3742 register enum machine_mode mode
= GET_MODE (x
);
3743 enum insn_code insn_code
;
3746 if (mode
== VOIDmode
)
3747 mode
= GET_MODE (y
);
3749 insn_code
= mov_optab
->handlers
[(int) mode
].insn_code
;
3751 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3752 find a mode to do it in. If we have a movcc, use it. Otherwise,
3753 find the MODE_INT mode of the same width. */
3755 if (GET_MODE_CLASS (mode
) == MODE_CC
&& insn_code
== CODE_FOR_nothing
)
3757 enum machine_mode tmode
= VOIDmode
;
3761 && mov_optab
->handlers
[(int) CCmode
].insn_code
!= CODE_FOR_nothing
)
3764 for (tmode
= QImode
; tmode
!= VOIDmode
;
3765 tmode
= GET_MODE_WIDER_MODE (tmode
))
3766 if (GET_MODE_SIZE (tmode
) == GET_MODE_SIZE (mode
))
3769 if (tmode
== VOIDmode
)
3772 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3773 may call change_address which is not appropriate if we were
3774 called when a reload was in progress. We don't have to worry
3775 about changing the address since the size in bytes is supposed to
3776 be the same. Copy the MEM to change the mode and move any
3777 substitutions from the old MEM to the new one. */
3779 if (reload_in_progress
)
3781 x
= gen_lowpart_common (tmode
, x1
);
3782 if (x
== 0 && GET_CODE (x1
) == MEM
)
3784 x
= gen_rtx_MEM (tmode
, XEXP (x1
, 0));
3785 MEM_COPY_ATTRIBUTES (x
, x1
);
3786 copy_replacements (x1
, x
);
3789 y
= gen_lowpart_common (tmode
, y1
);
3790 if (y
== 0 && GET_CODE (y1
) == MEM
)
3792 y
= gen_rtx_MEM (tmode
, XEXP (y1
, 0));
3793 MEM_COPY_ATTRIBUTES (y
, y1
);
3794 copy_replacements (y1
, y
);
3799 x
= gen_lowpart (tmode
, x
);
3800 y
= gen_lowpart (tmode
, y
);
3803 insn_code
= mov_optab
->handlers
[(int) tmode
].insn_code
;
3804 return (GEN_FCN (insn_code
) (x
, y
));
3808 emit_move_insn_1 (x
, y
);
3809 seq
= gen_sequence ();
3814 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3815 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3816 no such operation exists, CODE_FOR_nothing will be returned. */
3819 can_extend_p (to_mode
, from_mode
, unsignedp
)
3820 enum machine_mode to_mode
, from_mode
;
3823 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
!= 0];
3826 /* Generate the body of an insn to extend Y (with mode MFROM)
3827 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3830 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
3832 enum machine_mode mto
, mfrom
;
3835 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
!= 0]) (x
, y
));
3838 /* can_fix_p and can_float_p say whether the target machine
3839 can directly convert a given fixed point type to
3840 a given floating point type, or vice versa.
3841 The returned value is the CODE_FOR_... value to use,
3842 or CODE_FOR_nothing if these modes cannot be directly converted.
3844 *TRUNCP_PTR is set to 1 if it is necessary to output
3845 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3847 static enum insn_code
3848 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
3849 enum machine_mode fltmode
, fixmode
;
3854 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0]
3855 != CODE_FOR_nothing
)
3856 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
3858 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
3861 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
3863 return CODE_FOR_nothing
;
3866 static enum insn_code
3867 can_float_p (fltmode
, fixmode
, unsignedp
)
3868 enum machine_mode fixmode
, fltmode
;
3871 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
3874 /* Generate code to convert FROM to floating point
3875 and store in TO. FROM must be fixed point and not VOIDmode.
3876 UNSIGNEDP nonzero means regard FROM as unsigned.
3877 Normally this is done by correcting the final value
3878 if it is negative. */
3881 expand_float (to
, from
, unsignedp
)
3885 enum insn_code icode
;
3886 register rtx target
= to
;
3887 enum machine_mode fmode
, imode
;
3889 /* Crash now, because we won't be able to decide which mode to use. */
3890 if (GET_MODE (from
) == VOIDmode
)
3893 /* Look for an insn to do the conversion. Do it in the specified
3894 modes if possible; otherwise convert either input, output or both to
3895 wider mode. If the integer mode is wider than the mode of FROM,
3896 we can do the conversion signed even if the input is unsigned. */
3898 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
3899 imode
= GET_MODE_WIDER_MODE (imode
))
3900 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3901 fmode
= GET_MODE_WIDER_MODE (fmode
))
3903 int doing_unsigned
= unsignedp
;
3905 if (fmode
!= GET_MODE (to
)
3906 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
3909 icode
= can_float_p (fmode
, imode
, unsignedp
);
3910 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
3911 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
3913 if (icode
!= CODE_FOR_nothing
)
3915 to
= protect_from_queue (to
, 1);
3916 from
= protect_from_queue (from
, 0);
3918 if (imode
!= GET_MODE (from
))
3919 from
= convert_to_mode (imode
, from
, unsignedp
);
3921 if (fmode
!= GET_MODE (to
))
3922 target
= gen_reg_rtx (fmode
);
3924 emit_unop_insn (icode
, target
, from
,
3925 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
3928 convert_move (to
, target
, 0);
3933 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3935 /* Unsigned integer, and no way to convert directly.
3936 Convert as signed, then conditionally adjust the result. */
3939 rtx label
= gen_label_rtx ();
3941 REAL_VALUE_TYPE offset
;
3945 to
= protect_from_queue (to
, 1);
3946 from
= protect_from_queue (from
, 0);
3949 from
= force_not_mem (from
);
3951 /* Look for a usable floating mode FMODE wider than the source and at
3952 least as wide as the target. Using FMODE will avoid rounding woes
3953 with unsigned values greater than the signed maximum value. */
3955 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3956 fmode
= GET_MODE_WIDER_MODE (fmode
))
3957 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
3958 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
3961 if (fmode
== VOIDmode
)
3963 /* There is no such mode. Pretend the target is wide enough. */
3964 fmode
= GET_MODE (to
);
3966 /* Avoid double-rounding when TO is narrower than FROM. */
3967 if ((significand_size (fmode
) + 1)
3968 < GET_MODE_BITSIZE (GET_MODE (from
)))
3971 rtx neglabel
= gen_label_rtx ();
3973 /* Don't use TARGET if it isn't a register, is a hard register,
3974 or is the wrong mode. */
3975 if (GET_CODE (target
) != REG
3976 || REGNO (target
) < FIRST_PSEUDO_REGISTER
3977 || GET_MODE (target
) != fmode
)
3978 target
= gen_reg_rtx (fmode
);
3980 imode
= GET_MODE (from
);
3981 do_pending_stack_adjust ();
3983 /* Test whether the sign bit is set. */
3984 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
3987 /* The sign bit is not set. Convert as signed. */
3988 expand_float (target
, from
, 0);
3989 emit_jump_insn (gen_jump (label
));
3992 /* The sign bit is set.
3993 Convert to a usable (positive signed) value by shifting right
3994 one bit, while remembering if a nonzero bit was shifted
3995 out; i.e., compute (from & 1) | (from >> 1). */
3997 emit_label (neglabel
);
3998 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
3999 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4000 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
4002 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4004 expand_float (target
, temp
, 0);
4006 /* Multiply by 2 to undo the shift above. */
4007 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4008 target
, 0, OPTAB_LIB_WIDEN
);
4010 emit_move_insn (target
, temp
);
4012 do_pending_stack_adjust ();
4018 /* If we are about to do some arithmetic to correct for an
4019 unsigned operand, do it in a pseudo-register. */
4021 if (GET_MODE (to
) != fmode
4022 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4023 target
= gen_reg_rtx (fmode
);
4025 /* Convert as signed integer to floating. */
4026 expand_float (target
, from
, 0);
4028 /* If FROM is negative (and therefore TO is negative),
4029 correct its value by 2**bitwidth. */
4031 do_pending_stack_adjust ();
4032 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4035 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
4036 Rather than setting up a dconst_dot_5, let's hope SCO
4038 offset
= REAL_VALUE_LDEXP (dconst1
, GET_MODE_BITSIZE (GET_MODE (from
)));
4039 temp
= expand_binop (fmode
, add_optab
, target
,
4040 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4041 target
, 0, OPTAB_LIB_WIDEN
);
4043 emit_move_insn (target
, temp
);
4045 do_pending_stack_adjust ();
4051 /* No hardware instruction available; call a library routine to convert from
4052 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4058 to
= protect_from_queue (to
, 1);
4059 from
= protect_from_queue (from
, 0);
4061 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4062 from
= convert_to_mode (SImode
, from
, unsignedp
);
4065 from
= force_not_mem (from
);
4067 if (GET_MODE (to
) == SFmode
)
4069 if (GET_MODE (from
) == SImode
)
4070 libfcn
= floatsisf_libfunc
;
4071 else if (GET_MODE (from
) == DImode
)
4072 libfcn
= floatdisf_libfunc
;
4073 else if (GET_MODE (from
) == TImode
)
4074 libfcn
= floattisf_libfunc
;
4078 else if (GET_MODE (to
) == DFmode
)
4080 if (GET_MODE (from
) == SImode
)
4081 libfcn
= floatsidf_libfunc
;
4082 else if (GET_MODE (from
) == DImode
)
4083 libfcn
= floatdidf_libfunc
;
4084 else if (GET_MODE (from
) == TImode
)
4085 libfcn
= floattidf_libfunc
;
4089 else if (GET_MODE (to
) == XFmode
)
4091 if (GET_MODE (from
) == SImode
)
4092 libfcn
= floatsixf_libfunc
;
4093 else if (GET_MODE (from
) == DImode
)
4094 libfcn
= floatdixf_libfunc
;
4095 else if (GET_MODE (from
) == TImode
)
4096 libfcn
= floattixf_libfunc
;
4100 else if (GET_MODE (to
) == TFmode
)
4102 if (GET_MODE (from
) == SImode
)
4103 libfcn
= floatsitf_libfunc
;
4104 else if (GET_MODE (from
) == DImode
)
4105 libfcn
= floatditf_libfunc
;
4106 else if (GET_MODE (from
) == TImode
)
4107 libfcn
= floattitf_libfunc
;
4116 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
4117 GET_MODE (to
), 1, from
,
4119 insns
= get_insns ();
4122 emit_libcall_block (insns
, target
, value
,
4123 gen_rtx_FLOAT (GET_MODE (to
), from
));
4128 /* Copy result to requested destination
4129 if we have been computing in a temp location. */
4133 if (GET_MODE (target
) == GET_MODE (to
))
4134 emit_move_insn (to
, target
);
4136 convert_move (to
, target
, 0);
4140 /* expand_fix: generate code to convert FROM to fixed point
4141 and store in TO. FROM must be floating point. */
4147 rtx temp
= gen_reg_rtx (GET_MODE (x
));
4148 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
4152 expand_fix (to
, from
, unsignedp
)
4153 register rtx to
, from
;
4156 enum insn_code icode
;
4157 register rtx target
= to
;
4158 enum machine_mode fmode
, imode
;
4162 /* We first try to find a pair of modes, one real and one integer, at
4163 least as wide as FROM and TO, respectively, in which we can open-code
4164 this conversion. If the integer mode is wider than the mode of TO,
4165 we can do the conversion either signed or unsigned. */
4167 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4168 imode
= GET_MODE_WIDER_MODE (imode
))
4169 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4170 fmode
= GET_MODE_WIDER_MODE (fmode
))
4172 int doing_unsigned
= unsignedp
;
4174 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4175 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4176 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4178 if (icode
!= CODE_FOR_nothing
)
4180 to
= protect_from_queue (to
, 1);
4181 from
= protect_from_queue (from
, 0);
4183 if (fmode
!= GET_MODE (from
))
4184 from
= convert_to_mode (fmode
, from
, 0);
4187 from
= ftruncify (from
);
4189 if (imode
!= GET_MODE (to
))
4190 target
= gen_reg_rtx (imode
);
4192 emit_unop_insn (icode
, target
, from
,
4193 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4195 convert_move (to
, target
, unsignedp
);
4200 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4201 /* For an unsigned conversion, there is one more way to do it.
4202 If we have a signed conversion, we generate code that compares
4203 the real value to the largest representable positive number. If if
4204 is smaller, the conversion is done normally. Otherwise, subtract
4205 one plus the highest signed number, convert, and add it back.
4207 We only need to check all real modes, since we know we didn't find
4208 anything with a wider integer mode. */
4210 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4211 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4212 fmode
= GET_MODE_WIDER_MODE (fmode
))
4213 /* Make sure we won't lose significant bits doing this. */
4214 if (GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))
4215 && CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4219 REAL_VALUE_TYPE offset
;
4220 rtx limit
, lab1
, lab2
, insn
;
4222 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4223 offset
= REAL_VALUE_LDEXP (dconst1
, bitsize
- 1);
4224 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4225 lab1
= gen_label_rtx ();
4226 lab2
= gen_label_rtx ();
4229 to
= protect_from_queue (to
, 1);
4230 from
= protect_from_queue (from
, 0);
4233 from
= force_not_mem (from
);
4235 if (fmode
!= GET_MODE (from
))
4236 from
= convert_to_mode (fmode
, from
, 0);
4238 /* See if we need to do the subtraction. */
4239 do_pending_stack_adjust ();
4240 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
4243 /* If not, do the signed "fix" and branch around fixup code. */
4244 expand_fix (to
, from
, 0);
4245 emit_jump_insn (gen_jump (lab2
));
4248 /* Otherwise, subtract 2**(N-1), convert to signed number,
4249 then add 2**(N-1). Do the addition using XOR since this
4250 will often generate better code. */
4252 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
4253 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4254 expand_fix (to
, target
, 0);
4255 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
4256 GEN_INT ((HOST_WIDE_INT
) 1 << (bitsize
- 1)),
4257 to
, 1, OPTAB_LIB_WIDEN
);
4260 emit_move_insn (to
, target
);
4264 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
4265 != CODE_FOR_nothing
)
4267 /* Make a place for a REG_NOTE and add it. */
4268 insn
= emit_move_insn (to
, to
);
4269 set_unique_reg_note (insn
,
4271 gen_rtx_fmt_e (UNSIGNED_FIX
,
4280 /* We can't do it with an insn, so use a library call. But first ensure
4281 that the mode of TO is at least as wide as SImode, since those are the
4282 only library calls we know about. */
4284 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
4286 target
= gen_reg_rtx (SImode
);
4288 expand_fix (target
, from
, unsignedp
);
4290 else if (GET_MODE (from
) == SFmode
)
4292 if (GET_MODE (to
) == SImode
)
4293 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
4294 else if (GET_MODE (to
) == DImode
)
4295 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
4296 else if (GET_MODE (to
) == TImode
)
4297 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
4301 else if (GET_MODE (from
) == DFmode
)
4303 if (GET_MODE (to
) == SImode
)
4304 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
4305 else if (GET_MODE (to
) == DImode
)
4306 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
4307 else if (GET_MODE (to
) == TImode
)
4308 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
4312 else if (GET_MODE (from
) == XFmode
)
4314 if (GET_MODE (to
) == SImode
)
4315 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
4316 else if (GET_MODE (to
) == DImode
)
4317 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
4318 else if (GET_MODE (to
) == TImode
)
4319 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
4323 else if (GET_MODE (from
) == TFmode
)
4325 if (GET_MODE (to
) == SImode
)
4326 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
4327 else if (GET_MODE (to
) == DImode
)
4328 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
4329 else if (GET_MODE (to
) == TImode
)
4330 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
4342 to
= protect_from_queue (to
, 1);
4343 from
= protect_from_queue (from
, 0);
4346 from
= force_not_mem (from
);
4350 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
4351 GET_MODE (to
), 1, from
,
4353 insns
= get_insns ();
4356 emit_libcall_block (insns
, target
, value
,
4357 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
4358 GET_MODE (to
), from
));
4363 if (GET_MODE (to
) == GET_MODE (target
))
4364 emit_move_insn (to
, target
);
4366 convert_move (to
, target
, 0);
4375 optab op
= (optab
) xmalloc (sizeof (struct optab
));
4377 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4379 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
4380 op
->handlers
[i
].libfunc
= 0;
4383 if (code
!= UNKNOWN
)
4384 code_to_optab
[(int) code
] = op
;
4389 /* Initialize the libfunc fields of an entire group of entries in some
4390 optab. Each entry is set equal to a string consisting of a leading
4391 pair of underscores followed by a generic operation name followed by
4392 a mode name (downshifted to lower case) followed by a single character
4393 representing the number of operands for the given operation (which is
4394 usually one of the characters '2', '3', or '4').
4396 OPTABLE is the table in which libfunc fields are to be initialized.
4397 FIRST_MODE is the first machine mode index in the given optab to
4399 LAST_MODE is the last machine mode index in the given optab to
4401 OPNAME is the generic (string) name of the operation.
4402 SUFFIX is the character which specifies the number of operands for
4403 the given generic operation.
4407 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
4408 register optab optable
;
4409 register int first_mode
;
4410 register int last_mode
;
4411 register const char *opname
;
4412 register int suffix
;
4415 register unsigned opname_len
= strlen (opname
);
4417 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
4418 mode
= (enum machine_mode
) ((int) mode
+ 1))
4420 register const char *mname
= GET_MODE_NAME(mode
);
4421 register unsigned mname_len
= strlen (mname
);
4422 register char *libfunc_name
4423 = ggc_alloc_string (NULL
, 2 + opname_len
+ mname_len
+ 1 + 1);
4425 register const char *q
;
4430 for (q
= opname
; *q
; )
4432 for (q
= mname
; *q
; q
++)
4433 *p
++ = TOLOWER (*q
);
4437 optable
->handlers
[(int) mode
].libfunc
4438 = gen_rtx_SYMBOL_REF (Pmode
, libfunc_name
);
4442 /* Initialize the libfunc fields of an entire group of entries in some
4443 optab which correspond to all integer mode operations. The parameters
4444 have the same meaning as similarly named ones for the `init_libfuncs'
4445 routine. (See above). */
4448 init_integral_libfuncs (optable
, opname
, suffix
)
4449 register optab optable
;
4450 register const char *opname
;
4451 register int suffix
;
4453 init_libfuncs (optable
, SImode
, TImode
, opname
, suffix
);
4456 /* Initialize the libfunc fields of an entire group of entries in some
4457 optab which correspond to all real mode operations. The parameters
4458 have the same meaning as similarly named ones for the `init_libfuncs'
4459 routine. (See above). */
4462 init_floating_libfuncs (optable
, opname
, suffix
)
4463 register optab optable
;
4464 register const char *opname
;
4465 register int suffix
;
4467 init_libfuncs (optable
, SFmode
, TFmode
, opname
, suffix
);
4471 init_one_libfunc (name
)
4472 register const char *name
;
4475 name
= ggc_alloc_string (name
, -1);
4477 return gen_rtx_SYMBOL_REF (Pmode
, name
);
4480 /* Mark ARG (which is really an OPTAB *) for GC. */
4486 optab o
= *(optab
*) arg
;
4489 for (i
= 0; i
< NUM_MACHINE_MODES
; ++i
)
4490 ggc_mark_rtx (o
->handlers
[i
].libfunc
);
4493 /* Call this once to initialize the contents of the optabs
4494 appropriately for the current target machine. */
4499 unsigned int i
, j
, k
;
4501 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4503 for (i
= 0; i
< ARRAY_SIZE (fixtab
); i
++)
4504 for (j
= 0; j
< ARRAY_SIZE (fixtab
[0]); j
++)
4505 for (k
= 0; k
< ARRAY_SIZE (fixtab
[0][0]); k
++)
4506 fixtab
[i
][j
][k
] = CODE_FOR_nothing
;
4508 for (i
= 0; i
< ARRAY_SIZE (fixtrunctab
); i
++)
4509 for (j
= 0; j
< ARRAY_SIZE (fixtrunctab
[0]); j
++)
4510 for (k
= 0; k
< ARRAY_SIZE (fixtrunctab
[0][0]); k
++)
4511 fixtrunctab
[i
][j
][k
] = CODE_FOR_nothing
;
4513 for (i
= 0; i
< ARRAY_SIZE (floattab
); i
++)
4514 for (j
= 0; j
< ARRAY_SIZE (floattab
[0]); j
++)
4515 for (k
= 0; k
< ARRAY_SIZE (floattab
[0][0]); k
++)
4516 floattab
[i
][j
][k
] = CODE_FOR_nothing
;
4518 for (i
= 0; i
< ARRAY_SIZE (extendtab
); i
++)
4519 for (j
= 0; j
< ARRAY_SIZE (extendtab
[0]); j
++)
4520 for (k
= 0; k
< ARRAY_SIZE (extendtab
[0][0]); k
++)
4521 extendtab
[i
][j
][k
] = CODE_FOR_nothing
;
4523 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
4524 setcc_gen_code
[i
] = CODE_FOR_nothing
;
4526 #ifdef HAVE_conditional_move
4527 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4528 movcc_gen_code
[i
] = CODE_FOR_nothing
;
4531 add_optab
= init_optab (PLUS
);
4532 sub_optab
= init_optab (MINUS
);
4533 smul_optab
= init_optab (MULT
);
4534 smul_highpart_optab
= init_optab (UNKNOWN
);
4535 umul_highpart_optab
= init_optab (UNKNOWN
);
4536 smul_widen_optab
= init_optab (UNKNOWN
);
4537 umul_widen_optab
= init_optab (UNKNOWN
);
4538 sdiv_optab
= init_optab (DIV
);
4539 sdivmod_optab
= init_optab (UNKNOWN
);
4540 udiv_optab
= init_optab (UDIV
);
4541 udivmod_optab
= init_optab (UNKNOWN
);
4542 smod_optab
= init_optab (MOD
);
4543 umod_optab
= init_optab (UMOD
);
4544 flodiv_optab
= init_optab (DIV
);
4545 ftrunc_optab
= init_optab (UNKNOWN
);
4546 and_optab
= init_optab (AND
);
4547 ior_optab
= init_optab (IOR
);
4548 xor_optab
= init_optab (XOR
);
4549 ashl_optab
= init_optab (ASHIFT
);
4550 ashr_optab
= init_optab (ASHIFTRT
);
4551 lshr_optab
= init_optab (LSHIFTRT
);
4552 rotl_optab
= init_optab (ROTATE
);
4553 rotr_optab
= init_optab (ROTATERT
);
4554 smin_optab
= init_optab (SMIN
);
4555 smax_optab
= init_optab (SMAX
);
4556 umin_optab
= init_optab (UMIN
);
4557 umax_optab
= init_optab (UMAX
);
4558 mov_optab
= init_optab (UNKNOWN
);
4559 movstrict_optab
= init_optab (UNKNOWN
);
4560 cmp_optab
= init_optab (UNKNOWN
);
4561 ucmp_optab
= init_optab (UNKNOWN
);
4562 tst_optab
= init_optab (UNKNOWN
);
4563 neg_optab
= init_optab (NEG
);
4564 abs_optab
= init_optab (ABS
);
4565 one_cmpl_optab
= init_optab (NOT
);
4566 ffs_optab
= init_optab (FFS
);
4567 sqrt_optab
= init_optab (SQRT
);
4568 sin_optab
= init_optab (UNKNOWN
);
4569 cos_optab
= init_optab (UNKNOWN
);
4570 strlen_optab
= init_optab (UNKNOWN
);
4571 cbranch_optab
= init_optab (UNKNOWN
);
4572 cmov_optab
= init_optab (UNKNOWN
);
4573 cstore_optab
= init_optab (UNKNOWN
);
4575 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4577 movstr_optab
[i
] = CODE_FOR_nothing
;
4578 clrstr_optab
[i
] = CODE_FOR_nothing
;
4580 #ifdef HAVE_SECONDARY_RELOADS
4581 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
4585 /* Fill in the optabs with the insns we support. */
4588 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4589 /* This flag says the same insns that convert to a signed fixnum
4590 also convert validly to an unsigned one. */
4591 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4592 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
4593 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
4596 /* Initialize the optabs with the names of the library functions. */
4597 init_integral_libfuncs (add_optab
, "add", '3');
4598 init_floating_libfuncs (add_optab
, "add", '3');
4599 init_integral_libfuncs (sub_optab
, "sub", '3');
4600 init_floating_libfuncs (sub_optab
, "sub", '3');
4601 init_integral_libfuncs (smul_optab
, "mul", '3');
4602 init_floating_libfuncs (smul_optab
, "mul", '3');
4603 init_integral_libfuncs (sdiv_optab
, "div", '3');
4604 init_integral_libfuncs (udiv_optab
, "udiv", '3');
4605 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
4606 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
4607 init_integral_libfuncs (smod_optab
, "mod", '3');
4608 init_integral_libfuncs (umod_optab
, "umod", '3');
4609 init_floating_libfuncs (flodiv_optab
, "div", '3');
4610 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
4611 init_integral_libfuncs (and_optab
, "and", '3');
4612 init_integral_libfuncs (ior_optab
, "ior", '3');
4613 init_integral_libfuncs (xor_optab
, "xor", '3');
4614 init_integral_libfuncs (ashl_optab
, "ashl", '3');
4615 init_integral_libfuncs (ashr_optab
, "ashr", '3');
4616 init_integral_libfuncs (lshr_optab
, "lshr", '3');
4617 init_integral_libfuncs (smin_optab
, "min", '3');
4618 init_floating_libfuncs (smin_optab
, "min", '3');
4619 init_integral_libfuncs (smax_optab
, "max", '3');
4620 init_floating_libfuncs (smax_optab
, "max", '3');
4621 init_integral_libfuncs (umin_optab
, "umin", '3');
4622 init_integral_libfuncs (umax_optab
, "umax", '3');
4623 init_integral_libfuncs (neg_optab
, "neg", '2');
4624 init_floating_libfuncs (neg_optab
, "neg", '2');
4625 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
4626 init_integral_libfuncs (ffs_optab
, "ffs", '2');
4628 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4629 init_integral_libfuncs (cmp_optab
, "cmp", '2');
4630 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
4631 init_floating_libfuncs (cmp_optab
, "cmp", '2');
4633 #ifdef MULSI3_LIBCALL
4634 smul_optab
->handlers
[(int) SImode
].libfunc
4635 = init_one_libfunc (MULSI3_LIBCALL
);
4637 #ifdef MULDI3_LIBCALL
4638 smul_optab
->handlers
[(int) DImode
].libfunc
4639 = init_one_libfunc (MULDI3_LIBCALL
);
4642 #ifdef DIVSI3_LIBCALL
4643 sdiv_optab
->handlers
[(int) SImode
].libfunc
4644 = init_one_libfunc (DIVSI3_LIBCALL
);
4646 #ifdef DIVDI3_LIBCALL
4647 sdiv_optab
->handlers
[(int) DImode
].libfunc
4648 = init_one_libfunc (DIVDI3_LIBCALL
);
4651 #ifdef UDIVSI3_LIBCALL
4652 udiv_optab
->handlers
[(int) SImode
].libfunc
4653 = init_one_libfunc (UDIVSI3_LIBCALL
);
4655 #ifdef UDIVDI3_LIBCALL
4656 udiv_optab
->handlers
[(int) DImode
].libfunc
4657 = init_one_libfunc (UDIVDI3_LIBCALL
);
4660 #ifdef MODSI3_LIBCALL
4661 smod_optab
->handlers
[(int) SImode
].libfunc
4662 = init_one_libfunc (MODSI3_LIBCALL
);
4664 #ifdef MODDI3_LIBCALL
4665 smod_optab
->handlers
[(int) DImode
].libfunc
4666 = init_one_libfunc (MODDI3_LIBCALL
);
4669 #ifdef UMODSI3_LIBCALL
4670 umod_optab
->handlers
[(int) SImode
].libfunc
4671 = init_one_libfunc (UMODSI3_LIBCALL
);
4673 #ifdef UMODDI3_LIBCALL
4674 umod_optab
->handlers
[(int) DImode
].libfunc
4675 = init_one_libfunc (UMODDI3_LIBCALL
);
4678 /* Use cabs for DC complex abs, since systems generally have cabs.
4679 Don't define any libcall for SCmode, so that cabs will be used. */
4680 abs_optab
->handlers
[(int) DCmode
].libfunc
4681 = init_one_libfunc ("cabs");
4683 /* The ffs function operates on `int'. */
4684 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
4685 = init_one_libfunc ("ffs");
4687 extendsfdf2_libfunc
= init_one_libfunc ("__extendsfdf2");
4688 extendsfxf2_libfunc
= init_one_libfunc ("__extendsfxf2");
4689 extendsftf2_libfunc
= init_one_libfunc ("__extendsftf2");
4690 extenddfxf2_libfunc
= init_one_libfunc ("__extenddfxf2");
4691 extenddftf2_libfunc
= init_one_libfunc ("__extenddftf2");
4693 truncdfsf2_libfunc
= init_one_libfunc ("__truncdfsf2");
4694 truncxfsf2_libfunc
= init_one_libfunc ("__truncxfsf2");
4695 trunctfsf2_libfunc
= init_one_libfunc ("__trunctfsf2");
4696 truncxfdf2_libfunc
= init_one_libfunc ("__truncxfdf2");
4697 trunctfdf2_libfunc
= init_one_libfunc ("__trunctfdf2");
4699 memcpy_libfunc
= init_one_libfunc ("memcpy");
4700 bcopy_libfunc
= init_one_libfunc ("bcopy");
4701 memcmp_libfunc
= init_one_libfunc ("memcmp");
4702 bcmp_libfunc
= init_one_libfunc ("__gcc_bcmp");
4703 memset_libfunc
= init_one_libfunc ("memset");
4704 bzero_libfunc
= init_one_libfunc ("bzero");
4706 throw_libfunc
= init_one_libfunc ("__throw");
4707 rethrow_libfunc
= init_one_libfunc ("__rethrow");
4708 sjthrow_libfunc
= init_one_libfunc ("__sjthrow");
4709 sjpopnthrow_libfunc
= init_one_libfunc ("__sjpopnthrow");
4710 terminate_libfunc
= init_one_libfunc ("__terminate");
4711 eh_rtime_match_libfunc
= init_one_libfunc ("__eh_rtime_match");
4712 #ifndef DONT_USE_BUILTIN_SETJMP
4713 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
4714 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
4716 setjmp_libfunc
= init_one_libfunc ("setjmp");
4717 longjmp_libfunc
= init_one_libfunc ("longjmp");
4720 eqhf2_libfunc
= init_one_libfunc ("__eqhf2");
4721 nehf2_libfunc
= init_one_libfunc ("__nehf2");
4722 gthf2_libfunc
= init_one_libfunc ("__gthf2");
4723 gehf2_libfunc
= init_one_libfunc ("__gehf2");
4724 lthf2_libfunc
= init_one_libfunc ("__lthf2");
4725 lehf2_libfunc
= init_one_libfunc ("__lehf2");
4726 unordhf2_libfunc
= init_one_libfunc ("__unordhf2");
4728 eqsf2_libfunc
= init_one_libfunc ("__eqsf2");
4729 nesf2_libfunc
= init_one_libfunc ("__nesf2");
4730 gtsf2_libfunc
= init_one_libfunc ("__gtsf2");
4731 gesf2_libfunc
= init_one_libfunc ("__gesf2");
4732 ltsf2_libfunc
= init_one_libfunc ("__ltsf2");
4733 lesf2_libfunc
= init_one_libfunc ("__lesf2");
4734 unordsf2_libfunc
= init_one_libfunc ("__unordsf2");
4736 eqdf2_libfunc
= init_one_libfunc ("__eqdf2");
4737 nedf2_libfunc
= init_one_libfunc ("__nedf2");
4738 gtdf2_libfunc
= init_one_libfunc ("__gtdf2");
4739 gedf2_libfunc
= init_one_libfunc ("__gedf2");
4740 ltdf2_libfunc
= init_one_libfunc ("__ltdf2");
4741 ledf2_libfunc
= init_one_libfunc ("__ledf2");
4742 unorddf2_libfunc
= init_one_libfunc ("__unorddf2");
4744 eqxf2_libfunc
= init_one_libfunc ("__eqxf2");
4745 nexf2_libfunc
= init_one_libfunc ("__nexf2");
4746 gtxf2_libfunc
= init_one_libfunc ("__gtxf2");
4747 gexf2_libfunc
= init_one_libfunc ("__gexf2");
4748 ltxf2_libfunc
= init_one_libfunc ("__ltxf2");
4749 lexf2_libfunc
= init_one_libfunc ("__lexf2");
4750 unordxf2_libfunc
= init_one_libfunc ("__unordxf2");
4752 eqtf2_libfunc
= init_one_libfunc ("__eqtf2");
4753 netf2_libfunc
= init_one_libfunc ("__netf2");
4754 gttf2_libfunc
= init_one_libfunc ("__gttf2");
4755 getf2_libfunc
= init_one_libfunc ("__getf2");
4756 lttf2_libfunc
= init_one_libfunc ("__lttf2");
4757 letf2_libfunc
= init_one_libfunc ("__letf2");
4758 unordtf2_libfunc
= init_one_libfunc ("__unordtf2");
4760 floatsisf_libfunc
= init_one_libfunc ("__floatsisf");
4761 floatdisf_libfunc
= init_one_libfunc ("__floatdisf");
4762 floattisf_libfunc
= init_one_libfunc ("__floattisf");
4764 floatsidf_libfunc
= init_one_libfunc ("__floatsidf");
4765 floatdidf_libfunc
= init_one_libfunc ("__floatdidf");
4766 floattidf_libfunc
= init_one_libfunc ("__floattidf");
4768 floatsixf_libfunc
= init_one_libfunc ("__floatsixf");
4769 floatdixf_libfunc
= init_one_libfunc ("__floatdixf");
4770 floattixf_libfunc
= init_one_libfunc ("__floattixf");
4772 floatsitf_libfunc
= init_one_libfunc ("__floatsitf");
4773 floatditf_libfunc
= init_one_libfunc ("__floatditf");
4774 floattitf_libfunc
= init_one_libfunc ("__floattitf");
4776 fixsfsi_libfunc
= init_one_libfunc ("__fixsfsi");
4777 fixsfdi_libfunc
= init_one_libfunc ("__fixsfdi");
4778 fixsfti_libfunc
= init_one_libfunc ("__fixsfti");
4780 fixdfsi_libfunc
= init_one_libfunc ("__fixdfsi");
4781 fixdfdi_libfunc
= init_one_libfunc ("__fixdfdi");
4782 fixdfti_libfunc
= init_one_libfunc ("__fixdfti");
4784 fixxfsi_libfunc
= init_one_libfunc ("__fixxfsi");
4785 fixxfdi_libfunc
= init_one_libfunc ("__fixxfdi");
4786 fixxfti_libfunc
= init_one_libfunc ("__fixxfti");
4788 fixtfsi_libfunc
= init_one_libfunc ("__fixtfsi");
4789 fixtfdi_libfunc
= init_one_libfunc ("__fixtfdi");
4790 fixtfti_libfunc
= init_one_libfunc ("__fixtfti");
4792 fixunssfsi_libfunc
= init_one_libfunc ("__fixunssfsi");
4793 fixunssfdi_libfunc
= init_one_libfunc ("__fixunssfdi");
4794 fixunssfti_libfunc
= init_one_libfunc ("__fixunssfti");
4796 fixunsdfsi_libfunc
= init_one_libfunc ("__fixunsdfsi");
4797 fixunsdfdi_libfunc
= init_one_libfunc ("__fixunsdfdi");
4798 fixunsdfti_libfunc
= init_one_libfunc ("__fixunsdfti");
4800 fixunsxfsi_libfunc
= init_one_libfunc ("__fixunsxfsi");
4801 fixunsxfdi_libfunc
= init_one_libfunc ("__fixunsxfdi");
4802 fixunsxfti_libfunc
= init_one_libfunc ("__fixunsxfti");
4804 fixunstfsi_libfunc
= init_one_libfunc ("__fixunstfsi");
4805 fixunstfdi_libfunc
= init_one_libfunc ("__fixunstfdi");
4806 fixunstfti_libfunc
= init_one_libfunc ("__fixunstfti");
4808 /* For check-memory-usage. */
4809 chkr_check_addr_libfunc
= init_one_libfunc ("chkr_check_addr");
4810 chkr_set_right_libfunc
= init_one_libfunc ("chkr_set_right");
4811 chkr_copy_bitmap_libfunc
= init_one_libfunc ("chkr_copy_bitmap");
4812 chkr_check_exec_libfunc
= init_one_libfunc ("chkr_check_exec");
4813 chkr_check_str_libfunc
= init_one_libfunc ("chkr_check_str");
4815 /* For function entry/exit instrumentation. */
4816 profile_function_entry_libfunc
4817 = init_one_libfunc ("__cyg_profile_func_enter");
4818 profile_function_exit_libfunc
4819 = init_one_libfunc ("__cyg_profile_func_exit");
4821 #ifdef HAVE_conditional_trap
4825 #ifdef INIT_TARGET_OPTABS
4826 /* Allow the target to add more libcalls or rename some, etc. */
4830 /* Add these GC roots. */
4831 ggc_add_root (optab_table
, OTI_MAX
, sizeof(optab
), mark_optab
);
4832 ggc_add_rtx_root (libfunc_table
, LTI_MAX
);
4837 /* SCO 3.2 apparently has a broken ldexp. */
4850 #endif /* BROKEN_LDEXP */
4852 #ifdef HAVE_conditional_trap
4853 /* The insn generating function can not take an rtx_code argument.
4854 TRAP_RTX is used as an rtx argument. Its code is replaced with
4855 the code to be used in the trap insn and all other fields are
4857 static rtx trap_rtx
;
4862 if (HAVE_conditional_trap
)
4864 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
4865 ggc_add_rtx_root (&trap_rtx
, 1);
4870 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
4871 CODE. Return 0 on failure. */
4874 gen_cond_trap (code
, op1
, op2
, tcode
)
4875 enum rtx_code code ATTRIBUTE_UNUSED
;
4876 rtx op1
, op2 ATTRIBUTE_UNUSED
, tcode ATTRIBUTE_UNUSED
;
4878 enum machine_mode mode
= GET_MODE (op1
);
4880 if (mode
== VOIDmode
)
4883 #ifdef HAVE_conditional_trap
4884 if (HAVE_conditional_trap
4885 && cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
4889 emit_insn (GEN_FCN (cmp_optab
->handlers
[(int) mode
].insn_code
) (op1
, op2
));
4890 PUT_CODE (trap_rtx
, code
);
4891 insn
= gen_conditional_trap (trap_rtx
, tcode
);
4895 insn
= gen_sequence ();