1 /* Dummy data flow analysis for GNU compiler in nonoptimizing mode.
2 Copyright (C) 1987, 91, 94-96, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file performs stupid register allocation, which is used
23 when cc1 gets the -noreg switch (which is when cc does not get -O).
25 Stupid register allocation goes in place of the flow_analysis,
26 local_alloc and global_alloc passes. combine_instructions cannot
27 be done with stupid allocation because the data flow info that it needs
30 In stupid allocation, the only user-defined variables that can
31 go in registers are those declared "register". They are assumed
32 to have a life span equal to their scope. Other user variables
33 are given stack slots in the rtl-generation pass and are not
34 represented as pseudo regs. A compiler-generated temporary
35 is assumed to live from its first mention to its last mention.
37 Since each pseudo-reg's life span is just an interval, it can be
38 represented as a pair of numbers, each of which identifies an insn by
39 its position in the function (number of insns before it). The first
40 thing done for stupid allocation is to compute such a number for each
41 insn. It is called the suid. Then the life-interval of each
42 pseudo reg is computed. Then the pseudo regs are ordered by priority
43 and assigned hard regs in priority order. */
49 #include "hard-reg-set.h"
50 #include "basic-block.h"
53 #include "insn-config.h"
58 /* Vector mapping INSN_UIDs to suids.
59 The suids are like uids but increase monotonically always.
60 We use them to see whether a subroutine call came
61 between a variable's birth and its death. */
65 /* Get the suid of an insn. */
67 #define INSN_SUID(INSN) (uid_suid[INSN_UID (INSN)])
69 /* Record the suid of the last CALL_INSN
70 so we can tell whether a pseudo reg crosses any calls. */
72 static int last_call_suid
;
74 /* Record the suid of the last NOTE_INSN_SETJMP
75 so we can tell whether a pseudo reg crosses any setjmp. */
77 static int last_setjmp_suid
;
79 /* Element N is suid of insn where life span of pseudo reg N ends.
80 Element is 0 if register N has not been seen yet on backward scan. */
82 static int *reg_where_dead
;
84 /* Likewise, but point to the insn_chain structure of the insn at which
86 static struct insn_chain
**reg_where_dead_chain
;
88 /* Element N is suid of insn where life span of pseudo reg N begins. */
89 static int *reg_where_born_exact
;
91 /* Element N is 1 if the birth of pseudo reg N is due to a CLOBBER,
93 static int *reg_where_born_clobber
;
95 /* Return the suid of the insn where the register is born, or the suid
96 of the insn before if the birth is due to a CLOBBER. */
97 #define REG_WHERE_BORN(N) \
98 (reg_where_born_exact[(N)] - reg_where_born_clobber[(N)])
100 /* Numbers of pseudo-regs to be allocated, highest priority first. */
102 static int *reg_order
;
104 /* Indexed by reg number (hard or pseudo), nonzero if register is live
105 at the current point in the instruction stream. */
107 static char *regs_live
;
109 /* Indexed by reg number, nonzero if reg was used in a SUBREG that changes
112 static char *regs_change_size
;
114 /* Indexed by reg number, nonzero if reg crosses a setjmp. */
116 static char *regs_crosses_setjmp
;
118 /* Indexed by insn's suid, the set of hard regs live after that insn. */
120 static HARD_REG_SET
*after_insn_hard_regs
;
122 /* Record that hard reg REGNO is live after insn INSN. */
124 #define MARK_LIVE_AFTER(INSN,REGNO) \
125 SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (INSN)], (REGNO))
127 static int stupid_reg_compare
PROTO((const PTR
,const PTR
));
128 static int stupid_find_reg
PROTO((int, enum reg_class
, enum machine_mode
,
130 static void stupid_mark_refs
PROTO((rtx
, struct insn_chain
*));
131 static void find_clobbered_regs
PROTO((rtx
, rtx
, void *));
133 /* For communication between stupid_life_analysis and find_clobbered_regs. */
134 static struct insn_chain
*current_chain
;
136 /* This function, called via note_stores, marks any hard registers that are
137 clobbered in an insn as being live in the live_after and live_before fields
138 of the appropriate insn_chain structure. */
141 find_clobbered_regs (reg
, setter
, data
)
143 void *data ATTRIBUTE_UNUSED
;
146 if (setter
== 0 || GET_CODE (setter
) != CLOBBER
)
149 if (GET_CODE (reg
) == SUBREG
)
150 reg
= SUBREG_REG (reg
);
152 if (GET_CODE (reg
) != REG
)
155 if (regno
>= FIRST_PSEUDO_REGISTER
)
158 if (GET_MODE (reg
) == VOIDmode
)
161 nregs
= HARD_REGNO_NREGS (regno
, GET_MODE (reg
));
164 SET_REGNO_REG_SET (current_chain
->live_after
, regno
);
165 SET_REGNO_REG_SET (current_chain
->live_before
, regno
++);
169 /* Stupid life analysis is for the case where only variables declared
170 `register' go in registers. For this case, we mark all
171 pseudo-registers that belong to register variables as
172 dying in the last instruction of the function, and all other
173 pseudo registers as dying in the last place they are referenced.
174 Hard registers are marked as dying in the last reference before
175 the end or before each store into them. */
178 stupid_life_analysis (f
, nregs
, file
)
184 register rtx last
, insn
;
185 int max_uid
, max_suid
;
187 current_function_has_computed_jump
= 0;
189 bzero (regs_ever_live
, sizeof regs_ever_live
);
191 regs_live
= (char *) xmalloc (nregs
);
193 /* First find the last real insn, and count the number of insns,
194 and assign insns their suids. */
196 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
197 if (INSN_UID (insn
) > i
)
201 uid_suid
= (int *) xmalloc ((i
+ 1) * sizeof (int));
203 /* Compute the mapping from uids to suids.
204 Suids are numbers assigned to insns, like uids,
205 except that suids increase monotonically through the code. */
207 last
= 0; /* In case of empty function body */
208 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
210 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
213 INSN_SUID (insn
) = ++i
;
216 last_call_suid
= i
+ 1;
217 last_setjmp_suid
= i
+ 1;
222 /* Allocate tables to record info about regs. */
224 reg_where_dead
= (int *) xcalloc (nregs
, sizeof (int));
225 reg_where_born_exact
= (int *) xcalloc (nregs
, sizeof (int));
226 reg_where_born_clobber
= (int *) xcalloc (nregs
, sizeof (int));
227 reg_where_dead_chain
= (struct insn_chain
**)
228 xcalloc (nregs
, sizeof (struct insn_chain
*));
229 reg_order
= (int *) xcalloc (nregs
, sizeof (int));
230 regs_change_size
= (char *) xcalloc (nregs
, sizeof (char));
231 regs_crosses_setjmp
= (char *) xcalloc (nregs
, sizeof (char));
233 /* Allocate the reg_renumber array */
234 allocate_reg_info (max_regno
, FALSE
, TRUE
);
235 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
238 after_insn_hard_regs
=
239 (HARD_REG_SET
*) xcalloc (max_suid
, sizeof (HARD_REG_SET
));
241 /* Allocate and zero out many data structures
242 that will record the data from lifetime analysis. */
244 allocate_reg_life_data ();
245 allocate_bb_life_data ();
247 for (i
= 0; i
< max_regno
; i
++)
248 REG_N_DEATHS (i
) = 1;
250 bzero (regs_live
, nregs
);
252 /* Find where each pseudo register is born and dies,
253 by scanning all insns from the end to the start
254 and noting all mentions of the registers.
256 Also find where each hard register is live
257 and record that info in after_insn_hard_regs.
258 regs_live[I] is 1 if hard reg I is live
259 at the current point in the scan.
261 Build reload_insn_chain while we're walking the insns. */
263 reload_insn_chain
= 0;
264 for (insn
= last
; insn
; insn
= PREV_INSN (insn
))
266 register HARD_REG_SET
*p
= after_insn_hard_regs
+ INSN_SUID (insn
);
267 struct insn_chain
*chain
;
269 /* Copy the info in regs_live into the element of after_insn_hard_regs
270 for the current position in the rtl code. */
272 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
274 SET_HARD_REG_BIT (*p
, i
);
276 if (GET_CODE (insn
) != NOTE
&& GET_CODE (insn
) != BARRIER
)
278 chain
= new_insn_chain ();
279 if (reload_insn_chain
)
280 reload_insn_chain
->prev
= chain
;
281 chain
->next
= reload_insn_chain
;
283 reload_insn_chain
= chain
;
286 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
288 SET_REGNO_REG_SET (chain
->live_before
, i
);
291 /* Update which hard regs are currently live
292 and also the birth and death suids of pseudo regs
293 based on the pattern of this insn. */
295 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
296 stupid_mark_refs (PATTERN (insn
), chain
);
298 if (GET_CODE (insn
) == NOTE
299 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_SETJMP
)
300 last_setjmp_suid
= INSN_SUID (insn
);
302 /* Mark all call-clobbered regs as dead after each call insn so that
303 a pseudo whose life span includes this insn will not go in one of
304 them. If the function contains a non-local goto, mark all hard
305 registers dead (except for stack related bits).
307 Then mark those regs as all dead for the continuing scan
308 of the insns before the call. */
310 if (GET_CODE (insn
) == CALL_INSN
)
312 last_call_suid
= INSN_SUID (insn
);
314 if (current_function_has_nonlocal_label
)
316 IOR_COMPL_HARD_REG_SET (after_insn_hard_regs
[last_call_suid
],
318 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
324 IOR_HARD_REG_SET (after_insn_hard_regs
[last_call_suid
],
326 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
327 if (call_used_regs
[i
])
331 /* It is important that this be done after processing the insn's
332 pattern because we want the function result register to still
333 be live if it's also used to pass arguments. */
334 stupid_mark_refs (CALL_INSN_FUNCTION_USAGE (insn
), chain
);
337 if (GET_CODE (insn
) != NOTE
&& GET_CODE (insn
) != BARRIER
)
339 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
341 SET_REGNO_REG_SET (chain
->live_after
, i
);
343 /* The regs_live array doesn't say anything about hard registers
344 clobbered by this insn. So we need an extra pass over the
346 current_chain
= chain
;
347 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
348 note_stores (PATTERN (insn
), find_clobbered_regs
, NULL
);
351 if (GET_CODE (insn
) == JUMP_INSN
&& computed_jump_p (insn
))
352 current_function_has_computed_jump
= 1;
355 /* Now decide the order in which to allocate the pseudo registers. */
357 for (i
= LAST_VIRTUAL_REGISTER
+ 1; i
< max_regno
; i
++)
360 qsort (®_order
[LAST_VIRTUAL_REGISTER
+ 1],
361 max_regno
- LAST_VIRTUAL_REGISTER
- 1, sizeof (int),
364 /* Now, in that order, try to find hard registers for those pseudo regs. */
366 for (i
= LAST_VIRTUAL_REGISTER
+ 1; i
< max_regno
; i
++)
368 register int r
= reg_order
[i
];
370 /* Some regnos disappear from the rtl. Ignore them to avoid crash.
371 Also don't allocate registers that cross a setjmp, or live across
372 a call if this function receives a nonlocal goto.
373 Also ignore registers we didn't see during the scan. */
374 if (regno_reg_rtx
[r
] == 0 || regs_crosses_setjmp
[r
]
375 || (reg_where_born_exact
[r
] == 0 && reg_where_dead
[r
] == 0)
376 || (REG_N_CALLS_CROSSED (r
) > 0
377 && current_function_has_nonlocal_label
))
380 /* Now find the best hard-register class for this pseudo register */
381 if (N_REG_CLASSES
> 1)
382 reg_renumber
[r
] = stupid_find_reg (REG_N_CALLS_CROSSED (r
),
383 reg_preferred_class (r
),
384 PSEUDO_REGNO_MODE (r
),
387 regs_change_size
[r
]);
389 /* If no reg available in that class, try alternate class. */
390 if (reg_renumber
[r
] == -1 && reg_alternate_class (r
) != NO_REGS
)
391 reg_renumber
[r
] = stupid_find_reg (REG_N_CALLS_CROSSED (r
),
392 reg_alternate_class (r
),
393 PSEUDO_REGNO_MODE (r
),
396 regs_change_size
[r
]);
399 /* Fill in the pseudo reg life information into the insn chain. */
400 for (i
= LAST_VIRTUAL_REGISTER
+ 1; i
< max_regno
; i
++)
402 struct insn_chain
*chain
;
405 regno
= reg_renumber
[i
];
409 chain
= reg_where_dead_chain
[i
];
410 if (reg_where_dead
[i
] > INSN_SUID (chain
->insn
))
411 SET_REGNO_REG_SET (chain
->live_after
, i
);
413 while (INSN_SUID (chain
->insn
) > reg_where_born_exact
[i
])
415 SET_REGNO_REG_SET (chain
->live_before
, i
);
419 SET_REGNO_REG_SET (chain
->live_after
, i
);
422 if (INSN_SUID (chain
->insn
) == reg_where_born_exact
[i
]
423 && reg_where_born_clobber
[i
])
424 SET_REGNO_REG_SET (chain
->live_before
, i
);
428 dump_flow_info (file
);
432 free (reg_where_dead
);
433 free (reg_where_born_exact
);
434 free (reg_where_born_clobber
);
435 free (reg_where_dead_chain
);
437 free (regs_change_size
);
438 free (regs_crosses_setjmp
);
439 free (after_insn_hard_regs
);
442 /* Comparison function for qsort.
443 Returns -1 (1) if register *R1P is higher priority than *R2P. */
446 stupid_reg_compare (r1p
, r2p
)
450 register int r1
= *(const int *)r1p
, r2
= *(const int *)r2p
;
451 register int len1
= reg_where_dead
[r1
] - REG_WHERE_BORN (r1
);
452 register int len2
= reg_where_dead
[r2
] - REG_WHERE_BORN (r2
);
459 tem
= REG_N_REFS (r1
) - REG_N_REFS (r2
);
463 /* If regs are equally good, sort by regno,
464 so that the results of qsort leave nothing to chance. */
468 /* Find a block of SIZE words of hard registers in reg_class CLASS
469 that can hold a value of machine-mode MODE
470 (but actually we test only the first of the block for holding MODE)
471 currently free from after insn whose suid is BORN_INSN
472 through the insn whose suid is DEAD_INSN,
473 and return the number of the first of them.
474 Return -1 if such a block cannot be found.
476 If CALL_PRESERVED is nonzero, insist on registers preserved
477 over subroutine calls, and return -1 if cannot find such.
479 If CHANGES_SIZE is nonzero, it means this register was used as the
480 operand of a SUBREG that changes its size. */
483 stupid_find_reg (call_preserved
, class, mode
,
484 born_insn
, dead_insn
, changes_size
)
486 enum reg_class
class;
487 enum machine_mode mode
;
488 int born_insn
, dead_insn
;
489 int changes_size ATTRIBUTE_UNUSED
;
493 register /* Declare them register if they are scalars. */
495 HARD_REG_SET used
, this_reg
;
496 #ifdef ELIMINABLE_REGS
497 static struct {int from
, to
; } eliminables
[] = ELIMINABLE_REGS
;
500 /* If this register's life is more than 5,000 insns, we probably
501 can't allocate it, so don't waste the time trying. This avoids
502 quadratic behavior on programs that have regularly-occurring
504 if (dead_insn
> born_insn
+ 5000)
507 COPY_HARD_REG_SET (used
,
508 call_preserved
? call_used_reg_set
: fixed_reg_set
);
510 #ifdef ELIMINABLE_REGS
511 for (i
= 0; i
< (int)(sizeof eliminables
/ sizeof eliminables
[0]); i
++)
512 SET_HARD_REG_BIT (used
, eliminables
[i
].from
);
513 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
514 SET_HARD_REG_BIT (used
, HARD_FRAME_POINTER_REGNUM
);
517 SET_HARD_REG_BIT (used
, FRAME_POINTER_REGNUM
);
520 for (ins
= born_insn
; ins
< dead_insn
; ins
++)
521 IOR_HARD_REG_SET (used
, after_insn_hard_regs
[ins
]);
524 if (current_function_has_computed_jump
)
525 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
526 SET_HARD_REG_BIT (used
, i
);
529 IOR_COMPL_HARD_REG_SET (used
, reg_class_contents
[(int) class]);
531 #ifdef CLASS_CANNOT_CHANGE_SIZE
533 IOR_HARD_REG_SET (used
,
534 reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
]);
537 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
539 #ifdef REG_ALLOC_ORDER
540 int regno
= reg_alloc_order
[i
];
545 /* If a register has screwy overlap problems,
546 don't use it at all if not optimizing.
547 Actually this is only for the 387 stack register,
548 and it's because subsequent code won't work. */
549 #ifdef OVERLAPPING_REGNO_P
550 if (OVERLAPPING_REGNO_P (regno
))
554 if (! TEST_HARD_REG_BIT (used
, regno
)
555 && HARD_REGNO_MODE_OK (regno
, mode
))
558 register int size1
= HARD_REGNO_NREGS (regno
, mode
);
559 for (j
= 1; j
< size1
&& ! TEST_HARD_REG_BIT (used
, regno
+ j
); j
++);
562 CLEAR_HARD_REG_SET (this_reg
);
564 SET_HARD_REG_BIT (this_reg
, regno
+ j
);
565 for (ins
= born_insn
; ins
< dead_insn
; ins
++)
567 IOR_HARD_REG_SET (after_insn_hard_regs
[ins
], this_reg
);
571 #ifndef REG_ALLOC_ORDER
572 i
+= j
; /* Skip starting points we know will lose */
580 /* Walk X, noting all assignments and references to registers
581 and recording what they imply about life spans.
582 INSN is the current insn, supplied so we can find its suid. */
585 stupid_mark_refs (x
, chain
)
587 struct insn_chain
*chain
;
589 register RTX_CODE code
;
590 register const char *fmt
;
591 register int regno
, i
;
592 rtx insn
= chain
->insn
;
599 if (code
== SET
|| code
== CLOBBER
)
601 if (SET_DEST (x
) != 0
602 && (GET_CODE (SET_DEST (x
)) == REG
603 || (GET_CODE (SET_DEST (x
)) == SUBREG
604 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
605 && (REGNO (SUBREG_REG (SET_DEST (x
)))
606 >= FIRST_PSEUDO_REGISTER
))))
608 /* Register is being assigned. */
609 /* If setting a SUBREG, we treat the entire reg as being set. */
610 if (GET_CODE (SET_DEST (x
)) == SUBREG
)
611 regno
= REGNO (SUBREG_REG (SET_DEST (x
)));
613 regno
= REGNO (SET_DEST (x
));
615 /* For hard regs, update the where-live info. */
616 if (regno
< FIRST_PSEUDO_REGISTER
)
619 = HARD_REGNO_NREGS (regno
, GET_MODE (SET_DEST (x
)));
623 regs_ever_live
[regno
+j
] = 1;
624 regs_live
[regno
+j
] = 0;
626 /* The following line is for unused outputs;
627 they do get stored even though never used again. */
628 MARK_LIVE_AFTER (insn
, regno
+j
);
630 /* When a hard reg is clobbered, mark it in use
631 just before this insn, so it is live all through. */
632 if (code
== CLOBBER
&& INSN_SUID (insn
) > 0)
633 SET_HARD_REG_BIT (after_insn_hard_regs
[INSN_SUID (insn
) - 1],
637 /* For pseudo regs, record where born, where dead, number of
638 times used, and whether live across a call. */
641 /* Update the life-interval bounds of this pseudo reg. */
643 /* When a pseudo-reg is CLOBBERed, it is born just before
644 the clobbering insn. When setting, just after. */
645 int where_born
= INSN_SUID (insn
) - (code
== CLOBBER
);
647 reg_where_born_exact
[regno
] = INSN_SUID (insn
);
648 reg_where_born_clobber
[regno
] = (code
== CLOBBER
);
650 if (reg_where_dead_chain
[regno
] == 0)
651 reg_where_dead_chain
[regno
] = chain
;
653 /* The reg must live at least one insn even
654 in it is never again used--because it has to go
655 in SOME hard reg. Mark it as dying after the current
656 insn so that it will conflict with any other outputs of
658 if (reg_where_dead
[regno
] < where_born
+ 2)
660 reg_where_dead
[regno
] = where_born
+ 2;
661 regs_live
[regno
] = 1;
664 /* Count the refs of this reg. */
665 REG_N_REFS (regno
)++;
667 if (last_call_suid
< reg_where_dead
[regno
])
668 REG_N_CALLS_CROSSED (regno
) += 1;
670 if (last_setjmp_suid
< reg_where_dead
[regno
])
671 regs_crosses_setjmp
[regno
] = 1;
673 /* If this register is clobbered or it is only used in
674 this insn and is only set, mark it unused. We have
675 to do this even when not optimizing so that MD patterns
676 which count on this behavior (e.g., it not causing an
677 output reload on an insn setting CC) will operate
679 if (GET_CODE (SET_DEST (x
)) == REG
681 || (REGNO_FIRST_UID (regno
) == INSN_UID (insn
)
682 && REGNO_LAST_UID (regno
) == INSN_UID (insn
)
683 && ! reg_mentioned_p (SET_DEST (x
),
685 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_UNUSED
,
691 /* Record references from the value being set,
692 or from addresses in the place being set if that's not a reg.
693 If setting a SUBREG, we treat the entire reg as *used*. */
696 stupid_mark_refs (SET_SRC (x
), chain
);
697 if (GET_CODE (SET_DEST (x
)) != REG
)
698 stupid_mark_refs (SET_DEST (x
), chain
);
703 else if (code
== SUBREG
704 && GET_CODE (SUBREG_REG (x
)) == REG
705 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
706 && (GET_MODE_SIZE (GET_MODE (x
))
707 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
708 && (INTEGRAL_MODE_P (GET_MODE (x
))
709 || INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (x
)))))
710 regs_change_size
[REGNO (SUBREG_REG (x
))] = 1;
712 /* Register value being used, not set. */
714 else if (code
== REG
)
717 if (regno
< FIRST_PSEUDO_REGISTER
)
719 /* Hard reg: mark it live for continuing scan of previous insns. */
720 register int j
= HARD_REGNO_NREGS (regno
, GET_MODE (x
));
723 regs_ever_live
[regno
+j
] = 1;
724 regs_live
[regno
+j
] = 1;
729 /* Pseudo reg: record first use, last use and number of uses. */
731 reg_where_born_exact
[regno
] = INSN_SUID (insn
);
732 reg_where_born_clobber
[regno
] = 0;
733 REG_N_REFS (regno
)++;
734 if (regs_live
[regno
] == 0)
736 regs_live
[regno
] = 1;
737 reg_where_dead
[regno
] = INSN_SUID (insn
);
738 reg_where_dead_chain
[regno
] = chain
;
744 /* Recursive scan of all other rtx's. */
746 fmt
= GET_RTX_FORMAT (code
);
747 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
750 stupid_mark_refs (XEXP (x
, i
), chain
);
754 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
755 stupid_mark_refs (XVECEXP (x
, i
, j
), chain
);