| blob | 39fbd71da995486712b3b5367744dc99041c5f51 |
1 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
3 Backport from trunk r211717, r213692.
4 2014-08-07 Kugan Vivekanandarajah <kuganv@linaro.org>
6 * config/arm/arm.c (bdesc_2arg): Fix typo.
7 (arm_atomic_assign_expand_fenv): Remove The default implementation.
9 2014-06-17 Kugan Vivekanandarajah <kuganv@linaro.org>
11 * config/arm/arm.c (arm_atomic_assign_expand_fenv): call
12 default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
13 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
14 __builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
15 * config/arm/vfp.md (set_fpscr): Make pattern conditional on
16 TARGET_HARD_FLOAT.
17 (get_fpscr) : Likewise.
19 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
21 Backport from trunk r212989, r213628.
22 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24 * convert.c (convert_to_integer): Guard transformation to lrint by
25 -fno-math-errno.
27 2014-07-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29 PR middle-end/61876
30 * convert.c (convert_to_integer): Do not convert BUILT_IN_ROUND and cast
31 when flag_errno_math is on.
33 2014-08-15 Yvan Roux <yvan.roux@linaro.org>
35 * LINARO-VERSION: Bump version.
37 2014-08-14 Yvan Roux <yvan.roux@linaro.org>
39 GCC Linaro 4.9-2014.08 released.
40 * LINARO-VERSION: Update.
42 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
44 Backport from trunk r212912, r212913.
45 2014-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
47 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
48 (case UNSPEC): Handle UNSPEC_RBIT.
50 2014-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
52 * config/aarch64/aarch64.md: Delete UNSPEC_CLS.
53 (clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.
55 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
57 Backport from trunk r213555.
58 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
60 PR target/61713
61 * gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
62 move to subtarget in serial version if result is ignored.
64 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
66 Backport from trunk r213376.
67 2014-07-31 Charles Baylis <charles.baylis@linaro.org>
69 PR target/61948
70 * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
71 constraints are satisfied.
72 (<shift>di3_neon): Likewise.
74 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
76 Backport from trunk r211270, r211271, r211273, r211275, r212943,
77 r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
78 r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
79 r213000.
80 2014-07-24 Jiong Wang <jiong.wang@arm.com>
82 * config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
83 (aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.
85 2014-07-24 Jiong Wang <jiong.wang@arm.com>
87 * config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
88 (aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.
90 2014-07-24 Jiong Wang <jiong.wang@arm.com>
92 * config/aarch64/aarch64.c (aarch64_restore_callee_saves)
93 (aarch64_save_callee_saves): New parameter "skip_wb".
94 (aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.
96 2014-07-24 Jiong Wang <jiong.wang@arm.com>
98 * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
99 "wb_candidate2".
100 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.
102 2014-07-24 Jiong Wang <jiong.wang@arm.com>
104 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
105 subtract outgoing area size when restoring stack_pointer_rtx.
107 2014-07-23 Jiong Wang <jiong.wang@arm.com>
109 * config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
110 (aarch64_gen_loadwb_pair): New helper function.
111 (aarch64_expand_epilogue): Simplify code using new helper functions.
112 * config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.
114 2014-07-23 Jiong Wang <jiong.wang@arm.com>
116 * config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
117 (aarch64_gen_storewb_pair): New helper function.
118 (aarch64_expand_prologue): Simplify code using new helper functions.
119 * config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.
121 2014-07-23 Jiong Wang <jiong.wang@arm.com>
123 * config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
124 Rename to aarch64_save_callee_saves, remove restore code.
125 (aarch64_restore_callee_saves): New function.
127 2014-07-23 Jiong Wang <jiong.wang@arm.com>
129 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
130 (aarch64_save_callee_saves): New function to handle reg save
131 for both core and vectore regs.
133 2014-07-23 Jiong Wang <jiong.wang@arm.com>
135 * config/aarch64/aarch64.c (aarch64_gen_load_pair)
136 (aarch64_gen_store_pair): New helper function.
137 (aarch64_save_or_restore_callee_save_registers)
138 (aarch64_save_or_restore_fprs): Use new helper functions.
140 2014-07-23 Jiong Wang <jiong.wang@arm.com>
142 * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
143 (aarch64_save_or_restore_callee_save_registers)
144 (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
146 2014-07-23 Jiong Wang <jiong.wang@arm.com>
148 * config/aarch64/aarch64.c
149 (aarch64_save_or_restore_callee_save_registers)
150 (aarch64_save_or_restore_fprs): Hoist calculation of register rtx.
152 2014-07-23 Jiong Wang <jiong.wang@arm.com>
154 * config/aarch64/aarch64.c
155 (aarch64_save_or_restore_callee_save_registers)
156 (aarch64_save_or_restore_fprs): Remove 'increment'.
158 2014-07-23 Jiong Wang <jiong.wang@arm.com>
160 * config/aarch64/aarch64.c
161 (aarch64_save_or_restore_callee_save_registers)
162 (aarch64_save_or_restore_fprs): Use register offset in
163 cfun->machine->frame.reg_offset.
165 2014-07-23 Jiong Wang <jiong.wang@arm.com>
167 * config/aarch64/aarch64.c
168 (aarch64_save_or_restore_callee_save_registers)
169 (aarch64_save_or_restore_fprs): Remove base_rtx.
171 2014-07-23 Jiong Wang <jiong.wang@arm.com>
173 * config/aarch64/aarch64.c
174 (aarch64_save_or_restore_callee_save_registers): Rename 'offset'
175 to 'start_offset'. Remove local variable 'start_offset'.
177 2014-07-23 Jiong Wang <jiong.wang@arm.com>
179 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
180 type to HOST_WIDE_INT.
182 2014-07-23 Jiong Wang <jiong.wang@arm.com>
184 * config/aarch64/aarch64.c (aarch64_expand_prologue)
185 (aarch64_save_or_restore_fprs)
186 (aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.
188 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
190 * config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
191 frame_size.
192 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
193 aarch64_frame hard_fp_offset and frame_size.
194 (aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
195 frame_size; remove original_frame_size.
196 (aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
197 (aarch64_initial_elimination_offset): Remove frame_size and
198 offset. Use aarch64_frame frame_size.
200 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
201 Jiong Wang <jiong.wang@arm.com>
203 * config/aarch64/aarch64.c (aarch64_layout_frame): Correct
204 initialization of R30 offset. Update offset. Iterate core
205 regisers upto X30. Remove X29, X30 specific code.
207 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
208 Jiong Wang <jiong.wang@arm.com>
210 * config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
211 (aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
212 (aarch64_register_saved_on_entry): Adjust test.
214 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
216 * config/aarch64/aarch64.h (machine_function): Move
217 saved_varargs_size from here...
218 (aarch64_frameGTY): ... to here.
220 * config/aarch64/aarch64.c (aarch64_expand_prologue)
221 (aarch64_expand_epilogue, aarch64_final_eh_return_addr)
222 (aarch64_initial_elimination_offset)
223 (aarch64_setup_incoming_varargs): Adjust location of
224 saved_varargs_size.
226 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
228 Backport from trunk r212753.
229 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
231 * config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
232 (aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
234 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
236 Backport from trunk r212752.
237 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
239 * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
240 (vmlal_high_lane_s32): Likewise.
241 (vmlal_high_lane_u16): Likewise.
242 (vmlal_high_lane_u32): Likewise.
243 (vmlsl_high_lane_s16): Likewise.
244 (vmlsl_high_lane_s32): Likewise.
245 (vmlsl_high_lane_u16): Likewise.
246 (vmlsl_high_lane_u32): Likewise.
248 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
250 Backport from trunk r212512.
251 2014-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
253 * config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
254 * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
255 * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
256 * config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
257 * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
258 * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
259 * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
261 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
263 Backport from trunk r212358.
264 2014-07-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
266 * config/arm/arm.c (cortexa5_extra_costs): New table.
267 (arm_cortex_a5_tune): Use cortexa5_extra_costs.
269 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
271 Backport from trunk r212296.
272 2014-07-04 Tom de Vries <tom@codesourcery.com>
274 * config/aarch64/aarch64-simd.md
275 (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
277 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
279 Backport from trunk r212142, r212225.
280 2014-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
282 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
283 variable i.
285 2014-06-30 Alan Lawrence <alan.lawrence@arm.com>
287 * config/aarch64/aarch64-simd.md (vec_perm): Enable for bigendian.
288 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Remove assert
289 against bigendian and adjust indices.
291 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
293 Backport from trunk r211779.
294 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
296 * config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.
298 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
300 Backport from trunk r211503.
301 2014-06-12 Alan Lawrence <alan.lawrence@arm.com>
303 * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64,
304 vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, vcgez_u64,
305 vcgezq_p8, vcgezq_u8, vcgezq_u16, vcgezq_u32, vcgezq_u64, vcgezd_u64,
306 vcgt_p8, vcgtq_p8, vcgtz_p8, vcgtz_u8, vcgtz_u16, vcgtz_u32, vcgtz_u64,
307 vcgtzq_p8, vcgtzq_u8, vcgtzq_u16, vcgtzq_u32, vcgtzq_u64, vcgtzd_u64,
308 vcle_p8, vcleq_p8, vclez_p8, vclez_u64, vclezq_p8, vclezd_u64, vclt_p8,
309 vcltq_p8, vcltz_p8, vcltzq_p8, vcltzd_u64): Remove functions as they are
310 not in the spec.
312 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
314 Backport from trunk r211140.
315 2014-06-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
317 * config/aarch64/aarch64.md (set_fpcr): Drop ISB after FPCR write.
319 2014-07-29 Yvan Roux <yvan.roux@linaro.org>
321 * LINARO-VERSION: Bump version.
323 2014-07-24 Yvan Roux <yvan.roux@linaro.org>
325 GCC Linaro 4.9-2014.07-1 released.
326 * LINARO-VERSION: Update.
328 2014-07-20 Yvan Roux <yvan.roux@linaro.org>
330 Revert:
331 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
333 Backport from trunk r211129.
334 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
336 PR target/61154
337 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
338 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
339 with immediate_operand.
341 2014-07-19 Yvan Roux <yvan.roux@linaro.org>
343 * LINARO-VERSION: Bump version.
345 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
347 GCC Linaro 4.9-2014.07 released.
348 * LINARO-VERSION: Update.
350 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
352 Backport from trunk r211887, r211899.
353 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
355 * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
356 "yes" where needed.
358 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
360 * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
361 vector registers.
363 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
365 Backport from trunk r211440.
366 2014-06-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
368 * config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
369 * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
370 dependencies.
371 * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
372 (aarch64_crc_builtin_datum): New struct.
373 (aarch64_crc_builtin_data): New.
374 (aarch64_init_crc32_builtins): New function.
375 (aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
376 (aarch64_crc32_expand_builtin): New.
377 (aarch64_expand_builtin): Add CRC32 builtin expansion case.
378 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
379 __ARM_FEATURE_CRC32 when appropriate.
380 (TARGET_CRC32): Define.
381 * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
382 UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
383 UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
384 (aarch64_<crc_variant>): New pattern.
385 * config/aarch64/arm_acle.h: New file.
386 * config/aarch64/iterators.md (CRC): New int iterator.
387 (crc_variant, crc_mode): New int attributes.
388 * doc/aarch64-acle-intrinsics.texi: New file.
389 * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
390 Include aarch64-acle-intrinsics.texi.
392 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
394 Backport from trunk r211174.
395 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
397 * config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
398 New pattern.
399 * config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
400 (aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
401 * config/aarch64/iterators.md (REVERSE): New iterator.
402 (UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
403 (rev_op): New int_attribute.
404 * config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
405 vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
406 vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
407 vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
408 vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
409 vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
410 vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
411 Replace temporary __asm__ with __builtin_shuffle.
413 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
415 Backport from trunk r210216, r210218, r210219.
416 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
418 * config/arm/arm_neon.h: Update comment.
419 * config/arm/neon-docgen.ml: Delete.
420 * config/arm/neon-gen.ml: Delete.
421 * doc/arm-neon-intrinsics.texi: Update comment.
423 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
425 * config/arm/arm_neon_builtins.def (vadd, vsub): Only define the v2sf
426 and v4sf versions.
427 (vand, vorr, veor, vorn, vbic): Remove.
428 * config/arm/neon.md (neon_vadd, neon_vsub, neon_vadd_unspec): Adjust
429 iterator.
430 (neon_vsub_unspec): Likewise.
431 (neon_vorr, neon_vand, neon_vbic, neon_veor, neon_vorn): Remove.
433 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
435 * config/arm/arm_neon.h (vadd_s8): GNU C implementation
436 (vadd_s16): Likewise.
437 (vadd_s32): Likewise.
438 (vadd_f32): Likewise.
439 (vadd_u8): Likewise.
440 (vadd_u16): Likewise.
441 (vadd_u32): Likewise.
442 (vadd_s64): Likewise.
443 (vadd_u64): Likewise.
444 (vaddq_s8): Likewise.
445 (vaddq_s16): Likewise.
446 (vaddq_s32): Likewise.
447 (vaddq_s64): Likewise.
448 (vaddq_f32): Likewise.
449 (vaddq_u8): Likewise.
450 (vaddq_u16): Likewise.
451 (vaddq_u32): Likewise.
452 (vaddq_u64): Likewise.
453 (vmul_s8): Likewise.
454 (vmul_s16): Likewise.
455 (vmul_s32): Likewise.
456 (vmul_f32): Likewise.
457 (vmul_u8): Likewise.
458 (vmul_u16): Likewise.
459 (vmul_u32): Likewise.
460 (vmul_p8): Likewise.
461 (vmulq_s8): Likewise.
462 (vmulq_s16): Likewise.
463 (vmulq_s32): Likewise.
464 (vmulq_f32): Likewise.
465 (vmulq_u8): Likewise.
466 (vmulq_u16): Likewise.
467 (vmulq_u32): Likewise.
468 (vsub_s8): Likewise.
469 (vsub_s16): Likewise.
470 (vsub_s32): Likewise.
471 (vsub_f32): Likewise.
472 (vsub_u8): Likewise.
473 (vsub_u16): Likewise.
474 (vsub_u32): Likewise.
475 (vsub_s64): Likewise.
476 (vsub_u64): Likewise.
477 (vsubq_s8): Likewise.
478 (vsubq_s16): Likewise.
479 (vsubq_s32): Likewise.
480 (vsubq_s64): Likewise.
481 (vsubq_f32): Likewise.
482 (vsubq_u8): Likewise.
483 (vsubq_u16): Likewise.
484 (vsubq_u32): Likewise.
485 (vsubq_u64): Likewise.
486 (vand_s8): Likewise.
487 (vand_s16): Likewise.
488 (vand_s32): Likewise.
489 (vand_u8): Likewise.
490 (vand_u16): Likewise.
491 (vand_u32): Likewise.
492 (vand_s64): Likewise.
493 (vand_u64): Likewise.
494 (vandq_s8): Likewise.
495 (vandq_s16): Likewise.
496 (vandq_s32): Likewise.
497 (vandq_s64): Likewise.
498 (vandq_u8): Likewise.
499 (vandq_u16): Likewise.
500 (vandq_u32): Likewise.
501 (vandq_u64): Likewise.
502 (vorr_s8): Likewise.
503 (vorr_s16): Likewise.
504 (vorr_s32): Likewise.
505 (vorr_u8): Likewise.
506 (vorr_u16): Likewise.
507 (vorr_u32): Likewise.
508 (vorr_s64): Likewise.
509 (vorr_u64): Likewise.
510 (vorrq_s8): Likewise.
511 (vorrq_s16): Likewise.
512 (vorrq_s32): Likewise.
513 (vorrq_s64): Likewise.
514 (vorrq_u8): Likewise.
515 (vorrq_u16): Likewise.
516 (vorrq_u32): Likewise.
517 (vorrq_u64): Likewise.
518 (veor_s8): Likewise.
519 (veor_s16): Likewise.
520 (veor_s32): Likewise.
521 (veor_u8): Likewise.
522 (veor_u16): Likewise.
523 (veor_u32): Likewise.
524 (veor_s64): Likewise.
525 (veor_u64): Likewise.
526 (veorq_s8): Likewise.
527 (veorq_s16): Likewise.
528 (veorq_s32): Likewise.
529 (veorq_s64): Likewise.
530 (veorq_u8): Likewise.
531 (veorq_u16): Likewise.
532 (veorq_u32): Likewise.
533 (veorq_u64): Likewise.
534 (vbic_s8): Likewise.
535 (vbic_s16): Likewise.
536 (vbic_s32): Likewise.
537 (vbic_u8): Likewise.
538 (vbic_u16): Likewise.
539 (vbic_u32): Likewise.
540 (vbic_s64): Likewise.
541 (vbic_u64): Likewise.
542 (vbicq_s8): Likewise.
543 (vbicq_s16): Likewise.
544 (vbicq_s32): Likewise.
545 (vbicq_s64): Likewise.
546 (vbicq_u8): Likewise.
547 (vbicq_u16): Likewise.
548 (vbicq_u32): Likewise.
549 (vbicq_u64): Likewise.
550 (vorn_s8): Likewise.
551 (vorn_s16): Likewise.
552 (vorn_s32): Likewise.
553 (vorn_u8): Likewise.
554 (vorn_u16): Likewise.
555 (vorn_u32): Likewise.
556 (vorn_s64): Likewise.
557 (vorn_u64): Likewise.
558 (vornq_s8): Likewise.
559 (vornq_s16): Likewise.
560 (vornq_s32): Likewise.
561 (vornq_s64): Likewise.
562 (vornq_u8): Likewise.
563 (vornq_u16): Likewise.
564 (vornq_u32): Likewise.
565 (vornq_u64): Likewise.
567 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
569 Backport from trunk r210151.
570 2014-05-07 Alan Lawrence <alan.lawrence@arm.com>
572 * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
573 vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
574 vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
575 vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
576 vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
577 vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
578 vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
579 vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
581 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
583 Backport from trunk r209794.
584 2014-04-25 Marek Polacek <polacek@redhat.com>
586 PR c/60114
587 * c-parser.c (c_parser_initelt): Pass input_location to
588 process_init_element.
589 (c_parser_initval): Pass loc to process_init_element.
590 * c-tree.h (process_init_element): Adjust declaration.
591 * c-typeck.c (push_init_level): Pass input_location to
592 process_init_element.
593 (pop_init_level): Likewise.
594 (set_designator): Likewise.
595 (output_init_element): Add location_t parameter. Pass loc to
596 digest_init.
597 (output_pending_init_elements): Pass input_location to
598 output_init_element.
599 (process_init_element): Add location_t parameter. Pass loc to
600 output_init_element.
602 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
604 Backport from trunk r211771.
605 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
607 * genattrtab.c (n_bypassed): New variable.
608 (process_bypasses): Initialise n_bypassed.
609 Count number of bypassed reservations.
610 (make_automaton_attrs): Allocate space for bypassed reservations
611 rather than number of bypasses.
613 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
615 Backport from trunk r210861.
616 2014-05-23 Jiong Wang <jiong.wang@arm.com>
618 * config/aarch64/predicates.md (aarch64_call_insn_operand): New
619 predicate.
620 * config/aarch64/constraints.md ("Ucs", "Usf"): New constraints.
621 * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
622 Adjust for tailcalling through registers.
623 * config/aarch64/aarch64.h (enum reg_class): New caller save
624 register class.
625 (REG_CLASS_NAMES): Likewise.
626 (REG_CLASS_CONTENTS): Likewise.
627 * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
628 Allow tailcalling without decls.
630 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
632 Backport from trunk r211314.
633 2014-06-06 James Greenhalgh <james.greenhalgh@arm.com>
635 * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
636 * config/aarch64/aarch64.c (aarch64_move_pointer): New.
637 (aarch64_progress_pointer): Likewise.
638 (aarch64_copy_one_part_and_move_pointers): Likewise.
639 (aarch64_expand_movmen): Likewise.
640 * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
641 * config/aarch64/aarch64.md (movmem<mode>): New.
643 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
645 Backport from trunk r211185, 211186.
646 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
648 * gcc/config/aarch64/aarch64-builtins.c
649 (aarch64_types_binop_uus_qualifiers,
650 aarch64_types_shift_to_unsigned_qualifiers,
651 aarch64_types_unsigned_shiftacc_qualifiers): Define.
652 * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
653 uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
654 sqshlu_n, uqshl_n): Update qualifiers.
655 * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
656 vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
657 vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
658 vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
659 vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
660 vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
661 vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
662 vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
663 vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
664 vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
665 vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
666 vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
667 vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
668 vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
669 vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
670 vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
671 vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
672 vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
673 vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
674 vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
675 vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
676 vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
677 vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
678 vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
679 vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
680 vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
681 vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
683 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
685 * gcc/config/aarch64/aarch64-builtins.c
686 (aarch64_types_binop_ssu_qualifiers): New static data.
687 (TYPES_BINOP_SSU): Define.
688 * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
689 urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
690 * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
691 vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
692 vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
693 vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
694 vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32, 52
695 vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64, 53
696 vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
697 suffix to builtin function name, remove cast. 55
698 (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
699 vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8, 57
700 vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
702 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
704 Backport from trunk r211408, 211416.
705 2014-06-10 Marcus Shawcroft <marcus.shawcroft@arm.com>
707 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
708 REG_CFA_RESTORE mode.
710 2014-06-10 Jiong Wang <jiong.wang@arm.com>
712 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
713 (aarch64_save_or_restore_callee_save_registers): Fix layout.
715 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
717 Backport from trunk r211418.
718 2014-06-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
720 * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
721 Change second alternative type to f_mcr.
722 * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
723 and 12th alternatives' types to f_mcr and f_mrc.
724 (*movdi_aarch64): Same for 12th and 13th alternatives.
725 (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
726 (aarch64_movtilow_tilow): Change type to fmov.
728 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
730 Backport from trunk r211371.
731 2014-06-09 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
733 * config/arm/arm-modes.def: Remove XFmode.
735 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
737 Backport from trunk r211268.
738 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
740 * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
741 layout comment.
743 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
745 Backport from trunk r211129.
746 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
748 PR target/61154
749 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
750 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
751 with immediate_operand.
753 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
755 Backport from trunk r211073.
756 2014-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
758 * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
759 to mov_imm.
760 * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
762 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
764 Backport from trunk r211050.
765 2014-05-29 Richard Earnshaw <rearnsha@arm.com>
766 Richard Sandiford <rdsandiford@googlemail.com>
768 * arm/iterators.md (shiftable_ops): New code iterator.
769 (t2_binop0, arith_shift_insn): New code attributes.
770 * arm/predicates.md (shift_nomul_operator): New predicate.
771 * arm/arm.md (insn_enabled): Delete.
772 (enabled): Remove insn_enabled test.
773 (*arith_shiftsi): Delete. Replace with ...
774 (*<arith_shift_insn>_multsi): ... new pattern.
775 (*<arith_shift_insn>_shiftsi): ... new pattern.
776 * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
778 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
780 Backport from trunk r210996.
781 2014-05-27 Andrew Pinski <apinski@cavium.com>
783 * config/aarch64/aarch64.md (stack_protect_set_<mode>):
784 Use <w> for the register in assembly template.
785 (stack_protect_test): Use the mode of operands[0] for the
786 result.
787 (stack_protect_test_<mode>): Use <w> for the register
788 in assembly template.
790 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
792 Backport from trunk r210967.
793 2014-05-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
795 * config/arm/neon.md (neon_bswap<mode>): New pattern.
796 * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
797 (arm_init_neon_builtins): Handle NEON_BSWAP.
798 Define required type nodes.
799 (arm_expand_neon_builtin): Handle NEON_BSWAP.
800 (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
801 * config/arm/arm_neon_builtins.def (bswap): Define builtins.
802 * config/arm/iterators.md (VDQHSD): New mode iterator.
804 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
806 Backport from trunk r210471.
807 2014-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
809 * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
810 enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
812 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
814 Backport from trunk r210369.
815 2014-05-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
817 * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
818 (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
819 Remove associated type declarations and initialisations.
820 (arm_expand_neon_builtin): Likewise.
821 (neon_emit_pair_result_insn): Delete.
822 * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
823 * config/arm/neon.md (neon_vtrn<mode>): Delete.
824 (neon_vzip<mode>): Likewise.
825 (neon_vuzp<mode>): Likewise.
827 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
829 Backport from trunk r211058, 211177.
830 2014-05-29 Alan Lawrence <alan.lawrence@arm.com>
832 * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
833 TYPES_BINOPV): New static data.
834 * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
835 * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
836 New patterns.
837 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
838 patterns for EXT.
839 (aarch64_evpc_ext): New function.
841 * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
843 * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
844 vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
845 vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
846 vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
847 vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
849 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
851 * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
852 location == 0.
854 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
856 Backport from trunk r209797.
857 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
859 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
860 Use HOST_WIDE_INT_C for mask literal.
861 (aarch_rev16_shleft_mask_imm_p): Likewise.
863 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
865 Backport from trunk r211148.
866 2014-06-02 Andrew Pinski <apinski@cavium.com>
868 * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
869 /lib/ld-linux32-aarch64.so.1 is used for ILP32.
870 (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
871 file whose name depends on -mabi= and -mbig-endian.
872 * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
873 better and handle ilp32 too.
874 (MULTILIB_OPTIONS): Delete.
875 (MULTILIB_DIRNAMES): Delete.
877 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
879 Backport from trunk r210828, r211103.
880 2014-05-31 Kugan Vivekanandarajah <kuganv@linaro.org>
882 * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
883 (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
884 (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
885 and __builtins_arm_get_fpscr.
886 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
887 __builtins_arm_get_fpscr.
888 (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
889 __builtins_arm_ldfpscr.
890 (arm_atomic_assign_expand_fenv): New function.
891 * config/arm/vfp.md (set_fpscr): New pattern.
892 (get_fpscr) : Likewise.
893 * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
894 VUNSPEC_SET_FPSCR.
895 * doc/extend.texi (AARCH64 Built-in Functions) : Document
896 __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
898 2014-05-23 Kugan Vivekanandarajah <kuganv@linaro.org>
900 * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
901 define.
902 * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
903 New function declaration.
904 * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
905 AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
906 AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
907 (aarch64_init_builtins) : Initialize builtins
908 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
909 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
910 (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
911 __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
912 and __builtins_aarch64_set_fpsr.
913 (aarch64_atomic_assign_expand_fenv): New function.
914 * config/aarch64/aarch64.md (set_fpcr): New pattern.
915 (get_fpcr) : Likewise.
916 (set_fpsr) : Likewise.
917 (get_fpsr) : Likewise.
918 (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
919 and UNSPECV_SET_FPSR.
920 * doc/extend.texi (AARCH64 Built-in Functions) : Document
921 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
922 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
924 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
926 Backport from trunk r210355.
927 2014-05-13 Ian Bolton <ian.bolton@arm.com>
929 * config/aarch64/aarch64-protos.h
930 (aarch64_hard_regno_caller_save_mode): New prototype.
931 * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
932 New function.
933 * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
935 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
937 Backport from trunk r209943.
938 2014-04-30 Alan Lawrence <alan.lawrence@arm.com>
940 * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
941 vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
942 vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
943 vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
944 vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
945 vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
946 vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
947 vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
949 2014-06-26 Yvan Roux <yvan.roux@linaro.org>
951 * LINARO-VERSION: Bump version.
953 2014-06-25 Yvan Roux <yvan.roux@linaro.org>
955 GCC Linaro 4.9-2014.06-1 released.
956 * LINARO-VERSION: Update.
958 2014-06-24 Yvan Roux <yvan.roux@linaro.org>
960 Revert:
961 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
963 Backport from trunk r209643.
964 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
966 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
968 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
970 Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
971 210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
972 210508, 210509, 210510, 210512, 211205, 211206.
973 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
975 * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
976 (cpu_addrcost_table): Use it.
977 * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
978 (aarch64_address_cost): Rewrite using aarch64_classify_address,
979 move it.
981 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
983 * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
984 (cortexa57_vector_cost): Likewise.
985 (cortexa57_tunings): Use them.
987 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
989 * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
990 (TARGET_RTX_COSTS): Call it.
992 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
993 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
995 * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
996 emit instructions, return number of instructions which would
997 be emitted.
998 (aarch64_add_constant): Update call to aarch64_build_constant.
999 (aarch64_output_mi_thunk): Likewise.
1000 (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
1001 a CONST_DOUBLE.
1003 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1004 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1006 * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
1007 to...
1008 (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
1009 well formed.
1010 (aarch64_rtx_mult_cost): New.
1011 (aarch64_rtx_costs): Use it, refactor as appropriate.
1013 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1015 * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
1017 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1018 Philip Tomsich <philipp.tomsich@theobroma-systems.com>
1020 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
1021 for SET RTX.
1023 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1024 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1026 * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
1027 costs when costing loads and stores to memory.
1029 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1030 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1032 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
1033 logical operations.
1035 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1036 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1038 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
1039 ZERO_EXTEND and SIGN_EXTEND better.
1041 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1042 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1044 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1045 rotates and shifts.
1047 2014-03-16 James Greenhalgh <james.greenhalgh@arm.com>
1048 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1050 * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
1051 (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
1053 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1054 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1056 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1057 DIV/MOD.
1059 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1060 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1062 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
1063 operators.
1065 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1066 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1068 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
1069 FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
1071 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1072 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1074 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
1076 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1078 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
1079 HIGH, LO_SUM.
1081 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1083 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
1084 where we were unable to cost an RTX.
1086 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1088 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
1090 2014-06-03 Andrew Pinski <apinski@cavium.com>
1092 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
1093 (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
1095 2014-06-03 Andrew Pinski <apinski@cavium.com>
1097 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
1098 comparisons for OP0.
1100 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
1102 * LINARO-VERSION: Bump version.
1104 2014-06-12 Yvan Roux <yvan.roux@linaro.org>
1106 GCC Linaro 4.9-2014.06 released.
1107 * LINARO-VERSION: Update.
1109 2014-06-04 Yvan Roux <yvan.roux@linaro.org>
1111 Backport from trunk r211211.
1112 2014-06-04 Bin Cheng <bin.cheng@arm.com>
1114 * config/aarch64/aarch64.c (aarch64_classify_address)
1115 (aarch64_legitimize_reload_address): Support full addressing modes
1116 for vector modes.
1117 * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
1118 (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
1120 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1122 Backport from trunk r209906.
1123 2014-04-29 Alan Lawrence <alan.lawrence@arm.com>
1125 * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
1126 vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
1127 vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
1128 vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
1129 vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
1130 vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
1131 vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
1132 vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
1134 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1136 Backport from trunk r209897.
1137 2014-04-29 James Greenhalgh <james.greenhalgh@arm.com>
1139 * calls.c (initialize_argument_information): Always treat
1140 PUSH_ARGS_REVERSED as 1, simplify code accordingly.
1141 (expand_call): Likewise.
1142 (emit_library_call_calue_1): Likewise.
1143 * expr.c (PUSH_ARGS_REVERSED): Do not define.
1144 (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
1145 code accordingly.
1147 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1149 Backport from trunk r209880.
1150 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
1152 * config/aarch64/aarch64-builtins.c
1153 (aarch64_types_storestruct_lane_qualifiers): New.
1154 (TYPES_STORESTRUCT_LANE): Likewise.
1155 * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
1156 (st3_lane): Likewise.
1157 (st4_lane): Likewise.
1158 * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
1159 (vec_store_lanesci_lane<mode>): Likewise.
1160 (vec_store_lanesxi_lane<mode>): Likewise.
1161 (aarch64_st2_lane<VQ:mode>): Likewise.
1162 (aarch64_st3_lane<VQ:mode>): Likewise.
1163 (aarch64_st4_lane<VQ:mode>): Likewise.
1164 * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
1165 * config/aarch64/arm_neon.h
1166 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
1167 use new macro arguments.
1168 (__ST3_LANE_FUNC): Likewise.
1169 (__ST4_LANE_FUNC): Likewise.
1170 * config/aarch64/iterators.md (V_TWO_ELEM): New.
1171 (V_THREE_ELEM): Likewise.
1172 (V_FOUR_ELEM): Likewise.
1174 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1176 Backport from trunk r209878.
1177 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
1179 * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
1180 * config/aarch64/aarch64.c
1181 (aarch64_cannot_change_mode_class): Weaken conditions.
1182 (aarch64_modes_tieable_p): New.
1183 * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
1185 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1187 Backport from trunk r209808.
1188 2014-04-25 Jiong Wang <jiong.wang@arm.com>
1190 * config/arm/predicates.md (call_insn_operand): Add long_call check.
1191 * config/arm/arm.md (sibcall, sibcall_value): Force the address to
1192 reg for long_call.
1193 * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
1194 restriction.
1196 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1198 Backport from trunk r209806.
1199 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1201 * config/arm/arm.c (arm_cortex_a8_tune): Initialise
1202 T16-related fields.
1204 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1206 Backport from trunk r209742, 209749.
1207 2014-04-24 Alan Lawrence <alan.lawrence@arm.com>
1209 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
1211 2014-04-24 Tejas Belagod <tejas.belagod@arm.com>
1213 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
1214 for big-endian.
1216 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1218 Backport from trunk r209736.
1219 2014-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1221 * config/aarch64/aarch64-builtins.c
1222 (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
1223 BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
1224 * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
1225 * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
1226 builtins.
1227 * config/aarch64/iterator.md (VDQHSD): New mode iterator.
1228 (Vrevsuff): New mode attribute.
1230 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1232 Backport from trunk r209712.
1233 2014-04-23 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
1235 * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
1236 (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
1237 machine descriptions for Stack Smashing Protector.
1239 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1241 Backport from trunk r209711.
1242 2014-04-23 Richard Earnshaw <rearnsha@arm.com>
1244 * aarch64.md (<optab>_rol<mode>3): New pattern.
1245 (<optab>_rolsi3_uxtw): Likewise.
1246 * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
1248 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1250 Backport from trunk r209710.
1251 2014-04-23 James Greenhalgh <james.greenhalgh@arm.com>
1253 * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
1254 (arm_cortex_a12_tune): Likewise.
1256 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1258 Backport from trunk r209706.
1259 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1261 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
1263 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1265 Backport from trunk r209701, 209702, 209703, 209704, 209705.
1266 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1268 * config/arm/arm.md (arm_rev16si2): New pattern.
1269 (arm_rev16si2_alt): Likewise.
1270 * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
1272 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1273 * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
1274 (rev16<mode>2_alt): Likewise.
1275 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
1276 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
1277 (aarch_rev16_shleft_mask_imm_p): Likewise.
1278 (aarch_rev16_p_1): Likewise.
1279 (aarch_rev16_p): Likewise.
1280 * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
1281 (aarch_rev16_shright_mask_imm_p): Likewise.
1282 (aarch_rev16_shleft_mask_imm_p): Likewise.
1284 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1286 * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
1287 * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
1288 rev cost.
1289 (cortex_a53_extra_costs): Likewise.
1290 (cortex_a57_extra_costs): Likewise.
1291 * config/arm/arm.c (cortexa9_extra_costs): Likewise.
1292 (cortexa7_extra_costs): Likewise.
1293 (cortexa8_extra_costs): Likewise.
1294 (cortexa12_extra_costs): Likewise.
1295 (cortexa15_extra_costs): Likewise.
1296 (v7m_extra_costs): Likewise.
1297 (arm_new_rtx_costs): Handle BSWAP.
1299 2013-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1301 * config/arm/arm.c (cortexa8_extra_costs): New table.
1302 (arm_cortex_a8_tune): New tuning struct.
1303 * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
1305 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1307 * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
1309 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1311 Backport from trunk r209659.
1312 2014-04-22 Richard Henderson <rth@redhat.com>
1314 * config/aarch64/aarch64 (addti3, subti3): New expanders.
1315 (add<GPI>3_compare0): Remove leading * from name.
1316 (add<GPI>3_carryin): Likewise.
1317 (sub<GPI>3_compare0): Likewise.
1318 (sub<GPI>3_carryin): Likewise.
1319 (<su_optab>mulditi3): New expander.
1320 (multi3): New expander.
1321 (madd<GPI>): Remove leading * from name.
1323 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1325 Backport from trunk r209645.
1326 2014-04-22 Andrew Pinski <apinski@cavium.com>
1328 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
1329 Handle TLS for ILP32.
1330 * config/aarch64/aarch64.md (tlsie_small): Rename to ...
1331 (tlsie_small_<mode>): this and handle PTR.
1332 (tlsie_small_sidi): New pattern.
1333 (tlsle_small): Change to an expand to handle ILP32.
1334 (tlsle_small_<mode>): New pattern.
1335 (tlsdesc_small): Rename to ...
1336 (tlsdesc_small_<mode>): this and handle PTR.
1338 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1340 Backport from trunk r209643.
1341 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1343 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
1345 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1347 Backport from trunk r209641, 209642.
1348 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
1350 * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1351 (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
1352 (aarch64_types_signed_poly_qualifiers): Likewise.
1353 (aarch64_types_unsigned_signed_qualifiers): Likewise.
1354 (aarch64_types_poly_signed_qualifiers): Likewise.
1355 (TYPES_REINTERP_SS): Type macro added.
1356 (TYPES_REINTERP_SU): Likewise.
1357 (TYPES_REINTERP_SP): Likewise.
1358 (TYPES_REINTERP_US): Likewise.
1359 (TYPES_REINTERP_PS): Likewise.
1360 (aarch64_fold_builtin): New expression folding added.
1361 * config/aarch64/aarch64-simd-builtins.def (REINTERP):
1362 Declarations removed.
1363 (REINTERP_SS): Declarations added.
1364 (REINTERP_US): Likewise.
1365 (REINTERP_PS): Likewise.
1366 (REINTERP_SU): Likewise.
1367 (REINTERP_SP): Likewise.
1368 * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
1369 (vreinterpretq_p8_f64): Likewise.
1370 (vreinterpret_p16_f64): Likewise.
1371 (vreinterpretq_p16_f64): Likewise.
1372 (vreinterpret_f32_f64): Likewise.
1373 (vreinterpretq_f32_f64): Likewise.
1374 (vreinterpret_f64_f32): Likewise.
1375 (vreinterpret_f64_p8): Likewise.
1376 (vreinterpret_f64_p16): Likewise.
1377 (vreinterpret_f64_s8): Likewise.
1378 (vreinterpret_f64_s16): Likewise.
1379 (vreinterpret_f64_s32): Likewise.
1380 (vreinterpret_f64_s64): Likewise.
1381 (vreinterpret_f64_u8): Likewise.
1382 (vreinterpret_f64_u16): Likewise.
1383 (vreinterpret_f64_u32): Likewise.
1384 (vreinterpret_f64_u64): Likewise.
1385 (vreinterpretq_f64_f32): Likewise.
1386 (vreinterpretq_f64_p8): Likewise.
1387 (vreinterpretq_f64_p16): Likewise.
1388 (vreinterpretq_f64_s8): Likewise.
1389 (vreinterpretq_f64_s16): Likewise.
1390 (vreinterpretq_f64_s32): Likewise.
1391 (vreinterpretq_f64_s64): Likewise.
1392 (vreinterpretq_f64_u8): Likewise.
1393 (vreinterpretq_f64_u16): Likewise.
1394 (vreinterpretq_f64_u32): Likewise.
1395 (vreinterpretq_f64_u64): Likewise.
1396 (vreinterpret_s64_f64): Likewise.
1397 (vreinterpretq_s64_f64): Likewise.
1398 (vreinterpret_u64_f64): Likewise.
1399 (vreinterpretq_u64_f64): Likewise.
1400 (vreinterpret_s8_f64): Likewise.
1401 (vreinterpretq_s8_f64): Likewise.
1402 (vreinterpret_s16_f64): Likewise.
1403 (vreinterpretq_s16_f64): Likewise.
1404 (vreinterpret_s32_f64): Likewise.
1405 (vreinterpretq_s32_f64): Likewise.
1406 (vreinterpret_u8_f64): Likewise.
1407 (vreinterpretq_u8_f64): Likewise.
1408 (vreinterpret_u16_f64): Likewise.
1409 (vreinterpretq_u16_f64): Likewise.
1410 (vreinterpret_u32_f64): Likewise.
1411 (vreinterpretq_u32_f64): Likewise.
1413 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
1415 * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1416 * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
1417 (vreinterpret_p8_s8): Likewise.
1418 * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
1419 (vreinterpret_p8_s16): Likewise.
1420 (vreinterpret_p8_s32): Likewise.
1421 (vreinterpret_p8_s64): Likewise.
1422 (vreinterpret_p8_f32): Likewise.
1423 (vreinterpret_p8_u8): Likewise.
1424 (vreinterpret_p8_u16): Likewise.
1425 (vreinterpret_p8_u32): Likewise.
1426 (vreinterpret_p8_u64): Likewise.
1427 (vreinterpret_p8_p16): Likewise.
1428 (vreinterpretq_p8_s8): Likewise.
1429 (vreinterpretq_p8_s16): Likewise.
1430 (vreinterpretq_p8_s32): Likewise.
1431 (vreinterpretq_p8_s64): Likewise.
1432 (vreinterpretq_p8_f32): Likewise.
1433 (vreinterpretq_p8_u8): Likewise.
1434 (vreinterpretq_p8_u16): Likewise.
1435 (vreinterpretq_p8_u32): Likewise.
1436 (vreinterpretq_p8_u64): Likewise.
1437 (vreinterpretq_p8_p16): Likewise.
1438 (vreinterpret_p16_s8): Likewise.
1439 (vreinterpret_p16_s16): Likewise.
1440 (vreinterpret_p16_s32): Likewise.
1441 (vreinterpret_p16_s64): Likewise.
1442 (vreinterpret_p16_f32): Likewise.
1443 (vreinterpret_p16_u8): Likewise.
1444 (vreinterpret_p16_u16): Likewise.
1445 (vreinterpret_p16_u32): Likewise.
1446 (vreinterpret_p16_u64): Likewise.
1447 (vreinterpret_p16_p8): Likewise.
1448 (vreinterpretq_p16_s8): Likewise.
1449 (vreinterpretq_p16_s16): Likewise.
1450 (vreinterpretq_p16_s32): Likewise.
1451 (vreinterpretq_p16_s64): Likewise.
1452 (vreinterpretq_p16_f32): Likewise.
1453 (vreinterpretq_p16_u8): Likewise.
1454 (vreinterpretq_p16_u16): Likewise.
1455 (vreinterpretq_p16_u32): Likewise.
1456 (vreinterpretq_p16_u64): Likewise.
1457 (vreinterpretq_p16_p8): Likewise.
1458 (vreinterpret_f32_s8): Likewise.
1459 (vreinterpret_f32_s16): Likewise.
1460 (vreinterpret_f32_s32): Likewise.
1461 (vreinterpret_f32_s64): Likewise.
1462 (vreinterpret_f32_u8): Likewise.
1463 (vreinterpret_f32_u16): Likewise.
1464 (vreinterpret_f32_u32): Likewise.
1465 (vreinterpret_f32_u64): Likewise.
1466 (vreinterpret_f32_p8): Likewise.
1467 (vreinterpret_f32_p16): Likewise.
1468 (vreinterpretq_f32_s8): Likewise.
1469 (vreinterpretq_f32_s16): Likewise.
1470 (vreinterpretq_f32_s32): Likewise.
1471 (vreinterpretq_f32_s64): Likewise.
1472 (vreinterpretq_f32_u8): Likewise.
1473 (vreinterpretq_f32_u16): Likewise.
1474 (vreinterpretq_f32_u32): Likewise.
1475 (vreinterpretq_f32_u64): Likewise.
1476 (vreinterpretq_f32_p8): Likewise.
1477 (vreinterpretq_f32_p16): Likewise.
1478 (vreinterpret_s64_s8): Likewise.
1479 (vreinterpret_s64_s16): Likewise.
1480 (vreinterpret_s64_s32): Likewise.
1481 (vreinterpret_s64_f32): Likewise.
1482 (vreinterpret_s64_u8): Likewise.
1483 (vreinterpret_s64_u16): Likewise.
1484 (vreinterpret_s64_u32): Likewise.
1485 (vreinterpret_s64_u64): Likewise.
1486 (vreinterpret_s64_p8): Likewise.
1487 (vreinterpret_s64_p16): Likewise.
1488 (vreinterpretq_s64_s8): Likewise.
1489 (vreinterpretq_s64_s16): Likewise.
1490 (vreinterpretq_s64_s32): Likewise.
1491 (vreinterpretq_s64_f32): Likewise.
1492 (vreinterpretq_s64_u8): Likewise.
1493 (vreinterpretq_s64_u16): Likewise.
1494 (vreinterpretq_s64_u32): Likewise.
1495 (vreinterpretq_s64_u64): Likewise.
1496 (vreinterpretq_s64_p8): Likewise.
1497 (vreinterpretq_s64_p16): Likewise.
1498 (vreinterpret_u64_s8): Likewise.
1499 (vreinterpret_u64_s16): Likewise.
1500 (vreinterpret_u64_s32): Likewise.
1501 (vreinterpret_u64_s64): Likewise.
1502 (vreinterpret_u64_f32): Likewise.
1503 (vreinterpret_u64_u8): Likewise.
1504 (vreinterpret_u64_u16): Likewise.
1505 (vreinterpret_u64_u32): Likewise.
1506 (vreinterpret_u64_p8): Likewise.
1507 (vreinterpret_u64_p16): Likewise.
1508 (vreinterpretq_u64_s8): Likewise.
1509 (vreinterpretq_u64_s16): Likewise.
1510 (vreinterpretq_u64_s32): Likewise.
1511 (vreinterpretq_u64_s64): Likewise.
1512 (vreinterpretq_u64_f32): Likewise.
1513 (vreinterpretq_u64_u8): Likewise.
1514 (vreinterpretq_u64_u16): Likewise.
1515 (vreinterpretq_u64_u32): Likewise.
1516 (vreinterpretq_u64_p8): Likewise.
1517 (vreinterpretq_u64_p16): Likewise.
1518 (vreinterpret_s8_s16): Likewise.
1519 (vreinterpret_s8_s32): Likewise.
1520 (vreinterpret_s8_s64): Likewise.
1521 (vreinterpret_s8_f32): Likewise.
1522 (vreinterpret_s8_u8): Likewise.
1523 (vreinterpret_s8_u16): Likewise.
1524 (vreinterpret_s8_u32): Likewise.
1525 (vreinterpret_s8_u64): Likewise.
1526 (vreinterpret_s8_p8): Likewise.
1527 (vreinterpret_s8_p16): Likewise.
1528 (vreinterpretq_s8_s16): Likewise.
1529 (vreinterpretq_s8_s32): Likewise.
1530 (vreinterpretq_s8_s64): Likewise.
1531 (vreinterpretq_s8_f32): Likewise.
1532 (vreinterpretq_s8_u8): Likewise.
1533 (vreinterpretq_s8_u16): Likewise.
1534 (vreinterpretq_s8_u32): Likewise.
1535 (vreinterpretq_s8_u64): Likewise.
1536 (vreinterpretq_s8_p8): Likewise.
1537 (vreinterpretq_s8_p16): Likewise.
1538 (vreinterpret_s16_s8): Likewise.
1539 (vreinterpret_s16_s32): Likewise.
1540 (vreinterpret_s16_s64): Likewise.
1541 (vreinterpret_s16_f32): Likewise.
1542 (vreinterpret_s16_u8): Likewise.
1543 (vreinterpret_s16_u16): Likewise.
1544 (vreinterpret_s16_u32): Likewise.
1545 (vreinterpret_s16_u64): Likewise.
1546 (vreinterpret_s16_p8): Likewise.
1547 (vreinterpret_s16_p16): Likewise.
1548 (vreinterpretq_s16_s8): Likewise.
1549 (vreinterpretq_s16_s32): Likewise.
1550 (vreinterpretq_s16_s64): Likewise.
1551 (vreinterpretq_s16_f32): Likewise.
1552 (vreinterpretq_s16_u8): Likewise.
1553 (vreinterpretq_s16_u16): Likewise.
1554 (vreinterpretq_s16_u32): Likewise.
1555 (vreinterpretq_s16_u64): Likewise.
1556 (vreinterpretq_s16_p8): Likewise.
1557 (vreinterpretq_s16_p16): Likewise.
1558 (vreinterpret_s32_s8): Likewise.
1559 (vreinterpret_s32_s16): Likewise.
1560 (vreinterpret_s32_s64): Likewise.
1561 (vreinterpret_s32_f32): Likewise.
1562 (vreinterpret_s32_u8): Likewise.
1563 (vreinterpret_s32_u16): Likewise.
1564 (vreinterpret_s32_u32): Likewise.
1565 (vreinterpret_s32_u64): Likewise.
1566 (vreinterpret_s32_p8): Likewise.
1567 (vreinterpret_s32_p16): Likewise.
1568 (vreinterpretq_s32_s8): Likewise.
1569 (vreinterpretq_s32_s16): Likewise.
1570 (vreinterpretq_s32_s64): Likewise.
1571 (vreinterpretq_s32_f32): Likewise.
1572 (vreinterpretq_s32_u8): Likewise.
1573 (vreinterpretq_s32_u16): Likewise.
1574 (vreinterpretq_s32_u32): Likewise.
1575 (vreinterpretq_s32_u64): Likewise.
1576 (vreinterpretq_s32_p8): Likewise.
1577 (vreinterpretq_s32_p16): Likewise.
1578 (vreinterpret_u8_s8): Likewise.
1579 (vreinterpret_u8_s16): Likewise.
1580 (vreinterpret_u8_s32): Likewise.
1581 (vreinterpret_u8_s64): Likewise.
1582 (vreinterpret_u8_f32): Likewise.
1583 (vreinterpret_u8_u16): Likewise.
1584 (vreinterpret_u8_u32): Likewise.
1585 (vreinterpret_u8_u64): Likewise.
1586 (vreinterpret_u8_p8): Likewise.
1587 (vreinterpret_u8_p16): Likewise.
1588 (vreinterpretq_u8_s8): Likewise.
1589 (vreinterpretq_u8_s16): Likewise.
1590 (vreinterpretq_u8_s32): Likewise.
1591 (vreinterpretq_u8_s64): Likewise.
1592 (vreinterpretq_u8_f32): Likewise.
1593 (vreinterpretq_u8_u16): Likewise.
1594 (vreinterpretq_u8_u32): Likewise.
1595 (vreinterpretq_u8_u64): Likewise.
1596 (vreinterpretq_u8_p8): Likewise.
1597 (vreinterpretq_u8_p16): Likewise.
1598 (vreinterpret_u16_s8): Likewise.
1599 (vreinterpret_u16_s16): Likewise.
1600 (vreinterpret_u16_s32): Likewise.
1601 (vreinterpret_u16_s64): Likewise.
1602 (vreinterpret_u16_f32): Likewise.
1603 (vreinterpret_u16_u8): Likewise.
1604 (vreinterpret_u16_u32): Likewise.
1605 (vreinterpret_u16_u64): Likewise.
1606 (vreinterpret_u16_p8): Likewise.
1607 (vreinterpret_u16_p16): Likewise.
1608 (vreinterpretq_u16_s8): Likewise.
1609 (vreinterpretq_u16_s16): Likewise.
1610 (vreinterpretq_u16_s32): Likewise.
1611 (vreinterpretq_u16_s64): Likewise.
1612 (vreinterpretq_u16_f32): Likewise.
1613 (vreinterpretq_u16_u8): Likewise.
1614 (vreinterpretq_u16_u32): Likewise.
1615 (vreinterpretq_u16_u64): Likewise.
1616 (vreinterpretq_u16_p8): Likewise.
1617 (vreinterpretq_u16_p16): Likewise.
1618 (vreinterpret_u32_s8): Likewise.
1619 (vreinterpret_u32_s16): Likewise.
1620 (vreinterpret_u32_s32): Likewise.
1621 (vreinterpret_u32_s64): Likewise.
1622 (vreinterpret_u32_f32): Likewise.
1623 (vreinterpret_u32_u8): Likewise.
1624 (vreinterpret_u32_u16): Likewise.
1625 (vreinterpret_u32_u64): Likewise.
1626 (vreinterpret_u32_p8): Likewise.
1627 (vreinterpret_u32_p16): Likewise.
1628 (vreinterpretq_u32_s8): Likewise.
1629 (vreinterpretq_u32_s16): Likewise.
1630 (vreinterpretq_u32_s32): Likewise.
1631 (vreinterpretq_u32_s64): Likewise.
1632 (vreinterpretq_u32_f32): Likewise.
1633 (vreinterpretq_u32_u8): Likewise.
1634 (vreinterpretq_u32_u16): Likewise.
1635 (vreinterpretq_u32_u64): Likewise.
1636 (vreinterpretq_u32_p8): Likewise.
1637 (vreinterpretq_u32_p16): Likewise.
1639 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1641 Backport from trunk r209640.
1642 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
1644 * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
1645 Pattern extended.
1646 * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
1647 extended.
1648 (sqabs): Likewise.
1649 * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
1650 (vqnegd_s64): Likewise.
1651 (vqabs_s64): Likewise.
1652 (vqabsd_s64): Likewise.
1654 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1656 Backport from trunk r209627, 209636.
1657 2014-04-22 Renlin <renlin.li@arm.com>
1658 Jiong Wang <jiong.wang@arm.com>
1660 * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
1661 * config/aarch64/aarch64.c (aarch64_layout_frame)
1662 (aarch64_initial_elimination_offset): Likewise.
1664 2014-04-22 Marcus Shawcroft <marcus.shawcroft@arm.com>
1666 * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
1667 Fix indentation.
1669 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1671 Backport from trunk r209618.
1672 2014-04-22 Renlin Li <Renlin.Li@arm.com>
1674 * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
1675 the output asm format.
1677 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1679 Backport from trunk r209617.
1680 2014-04-22 James Greenhalgh <james.greenhalgh@arm.com>
1682 * config/aarch64/aarch64-simd.md
1683 (aarch64_cm<optab>di): Always split.
1684 (*aarch64_cm<optab>di): New.
1685 (aarch64_cmtstdi): Always split.
1686 (*aarch64_cmtstdi): New.
1688 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1690 Backport from trunk r209615.
1691 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1693 * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
1694 restrictions on core registers for DImode values in Thumb2.
1696 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1698 Backport from trunk r209613, r209614.
1699 2014-04-22 Ian Bolton <ian.bolton@arm.com>
1701 * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
1702 * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
1704 2014-04-22 Ian Bolton <ian.bolton@arm.com>
1706 * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
1707 (*iordi_notzesidi_di): Likewise.
1708 (*iordi_notsesidi_di): Likewise.
1710 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1712 Backport from trunk r209561.
1713 2014-04-22 Ian Bolton <ian.bolton@arm.com>
1715 * config/arm/arm-protos.h (tune_params): New struct members.
1716 * config/arm/arm.c: Initialise tune_params per processor.
1717 (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
1718 for speed, based on new tune_params.
1720 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1722 Backport from trunk r209559.
1723 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
1725 * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
1726 added.
1727 * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
1728 macro.
1729 * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
1730 corrected.
1731 * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
1732 * config/aarch64/arm_neon.h (vrnd_f64): Added.
1733 (vrnda_f64): Likewise.
1734 (vrndi_f64): Likewise.
1735 (vrndm_f64): Likewise.
1736 (vrndn_f64): Likewise.
1737 (vrndp_f64): Likewise.
1738 (vrndx_f64): Likewise.
1740 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1742 Backport from trunk r209419.
1743 2014-04-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1745 PR rtl-optimization/60663
1746 * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
1747 avoid 0 cost.
1749 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1751 Backport from trunk r209457.
1752 2014-04-16 Andrew Pinski <apinski@cavium.com>
1754 * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
1755 definition.
1757 2014-05-19 Yvan Roux <yvan.roux@linaro.org>
1759 * LINARO-VERSION: Bump version.
1761 2014-05-14 Yvan Roux <yvan.roux@linaro.org>
1762 GCC Linaro 4.9-2014.05 released.
1763 * LINARO-VERSION: Update.
1765 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
1767 Backport from trunk r209889.
1768 2014-04-29 Zhenqiang Chen <zhenqiang.chen@linaro.org>
1770 * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
1772 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
1774 Backport from trunk r209556.
1775 2014-04-22 Zhenqiang Chen <zhenqiang.chen@linaro.org>
1777 * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
1778 GET_MODE_SIZE argument is enum machine_mode.
1780 2014-04-28 Yvan Roux <yvan.roux@linaro.org>
1782 * LINARO-VERSION: Bump version.
1784 2014-04-22 Yvan Roux <yvan.roux@linaro.org>
1786 GCC Linaro 4.9-2014.04 released.
1787 * LINARO-VERSION: New file.
1788 * configure.ac: Add Linaro version string.