2018-05-17 Richard Biener <rguenther@suse.de>
[official-gcc.git] / gcc / testsuite / gcc.target / i386 / avx512vl-vpinsr-1.c
blob9cfab9bf542503a4f10b5e8ad089517a751d7d33
1 /* { dg-do compile { target { ! ia32 } } } */
2 /* { dg-options "-O2 -mavx512vl -mno-avx512bw -mno-avx512dq" } */
4 typedef char v16qi __attribute__((vector_size (16)));
5 typedef short v8hi __attribute__((vector_size (16)));
6 typedef int v4si __attribute__((vector_size (16)));
7 typedef long long v2di __attribute__((vector_size (16)));
9 v16qi
10 f1 (v16qi a, char b)
12 register v16qi c __asm ("xmm16") = a;
13 asm volatile ("" : "+v" (c));
14 v16qi d = c;
15 ((char *) &d)[3] = b;
16 c = d;
17 asm volatile ("" : "+v" (c));
18 return c;
21 /* { dg-final { scan-assembler-not "vpinsrb\[^\n\r]*xmm16" } } */
23 v8hi
24 f2 (v8hi a, short b)
26 register v8hi c __asm ("xmm16") = a;
27 asm volatile ("" : "+v" (c));
28 v8hi d = c;
29 ((short *) &d)[3] = b;
30 c = d;
31 asm volatile ("" : "+v" (c));
32 return c;
35 /* { dg-final { scan-assembler-not "vpinsrw\[^\n\r]*xmm16" } } */
37 v4si
38 f3 (v4si a, int b)
40 register v4si c __asm ("xmm16") = a;
41 asm volatile ("" : "+v" (c));
42 v4si d = c;
43 ((int *) &d)[3] = b;
44 c = d;
45 asm volatile ("" : "+v" (c));
46 return c;
49 /* { dg-final { scan-assembler-not "vpinsrd\[^\n\r]*xmm16" } } */
51 v2di
52 f4 (v2di a, char b)
54 register v2di c __asm ("xmm16") = a;
55 asm volatile ("" : "+v" (c));
56 v2di d = c;
57 ((long long *) &d)[1] = b;
58 c = d;
59 asm volatile ("" : "+v" (c));
60 return c;
63 /* { dg-final { scan-assembler-not "vpinsrq\[^\n\r]*xmm16" } } */