1 /* If-conversion support.
2 Copyright (C) 2000-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
49 #ifndef MAX_CONDITIONAL_EXECUTE
50 #define MAX_CONDITIONAL_EXECUTE \
51 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
55 #define IFCVT_MULTIPLE_DUMPS 1
57 #define NULL_BLOCK ((basic_block) NULL)
59 /* True if after combine pass. */
60 static bool ifcvt_after_combine
;
62 /* True if the target has the cbranchcc4 optab. */
63 static bool have_cbranchcc4
;
65 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
66 static int num_possible_if_blocks
;
68 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
70 static int num_updated_if_blocks
;
72 /* # of changes made. */
73 static int num_true_changes
;
75 /* Whether conditional execution changes were made. */
76 static int cond_exec_changed_p
;
78 /* Forward references. */
79 static int count_bb_insns (const_basic_block
);
80 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
81 static rtx_insn
*first_active_insn (basic_block
);
82 static rtx_insn
*last_active_insn (basic_block
, int);
83 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
84 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
85 static basic_block
block_fallthru (basic_block
);
86 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
88 static rtx
cond_exec_get_condition (rtx_insn
*);
89 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
90 static int noce_operand_ok (const_rtx
);
91 static void merge_if_block (ce_if_block
*);
92 static int find_cond_trap (basic_block
, edge
, edge
);
93 static basic_block
find_if_header (basic_block
, int);
94 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
95 static int noce_find_if_block (basic_block
, edge
, edge
, int);
96 static int cond_exec_find_if_block (ce_if_block
*);
97 static int find_if_case_1 (basic_block
, edge
, edge
);
98 static int find_if_case_2 (basic_block
, edge
, edge
);
99 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
101 static void noce_emit_move_insn (rtx
, rtx
);
102 static rtx_insn
*block_has_only_trap (basic_block
);
104 /* Count the number of non-jump active insns in BB. */
107 count_bb_insns (const_basic_block bb
)
110 rtx_insn
*insn
= BB_HEAD (bb
);
114 if (active_insn_p (insn
) && !JUMP_P (insn
))
117 if (insn
== BB_END (bb
))
119 insn
= NEXT_INSN (insn
);
125 /* Determine whether the total insn_rtx_cost on non-jump insns in
126 basic block BB is less than MAX_COST. This function returns
127 false if the cost of any instruction could not be estimated.
129 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
130 as those insns are being speculated. MAX_COST is scaled with SCALE
131 plus a small fudge factor. */
134 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
137 rtx_insn
*insn
= BB_HEAD (bb
);
138 bool speed
= optimize_bb_for_speed_p (bb
);
140 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
141 applied to insn_rtx_cost when optimizing for size. Only do
142 this after combine because if-conversion might interfere with
143 passes before combine.
145 Use optimize_function_for_speed_p instead of the pre-defined
146 variable speed to make sure it is set to same value for all
147 basic blocks in one if-conversion transformation. */
148 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
149 scale
= REG_BR_PROB_BASE
;
150 /* Our branch probability/scaling factors are just estimates and don't
151 account for cases where we can get speculation for free and other
152 secondary benefits. So we fudge the scale factor to make speculating
153 appear a little more profitable when optimizing for performance. */
155 scale
+= REG_BR_PROB_BASE
/ 8;
162 if (NONJUMP_INSN_P (insn
))
164 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
168 /* If this instruction is the load or set of a "stack" register,
169 such as a floating point register on x87, then the cost of
170 speculatively executing this insn may need to include
171 the additional cost of popping its result off of the
172 register stack. Unfortunately, correctly recognizing and
173 accounting for this additional overhead is tricky, so for
174 now we simply prohibit such speculative execution. */
177 rtx set
= single_set (insn
);
178 if (set
&& STACK_REG_P (SET_DEST (set
)))
184 if (count
>= max_cost
)
187 else if (CALL_P (insn
))
190 if (insn
== BB_END (bb
))
192 insn
= NEXT_INSN (insn
);
198 /* Return the first non-jump active insn in the basic block. */
201 first_active_insn (basic_block bb
)
203 rtx_insn
*insn
= BB_HEAD (bb
);
207 if (insn
== BB_END (bb
))
209 insn
= NEXT_INSN (insn
);
212 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
214 if (insn
== BB_END (bb
))
216 insn
= NEXT_INSN (insn
);
225 /* Return the last non-jump active (non-jump) insn in the basic block. */
228 last_active_insn (basic_block bb
, int skip_use_p
)
230 rtx_insn
*insn
= BB_END (bb
);
231 rtx_insn
*head
= BB_HEAD (bb
);
235 || DEBUG_INSN_P (insn
)
237 && NONJUMP_INSN_P (insn
)
238 && GET_CODE (PATTERN (insn
)) == USE
))
242 insn
= PREV_INSN (insn
);
251 /* Return the active insn before INSN inside basic block CURR_BB. */
254 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
256 if (!insn
|| insn
== BB_HEAD (curr_bb
))
259 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
261 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
264 /* No other active insn all the way to the start of the basic block. */
265 if (insn
== BB_HEAD (curr_bb
))
272 /* Return the active insn after INSN inside basic block CURR_BB. */
275 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
277 if (!insn
|| insn
== BB_END (curr_bb
))
280 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
282 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
285 /* No other active insn all the way to the end of the basic block. */
286 if (insn
== BB_END (curr_bb
))
293 /* Return the basic block reached by falling though the basic block BB. */
296 block_fallthru (basic_block bb
)
298 edge e
= find_fallthru_edge (bb
->succs
);
300 return (e
) ? e
->dest
: NULL_BLOCK
;
303 /* Return true if RTXs A and B can be safely interchanged. */
306 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
308 if (!rtx_equal_p (a
, b
))
311 if (GET_CODE (a
) != MEM
)
314 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
315 reference is not. Interchanging a dead type-unsafe memory reference with
316 a live type-safe one creates a live type-unsafe memory reference, in other
317 words, it makes the program illegal.
318 We check here conservatively whether the two memory references have equal
319 memory attributes. */
321 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
325 /* Go through a bunch of insns, converting them to conditional
326 execution format if possible. Return TRUE if all of the non-note
327 insns were processed. */
330 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
331 /* if block information */rtx_insn
*start
,
332 /* first insn to look at */rtx end
,
333 /* last insn to look at */rtx test
,
334 /* conditional execution test */int prob_val
,
335 /* probability of branch taken. */int mod_ok
)
337 int must_be_last
= FALSE
;
345 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
347 /* dwarf2out can't cope with conditional prologues. */
348 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
351 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
354 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
356 /* dwarf2out can't cope with conditional unwind info. */
357 if (RTX_FRAME_RELATED_P (insn
))
360 /* Remove USE insns that get in the way. */
361 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
363 /* ??? Ug. Actually unlinking the thing is problematic,
364 given what we'd have to coordinate with our callers. */
365 SET_INSN_DELETED (insn
);
369 /* Last insn wasn't last? */
373 if (modified_in_p (test
, insn
))
380 /* Now build the conditional form of the instruction. */
381 pattern
= PATTERN (insn
);
382 xtest
= copy_rtx (test
);
384 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
386 if (GET_CODE (pattern
) == COND_EXEC
)
388 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
391 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
392 COND_EXEC_TEST (pattern
));
393 pattern
= COND_EXEC_CODE (pattern
);
396 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
398 /* If the machine needs to modify the insn being conditionally executed,
399 say for example to force a constant integer operand into a temp
400 register, do so here. */
401 #ifdef IFCVT_MODIFY_INSN
402 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
407 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
409 if (CALL_P (insn
) && prob_val
>= 0)
410 validate_change (insn
, ®_NOTES (insn
),
411 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
412 prob_val
, REG_NOTES (insn
)), 1);
422 /* Return the condition for a jump. Do not do any special processing. */
425 cond_exec_get_condition (rtx_insn
*jump
)
429 if (any_condjump_p (jump
))
430 test_if
= SET_SRC (pc_set (jump
));
433 cond
= XEXP (test_if
, 0);
435 /* If this branches to JUMP_LABEL when the condition is false,
436 reverse the condition. */
437 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
438 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
440 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
444 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
451 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
452 to conditional execution. Return TRUE if we were successful at
453 converting the block. */
456 cond_exec_process_if_block (ce_if_block
* ce_info
,
457 /* if block information */int do_multiple_p
)
459 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
460 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
461 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
462 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
463 rtx_insn
*then_start
; /* first insn in THEN block */
464 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
465 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
466 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
467 int max
; /* max # of insns to convert. */
468 int then_mod_ok
; /* whether conditional mods are ok in THEN */
469 rtx true_expr
; /* test for else block insns */
470 rtx false_expr
; /* test for then block insns */
471 int true_prob_val
; /* probability of else block */
472 int false_prob_val
; /* probability of then block */
473 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
474 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
475 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
476 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
477 int then_n_insns
, else_n_insns
, n_insns
;
478 enum rtx_code false_code
;
481 /* If test is comprised of && or || elements, and we've failed at handling
482 all of them together, just use the last test if it is the special case of
483 && elements without an ELSE block. */
484 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
486 if (else_bb
|| ! ce_info
->and_and_p
)
489 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
490 ce_info
->num_multiple_test_blocks
= 0;
491 ce_info
->num_and_and_blocks
= 0;
492 ce_info
->num_or_or_blocks
= 0;
495 /* Find the conditional jump to the ELSE or JOIN part, and isolate
497 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
501 /* If the conditional jump is more than just a conditional jump,
502 then we can not do conditional execution conversion on this block. */
503 if (! onlyjump_p (BB_END (test_bb
)))
506 /* Collect the bounds of where we're to search, skipping any labels, jumps
507 and notes at the beginning and end of the block. Then count the total
508 number of insns and see if it is small enough to convert. */
509 then_start
= first_active_insn (then_bb
);
510 then_end
= last_active_insn (then_bb
, TRUE
);
511 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
512 n_insns
= then_n_insns
;
513 max
= MAX_CONDITIONAL_EXECUTE
;
520 else_start
= first_active_insn (else_bb
);
521 else_end
= last_active_insn (else_bb
, TRUE
);
522 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
523 n_insns
+= else_n_insns
;
525 /* Look for matching sequences at the head and tail of the two blocks,
526 and limit the range of insns to be converted if possible. */
527 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
528 &then_first_tail
, &else_first_tail
,
530 if (then_first_tail
== BB_HEAD (then_bb
))
531 then_start
= then_end
= NULL
;
532 if (else_first_tail
== BB_HEAD (else_bb
))
533 else_start
= else_end
= NULL
;
538 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
540 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
541 n_insns
-= 2 * n_matching
;
546 && then_n_insns
> n_matching
547 && else_n_insns
> n_matching
)
549 int longest_match
= MIN (then_n_insns
- n_matching
,
550 else_n_insns
- n_matching
);
552 = flow_find_head_matching_sequence (then_bb
, else_bb
,
561 /* We won't pass the insns in the head sequence to
562 cond_exec_process_insns, so we need to test them here
563 to make sure that they don't clobber the condition. */
564 for (insn
= BB_HEAD (then_bb
);
565 insn
!= NEXT_INSN (then_last_head
);
566 insn
= NEXT_INSN (insn
))
567 if (!LABEL_P (insn
) && !NOTE_P (insn
)
568 && !DEBUG_INSN_P (insn
)
569 && modified_in_p (test_expr
, insn
))
573 if (then_last_head
== then_end
)
574 then_start
= then_end
= NULL
;
575 if (else_last_head
== else_end
)
576 else_start
= else_end
= NULL
;
581 then_start
= find_active_insn_after (then_bb
, then_last_head
);
583 else_start
= find_active_insn_after (else_bb
, else_last_head
);
584 n_insns
-= 2 * n_matching
;
592 /* Map test_expr/test_jump into the appropriate MD tests to use on
593 the conditionally executed code. */
595 true_expr
= test_expr
;
597 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
598 if (false_code
!= UNKNOWN
)
599 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
600 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
602 false_expr
= NULL_RTX
;
604 #ifdef IFCVT_MODIFY_TESTS
605 /* If the machine description needs to modify the tests, such as setting a
606 conditional execution register from a comparison, it can do so here. */
607 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
609 /* See if the conversion failed. */
610 if (!true_expr
|| !false_expr
)
614 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
617 true_prob_val
= XINT (note
, 0);
618 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
626 /* If we have && or || tests, do them here. These tests are in the adjacent
627 blocks after the first block containing the test. */
628 if (ce_info
->num_multiple_test_blocks
> 0)
630 basic_block bb
= test_bb
;
631 basic_block last_test_bb
= ce_info
->last_test_bb
;
638 rtx_insn
*start
, *end
;
640 enum rtx_code f_code
;
642 bb
= block_fallthru (bb
);
643 start
= first_active_insn (bb
);
644 end
= last_active_insn (bb
, TRUE
);
646 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
647 false_prob_val
, FALSE
))
650 /* If the conditional jump is more than just a conditional jump, then
651 we can not do conditional execution conversion on this block. */
652 if (! onlyjump_p (BB_END (bb
)))
655 /* Find the conditional jump and isolate the test. */
656 t
= cond_exec_get_condition (BB_END (bb
));
660 f_code
= reversed_comparison_code (t
, BB_END (bb
));
661 if (f_code
== UNKNOWN
)
664 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
665 if (ce_info
->and_and_p
)
667 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
668 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
672 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
673 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
676 /* If the machine description needs to modify the tests, such as
677 setting a conditional execution register from a comparison, it can
679 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
680 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
682 /* See if the conversion failed. */
690 while (bb
!= last_test_bb
);
693 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
694 on then THEN block. */
695 then_mod_ok
= (else_bb
== NULL_BLOCK
);
697 /* Go through the THEN and ELSE blocks converting the insns if possible
698 to conditional execution. */
702 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
703 false_expr
, false_prob_val
,
707 if (else_bb
&& else_end
708 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
709 true_expr
, true_prob_val
, TRUE
))
712 /* If we cannot apply the changes, fail. Do not go through the normal fail
713 processing, since apply_change_group will call cancel_changes. */
714 if (! apply_change_group ())
716 #ifdef IFCVT_MODIFY_CANCEL
717 /* Cancel any machine dependent changes. */
718 IFCVT_MODIFY_CANCEL (ce_info
);
723 #ifdef IFCVT_MODIFY_FINAL
724 /* Do any machine dependent final modifications. */
725 IFCVT_MODIFY_FINAL (ce_info
);
728 /* Conversion succeeded. */
730 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
731 n_insns
, (n_insns
== 1) ? " was" : "s were");
733 /* Merge the blocks! If we had matching sequences, make sure to delete one
734 copy at the appropriate location first: delete the copy in the THEN branch
735 for a tail sequence so that the remaining one is executed last for both
736 branches, and delete the copy in the ELSE branch for a head sequence so
737 that the remaining one is executed first for both branches. */
740 rtx_insn
*from
= then_first_tail
;
742 from
= find_active_insn_after (then_bb
, from
);
743 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
746 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
748 merge_if_block (ce_info
);
749 cond_exec_changed_p
= TRUE
;
753 #ifdef IFCVT_MODIFY_CANCEL
754 /* Cancel any machine dependent changes. */
755 IFCVT_MODIFY_CANCEL (ce_info
);
762 /* Used by noce_process_if_block to communicate with its subroutines.
764 The subroutines know that A and B may be evaluated freely. They
765 know that X is a register. They should insert new instructions
766 before cond_earliest. */
770 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
771 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
773 /* The jump that ends TEST_BB. */
776 /* The jump condition. */
779 /* New insns should be inserted before this one. */
780 rtx_insn
*cond_earliest
;
782 /* Insns in the THEN and ELSE block. There is always just this
783 one insns in those blocks. The insns are single_set insns.
784 If there was no ELSE block, INSN_B is the last insn before
785 COND_EARLIEST, or NULL_RTX. In the former case, the insn
786 operands are still valid, as if INSN_B was moved down below
788 rtx_insn
*insn_a
, *insn_b
;
790 /* The SET_SRC of INSN_A and INSN_B. */
793 /* The SET_DEST of INSN_A. */
796 /* The original set destination that the THEN and ELSE basic blocks finally
797 write their result to. */
799 /* True if this if block is not canonical. In the canonical form of
800 if blocks, the THEN_BB is the block reached via the fallthru edge
801 from TEST_BB. For the noce transformations, we allow the symmetric
803 bool then_else_reversed
;
805 /* True if the contents of then_bb and else_bb are a
806 simple single set instruction. */
810 /* The total rtx cost of the instructions in then_bb and else_bb. */
811 unsigned int then_cost
;
812 unsigned int else_cost
;
814 /* Estimated cost of the particular branch instruction. */
815 unsigned int branch_cost
;
818 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
819 static int noce_try_move (struct noce_if_info
*);
820 static int noce_try_store_flag (struct noce_if_info
*);
821 static int noce_try_addcc (struct noce_if_info
*);
822 static int noce_try_store_flag_constants (struct noce_if_info
*);
823 static int noce_try_store_flag_mask (struct noce_if_info
*);
824 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
826 static int noce_try_cmove (struct noce_if_info
*);
827 static int noce_try_cmove_arith (struct noce_if_info
*);
828 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
829 static int noce_try_minmax (struct noce_if_info
*);
830 static int noce_try_abs (struct noce_if_info
*);
831 static int noce_try_sign_mask (struct noce_if_info
*);
833 /* Helper function for noce_try_store_flag*. */
836 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
839 rtx cond
= if_info
->cond
;
843 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
844 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
846 /* If earliest == jump, or when the condition is complex, try to
847 build the store_flag insn directly. */
851 rtx set
= pc_set (if_info
->jump
);
852 cond
= XEXP (SET_SRC (set
), 0);
853 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
854 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
855 reversep
= !reversep
;
856 if (if_info
->then_else_reversed
)
857 reversep
= !reversep
;
861 code
= reversed_comparison_code (cond
, if_info
->jump
);
863 code
= GET_CODE (cond
);
865 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
866 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
868 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
870 rtx set
= gen_rtx_SET (x
, src
);
873 rtx_insn
*insn
= emit_insn (set
);
875 if (recog_memoized (insn
) >= 0)
877 rtx_insn
*seq
= get_insns ();
881 if_info
->cond_earliest
= if_info
->jump
;
889 /* Don't even try if the comparison operands or the mode of X are weird. */
890 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
893 return emit_store_flag (x
, code
, XEXP (cond
, 0),
894 XEXP (cond
, 1), VOIDmode
,
895 (code
== LTU
|| code
== LEU
896 || code
== GEU
|| code
== GTU
), normalize
);
899 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
900 X is the destination/target and Y is the value to copy. */
903 noce_emit_move_insn (rtx x
, rtx y
)
905 machine_mode outmode
;
909 if (GET_CODE (x
) != STRICT_LOW_PART
)
911 rtx_insn
*seq
, *insn
;
916 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
917 otherwise construct a suitable SET pattern ourselves. */
918 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
919 ? emit_move_insn (x
, y
)
920 : emit_insn (gen_rtx_SET (x
, y
));
924 if (recog_memoized (insn
) <= 0)
926 if (GET_CODE (x
) == ZERO_EXTRACT
)
928 rtx op
= XEXP (x
, 0);
929 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
930 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
932 /* store_bit_field expects START to be relative to
933 BYTES_BIG_ENDIAN and adjusts this value for machines with
934 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
935 invoke store_bit_field again it is necessary to have the START
936 value from the first call. */
937 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
940 start
= BITS_PER_UNIT
- start
- size
;
943 gcc_assert (REG_P (op
));
944 start
= BITS_PER_WORD
- start
- size
;
948 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
949 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
953 switch (GET_RTX_CLASS (GET_CODE (y
)))
956 ot
= code_to_optab (GET_CODE (y
));
960 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
961 if (target
!= NULL_RTX
)
964 emit_move_insn (x
, target
);
973 ot
= code_to_optab (GET_CODE (y
));
977 target
= expand_binop (GET_MODE (y
), ot
,
978 XEXP (y
, 0), XEXP (y
, 1),
980 if (target
!= NULL_RTX
)
983 emit_move_insn (x
, target
);
1000 inner
= XEXP (outer
, 0);
1001 outmode
= GET_MODE (outer
);
1002 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1003 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1004 0, 0, outmode
, y
, false);
1007 /* Return the CC reg if it is used in COND. */
1010 cc_in_cond (rtx cond
)
1012 if (have_cbranchcc4
&& cond
1013 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1014 return XEXP (cond
, 0);
1019 /* Return sequence of instructions generated by if conversion. This
1020 function calls end_sequence() to end the current stream, ensures
1021 that the instructions are unshared, recognizable non-jump insns.
1022 On failure, this function returns a NULL_RTX. */
1025 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1028 rtx_insn
*seq
= get_insns ();
1029 rtx cc
= cc_in_cond (if_info
->cond
);
1031 set_used_flags (if_info
->x
);
1032 set_used_flags (if_info
->cond
);
1033 set_used_flags (if_info
->a
);
1034 set_used_flags (if_info
->b
);
1036 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1037 set_used_flags (insn
);
1039 unshare_all_rtl_in_chain (seq
);
1042 /* Make sure that all of the instructions emitted are recognizable,
1043 and that we haven't introduced a new jump instruction.
1044 As an exercise for the reader, build a general mechanism that
1045 allows proper placement of required clobbers. */
1046 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1048 || recog_memoized (insn
) == -1
1049 /* Make sure new generated code does not clobber CC. */
1050 || (cc
&& set_of (cc
, insn
)))
1056 /* Return true iff the then and else basic block (if it exists)
1057 consist of a single simple set instruction. */
1060 noce_simple_bbs (struct noce_if_info
*if_info
)
1062 if (!if_info
->then_simple
)
1065 if (if_info
->else_bb
)
1066 return if_info
->else_simple
;
1071 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1072 "if (a == b) x = a; else x = b" into "x = b". */
1075 noce_try_move (struct noce_if_info
*if_info
)
1077 rtx cond
= if_info
->cond
;
1078 enum rtx_code code
= GET_CODE (cond
);
1082 if (code
!= NE
&& code
!= EQ
)
1085 if (!noce_simple_bbs (if_info
))
1088 /* This optimization isn't valid if either A or B could be a NaN
1089 or a signed zero. */
1090 if (HONOR_NANS (if_info
->x
)
1091 || HONOR_SIGNED_ZEROS (if_info
->x
))
1094 /* Check whether the operands of the comparison are A and in
1096 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1097 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1098 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1099 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1101 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1104 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1106 /* Avoid generating the move if the source is the destination. */
1107 if (! rtx_equal_p (if_info
->x
, y
))
1110 noce_emit_move_insn (if_info
->x
, y
);
1111 seq
= end_ifcvt_sequence (if_info
);
1115 emit_insn_before_setloc (seq
, if_info
->jump
,
1116 INSN_LOCATION (if_info
->insn_a
));
1123 /* Convert "if (test) x = 1; else x = 0".
1125 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1126 tried in noce_try_store_flag_constants after noce_try_cmove has had
1127 a go at the conversion. */
1130 noce_try_store_flag (struct noce_if_info
*if_info
)
1136 if (!noce_simple_bbs (if_info
))
1139 if (CONST_INT_P (if_info
->b
)
1140 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1141 && if_info
->a
== const0_rtx
)
1143 else if (if_info
->b
== const0_rtx
1144 && CONST_INT_P (if_info
->a
)
1145 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1146 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1154 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1157 if (target
!= if_info
->x
)
1158 noce_emit_move_insn (if_info
->x
, target
);
1160 seq
= end_ifcvt_sequence (if_info
);
1164 emit_insn_before_setloc (seq
, if_info
->jump
,
1165 INSN_LOCATION (if_info
->insn_a
));
1176 /* Convert "if (test) x = -A; else x = A" into
1177 x = A; if (test) x = -x if the machine can do the
1178 conditional negate form of this cheaply.
1179 Try this before noce_try_cmove that will just load the
1180 immediates into two registers and do a conditional select
1181 between them. If the target has a conditional negate or
1182 conditional invert operation we can save a potentially
1183 expensive constant synthesis. */
1186 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1188 if (!noce_simple_bbs (if_info
))
1191 if (!CONST_INT_P (if_info
->a
)
1192 || !CONST_INT_P (if_info
->b
)
1193 || !REG_P (if_info
->x
))
1196 machine_mode mode
= GET_MODE (if_info
->x
);
1198 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1199 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1201 rtx cond
= if_info
->cond
;
1209 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1211 else if (val_a
== ~val_b
)
1219 rtx tmp
= gen_reg_rtx (mode
);
1220 noce_emit_move_insn (tmp
, if_info
->a
);
1222 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1226 rtx_insn
*seq
= get_insns ();
1234 if (target
!= if_info
->x
)
1235 noce_emit_move_insn (if_info
->x
, target
);
1237 seq
= end_ifcvt_sequence (if_info
);
1242 emit_insn_before_setloc (seq
, if_info
->jump
,
1243 INSN_LOCATION (if_info
->insn_a
));
1252 /* Convert "if (test) x = a; else x = b", for A and B constant.
1253 Also allow A = y + c1, B = y + c2, with a common y between A
1257 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1262 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1265 machine_mode mode
= GET_MODE (if_info
->x
);;
1266 rtx common
= NULL_RTX
;
1271 /* Handle cases like x := test ? y + 3 : y + 4. */
1272 if (GET_CODE (a
) == PLUS
1273 && GET_CODE (b
) == PLUS
1274 && CONST_INT_P (XEXP (a
, 1))
1275 && CONST_INT_P (XEXP (b
, 1))
1276 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1277 /* Allow expressions that are not using the result or plain
1278 registers where we handle overlap below. */
1279 && (REG_P (XEXP (a
, 0))
1280 || ! reg_overlap_mentioned_p (if_info
->x
, XEXP (a
, 0)))
1281 && if_info
->branch_cost
>= 2)
1283 common
= XEXP (a
, 0);
1288 if (!noce_simple_bbs (if_info
))
1294 ifalse
= INTVAL (a
);
1296 bool subtract_flag_p
= false;
1298 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1299 /* Make sure we can represent the difference between the two values. */
1301 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1304 diff
= trunc_int_for_mode (diff
, mode
);
1306 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1310 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1313 /* We could collapse these cases but it is easier to follow the
1314 diff/STORE_FLAG_VALUE combinations when they are listed
1318 => 4 + (test != 0). */
1319 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1322 => can_reverse | 4 + (test == 0)
1323 !can_reverse | 3 - (test != 0). */
1324 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1326 reversep
= can_reverse
;
1327 subtract_flag_p
= !can_reverse
;
1328 /* If we need to subtract the flag and we have PLUS-immediate
1329 A and B then it is unlikely to be beneficial to play tricks
1331 if (subtract_flag_p
&& common
)
1335 => can_reverse | 3 + (test == 0)
1336 !can_reverse | 4 - (test != 0). */
1337 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1339 reversep
= can_reverse
;
1340 subtract_flag_p
= !can_reverse
;
1341 /* If we need to subtract the flag and we have PLUS-immediate
1342 A and B then it is unlikely to be beneficial to play tricks
1344 if (subtract_flag_p
&& common
)
1348 => 4 + (test != 0). */
1349 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1354 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1355 && (STORE_FLAG_VALUE
== 1
1356 || if_info
->branch_cost
>= 2))
1358 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1359 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1364 else if (itrue
== -1
1365 && (STORE_FLAG_VALUE
== -1
1366 || if_info
->branch_cost
>= 2))
1368 else if (ifalse
== -1 && can_reverse
1369 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1379 std::swap (itrue
, ifalse
);
1380 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1385 /* If we have x := test ? x + 3 : x + 4 then move the original
1386 x out of the way while we store flags. */
1387 if (common
&& rtx_equal_p (common
, if_info
->x
))
1389 common
= gen_reg_rtx (mode
);
1390 noce_emit_move_insn (common
, if_info
->x
);
1393 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1400 /* if (test) x = 3; else x = 4;
1401 => x = 3 + (test == 0); */
1402 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1404 /* Add the common part now. This may allow combine to merge this
1405 with the store flag operation earlier into some sort of conditional
1406 increment/decrement if the target allows it. */
1408 target
= expand_simple_binop (mode
, PLUS
,
1410 target
, 0, OPTAB_WIDEN
);
1412 /* Always use ifalse here. It should have been swapped with itrue
1413 when appropriate when reversep is true. */
1414 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1415 gen_int_mode (ifalse
, mode
), target
,
1416 if_info
->x
, 0, OPTAB_WIDEN
);
1418 /* Other cases are not beneficial when the original A and B are PLUS
1425 /* if (test) x = 8; else x = 0;
1426 => x = (test != 0) << 3; */
1427 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1429 target
= expand_simple_binop (mode
, ASHIFT
,
1430 target
, GEN_INT (tmp
), if_info
->x
, 0,
1434 /* if (test) x = -1; else x = b;
1435 => x = -(test != 0) | b; */
1436 else if (itrue
== -1)
1438 target
= expand_simple_binop (mode
, IOR
,
1439 target
, gen_int_mode (ifalse
, mode
),
1440 if_info
->x
, 0, OPTAB_WIDEN
);
1454 if (target
!= if_info
->x
)
1455 noce_emit_move_insn (if_info
->x
, target
);
1457 seq
= end_ifcvt_sequence (if_info
);
1461 emit_insn_before_setloc (seq
, if_info
->jump
,
1462 INSN_LOCATION (if_info
->insn_a
));
1469 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1470 similarly for "foo--". */
1473 noce_try_addcc (struct noce_if_info
*if_info
)
1477 int subtract
, normalize
;
1479 if (!noce_simple_bbs (if_info
))
1482 if (GET_CODE (if_info
->a
) == PLUS
1483 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1484 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1487 rtx cond
= if_info
->cond
;
1488 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1490 /* First try to use addcc pattern. */
1491 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1492 && general_operand (XEXP (cond
, 1), VOIDmode
))
1495 target
= emit_conditional_add (if_info
->x
, code
,
1500 XEXP (if_info
->a
, 1),
1501 GET_MODE (if_info
->x
),
1502 (code
== LTU
|| code
== GEU
1503 || code
== LEU
|| code
== GTU
));
1506 if (target
!= if_info
->x
)
1507 noce_emit_move_insn (if_info
->x
, target
);
1509 seq
= end_ifcvt_sequence (if_info
);
1513 emit_insn_before_setloc (seq
, if_info
->jump
,
1514 INSN_LOCATION (if_info
->insn_a
));
1520 /* If that fails, construct conditional increment or decrement using
1522 if (if_info
->branch_cost
>= 2
1523 && (XEXP (if_info
->a
, 1) == const1_rtx
1524 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1527 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1528 subtract
= 0, normalize
= 0;
1529 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1530 subtract
= 1, normalize
= 0;
1532 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1535 target
= noce_emit_store_flag (if_info
,
1536 gen_reg_rtx (GET_MODE (if_info
->x
)),
1540 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1541 subtract
? MINUS
: PLUS
,
1542 if_info
->b
, target
, if_info
->x
,
1546 if (target
!= if_info
->x
)
1547 noce_emit_move_insn (if_info
->x
, target
);
1549 seq
= end_ifcvt_sequence (if_info
);
1553 emit_insn_before_setloc (seq
, if_info
->jump
,
1554 INSN_LOCATION (if_info
->insn_a
));
1564 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1567 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1573 if (!noce_simple_bbs (if_info
))
1577 if ((if_info
->branch_cost
>= 2
1578 || STORE_FLAG_VALUE
== -1)
1579 && ((if_info
->a
== const0_rtx
1580 && rtx_equal_p (if_info
->b
, if_info
->x
))
1581 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1584 && if_info
->b
== const0_rtx
1585 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1588 target
= noce_emit_store_flag (if_info
,
1589 gen_reg_rtx (GET_MODE (if_info
->x
)),
1592 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1594 target
, if_info
->x
, 0,
1599 int old_cost
, new_cost
, insn_cost
;
1602 if (target
!= if_info
->x
)
1603 noce_emit_move_insn (if_info
->x
, target
);
1605 seq
= end_ifcvt_sequence (if_info
);
1609 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1610 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1611 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1612 new_cost
= seq_cost (seq
, speed_p
);
1614 if (new_cost
> old_cost
)
1617 emit_insn_before_setloc (seq
, if_info
->jump
,
1618 INSN_LOCATION (if_info
->insn_a
));
1628 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1631 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1632 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1634 rtx target ATTRIBUTE_UNUSED
;
1635 int unsignedp ATTRIBUTE_UNUSED
;
1637 /* If earliest == jump, try to build the cmove insn directly.
1638 This is helpful when combine has created some complex condition
1639 (like for alpha's cmovlbs) that we can't hope to regenerate
1640 through the normal interface. */
1642 if (if_info
->cond_earliest
== if_info
->jump
)
1644 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1645 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1646 cond
, vtrue
, vfalse
);
1647 rtx set
= gen_rtx_SET (x
, if_then_else
);
1650 rtx_insn
*insn
= emit_insn (set
);
1652 if (recog_memoized (insn
) >= 0)
1654 rtx_insn
*seq
= get_insns ();
1664 /* Don't even try if the comparison operands are weird
1665 except that the target supports cbranchcc4. */
1666 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1667 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1669 if (!have_cbranchcc4
1670 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1671 || cmp_b
!= const0_rtx
)
1675 unsignedp
= (code
== LTU
|| code
== GEU
1676 || code
== LEU
|| code
== GTU
);
1678 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1679 vtrue
, vfalse
, GET_MODE (x
),
1684 /* We might be faced with a situation like:
1687 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1688 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1690 We can't do a conditional move in mode M, but it's possible that we
1691 could do a conditional move in mode N instead and take a subreg of
1694 If we can't create new pseudos, though, don't bother. */
1695 if (reload_completed
)
1698 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1700 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1701 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1702 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1703 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1704 rtx promoted_target
;
1706 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1707 || byte_vtrue
!= byte_vfalse
1708 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1709 != SUBREG_PROMOTED_VAR_P (vfalse
))
1710 || (SUBREG_PROMOTED_GET (vtrue
)
1711 != SUBREG_PROMOTED_GET (vfalse
)))
1714 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1716 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1717 VOIDmode
, reg_vtrue
, reg_vfalse
,
1718 GET_MODE (reg_vtrue
), unsignedp
);
1719 /* Nope, couldn't do it in that mode either. */
1723 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1724 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1725 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1726 emit_move_insn (x
, target
);
1733 /* Try only simple constants and registers here. More complex cases
1734 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1735 has had a go at it. */
1738 noce_try_cmove (struct noce_if_info
*if_info
)
1744 if (!noce_simple_bbs (if_info
))
1747 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1748 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1752 code
= GET_CODE (if_info
->cond
);
1753 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1754 XEXP (if_info
->cond
, 0),
1755 XEXP (if_info
->cond
, 1),
1756 if_info
->a
, if_info
->b
);
1760 if (target
!= if_info
->x
)
1761 noce_emit_move_insn (if_info
->x
, target
);
1763 seq
= end_ifcvt_sequence (if_info
);
1767 emit_insn_before_setloc (seq
, if_info
->jump
,
1768 INSN_LOCATION (if_info
->insn_a
));
1771 /* If both a and b are constants try a last-ditch transformation:
1772 if (test) x = a; else x = b;
1773 => x = (-(test != 0) & (b - a)) + a;
1774 Try this only if the target-specific expansion above has failed.
1775 The target-specific expander may want to generate sequences that
1776 we don't know about, so give them a chance before trying this
1778 else if (!targetm
.have_conditional_execution ()
1779 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1780 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1781 || if_info
->branch_cost
>= 3))
1783 machine_mode mode
= GET_MODE (if_info
->x
);
1784 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1785 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1786 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1793 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1794 /* Make sure we can represent the difference
1795 between the two values. */
1797 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1803 diff
= trunc_int_for_mode (diff
, mode
);
1804 target
= expand_simple_binop (mode
, AND
,
1805 target
, gen_int_mode (diff
, mode
),
1806 if_info
->x
, 0, OPTAB_WIDEN
);
1808 target
= expand_simple_binop (mode
, PLUS
,
1809 target
, gen_int_mode (ifalse
, mode
),
1810 if_info
->x
, 0, OPTAB_WIDEN
);
1813 if (target
!= if_info
->x
)
1814 noce_emit_move_insn (if_info
->x
, target
);
1816 seq
= end_ifcvt_sequence (if_info
);
1820 emit_insn_before_setloc (seq
, if_info
->jump
,
1821 INSN_LOCATION (if_info
->insn_a
));
1837 /* Return true if X contains a conditional code mode rtx. */
1840 contains_ccmode_rtx_p (rtx x
)
1842 subrtx_iterator::array_type array
;
1843 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1844 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1850 /* Helper for bb_valid_for_noce_process_p. Validate that
1851 the rtx insn INSN is a single set that does not set
1852 the conditional register CC and is in general valid for
1856 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1859 || !NONJUMP_INSN_P (insn
)
1860 || (cc
&& set_of (cc
, insn
)))
1863 rtx sset
= single_set (insn
);
1865 /* Currently support only simple single sets in test_bb. */
1867 || !noce_operand_ok (SET_DEST (sset
))
1868 || contains_ccmode_rtx_p (SET_DEST (sset
))
1869 || !noce_operand_ok (SET_SRC (sset
)))
1876 /* Return true iff the registers that the insns in BB_A set do not get
1877 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1878 renamed later by the caller and so conflicts on it should be ignored
1879 in this function. */
1882 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1885 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1890 FOR_BB_INSNS (bb_a
, a_insn
)
1892 if (!active_insn_p (a_insn
))
1895 rtx sset_a
= single_set (a_insn
);
1899 BITMAP_FREE (bba_sets
);
1902 /* Record all registers that BB_A sets. */
1903 FOR_EACH_INSN_DEF (def
, a_insn
)
1904 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
1905 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1910 FOR_BB_INSNS (bb_b
, b_insn
)
1912 if (!active_insn_p (b_insn
))
1915 rtx sset_b
= single_set (b_insn
);
1919 BITMAP_FREE (bba_sets
);
1923 /* Make sure this is a REG and not some instance
1924 of ZERO_EXTRACT or SUBREG or other dangerous stuff.
1925 If we have a memory destination then we have a pair of simple
1926 basic blocks performing an operation of the form [addr] = c ? a : b.
1927 bb_valid_for_noce_process_p will have ensured that these are
1928 the only stores present. In that case [addr] should be the location
1929 to be renamed. Assert that the callers set this up properly. */
1930 if (MEM_P (SET_DEST (sset_b
)))
1931 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
1932 else if (!REG_P (SET_DEST (sset_b
)))
1934 BITMAP_FREE (bba_sets
);
1938 /* If the insn uses a reg set in BB_A return false. */
1939 FOR_EACH_INSN_USE (use
, b_insn
)
1941 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1943 BITMAP_FREE (bba_sets
);
1950 BITMAP_FREE (bba_sets
);
1954 /* Emit copies of all the active instructions in BB except the last.
1955 This is a helper for noce_try_cmove_arith. */
1958 noce_emit_all_but_last (basic_block bb
)
1960 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1962 FOR_BB_INSNS (bb
, insn
)
1964 if (insn
!= last
&& active_insn_p (insn
))
1966 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1968 emit_insn (PATTERN (to_emit
));
1973 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1974 the resulting insn or NULL if it's not a valid insn. */
1977 noce_emit_insn (rtx to_emit
)
1979 gcc_assert (to_emit
);
1980 rtx_insn
*insn
= emit_insn (to_emit
);
1982 if (recog_memoized (insn
) < 0)
1988 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1989 and including the penultimate one in BB if it is not simple
1990 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1991 insn in the block. The reason for that is that LAST_INSN may
1992 have been modified by the preparation in noce_try_cmove_arith. */
1995 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1998 noce_emit_all_but_last (bb
);
2000 if (last_insn
&& !noce_emit_insn (last_insn
))
2006 /* Try more complex cases involving conditional_move. */
2009 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2015 rtx_insn
*insn_a
, *insn_b
;
2016 bool a_simple
= if_info
->then_simple
;
2017 bool b_simple
= if_info
->else_simple
;
2018 basic_block then_bb
= if_info
->then_bb
;
2019 basic_block else_bb
= if_info
->else_bb
;
2023 rtx_insn
*ifcvt_seq
;
2025 /* A conditional move from two memory sources is equivalent to a
2026 conditional on their addresses followed by a load. Don't do this
2027 early because it'll screw alias analysis. Note that we've
2028 already checked for no side effects. */
2029 /* ??? FIXME: Magic number 5. */
2030 if (cse_not_expected
2031 && MEM_P (a
) && MEM_P (b
)
2032 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
2033 && if_info
->branch_cost
>= 5)
2035 machine_mode address_mode
= get_address_mode (a
);
2039 x
= gen_reg_rtx (address_mode
);
2043 /* ??? We could handle this if we knew that a load from A or B could
2044 not trap or fault. This is also true if we've already loaded
2045 from the address along the path from ENTRY. */
2046 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2049 /* if (test) x = a + b; else x = c - d;
2056 code
= GET_CODE (if_info
->cond
);
2057 insn_a
= if_info
->insn_a
;
2058 insn_b
= if_info
->insn_b
;
2060 machine_mode x_mode
= GET_MODE (x
);
2062 if (!can_conditionally_move_p (x_mode
))
2065 unsigned int then_cost
;
2066 unsigned int else_cost
;
2068 then_cost
= if_info
->then_cost
;
2073 else_cost
= if_info
->else_cost
;
2077 /* We're going to execute one of the basic blocks anyway, so
2078 bail out if the most expensive of the two blocks is unacceptable. */
2079 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
2082 /* Possibly rearrange operands to make things come out more natural. */
2083 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2086 if (rtx_equal_p (b
, x
))
2088 else if (general_operand (b
, GET_MODE (b
)))
2093 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2095 std::swap (insn_a
, insn_b
);
2096 std::swap (a_simple
, b_simple
);
2097 std::swap (then_bb
, else_bb
);
2101 if (then_bb
&& else_bb
2102 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2103 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2108 /* If one of the blocks is empty then the corresponding B or A value
2109 came from the test block. The non-empty complex block that we will
2110 emit might clobber the register used by B or A, so move it to a pseudo
2113 rtx tmp_a
= NULL_RTX
;
2114 rtx tmp_b
= NULL_RTX
;
2116 if (b_simple
|| !else_bb
)
2117 tmp_b
= gen_reg_rtx (x_mode
);
2119 if (a_simple
|| !then_bb
)
2120 tmp_a
= gen_reg_rtx (x_mode
);
2125 rtx emit_a
= NULL_RTX
;
2126 rtx emit_b
= NULL_RTX
;
2127 rtx_insn
*tmp_insn
= NULL
;
2128 bool modified_in_a
= false;
2129 bool modified_in_b
= false;
2130 /* If either operand is complex, load it into a register first.
2131 The best way to do this is to copy the original insn. In this
2132 way we preserve any clobbers etc that the insn may have had.
2133 This is of course not possible in the IS_MEM case. */
2135 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2140 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2141 emit_a
= gen_rtx_SET (reg
, a
);
2147 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2149 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2150 rtx set
= single_set (copy_of_a
);
2153 emit_a
= PATTERN (copy_of_a
);
2157 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2158 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2164 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2168 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2169 emit_b
= gen_rtx_SET (reg
, b
);
2175 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2176 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2177 rtx set
= single_set (copy_of_b
);
2180 emit_b
= PATTERN (copy_of_b
);
2184 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2185 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2191 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2192 if (tmp_b
&& then_bb
)
2194 FOR_BB_INSNS (then_bb
, tmp_insn
)
2195 /* Don't check inside insn_a. We will have changed it to emit_a
2196 with a destination that doesn't conflict. */
2197 if (!(insn_a
&& tmp_insn
== insn_a
)
2198 && modified_in_p (orig_b
, tmp_insn
))
2200 modified_in_a
= true;
2206 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2207 if (tmp_a
&& else_bb
)
2209 FOR_BB_INSNS (else_bb
, tmp_insn
)
2210 /* Don't check inside insn_b. We will have changed it to emit_b
2211 with a destination that doesn't conflict. */
2212 if (!(insn_b
&& tmp_insn
== insn_b
)
2213 && modified_in_p (orig_a
, tmp_insn
))
2215 modified_in_b
= true;
2220 /* If insn to set up A clobbers any registers B depends on, try to
2221 swap insn that sets up A with the one that sets up B. If even
2222 that doesn't help, punt. */
2223 if (modified_in_a
&& !modified_in_b
)
2225 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2226 goto end_seq_and_fail
;
2228 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2229 goto end_seq_and_fail
;
2231 else if (!modified_in_a
)
2233 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2234 goto end_seq_and_fail
;
2236 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2237 goto end_seq_and_fail
;
2240 goto end_seq_and_fail
;
2242 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2243 XEXP (if_info
->cond
, 1), a
, b
);
2246 goto end_seq_and_fail
;
2248 /* If we're handling a memory for above, emit the load now. */
2251 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2253 /* Copy over flags as appropriate. */
2254 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2255 MEM_VOLATILE_P (mem
) = 1;
2256 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2257 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2259 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2261 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2262 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2264 noce_emit_move_insn (if_info
->x
, mem
);
2266 else if (target
!= x
)
2267 noce_emit_move_insn (x
, target
);
2269 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2273 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2274 INSN_LOCATION (if_info
->insn_a
));
2282 /* For most cases, the simplified condition we found is the best
2283 choice, but this is not the case for the min/max/abs transforms.
2284 For these we wish to know that it is A or B in the condition. */
2287 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2288 rtx_insn
**earliest
)
2294 /* If target is already mentioned in the known condition, return it. */
2295 if (reg_mentioned_p (target
, if_info
->cond
))
2297 *earliest
= if_info
->cond_earliest
;
2298 return if_info
->cond
;
2301 set
= pc_set (if_info
->jump
);
2302 cond
= XEXP (SET_SRC (set
), 0);
2304 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2305 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2306 if (if_info
->then_else_reversed
)
2309 /* If we're looking for a constant, try to make the conditional
2310 have that constant in it. There are two reasons why it may
2311 not have the constant we want:
2313 1. GCC may have needed to put the constant in a register, because
2314 the target can't compare directly against that constant. For
2315 this case, we look for a SET immediately before the comparison
2316 that puts a constant in that register.
2318 2. GCC may have canonicalized the conditional, for example
2319 replacing "if x < 4" with "if x <= 3". We can undo that (or
2320 make equivalent types of changes) to get the constants we need
2321 if they're off by one in the right direction. */
2323 if (CONST_INT_P (target
))
2325 enum rtx_code code
= GET_CODE (if_info
->cond
);
2326 rtx op_a
= XEXP (if_info
->cond
, 0);
2327 rtx op_b
= XEXP (if_info
->cond
, 1);
2328 rtx_insn
*prev_insn
;
2330 /* First, look to see if we put a constant in a register. */
2331 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2333 && BLOCK_FOR_INSN (prev_insn
)
2334 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2335 && INSN_P (prev_insn
)
2336 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2338 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2340 src
= SET_SRC (PATTERN (prev_insn
));
2341 if (CONST_INT_P (src
))
2343 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2345 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2348 if (CONST_INT_P (op_a
))
2350 std::swap (op_a
, op_b
);
2351 code
= swap_condition (code
);
2356 /* Now, look to see if we can get the right constant by
2357 adjusting the conditional. */
2358 if (CONST_INT_P (op_b
))
2360 HOST_WIDE_INT desired_val
= INTVAL (target
);
2361 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2366 if (actual_val
== desired_val
+ 1)
2369 op_b
= GEN_INT (desired_val
);
2373 if (actual_val
== desired_val
- 1)
2376 op_b
= GEN_INT (desired_val
);
2380 if (actual_val
== desired_val
- 1)
2383 op_b
= GEN_INT (desired_val
);
2387 if (actual_val
== desired_val
+ 1)
2390 op_b
= GEN_INT (desired_val
);
2398 /* If we made any changes, generate a new conditional that is
2399 equivalent to what we started with, but has the right
2401 if (code
!= GET_CODE (if_info
->cond
)
2402 || op_a
!= XEXP (if_info
->cond
, 0)
2403 || op_b
!= XEXP (if_info
->cond
, 1))
2405 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2406 *earliest
= if_info
->cond_earliest
;
2411 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2412 earliest
, target
, have_cbranchcc4
, true);
2413 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2416 /* We almost certainly searched back to a different place.
2417 Need to re-verify correct lifetimes. */
2419 /* X may not be mentioned in the range (cond_earliest, jump]. */
2420 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2421 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2424 /* A and B may not be modified in the range [cond_earliest, jump). */
2425 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2427 && (modified_in_p (if_info
->a
, insn
)
2428 || modified_in_p (if_info
->b
, insn
)))
2434 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2437 noce_try_minmax (struct noce_if_info
*if_info
)
2440 rtx_insn
*earliest
, *seq
;
2441 enum rtx_code code
, op
;
2444 if (!noce_simple_bbs (if_info
))
2447 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2448 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2449 to get the target to tell us... */
2450 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2451 || HONOR_NANS (if_info
->x
))
2454 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2458 /* Verify the condition is of the form we expect, and canonicalize
2459 the comparison code. */
2460 code
= GET_CODE (cond
);
2461 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2463 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2466 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2468 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2470 code
= swap_condition (code
);
2475 /* Determine what sort of operation this is. Note that the code is for
2476 a taken branch, so the code->operation mapping appears backwards. */
2509 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2510 if_info
->a
, if_info
->b
,
2511 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2517 if (target
!= if_info
->x
)
2518 noce_emit_move_insn (if_info
->x
, target
);
2520 seq
= end_ifcvt_sequence (if_info
);
2524 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2525 if_info
->cond
= cond
;
2526 if_info
->cond_earliest
= earliest
;
2531 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2532 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2536 noce_try_abs (struct noce_if_info
*if_info
)
2538 rtx cond
, target
, a
, b
, c
;
2539 rtx_insn
*earliest
, *seq
;
2541 bool one_cmpl
= false;
2543 if (!noce_simple_bbs (if_info
))
2546 /* Reject modes with signed zeros. */
2547 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2550 /* Recognize A and B as constituting an ABS or NABS. The canonical
2551 form is a branch around the negation, taken when the object is the
2552 first operand of a comparison against 0 that evaluates to true. */
2555 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2557 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2562 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2567 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2576 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2580 /* Verify the condition is of the form we expect. */
2581 if (rtx_equal_p (XEXP (cond
, 0), b
))
2583 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2591 /* Verify that C is zero. Search one step backward for a
2592 REG_EQUAL note or a simple source if necessary. */
2596 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2598 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2599 && (set
= single_set (insn
))
2600 && rtx_equal_p (SET_DEST (set
), c
))
2602 rtx note
= find_reg_equal_equiv_note (insn
);
2612 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2613 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2614 c
= get_pool_constant (XEXP (c
, 0));
2616 /* Work around funny ideas get_condition has wrt canonicalization.
2617 Note that these rtx constants are known to be CONST_INT, and
2618 therefore imply integer comparisons.
2619 The one_cmpl case is more complicated, as we want to handle
2620 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2621 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2622 but not other cases (x > -1 is equivalent of x >= 0). */
2623 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2625 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2630 else if (c
== CONST0_RTX (GET_MODE (b
)))
2633 && GET_CODE (cond
) != GE
2634 && GET_CODE (cond
) != LT
)
2640 /* Determine what sort of operation this is. */
2641 switch (GET_CODE (cond
))
2660 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2663 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2665 /* ??? It's a quandary whether cmove would be better here, especially
2666 for integers. Perhaps combine will clean things up. */
2667 if (target
&& negate
)
2670 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2673 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2683 if (target
!= if_info
->x
)
2684 noce_emit_move_insn (if_info
->x
, target
);
2686 seq
= end_ifcvt_sequence (if_info
);
2690 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2691 if_info
->cond
= cond
;
2692 if_info
->cond_earliest
= earliest
;
2697 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2700 noce_try_sign_mask (struct noce_if_info
*if_info
)
2706 bool t_unconditional
;
2708 if (!noce_simple_bbs (if_info
))
2711 cond
= if_info
->cond
;
2712 code
= GET_CODE (cond
);
2717 if (if_info
->a
== const0_rtx
)
2719 if ((code
== LT
&& c
== const0_rtx
)
2720 || (code
== LE
&& c
== constm1_rtx
))
2723 else if (if_info
->b
== const0_rtx
)
2725 if ((code
== GE
&& c
== const0_rtx
)
2726 || (code
== GT
&& c
== constm1_rtx
))
2730 if (! t
|| side_effects_p (t
))
2733 /* We currently don't handle different modes. */
2734 mode
= GET_MODE (t
);
2735 if (GET_MODE (m
) != mode
)
2738 /* This is only profitable if T is unconditionally executed/evaluated in the
2739 original insn sequence or T is cheap. The former happens if B is the
2740 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2741 INSN_B which can happen for e.g. conditional stores to memory. For the
2742 cost computation use the block TEST_BB where the evaluation will end up
2743 after the transformation. */
2746 && (if_info
->insn_b
== NULL_RTX
2747 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2748 if (!(t_unconditional
2749 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2750 < COSTS_N_INSNS (2))))
2754 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2755 "(signed) m >> 31" directly. This benefits targets with specialized
2756 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2757 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2758 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2767 noce_emit_move_insn (if_info
->x
, t
);
2769 seq
= end_ifcvt_sequence (if_info
);
2773 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2778 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2782 noce_try_bitop (struct noce_if_info
*if_info
)
2784 rtx cond
, x
, a
, result
;
2791 cond
= if_info
->cond
;
2792 code
= GET_CODE (cond
);
2794 if (!noce_simple_bbs (if_info
))
2797 /* Check for no else condition. */
2798 if (! rtx_equal_p (x
, if_info
->b
))
2801 /* Check for a suitable condition. */
2802 if (code
!= NE
&& code
!= EQ
)
2804 if (XEXP (cond
, 1) != const0_rtx
)
2806 cond
= XEXP (cond
, 0);
2808 /* ??? We could also handle AND here. */
2809 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2811 if (XEXP (cond
, 1) != const1_rtx
2812 || !CONST_INT_P (XEXP (cond
, 2))
2813 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2815 bitnum
= INTVAL (XEXP (cond
, 2));
2816 mode
= GET_MODE (x
);
2817 if (BITS_BIG_ENDIAN
)
2818 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2819 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2826 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2828 /* Check for "if (X & C) x = x op C". */
2829 if (! rtx_equal_p (x
, XEXP (a
, 0))
2830 || !CONST_INT_P (XEXP (a
, 1))
2831 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2832 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2835 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2836 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2837 if (GET_CODE (a
) == IOR
)
2838 result
= (code
== NE
) ? a
: NULL_RTX
;
2839 else if (code
== NE
)
2841 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2842 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2843 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2847 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2848 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2849 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2852 else if (GET_CODE (a
) == AND
)
2854 /* Check for "if (X & C) x &= ~C". */
2855 if (! rtx_equal_p (x
, XEXP (a
, 0))
2856 || !CONST_INT_P (XEXP (a
, 1))
2857 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2858 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2861 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2862 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2863 result
= (code
== EQ
) ? a
: NULL_RTX
;
2871 noce_emit_move_insn (x
, result
);
2872 seq
= end_ifcvt_sequence (if_info
);
2876 emit_insn_before_setloc (seq
, if_info
->jump
,
2877 INSN_LOCATION (if_info
->insn_a
));
2883 /* Similar to get_condition, only the resulting condition must be
2884 valid at JUMP, instead of at EARLIEST.
2886 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2887 THEN block of the caller, and we have to reverse the condition. */
2890 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2895 if (! any_condjump_p (jump
))
2898 set
= pc_set (jump
);
2900 /* If this branches to JUMP_LABEL when the condition is false,
2901 reverse the condition. */
2902 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2903 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2905 /* We may have to reverse because the caller's if block is not canonical,
2906 i.e. the THEN block isn't the fallthrough block for the TEST block
2907 (see find_if_header). */
2908 if (then_else_reversed
)
2911 /* If the condition variable is a register and is MODE_INT, accept it. */
2913 cond
= XEXP (SET_SRC (set
), 0);
2914 tmp
= XEXP (cond
, 0);
2915 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2916 && (GET_MODE (tmp
) != BImode
2917 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2922 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2923 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2927 /* Otherwise, fall back on canonicalize_condition to do the dirty
2928 work of manipulating MODE_CC values and COMPARE rtx codes. */
2929 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2930 NULL_RTX
, have_cbranchcc4
, true);
2932 /* We don't handle side-effects in the condition, like handling
2933 REG_INC notes and making sure no duplicate conditions are emitted. */
2934 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2940 /* Return true if OP is ok for if-then-else processing. */
2943 noce_operand_ok (const_rtx op
)
2945 if (side_effects_p (op
))
2948 /* We special-case memories, so handle any of them with
2949 no address side effects. */
2951 return ! side_effects_p (XEXP (op
, 0));
2953 return ! may_trap_p (op
);
2956 /* Return true if X contains a MEM subrtx. */
2959 contains_mem_rtx_p (rtx x
)
2961 subrtx_iterator::array_type array
;
2962 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
2969 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2970 The condition used in this if-conversion is in COND.
2971 In practice, check that TEST_BB ends with a single set
2972 x := a and all previous computations
2973 in TEST_BB don't produce any values that are live after TEST_BB.
2974 In other words, all the insns in TEST_BB are there only
2975 to compute a value for x. Put the rtx cost of the insns
2976 in TEST_BB into COST. Record whether TEST_BB is a single simple
2977 set instruction in SIMPLE_P. */
2980 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
2981 unsigned int *cost
, bool *simple_p
)
2986 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
2987 rtx last_set
= NULL_RTX
;
2989 rtx cc
= cc_in_cond (cond
);
2991 if (!insn_valid_noce_process_p (last_insn
, cc
))
2993 last_set
= single_set (last_insn
);
2995 rtx x
= SET_DEST (last_set
);
2996 rtx_insn
*first_insn
= first_active_insn (test_bb
);
2997 rtx first_set
= single_set (first_insn
);
3002 /* We have a single simple set, that's okay. */
3003 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3005 if (first_insn
== last_insn
)
3007 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3008 *cost
= insn_rtx_cost (first_set
, speed_p
);
3012 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3013 gcc_assert (prev_last_insn
);
3015 /* For now, disallow setting x multiple times in test_bb. */
3016 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3019 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3021 /* The regs that are live out of test_bb. */
3022 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3024 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3026 FOR_BB_INSNS (test_bb
, insn
)
3028 if (insn
!= last_insn
)
3030 if (!active_insn_p (insn
))
3033 if (!insn_valid_noce_process_p (insn
, cc
))
3034 goto free_bitmap_and_fail
;
3036 rtx sset
= single_set (insn
);
3039 if (contains_mem_rtx_p (SET_SRC (sset
))
3040 || !REG_P (SET_DEST (sset
))
3041 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3042 goto free_bitmap_and_fail
;
3044 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3045 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3049 /* If any of the intermediate results in test_bb are live after test_bb
3051 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3052 goto free_bitmap_and_fail
;
3054 BITMAP_FREE (test_bb_temps
);
3055 *cost
= potential_cost
;
3059 free_bitmap_and_fail
:
3060 BITMAP_FREE (test_bb_temps
);
3064 /* We have something like:
3067 { i = a; j = b; k = c; }
3071 tmp_i = (x > y) ? a : i;
3072 tmp_j = (x > y) ? b : j;
3073 tmp_k = (x > y) ? c : k;
3078 Subsequent passes are expected to clean up the extra moves.
3080 Look for special cases such as writes to one register which are
3081 read back in another SET, as might occur in a swap idiom or
3090 Which we want to rewrite to:
3092 tmp_i = (x > y) ? a : i;
3093 tmp_j = (x > y) ? tmp_i : j;
3097 We can catch these when looking at (SET x y) by keeping a list of the
3098 registers we would have targeted before if-conversion and looking back
3099 through it for an overlap with Y. If we find one, we rewire the
3100 conditional set to use the temporary we introduced earlier.
3102 IF_INFO contains the useful information about the block structure and
3103 jump instructions. */
3106 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3108 basic_block test_bb
= if_info
->test_bb
;
3109 basic_block then_bb
= if_info
->then_bb
;
3110 basic_block join_bb
= if_info
->join_bb
;
3111 rtx_insn
*jump
= if_info
->jump
;
3112 rtx_insn
*cond_earliest
;
3117 /* Decompose the condition attached to the jump. */
3118 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3119 rtx x
= XEXP (cond
, 0);
3120 rtx y
= XEXP (cond
, 1);
3121 rtx_code cond_code
= GET_CODE (cond
);
3123 /* The true targets for a conditional move. */
3124 auto_vec
<rtx
> targets
;
3125 /* The temporaries introduced to allow us to not consider register
3127 auto_vec
<rtx
> temporaries
;
3128 /* The insns we've emitted. */
3129 auto_vec
<rtx_insn
*> unmodified_insns
;
3132 FOR_BB_INSNS (then_bb
, insn
)
3134 /* Skip over non-insns. */
3135 if (!active_insn_p (insn
))
3138 rtx set
= single_set (insn
);
3139 gcc_checking_assert (set
);
3141 rtx target
= SET_DEST (set
);
3142 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3143 rtx new_val
= SET_SRC (set
);
3144 rtx old_val
= target
;
3146 /* If we were supposed to read from an earlier write in this block,
3147 we've changed the register allocation. Rewire the read. While
3148 we are looking, also try to catch a swap idiom. */
3149 for (int i
= count
- 1; i
>= 0; --i
)
3150 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3152 /* Catch a "swap" style idiom. */
3153 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3154 /* The write to targets[i] is only live until the read
3155 here. As the condition codes match, we can propagate
3157 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3159 new_val
= temporaries
[i
];
3163 /* If we had a non-canonical conditional jump (i.e. one where
3164 the fallthrough is to the "else" case) we need to reverse
3165 the conditional select. */
3166 if (if_info
->then_else_reversed
)
3167 std::swap (old_val
, new_val
);
3169 /* Actually emit the conditional move. */
3170 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3171 x
, y
, new_val
, old_val
);
3173 /* If we failed to expand the conditional move, drop out and don't
3175 if (temp_dest
== NULL_RTX
)
3183 targets
.safe_push (target
);
3184 temporaries
.safe_push (temp_dest
);
3185 unmodified_insns
.safe_push (insn
);
3188 /* We must have seen some sort of insn to insert, otherwise we were
3189 given an empty BB to convert, and we can't handle that. */
3190 gcc_assert (!unmodified_insns
.is_empty ());
3192 /* Now fixup the assignments. */
3193 for (int i
= 0; i
< count
; i
++)
3194 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3196 /* Actually emit the sequence. */
3197 rtx_insn
*seq
= get_insns ();
3199 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3200 set_used_flags (insn
);
3202 /* Mark all our temporaries and targets as used. */
3203 for (int i
= 0; i
< count
; i
++)
3205 set_used_flags (temporaries
[i
]);
3206 set_used_flags (targets
[i
]);
3209 set_used_flags (cond
);
3213 unshare_all_rtl_in_chain (seq
);
3219 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3221 || recog_memoized (insn
) == -1)
3224 emit_insn_before_setloc (seq
, if_info
->jump
,
3225 INSN_LOCATION (unmodified_insns
.last ()));
3227 /* Clean up THEN_BB and the edges in and out of it. */
3228 remove_edge (find_edge (test_bb
, join_bb
));
3229 remove_edge (find_edge (then_bb
, join_bb
));
3230 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3231 delete_basic_block (then_bb
);
3234 /* Maybe merge blocks now the jump is simple enough. */
3235 if (can_merge_blocks_p (test_bb
, join_bb
))
3237 merge_blocks (test_bb
, join_bb
);
3241 num_updated_if_blocks
++;
3245 /* Return true iff basic block TEST_BB is comprised of only
3246 (SET (REG) (REG)) insns suitable for conversion to a series
3247 of conditional moves. FORNOW: Use II to find the expected cost of
3248 the branch into/over TEST_BB.
3250 TODO: This creates an implicit "magic number" for branch_cost.
3251 II->branch_cost now guides the maximum number of set instructions in
3252 a basic block which is considered profitable to completely
3256 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
,
3257 struct noce_if_info
*ii
)
3261 unsigned param
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3262 unsigned limit
= MIN (ii
->branch_cost
, param
);
3264 FOR_BB_INSNS (test_bb
, insn
)
3266 /* Skip over notes etc. */
3267 if (!active_insn_p (insn
))
3270 /* We only handle SET insns. */
3271 rtx set
= single_set (insn
);
3272 if (set
== NULL_RTX
)
3275 rtx dest
= SET_DEST (set
);
3276 rtx src
= SET_SRC (set
);
3278 /* We can possibly relax this, but for now only handle REG to REG
3279 moves. This avoids any issues that might come from introducing
3280 loads/stores that might violate data-race-freedom guarantees. */
3281 if (!(REG_P (src
) && REG_P (dest
)))
3284 /* Destination must be appropriate for a conditional write. */
3285 if (!noce_operand_ok (dest
))
3288 /* We must be able to conditionally move in this mode. */
3289 if (!can_conditionally_move_p (GET_MODE (dest
)))
3292 /* FORNOW: Our cost model is a count of the number of instructions we
3293 would if-convert. This is suboptimal, and should be improved as part
3294 of a wider rework of branch_cost. */
3295 if (++count
> limit
)
3302 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3303 it without using conditional execution. Return TRUE if we were successful
3304 at converting the block. */
3307 noce_process_if_block (struct noce_if_info
*if_info
)
3309 basic_block test_bb
= if_info
->test_bb
; /* test block */
3310 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3311 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3312 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3313 rtx_insn
*jump
= if_info
->jump
;
3314 rtx cond
= if_info
->cond
;
3315 rtx_insn
*insn_a
, *insn_b
;
3317 rtx orig_x
, x
, a
, b
;
3319 /* We're looking for patterns of the form
3321 (1) if (...) x = a; else x = b;
3322 (2) x = b; if (...) x = a;
3323 (3) if (...) x = a; // as if with an initial x = x.
3324 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3325 The later patterns require jumps to be more expensive.
3326 For the if (...) x = a; else x = b; case we allow multiple insns
3327 inside the then and else blocks as long as their only effect is
3328 to calculate a value for x.
3329 ??? For future expansion, further expand the "multiple X" rules. */
3331 /* First look for multiple SETS. */
3333 && HAVE_conditional_move
3335 && bb_ok_for_noce_convert_multiple_sets (then_bb
, if_info
))
3337 if (noce_convert_multiple_sets (if_info
))
3341 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3342 &if_info
->then_simple
))
3346 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3347 &if_info
->else_simple
))
3350 insn_a
= last_active_insn (then_bb
, FALSE
);
3351 set_a
= single_set (insn_a
);
3354 x
= SET_DEST (set_a
);
3355 a
= SET_SRC (set_a
);
3357 /* Look for the other potential set. Make sure we've got equivalent
3359 /* ??? This is overconservative. Storing to two different mems is
3360 as easy as conditionally computing the address. Storing to a
3361 single mem merely requires a scratch memory to use as one of the
3362 destination addresses; often the memory immediately below the
3363 stack pointer is available for this. */
3367 insn_b
= last_active_insn (else_bb
, FALSE
);
3368 set_b
= single_set (insn_b
);
3371 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3376 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3377 /* We're going to be moving the evaluation of B down from above
3378 COND_EARLIEST to JUMP. Make sure the relevant data is still
3381 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3382 || !NONJUMP_INSN_P (insn_b
)
3383 || (set_b
= single_set (insn_b
)) == NULL_RTX
3384 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3385 || ! noce_operand_ok (SET_SRC (set_b
))
3386 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3387 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3388 /* Avoid extending the lifetime of hard registers on small
3389 register class machines. */
3390 || (REG_P (SET_SRC (set_b
))
3391 && HARD_REGISTER_P (SET_SRC (set_b
))
3392 && targetm
.small_register_classes_for_mode_p
3393 (GET_MODE (SET_SRC (set_b
))))
3394 /* Likewise with X. In particular this can happen when
3395 noce_get_condition looks farther back in the instruction
3396 stream than one might expect. */
3397 || reg_overlap_mentioned_p (x
, cond
)
3398 || reg_overlap_mentioned_p (x
, a
)
3399 || modified_between_p (x
, insn_b
, jump
))
3406 /* If x has side effects then only the if-then-else form is safe to
3407 convert. But even in that case we would need to restore any notes
3408 (such as REG_INC) at then end. That can be tricky if
3409 noce_emit_move_insn expands to more than one insn, so disable the
3410 optimization entirely for now if there are side effects. */
3411 if (side_effects_p (x
))
3414 b
= (set_b
? SET_SRC (set_b
) : x
);
3416 /* Only operate on register destinations, and even then avoid extending
3417 the lifetime of hard registers on small register class machines. */
3419 if_info
->orig_x
= orig_x
;
3421 || (HARD_REGISTER_P (x
)
3422 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3424 if (GET_MODE (x
) == BLKmode
)
3427 if (GET_CODE (x
) == ZERO_EXTRACT
3428 && (!CONST_INT_P (XEXP (x
, 1))
3429 || !CONST_INT_P (XEXP (x
, 2))))
3432 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3433 ? XEXP (x
, 0) : x
));
3436 /* Don't operate on sources that may trap or are volatile. */
3437 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3441 /* Set up the info block for our subroutines. */
3442 if_info
->insn_a
= insn_a
;
3443 if_info
->insn_b
= insn_b
;
3448 /* Try optimizations in some approximation of a useful order. */
3449 /* ??? Should first look to see if X is live incoming at all. If it
3450 isn't, we don't need anything but an unconditional set. */
3452 /* Look and see if A and B are really the same. Avoid creating silly
3453 cmove constructs that no one will fix up later. */
3454 if (noce_simple_bbs (if_info
)
3455 && rtx_interchangeable_p (a
, b
))
3457 /* If we have an INSN_B, we don't have to create any new rtl. Just
3458 move the instruction that we already have. If we don't have an
3459 INSN_B, that means that A == X, and we've got a noop move. In
3460 that case don't do anything and let the code below delete INSN_A. */
3461 if (insn_b
&& else_bb
)
3465 if (else_bb
&& insn_b
== BB_END (else_bb
))
3466 BB_END (else_bb
) = PREV_INSN (insn_b
);
3467 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3469 /* If there was a REG_EQUAL note, delete it since it may have been
3470 true due to this insn being after a jump. */
3471 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3472 remove_note (insn_b
, note
);
3476 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3477 x must be executed twice. */
3478 else if (insn_b
&& side_effects_p (orig_x
))
3485 if (!set_b
&& MEM_P (orig_x
))
3486 /* We want to avoid store speculation to avoid cases like
3487 if (pthread_mutex_trylock(mutex))
3489 Rather than go to much effort here, we rely on the SSA optimizers,
3490 which do a good enough job these days. */
3493 if (noce_try_move (if_info
))
3495 if (noce_try_store_flag (if_info
))
3497 if (noce_try_bitop (if_info
))
3499 if (noce_try_minmax (if_info
))
3501 if (noce_try_abs (if_info
))
3503 if (noce_try_inverse_constants (if_info
))
3505 if (!targetm
.have_conditional_execution ()
3506 && noce_try_store_flag_constants (if_info
))
3508 if (HAVE_conditional_move
3509 && noce_try_cmove (if_info
))
3511 if (! targetm
.have_conditional_execution ())
3513 if (noce_try_addcc (if_info
))
3515 if (noce_try_store_flag_mask (if_info
))
3517 if (HAVE_conditional_move
3518 && noce_try_cmove_arith (if_info
))
3520 if (noce_try_sign_mask (if_info
))
3524 if (!else_bb
&& set_b
)
3536 /* If we used a temporary, fix it up now. */
3542 noce_emit_move_insn (orig_x
, x
);
3544 set_used_flags (orig_x
);
3545 unshare_all_rtl_in_chain (seq
);
3548 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3551 /* The original THEN and ELSE blocks may now be removed. The test block
3552 must now jump to the join block. If the test block and the join block
3553 can be merged, do so. */
3556 delete_basic_block (else_bb
);
3560 remove_edge (find_edge (test_bb
, join_bb
));
3562 remove_edge (find_edge (then_bb
, join_bb
));
3563 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3564 delete_basic_block (then_bb
);
3567 if (can_merge_blocks_p (test_bb
, join_bb
))
3569 merge_blocks (test_bb
, join_bb
);
3573 num_updated_if_blocks
++;
3577 /* Check whether a block is suitable for conditional move conversion.
3578 Every insn must be a simple set of a register to a constant or a
3579 register. For each assignment, store the value in the pointer map
3580 VALS, keyed indexed by register pointer, then store the register
3581 pointer in REGS. COND is the condition we will test. */
3584 check_cond_move_block (basic_block bb
,
3585 hash_map
<rtx
, rtx
> *vals
,
3590 rtx cc
= cc_in_cond (cond
);
3592 /* We can only handle simple jumps at the end of the basic block.
3593 It is almost impossible to update the CFG otherwise. */
3595 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3598 FOR_BB_INSNS (bb
, insn
)
3602 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3604 set
= single_set (insn
);
3608 dest
= SET_DEST (set
);
3609 src
= SET_SRC (set
);
3611 || (HARD_REGISTER_P (dest
)
3612 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3615 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3618 if (side_effects_p (src
) || side_effects_p (dest
))
3621 if (may_trap_p (src
) || may_trap_p (dest
))
3624 /* Don't try to handle this if the source register was
3625 modified earlier in the block. */
3628 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3629 && vals
->get (SUBREG_REG (src
))))
3632 /* Don't try to handle this if the destination register was
3633 modified earlier in the block. */
3634 if (vals
->get (dest
))
3637 /* Don't try to handle this if the condition uses the
3638 destination register. */
3639 if (reg_overlap_mentioned_p (dest
, cond
))
3642 /* Don't try to handle this if the source register is modified
3643 later in the block. */
3644 if (!CONSTANT_P (src
)
3645 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3648 /* Skip it if the instruction to be moved might clobber CC. */
3649 if (cc
&& set_of (cc
, insn
))
3652 vals
->put (dest
, src
);
3654 regs
->safe_push (dest
);
3660 /* Given a basic block BB suitable for conditional move conversion,
3661 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3662 the register values depending on COND, emit the insns in the block as
3663 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3664 processed. The caller has started a sequence for the conversion.
3665 Return true if successful, false if something goes wrong. */
3668 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3669 basic_block bb
, rtx cond
,
3670 hash_map
<rtx
, rtx
> *then_vals
,
3671 hash_map
<rtx
, rtx
> *else_vals
,
3676 rtx cond_arg0
, cond_arg1
;
3678 code
= GET_CODE (cond
);
3679 cond_arg0
= XEXP (cond
, 0);
3680 cond_arg1
= XEXP (cond
, 1);
3682 FOR_BB_INSNS (bb
, insn
)
3684 rtx set
, target
, dest
, t
, e
;
3686 /* ??? Maybe emit conditional debug insn? */
3687 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3689 set
= single_set (insn
);
3690 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3692 dest
= SET_DEST (set
);
3694 rtx
*then_slot
= then_vals
->get (dest
);
3695 rtx
*else_slot
= else_vals
->get (dest
);
3696 t
= then_slot
? *then_slot
: NULL_RTX
;
3697 e
= else_slot
? *else_slot
: NULL_RTX
;
3701 /* If this register was set in the then block, we already
3702 handled this case there. */
3715 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3721 noce_emit_move_insn (dest
, target
);
3727 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3728 it using only conditional moves. Return TRUE if we were successful at
3729 converting the block. */
3732 cond_move_process_if_block (struct noce_if_info
*if_info
)
3734 basic_block test_bb
= if_info
->test_bb
;
3735 basic_block then_bb
= if_info
->then_bb
;
3736 basic_block else_bb
= if_info
->else_bb
;
3737 basic_block join_bb
= if_info
->join_bb
;
3738 rtx_insn
*jump
= if_info
->jump
;
3739 rtx cond
= if_info
->cond
;
3740 rtx_insn
*seq
, *loc_insn
;
3743 vec
<rtx
> then_regs
= vNULL
;
3744 vec
<rtx
> else_regs
= vNULL
;
3746 int success_p
= FALSE
;
3747 int limit
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3749 /* Build a mapping for each block to the value used for each
3751 hash_map
<rtx
, rtx
> then_vals
;
3752 hash_map
<rtx
, rtx
> else_vals
;
3754 /* Make sure the blocks are suitable. */
3755 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3757 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3760 /* Make sure the blocks can be used together. If the same register
3761 is set in both blocks, and is not set to a constant in both
3762 cases, then both blocks must set it to the same register. We
3763 have already verified that if it is set to a register, that the
3764 source register does not change after the assignment. Also count
3765 the number of registers set in only one of the blocks. */
3767 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3769 rtx
*then_slot
= then_vals
.get (reg
);
3770 rtx
*else_slot
= else_vals
.get (reg
);
3772 gcc_checking_assert (then_slot
);
3777 rtx then_val
= *then_slot
;
3778 rtx else_val
= *else_slot
;
3779 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3780 && !rtx_equal_p (then_val
, else_val
))
3785 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3786 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3788 gcc_checking_assert (else_vals
.get (reg
));
3789 if (!then_vals
.get (reg
))
3793 /* Make sure it is reasonable to convert this block. What matters
3794 is the number of assignments currently made in only one of the
3795 branches, since if we convert we are going to always execute
3797 if (c
> MAX_CONDITIONAL_EXECUTE
3801 /* Try to emit the conditional moves. First do the then block,
3802 then do anything left in the else blocks. */
3804 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3805 &then_vals
, &else_vals
, false)
3807 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3808 &then_vals
, &else_vals
, true)))
3813 seq
= end_ifcvt_sequence (if_info
);
3817 loc_insn
= first_active_insn (then_bb
);
3820 loc_insn
= first_active_insn (else_bb
);
3821 gcc_assert (loc_insn
);
3823 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3827 delete_basic_block (else_bb
);
3831 remove_edge (find_edge (test_bb
, join_bb
));
3833 remove_edge (find_edge (then_bb
, join_bb
));
3834 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3835 delete_basic_block (then_bb
);
3838 if (can_merge_blocks_p (test_bb
, join_bb
))
3840 merge_blocks (test_bb
, join_bb
);
3844 num_updated_if_blocks
++;
3848 then_regs
.release ();
3849 else_regs
.release ();
3854 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3855 IF-THEN-ELSE-JOIN block.
3857 If so, we'll try to convert the insns to not require the branch,
3858 using only transformations that do not require conditional execution.
3860 Return TRUE if we were successful at converting the block. */
3863 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3866 basic_block then_bb
, else_bb
, join_bb
;
3867 bool then_else_reversed
= false;
3870 rtx_insn
*cond_earliest
;
3871 struct noce_if_info if_info
;
3873 /* We only ever should get here before reload. */
3874 gcc_assert (!reload_completed
);
3876 /* Recognize an IF-THEN-ELSE-JOIN block. */
3877 if (single_pred_p (then_edge
->dest
)
3878 && single_succ_p (then_edge
->dest
)
3879 && single_pred_p (else_edge
->dest
)
3880 && single_succ_p (else_edge
->dest
)
3881 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3883 then_bb
= then_edge
->dest
;
3884 else_bb
= else_edge
->dest
;
3885 join_bb
= single_succ (then_bb
);
3887 /* Recognize an IF-THEN-JOIN block. */
3888 else if (single_pred_p (then_edge
->dest
)
3889 && single_succ_p (then_edge
->dest
)
3890 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3892 then_bb
= then_edge
->dest
;
3893 else_bb
= NULL_BLOCK
;
3894 join_bb
= else_edge
->dest
;
3896 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3897 of basic blocks in cfglayout mode does not matter, so the fallthrough
3898 edge can go to any basic block (and not just to bb->next_bb, like in
3900 else if (single_pred_p (else_edge
->dest
)
3901 && single_succ_p (else_edge
->dest
)
3902 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3904 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3905 To make this work, we have to invert the THEN and ELSE blocks
3906 and reverse the jump condition. */
3907 then_bb
= else_edge
->dest
;
3908 else_bb
= NULL_BLOCK
;
3909 join_bb
= single_succ (then_bb
);
3910 then_else_reversed
= true;
3913 /* Not a form we can handle. */
3916 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3917 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3920 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3923 num_possible_if_blocks
++;
3928 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3929 (else_bb
) ? "-ELSE" : "",
3930 pass
, test_bb
->index
, then_bb
->index
);
3933 fprintf (dump_file
, ", else %d", else_bb
->index
);
3935 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3938 /* If the conditional jump is more than just a conditional
3939 jump, then we can not do if-conversion on this block. */
3940 jump
= BB_END (test_bb
);
3941 if (! onlyjump_p (jump
))
3944 /* If this is not a standard conditional jump, we can't parse it. */
3945 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3949 /* We must be comparing objects whose modes imply the size. */
3950 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3953 /* Initialize an IF_INFO struct to pass around. */
3954 memset (&if_info
, 0, sizeof if_info
);
3955 if_info
.test_bb
= test_bb
;
3956 if_info
.then_bb
= then_bb
;
3957 if_info
.else_bb
= else_bb
;
3958 if_info
.join_bb
= join_bb
;
3959 if_info
.cond
= cond
;
3960 if_info
.cond_earliest
= cond_earliest
;
3961 if_info
.jump
= jump
;
3962 if_info
.then_else_reversed
= then_else_reversed
;
3963 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3964 predictable_edge_p (then_edge
));
3966 /* Do the real work. */
3968 if (noce_process_if_block (&if_info
))
3971 if (HAVE_conditional_move
3972 && cond_move_process_if_block (&if_info
))
3979 /* Merge the blocks and mark for local life update. */
3982 merge_if_block (struct ce_if_block
* ce_info
)
3984 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3985 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3986 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3987 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3988 basic_block combo_bb
;
3990 /* All block merging is done into the lower block numbers. */
3993 df_set_bb_dirty (test_bb
);
3995 /* Merge any basic blocks to handle && and || subtests. Each of
3996 the blocks are on the fallthru path from the predecessor block. */
3997 if (ce_info
->num_multiple_test_blocks
> 0)
3999 basic_block bb
= test_bb
;
4000 basic_block last_test_bb
= ce_info
->last_test_bb
;
4001 basic_block fallthru
= block_fallthru (bb
);
4006 fallthru
= block_fallthru (bb
);
4007 merge_blocks (combo_bb
, bb
);
4010 while (bb
!= last_test_bb
);
4013 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4014 label, but it might if there were || tests. That label's count should be
4015 zero, and it normally should be removed. */
4019 /* If THEN_BB has no successors, then there's a BARRIER after it.
4020 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4021 is no longer needed, and in fact it is incorrect to leave it in
4023 if (EDGE_COUNT (then_bb
->succs
) == 0
4024 && EDGE_COUNT (combo_bb
->succs
) > 1)
4026 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4027 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4028 end
= NEXT_INSN (end
);
4030 if (end
&& BARRIER_P (end
))
4033 merge_blocks (combo_bb
, then_bb
);
4037 /* The ELSE block, if it existed, had a label. That label count
4038 will almost always be zero, but odd things can happen when labels
4039 get their addresses taken. */
4042 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4043 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4044 is no longer needed, and in fact it is incorrect to leave it in
4046 if (EDGE_COUNT (else_bb
->succs
) == 0
4047 && EDGE_COUNT (combo_bb
->succs
) > 1)
4049 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4050 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4051 end
= NEXT_INSN (end
);
4053 if (end
&& BARRIER_P (end
))
4056 merge_blocks (combo_bb
, else_bb
);
4060 /* If there was no join block reported, that means it was not adjacent
4061 to the others, and so we cannot merge them. */
4065 rtx_insn
*last
= BB_END (combo_bb
);
4067 /* The outgoing edge for the current COMBO block should already
4068 be correct. Verify this. */
4069 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4070 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4071 || (NONJUMP_INSN_P (last
)
4072 && GET_CODE (PATTERN (last
)) == TRAP_IF
4073 && (TRAP_CONDITION (PATTERN (last
))
4074 == const_true_rtx
)));
4077 /* There should still be something at the end of the THEN or ELSE
4078 blocks taking us to our final destination. */
4079 gcc_assert (JUMP_P (last
)
4080 || (EDGE_SUCC (combo_bb
, 0)->dest
4081 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4083 && SIBLING_CALL_P (last
))
4084 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4085 && can_throw_internal (last
)));
4088 /* The JOIN block may have had quite a number of other predecessors too.
4089 Since we've already merged the TEST, THEN and ELSE blocks, we should
4090 have only one remaining edge from our if-then-else diamond. If there
4091 is more than one remaining edge, it must come from elsewhere. There
4092 may be zero incoming edges if the THEN block didn't actually join
4093 back up (as with a call to a non-return function). */
4094 else if (EDGE_COUNT (join_bb
->preds
) < 2
4095 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4097 /* We can merge the JOIN cleanly and update the dataflow try
4098 again on this pass.*/
4099 merge_blocks (combo_bb
, join_bb
);
4104 /* We cannot merge the JOIN. */
4106 /* The outgoing edge for the current COMBO block should already
4107 be correct. Verify this. */
4108 gcc_assert (single_succ_p (combo_bb
)
4109 && single_succ (combo_bb
) == join_bb
);
4111 /* Remove the jump and cruft from the end of the COMBO block. */
4112 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4113 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4116 num_updated_if_blocks
++;
4119 /* Find a block ending in a simple IF condition and try to transform it
4120 in some way. When converting a multi-block condition, put the new code
4121 in the first such block and delete the rest. Return a pointer to this
4122 first block if some transformation was done. Return NULL otherwise. */
4125 find_if_header (basic_block test_bb
, int pass
)
4127 ce_if_block ce_info
;
4131 /* The kind of block we're looking for has exactly two successors. */
4132 if (EDGE_COUNT (test_bb
->succs
) != 2)
4135 then_edge
= EDGE_SUCC (test_bb
, 0);
4136 else_edge
= EDGE_SUCC (test_bb
, 1);
4138 if (df_get_bb_dirty (then_edge
->dest
))
4140 if (df_get_bb_dirty (else_edge
->dest
))
4143 /* Neither edge should be abnormal. */
4144 if ((then_edge
->flags
& EDGE_COMPLEX
)
4145 || (else_edge
->flags
& EDGE_COMPLEX
))
4148 /* Nor exit the loop. */
4149 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4150 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4153 /* The THEN edge is canonically the one that falls through. */
4154 if (then_edge
->flags
& EDGE_FALLTHRU
)
4156 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4157 std::swap (then_edge
, else_edge
);
4159 /* Otherwise this must be a multiway branch of some sort. */
4162 memset (&ce_info
, 0, sizeof (ce_info
));
4163 ce_info
.test_bb
= test_bb
;
4164 ce_info
.then_bb
= then_edge
->dest
;
4165 ce_info
.else_bb
= else_edge
->dest
;
4166 ce_info
.pass
= pass
;
4168 #ifdef IFCVT_MACHDEP_INIT
4169 IFCVT_MACHDEP_INIT (&ce_info
);
4172 if (!reload_completed
4173 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4176 if (reload_completed
4177 && targetm
.have_conditional_execution ()
4178 && cond_exec_find_if_block (&ce_info
))
4181 if (targetm
.have_trap ()
4182 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4183 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4186 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4187 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4189 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4191 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4199 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4200 /* Set this so we continue looking. */
4201 cond_exec_changed_p
= TRUE
;
4202 return ce_info
.test_bb
;
4205 /* Return true if a block has two edges, one of which falls through to the next
4206 block, and the other jumps to a specific block, so that we can tell if the
4207 block is part of an && test or an || test. Returns either -1 or the number
4208 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4211 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4214 int fallthru_p
= FALSE
;
4221 if (!cur_bb
|| !target_bb
)
4224 /* If no edges, obviously it doesn't jump or fallthru. */
4225 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4228 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4230 if (cur_edge
->flags
& EDGE_COMPLEX
)
4231 /* Anything complex isn't what we want. */
4234 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4237 else if (cur_edge
->dest
== target_bb
)
4244 if ((jump_p
& fallthru_p
) == 0)
4247 /* Don't allow calls in the block, since this is used to group && and ||
4248 together for conditional execution support. ??? we should support
4249 conditional execution support across calls for IA-64 some day, but
4250 for now it makes the code simpler. */
4251 end
= BB_END (cur_bb
);
4252 insn
= BB_HEAD (cur_bb
);
4254 while (insn
!= NULL_RTX
)
4261 && !DEBUG_INSN_P (insn
)
4262 && GET_CODE (PATTERN (insn
)) != USE
4263 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4269 insn
= NEXT_INSN (insn
);
4275 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4276 block. If so, we'll try to convert the insns to not require the branch.
4277 Return TRUE if we were successful at converting the block. */
4280 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4282 basic_block test_bb
= ce_info
->test_bb
;
4283 basic_block then_bb
= ce_info
->then_bb
;
4284 basic_block else_bb
= ce_info
->else_bb
;
4285 basic_block join_bb
= NULL_BLOCK
;
4290 ce_info
->last_test_bb
= test_bb
;
4292 /* We only ever should get here after reload,
4293 and if we have conditional execution. */
4294 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4296 /* Discover if any fall through predecessors of the current test basic block
4297 were && tests (which jump to the else block) or || tests (which jump to
4299 if (single_pred_p (test_bb
)
4300 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4302 basic_block bb
= single_pred (test_bb
);
4303 basic_block target_bb
;
4304 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4307 /* Determine if the preceding block is an && or || block. */
4308 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4310 ce_info
->and_and_p
= TRUE
;
4311 target_bb
= else_bb
;
4313 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4315 ce_info
->and_and_p
= FALSE
;
4316 target_bb
= then_bb
;
4319 target_bb
= NULL_BLOCK
;
4321 if (target_bb
&& n_insns
<= max_insns
)
4323 int total_insns
= 0;
4326 ce_info
->last_test_bb
= test_bb
;
4328 /* Found at least one && or || block, look for more. */
4331 ce_info
->test_bb
= test_bb
= bb
;
4332 total_insns
+= n_insns
;
4335 if (!single_pred_p (bb
))
4338 bb
= single_pred (bb
);
4339 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4341 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4343 ce_info
->num_multiple_test_blocks
= blocks
;
4344 ce_info
->num_multiple_test_insns
= total_insns
;
4346 if (ce_info
->and_and_p
)
4347 ce_info
->num_and_and_blocks
= blocks
;
4349 ce_info
->num_or_or_blocks
= blocks
;
4353 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4354 other than any || blocks which jump to the THEN block. */
4355 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4358 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4359 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4361 if (cur_edge
->flags
& EDGE_COMPLEX
)
4365 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4367 if (cur_edge
->flags
& EDGE_COMPLEX
)
4371 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4372 if (EDGE_COUNT (then_bb
->succs
) > 0
4373 && (!single_succ_p (then_bb
)
4374 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4375 || (epilogue_completed
4376 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4379 /* If the THEN block has no successors, conditional execution can still
4380 make a conditional call. Don't do this unless the ELSE block has
4381 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4382 Check for the last insn of the THEN block being an indirect jump, which
4383 is listed as not having any successors, but confuses the rest of the CE
4384 code processing. ??? we should fix this in the future. */
4385 if (EDGE_COUNT (then_bb
->succs
) == 0)
4387 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4389 rtx_insn
*last_insn
= BB_END (then_bb
);
4392 && NOTE_P (last_insn
)
4393 && last_insn
!= BB_HEAD (then_bb
))
4394 last_insn
= PREV_INSN (last_insn
);
4397 && JUMP_P (last_insn
)
4398 && ! simplejump_p (last_insn
))
4402 else_bb
= NULL_BLOCK
;
4408 /* If the THEN block's successor is the other edge out of the TEST block,
4409 then we have an IF-THEN combo without an ELSE. */
4410 else if (single_succ (then_bb
) == else_bb
)
4413 else_bb
= NULL_BLOCK
;
4416 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4417 has exactly one predecessor and one successor, and the outgoing edge
4418 is not complex, then we have an IF-THEN-ELSE combo. */
4419 else if (single_succ_p (else_bb
)
4420 && single_succ (then_bb
) == single_succ (else_bb
)
4421 && single_pred_p (else_bb
)
4422 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4423 && !(epilogue_completed
4424 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4425 join_bb
= single_succ (else_bb
);
4427 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4431 num_possible_if_blocks
++;
4436 "\nIF-THEN%s block found, pass %d, start block %d "
4437 "[insn %d], then %d [%d]",
4438 (else_bb
) ? "-ELSE" : "",
4441 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4443 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4446 fprintf (dump_file
, ", else %d [%d]",
4448 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4450 fprintf (dump_file
, ", join %d [%d]",
4452 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4454 if (ce_info
->num_multiple_test_blocks
> 0)
4455 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4456 ce_info
->num_multiple_test_blocks
,
4457 (ce_info
->and_and_p
) ? "&&" : "||",
4458 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4459 ce_info
->last_test_bb
->index
,
4460 ((BB_HEAD (ce_info
->last_test_bb
))
4461 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4464 fputc ('\n', dump_file
);
4467 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4468 first condition for free, since we've already asserted that there's a
4469 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4470 we checked the FALLTHRU flag, those are already adjacent to the last IF
4472 /* ??? As an enhancement, move the ELSE block. Have to deal with
4473 BLOCK notes, if by no other means than backing out the merge if they
4474 exist. Sticky enough I don't want to think about it now. */
4476 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4478 if ((next
= next
->next_bb
) != join_bb
4479 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4487 /* Do the real work. */
4489 ce_info
->else_bb
= else_bb
;
4490 ce_info
->join_bb
= join_bb
;
4492 /* If we have && and || tests, try to first handle combining the && and ||
4493 tests into the conditional code, and if that fails, go back and handle
4494 it without the && and ||, which at present handles the && case if there
4495 was no ELSE block. */
4496 if (cond_exec_process_if_block (ce_info
, TRUE
))
4499 if (ce_info
->num_multiple_test_blocks
)
4503 if (cond_exec_process_if_block (ce_info
, FALSE
))
4510 /* Convert a branch over a trap, or a branch
4511 to a trap, into a conditional trap. */
4514 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4516 basic_block then_bb
= then_edge
->dest
;
4517 basic_block else_bb
= else_edge
->dest
;
4518 basic_block other_bb
, trap_bb
;
4519 rtx_insn
*trap
, *jump
;
4521 rtx_insn
*cond_earliest
;
4524 /* Locate the block with the trap instruction. */
4525 /* ??? While we look for no successors, we really ought to allow
4526 EH successors. Need to fix merge_if_block for that to work. */
4527 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4528 trap_bb
= then_bb
, other_bb
= else_bb
;
4529 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4530 trap_bb
= else_bb
, other_bb
= then_bb
;
4536 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4537 test_bb
->index
, trap_bb
->index
);
4540 /* If this is not a standard conditional jump, we can't parse it. */
4541 jump
= BB_END (test_bb
);
4542 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4546 /* If the conditional jump is more than just a conditional jump, then
4547 we can not do if-conversion on this block. Give up for returnjump_p,
4548 changing a conditional return followed by unconditional trap for
4549 conditional trap followed by unconditional return is likely not
4550 beneficial and harder to handle. */
4551 if (! onlyjump_p (jump
) || returnjump_p (jump
))
4554 /* We must be comparing objects whose modes imply the size. */
4555 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4558 /* Reverse the comparison code, if necessary. */
4559 code
= GET_CODE (cond
);
4560 if (then_bb
== trap_bb
)
4562 code
= reversed_comparison_code (cond
, jump
);
4563 if (code
== UNKNOWN
)
4567 /* Attempt to generate the conditional trap. */
4568 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4569 copy_rtx (XEXP (cond
, 1)),
4570 TRAP_CODE (PATTERN (trap
)));
4574 /* Emit the new insns before cond_earliest. */
4575 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4577 /* Delete the trap block if possible. */
4578 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4579 df_set_bb_dirty (test_bb
);
4580 df_set_bb_dirty (then_bb
);
4581 df_set_bb_dirty (else_bb
);
4583 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4585 delete_basic_block (trap_bb
);
4589 /* Wire together the blocks again. */
4590 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4591 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4592 else if (trap_bb
== then_bb
)
4594 rtx lab
= JUMP_LABEL (jump
);
4595 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4596 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4597 LABEL_NUSES (lab
) += 1;
4598 JUMP_LABEL (newjump
) = lab
;
4599 emit_barrier_after (newjump
);
4603 if (can_merge_blocks_p (test_bb
, other_bb
))
4605 merge_blocks (test_bb
, other_bb
);
4609 num_updated_if_blocks
++;
4613 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4617 block_has_only_trap (basic_block bb
)
4621 /* We're not the exit block. */
4622 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4625 /* The block must have no successors. */
4626 if (EDGE_COUNT (bb
->succs
) > 0)
4629 /* The only instruction in the THEN block must be the trap. */
4630 trap
= first_active_insn (bb
);
4631 if (! (trap
== BB_END (bb
)
4632 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4633 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4639 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4640 transformable, but not necessarily the other. There need be no
4643 Return TRUE if we were successful at converting the block.
4645 Cases we'd like to look at:
4648 if (test) goto over; // x not live
4656 if (! test) goto label;
4659 if (test) goto E; // x not live
4673 (3) // This one's really only interesting for targets that can do
4674 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4675 // it results in multiple branches on a cache line, which often
4676 // does not sit well with predictors.
4678 if (test1) goto E; // predicted not taken
4694 (A) Don't do (2) if the branch is predicted against the block we're
4695 eliminating. Do it anyway if we can eliminate a branch; this requires
4696 that the sole successor of the eliminated block postdominate the other
4699 (B) With CE, on (3) we can steal from both sides of the if, creating
4708 Again, this is most useful if J postdominates.
4710 (C) CE substitutes for helpful life information.
4712 (D) These heuristics need a lot of work. */
4714 /* Tests for case 1 above. */
4717 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4719 basic_block then_bb
= then_edge
->dest
;
4720 basic_block else_bb
= else_edge
->dest
;
4722 int then_bb_index
, then_prob
;
4723 rtx else_target
= NULL_RTX
;
4725 /* If we are partitioning hot/cold basic blocks, we don't want to
4726 mess up unconditional or indirect jumps that cross between hot
4729 Basic block partitioning may result in some jumps that appear to
4730 be optimizable (or blocks that appear to be mergeable), but which really
4731 must be left untouched (they are required to make it safely across
4732 partition boundaries). See the comments at the top of
4733 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4735 if ((BB_END (then_bb
)
4736 && JUMP_P (BB_END (then_bb
))
4737 && CROSSING_JUMP_P (BB_END (then_bb
)))
4738 || (BB_END (test_bb
)
4739 && JUMP_P (BB_END (test_bb
))
4740 && CROSSING_JUMP_P (BB_END (test_bb
)))
4741 || (BB_END (else_bb
)
4742 && JUMP_P (BB_END (else_bb
))
4743 && CROSSING_JUMP_P (BB_END (else_bb
))))
4746 /* THEN has one successor. */
4747 if (!single_succ_p (then_bb
))
4750 /* THEN does not fall through, but is not strange either. */
4751 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4754 /* THEN has one predecessor. */
4755 if (!single_pred_p (then_bb
))
4758 /* THEN must do something. */
4759 if (forwarder_block_p (then_bb
))
4762 num_possible_if_blocks
++;
4765 "\nIF-CASE-1 found, start %d, then %d\n",
4766 test_bb
->index
, then_bb
->index
);
4768 if (then_edge
->probability
)
4769 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4771 then_prob
= REG_BR_PROB_BASE
/ 2;
4773 /* We're speculating from the THEN path, we want to make sure the cost
4774 of speculation is within reason. */
4775 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4776 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4777 predictable_edge_p (then_edge
)))))
4780 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4782 rtx_insn
*jump
= BB_END (else_edge
->src
);
4783 gcc_assert (JUMP_P (jump
));
4784 else_target
= JUMP_LABEL (jump
);
4787 /* Registers set are dead, or are predicable. */
4788 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4789 single_succ_edge (then_bb
), 1))
4792 /* Conversion went ok, including moving the insns and fixing up the
4793 jump. Adjust the CFG to match. */
4795 /* We can avoid creating a new basic block if then_bb is immediately
4796 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4797 through to else_bb. */
4799 if (then_bb
->next_bb
== else_bb
4800 && then_bb
->prev_bb
== test_bb
4801 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4803 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4806 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4807 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4808 else_bb
, else_target
);
4810 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4813 df_set_bb_dirty (test_bb
);
4814 df_set_bb_dirty (else_bb
);
4816 then_bb_index
= then_bb
->index
;
4817 delete_basic_block (then_bb
);
4819 /* Make rest of code believe that the newly created block is the THEN_BB
4820 block we removed. */
4823 df_bb_replace (then_bb_index
, new_bb
);
4824 /* This should have been done above via force_nonfallthru_and_redirect
4825 (possibly called from redirect_edge_and_branch_force). */
4826 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4830 num_updated_if_blocks
++;
4834 /* Test for case 2 above. */
4837 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4839 basic_block then_bb
= then_edge
->dest
;
4840 basic_block else_bb
= else_edge
->dest
;
4842 int then_prob
, else_prob
;
4844 /* We do not want to speculate (empty) loop latches. */
4846 && else_bb
->loop_father
->latch
== else_bb
)
4849 /* If we are partitioning hot/cold basic blocks, we don't want to
4850 mess up unconditional or indirect jumps that cross between hot
4853 Basic block partitioning may result in some jumps that appear to
4854 be optimizable (or blocks that appear to be mergeable), but which really
4855 must be left untouched (they are required to make it safely across
4856 partition boundaries). See the comments at the top of
4857 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4859 if ((BB_END (then_bb
)
4860 && JUMP_P (BB_END (then_bb
))
4861 && CROSSING_JUMP_P (BB_END (then_bb
)))
4862 || (BB_END (test_bb
)
4863 && JUMP_P (BB_END (test_bb
))
4864 && CROSSING_JUMP_P (BB_END (test_bb
)))
4865 || (BB_END (else_bb
)
4866 && JUMP_P (BB_END (else_bb
))
4867 && CROSSING_JUMP_P (BB_END (else_bb
))))
4870 /* ELSE has one successor. */
4871 if (!single_succ_p (else_bb
))
4874 else_succ
= single_succ_edge (else_bb
);
4876 /* ELSE outgoing edge is not complex. */
4877 if (else_succ
->flags
& EDGE_COMPLEX
)
4880 /* ELSE has one predecessor. */
4881 if (!single_pred_p (else_bb
))
4884 /* THEN is not EXIT. */
4885 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4888 if (else_edge
->probability
)
4890 else_prob
= else_edge
->probability
;
4891 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4895 else_prob
= REG_BR_PROB_BASE
/ 2;
4896 then_prob
= REG_BR_PROB_BASE
/ 2;
4899 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4900 if (else_prob
> then_prob
)
4902 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4903 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4909 num_possible_if_blocks
++;
4912 "\nIF-CASE-2 found, start %d, else %d\n",
4913 test_bb
->index
, else_bb
->index
);
4915 /* We're speculating from the ELSE path, we want to make sure the cost
4916 of speculation is within reason. */
4917 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4918 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4919 predictable_edge_p (else_edge
)))))
4922 /* Registers set are dead, or are predicable. */
4923 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4926 /* Conversion went ok, including moving the insns and fixing up the
4927 jump. Adjust the CFG to match. */
4929 df_set_bb_dirty (test_bb
);
4930 df_set_bb_dirty (then_bb
);
4931 delete_basic_block (else_bb
);
4934 num_updated_if_blocks
++;
4936 /* ??? We may now fallthru from one of THEN's successors into a join
4937 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4942 /* Used by the code above to perform the actual rtl transformations.
4943 Return TRUE if successful.
4945 TEST_BB is the block containing the conditional branch. MERGE_BB
4946 is the block containing the code to manipulate. DEST_EDGE is an
4947 edge representing a jump to the join block; after the conversion,
4948 TEST_BB should be branching to its destination.
4949 REVERSEP is true if the sense of the branch should be reversed. */
4952 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4953 basic_block other_bb
, edge dest_edge
, int reversep
)
4955 basic_block new_dest
= dest_edge
->dest
;
4956 rtx_insn
*head
, *end
, *jump
;
4957 rtx_insn
*earliest
= NULL
;
4959 bitmap merge_set
= NULL
;
4960 /* Number of pending changes. */
4961 int n_validated_changes
= 0;
4962 rtx new_dest_label
= NULL_RTX
;
4964 jump
= BB_END (test_bb
);
4966 /* Find the extent of the real code in the merge block. */
4967 head
= BB_HEAD (merge_bb
);
4968 end
= BB_END (merge_bb
);
4970 while (DEBUG_INSN_P (end
) && end
!= head
)
4971 end
= PREV_INSN (end
);
4973 /* If merge_bb ends with a tablejump, predicating/moving insn's
4974 into test_bb and then deleting merge_bb will result in the jumptable
4975 that follows merge_bb being removed along with merge_bb and then we
4976 get an unresolved reference to the jumptable. */
4977 if (tablejump_p (end
, NULL
, NULL
))
4981 head
= NEXT_INSN (head
);
4982 while (DEBUG_INSN_P (head
) && head
!= end
)
4983 head
= NEXT_INSN (head
);
4991 head
= NEXT_INSN (head
);
4992 while (DEBUG_INSN_P (head
) && head
!= end
)
4993 head
= NEXT_INSN (head
);
4998 if (!onlyjump_p (end
))
5005 end
= PREV_INSN (end
);
5006 while (DEBUG_INSN_P (end
) && end
!= head
)
5007 end
= PREV_INSN (end
);
5010 /* Don't move frame-related insn across the conditional branch. This
5011 can lead to one of the paths of the branch having wrong unwind info. */
5012 if (epilogue_completed
)
5014 rtx_insn
*insn
= head
;
5017 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5021 insn
= NEXT_INSN (insn
);
5025 /* Disable handling dead code by conditional execution if the machine needs
5026 to do anything funny with the tests, etc. */
5027 #ifndef IFCVT_MODIFY_TESTS
5028 if (targetm
.have_conditional_execution ())
5030 /* In the conditional execution case, we have things easy. We know
5031 the condition is reversible. We don't have to check life info
5032 because we're going to conditionally execute the code anyway.
5033 All that's left is making sure the insns involved can actually
5038 cond
= cond_exec_get_condition (jump
);
5042 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5043 int prob_val
= (note
? XINT (note
, 0) : -1);
5047 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5050 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5053 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5056 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5057 && verify_changes (0))
5058 n_validated_changes
= num_validated_changes ();
5066 /* If we allocated new pseudos (e.g. in the conditional move
5067 expander called from noce_emit_cmove), we must resize the
5069 if (max_regno
< max_reg_num ())
5070 max_regno
= max_reg_num ();
5072 /* Try the NCE path if the CE path did not result in any changes. */
5073 if (n_validated_changes
== 0)
5080 /* In the non-conditional execution case, we have to verify that there
5081 are no trapping operations, no calls, no references to memory, and
5082 that any registers modified are dead at the branch site. */
5084 if (!any_condjump_p (jump
))
5087 /* Find the extent of the conditional. */
5088 cond
= noce_get_condition (jump
, &earliest
, false);
5092 live
= BITMAP_ALLOC (®_obstack
);
5093 simulate_backwards_to_point (merge_bb
, live
, end
);
5094 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5096 df_get_live_in (other_bb
), NULL
);
5101 /* Collect the set of registers set in MERGE_BB. */
5102 merge_set
= BITMAP_ALLOC (®_obstack
);
5104 FOR_BB_INSNS (merge_bb
, insn
)
5105 if (NONDEBUG_INSN_P (insn
))
5106 df_simulate_find_defs (insn
, merge_set
);
5108 /* If shrink-wrapping, disable this optimization when test_bb is
5109 the first basic block and merge_bb exits. The idea is to not
5110 move code setting up a return register as that may clobber a
5111 register used to pass function parameters, which then must be
5112 saved in caller-saved regs. A caller-saved reg requires the
5113 prologue, killing a shrink-wrap opportunity. */
5114 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5115 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5116 && single_succ_p (new_dest
)
5117 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5118 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5123 return_regs
= BITMAP_ALLOC (®_obstack
);
5125 /* Start off with the intersection of regs used to pass
5126 params and regs used to return values. */
5127 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5128 if (FUNCTION_ARG_REGNO_P (i
)
5129 && targetm
.calls
.function_value_regno_p (i
))
5130 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5132 bitmap_and_into (return_regs
,
5133 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5134 bitmap_and_into (return_regs
,
5135 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5136 if (!bitmap_empty_p (return_regs
))
5138 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5139 if (NONDEBUG_INSN_P (insn
))
5143 /* If this insn sets any reg in return_regs, add all
5144 reg uses to the set of regs we're interested in. */
5145 FOR_EACH_INSN_DEF (def
, insn
)
5146 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5148 df_simulate_uses (insn
, return_regs
);
5152 if (bitmap_intersect_p (merge_set
, return_regs
))
5154 BITMAP_FREE (return_regs
);
5155 BITMAP_FREE (merge_set
);
5159 BITMAP_FREE (return_regs
);
5164 /* We don't want to use normal invert_jump or redirect_jump because
5165 we don't want to delete_insn called. Also, we want to do our own
5166 change group management. */
5168 old_dest
= JUMP_LABEL (jump
);
5169 if (other_bb
!= new_dest
)
5171 if (!any_condjump_p (jump
))
5174 if (JUMP_P (BB_END (dest_edge
->src
)))
5175 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5176 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5177 new_dest_label
= ret_rtx
;
5179 new_dest_label
= block_label (new_dest
);
5181 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5183 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5184 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5188 if (verify_changes (n_validated_changes
))
5189 confirm_change_group ();
5193 if (other_bb
!= new_dest
)
5195 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5198 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5201 std::swap (BRANCH_EDGE (test_bb
)->count
,
5202 FALLTHRU_EDGE (test_bb
)->count
);
5203 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5204 FALLTHRU_EDGE (test_bb
)->probability
);
5205 update_br_prob_note (test_bb
);
5209 /* Move the insns out of MERGE_BB to before the branch. */
5214 if (end
== BB_END (merge_bb
))
5215 BB_END (merge_bb
) = PREV_INSN (head
);
5217 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5218 notes being moved might become invalid. */
5224 if (! INSN_P (insn
))
5226 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5229 remove_note (insn
, note
);
5230 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5232 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5233 notes referring to the registers being set might become invalid. */
5239 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5240 remove_reg_equal_equiv_notes_for_regno (i
);
5242 BITMAP_FREE (merge_set
);
5245 reorder_insns (head
, end
, PREV_INSN (earliest
));
5248 /* Remove the jump and edge if we can. */
5249 if (other_bb
== new_dest
)
5252 remove_edge (BRANCH_EDGE (test_bb
));
5253 /* ??? Can't merge blocks here, as then_bb is still in use.
5254 At minimum, the merge will get done just before bb-reorder. */
5263 BITMAP_FREE (merge_set
);
5268 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5269 we are after combine pass. */
5272 if_convert (bool after_combine
)
5279 df_live_add_problem ();
5280 df_live_set_all_dirty ();
5283 /* Record whether we are after combine pass. */
5284 ifcvt_after_combine
= after_combine
;
5285 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5286 != CODE_FOR_nothing
);
5287 num_possible_if_blocks
= 0;
5288 num_updated_if_blocks
= 0;
5289 num_true_changes
= 0;
5291 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5292 mark_loop_exit_edges ();
5293 loop_optimizer_finalize ();
5294 free_dominance_info (CDI_DOMINATORS
);
5296 /* Compute postdominators. */
5297 calculate_dominance_info (CDI_POST_DOMINATORS
);
5299 df_set_flags (DF_LR_RUN_DCE
);
5301 /* Go through each of the basic blocks looking for things to convert. If we
5302 have conditional execution, we make multiple passes to allow us to handle
5303 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5308 /* Only need to do dce on the first pass. */
5309 df_clear_flags (DF_LR_RUN_DCE
);
5310 cond_exec_changed_p
= FALSE
;
5313 #ifdef IFCVT_MULTIPLE_DUMPS
5314 if (dump_file
&& pass
> 1)
5315 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5318 FOR_EACH_BB_FN (bb
, cfun
)
5321 while (!df_get_bb_dirty (bb
)
5322 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5326 #ifdef IFCVT_MULTIPLE_DUMPS
5327 if (dump_file
&& cond_exec_changed_p
)
5328 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5331 while (cond_exec_changed_p
);
5333 #ifdef IFCVT_MULTIPLE_DUMPS
5335 fprintf (dump_file
, "\n\n========== no more changes\n");
5338 free_dominance_info (CDI_POST_DOMINATORS
);
5343 clear_aux_for_blocks ();
5345 /* If we allocated new pseudos, we must resize the array for sched1. */
5346 if (max_regno
< max_reg_num ())
5347 max_regno
= max_reg_num ();
5349 /* Write the final stats. */
5350 if (dump_file
&& num_possible_if_blocks
> 0)
5353 "\n%d possible IF blocks searched.\n",
5354 num_possible_if_blocks
);
5356 "%d IF blocks converted.\n",
5357 num_updated_if_blocks
);
5359 "%d true changes made.\n\n\n",
5364 df_remove_problem (df_live
);
5366 checking_verify_flow_info ();
5369 /* If-conversion and CFG cleanup. */
5371 rest_of_handle_if_conversion (void)
5373 if (flag_if_conversion
)
5377 dump_reg_info (dump_file
);
5378 dump_flow_info (dump_file
, dump_flags
);
5380 cleanup_cfg (CLEANUP_EXPENSIVE
);
5390 const pass_data pass_data_rtl_ifcvt
=
5392 RTL_PASS
, /* type */
5394 OPTGROUP_NONE
, /* optinfo_flags */
5395 TV_IFCVT
, /* tv_id */
5396 0, /* properties_required */
5397 0, /* properties_provided */
5398 0, /* properties_destroyed */
5399 0, /* todo_flags_start */
5400 TODO_df_finish
, /* todo_flags_finish */
5403 class pass_rtl_ifcvt
: public rtl_opt_pass
5406 pass_rtl_ifcvt (gcc::context
*ctxt
)
5407 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5410 /* opt_pass methods: */
5411 virtual bool gate (function
*)
5413 return (optimize
> 0) && dbg_cnt (if_conversion
);
5416 virtual unsigned int execute (function
*)
5418 return rest_of_handle_if_conversion ();
5421 }; // class pass_rtl_ifcvt
5426 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5428 return new pass_rtl_ifcvt (ctxt
);
5432 /* Rerun if-conversion, as combine may have simplified things enough
5433 to now meet sequence length restrictions. */
5437 const pass_data pass_data_if_after_combine
=
5439 RTL_PASS
, /* type */
5441 OPTGROUP_NONE
, /* optinfo_flags */
5442 TV_IFCVT
, /* tv_id */
5443 0, /* properties_required */
5444 0, /* properties_provided */
5445 0, /* properties_destroyed */
5446 0, /* todo_flags_start */
5447 TODO_df_finish
, /* todo_flags_finish */
5450 class pass_if_after_combine
: public rtl_opt_pass
5453 pass_if_after_combine (gcc::context
*ctxt
)
5454 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5457 /* opt_pass methods: */
5458 virtual bool gate (function
*)
5460 return optimize
> 0 && flag_if_conversion
5461 && dbg_cnt (if_after_combine
);
5464 virtual unsigned int execute (function
*)
5470 }; // class pass_if_after_combine
5475 make_pass_if_after_combine (gcc::context
*ctxt
)
5477 return new pass_if_after_combine (ctxt
);
5483 const pass_data pass_data_if_after_reload
=
5485 RTL_PASS
, /* type */
5487 OPTGROUP_NONE
, /* optinfo_flags */
5488 TV_IFCVT2
, /* tv_id */
5489 0, /* properties_required */
5490 0, /* properties_provided */
5491 0, /* properties_destroyed */
5492 0, /* todo_flags_start */
5493 TODO_df_finish
, /* todo_flags_finish */
5496 class pass_if_after_reload
: public rtl_opt_pass
5499 pass_if_after_reload (gcc::context
*ctxt
)
5500 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5503 /* opt_pass methods: */
5504 virtual bool gate (function
*)
5506 return optimize
> 0 && flag_if_conversion2
5507 && dbg_cnt (if_after_reload
);
5510 virtual unsigned int execute (function
*)
5516 }; // class pass_if_after_reload
5521 make_pass_if_after_reload (gcc::context
*ctxt
)
5523 return new pass_if_after_reload (ctxt
);