libjava/sysdep/arm/locks.h

   1 // locks.h - Thread synchronization primitives. ARM implementation.
   2
   3 /* Copyright (C) 2007  Free Software Foundation
   4
   5    This file is part of libgcj.
   6
   7 This software is copyrighted work licensed under the terms of the
   8 Libgcj License.  Please consult the file "LIBGCJ_LICENSE" for
   9 details.  */
  10
  11 #ifndef __SYSDEP_LOCKS_H__
  12 #define __SYSDEP_LOCKS_H__
  13
  14 typedef size_t obj_addr_t;      /* Integer type big enough for object   */
  15                                 /* address.                             */
  16
  17 /* Atomic compare and exchange.  These sequences are not actually
  18    atomic; there is a race if *ADDR != OLD_VAL and we are preempted
  19    between the two swaps.  However, they are very close to atomic, and
  20    are the best that a pre-ARMv6 implementation can do without
  21    operating system support.  LinuxThreads has been using these
  22    sequences for many years.  */
  23
  24 inline static bool
  25 compare_and_swap(volatile obj_addr_t *addr,
  26                  obj_addr_t old_val,
  27                  obj_addr_t new_val)
  28 {
  29   volatile obj_addr_t result, tmp;
  30   __asm__ ("\n"
  31            "0:  ldr     %[tmp],[%[addr]]\n"
  32            "    cmp     %[tmp],%[old_val]\n"
  33            "    movne   %[result],#0\n"
  34            "    bne     1f\n"
  35            "    swp     %[result],%[new_val],[%[addr]]\n"
  36            "    cmp     %[tmp],%[result]\n"
  37            "    swpne   %[tmp],%[result],[%[addr]]\n"
  38            "    bne     0b\n"
  39            "    mov     %[result],#1\n"
  40            "1:"
  41            : [result] "=&r" (result), [tmp] "=&r" (tmp)
  42            : [addr] "r" (addr), [new_val] "r" (new_val), [old_val] "r" (old_val)
  43            : "cc", "memory");
  44
  45   return result;
  46 }
  47
  48 inline static void
  49 release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
  50 {
  51   __asm__ __volatile__("" : : : "memory");
  52   *(addr) = new_val;
  53 }
  54
  55 inline static bool
  56 compare_and_swap_release(volatile obj_addr_t *addr,
  57                                                      obj_addr_t old,
  58                                                      obj_addr_t new_val)
  59 {
  60   return compare_and_swap(addr, old, new_val);
  61 }
  62
  63 // Ensure that subsequent instructions do not execute on stale
  64 // data that was loaded from memory before the barrier.
  65 inline static void
  66 read_barrier()
  67 {
  68   __asm__ __volatile__("" : : : "memory");
  69 }
  70
  71 // Ensure that prior stores to memory are completed with respect to other
  72 // processors.
  73 inline static void
  74 write_barrier()
  75 {
  76   __asm__ __volatile__("" : : : "memory");
  77 }
  78
  79 #endif