1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 #if GCC_VERSION >= 4000 && HAVE_DESIGNATED_INITIALIZERS
58 __extension__
struct optab_d optab_table
[OTI_MAX
]
59 = { [0 ... OTI_MAX
- 1].handlers
[0 ... NUM_MACHINE_MODES
- 1].insn_code
62 /* init_insn_codes will do runtime initialization otherwise. */
63 struct optab_d optab_table
[OTI_MAX
];
66 rtx libfunc_table
[LTI_MAX
];
68 /* Tables of patterns for converting one mode to another. */
69 #if GCC_VERSION >= 4000 && HAVE_DESIGNATED_INITIALIZERS
70 __extension__
struct convert_optab_d convert_optab_table
[COI_MAX
]
71 = { [0 ... COI_MAX
- 1].handlers
[0 ... NUM_MACHINE_MODES
- 1]
72 [0 ... NUM_MACHINE_MODES
- 1].insn_code
75 /* init_convert_optab will do runtime initialization otherwise. */
76 struct convert_optab_d convert_optab_table
[COI_MAX
];
79 /* Contains the optab used for each rtx code. */
80 optab code_to_optab
[NUM_RTX_CODE
+ 1];
82 #ifdef HAVE_conditional_move
83 /* Indexed by the machine mode, gives the insn code to make a conditional
84 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
85 setcc_gen_code to cut down on the number of named patterns. Consider a day
86 when a lot more rtx codes are conditional (eg: for the ARM). */
88 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
91 /* Indexed by the machine mode, gives the insn code for vector conditional
94 enum insn_code vcond_gen_code
[NUM_MACHINE_MODES
];
95 enum insn_code vcondu_gen_code
[NUM_MACHINE_MODES
];
97 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
99 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
101 /* Debug facility for use in GDB. */
102 void debug_optab_libfuncs (void);
104 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
105 #if ENABLE_DECIMAL_BID_FORMAT
106 #define DECIMAL_PREFIX "bid_"
108 #define DECIMAL_PREFIX "dpd_"
112 /* Info about libfunc. We use same hashtable for normal optabs and conversion
113 optab. In the first case mode2 is unused. */
114 struct GTY(()) libfunc_entry
{
116 enum machine_mode mode1
, mode2
;
120 /* Hash table used to convert declarations into nodes. */
121 static GTY((param_is (struct libfunc_entry
))) htab_t libfunc_hash
;
123 /* Used for attribute_hash. */
126 hash_libfunc (const void *p
)
128 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
130 return (((int) e
->mode1
+ (int) e
->mode2
* NUM_MACHINE_MODES
)
134 /* Used for optab_hash. */
137 eq_libfunc (const void *p
, const void *q
)
139 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
140 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
142 return (e1
->optab
== e2
->optab
143 && e1
->mode1
== e2
->mode1
144 && e1
->mode2
== e2
->mode2
);
147 /* Return libfunc corresponding operation defined by OPTAB converting
148 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
149 if no libfunc is available. */
151 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
152 enum machine_mode mode2
)
154 struct libfunc_entry e
;
155 struct libfunc_entry
**slot
;
157 e
.optab
= (size_t) (optab
- &convert_optab_table
[0]);
160 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
163 if (optab
->libcall_gen
)
165 optab
->libcall_gen (optab
, optab
->libcall_basename
, mode1
, mode2
);
166 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
168 return (*slot
)->libfunc
;
174 return (*slot
)->libfunc
;
177 /* Return libfunc corresponding operation defined by OPTAB in MODE.
178 Trigger lazy initialization if needed, return NULL if no libfunc is
181 optab_libfunc (optab optab
, enum machine_mode mode
)
183 struct libfunc_entry e
;
184 struct libfunc_entry
**slot
;
186 e
.optab
= (size_t) (optab
- &optab_table
[0]);
189 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
192 if (optab
->libcall_gen
)
194 optab
->libcall_gen (optab
, optab
->libcall_basename
,
195 optab
->libcall_suffix
, mode
);
196 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
,
199 return (*slot
)->libfunc
;
205 return (*slot
)->libfunc
;
209 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
210 the result of operation CODE applied to OP0 (and OP1 if it is a binary
213 If the last insn does not set TARGET, don't do anything, but return 1.
215 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
216 don't add the REG_EQUAL note but return 0. Our caller can then try
217 again, ensuring that TARGET is not one of the operands. */
220 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
222 rtx last_insn
, insn
, set
;
225 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
227 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
228 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
229 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
230 && GET_RTX_CLASS (code
) != RTX_COMPARE
231 && GET_RTX_CLASS (code
) != RTX_UNARY
)
234 if (GET_CODE (target
) == ZERO_EXTRACT
)
237 for (last_insn
= insns
;
238 NEXT_INSN (last_insn
) != NULL_RTX
;
239 last_insn
= NEXT_INSN (last_insn
))
242 set
= single_set (last_insn
);
246 if (! rtx_equal_p (SET_DEST (set
), target
)
247 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
248 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
249 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
252 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
253 besides the last insn. */
254 if (reg_overlap_mentioned_p (target
, op0
)
255 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
257 insn
= PREV_INSN (last_insn
);
258 while (insn
!= NULL_RTX
)
260 if (reg_set_p (target
, insn
))
263 insn
= PREV_INSN (insn
);
267 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
268 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
270 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
272 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
277 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
278 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
279 not actually do a sign-extend or zero-extend, but can leave the
280 higher-order bits of the result rtx undefined, for example, in the case
281 of logical operations, but not right shifts. */
284 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
285 int unsignedp
, int no_extend
)
289 /* If we don't have to extend and this is a constant, return it. */
290 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
293 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
294 extend since it will be more efficient to do so unless the signedness of
295 a promoted object differs from our extension. */
297 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
298 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
299 return convert_modes (mode
, oldmode
, op
, unsignedp
);
301 /* If MODE is no wider than a single word, we return a paradoxical
303 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
304 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
306 /* Otherwise, get an object of MODE, clobber it, and set the low-order
309 result
= gen_reg_rtx (mode
);
310 emit_clobber (result
);
311 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
315 /* Return the optab used for computing the operation given by the tree code,
316 CODE and the tree EXP. This function is not always usable (for example, it
317 cannot give complete results for multiplication or division) but probably
318 ought to be relied on more widely throughout the expander. */
320 optab_for_tree_code (enum tree_code code
, const_tree type
,
321 enum optab_subtype subtype
)
333 return one_cmpl_optab
;
342 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
350 if (TYPE_SATURATING(type
))
351 return TYPE_UNSIGNED(type
) ? usdiv_optab
: ssdiv_optab
;
352 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
355 if (VECTOR_MODE_P (TYPE_MODE (type
)))
357 if (subtype
== optab_vector
)
358 return TYPE_SATURATING (type
) ? NULL
: vashl_optab
;
360 gcc_assert (subtype
== optab_scalar
);
362 if (TYPE_SATURATING(type
))
363 return TYPE_UNSIGNED(type
) ? usashl_optab
: ssashl_optab
;
367 if (VECTOR_MODE_P (TYPE_MODE (type
)))
369 if (subtype
== optab_vector
)
370 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
372 gcc_assert (subtype
== optab_scalar
);
374 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
377 if (VECTOR_MODE_P (TYPE_MODE (type
)))
379 if (subtype
== optab_vector
)
382 gcc_assert (subtype
== optab_scalar
);
387 if (VECTOR_MODE_P (TYPE_MODE (type
)))
389 if (subtype
== optab_vector
)
392 gcc_assert (subtype
== optab_scalar
);
397 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
400 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
402 case REALIGN_LOAD_EXPR
:
403 return vec_realign_load_optab
;
406 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
409 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
412 return TYPE_UNSIGNED (type
) ? reduc_umax_optab
: reduc_smax_optab
;
415 return TYPE_UNSIGNED (type
) ? reduc_umin_optab
: reduc_smin_optab
;
417 case REDUC_PLUS_EXPR
:
418 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
420 case VEC_LSHIFT_EXPR
:
421 return vec_shl_optab
;
423 case VEC_RSHIFT_EXPR
:
424 return vec_shr_optab
;
426 case VEC_WIDEN_MULT_HI_EXPR
:
427 return TYPE_UNSIGNED (type
) ?
428 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
430 case VEC_WIDEN_MULT_LO_EXPR
:
431 return TYPE_UNSIGNED (type
) ?
432 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
434 case VEC_UNPACK_HI_EXPR
:
435 return TYPE_UNSIGNED (type
) ?
436 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
438 case VEC_UNPACK_LO_EXPR
:
439 return TYPE_UNSIGNED (type
) ?
440 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
442 case VEC_UNPACK_FLOAT_HI_EXPR
:
443 /* The signedness is determined from input operand. */
444 return TYPE_UNSIGNED (type
) ?
445 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
447 case VEC_UNPACK_FLOAT_LO_EXPR
:
448 /* The signedness is determined from input operand. */
449 return TYPE_UNSIGNED (type
) ?
450 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
452 case VEC_PACK_TRUNC_EXPR
:
453 return vec_pack_trunc_optab
;
455 case VEC_PACK_SAT_EXPR
:
456 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
458 case VEC_PACK_FIX_TRUNC_EXPR
:
459 /* The signedness is determined from output operand. */
460 return TYPE_UNSIGNED (type
) ?
461 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
467 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
470 case POINTER_PLUS_EXPR
:
472 if (TYPE_SATURATING(type
))
473 return TYPE_UNSIGNED(type
) ? usadd_optab
: ssadd_optab
;
474 return trapv
? addv_optab
: add_optab
;
477 if (TYPE_SATURATING(type
))
478 return TYPE_UNSIGNED(type
) ? ussub_optab
: sssub_optab
;
479 return trapv
? subv_optab
: sub_optab
;
482 if (TYPE_SATURATING(type
))
483 return TYPE_UNSIGNED(type
) ? usmul_optab
: ssmul_optab
;
484 return trapv
? smulv_optab
: smul_optab
;
487 if (TYPE_SATURATING(type
))
488 return TYPE_UNSIGNED(type
) ? usneg_optab
: ssneg_optab
;
489 return trapv
? negv_optab
: neg_optab
;
492 return trapv
? absv_optab
: abs_optab
;
494 case VEC_EXTRACT_EVEN_EXPR
:
495 return vec_extract_even_optab
;
497 case VEC_EXTRACT_ODD_EXPR
:
498 return vec_extract_odd_optab
;
500 case VEC_INTERLEAVE_HIGH_EXPR
:
501 return vec_interleave_high_optab
;
503 case VEC_INTERLEAVE_LOW_EXPR
:
504 return vec_interleave_low_optab
;
512 /* Expand vector widening operations.
514 There are two different classes of operations handled here:
515 1) Operations whose result is wider than all the arguments to the operation.
516 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
517 In this case OP0 and optionally OP1 would be initialized,
518 but WIDE_OP wouldn't (not relevant for this case).
519 2) Operations whose result is of the same size as the last argument to the
520 operation, but wider than all the other arguments to the operation.
521 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
522 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
524 E.g, when called to expand the following operations, this is how
525 the arguments will be initialized:
527 widening-sum 2 oprnd0 - oprnd1
528 widening-dot-product 3 oprnd0 oprnd1 oprnd2
529 widening-mult 2 oprnd0 oprnd1 -
530 type-promotion (vec-unpack) 1 oprnd0 - - */
533 expand_widen_pattern_expr (tree exp
, rtx op0
, rtx op1
, rtx wide_op
, rtx target
,
536 tree oprnd0
, oprnd1
, oprnd2
;
537 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
538 optab widen_pattern_optab
;
540 enum machine_mode xmode0
, xmode1
= VOIDmode
, wxmode
= VOIDmode
;
543 rtx xop0
, xop1
, wxop
;
544 int nops
= TREE_OPERAND_LENGTH (exp
);
546 oprnd0
= TREE_OPERAND (exp
, 0);
547 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
548 widen_pattern_optab
=
549 optab_for_tree_code (TREE_CODE (exp
), TREE_TYPE (oprnd0
), optab_default
);
550 icode
= (int) optab_handler (widen_pattern_optab
, tmode0
)->insn_code
;
551 gcc_assert (icode
!= CODE_FOR_nothing
);
552 xmode0
= insn_data
[icode
].operand
[1].mode
;
556 oprnd1
= TREE_OPERAND (exp
, 1);
557 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
558 xmode1
= insn_data
[icode
].operand
[2].mode
;
561 /* The last operand is of a wider mode than the rest of the operands. */
569 gcc_assert (tmode1
== tmode0
);
571 oprnd2
= TREE_OPERAND (exp
, 2);
572 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
573 wxmode
= insn_data
[icode
].operand
[3].mode
;
577 wmode
= wxmode
= insn_data
[icode
].operand
[0].mode
;
580 || ! (*insn_data
[icode
].operand
[0].predicate
) (target
, wmode
))
581 temp
= gen_reg_rtx (wmode
);
589 /* In case the insn wants input operands in modes different from
590 those of the actual operands, convert the operands. It would
591 seem that we don't need to convert CONST_INTs, but we do, so
592 that they're properly zero-extended, sign-extended or truncated
595 if (GET_MODE (op0
) != xmode0
&& xmode0
!= VOIDmode
)
596 xop0
= convert_modes (xmode0
,
597 GET_MODE (op0
) != VOIDmode
603 if (GET_MODE (op1
) != xmode1
&& xmode1
!= VOIDmode
)
604 xop1
= convert_modes (xmode1
,
605 GET_MODE (op1
) != VOIDmode
611 if (GET_MODE (wide_op
) != wxmode
&& wxmode
!= VOIDmode
)
612 wxop
= convert_modes (wxmode
,
613 GET_MODE (wide_op
) != VOIDmode
618 /* Now, if insn's predicates don't allow our operands, put them into
621 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, xmode0
)
622 && xmode0
!= VOIDmode
)
623 xop0
= copy_to_mode_reg (xmode0
, xop0
);
627 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, xmode1
)
628 && xmode1
!= VOIDmode
)
629 xop1
= copy_to_mode_reg (xmode1
, xop1
);
633 if (! (*insn_data
[icode
].operand
[3].predicate
) (wxop
, wxmode
)
634 && wxmode
!= VOIDmode
)
635 wxop
= copy_to_mode_reg (wxmode
, wxop
);
637 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
, wxop
);
640 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
646 if (! (*insn_data
[icode
].operand
[2].predicate
) (wxop
, wxmode
)
647 && wxmode
!= VOIDmode
)
648 wxop
= copy_to_mode_reg (wxmode
, wxop
);
650 pat
= GEN_FCN (icode
) (temp
, xop0
, wxop
);
653 pat
= GEN_FCN (icode
) (temp
, xop0
);
660 /* Generate code to perform an operation specified by TERNARY_OPTAB
661 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
663 UNSIGNEDP is for the case where we have to widen the operands
664 to perform the operation. It says to use zero-extension.
666 If TARGET is nonzero, the value
667 is generated there, if it is convenient to do so.
668 In all cases an rtx is returned for the locus of the value;
669 this may or may not be TARGET. */
672 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
673 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
675 int icode
= (int) optab_handler (ternary_optab
, mode
)->insn_code
;
676 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
677 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
678 enum machine_mode mode2
= insn_data
[icode
].operand
[3].mode
;
681 rtx xop0
= op0
, xop1
= op1
, xop2
= op2
;
683 gcc_assert (optab_handler (ternary_optab
, mode
)->insn_code
684 != CODE_FOR_nothing
);
686 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
687 temp
= gen_reg_rtx (mode
);
691 /* In case the insn wants input operands in modes different from
692 those of the actual operands, convert the operands. It would
693 seem that we don't need to convert CONST_INTs, but we do, so
694 that they're properly zero-extended, sign-extended or truncated
697 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
698 xop0
= convert_modes (mode0
,
699 GET_MODE (op0
) != VOIDmode
704 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
705 xop1
= convert_modes (mode1
,
706 GET_MODE (op1
) != VOIDmode
711 if (GET_MODE (op2
) != mode2
&& mode2
!= VOIDmode
)
712 xop2
= convert_modes (mode2
,
713 GET_MODE (op2
) != VOIDmode
718 /* Now, if insn's predicates don't allow our operands, put them into
721 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
)
722 && mode0
!= VOIDmode
)
723 xop0
= copy_to_mode_reg (mode0
, xop0
);
725 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
)
726 && mode1
!= VOIDmode
)
727 xop1
= copy_to_mode_reg (mode1
, xop1
);
729 if (!insn_data
[icode
].operand
[3].predicate (xop2
, mode2
)
730 && mode2
!= VOIDmode
)
731 xop2
= copy_to_mode_reg (mode2
, xop2
);
733 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
, xop2
);
740 /* Like expand_binop, but return a constant rtx if the result can be
741 calculated at compile time. The arguments and return value are
742 otherwise the same as for expand_binop. */
745 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
746 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
747 enum optab_methods methods
)
749 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
751 rtx x
= simplify_binary_operation (binoptab
->code
, mode
, op0
, op1
);
757 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
760 /* Like simplify_expand_binop, but always put the result in TARGET.
761 Return true if the expansion succeeded. */
764 force_expand_binop (enum machine_mode mode
, optab binoptab
,
765 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
766 enum optab_methods methods
)
768 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
769 target
, unsignedp
, methods
);
773 emit_move_insn (target
, x
);
777 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
780 expand_vec_shift_expr (tree vec_shift_expr
, rtx target
)
782 enum insn_code icode
;
783 rtx rtx_op1
, rtx_op2
;
784 enum machine_mode mode1
;
785 enum machine_mode mode2
;
786 enum machine_mode mode
= TYPE_MODE (TREE_TYPE (vec_shift_expr
));
787 tree vec_oprnd
= TREE_OPERAND (vec_shift_expr
, 0);
788 tree shift_oprnd
= TREE_OPERAND (vec_shift_expr
, 1);
792 switch (TREE_CODE (vec_shift_expr
))
794 case VEC_RSHIFT_EXPR
:
795 shift_optab
= vec_shr_optab
;
797 case VEC_LSHIFT_EXPR
:
798 shift_optab
= vec_shl_optab
;
804 icode
= optab_handler (shift_optab
, mode
)->insn_code
;
805 gcc_assert (icode
!= CODE_FOR_nothing
);
807 mode1
= insn_data
[icode
].operand
[1].mode
;
808 mode2
= insn_data
[icode
].operand
[2].mode
;
810 rtx_op1
= expand_normal (vec_oprnd
);
811 if (!(*insn_data
[icode
].operand
[1].predicate
) (rtx_op1
, mode1
)
812 && mode1
!= VOIDmode
)
813 rtx_op1
= force_reg (mode1
, rtx_op1
);
815 rtx_op2
= expand_normal (shift_oprnd
);
816 if (!(*insn_data
[icode
].operand
[2].predicate
) (rtx_op2
, mode2
)
817 && mode2
!= VOIDmode
)
818 rtx_op2
= force_reg (mode2
, rtx_op2
);
821 || ! (*insn_data
[icode
].operand
[0].predicate
) (target
, mode
))
822 target
= gen_reg_rtx (mode
);
824 /* Emit instruction */
825 pat
= GEN_FCN (icode
) (target
, rtx_op1
, rtx_op2
);
832 /* This subroutine of expand_doubleword_shift handles the cases in which
833 the effective shift value is >= BITS_PER_WORD. The arguments and return
834 value are the same as for the parent routine, except that SUPERWORD_OP1
835 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
836 INTO_TARGET may be null if the caller has decided to calculate it. */
839 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
840 rtx outof_target
, rtx into_target
,
841 int unsignedp
, enum optab_methods methods
)
843 if (into_target
!= 0)
844 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
845 into_target
, unsignedp
, methods
))
848 if (outof_target
!= 0)
850 /* For a signed right shift, we must fill OUTOF_TARGET with copies
851 of the sign bit, otherwise we must fill it with zeros. */
852 if (binoptab
!= ashr_optab
)
853 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
855 if (!force_expand_binop (word_mode
, binoptab
,
856 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
857 outof_target
, unsignedp
, methods
))
863 /* This subroutine of expand_doubleword_shift handles the cases in which
864 the effective shift value is < BITS_PER_WORD. The arguments and return
865 value are the same as for the parent routine. */
868 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
869 rtx outof_input
, rtx into_input
, rtx op1
,
870 rtx outof_target
, rtx into_target
,
871 int unsignedp
, enum optab_methods methods
,
872 unsigned HOST_WIDE_INT shift_mask
)
874 optab reverse_unsigned_shift
, unsigned_shift
;
877 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
878 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
880 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
881 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
882 the opposite direction to BINOPTAB. */
883 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
885 carries
= outof_input
;
886 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
887 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
892 /* We must avoid shifting by BITS_PER_WORD bits since that is either
893 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
894 has unknown behavior. Do a single shift first, then shift by the
895 remainder. It's OK to use ~OP1 as the remainder if shift counts
896 are truncated to the mode size. */
897 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
898 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
899 if (shift_mask
== BITS_PER_WORD
- 1)
901 tmp
= immed_double_const (-1, -1, op1_mode
);
902 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
907 tmp
= immed_double_const (BITS_PER_WORD
- 1, 0, op1_mode
);
908 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
912 if (tmp
== 0 || carries
== 0)
914 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
915 carries
, tmp
, 0, unsignedp
, methods
);
919 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
920 so the result can go directly into INTO_TARGET if convenient. */
921 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
922 into_target
, unsignedp
, methods
);
926 /* Now OR in the bits carried over from OUTOF_INPUT. */
927 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
928 into_target
, unsignedp
, methods
))
931 /* Use a standard word_mode shift for the out-of half. */
932 if (outof_target
!= 0)
933 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
934 outof_target
, unsignedp
, methods
))
941 #ifdef HAVE_conditional_move
942 /* Try implementing expand_doubleword_shift using conditional moves.
943 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
944 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
945 are the shift counts to use in the former and latter case. All other
946 arguments are the same as the parent routine. */
949 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
950 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
951 rtx outof_input
, rtx into_input
,
952 rtx subword_op1
, rtx superword_op1
,
953 rtx outof_target
, rtx into_target
,
954 int unsignedp
, enum optab_methods methods
,
955 unsigned HOST_WIDE_INT shift_mask
)
957 rtx outof_superword
, into_superword
;
959 /* Put the superword version of the output into OUTOF_SUPERWORD and
961 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
962 if (outof_target
!= 0 && subword_op1
== superword_op1
)
964 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
965 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
966 into_superword
= outof_target
;
967 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
968 outof_superword
, 0, unsignedp
, methods
))
973 into_superword
= gen_reg_rtx (word_mode
);
974 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
975 outof_superword
, into_superword
,
980 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
981 if (!expand_subword_shift (op1_mode
, binoptab
,
982 outof_input
, into_input
, subword_op1
,
983 outof_target
, into_target
,
984 unsignedp
, methods
, shift_mask
))
987 /* Select between them. Do the INTO half first because INTO_SUPERWORD
988 might be the current value of OUTOF_TARGET. */
989 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
990 into_target
, into_superword
, word_mode
, false))
993 if (outof_target
!= 0)
994 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
995 outof_target
, outof_superword
,
1003 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
1004 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
1005 input operand; the shift moves bits in the direction OUTOF_INPUT->
1006 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
1007 of the target. OP1 is the shift count and OP1_MODE is its mode.
1008 If OP1 is constant, it will have been truncated as appropriate
1009 and is known to be nonzero.
1011 If SHIFT_MASK is zero, the result of word shifts is undefined when the
1012 shift count is outside the range [0, BITS_PER_WORD). This routine must
1013 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
1015 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
1016 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
1017 fill with zeros or sign bits as appropriate.
1019 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
1020 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
1021 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
1022 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
1025 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
1026 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1027 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1028 function wants to calculate it itself.
1030 Return true if the shift could be successfully synthesized. */
1033 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
1034 rtx outof_input
, rtx into_input
, rtx op1
,
1035 rtx outof_target
, rtx into_target
,
1036 int unsignedp
, enum optab_methods methods
,
1037 unsigned HOST_WIDE_INT shift_mask
)
1039 rtx superword_op1
, tmp
, cmp1
, cmp2
;
1040 rtx subword_label
, done_label
;
1041 enum rtx_code cmp_code
;
1043 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1044 fill the result with sign or zero bits as appropriate. If so, the value
1045 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1046 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1047 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1049 This isn't worthwhile for constant shifts since the optimizers will
1050 cope better with in-range shift counts. */
1051 if (shift_mask
>= BITS_PER_WORD
1052 && outof_target
!= 0
1053 && !CONSTANT_P (op1
))
1055 if (!expand_doubleword_shift (op1_mode
, binoptab
,
1056 outof_input
, into_input
, op1
,
1058 unsignedp
, methods
, shift_mask
))
1060 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1061 outof_target
, unsignedp
, methods
))
1066 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1067 is true when the effective shift value is less than BITS_PER_WORD.
1068 Set SUPERWORD_OP1 to the shift count that should be used to shift
1069 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1070 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
1071 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1073 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1074 is a subword shift count. */
1075 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1077 cmp2
= CONST0_RTX (op1_mode
);
1079 superword_op1
= op1
;
1083 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1084 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1086 cmp2
= CONST0_RTX (op1_mode
);
1088 superword_op1
= cmp1
;
1093 /* If we can compute the condition at compile time, pick the
1094 appropriate subroutine. */
1095 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1096 if (tmp
!= 0 && CONST_INT_P (tmp
))
1098 if (tmp
== const0_rtx
)
1099 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1100 outof_target
, into_target
,
1101 unsignedp
, methods
);
1103 return expand_subword_shift (op1_mode
, binoptab
,
1104 outof_input
, into_input
, op1
,
1105 outof_target
, into_target
,
1106 unsignedp
, methods
, shift_mask
);
1109 #ifdef HAVE_conditional_move
1110 /* Try using conditional moves to generate straight-line code. */
1112 rtx start
= get_last_insn ();
1113 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1114 cmp_code
, cmp1
, cmp2
,
1115 outof_input
, into_input
,
1117 outof_target
, into_target
,
1118 unsignedp
, methods
, shift_mask
))
1120 delete_insns_since (start
);
1124 /* As a last resort, use branches to select the correct alternative. */
1125 subword_label
= gen_label_rtx ();
1126 done_label
= gen_label_rtx ();
1129 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1130 0, 0, subword_label
);
1133 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1134 outof_target
, into_target
,
1135 unsignedp
, methods
))
1138 emit_jump_insn (gen_jump (done_label
));
1140 emit_label (subword_label
);
1142 if (!expand_subword_shift (op1_mode
, binoptab
,
1143 outof_input
, into_input
, op1
,
1144 outof_target
, into_target
,
1145 unsignedp
, methods
, shift_mask
))
1148 emit_label (done_label
);
1152 /* Subroutine of expand_binop. Perform a double word multiplication of
1153 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1154 as the target's word_mode. This function return NULL_RTX if anything
1155 goes wrong, in which case it may have already emitted instructions
1156 which need to be deleted.
1158 If we want to multiply two two-word values and have normal and widening
1159 multiplies of single-word values, we can do this with three smaller
1162 The multiplication proceeds as follows:
1163 _______________________
1164 [__op0_high_|__op0_low__]
1165 _______________________
1166 * [__op1_high_|__op1_low__]
1167 _______________________________________________
1168 _______________________
1169 (1) [__op0_low__*__op1_low__]
1170 _______________________
1171 (2a) [__op0_low__*__op1_high_]
1172 _______________________
1173 (2b) [__op0_high_*__op1_low__]
1174 _______________________
1175 (3) [__op0_high_*__op1_high_]
1178 This gives a 4-word result. Since we are only interested in the
1179 lower 2 words, partial result (3) and the upper words of (2a) and
1180 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1181 calculated using non-widening multiplication.
1183 (1), however, needs to be calculated with an unsigned widening
1184 multiplication. If this operation is not directly supported we
1185 try using a signed widening multiplication and adjust the result.
1186 This adjustment works as follows:
1188 If both operands are positive then no adjustment is needed.
1190 If the operands have different signs, for example op0_low < 0 and
1191 op1_low >= 0, the instruction treats the most significant bit of
1192 op0_low as a sign bit instead of a bit with significance
1193 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1194 with 2**BITS_PER_WORD - op0_low, and two's complements the
1195 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1198 Similarly, if both operands are negative, we need to add
1199 (op0_low + op1_low) * 2**BITS_PER_WORD.
1201 We use a trick to adjust quickly. We logically shift op0_low right
1202 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1203 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1204 logical shift exists, we do an arithmetic right shift and subtract
1208 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1209 bool umulp
, enum optab_methods methods
)
1211 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1212 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1213 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1214 rtx product
, adjust
, product_high
, temp
;
1216 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1217 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1218 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1219 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1221 /* If we're using an unsigned multiply to directly compute the product
1222 of the low-order words of the operands and perform any required
1223 adjustments of the operands, we begin by trying two more multiplications
1224 and then computing the appropriate sum.
1226 We have checked above that the required addition is provided.
1227 Full-word addition will normally always succeed, especially if
1228 it is provided at all, so we don't worry about its failure. The
1229 multiplication may well fail, however, so we do handle that. */
1233 /* ??? This could be done with emit_store_flag where available. */
1234 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1235 NULL_RTX
, 1, methods
);
1237 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1238 NULL_RTX
, 0, OPTAB_DIRECT
);
1241 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1242 NULL_RTX
, 0, methods
);
1245 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1246 NULL_RTX
, 0, OPTAB_DIRECT
);
1253 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1254 NULL_RTX
, 0, OPTAB_DIRECT
);
1258 /* OP0_HIGH should now be dead. */
1262 /* ??? This could be done with emit_store_flag where available. */
1263 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1264 NULL_RTX
, 1, methods
);
1266 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1267 NULL_RTX
, 0, OPTAB_DIRECT
);
1270 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1271 NULL_RTX
, 0, methods
);
1274 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1275 NULL_RTX
, 0, OPTAB_DIRECT
);
1282 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1283 NULL_RTX
, 0, OPTAB_DIRECT
);
1287 /* OP1_HIGH should now be dead. */
1289 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1290 adjust
, 0, OPTAB_DIRECT
);
1292 if (target
&& !REG_P (target
))
1296 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1297 target
, 1, OPTAB_DIRECT
);
1299 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1300 target
, 1, OPTAB_DIRECT
);
1305 product_high
= operand_subword (product
, high
, 1, mode
);
1306 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1307 REG_P (product_high
) ? product_high
: adjust
,
1309 emit_move_insn (product_high
, adjust
);
1313 /* Wrapper around expand_binop which takes an rtx code to specify
1314 the operation to perform, not an optab pointer. All other
1315 arguments are the same. */
1317 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1318 rtx op1
, rtx target
, int unsignedp
,
1319 enum optab_methods methods
)
1321 optab binop
= code_to_optab
[(int) code
];
1324 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1327 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1328 binop. Order them according to commutative_operand_precedence and, if
1329 possible, try to put TARGET or a pseudo first. */
1331 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1333 int op0_prec
= commutative_operand_precedence (op0
);
1334 int op1_prec
= commutative_operand_precedence (op1
);
1336 if (op0_prec
< op1_prec
)
1339 if (op0_prec
> op1_prec
)
1342 /* With equal precedence, both orders are ok, but it is better if the
1343 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1344 if (target
== 0 || REG_P (target
))
1345 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1347 return rtx_equal_p (op1
, target
);
1350 /* Return true if BINOPTAB implements a shift operation. */
1353 shift_optab_p (optab binoptab
)
1355 switch (binoptab
->code
)
1371 /* Return true if BINOPTAB implements a commutative binary operation. */
1374 commutative_optab_p (optab binoptab
)
1376 return (GET_RTX_CLASS (binoptab
->code
) == RTX_COMM_ARITH
1377 || binoptab
== smul_widen_optab
1378 || binoptab
== umul_widen_optab
1379 || binoptab
== smul_highpart_optab
1380 || binoptab
== umul_highpart_optab
);
1383 /* X is to be used in mode MODE as an operand to BINOPTAB. If we're
1384 optimizing, and if the operand is a constant that costs more than
1385 1 instruction, force the constant into a register and return that
1386 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1389 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1390 rtx x
, bool unsignedp
)
1392 if (mode
!= VOIDmode
1395 && rtx_cost (x
, binoptab
->code
, optimize_insn_for_speed_p ())
1396 > COSTS_N_INSNS (1))
1398 if (CONST_INT_P (x
))
1400 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1401 if (intval
!= INTVAL (x
))
1402 x
= GEN_INT (intval
);
1405 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1406 x
= force_reg (mode
, x
);
1411 /* Helper function for expand_binop: handle the case where there
1412 is an insn that directly implements the indicated operation.
1413 Returns null if this is not possible. */
1415 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1417 rtx target
, int unsignedp
, enum optab_methods methods
,
1420 int icode
= (int) optab_handler (binoptab
, mode
)->insn_code
;
1421 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
1422 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
1423 enum machine_mode tmp_mode
;
1426 rtx xop0
= op0
, xop1
= op1
;
1433 temp
= gen_reg_rtx (mode
);
1435 /* If it is a commutative operator and the modes would match
1436 if we would swap the operands, we can save the conversions. */
1437 commutative_p
= commutative_optab_p (binoptab
);
1439 && GET_MODE (xop0
) != mode0
&& GET_MODE (xop1
) != mode1
1440 && GET_MODE (xop0
) == mode1
&& GET_MODE (xop1
) == mode1
)
1447 /* If we are optimizing, force expensive constants into a register. */
1448 xop0
= avoid_expensive_constant (mode0
, binoptab
, xop0
, unsignedp
);
1449 if (!shift_optab_p (binoptab
))
1450 xop1
= avoid_expensive_constant (mode1
, binoptab
, xop1
, unsignedp
);
1452 /* In case the insn wants input operands in modes different from
1453 those of the actual operands, convert the operands. It would
1454 seem that we don't need to convert CONST_INTs, but we do, so
1455 that they're properly zero-extended, sign-extended or truncated
1458 if (GET_MODE (xop0
) != mode0
&& mode0
!= VOIDmode
)
1459 xop0
= convert_modes (mode0
,
1460 GET_MODE (xop0
) != VOIDmode
1465 if (GET_MODE (xop1
) != mode1
&& mode1
!= VOIDmode
)
1466 xop1
= convert_modes (mode1
,
1467 GET_MODE (xop1
) != VOIDmode
1472 /* If operation is commutative,
1473 try to make the first operand a register.
1474 Even better, try to make it the same as the target.
1475 Also try to make the last operand a constant. */
1477 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1484 /* Now, if insn's predicates don't allow our operands, put them into
1487 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
)
1488 && mode0
!= VOIDmode
)
1489 xop0
= copy_to_mode_reg (mode0
, xop0
);
1491 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
)
1492 && mode1
!= VOIDmode
)
1493 xop1
= copy_to_mode_reg (mode1
, xop1
);
1495 if (binoptab
== vec_pack_trunc_optab
1496 || binoptab
== vec_pack_usat_optab
1497 || binoptab
== vec_pack_ssat_optab
1498 || binoptab
== vec_pack_ufix_trunc_optab
1499 || binoptab
== vec_pack_sfix_trunc_optab
)
1501 /* The mode of the result is different then the mode of the
1503 tmp_mode
= insn_data
[icode
].operand
[0].mode
;
1504 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1510 if (!insn_data
[icode
].operand
[0].predicate (temp
, tmp_mode
))
1511 temp
= gen_reg_rtx (tmp_mode
);
1513 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
1516 /* If PAT is composed of more than one insn, try to add an appropriate
1517 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1518 operand, call expand_binop again, this time without a target. */
1519 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1520 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
1522 delete_insns_since (last
);
1523 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1524 unsignedp
, methods
);
1531 delete_insns_since (last
);
1535 /* Generate code to perform an operation specified by BINOPTAB
1536 on operands OP0 and OP1, with result having machine-mode MODE.
1538 UNSIGNEDP is for the case where we have to widen the operands
1539 to perform the operation. It says to use zero-extension.
1541 If TARGET is nonzero, the value
1542 is generated there, if it is convenient to do so.
1543 In all cases an rtx is returned for the locus of the value;
1544 this may or may not be TARGET. */
1547 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1548 rtx target
, int unsignedp
, enum optab_methods methods
)
1550 enum optab_methods next_methods
1551 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1552 ? OPTAB_WIDEN
: methods
);
1553 enum mode_class mclass
;
1554 enum machine_mode wider_mode
;
1557 rtx entry_last
= get_last_insn ();
1560 mclass
= GET_MODE_CLASS (mode
);
1562 /* If subtracting an integer constant, convert this into an addition of
1563 the negated constant. */
1565 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1567 op1
= negate_rtx (mode
, op1
);
1568 binoptab
= add_optab
;
1571 /* Record where to delete back to if we backtrack. */
1572 last
= get_last_insn ();
1574 /* If we can do it with a three-operand insn, do so. */
1576 if (methods
!= OPTAB_MUST_WIDEN
1577 && optab_handler (binoptab
, mode
)->insn_code
!= CODE_FOR_nothing
)
1579 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1580 unsignedp
, methods
, last
);
1585 /* If we were trying to rotate, and that didn't work, try rotating
1586 the other direction before falling back to shifts and bitwise-or. */
1587 if (((binoptab
== rotl_optab
1588 && optab_handler (rotr_optab
, mode
)->insn_code
!= CODE_FOR_nothing
)
1589 || (binoptab
== rotr_optab
1590 && optab_handler (rotl_optab
, mode
)->insn_code
!= CODE_FOR_nothing
))
1591 && mclass
== MODE_INT
)
1593 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1595 unsigned int bits
= GET_MODE_BITSIZE (mode
);
1597 if (CONST_INT_P (op1
))
1598 newop1
= GEN_INT (bits
- INTVAL (op1
));
1599 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1600 newop1
= negate_rtx (mode
, op1
);
1602 newop1
= expand_binop (mode
, sub_optab
,
1603 GEN_INT (bits
), op1
,
1604 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1606 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1607 target
, unsignedp
, methods
, last
);
1612 /* If this is a multiply, see if we can do a widening operation that
1613 takes operands of this mode and makes a wider mode. */
1615 if (binoptab
== smul_optab
1616 && GET_MODE_WIDER_MODE (mode
) != VOIDmode
1617 && ((optab_handler ((unsignedp
? umul_widen_optab
: smul_widen_optab
),
1618 GET_MODE_WIDER_MODE (mode
))->insn_code
)
1619 != CODE_FOR_nothing
))
1621 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
1622 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1623 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1627 if (GET_MODE_CLASS (mode
) == MODE_INT
1628 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1629 GET_MODE_BITSIZE (GET_MODE (temp
))))
1630 return gen_lowpart (mode
, temp
);
1632 return convert_to_mode (mode
, temp
, unsignedp
);
1636 /* Look for a wider mode of the same class for which we think we
1637 can open-code the operation. Check for a widening multiply at the
1638 wider mode as well. */
1640 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1641 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1642 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1643 wider_mode
!= VOIDmode
;
1644 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1646 if (optab_handler (binoptab
, wider_mode
)->insn_code
!= CODE_FOR_nothing
1647 || (binoptab
== smul_optab
1648 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1649 && ((optab_handler ((unsignedp
? umul_widen_optab
1650 : smul_widen_optab
),
1651 GET_MODE_WIDER_MODE (wider_mode
))->insn_code
)
1652 != CODE_FOR_nothing
)))
1654 rtx xop0
= op0
, xop1
= op1
;
1657 /* For certain integer operations, we need not actually extend
1658 the narrow operands, as long as we will truncate
1659 the results to the same narrowness. */
1661 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1662 || binoptab
== xor_optab
1663 || binoptab
== add_optab
|| binoptab
== sub_optab
1664 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1665 && mclass
== MODE_INT
)
1668 xop0
= avoid_expensive_constant (mode
, binoptab
,
1670 if (binoptab
!= ashl_optab
)
1671 xop1
= avoid_expensive_constant (mode
, binoptab
,
1675 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1677 /* The second operand of a shift must always be extended. */
1678 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1679 no_extend
&& binoptab
!= ashl_optab
);
1681 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1682 unsignedp
, OPTAB_DIRECT
);
1685 if (mclass
!= MODE_INT
1686 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1687 GET_MODE_BITSIZE (wider_mode
)))
1690 target
= gen_reg_rtx (mode
);
1691 convert_move (target
, temp
, 0);
1695 return gen_lowpart (mode
, temp
);
1698 delete_insns_since (last
);
1702 /* If operation is commutative,
1703 try to make the first operand a register.
1704 Even better, try to make it the same as the target.
1705 Also try to make the last operand a constant. */
1706 if (commutative_optab_p (binoptab
)
1707 && swap_commutative_operands_with_target (target
, op0
, op1
))
1714 /* These can be done a word at a time. */
1715 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1716 && mclass
== MODE_INT
1717 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1718 && optab_handler (binoptab
, word_mode
)->insn_code
!= CODE_FOR_nothing
)
1724 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1725 won't be accurate, so use a new target. */
1726 if (target
== 0 || target
== op0
|| target
== op1
)
1727 target
= gen_reg_rtx (mode
);
1731 /* Do the actual arithmetic. */
1732 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1734 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1735 rtx x
= expand_binop (word_mode
, binoptab
,
1736 operand_subword_force (op0
, i
, mode
),
1737 operand_subword_force (op1
, i
, mode
),
1738 target_piece
, unsignedp
, next_methods
);
1743 if (target_piece
!= x
)
1744 emit_move_insn (target_piece
, x
);
1747 insns
= get_insns ();
1750 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1752 if (binoptab
->code
!= UNKNOWN
)
1754 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1755 copy_rtx (op0
), copy_rtx (op1
));
1764 /* Synthesize double word shifts from single word shifts. */
1765 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1766 || binoptab
== ashr_optab
)
1767 && mclass
== MODE_INT
1768 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1769 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1770 && optab_handler (binoptab
, word_mode
)->insn_code
!= CODE_FOR_nothing
1771 && optab_handler (ashl_optab
, word_mode
)->insn_code
!= CODE_FOR_nothing
1772 && optab_handler (lshr_optab
, word_mode
)->insn_code
!= CODE_FOR_nothing
)
1774 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1775 enum machine_mode op1_mode
;
1777 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1778 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1779 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1781 /* Apply the truncation to constant shifts. */
1782 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1783 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1785 if (op1
== CONST0_RTX (op1_mode
))
1788 /* Make sure that this is a combination that expand_doubleword_shift
1789 can handle. See the comments there for details. */
1790 if (double_shift_mask
== 0
1791 || (shift_mask
== BITS_PER_WORD
- 1
1792 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1795 rtx into_target
, outof_target
;
1796 rtx into_input
, outof_input
;
1797 int left_shift
, outof_word
;
1799 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1800 won't be accurate, so use a new target. */
1801 if (target
== 0 || target
== op0
|| target
== op1
)
1802 target
= gen_reg_rtx (mode
);
1806 /* OUTOF_* is the word we are shifting bits away from, and
1807 INTO_* is the word that we are shifting bits towards, thus
1808 they differ depending on the direction of the shift and
1809 WORDS_BIG_ENDIAN. */
1811 left_shift
= binoptab
== ashl_optab
;
1812 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1814 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1815 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1817 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1818 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1820 if (expand_doubleword_shift (op1_mode
, binoptab
,
1821 outof_input
, into_input
, op1
,
1822 outof_target
, into_target
,
1823 unsignedp
, next_methods
, shift_mask
))
1825 insns
= get_insns ();
1835 /* Synthesize double word rotates from single word shifts. */
1836 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1837 && mclass
== MODE_INT
1838 && CONST_INT_P (op1
)
1839 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1840 && optab_handler (ashl_optab
, word_mode
)->insn_code
!= CODE_FOR_nothing
1841 && optab_handler (lshr_optab
, word_mode
)->insn_code
!= CODE_FOR_nothing
)
1844 rtx into_target
, outof_target
;
1845 rtx into_input
, outof_input
;
1847 int shift_count
, left_shift
, outof_word
;
1849 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1850 won't be accurate, so use a new target. Do this also if target is not
1851 a REG, first because having a register instead may open optimization
1852 opportunities, and second because if target and op0 happen to be MEMs
1853 designating the same location, we would risk clobbering it too early
1854 in the code sequence we generate below. */
1855 if (target
== 0 || target
== op0
|| target
== op1
|| ! REG_P (target
))
1856 target
= gen_reg_rtx (mode
);
1860 shift_count
= INTVAL (op1
);
1862 /* OUTOF_* is the word we are shifting bits away from, and
1863 INTO_* is the word that we are shifting bits towards, thus
1864 they differ depending on the direction of the shift and
1865 WORDS_BIG_ENDIAN. */
1867 left_shift
= (binoptab
== rotl_optab
);
1868 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1870 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1871 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1873 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1874 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1876 if (shift_count
== BITS_PER_WORD
)
1878 /* This is just a word swap. */
1879 emit_move_insn (outof_target
, into_input
);
1880 emit_move_insn (into_target
, outof_input
);
1885 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1886 rtx first_shift_count
, second_shift_count
;
1887 optab reverse_unsigned_shift
, unsigned_shift
;
1889 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1890 ? lshr_optab
: ashl_optab
);
1892 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1893 ? ashl_optab
: lshr_optab
);
1895 if (shift_count
> BITS_PER_WORD
)
1897 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1898 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1902 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1903 second_shift_count
= GEN_INT (shift_count
);
1906 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1907 outof_input
, first_shift_count
,
1908 NULL_RTX
, unsignedp
, next_methods
);
1909 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1910 into_input
, second_shift_count
,
1911 NULL_RTX
, unsignedp
, next_methods
);
1913 if (into_temp1
!= 0 && into_temp2
!= 0)
1914 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1915 into_target
, unsignedp
, next_methods
);
1919 if (inter
!= 0 && inter
!= into_target
)
1920 emit_move_insn (into_target
, inter
);
1922 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1923 into_input
, first_shift_count
,
1924 NULL_RTX
, unsignedp
, next_methods
);
1925 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1926 outof_input
, second_shift_count
,
1927 NULL_RTX
, unsignedp
, next_methods
);
1929 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1930 inter
= expand_binop (word_mode
, ior_optab
,
1931 outof_temp1
, outof_temp2
,
1932 outof_target
, unsignedp
, next_methods
);
1934 if (inter
!= 0 && inter
!= outof_target
)
1935 emit_move_insn (outof_target
, inter
);
1938 insns
= get_insns ();
1948 /* These can be done a word at a time by propagating carries. */
1949 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1950 && mclass
== MODE_INT
1951 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1952 && optab_handler (binoptab
, word_mode
)->insn_code
!= CODE_FOR_nothing
)
1955 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1956 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1957 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1958 rtx xop0
, xop1
, xtarget
;
1960 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1961 value is one of those, use it. Otherwise, use 1 since it is the
1962 one easiest to get. */
1963 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1964 int normalizep
= STORE_FLAG_VALUE
;
1969 /* Prepare the operands. */
1970 xop0
= force_reg (mode
, op0
);
1971 xop1
= force_reg (mode
, op1
);
1973 xtarget
= gen_reg_rtx (mode
);
1975 if (target
== 0 || !REG_P (target
))
1978 /* Indicate for flow that the entire target reg is being set. */
1980 emit_clobber (xtarget
);
1982 /* Do the actual arithmetic. */
1983 for (i
= 0; i
< nwords
; i
++)
1985 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1986 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1987 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1988 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1991 /* Main add/subtract of the input operands. */
1992 x
= expand_binop (word_mode
, binoptab
,
1993 op0_piece
, op1_piece
,
1994 target_piece
, unsignedp
, next_methods
);
2000 /* Store carry from main add/subtract. */
2001 carry_out
= gen_reg_rtx (word_mode
);
2002 carry_out
= emit_store_flag_force (carry_out
,
2003 (binoptab
== add_optab
2006 word_mode
, 1, normalizep
);
2013 /* Add/subtract previous carry to main result. */
2014 newx
= expand_binop (word_mode
,
2015 normalizep
== 1 ? binoptab
: otheroptab
,
2017 NULL_RTX
, 1, next_methods
);
2021 /* Get out carry from adding/subtracting carry in. */
2022 rtx carry_tmp
= gen_reg_rtx (word_mode
);
2023 carry_tmp
= emit_store_flag_force (carry_tmp
,
2024 (binoptab
== add_optab
2027 word_mode
, 1, normalizep
);
2029 /* Logical-ior the two poss. carry together. */
2030 carry_out
= expand_binop (word_mode
, ior_optab
,
2031 carry_out
, carry_tmp
,
2032 carry_out
, 0, next_methods
);
2036 emit_move_insn (target_piece
, newx
);
2040 if (x
!= target_piece
)
2041 emit_move_insn (target_piece
, x
);
2044 carry_in
= carry_out
;
2047 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2049 if (optab_handler (mov_optab
, mode
)->insn_code
!= CODE_FOR_nothing
2050 || ! rtx_equal_p (target
, xtarget
))
2052 rtx temp
= emit_move_insn (target
, xtarget
);
2054 set_unique_reg_note (temp
,
2056 gen_rtx_fmt_ee (binoptab
->code
, mode
,
2067 delete_insns_since (last
);
2070 /* Attempt to synthesize double word multiplies using a sequence of word
2071 mode multiplications. We first attempt to generate a sequence using a
2072 more efficient unsigned widening multiply, and if that fails we then
2073 try using a signed widening multiply. */
2075 if (binoptab
== smul_optab
2076 && mclass
== MODE_INT
2077 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2078 && optab_handler (smul_optab
, word_mode
)->insn_code
!= CODE_FOR_nothing
2079 && optab_handler (add_optab
, word_mode
)->insn_code
!= CODE_FOR_nothing
)
2081 rtx product
= NULL_RTX
;
2083 if (optab_handler (umul_widen_optab
, mode
)->insn_code
2084 != CODE_FOR_nothing
)
2086 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2089 delete_insns_since (last
);
2092 if (product
== NULL_RTX
2093 && optab_handler (smul_widen_optab
, mode
)->insn_code
2094 != CODE_FOR_nothing
)
2096 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2099 delete_insns_since (last
);
2102 if (product
!= NULL_RTX
)
2104 if (optab_handler (mov_optab
, mode
)->insn_code
!= CODE_FOR_nothing
)
2106 temp
= emit_move_insn (target
? target
: product
, product
);
2107 set_unique_reg_note (temp
,
2109 gen_rtx_fmt_ee (MULT
, mode
,
2117 /* It can't be open-coded in this mode.
2118 Use a library call if one is available and caller says that's ok. */
2120 libfunc
= optab_libfunc (binoptab
, mode
);
2122 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2126 enum machine_mode op1_mode
= mode
;
2131 if (shift_optab_p (binoptab
))
2133 op1_mode
= targetm
.libgcc_shift_count_mode ();
2134 /* Specify unsigned here,
2135 since negative shift counts are meaningless. */
2136 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2139 if (GET_MODE (op0
) != VOIDmode
2140 && GET_MODE (op0
) != mode
)
2141 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2143 /* Pass 1 for NO_QUEUE so we don't lose any increments
2144 if the libcall is cse'd or moved. */
2145 value
= emit_library_call_value (libfunc
,
2146 NULL_RTX
, LCT_CONST
, mode
, 2,
2147 op0
, mode
, op1x
, op1_mode
);
2149 insns
= get_insns ();
2152 target
= gen_reg_rtx (mode
);
2153 emit_libcall_block (insns
, target
, value
,
2154 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
2159 delete_insns_since (last
);
2161 /* It can't be done in this mode. Can we do it in a wider mode? */
2163 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2164 || methods
== OPTAB_MUST_WIDEN
))
2166 /* Caller says, don't even try. */
2167 delete_insns_since (entry_last
);
2171 /* Compute the value of METHODS to pass to recursive calls.
2172 Don't allow widening to be tried recursively. */
2174 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2176 /* Look for a wider mode of the same class for which it appears we can do
2179 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2181 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2182 wider_mode
!= VOIDmode
;
2183 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2185 if ((optab_handler (binoptab
, wider_mode
)->insn_code
2186 != CODE_FOR_nothing
)
2187 || (methods
== OPTAB_LIB
2188 && optab_libfunc (binoptab
, wider_mode
)))
2190 rtx xop0
= op0
, xop1
= op1
;
2193 /* For certain integer operations, we need not actually extend
2194 the narrow operands, as long as we will truncate
2195 the results to the same narrowness. */
2197 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2198 || binoptab
== xor_optab
2199 || binoptab
== add_optab
|| binoptab
== sub_optab
2200 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2201 && mclass
== MODE_INT
)
2204 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2205 unsignedp
, no_extend
);
2207 /* The second operand of a shift must always be extended. */
2208 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2209 no_extend
&& binoptab
!= ashl_optab
);
2211 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2212 unsignedp
, methods
);
2215 if (mclass
!= MODE_INT
2216 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
2217 GET_MODE_BITSIZE (wider_mode
)))
2220 target
= gen_reg_rtx (mode
);
2221 convert_move (target
, temp
, 0);
2225 return gen_lowpart (mode
, temp
);
2228 delete_insns_since (last
);
2233 delete_insns_since (entry_last
);
2237 /* Expand a binary operator which has both signed and unsigned forms.
2238 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2241 If we widen unsigned operands, we may use a signed wider operation instead
2242 of an unsigned wider operation, since the result would be the same. */
2245 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2246 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2247 enum optab_methods methods
)
2250 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2251 struct optab_d wide_soptab
;
2253 /* Do it without widening, if possible. */
2254 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2255 unsignedp
, OPTAB_DIRECT
);
2256 if (temp
|| methods
== OPTAB_DIRECT
)
2259 /* Try widening to a signed int. Make a fake signed optab that
2260 hides any signed insn for direct use. */
2261 wide_soptab
= *soptab
;
2262 optab_handler (&wide_soptab
, mode
)->insn_code
= CODE_FOR_nothing
;
2263 /* We don't want to generate new hash table entries from this fake
2265 wide_soptab
.libcall_gen
= NULL
;
2267 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2268 unsignedp
, OPTAB_WIDEN
);
2270 /* For unsigned operands, try widening to an unsigned int. */
2271 if (temp
== 0 && unsignedp
)
2272 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2273 unsignedp
, OPTAB_WIDEN
);
2274 if (temp
|| methods
== OPTAB_WIDEN
)
2277 /* Use the right width libcall if that exists. */
2278 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2279 if (temp
|| methods
== OPTAB_LIB
)
2282 /* Must widen and use a libcall, use either signed or unsigned. */
2283 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2284 unsignedp
, methods
);
2288 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2289 unsignedp
, methods
);
2293 /* Generate code to perform an operation specified by UNOPPTAB
2294 on operand OP0, with two results to TARG0 and TARG1.
2295 We assume that the order of the operands for the instruction
2296 is TARG0, TARG1, OP0.
2298 Either TARG0 or TARG1 may be zero, but what that means is that
2299 the result is not actually wanted. We will generate it into
2300 a dummy pseudo-reg and discard it. They may not both be zero.
2302 Returns 1 if this operation can be performed; 0 if not. */
2305 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2308 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2309 enum mode_class mclass
;
2310 enum machine_mode wider_mode
;
2311 rtx entry_last
= get_last_insn ();
2314 mclass
= GET_MODE_CLASS (mode
);
2317 targ0
= gen_reg_rtx (mode
);
2319 targ1
= gen_reg_rtx (mode
);
2321 /* Record where to go back to if we fail. */
2322 last
= get_last_insn ();
2324 if (optab_handler (unoptab
, mode
)->insn_code
!= CODE_FOR_nothing
)
2326 int icode
= (int) optab_handler (unoptab
, mode
)->insn_code
;
2327 enum machine_mode mode0
= insn_data
[icode
].operand
[2].mode
;
2331 if (GET_MODE (xop0
) != VOIDmode
2332 && GET_MODE (xop0
) != mode0
)
2333 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2335 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2336 if (!insn_data
[icode
].operand
[2].predicate (xop0
, mode0
))
2337 xop0
= copy_to_mode_reg (mode0
, xop0
);
2339 /* We could handle this, but we should always be called with a pseudo
2340 for our targets and all insns should take them as outputs. */
2341 gcc_assert (insn_data
[icode
].operand
[0].predicate (targ0
, mode
));
2342 gcc_assert (insn_data
[icode
].operand
[1].predicate (targ1
, mode
));
2344 pat
= GEN_FCN (icode
) (targ0
, targ1
, xop0
);
2351 delete_insns_since (last
);
2354 /* It can't be done in this mode. Can we do it in a wider mode? */
2356 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2358 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2359 wider_mode
!= VOIDmode
;
2360 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2362 if (optab_handler (unoptab
, wider_mode
)->insn_code
2363 != CODE_FOR_nothing
)
2365 rtx t0
= gen_reg_rtx (wider_mode
);
2366 rtx t1
= gen_reg_rtx (wider_mode
);
2367 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2369 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2371 convert_move (targ0
, t0
, unsignedp
);
2372 convert_move (targ1
, t1
, unsignedp
);
2376 delete_insns_since (last
);
2381 delete_insns_since (entry_last
);
2385 /* Generate code to perform an operation specified by BINOPTAB
2386 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2387 We assume that the order of the operands for the instruction
2388 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2389 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2391 Either TARG0 or TARG1 may be zero, but what that means is that
2392 the result is not actually wanted. We will generate it into
2393 a dummy pseudo-reg and discard it. They may not both be zero.
2395 Returns 1 if this operation can be performed; 0 if not. */
2398 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2401 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2402 enum mode_class mclass
;
2403 enum machine_mode wider_mode
;
2404 rtx entry_last
= get_last_insn ();
2407 mclass
= GET_MODE_CLASS (mode
);
2410 targ0
= gen_reg_rtx (mode
);
2412 targ1
= gen_reg_rtx (mode
);
2414 /* Record where to go back to if we fail. */
2415 last
= get_last_insn ();
2417 if (optab_handler (binoptab
, mode
)->insn_code
!= CODE_FOR_nothing
)
2419 int icode
= (int) optab_handler (binoptab
, mode
)->insn_code
;
2420 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2421 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2423 rtx xop0
= op0
, xop1
= op1
;
2425 /* If we are optimizing, force expensive constants into a register. */
2426 xop0
= avoid_expensive_constant (mode0
, binoptab
, xop0
, unsignedp
);
2427 xop1
= avoid_expensive_constant (mode1
, binoptab
, xop1
, unsignedp
);
2429 /* In case the insn wants input operands in modes different from
2430 those of the actual operands, convert the operands. It would
2431 seem that we don't need to convert CONST_INTs, but we do, so
2432 that they're properly zero-extended, sign-extended or truncated
2435 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2436 xop0
= convert_modes (mode0
,
2437 GET_MODE (op0
) != VOIDmode
2442 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2443 xop1
= convert_modes (mode1
,
2444 GET_MODE (op1
) != VOIDmode
2449 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2450 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
))
2451 xop0
= copy_to_mode_reg (mode0
, xop0
);
2453 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
))
2454 xop1
= copy_to_mode_reg (mode1
, xop1
);
2456 /* We could handle this, but we should always be called with a pseudo
2457 for our targets and all insns should take them as outputs. */
2458 gcc_assert (insn_data
[icode
].operand
[0].predicate (targ0
, mode
));
2459 gcc_assert (insn_data
[icode
].operand
[3].predicate (targ1
, mode
));
2461 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2468 delete_insns_since (last
);
2471 /* It can't be done in this mode. Can we do it in a wider mode? */
2473 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2475 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2476 wider_mode
!= VOIDmode
;
2477 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2479 if (optab_handler (binoptab
, wider_mode
)->insn_code
2480 != CODE_FOR_nothing
)
2482 rtx t0
= gen_reg_rtx (wider_mode
);
2483 rtx t1
= gen_reg_rtx (wider_mode
);
2484 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2485 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2487 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2490 convert_move (targ0
, t0
, unsignedp
);
2491 convert_move (targ1
, t1
, unsignedp
);
2495 delete_insns_since (last
);
2500 delete_insns_since (entry_last
);
2504 /* Expand the two-valued library call indicated by BINOPTAB, but
2505 preserve only one of the values. If TARG0 is non-NULL, the first
2506 value is placed into TARG0; otherwise the second value is placed
2507 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2508 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2509 This routine assumes that the value returned by the library call is
2510 as if the return value was of an integral mode twice as wide as the
2511 mode of OP0. Returns 1 if the call was successful. */
2514 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2515 rtx targ0
, rtx targ1
, enum rtx_code code
)
2517 enum machine_mode mode
;
2518 enum machine_mode libval_mode
;
2523 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2524 gcc_assert (!targ0
!= !targ1
);
2526 mode
= GET_MODE (op0
);
2527 libfunc
= optab_libfunc (binoptab
, mode
);
2531 /* The value returned by the library function will have twice as
2532 many bits as the nominal MODE. */
2533 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2536 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2540 /* Get the part of VAL containing the value that we want. */
2541 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2542 targ0
? 0 : GET_MODE_SIZE (mode
));
2543 insns
= get_insns ();
2545 /* Move the into the desired location. */
2546 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2547 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2553 /* Wrapper around expand_unop which takes an rtx code to specify
2554 the operation to perform, not an optab pointer. All other
2555 arguments are the same. */
2557 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2558 rtx target
, int unsignedp
)
2560 optab unop
= code_to_optab
[(int) code
];
2563 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2569 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2571 widen_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2573 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2574 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2576 enum machine_mode wider_mode
;
2577 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2578 wider_mode
!= VOIDmode
;
2579 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2581 if (optab_handler (clz_optab
, wider_mode
)->insn_code
2582 != CODE_FOR_nothing
)
2584 rtx xop0
, temp
, last
;
2586 last
= get_last_insn ();
2589 target
= gen_reg_rtx (mode
);
2590 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2591 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
2593 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2594 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2595 - GET_MODE_BITSIZE (mode
)),
2596 target
, true, OPTAB_DIRECT
);
2598 delete_insns_since (last
);
2607 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2608 quantities, choosing which based on whether the high word is nonzero. */
2610 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2612 rtx xop0
= force_reg (mode
, op0
);
2613 rtx subhi
= gen_highpart (word_mode
, xop0
);
2614 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2615 rtx hi0_label
= gen_label_rtx ();
2616 rtx after_label
= gen_label_rtx ();
2617 rtx seq
, temp
, result
;
2619 /* If we were not given a target, use a word_mode register, not a
2620 'mode' register. The result will fit, and nobody is expecting
2621 anything bigger (the return type of __builtin_clz* is int). */
2623 target
= gen_reg_rtx (word_mode
);
2625 /* In any case, write to a word_mode scratch in both branches of the
2626 conditional, so we can ensure there is a single move insn setting
2627 'target' to tag a REG_EQUAL note on. */
2628 result
= gen_reg_rtx (word_mode
);
2632 /* If the high word is not equal to zero,
2633 then clz of the full value is clz of the high word. */
2634 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2635 word_mode
, true, hi0_label
);
2637 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2642 convert_move (result
, temp
, true);
2644 emit_jump_insn (gen_jump (after_label
));
2647 /* Else clz of the full value is clz of the low word plus the number
2648 of bits in the high word. */
2649 emit_label (hi0_label
);
2651 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2654 temp
= expand_binop (word_mode
, add_optab
, temp
,
2655 GEN_INT (GET_MODE_BITSIZE (word_mode
)),
2656 result
, true, OPTAB_DIRECT
);
2660 convert_move (result
, temp
, true);
2662 emit_label (after_label
);
2663 convert_move (target
, result
, true);
2668 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2680 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2682 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2684 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2685 enum machine_mode wider_mode
;
2688 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2691 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2692 wider_mode
!= VOIDmode
;
2693 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2694 if (optab_handler (bswap_optab
, wider_mode
)->insn_code
!= CODE_FOR_nothing
)
2699 last
= get_last_insn ();
2701 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2702 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2705 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2706 size_int (GET_MODE_BITSIZE (wider_mode
)
2707 - GET_MODE_BITSIZE (mode
)),
2713 target
= gen_reg_rtx (mode
);
2714 emit_move_insn (target
, gen_lowpart (mode
, x
));
2717 delete_insns_since (last
);
2722 /* Try calculating bswap as two bswaps of two word-sized operands. */
2725 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2729 t1
= expand_unop (word_mode
, bswap_optab
,
2730 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2731 t0
= expand_unop (word_mode
, bswap_optab
,
2732 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2735 target
= gen_reg_rtx (mode
);
2737 emit_clobber (target
);
2738 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2739 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2744 /* Try calculating (parity x) as (and (popcount x) 1), where
2745 popcount can also be done in a wider mode. */
2747 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2749 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2750 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2752 enum machine_mode wider_mode
;
2753 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2754 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2756 if (optab_handler (popcount_optab
, wider_mode
)->insn_code
2757 != CODE_FOR_nothing
)
2759 rtx xop0
, temp
, last
;
2761 last
= get_last_insn ();
2764 target
= gen_reg_rtx (mode
);
2765 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2766 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2769 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2770 target
, true, OPTAB_DIRECT
);
2772 delete_insns_since (last
);
2781 /* Try calculating ctz(x) as K - clz(x & -x) ,
2782 where K is GET_MODE_BITSIZE(mode) - 1.
2784 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2785 don't have to worry about what the hardware does in that case. (If
2786 the clz instruction produces the usual value at 0, which is K, the
2787 result of this code sequence will be -1; expand_ffs, below, relies
2788 on this. It might be nice to have it be K instead, for consistency
2789 with the (very few) processors that provide a ctz with a defined
2790 value, but that would take one more instruction, and it would be
2791 less convenient for expand_ffs anyway. */
2794 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2798 if (optab_handler (clz_optab
, mode
)->insn_code
== CODE_FOR_nothing
)
2803 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2805 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2806 true, OPTAB_DIRECT
);
2808 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2810 temp
= expand_binop (mode
, sub_optab
, GEN_INT (GET_MODE_BITSIZE (mode
) - 1),
2812 true, OPTAB_DIRECT
);
2822 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2828 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2829 else with the sequence used by expand_clz.
2831 The ffs builtin promises to return zero for a zero value and ctz/clz
2832 may have an undefined value in that case. If they do not give us a
2833 convenient value, we have to generate a test and branch. */
2835 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2837 HOST_WIDE_INT val
= 0;
2838 bool defined_at_zero
= false;
2841 if (optab_handler (ctz_optab
, mode
)->insn_code
!= CODE_FOR_nothing
)
2845 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2849 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2851 else if (optab_handler (clz_optab
, mode
)->insn_code
!= CODE_FOR_nothing
)
2854 temp
= expand_ctz (mode
, op0
, 0);
2858 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2860 defined_at_zero
= true;
2861 val
= (GET_MODE_BITSIZE (mode
) - 1) - val
;
2867 if (defined_at_zero
&& val
== -1)
2868 /* No correction needed at zero. */;
2871 /* We don't try to do anything clever with the situation found
2872 on some processors (eg Alpha) where ctz(0:mode) ==
2873 bitsize(mode). If someone can think of a way to send N to -1
2874 and leave alone all values in the range 0..N-1 (where N is a
2875 power of two), cheaper than this test-and-branch, please add it.
2877 The test-and-branch is done after the operation itself, in case
2878 the operation sets condition codes that can be recycled for this.
2879 (This is true on i386, for instance.) */
2881 rtx nonzero_label
= gen_label_rtx ();
2882 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2883 mode
, true, nonzero_label
);
2885 convert_move (temp
, GEN_INT (-1), false);
2886 emit_label (nonzero_label
);
2889 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2890 to produce a value in the range 0..bitsize. */
2891 temp
= expand_binop (mode
, add_optab
, temp
, GEN_INT (1),
2892 target
, false, OPTAB_DIRECT
);
2899 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2908 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2909 conditions, VAL may already be a SUBREG against which we cannot generate
2910 a further SUBREG. In this case, we expect forcing the value into a
2911 register will work around the situation. */
2914 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2915 enum machine_mode imode
)
2918 ret
= lowpart_subreg (omode
, val
, imode
);
2921 val
= force_reg (imode
, val
);
2922 ret
= lowpart_subreg (omode
, val
, imode
);
2923 gcc_assert (ret
!= NULL
);
2928 /* Expand a floating point absolute value or negation operation via a
2929 logical operation on the sign bit. */
2932 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2933 rtx op0
, rtx target
)
2935 const struct real_format
*fmt
;
2936 int bitpos
, word
, nwords
, i
;
2937 enum machine_mode imode
;
2938 HOST_WIDE_INT hi
, lo
;
2941 /* The format has to have a simple sign bit. */
2942 fmt
= REAL_MODE_FORMAT (mode
);
2946 bitpos
= fmt
->signbit_rw
;
2950 /* Don't create negative zeros if the format doesn't support them. */
2951 if (code
== NEG
&& !fmt
->has_signed_zero
)
2954 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2956 imode
= int_mode_for_mode (mode
);
2957 if (imode
== BLKmode
)
2966 if (FLOAT_WORDS_BIG_ENDIAN
)
2967 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2969 word
= bitpos
/ BITS_PER_WORD
;
2970 bitpos
= bitpos
% BITS_PER_WORD
;
2971 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2974 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2977 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2981 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2987 if (target
== 0 || target
== op0
)
2988 target
= gen_reg_rtx (mode
);
2994 for (i
= 0; i
< nwords
; ++i
)
2996 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2997 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3001 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
3003 immed_double_const (lo
, hi
, imode
),
3004 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3005 if (temp
!= targ_piece
)
3006 emit_move_insn (targ_piece
, temp
);
3009 emit_move_insn (targ_piece
, op0_piece
);
3012 insns
= get_insns ();
3019 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
3020 gen_lowpart (imode
, op0
),
3021 immed_double_const (lo
, hi
, imode
),
3022 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3023 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3025 set_unique_reg_note (get_last_insn (), REG_EQUAL
,
3026 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)));
3032 /* As expand_unop, but will fail rather than attempt the operation in a
3033 different mode or with a libcall. */
3035 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3038 if (optab_handler (unoptab
, mode
)->insn_code
!= CODE_FOR_nothing
)
3040 int icode
= (int) optab_handler (unoptab
, mode
)->insn_code
;
3041 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3043 rtx last
= get_last_insn ();
3049 temp
= gen_reg_rtx (mode
);
3051 if (GET_MODE (xop0
) != VOIDmode
3052 && GET_MODE (xop0
) != mode0
)
3053 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
3055 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3057 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
))
3058 xop0
= copy_to_mode_reg (mode0
, xop0
);
3060 if (!insn_data
[icode
].operand
[0].predicate (temp
, mode
))
3061 temp
= gen_reg_rtx (mode
);
3063 pat
= GEN_FCN (icode
) (temp
, xop0
);
3066 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3067 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
3069 delete_insns_since (last
);
3070 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
3078 delete_insns_since (last
);
3083 /* Generate code to perform an operation specified by UNOPTAB
3084 on operand OP0, with result having machine-mode MODE.
3086 UNSIGNEDP is for the case where we have to widen the operands
3087 to perform the operation. It says to use zero-extension.
3089 If TARGET is nonzero, the value
3090 is generated there, if it is convenient to do so.
3091 In all cases an rtx is returned for the locus of the value;
3092 this may or may not be TARGET. */
3095 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3098 enum mode_class mclass
= GET_MODE_CLASS (mode
);
3099 enum machine_mode wider_mode
;
3103 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3107 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3109 /* Widening (or narrowing) clz needs special treatment. */
3110 if (unoptab
== clz_optab
)
3112 temp
= widen_clz (mode
, op0
, target
);
3116 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3117 && optab_handler (unoptab
, word_mode
)->insn_code
!= CODE_FOR_nothing
)
3119 temp
= expand_doubleword_clz (mode
, op0
, target
);
3127 /* Widening (or narrowing) bswap needs special treatment. */
3128 if (unoptab
== bswap_optab
)
3130 temp
= widen_bswap (mode
, op0
, target
);
3134 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3135 && optab_handler (unoptab
, word_mode
)->insn_code
!= CODE_FOR_nothing
)
3137 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3145 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3146 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3147 wider_mode
!= VOIDmode
;
3148 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3150 if (optab_handler (unoptab
, wider_mode
)->insn_code
!= CODE_FOR_nothing
)
3153 rtx last
= get_last_insn ();
3155 /* For certain operations, we need not actually extend
3156 the narrow operand, as long as we will truncate the
3157 results to the same narrowness. */
3159 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3160 (unoptab
== neg_optab
3161 || unoptab
== one_cmpl_optab
)
3162 && mclass
== MODE_INT
);
3164 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3169 if (mclass
!= MODE_INT
3170 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
3171 GET_MODE_BITSIZE (wider_mode
)))
3174 target
= gen_reg_rtx (mode
);
3175 convert_move (target
, temp
, 0);
3179 return gen_lowpart (mode
, temp
);
3182 delete_insns_since (last
);
3186 /* These can be done a word at a time. */
3187 if (unoptab
== one_cmpl_optab
3188 && mclass
== MODE_INT
3189 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3190 && optab_handler (unoptab
, word_mode
)->insn_code
!= CODE_FOR_nothing
)
3195 if (target
== 0 || target
== op0
)
3196 target
= gen_reg_rtx (mode
);
3200 /* Do the actual arithmetic. */
3201 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3203 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3204 rtx x
= expand_unop (word_mode
, unoptab
,
3205 operand_subword_force (op0
, i
, mode
),
3206 target_piece
, unsignedp
);
3208 if (target_piece
!= x
)
3209 emit_move_insn (target_piece
, x
);
3212 insns
= get_insns ();
3219 if (unoptab
->code
== NEG
)
3221 /* Try negating floating point values by flipping the sign bit. */
3222 if (SCALAR_FLOAT_MODE_P (mode
))
3224 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3229 /* If there is no negation pattern, and we have no negative zero,
3230 try subtracting from zero. */
3231 if (!HONOR_SIGNED_ZEROS (mode
))
3233 temp
= expand_binop (mode
, (unoptab
== negv_optab
3234 ? subv_optab
: sub_optab
),
3235 CONST0_RTX (mode
), op0
, target
,
3236 unsignedp
, OPTAB_DIRECT
);
3242 /* Try calculating parity (x) as popcount (x) % 2. */
3243 if (unoptab
== parity_optab
)
3245 temp
= expand_parity (mode
, op0
, target
);
3250 /* Try implementing ffs (x) in terms of clz (x). */
3251 if (unoptab
== ffs_optab
)
3253 temp
= expand_ffs (mode
, op0
, target
);
3258 /* Try implementing ctz (x) in terms of clz (x). */
3259 if (unoptab
== ctz_optab
)
3261 temp
= expand_ctz (mode
, op0
, target
);
3267 /* Now try a library call in this mode. */
3268 libfunc
= optab_libfunc (unoptab
, mode
);
3274 enum machine_mode outmode
= mode
;
3276 /* All of these functions return small values. Thus we choose to
3277 have them return something that isn't a double-word. */
3278 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3279 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
3281 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
)));
3285 /* Pass 1 for NO_QUEUE so we don't lose any increments
3286 if the libcall is cse'd or moved. */
3287 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3289 insns
= get_insns ();
3292 target
= gen_reg_rtx (outmode
);
3293 eq_value
= gen_rtx_fmt_e (unoptab
->code
, mode
, op0
);
3294 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3295 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3296 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3297 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3298 emit_libcall_block (insns
, target
, value
, eq_value
);
3303 /* It can't be done in this mode. Can we do it in a wider mode? */
3305 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3307 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3308 wider_mode
!= VOIDmode
;
3309 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3311 if ((optab_handler (unoptab
, wider_mode
)->insn_code
3312 != CODE_FOR_nothing
)
3313 || optab_libfunc (unoptab
, wider_mode
))
3316 rtx last
= get_last_insn ();
3318 /* For certain operations, we need not actually extend
3319 the narrow operand, as long as we will truncate the
3320 results to the same narrowness. */
3322 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3323 (unoptab
== neg_optab
3324 || unoptab
== one_cmpl_optab
)
3325 && mclass
== MODE_INT
);
3327 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3330 /* If we are generating clz using wider mode, adjust the
3332 if (unoptab
== clz_optab
&& temp
!= 0)
3333 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
3334 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
3335 - GET_MODE_BITSIZE (mode
)),
3336 target
, true, OPTAB_DIRECT
);
3340 if (mclass
!= MODE_INT
)
3343 target
= gen_reg_rtx (mode
);
3344 convert_move (target
, temp
, 0);
3348 return gen_lowpart (mode
, temp
);
3351 delete_insns_since (last
);
3356 /* One final attempt at implementing negation via subtraction,
3357 this time allowing widening of the operand. */
3358 if (unoptab
->code
== NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3361 temp
= expand_binop (mode
,
3362 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3363 CONST0_RTX (mode
), op0
,
3364 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3372 /* Emit code to compute the absolute value of OP0, with result to
3373 TARGET if convenient. (TARGET may be 0.) The return value says
3374 where the result actually is to be found.
3376 MODE is the mode of the operand; the mode of the result is
3377 different but can be deduced from MODE.
3382 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3383 int result_unsignedp
)
3388 result_unsignedp
= 1;
3390 /* First try to do it with a special abs instruction. */
3391 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3396 /* For floating point modes, try clearing the sign bit. */
3397 if (SCALAR_FLOAT_MODE_P (mode
))
3399 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3404 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3405 if (optab_handler (smax_optab
, mode
)->insn_code
!= CODE_FOR_nothing
3406 && !HONOR_SIGNED_ZEROS (mode
))
3408 rtx last
= get_last_insn ();
3410 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
3412 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3418 delete_insns_since (last
);
3421 /* If this machine has expensive jumps, we can do integer absolute
3422 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3423 where W is the width of MODE. */
3425 if (GET_MODE_CLASS (mode
) == MODE_INT
3426 && BRANCH_COST (optimize_insn_for_speed_p (),
3429 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3430 size_int (GET_MODE_BITSIZE (mode
) - 1),
3433 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3436 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3437 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3447 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3448 int result_unsignedp
, int safe
)
3453 result_unsignedp
= 1;
3455 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3459 /* If that does not win, use conditional jump and negate. */
3461 /* It is safe to use the target if it is the same
3462 as the source if this is also a pseudo register */
3463 if (op0
== target
&& REG_P (op0
)
3464 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3467 op1
= gen_label_rtx ();
3468 if (target
== 0 || ! safe
3469 || GET_MODE (target
) != mode
3470 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3472 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3473 target
= gen_reg_rtx (mode
);
3475 emit_move_insn (target
, op0
);
3478 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3479 NULL_RTX
, NULL_RTX
, op1
);
3481 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3484 emit_move_insn (target
, op0
);
3490 /* A subroutine of expand_copysign, perform the copysign operation using the
3491 abs and neg primitives advertised to exist on the target. The assumption
3492 is that we have a split register file, and leaving op0 in fp registers,
3493 and not playing with subregs so much, will help the register allocator. */
3496 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3497 int bitpos
, bool op0_is_abs
)
3499 enum machine_mode imode
;
3506 /* Check if the back end provides an insn that handles signbit for the
3508 icode
= (int) signbit_optab
->handlers
[(int) mode
].insn_code
;
3509 if (icode
!= CODE_FOR_nothing
)
3511 imode
= insn_data
[icode
].operand
[0].mode
;
3512 sign
= gen_reg_rtx (imode
);
3513 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3517 HOST_WIDE_INT hi
, lo
;
3519 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3521 imode
= int_mode_for_mode (mode
);
3522 if (imode
== BLKmode
)
3524 op1
= gen_lowpart (imode
, op1
);
3531 if (FLOAT_WORDS_BIG_ENDIAN
)
3532 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3534 word
= bitpos
/ BITS_PER_WORD
;
3535 bitpos
= bitpos
% BITS_PER_WORD
;
3536 op1
= operand_subword_force (op1
, word
, mode
);
3539 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
3542 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
3546 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
3550 sign
= gen_reg_rtx (imode
);
3551 sign
= expand_binop (imode
, and_optab
, op1
,
3552 immed_double_const (lo
, hi
, imode
),
3553 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3558 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3565 if (target
== NULL_RTX
)
3566 target
= copy_to_reg (op0
);
3568 emit_move_insn (target
, op0
);
3571 label
= gen_label_rtx ();
3572 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3574 if (GET_CODE (op0
) == CONST_DOUBLE
)
3575 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3577 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3579 emit_move_insn (target
, op0
);
3587 /* A subroutine of expand_copysign, perform the entire copysign operation
3588 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3589 is true if op0 is known to have its sign bit clear. */
3592 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3593 int bitpos
, bool op0_is_abs
)
3595 enum machine_mode imode
;
3596 HOST_WIDE_INT hi
, lo
;
3597 int word
, nwords
, i
;
3600 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3602 imode
= int_mode_for_mode (mode
);
3603 if (imode
== BLKmode
)
3612 if (FLOAT_WORDS_BIG_ENDIAN
)
3613 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3615 word
= bitpos
/ BITS_PER_WORD
;
3616 bitpos
= bitpos
% BITS_PER_WORD
;
3617 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3620 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
3623 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
3627 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
3631 if (target
== 0 || target
== op0
|| target
== op1
)
3632 target
= gen_reg_rtx (mode
);
3638 for (i
= 0; i
< nwords
; ++i
)
3640 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3641 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3646 op0_piece
= expand_binop (imode
, and_optab
, op0_piece
,
3647 immed_double_const (~lo
, ~hi
, imode
),
3648 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3650 op1
= expand_binop (imode
, and_optab
,
3651 operand_subword_force (op1
, i
, mode
),
3652 immed_double_const (lo
, hi
, imode
),
3653 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3655 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3656 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3657 if (temp
!= targ_piece
)
3658 emit_move_insn (targ_piece
, temp
);
3661 emit_move_insn (targ_piece
, op0_piece
);
3664 insns
= get_insns ();
3671 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3672 immed_double_const (lo
, hi
, imode
),
3673 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3675 op0
= gen_lowpart (imode
, op0
);
3677 op0
= expand_binop (imode
, and_optab
, op0
,
3678 immed_double_const (~lo
, ~hi
, imode
),
3679 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3681 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3682 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3683 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3689 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3690 scalar floating point mode. Return NULL if we do not know how to
3691 expand the operation inline. */
3694 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3696 enum machine_mode mode
= GET_MODE (op0
);
3697 const struct real_format
*fmt
;
3701 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3702 gcc_assert (GET_MODE (op1
) == mode
);
3704 /* First try to do it with a special instruction. */
3705 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3706 target
, 0, OPTAB_DIRECT
);
3710 fmt
= REAL_MODE_FORMAT (mode
);
3711 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3715 if (GET_CODE (op0
) == CONST_DOUBLE
)
3717 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3718 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3722 if (fmt
->signbit_ro
>= 0
3723 && (GET_CODE (op0
) == CONST_DOUBLE
3724 || (optab_handler (neg_optab
, mode
)->insn_code
!= CODE_FOR_nothing
3725 && optab_handler (abs_optab
, mode
)->insn_code
!= CODE_FOR_nothing
)))
3727 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3728 fmt
->signbit_ro
, op0_is_abs
);
3733 if (fmt
->signbit_rw
< 0)
3735 return expand_copysign_bit (mode
, op0
, op1
, target
,
3736 fmt
->signbit_rw
, op0_is_abs
);
3739 /* Generate an instruction whose insn-code is INSN_CODE,
3740 with two operands: an output TARGET and an input OP0.
3741 TARGET *must* be nonzero, and the output is always stored there.
3742 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3743 the value that is stored into TARGET.
3745 Return false if expansion failed. */
3748 maybe_emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3751 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3753 rtx last
= get_last_insn ();
3757 /* Now, if insn does not accept our operands, put them into pseudos. */
3759 if (!insn_data
[icode
].operand
[1].predicate (op0
, mode0
))
3760 op0
= copy_to_mode_reg (mode0
, op0
);
3762 if (!insn_data
[icode
].operand
[0].predicate (temp
, GET_MODE (temp
)))
3763 temp
= gen_reg_rtx (GET_MODE (temp
));
3765 pat
= GEN_FCN (icode
) (temp
, op0
);
3768 delete_insns_since (last
);
3772 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3773 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3778 emit_move_insn (target
, temp
);
3781 /* Generate an instruction whose insn-code is INSN_CODE,
3782 with two operands: an output TARGET and an input OP0.
3783 TARGET *must* be nonzero, and the output is always stored there.
3784 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3785 the value that is stored into TARGET. */
3788 emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3790 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3794 struct no_conflict_data
3796 rtx target
, first
, insn
;
3800 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3801 the currently examined clobber / store has to stay in the list of
3802 insns that constitute the actual libcall block. */
3804 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3806 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3808 /* If this inns directly contributes to setting the target, it must stay. */
3809 if (reg_overlap_mentioned_p (p
->target
, dest
))
3810 p
->must_stay
= true;
3811 /* If we haven't committed to keeping any other insns in the list yet,
3812 there is nothing more to check. */
3813 else if (p
->insn
== p
->first
)
3815 /* If this insn sets / clobbers a register that feeds one of the insns
3816 already in the list, this insn has to stay too. */
3817 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3818 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3819 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3820 /* Likewise if this insn depends on a register set by a previous
3821 insn in the list, or if it sets a result (presumably a hard
3822 register) that is set or clobbered by a previous insn.
3823 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3824 SET_DEST perform the former check on the address, and the latter
3825 check on the MEM. */
3826 || (GET_CODE (set
) == SET
3827 && (modified_in_p (SET_SRC (set
), p
->first
)
3828 || modified_in_p (SET_DEST (set
), p
->first
)
3829 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3830 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3831 p
->must_stay
= true;
3835 /* Emit code to make a call to a constant function or a library call.
3837 INSNS is a list containing all insns emitted in the call.
3838 These insns leave the result in RESULT. Our block is to copy RESULT
3839 to TARGET, which is logically equivalent to EQUIV.
3841 We first emit any insns that set a pseudo on the assumption that these are
3842 loading constants into registers; doing so allows them to be safely cse'ed
3843 between blocks. Then we emit all the other insns in the block, followed by
3844 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3845 note with an operand of EQUIV. */
3848 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3850 rtx final_dest
= target
;
3851 rtx prev
, next
, last
, insn
;
3853 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3854 into a MEM later. Protect the libcall block from this change. */
3855 if (! REG_P (target
) || REG_USERVAR_P (target
))
3856 target
= gen_reg_rtx (GET_MODE (target
));
3858 /* If we're using non-call exceptions, a libcall corresponding to an
3859 operation that may trap may also trap. */
3860 if (flag_non_call_exceptions
&& may_trap_p (equiv
))
3862 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3865 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3867 if (note
!= 0 && INTVAL (XEXP (note
, 0)) <= 0)
3868 remove_note (insn
, note
);
3872 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3873 reg note to indicate that this call cannot throw or execute a nonlocal
3874 goto (unless there is already a REG_EH_REGION note, in which case
3876 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3879 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3882 XEXP (note
, 0) = constm1_rtx
;
3884 add_reg_note (insn
, REG_EH_REGION
, constm1_rtx
);
3887 /* First emit all insns that set pseudos. Remove them from the list as
3888 we go. Avoid insns that set pseudos which were referenced in previous
3889 insns. These can be generated by move_by_pieces, for example,
3890 to update an address. Similarly, avoid insns that reference things
3891 set in previous insns. */
3893 for (insn
= insns
; insn
; insn
= next
)
3895 rtx set
= single_set (insn
);
3897 next
= NEXT_INSN (insn
);
3899 if (set
!= 0 && REG_P (SET_DEST (set
))
3900 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3902 struct no_conflict_data data
;
3904 data
.target
= const0_rtx
;
3908 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3909 if (! data
.must_stay
)
3911 if (PREV_INSN (insn
))
3912 NEXT_INSN (PREV_INSN (insn
)) = next
;
3917 PREV_INSN (next
) = PREV_INSN (insn
);
3923 /* Some ports use a loop to copy large arguments onto the stack.
3924 Don't move anything outside such a loop. */
3929 prev
= get_last_insn ();
3931 /* Write the remaining insns followed by the final copy. */
3933 for (insn
= insns
; insn
; insn
= next
)
3935 next
= NEXT_INSN (insn
);
3940 last
= emit_move_insn (target
, result
);
3941 if (optab_handler (mov_optab
, GET_MODE (target
))->insn_code
3942 != CODE_FOR_nothing
)
3943 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3945 if (final_dest
!= target
)
3946 emit_move_insn (final_dest
, target
);
3949 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3950 PURPOSE describes how this comparison will be used. CODE is the rtx
3951 comparison code we will be using.
3953 ??? Actually, CODE is slightly weaker than that. A target is still
3954 required to implement all of the normal bcc operations, but not
3955 required to implement all (or any) of the unordered bcc operations. */
3958 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3959 enum can_compare_purpose purpose
)
3962 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
3967 if (purpose
== ccp_jump
3968 && (icode
= optab_handler (cbranch_optab
, mode
)->insn_code
) != CODE_FOR_nothing
3969 && insn_data
[icode
].operand
[0].predicate (test
, mode
))
3971 if (purpose
== ccp_store_flag
3972 && (icode
= optab_handler (cstore_optab
, mode
)->insn_code
) != CODE_FOR_nothing
3973 && insn_data
[icode
].operand
[1].predicate (test
, mode
))
3975 if (purpose
== ccp_cmov
3976 && optab_handler (cmov_optab
, mode
)->insn_code
!= CODE_FOR_nothing
)
3979 mode
= GET_MODE_WIDER_MODE (mode
);
3980 PUT_MODE (test
, mode
);
3982 while (mode
!= VOIDmode
);
3987 /* This function is called when we are going to emit a compare instruction that
3988 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3990 *PMODE is the mode of the inputs (in case they are const_int).
3991 *PUNSIGNEDP nonzero says that the operands are unsigned;
3992 this matters if they need to be widened (as given by METHODS).
3994 If they have mode BLKmode, then SIZE specifies the size of both operands.
3996 This function performs all the setup necessary so that the caller only has
3997 to emit a single comparison insn. This setup can involve doing a BLKmode
3998 comparison or emitting a library call to perform the comparison if no insn
3999 is available to handle it.
4000 The values which are passed in through pointers can be modified; the caller
4001 should perform the comparison on the modified values. Constant
4002 comparisons must have already been folded. */
4005 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4006 int unsignedp
, enum optab_methods methods
,
4007 rtx
*ptest
, enum machine_mode
*pmode
)
4009 enum machine_mode mode
= *pmode
;
4011 enum machine_mode cmp_mode
;
4012 enum mode_class mclass
;
4014 /* The other methods are not needed. */
4015 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
4016 || methods
== OPTAB_LIB_WIDEN
);
4018 /* If we are optimizing, force expensive constants into a register. */
4019 if (CONSTANT_P (x
) && optimize
4020 && (rtx_cost (x
, COMPARE
, optimize_insn_for_speed_p ())
4021 > COSTS_N_INSNS (1)))
4022 x
= force_reg (mode
, x
);
4024 if (CONSTANT_P (y
) && optimize
4025 && (rtx_cost (y
, COMPARE
, optimize_insn_for_speed_p ())
4026 > COSTS_N_INSNS (1)))
4027 y
= force_reg (mode
, y
);
4030 /* Make sure if we have a canonical comparison. The RTL
4031 documentation states that canonical comparisons are required only
4032 for targets which have cc0. */
4033 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4036 /* Don't let both operands fail to indicate the mode. */
4037 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4038 x
= force_reg (mode
, x
);
4039 if (mode
== VOIDmode
)
4040 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4042 /* Handle all BLKmode compares. */
4044 if (mode
== BLKmode
)
4046 enum machine_mode result_mode
;
4047 enum insn_code cmp_code
;
4052 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4056 /* Try to use a memory block compare insn - either cmpstr
4057 or cmpmem will do. */
4058 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4059 cmp_mode
!= VOIDmode
;
4060 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4062 cmp_code
= cmpmem_optab
[cmp_mode
];
4063 if (cmp_code
== CODE_FOR_nothing
)
4064 cmp_code
= cmpstr_optab
[cmp_mode
];
4065 if (cmp_code
== CODE_FOR_nothing
)
4066 cmp_code
= cmpstrn_optab
[cmp_mode
];
4067 if (cmp_code
== CODE_FOR_nothing
)
4070 /* Must make sure the size fits the insn's mode. */
4071 if ((CONST_INT_P (size
)
4072 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4073 || (GET_MODE_BITSIZE (GET_MODE (size
))
4074 > GET_MODE_BITSIZE (cmp_mode
)))
4077 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4078 result
= gen_reg_rtx (result_mode
);
4079 size
= convert_to_mode (cmp_mode
, size
, 1);
4080 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4082 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4083 *pmode
= result_mode
;
4087 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4090 /* Otherwise call a library function, memcmp. */
4091 libfunc
= memcmp_libfunc
;
4092 length_type
= sizetype
;
4093 result_mode
= TYPE_MODE (integer_type_node
);
4094 cmp_mode
= TYPE_MODE (length_type
);
4095 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4096 TYPE_UNSIGNED (length_type
));
4098 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4104 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4105 *pmode
= result_mode
;
4109 /* Don't allow operands to the compare to trap, as that can put the
4110 compare and branch in different basic blocks. */
4111 if (flag_non_call_exceptions
)
4114 x
= force_reg (mode
, x
);
4116 y
= force_reg (mode
, y
);
4119 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4121 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4122 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4126 mclass
= GET_MODE_CLASS (mode
);
4127 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4131 enum insn_code icode
;
4132 icode
= optab_handler (cbranch_optab
, cmp_mode
)->insn_code
;
4133 if (icode
!= CODE_FOR_nothing
4134 && insn_data
[icode
].operand
[0].predicate (test
, VOIDmode
))
4136 rtx last
= get_last_insn ();
4137 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4138 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4140 && insn_data
[icode
].operand
[1].predicate
4141 (op0
, insn_data
[icode
].operand
[1].mode
)
4142 && insn_data
[icode
].operand
[2].predicate
4143 (op1
, insn_data
[icode
].operand
[2].mode
))
4145 XEXP (test
, 0) = op0
;
4146 XEXP (test
, 1) = op1
;
4151 delete_insns_since (last
);
4154 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4156 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4158 while (cmp_mode
!= VOIDmode
);
4160 if (methods
!= OPTAB_LIB_WIDEN
)
4163 if (!SCALAR_FLOAT_MODE_P (mode
))
4167 /* Handle a libcall just for the mode we are using. */
4168 libfunc
= optab_libfunc (cmp_optab
, mode
);
4169 gcc_assert (libfunc
);
4171 /* If we want unsigned, and this mode has a distinct unsigned
4172 comparison routine, use that. */
4175 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4180 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4181 targetm
.libgcc_cmp_return_mode (),
4182 2, x
, mode
, y
, mode
);
4184 /* There are two kinds of comparison routines. Biased routines
4185 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4186 of gcc expect that the comparison operation is equivalent
4187 to the modified comparison. For signed comparisons compare the
4188 result against 1 in the biased case, and zero in the unbiased
4189 case. For unsigned comparisons always compare against 1 after
4190 biasing the unbiased result by adding 1. This gives us a way to
4195 if (!TARGET_LIB_INT_CMP_BIASED
)
4198 x
= plus_constant (result
, 1);
4204 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4208 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4216 /* Before emitting an insn with code ICODE, make sure that X, which is going
4217 to be used for operand OPNUM of the insn, is converted from mode MODE to
4218 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4219 that it is accepted by the operand predicate. Return the new value. */
4222 prepare_operand (int icode
, rtx x
, int opnum
, enum machine_mode mode
,
4223 enum machine_mode wider_mode
, int unsignedp
)
4225 if (mode
!= wider_mode
)
4226 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4228 if (!insn_data
[icode
].operand
[opnum
].predicate
4229 (x
, insn_data
[icode
].operand
[opnum
].mode
))
4231 if (reload_completed
)
4233 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
4239 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4240 we can do the branch. */
4243 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
)
4245 enum machine_mode optab_mode
;
4246 enum mode_class mclass
;
4247 enum insn_code icode
;
4249 mclass
= GET_MODE_CLASS (mode
);
4250 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4251 icode
= optab_handler (cbranch_optab
, optab_mode
)->insn_code
;
4253 gcc_assert (icode
!= CODE_FOR_nothing
);
4254 gcc_assert (insn_data
[icode
].operand
[0].predicate (test
, VOIDmode
));
4255 emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0), XEXP (test
, 1), label
));
4258 /* Generate code to compare X with Y so that the condition codes are
4259 set and to jump to LABEL if the condition is true. If X is a
4260 constant and Y is not a constant, then the comparison is swapped to
4261 ensure that the comparison RTL has the canonical form.
4263 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4264 need to be widened. UNSIGNEDP is also used to select the proper
4265 branch condition code.
4267 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4269 MODE is the mode of the inputs (in case they are const_int).
4271 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4272 It will be potentially converted into an unsigned variant based on
4273 UNSIGNEDP to select a proper jump instruction. */
4276 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4277 enum machine_mode mode
, int unsignedp
, rtx label
)
4279 rtx op0
= x
, op1
= y
;
4282 /* Swap operands and condition to ensure canonical RTL. */
4283 if (swap_commutative_operands_p (x
, y
)
4284 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4287 comparison
= swap_condition (comparison
);
4290 /* If OP0 is still a constant, then both X and Y must be constants
4291 or the opposite comparison is not supported. Force X into a register
4292 to create canonical RTL. */
4293 if (CONSTANT_P (op0
))
4294 op0
= force_reg (mode
, op0
);
4297 comparison
= unsigned_condition (comparison
);
4299 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4301 emit_cmp_and_jump_insn_1 (test
, mode
, label
);
4305 /* Emit a library call comparison between floating point X and Y.
4306 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4309 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4310 rtx
*ptest
, enum machine_mode
*pmode
)
4312 enum rtx_code swapped
= swap_condition (comparison
);
4313 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4314 enum machine_mode orig_mode
= GET_MODE (x
);
4315 enum machine_mode mode
, cmp_mode
;
4316 rtx value
, target
, insns
, equiv
;
4318 bool reversed_p
= false;
4319 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4321 for (mode
= orig_mode
;
4323 mode
= GET_MODE_WIDER_MODE (mode
))
4325 if (code_to_optab
[comparison
]
4326 && (libfunc
= optab_libfunc (code_to_optab
[comparison
], mode
)))
4329 if (code_to_optab
[swapped
]
4330 && (libfunc
= optab_libfunc (code_to_optab
[swapped
], mode
)))
4333 tmp
= x
; x
= y
; y
= tmp
;
4334 comparison
= swapped
;
4338 if (code_to_optab
[reversed
]
4339 && (libfunc
= optab_libfunc (code_to_optab
[reversed
], mode
))
4340 && FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, reversed
))
4342 comparison
= reversed
;
4348 gcc_assert (mode
!= VOIDmode
);
4350 if (mode
!= orig_mode
)
4352 x
= convert_to_mode (mode
, x
, 0);
4353 y
= convert_to_mode (mode
, y
, 0);
4356 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4357 the RTL. The allows the RTL optimizers to delete the libcall if the
4358 condition can be determined at compile-time. */
4359 if (comparison
== UNORDERED
)
4361 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4362 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4363 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4364 temp
, const_true_rtx
, equiv
);
4368 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4369 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4371 rtx true_rtx
, false_rtx
;
4376 true_rtx
= const0_rtx
;
4377 false_rtx
= const_true_rtx
;
4381 true_rtx
= const_true_rtx
;
4382 false_rtx
= const0_rtx
;
4386 true_rtx
= const1_rtx
;
4387 false_rtx
= const0_rtx
;
4391 true_rtx
= const0_rtx
;
4392 false_rtx
= constm1_rtx
;
4396 true_rtx
= constm1_rtx
;
4397 false_rtx
= const0_rtx
;
4401 true_rtx
= const0_rtx
;
4402 false_rtx
= const1_rtx
;
4408 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4409 equiv
, true_rtx
, false_rtx
);
4414 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4415 cmp_mode
, 2, x
, mode
, y
, mode
);
4416 insns
= get_insns ();
4419 target
= gen_reg_rtx (cmp_mode
);
4420 emit_libcall_block (insns
, target
, value
, equiv
);
4422 if (comparison
== UNORDERED
4423 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4424 comparison
= reversed_p
? EQ
: NE
;
4426 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4430 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4433 emit_indirect_jump (rtx loc
)
4435 if (!insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
4437 loc
= copy_to_mode_reg (Pmode
, loc
);
4439 emit_jump_insn (gen_indirect_jump (loc
));
4443 #ifdef HAVE_conditional_move
4445 /* Emit a conditional move instruction if the machine supports one for that
4446 condition and machine mode.
4448 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4449 the mode to use should they be constants. If it is VOIDmode, they cannot
4452 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4453 should be stored there. MODE is the mode to use should they be constants.
4454 If it is VOIDmode, they cannot both be constants.
4456 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4457 is not supported. */
4460 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4461 enum machine_mode cmode
, rtx op2
, rtx op3
,
4462 enum machine_mode mode
, int unsignedp
)
4464 rtx tem
, subtarget
, comparison
, insn
;
4465 enum insn_code icode
;
4466 enum rtx_code reversed
;
4468 /* If one operand is constant, make it the second one. Only do this
4469 if the other operand is not constant as well. */
4471 if (swap_commutative_operands_p (op0
, op1
))
4476 code
= swap_condition (code
);
4479 /* get_condition will prefer to generate LT and GT even if the old
4480 comparison was against zero, so undo that canonicalization here since
4481 comparisons against zero are cheaper. */
4482 if (code
== LT
&& op1
== const1_rtx
)
4483 code
= LE
, op1
= const0_rtx
;
4484 else if (code
== GT
&& op1
== constm1_rtx
)
4485 code
= GE
, op1
= const0_rtx
;
4487 if (cmode
== VOIDmode
)
4488 cmode
= GET_MODE (op0
);
4490 if (swap_commutative_operands_p (op2
, op3
)
4491 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4500 if (mode
== VOIDmode
)
4501 mode
= GET_MODE (op2
);
4503 icode
= movcc_gen_code
[mode
];
4505 if (icode
== CODE_FOR_nothing
)
4509 target
= gen_reg_rtx (mode
);
4513 /* If the insn doesn't accept these operands, put them in pseudos. */
4515 if (!insn_data
[icode
].operand
[0].predicate
4516 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4517 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4519 if (!insn_data
[icode
].operand
[2].predicate
4520 (op2
, insn_data
[icode
].operand
[2].mode
))
4521 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4523 if (!insn_data
[icode
].operand
[3].predicate
4524 (op3
, insn_data
[icode
].operand
[3].mode
))
4525 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4527 /* Everything should now be in the suitable form. */
4529 code
= unsignedp
? unsigned_condition (code
) : code
;
4530 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4532 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4533 return NULL and let the caller figure out how best to deal with this
4535 if (!COMPARISON_P (comparison
))
4538 do_pending_stack_adjust ();
4540 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4541 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4542 &comparison
, &cmode
);
4546 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4548 /* If that failed, then give up. */
4556 insn
= get_insns ();
4559 if (subtarget
!= target
)
4560 convert_move (target
, subtarget
, 0);
4565 /* Return nonzero if a conditional move of mode MODE is supported.
4567 This function is for combine so it can tell whether an insn that looks
4568 like a conditional move is actually supported by the hardware. If we
4569 guess wrong we lose a bit on optimization, but that's it. */
4570 /* ??? sparc64 supports conditionally moving integers values based on fp
4571 comparisons, and vice versa. How do we handle them? */
4574 can_conditionally_move_p (enum machine_mode mode
)
4576 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
4582 #endif /* HAVE_conditional_move */
4584 /* Emit a conditional addition instruction if the machine supports one for that
4585 condition and machine mode.
4587 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4588 the mode to use should they be constants. If it is VOIDmode, they cannot
4591 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4592 should be stored there. MODE is the mode to use should they be constants.
4593 If it is VOIDmode, they cannot both be constants.
4595 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4596 is not supported. */
4599 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4600 enum machine_mode cmode
, rtx op2
, rtx op3
,
4601 enum machine_mode mode
, int unsignedp
)
4603 rtx tem
, subtarget
, comparison
, insn
;
4604 enum insn_code icode
;
4605 enum rtx_code reversed
;
4607 /* If one operand is constant, make it the second one. Only do this
4608 if the other operand is not constant as well. */
4610 if (swap_commutative_operands_p (op0
, op1
))
4615 code
= swap_condition (code
);
4618 /* get_condition will prefer to generate LT and GT even if the old
4619 comparison was against zero, so undo that canonicalization here since
4620 comparisons against zero are cheaper. */
4621 if (code
== LT
&& op1
== const1_rtx
)
4622 code
= LE
, op1
= const0_rtx
;
4623 else if (code
== GT
&& op1
== constm1_rtx
)
4624 code
= GE
, op1
= const0_rtx
;
4626 if (cmode
== VOIDmode
)
4627 cmode
= GET_MODE (op0
);
4629 if (swap_commutative_operands_p (op2
, op3
)
4630 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4639 if (mode
== VOIDmode
)
4640 mode
= GET_MODE (op2
);
4642 icode
= optab_handler (addcc_optab
, mode
)->insn_code
;
4644 if (icode
== CODE_FOR_nothing
)
4648 target
= gen_reg_rtx (mode
);
4650 /* If the insn doesn't accept these operands, put them in pseudos. */
4652 if (!insn_data
[icode
].operand
[0].predicate
4653 (target
, insn_data
[icode
].operand
[0].mode
))
4654 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4658 if (!insn_data
[icode
].operand
[2].predicate
4659 (op2
, insn_data
[icode
].operand
[2].mode
))
4660 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4662 if (!insn_data
[icode
].operand
[3].predicate
4663 (op3
, insn_data
[icode
].operand
[3].mode
))
4664 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4666 /* Everything should now be in the suitable form. */
4668 code
= unsignedp
? unsigned_condition (code
) : code
;
4669 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4671 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4672 return NULL and let the caller figure out how best to deal with this
4674 if (!COMPARISON_P (comparison
))
4677 do_pending_stack_adjust ();
4679 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4680 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4681 &comparison
, &cmode
);
4685 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4687 /* If that failed, then give up. */
4695 insn
= get_insns ();
4698 if (subtarget
!= target
)
4699 convert_move (target
, subtarget
, 0);
4704 /* These functions attempt to generate an insn body, rather than
4705 emitting the insn, but if the gen function already emits them, we
4706 make no attempt to turn them back into naked patterns. */
4708 /* Generate and return an insn body to add Y to X. */
4711 gen_add2_insn (rtx x
, rtx y
)
4713 int icode
= (int) optab_handler (add_optab
, GET_MODE (x
))->insn_code
;
4715 gcc_assert (insn_data
[icode
].operand
[0].predicate
4716 (x
, insn_data
[icode
].operand
[0].mode
));
4717 gcc_assert (insn_data
[icode
].operand
[1].predicate
4718 (x
, insn_data
[icode
].operand
[1].mode
));
4719 gcc_assert (insn_data
[icode
].operand
[2].predicate
4720 (y
, insn_data
[icode
].operand
[2].mode
));
4722 return GEN_FCN (icode
) (x
, x
, y
);
4725 /* Generate and return an insn body to add r1 and c,
4726 storing the result in r0. */
4729 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4731 int icode
= (int) optab_handler (add_optab
, GET_MODE (r0
))->insn_code
;
4733 if (icode
== CODE_FOR_nothing
4734 || !(insn_data
[icode
].operand
[0].predicate
4735 (r0
, insn_data
[icode
].operand
[0].mode
))
4736 || !(insn_data
[icode
].operand
[1].predicate
4737 (r1
, insn_data
[icode
].operand
[1].mode
))
4738 || !(insn_data
[icode
].operand
[2].predicate
4739 (c
, insn_data
[icode
].operand
[2].mode
)))
4742 return GEN_FCN (icode
) (r0
, r1
, c
);
4746 have_add2_insn (rtx x
, rtx y
)
4750 gcc_assert (GET_MODE (x
) != VOIDmode
);
4752 icode
= (int) optab_handler (add_optab
, GET_MODE (x
))->insn_code
;
4754 if (icode
== CODE_FOR_nothing
)
4757 if (!(insn_data
[icode
].operand
[0].predicate
4758 (x
, insn_data
[icode
].operand
[0].mode
))
4759 || !(insn_data
[icode
].operand
[1].predicate
4760 (x
, insn_data
[icode
].operand
[1].mode
))
4761 || !(insn_data
[icode
].operand
[2].predicate
4762 (y
, insn_data
[icode
].operand
[2].mode
)))
4768 /* Generate and return an insn body to subtract Y from X. */
4771 gen_sub2_insn (rtx x
, rtx y
)
4773 int icode
= (int) optab_handler (sub_optab
, GET_MODE (x
))->insn_code
;
4775 gcc_assert (insn_data
[icode
].operand
[0].predicate
4776 (x
, insn_data
[icode
].operand
[0].mode
));
4777 gcc_assert (insn_data
[icode
].operand
[1].predicate
4778 (x
, insn_data
[icode
].operand
[1].mode
));
4779 gcc_assert (insn_data
[icode
].operand
[2].predicate
4780 (y
, insn_data
[icode
].operand
[2].mode
));
4782 return GEN_FCN (icode
) (x
, x
, y
);
4785 /* Generate and return an insn body to subtract r1 and c,
4786 storing the result in r0. */
4789 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4791 int icode
= (int) optab_handler (sub_optab
, GET_MODE (r0
))->insn_code
;
4793 if (icode
== CODE_FOR_nothing
4794 || !(insn_data
[icode
].operand
[0].predicate
4795 (r0
, insn_data
[icode
].operand
[0].mode
))
4796 || !(insn_data
[icode
].operand
[1].predicate
4797 (r1
, insn_data
[icode
].operand
[1].mode
))
4798 || !(insn_data
[icode
].operand
[2].predicate
4799 (c
, insn_data
[icode
].operand
[2].mode
)))
4802 return GEN_FCN (icode
) (r0
, r1
, c
);
4806 have_sub2_insn (rtx x
, rtx y
)
4810 gcc_assert (GET_MODE (x
) != VOIDmode
);
4812 icode
= (int) optab_handler (sub_optab
, GET_MODE (x
))->insn_code
;
4814 if (icode
== CODE_FOR_nothing
)
4817 if (!(insn_data
[icode
].operand
[0].predicate
4818 (x
, insn_data
[icode
].operand
[0].mode
))
4819 || !(insn_data
[icode
].operand
[1].predicate
4820 (x
, insn_data
[icode
].operand
[1].mode
))
4821 || !(insn_data
[icode
].operand
[2].predicate
4822 (y
, insn_data
[icode
].operand
[2].mode
)))
4828 /* Generate the body of an instruction to copy Y into X.
4829 It may be a list of insns, if one insn isn't enough. */
4832 gen_move_insn (rtx x
, rtx y
)
4837 emit_move_insn_1 (x
, y
);
4843 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4844 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4845 no such operation exists, CODE_FOR_nothing will be returned. */
4848 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4852 #ifdef HAVE_ptr_extend
4854 return CODE_FOR_ptr_extend
;
4857 tab
= unsignedp
? zext_optab
: sext_optab
;
4858 return convert_optab_handler (tab
, to_mode
, from_mode
)->insn_code
;
4861 /* Generate the body of an insn to extend Y (with mode MFROM)
4862 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4865 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4866 enum machine_mode mfrom
, int unsignedp
)
4868 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4869 return GEN_FCN (icode
) (x
, y
);
4872 /* can_fix_p and can_float_p say whether the target machine
4873 can directly convert a given fixed point type to
4874 a given floating point type, or vice versa.
4875 The returned value is the CODE_FOR_... value to use,
4876 or CODE_FOR_nothing if these modes cannot be directly converted.
4878 *TRUNCP_PTR is set to 1 if it is necessary to output
4879 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4881 static enum insn_code
4882 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4883 int unsignedp
, int *truncp_ptr
)
4886 enum insn_code icode
;
4888 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4889 icode
= convert_optab_handler (tab
, fixmode
, fltmode
)->insn_code
;
4890 if (icode
!= CODE_FOR_nothing
)
4896 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4897 for this to work. We need to rework the fix* and ftrunc* patterns
4898 and documentation. */
4899 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4900 icode
= convert_optab_handler (tab
, fixmode
, fltmode
)->insn_code
;
4901 if (icode
!= CODE_FOR_nothing
4902 && optab_handler (ftrunc_optab
, fltmode
)->insn_code
!= CODE_FOR_nothing
)
4909 return CODE_FOR_nothing
;
4912 static enum insn_code
4913 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4918 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4919 return convert_optab_handler (tab
, fltmode
, fixmode
)->insn_code
;
4922 /* Generate code to convert FROM to floating point
4923 and store in TO. FROM must be fixed point and not VOIDmode.
4924 UNSIGNEDP nonzero means regard FROM as unsigned.
4925 Normally this is done by correcting the final value
4926 if it is negative. */
4929 expand_float (rtx to
, rtx from
, int unsignedp
)
4931 enum insn_code icode
;
4933 enum machine_mode fmode
, imode
;
4934 bool can_do_signed
= false;
4936 /* Crash now, because we won't be able to decide which mode to use. */
4937 gcc_assert (GET_MODE (from
) != VOIDmode
);
4939 /* Look for an insn to do the conversion. Do it in the specified
4940 modes if possible; otherwise convert either input, output or both to
4941 wider mode. If the integer mode is wider than the mode of FROM,
4942 we can do the conversion signed even if the input is unsigned. */
4944 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4945 fmode
= GET_MODE_WIDER_MODE (fmode
))
4946 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4947 imode
= GET_MODE_WIDER_MODE (imode
))
4949 int doing_unsigned
= unsignedp
;
4951 if (fmode
!= GET_MODE (to
)
4952 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4955 icode
= can_float_p (fmode
, imode
, unsignedp
);
4956 if (icode
== CODE_FOR_nothing
&& unsignedp
)
4958 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
4959 if (scode
!= CODE_FOR_nothing
)
4960 can_do_signed
= true;
4961 if (imode
!= GET_MODE (from
))
4962 icode
= scode
, doing_unsigned
= 0;
4965 if (icode
!= CODE_FOR_nothing
)
4967 if (imode
!= GET_MODE (from
))
4968 from
= convert_to_mode (imode
, from
, unsignedp
);
4970 if (fmode
!= GET_MODE (to
))
4971 target
= gen_reg_rtx (fmode
);
4973 emit_unop_insn (icode
, target
, from
,
4974 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4977 convert_move (to
, target
, 0);
4982 /* Unsigned integer, and no way to convert directly. Convert as signed,
4983 then unconditionally adjust the result. */
4984 if (unsignedp
&& can_do_signed
)
4986 rtx label
= gen_label_rtx ();
4988 REAL_VALUE_TYPE offset
;
4990 /* Look for a usable floating mode FMODE wider than the source and at
4991 least as wide as the target. Using FMODE will avoid rounding woes
4992 with unsigned values greater than the signed maximum value. */
4994 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4995 fmode
= GET_MODE_WIDER_MODE (fmode
))
4996 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4997 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
5000 if (fmode
== VOIDmode
)
5002 /* There is no such mode. Pretend the target is wide enough. */
5003 fmode
= GET_MODE (to
);
5005 /* Avoid double-rounding when TO is narrower than FROM. */
5006 if ((significand_size (fmode
) + 1)
5007 < GET_MODE_BITSIZE (GET_MODE (from
)))
5010 rtx neglabel
= gen_label_rtx ();
5012 /* Don't use TARGET if it isn't a register, is a hard register,
5013 or is the wrong mode. */
5015 || REGNO (target
) < FIRST_PSEUDO_REGISTER
5016 || GET_MODE (target
) != fmode
)
5017 target
= gen_reg_rtx (fmode
);
5019 imode
= GET_MODE (from
);
5020 do_pending_stack_adjust ();
5022 /* Test whether the sign bit is set. */
5023 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
5026 /* The sign bit is not set. Convert as signed. */
5027 expand_float (target
, from
, 0);
5028 emit_jump_insn (gen_jump (label
));
5031 /* The sign bit is set.
5032 Convert to a usable (positive signed) value by shifting right
5033 one bit, while remembering if a nonzero bit was shifted
5034 out; i.e., compute (from & 1) | (from >> 1). */
5036 emit_label (neglabel
);
5037 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5038 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5039 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
5041 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5043 expand_float (target
, temp
, 0);
5045 /* Multiply by 2 to undo the shift above. */
5046 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5047 target
, 0, OPTAB_LIB_WIDEN
);
5049 emit_move_insn (target
, temp
);
5051 do_pending_stack_adjust ();
5057 /* If we are about to do some arithmetic to correct for an
5058 unsigned operand, do it in a pseudo-register. */
5060 if (GET_MODE (to
) != fmode
5061 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5062 target
= gen_reg_rtx (fmode
);
5064 /* Convert as signed integer to floating. */
5065 expand_float (target
, from
, 0);
5067 /* If FROM is negative (and therefore TO is negative),
5068 correct its value by 2**bitwidth. */
5070 do_pending_stack_adjust ();
5071 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5075 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)), fmode
);
5076 temp
= expand_binop (fmode
, add_optab
, target
,
5077 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5078 target
, 0, OPTAB_LIB_WIDEN
);
5080 emit_move_insn (target
, temp
);
5082 do_pending_stack_adjust ();
5087 /* No hardware instruction available; call a library routine. */
5092 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5094 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5095 from
= convert_to_mode (SImode
, from
, unsignedp
);
5097 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5098 gcc_assert (libfunc
);
5102 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5103 GET_MODE (to
), 1, from
,
5105 insns
= get_insns ();
5108 emit_libcall_block (insns
, target
, value
,
5109 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5110 GET_MODE (to
), from
));
5115 /* Copy result to requested destination
5116 if we have been computing in a temp location. */
5120 if (GET_MODE (target
) == GET_MODE (to
))
5121 emit_move_insn (to
, target
);
5123 convert_move (to
, target
, 0);
5127 /* Generate code to convert FROM to fixed point and store in TO. FROM
5128 must be floating point. */
5131 expand_fix (rtx to
, rtx from
, int unsignedp
)
5133 enum insn_code icode
;
5135 enum machine_mode fmode
, imode
;
5138 /* We first try to find a pair of modes, one real and one integer, at
5139 least as wide as FROM and TO, respectively, in which we can open-code
5140 this conversion. If the integer mode is wider than the mode of TO,
5141 we can do the conversion either signed or unsigned. */
5143 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5144 fmode
= GET_MODE_WIDER_MODE (fmode
))
5145 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5146 imode
= GET_MODE_WIDER_MODE (imode
))
5148 int doing_unsigned
= unsignedp
;
5150 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5151 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5152 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5154 if (icode
!= CODE_FOR_nothing
)
5156 rtx last
= get_last_insn ();
5157 if (fmode
!= GET_MODE (from
))
5158 from
= convert_to_mode (fmode
, from
, 0);
5162 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5163 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5167 if (imode
!= GET_MODE (to
))
5168 target
= gen_reg_rtx (imode
);
5170 if (maybe_emit_unop_insn (icode
, target
, from
,
5171 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5174 convert_move (to
, target
, unsignedp
);
5177 delete_insns_since (last
);
5181 /* For an unsigned conversion, there is one more way to do it.
5182 If we have a signed conversion, we generate code that compares
5183 the real value to the largest representable positive number. If if
5184 is smaller, the conversion is done normally. Otherwise, subtract
5185 one plus the highest signed number, convert, and add it back.
5187 We only need to check all real modes, since we know we didn't find
5188 anything with a wider integer mode.
5190 This code used to extend FP value into mode wider than the destination.
5191 This is needed for decimal float modes which cannot accurately
5192 represent one plus the highest signed number of the same size, but
5193 not for binary modes. Consider, for instance conversion from SFmode
5196 The hot path through the code is dealing with inputs smaller than 2^63
5197 and doing just the conversion, so there is no bits to lose.
5199 In the other path we know the value is positive in the range 2^63..2^64-1
5200 inclusive. (as for other input overflow happens and result is undefined)
5201 So we know that the most important bit set in mantissa corresponds to
5202 2^63. The subtraction of 2^63 should not generate any rounding as it
5203 simply clears out that bit. The rest is trivial. */
5205 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5206 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5207 fmode
= GET_MODE_WIDER_MODE (fmode
))
5208 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5209 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5210 || GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))))
5213 REAL_VALUE_TYPE offset
;
5214 rtx limit
, lab1
, lab2
, insn
;
5216 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
5217 real_2expN (&offset
, bitsize
- 1, fmode
);
5218 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5219 lab1
= gen_label_rtx ();
5220 lab2
= gen_label_rtx ();
5222 if (fmode
!= GET_MODE (from
))
5223 from
= convert_to_mode (fmode
, from
, 0);
5225 /* See if we need to do the subtraction. */
5226 do_pending_stack_adjust ();
5227 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5230 /* If not, do the signed "fix" and branch around fixup code. */
5231 expand_fix (to
, from
, 0);
5232 emit_jump_insn (gen_jump (lab2
));
5235 /* Otherwise, subtract 2**(N-1), convert to signed number,
5236 then add 2**(N-1). Do the addition using XOR since this
5237 will often generate better code. */
5239 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5240 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5241 expand_fix (to
, target
, 0);
5242 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5244 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5246 to
, 1, OPTAB_LIB_WIDEN
);
5249 emit_move_insn (to
, target
);
5253 if (optab_handler (mov_optab
, GET_MODE (to
))->insn_code
5254 != CODE_FOR_nothing
)
5256 /* Make a place for a REG_NOTE and add it. */
5257 insn
= emit_move_insn (to
, to
);
5258 set_unique_reg_note (insn
,
5260 gen_rtx_fmt_e (UNSIGNED_FIX
,
5268 /* We can't do it with an insn, so use a library call. But first ensure
5269 that the mode of TO is at least as wide as SImode, since those are the
5270 only library calls we know about. */
5272 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5274 target
= gen_reg_rtx (SImode
);
5276 expand_fix (target
, from
, unsignedp
);
5284 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5285 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5286 gcc_assert (libfunc
);
5290 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5291 GET_MODE (to
), 1, from
,
5293 insns
= get_insns ();
5296 emit_libcall_block (insns
, target
, value
,
5297 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5298 GET_MODE (to
), from
));
5303 if (GET_MODE (to
) == GET_MODE (target
))
5304 emit_move_insn (to
, target
);
5306 convert_move (to
, target
, 0);
5310 /* Generate code to convert FROM or TO a fixed-point.
5311 If UINTP is true, either TO or FROM is an unsigned integer.
5312 If SATP is true, we need to saturate the result. */
5315 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5317 enum machine_mode to_mode
= GET_MODE (to
);
5318 enum machine_mode from_mode
= GET_MODE (from
);
5320 enum rtx_code this_code
;
5321 enum insn_code code
;
5325 if (to_mode
== from_mode
)
5327 emit_move_insn (to
, from
);
5333 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5334 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5338 tab
= satp
? satfract_optab
: fract_optab
;
5339 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5341 code
= tab
->handlers
[to_mode
][from_mode
].insn_code
;
5342 if (code
!= CODE_FOR_nothing
)
5344 emit_unop_insn (code
, to
, from
, this_code
);
5348 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5349 gcc_assert (libfunc
);
5352 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5353 1, from
, from_mode
);
5354 insns
= get_insns ();
5357 emit_libcall_block (insns
, to
, value
,
5358 gen_rtx_fmt_e (tab
->code
, to_mode
, from
));
5361 /* Generate code to convert FROM to fixed point and store in TO. FROM
5362 must be floating point, TO must be signed. Use the conversion optab
5363 TAB to do the conversion. */
5366 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5368 enum insn_code icode
;
5370 enum machine_mode fmode
, imode
;
5372 /* We first try to find a pair of modes, one real and one integer, at
5373 least as wide as FROM and TO, respectively, in which we can open-code
5374 this conversion. If the integer mode is wider than the mode of TO,
5375 we can do the conversion either signed or unsigned. */
5377 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5378 fmode
= GET_MODE_WIDER_MODE (fmode
))
5379 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5380 imode
= GET_MODE_WIDER_MODE (imode
))
5382 icode
= convert_optab_handler (tab
, imode
, fmode
)->insn_code
;
5383 if (icode
!= CODE_FOR_nothing
)
5385 rtx last
= get_last_insn ();
5386 if (fmode
!= GET_MODE (from
))
5387 from
= convert_to_mode (fmode
, from
, 0);
5389 if (imode
!= GET_MODE (to
))
5390 target
= gen_reg_rtx (imode
);
5392 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5394 delete_insns_since (last
);
5398 convert_move (to
, target
, 0);
5406 /* Report whether we have an instruction to perform the operation
5407 specified by CODE on operands of mode MODE. */
5409 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5411 return (code_to_optab
[(int) code
] != 0
5412 && (optab_handler (code_to_optab
[(int) code
], mode
)->insn_code
5413 != CODE_FOR_nothing
));
5416 /* Set all insn_code fields to CODE_FOR_nothing. */
5419 init_insn_codes (void)
5423 for (i
= 0; i
< (unsigned int) OTI_MAX
; i
++)
5428 op
= &optab_table
[i
];
5429 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
5430 optab_handler (op
, j
)->insn_code
= CODE_FOR_nothing
;
5432 for (i
= 0; i
< (unsigned int) COI_MAX
; i
++)
5437 op
= &convert_optab_table
[i
];
5438 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
5439 for (k
= 0; k
< NUM_MACHINE_MODES
; k
++)
5440 convert_optab_handler (op
, j
, k
)->insn_code
= CODE_FOR_nothing
;
5444 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5446 init_optab (optab op
, enum rtx_code code
)
5449 code_to_optab
[(int) code
] = op
;
5452 /* Same, but fill in its code as CODE, and do _not_ write it into
5453 the code_to_optab table. */
5455 init_optabv (optab op
, enum rtx_code code
)
5460 /* Conversion optabs never go in the code_to_optab table. */
5462 init_convert_optab (convert_optab op
, enum rtx_code code
)
5467 /* Initialize the libfunc fields of an entire group of entries in some
5468 optab. Each entry is set equal to a string consisting of a leading
5469 pair of underscores followed by a generic operation name followed by
5470 a mode name (downshifted to lowercase) followed by a single character
5471 representing the number of operands for the given operation (which is
5472 usually one of the characters '2', '3', or '4').
5474 OPTABLE is the table in which libfunc fields are to be initialized.
5475 OPNAME is the generic (string) name of the operation.
5476 SUFFIX is the character which specifies the number of operands for
5477 the given generic operation.
5478 MODE is the mode to generate for.
5482 gen_libfunc (optab optable
, const char *opname
, int suffix
, enum machine_mode mode
)
5484 unsigned opname_len
= strlen (opname
);
5485 const char *mname
= GET_MODE_NAME (mode
);
5486 unsigned mname_len
= strlen (mname
);
5487 char *libfunc_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5494 for (q
= opname
; *q
; )
5496 for (q
= mname
; *q
; q
++)
5497 *p
++ = TOLOWER (*q
);
5501 set_optab_libfunc (optable
, mode
,
5502 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5505 /* Like gen_libfunc, but verify that integer operation is involved. */
5508 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5509 enum machine_mode mode
)
5511 int maxsize
= 2 * BITS_PER_WORD
;
5513 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5515 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5516 maxsize
= LONG_LONG_TYPE_SIZE
;
5517 if (GET_MODE_CLASS (mode
) != MODE_INT
5518 || mode
< word_mode
|| GET_MODE_BITSIZE (mode
) > maxsize
)
5520 gen_libfunc (optable
, opname
, suffix
, mode
);
5523 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5526 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5527 enum machine_mode mode
)
5531 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5532 gen_libfunc (optable
, opname
, suffix
, mode
);
5533 if (DECIMAL_FLOAT_MODE_P (mode
))
5535 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5536 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5537 depending on the low level floating format used. */
5538 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5539 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5540 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5544 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5547 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5548 enum machine_mode mode
)
5550 if (!ALL_FIXED_POINT_MODE_P (mode
))
5552 gen_libfunc (optable
, opname
, suffix
, mode
);
5555 /* Like gen_libfunc, but verify that signed fixed-point operation is
5559 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5560 enum machine_mode mode
)
5562 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5564 gen_libfunc (optable
, opname
, suffix
, mode
);
5567 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5571 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5572 enum machine_mode mode
)
5574 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5576 gen_libfunc (optable
, opname
, suffix
, mode
);
5579 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5582 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5583 enum machine_mode mode
)
5585 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5586 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5587 if (INTEGRAL_MODE_P (mode
))
5588 gen_int_libfunc (optable
, name
, suffix
, mode
);
5591 /* Like gen_libfunc, but verify that FP or INT operation is involved
5592 and add 'v' suffix for integer operation. */
5595 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5596 enum machine_mode mode
)
5598 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5599 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5600 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5602 int len
= strlen (name
);
5603 char *v_name
= XALLOCAVEC (char, len
+ 2);
5604 strcpy (v_name
, name
);
5606 v_name
[len
+ 1] = 0;
5607 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5611 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5615 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5616 enum machine_mode mode
)
5618 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5619 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5620 if (INTEGRAL_MODE_P (mode
))
5621 gen_int_libfunc (optable
, name
, suffix
, mode
);
5622 if (ALL_FIXED_POINT_MODE_P (mode
))
5623 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5626 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5630 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5631 enum machine_mode mode
)
5633 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5634 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5635 if (INTEGRAL_MODE_P (mode
))
5636 gen_int_libfunc (optable
, name
, suffix
, mode
);
5637 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5638 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5641 /* Like gen_libfunc, but verify that INT or FIXED operation is
5645 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5646 enum machine_mode mode
)
5648 if (INTEGRAL_MODE_P (mode
))
5649 gen_int_libfunc (optable
, name
, suffix
, mode
);
5650 if (ALL_FIXED_POINT_MODE_P (mode
))
5651 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5654 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5658 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5659 enum machine_mode mode
)
5661 if (INTEGRAL_MODE_P (mode
))
5662 gen_int_libfunc (optable
, name
, suffix
, mode
);
5663 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5664 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5667 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5671 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5672 enum machine_mode mode
)
5674 if (INTEGRAL_MODE_P (mode
))
5675 gen_int_libfunc (optable
, name
, suffix
, mode
);
5676 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5677 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5680 /* Initialize the libfunc fields of an entire group of entries of an
5681 inter-mode-class conversion optab. The string formation rules are
5682 similar to the ones for init_libfuncs, above, but instead of having
5683 a mode name and an operand count these functions have two mode names
5684 and no operand count. */
5687 gen_interclass_conv_libfunc (convert_optab tab
,
5689 enum machine_mode tmode
,
5690 enum machine_mode fmode
)
5692 size_t opname_len
= strlen (opname
);
5693 size_t mname_len
= 0;
5695 const char *fname
, *tname
;
5697 char *libfunc_name
, *suffix
;
5698 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5701 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5702 depends on which underlying decimal floating point format is used. */
5703 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5705 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5707 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5708 nondec_name
[0] = '_';
5709 nondec_name
[1] = '_';
5710 memcpy (&nondec_name
[2], opname
, opname_len
);
5711 nondec_suffix
= nondec_name
+ opname_len
+ 2;
5713 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5716 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5717 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5718 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5720 fname
= GET_MODE_NAME (fmode
);
5721 tname
= GET_MODE_NAME (tmode
);
5723 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5725 libfunc_name
= dec_name
;
5726 suffix
= dec_suffix
;
5730 libfunc_name
= nondec_name
;
5731 suffix
= nondec_suffix
;
5735 for (q
= fname
; *q
; p
++, q
++)
5737 for (q
= tname
; *q
; p
++, q
++)
5742 set_conv_libfunc (tab
, tmode
, fmode
,
5743 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5746 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5747 int->fp conversion. */
5750 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5752 enum machine_mode tmode
,
5753 enum machine_mode fmode
)
5755 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5757 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5759 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5762 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5766 gen_ufloat_conv_libfunc (convert_optab tab
,
5767 const char *opname ATTRIBUTE_UNUSED
,
5768 enum machine_mode tmode
,
5769 enum machine_mode fmode
)
5771 if (DECIMAL_FLOAT_MODE_P (tmode
))
5772 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5774 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5777 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5778 fp->int conversion. */
5781 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5783 enum machine_mode tmode
,
5784 enum machine_mode fmode
)
5786 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5788 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5790 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5793 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5794 fp->int conversion with no decimal floating point involved. */
5797 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5799 enum machine_mode tmode
,
5800 enum machine_mode fmode
)
5802 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5804 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5806 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5809 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5810 The string formation rules are
5811 similar to the ones for init_libfunc, above. */
5814 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5815 enum machine_mode tmode
, enum machine_mode fmode
)
5817 size_t opname_len
= strlen (opname
);
5818 size_t mname_len
= 0;
5820 const char *fname
, *tname
;
5822 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5823 char *libfunc_name
, *suffix
;
5826 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5827 depends on which underlying decimal floating point format is used. */
5828 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5830 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5832 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5833 nondec_name
[0] = '_';
5834 nondec_name
[1] = '_';
5835 memcpy (&nondec_name
[2], opname
, opname_len
);
5836 nondec_suffix
= nondec_name
+ opname_len
+ 2;
5838 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5841 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5842 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5843 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5845 fname
= GET_MODE_NAME (fmode
);
5846 tname
= GET_MODE_NAME (tmode
);
5848 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5850 libfunc_name
= dec_name
;
5851 suffix
= dec_suffix
;
5855 libfunc_name
= nondec_name
;
5856 suffix
= nondec_suffix
;
5860 for (q
= fname
; *q
; p
++, q
++)
5862 for (q
= tname
; *q
; p
++, q
++)
5868 set_conv_libfunc (tab
, tmode
, fmode
,
5869 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5872 /* Pick proper libcall for trunc_optab. We need to chose if we do
5873 truncation or extension and interclass or intraclass. */
5876 gen_trunc_conv_libfunc (convert_optab tab
,
5878 enum machine_mode tmode
,
5879 enum machine_mode fmode
)
5881 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5883 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5888 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5889 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5890 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5892 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5895 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5896 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5897 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5898 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5901 /* Pick proper libcall for extend_optab. We need to chose if we do
5902 truncation or extension and interclass or intraclass. */
5905 gen_extend_conv_libfunc (convert_optab tab
,
5906 const char *opname ATTRIBUTE_UNUSED
,
5907 enum machine_mode tmode
,
5908 enum machine_mode fmode
)
5910 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5912 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5917 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5918 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5919 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5921 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5924 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5925 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5926 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5927 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5930 /* Pick proper libcall for fract_optab. We need to chose if we do
5931 interclass or intraclass. */
5934 gen_fract_conv_libfunc (convert_optab tab
,
5936 enum machine_mode tmode
,
5937 enum machine_mode fmode
)
5941 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
5944 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5945 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5947 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5950 /* Pick proper libcall for fractuns_optab. */
5953 gen_fractuns_conv_libfunc (convert_optab tab
,
5955 enum machine_mode tmode
,
5956 enum machine_mode fmode
)
5960 /* One mode must be a fixed-point mode, and the other must be an integer
5962 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
5963 || (ALL_FIXED_POINT_MODE_P (fmode
)
5964 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
5967 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5970 /* Pick proper libcall for satfract_optab. We need to chose if we do
5971 interclass or intraclass. */
5974 gen_satfract_conv_libfunc (convert_optab tab
,
5976 enum machine_mode tmode
,
5977 enum machine_mode fmode
)
5981 /* TMODE must be a fixed-point mode. */
5982 if (!ALL_FIXED_POINT_MODE_P (tmode
))
5985 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5986 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5988 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5991 /* Pick proper libcall for satfractuns_optab. */
5994 gen_satfractuns_conv_libfunc (convert_optab tab
,
5996 enum machine_mode tmode
,
5997 enum machine_mode fmode
)
6001 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6002 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
6005 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6008 /* A table of previously-created libfuncs, hashed by name. */
6009 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
6011 /* Hashtable callbacks for libfunc_decls. */
6014 libfunc_decl_hash (const void *entry
)
6016 return htab_hash_string (IDENTIFIER_POINTER (DECL_NAME ((const_tree
) entry
)));
6020 libfunc_decl_eq (const void *entry1
, const void *entry2
)
6022 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
6026 init_one_libfunc (const char *name
)
6032 if (libfunc_decls
== NULL
)
6033 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
6034 libfunc_decl_eq
, NULL
);
6036 /* See if we have already created a libfunc decl for this function. */
6037 id
= get_identifier (name
);
6038 hash
= htab_hash_string (name
);
6039 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6040 decl
= (tree
) *slot
;
6043 /* Create a new decl, so that it can be passed to
6044 targetm.encode_section_info. */
6045 /* ??? We don't have any type information except for this is
6046 a function. Pretend this is "int foo()". */
6047 decl
= build_decl (UNKNOWN_LOCATION
,
6048 FUNCTION_DECL
, get_identifier (name
),
6049 build_function_type (integer_type_node
, NULL_TREE
));
6050 DECL_ARTIFICIAL (decl
) = 1;
6051 DECL_EXTERNAL (decl
) = 1;
6052 TREE_PUBLIC (decl
) = 1;
6054 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6055 are the flags assigned by targetm.encode_section_info. */
6056 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
6060 return XEXP (DECL_RTL (decl
), 0);
6063 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6066 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6072 id
= get_identifier (name
);
6073 hash
= htab_hash_string (name
);
6074 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6076 decl
= (tree
) *slot
;
6077 set_user_assembler_name (decl
, asmspec
);
6078 return XEXP (DECL_RTL (decl
), 0);
6081 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6082 MODE to NAME, which should be either 0 or a string constant. */
6084 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
6087 struct libfunc_entry e
;
6088 struct libfunc_entry
**slot
;
6089 e
.optab
= (size_t) (optable
- &optab_table
[0]);
6094 val
= init_one_libfunc (name
);
6097 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6099 *slot
= GGC_NEW (struct libfunc_entry
);
6100 (*slot
)->optab
= (size_t) (optable
- &optab_table
[0]);
6101 (*slot
)->mode1
= mode
;
6102 (*slot
)->mode2
= VOIDmode
;
6103 (*slot
)->libfunc
= val
;
6106 /* Call this to reset the function entry for one conversion optab
6107 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6108 either 0 or a string constant. */
6110 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
6111 enum machine_mode fmode
, const char *name
)
6114 struct libfunc_entry e
;
6115 struct libfunc_entry
**slot
;
6116 e
.optab
= (size_t) (optable
- &convert_optab_table
[0]);
6121 val
= init_one_libfunc (name
);
6124 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6126 *slot
= GGC_NEW (struct libfunc_entry
);
6127 (*slot
)->optab
= (size_t) (optable
- &convert_optab_table
[0]);
6128 (*slot
)->mode1
= tmode
;
6129 (*slot
)->mode2
= fmode
;
6130 (*slot
)->libfunc
= val
;
6133 /* Call this to initialize the contents of the optabs
6134 appropriately for the current target machine. */
6140 enum machine_mode int_mode
;
6143 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6144 /* Start by initializing all tables to contain CODE_FOR_nothing. */
6146 #ifdef HAVE_conditional_move
6147 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
6148 movcc_gen_code
[i
] = CODE_FOR_nothing
;
6151 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
6153 vcond_gen_code
[i
] = CODE_FOR_nothing
;
6154 vcondu_gen_code
[i
] = CODE_FOR_nothing
;
6157 #if GCC_VERSION >= 4000 && HAVE_DESIGNATED_INITIALIZERS
6158 /* We statically initialize the insn_codes with CODE_FOR_nothing. */
6165 init_optab (add_optab
, PLUS
);
6166 init_optabv (addv_optab
, PLUS
);
6167 init_optab (sub_optab
, MINUS
);
6168 init_optabv (subv_optab
, MINUS
);
6169 init_optab (ssadd_optab
, SS_PLUS
);
6170 init_optab (usadd_optab
, US_PLUS
);
6171 init_optab (sssub_optab
, SS_MINUS
);
6172 init_optab (ussub_optab
, US_MINUS
);
6173 init_optab (smul_optab
, MULT
);
6174 init_optab (ssmul_optab
, SS_MULT
);
6175 init_optab (usmul_optab
, US_MULT
);
6176 init_optabv (smulv_optab
, MULT
);
6177 init_optab (smul_highpart_optab
, UNKNOWN
);
6178 init_optab (umul_highpart_optab
, UNKNOWN
);
6179 init_optab (smul_widen_optab
, UNKNOWN
);
6180 init_optab (umul_widen_optab
, UNKNOWN
);
6181 init_optab (usmul_widen_optab
, UNKNOWN
);
6182 init_optab (smadd_widen_optab
, UNKNOWN
);
6183 init_optab (umadd_widen_optab
, UNKNOWN
);
6184 init_optab (ssmadd_widen_optab
, UNKNOWN
);
6185 init_optab (usmadd_widen_optab
, UNKNOWN
);
6186 init_optab (smsub_widen_optab
, UNKNOWN
);
6187 init_optab (umsub_widen_optab
, UNKNOWN
);
6188 init_optab (ssmsub_widen_optab
, UNKNOWN
);
6189 init_optab (usmsub_widen_optab
, UNKNOWN
);
6190 init_optab (sdiv_optab
, DIV
);
6191 init_optab (ssdiv_optab
, SS_DIV
);
6192 init_optab (usdiv_optab
, US_DIV
);
6193 init_optabv (sdivv_optab
, DIV
);
6194 init_optab (sdivmod_optab
, UNKNOWN
);
6195 init_optab (udiv_optab
, UDIV
);
6196 init_optab (udivmod_optab
, UNKNOWN
);
6197 init_optab (smod_optab
, MOD
);
6198 init_optab (umod_optab
, UMOD
);
6199 init_optab (fmod_optab
, UNKNOWN
);
6200 init_optab (remainder_optab
, UNKNOWN
);
6201 init_optab (ftrunc_optab
, UNKNOWN
);
6202 init_optab (and_optab
, AND
);
6203 init_optab (ior_optab
, IOR
);
6204 init_optab (xor_optab
, XOR
);
6205 init_optab (ashl_optab
, ASHIFT
);
6206 init_optab (ssashl_optab
, SS_ASHIFT
);
6207 init_optab (usashl_optab
, US_ASHIFT
);
6208 init_optab (ashr_optab
, ASHIFTRT
);
6209 init_optab (lshr_optab
, LSHIFTRT
);
6210 init_optab (rotl_optab
, ROTATE
);
6211 init_optab (rotr_optab
, ROTATERT
);
6212 init_optab (smin_optab
, SMIN
);
6213 init_optab (smax_optab
, SMAX
);
6214 init_optab (umin_optab
, UMIN
);
6215 init_optab (umax_optab
, UMAX
);
6216 init_optab (pow_optab
, UNKNOWN
);
6217 init_optab (atan2_optab
, UNKNOWN
);
6219 /* These three have codes assigned exclusively for the sake of
6221 init_optab (mov_optab
, SET
);
6222 init_optab (movstrict_optab
, STRICT_LOW_PART
);
6223 init_optab (cbranch_optab
, COMPARE
);
6225 init_optab (cmov_optab
, UNKNOWN
);
6226 init_optab (cstore_optab
, UNKNOWN
);
6227 init_optab (ctrap_optab
, UNKNOWN
);
6229 init_optab (storent_optab
, UNKNOWN
);
6231 init_optab (cmp_optab
, UNKNOWN
);
6232 init_optab (ucmp_optab
, UNKNOWN
);
6234 init_optab (eq_optab
, EQ
);
6235 init_optab (ne_optab
, NE
);
6236 init_optab (gt_optab
, GT
);
6237 init_optab (ge_optab
, GE
);
6238 init_optab (lt_optab
, LT
);
6239 init_optab (le_optab
, LE
);
6240 init_optab (unord_optab
, UNORDERED
);
6242 init_optab (neg_optab
, NEG
);
6243 init_optab (ssneg_optab
, SS_NEG
);
6244 init_optab (usneg_optab
, US_NEG
);
6245 init_optabv (negv_optab
, NEG
);
6246 init_optab (abs_optab
, ABS
);
6247 init_optabv (absv_optab
, ABS
);
6248 init_optab (addcc_optab
, UNKNOWN
);
6249 init_optab (one_cmpl_optab
, NOT
);
6250 init_optab (bswap_optab
, BSWAP
);
6251 init_optab (ffs_optab
, FFS
);
6252 init_optab (clz_optab
, CLZ
);
6253 init_optab (ctz_optab
, CTZ
);
6254 init_optab (popcount_optab
, POPCOUNT
);
6255 init_optab (parity_optab
, PARITY
);
6256 init_optab (sqrt_optab
, SQRT
);
6257 init_optab (floor_optab
, UNKNOWN
);
6258 init_optab (ceil_optab
, UNKNOWN
);
6259 init_optab (round_optab
, UNKNOWN
);
6260 init_optab (btrunc_optab
, UNKNOWN
);
6261 init_optab (nearbyint_optab
, UNKNOWN
);
6262 init_optab (rint_optab
, UNKNOWN
);
6263 init_optab (sincos_optab
, UNKNOWN
);
6264 init_optab (sin_optab
, UNKNOWN
);
6265 init_optab (asin_optab
, UNKNOWN
);
6266 init_optab (cos_optab
, UNKNOWN
);
6267 init_optab (acos_optab
, UNKNOWN
);
6268 init_optab (exp_optab
, UNKNOWN
);
6269 init_optab (exp10_optab
, UNKNOWN
);
6270 init_optab (exp2_optab
, UNKNOWN
);
6271 init_optab (expm1_optab
, UNKNOWN
);
6272 init_optab (ldexp_optab
, UNKNOWN
);
6273 init_optab (scalb_optab
, UNKNOWN
);
6274 init_optab (significand_optab
, UNKNOWN
);
6275 init_optab (logb_optab
, UNKNOWN
);
6276 init_optab (ilogb_optab
, UNKNOWN
);
6277 init_optab (log_optab
, UNKNOWN
);
6278 init_optab (log10_optab
, UNKNOWN
);
6279 init_optab (log2_optab
, UNKNOWN
);
6280 init_optab (log1p_optab
, UNKNOWN
);
6281 init_optab (tan_optab
, UNKNOWN
);
6282 init_optab (atan_optab
, UNKNOWN
);
6283 init_optab (copysign_optab
, UNKNOWN
);
6284 init_optab (signbit_optab
, UNKNOWN
);
6286 init_optab (isinf_optab
, UNKNOWN
);
6288 init_optab (strlen_optab
, UNKNOWN
);
6289 init_optab (push_optab
, UNKNOWN
);
6291 init_optab (reduc_smax_optab
, UNKNOWN
);
6292 init_optab (reduc_umax_optab
, UNKNOWN
);
6293 init_optab (reduc_smin_optab
, UNKNOWN
);
6294 init_optab (reduc_umin_optab
, UNKNOWN
);
6295 init_optab (reduc_splus_optab
, UNKNOWN
);
6296 init_optab (reduc_uplus_optab
, UNKNOWN
);
6298 init_optab (ssum_widen_optab
, UNKNOWN
);
6299 init_optab (usum_widen_optab
, UNKNOWN
);
6300 init_optab (sdot_prod_optab
, UNKNOWN
);
6301 init_optab (udot_prod_optab
, UNKNOWN
);
6303 init_optab (vec_extract_optab
, UNKNOWN
);
6304 init_optab (vec_extract_even_optab
, UNKNOWN
);
6305 init_optab (vec_extract_odd_optab
, UNKNOWN
);
6306 init_optab (vec_interleave_high_optab
, UNKNOWN
);
6307 init_optab (vec_interleave_low_optab
, UNKNOWN
);
6308 init_optab (vec_set_optab
, UNKNOWN
);
6309 init_optab (vec_init_optab
, UNKNOWN
);
6310 init_optab (vec_shl_optab
, UNKNOWN
);
6311 init_optab (vec_shr_optab
, UNKNOWN
);
6312 init_optab (vec_realign_load_optab
, UNKNOWN
);
6313 init_optab (movmisalign_optab
, UNKNOWN
);
6314 init_optab (vec_widen_umult_hi_optab
, UNKNOWN
);
6315 init_optab (vec_widen_umult_lo_optab
, UNKNOWN
);
6316 init_optab (vec_widen_smult_hi_optab
, UNKNOWN
);
6317 init_optab (vec_widen_smult_lo_optab
, UNKNOWN
);
6318 init_optab (vec_unpacks_hi_optab
, UNKNOWN
);
6319 init_optab (vec_unpacks_lo_optab
, UNKNOWN
);
6320 init_optab (vec_unpacku_hi_optab
, UNKNOWN
);
6321 init_optab (vec_unpacku_lo_optab
, UNKNOWN
);
6322 init_optab (vec_unpacks_float_hi_optab
, UNKNOWN
);
6323 init_optab (vec_unpacks_float_lo_optab
, UNKNOWN
);
6324 init_optab (vec_unpacku_float_hi_optab
, UNKNOWN
);
6325 init_optab (vec_unpacku_float_lo_optab
, UNKNOWN
);
6326 init_optab (vec_pack_trunc_optab
, UNKNOWN
);
6327 init_optab (vec_pack_usat_optab
, UNKNOWN
);
6328 init_optab (vec_pack_ssat_optab
, UNKNOWN
);
6329 init_optab (vec_pack_ufix_trunc_optab
, UNKNOWN
);
6330 init_optab (vec_pack_sfix_trunc_optab
, UNKNOWN
);
6332 init_optab (powi_optab
, UNKNOWN
);
6335 init_convert_optab (sext_optab
, SIGN_EXTEND
);
6336 init_convert_optab (zext_optab
, ZERO_EXTEND
);
6337 init_convert_optab (trunc_optab
, TRUNCATE
);
6338 init_convert_optab (sfix_optab
, FIX
);
6339 init_convert_optab (ufix_optab
, UNSIGNED_FIX
);
6340 init_convert_optab (sfixtrunc_optab
, UNKNOWN
);
6341 init_convert_optab (ufixtrunc_optab
, UNKNOWN
);
6342 init_convert_optab (sfloat_optab
, FLOAT
);
6343 init_convert_optab (ufloat_optab
, UNSIGNED_FLOAT
);
6344 init_convert_optab (lrint_optab
, UNKNOWN
);
6345 init_convert_optab (lround_optab
, UNKNOWN
);
6346 init_convert_optab (lfloor_optab
, UNKNOWN
);
6347 init_convert_optab (lceil_optab
, UNKNOWN
);
6349 init_convert_optab (fract_optab
, FRACT_CONVERT
);
6350 init_convert_optab (fractuns_optab
, UNSIGNED_FRACT_CONVERT
);
6351 init_convert_optab (satfract_optab
, SAT_FRACT
);
6352 init_convert_optab (satfractuns_optab
, UNSIGNED_SAT_FRACT
);
6354 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
6356 movmem_optab
[i
] = CODE_FOR_nothing
;
6357 cmpstr_optab
[i
] = CODE_FOR_nothing
;
6358 cmpstrn_optab
[i
] = CODE_FOR_nothing
;
6359 cmpmem_optab
[i
] = CODE_FOR_nothing
;
6360 setmem_optab
[i
] = CODE_FOR_nothing
;
6362 sync_add_optab
[i
] = CODE_FOR_nothing
;
6363 sync_sub_optab
[i
] = CODE_FOR_nothing
;
6364 sync_ior_optab
[i
] = CODE_FOR_nothing
;
6365 sync_and_optab
[i
] = CODE_FOR_nothing
;
6366 sync_xor_optab
[i
] = CODE_FOR_nothing
;
6367 sync_nand_optab
[i
] = CODE_FOR_nothing
;
6368 sync_old_add_optab
[i
] = CODE_FOR_nothing
;
6369 sync_old_sub_optab
[i
] = CODE_FOR_nothing
;
6370 sync_old_ior_optab
[i
] = CODE_FOR_nothing
;
6371 sync_old_and_optab
[i
] = CODE_FOR_nothing
;
6372 sync_old_xor_optab
[i
] = CODE_FOR_nothing
;
6373 sync_old_nand_optab
[i
] = CODE_FOR_nothing
;
6374 sync_new_add_optab
[i
] = CODE_FOR_nothing
;
6375 sync_new_sub_optab
[i
] = CODE_FOR_nothing
;
6376 sync_new_ior_optab
[i
] = CODE_FOR_nothing
;
6377 sync_new_and_optab
[i
] = CODE_FOR_nothing
;
6378 sync_new_xor_optab
[i
] = CODE_FOR_nothing
;
6379 sync_new_nand_optab
[i
] = CODE_FOR_nothing
;
6380 sync_compare_and_swap
[i
] = CODE_FOR_nothing
;
6381 sync_lock_test_and_set
[i
] = CODE_FOR_nothing
;
6382 sync_lock_release
[i
] = CODE_FOR_nothing
;
6384 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
6387 /* Fill in the optabs with the insns we support. */
6390 /* Initialize the optabs with the names of the library functions. */
6391 add_optab
->libcall_basename
= "add";
6392 add_optab
->libcall_suffix
= '3';
6393 add_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6394 addv_optab
->libcall_basename
= "add";
6395 addv_optab
->libcall_suffix
= '3';
6396 addv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6397 ssadd_optab
->libcall_basename
= "ssadd";
6398 ssadd_optab
->libcall_suffix
= '3';
6399 ssadd_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6400 usadd_optab
->libcall_basename
= "usadd";
6401 usadd_optab
->libcall_suffix
= '3';
6402 usadd_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6403 sub_optab
->libcall_basename
= "sub";
6404 sub_optab
->libcall_suffix
= '3';
6405 sub_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6406 subv_optab
->libcall_basename
= "sub";
6407 subv_optab
->libcall_suffix
= '3';
6408 subv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6409 sssub_optab
->libcall_basename
= "sssub";
6410 sssub_optab
->libcall_suffix
= '3';
6411 sssub_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6412 ussub_optab
->libcall_basename
= "ussub";
6413 ussub_optab
->libcall_suffix
= '3';
6414 ussub_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6415 smul_optab
->libcall_basename
= "mul";
6416 smul_optab
->libcall_suffix
= '3';
6417 smul_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6418 smulv_optab
->libcall_basename
= "mul";
6419 smulv_optab
->libcall_suffix
= '3';
6420 smulv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6421 ssmul_optab
->libcall_basename
= "ssmul";
6422 ssmul_optab
->libcall_suffix
= '3';
6423 ssmul_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6424 usmul_optab
->libcall_basename
= "usmul";
6425 usmul_optab
->libcall_suffix
= '3';
6426 usmul_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6427 sdiv_optab
->libcall_basename
= "div";
6428 sdiv_optab
->libcall_suffix
= '3';
6429 sdiv_optab
->libcall_gen
= gen_int_fp_signed_fixed_libfunc
;
6430 sdivv_optab
->libcall_basename
= "divv";
6431 sdivv_optab
->libcall_suffix
= '3';
6432 sdivv_optab
->libcall_gen
= gen_int_libfunc
;
6433 ssdiv_optab
->libcall_basename
= "ssdiv";
6434 ssdiv_optab
->libcall_suffix
= '3';
6435 ssdiv_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6436 udiv_optab
->libcall_basename
= "udiv";
6437 udiv_optab
->libcall_suffix
= '3';
6438 udiv_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6439 usdiv_optab
->libcall_basename
= "usdiv";
6440 usdiv_optab
->libcall_suffix
= '3';
6441 usdiv_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6442 sdivmod_optab
->libcall_basename
= "divmod";
6443 sdivmod_optab
->libcall_suffix
= '4';
6444 sdivmod_optab
->libcall_gen
= gen_int_libfunc
;
6445 udivmod_optab
->libcall_basename
= "udivmod";
6446 udivmod_optab
->libcall_suffix
= '4';
6447 udivmod_optab
->libcall_gen
= gen_int_libfunc
;
6448 smod_optab
->libcall_basename
= "mod";
6449 smod_optab
->libcall_suffix
= '3';
6450 smod_optab
->libcall_gen
= gen_int_libfunc
;
6451 umod_optab
->libcall_basename
= "umod";
6452 umod_optab
->libcall_suffix
= '3';
6453 umod_optab
->libcall_gen
= gen_int_libfunc
;
6454 ftrunc_optab
->libcall_basename
= "ftrunc";
6455 ftrunc_optab
->libcall_suffix
= '2';
6456 ftrunc_optab
->libcall_gen
= gen_fp_libfunc
;
6457 and_optab
->libcall_basename
= "and";
6458 and_optab
->libcall_suffix
= '3';
6459 and_optab
->libcall_gen
= gen_int_libfunc
;
6460 ior_optab
->libcall_basename
= "ior";
6461 ior_optab
->libcall_suffix
= '3';
6462 ior_optab
->libcall_gen
= gen_int_libfunc
;
6463 xor_optab
->libcall_basename
= "xor";
6464 xor_optab
->libcall_suffix
= '3';
6465 xor_optab
->libcall_gen
= gen_int_libfunc
;
6466 ashl_optab
->libcall_basename
= "ashl";
6467 ashl_optab
->libcall_suffix
= '3';
6468 ashl_optab
->libcall_gen
= gen_int_fixed_libfunc
;
6469 ssashl_optab
->libcall_basename
= "ssashl";
6470 ssashl_optab
->libcall_suffix
= '3';
6471 ssashl_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6472 usashl_optab
->libcall_basename
= "usashl";
6473 usashl_optab
->libcall_suffix
= '3';
6474 usashl_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6475 ashr_optab
->libcall_basename
= "ashr";
6476 ashr_optab
->libcall_suffix
= '3';
6477 ashr_optab
->libcall_gen
= gen_int_signed_fixed_libfunc
;
6478 lshr_optab
->libcall_basename
= "lshr";
6479 lshr_optab
->libcall_suffix
= '3';
6480 lshr_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6481 smin_optab
->libcall_basename
= "min";
6482 smin_optab
->libcall_suffix
= '3';
6483 smin_optab
->libcall_gen
= gen_int_fp_libfunc
;
6484 smax_optab
->libcall_basename
= "max";
6485 smax_optab
->libcall_suffix
= '3';
6486 smax_optab
->libcall_gen
= gen_int_fp_libfunc
;
6487 umin_optab
->libcall_basename
= "umin";
6488 umin_optab
->libcall_suffix
= '3';
6489 umin_optab
->libcall_gen
= gen_int_libfunc
;
6490 umax_optab
->libcall_basename
= "umax";
6491 umax_optab
->libcall_suffix
= '3';
6492 umax_optab
->libcall_gen
= gen_int_libfunc
;
6493 neg_optab
->libcall_basename
= "neg";
6494 neg_optab
->libcall_suffix
= '2';
6495 neg_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6496 ssneg_optab
->libcall_basename
= "ssneg";
6497 ssneg_optab
->libcall_suffix
= '2';
6498 ssneg_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6499 usneg_optab
->libcall_basename
= "usneg";
6500 usneg_optab
->libcall_suffix
= '2';
6501 usneg_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6502 negv_optab
->libcall_basename
= "neg";
6503 negv_optab
->libcall_suffix
= '2';
6504 negv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6505 one_cmpl_optab
->libcall_basename
= "one_cmpl";
6506 one_cmpl_optab
->libcall_suffix
= '2';
6507 one_cmpl_optab
->libcall_gen
= gen_int_libfunc
;
6508 ffs_optab
->libcall_basename
= "ffs";
6509 ffs_optab
->libcall_suffix
= '2';
6510 ffs_optab
->libcall_gen
= gen_int_libfunc
;
6511 clz_optab
->libcall_basename
= "clz";
6512 clz_optab
->libcall_suffix
= '2';
6513 clz_optab
->libcall_gen
= gen_int_libfunc
;
6514 ctz_optab
->libcall_basename
= "ctz";
6515 ctz_optab
->libcall_suffix
= '2';
6516 ctz_optab
->libcall_gen
= gen_int_libfunc
;
6517 popcount_optab
->libcall_basename
= "popcount";
6518 popcount_optab
->libcall_suffix
= '2';
6519 popcount_optab
->libcall_gen
= gen_int_libfunc
;
6520 parity_optab
->libcall_basename
= "parity";
6521 parity_optab
->libcall_suffix
= '2';
6522 parity_optab
->libcall_gen
= gen_int_libfunc
;
6524 /* Comparison libcalls for integers MUST come in pairs,
6526 cmp_optab
->libcall_basename
= "cmp";
6527 cmp_optab
->libcall_suffix
= '2';
6528 cmp_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6529 ucmp_optab
->libcall_basename
= "ucmp";
6530 ucmp_optab
->libcall_suffix
= '2';
6531 ucmp_optab
->libcall_gen
= gen_int_libfunc
;
6533 /* EQ etc are floating point only. */
6534 eq_optab
->libcall_basename
= "eq";
6535 eq_optab
->libcall_suffix
= '2';
6536 eq_optab
->libcall_gen
= gen_fp_libfunc
;
6537 ne_optab
->libcall_basename
= "ne";
6538 ne_optab
->libcall_suffix
= '2';
6539 ne_optab
->libcall_gen
= gen_fp_libfunc
;
6540 gt_optab
->libcall_basename
= "gt";
6541 gt_optab
->libcall_suffix
= '2';
6542 gt_optab
->libcall_gen
= gen_fp_libfunc
;
6543 ge_optab
->libcall_basename
= "ge";
6544 ge_optab
->libcall_suffix
= '2';
6545 ge_optab
->libcall_gen
= gen_fp_libfunc
;
6546 lt_optab
->libcall_basename
= "lt";
6547 lt_optab
->libcall_suffix
= '2';
6548 lt_optab
->libcall_gen
= gen_fp_libfunc
;
6549 le_optab
->libcall_basename
= "le";
6550 le_optab
->libcall_suffix
= '2';
6551 le_optab
->libcall_gen
= gen_fp_libfunc
;
6552 unord_optab
->libcall_basename
= "unord";
6553 unord_optab
->libcall_suffix
= '2';
6554 unord_optab
->libcall_gen
= gen_fp_libfunc
;
6556 powi_optab
->libcall_basename
= "powi";
6557 powi_optab
->libcall_suffix
= '2';
6558 powi_optab
->libcall_gen
= gen_fp_libfunc
;
6561 sfloat_optab
->libcall_basename
= "float";
6562 sfloat_optab
->libcall_gen
= gen_int_to_fp_conv_libfunc
;
6563 ufloat_optab
->libcall_gen
= gen_ufloat_conv_libfunc
;
6564 sfix_optab
->libcall_basename
= "fix";
6565 sfix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6566 ufix_optab
->libcall_basename
= "fixuns";
6567 ufix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6568 lrint_optab
->libcall_basename
= "lrint";
6569 lrint_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6570 lround_optab
->libcall_basename
= "lround";
6571 lround_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6572 lfloor_optab
->libcall_basename
= "lfloor";
6573 lfloor_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6574 lceil_optab
->libcall_basename
= "lceil";
6575 lceil_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6577 /* trunc_optab is also used for FLOAT_EXTEND. */
6578 sext_optab
->libcall_basename
= "extend";
6579 sext_optab
->libcall_gen
= gen_extend_conv_libfunc
;
6580 trunc_optab
->libcall_basename
= "trunc";
6581 trunc_optab
->libcall_gen
= gen_trunc_conv_libfunc
;
6583 /* Conversions for fixed-point modes and other modes. */
6584 fract_optab
->libcall_basename
= "fract";
6585 fract_optab
->libcall_gen
= gen_fract_conv_libfunc
;
6586 satfract_optab
->libcall_basename
= "satfract";
6587 satfract_optab
->libcall_gen
= gen_satfract_conv_libfunc
;
6588 fractuns_optab
->libcall_basename
= "fractuns";
6589 fractuns_optab
->libcall_gen
= gen_fractuns_conv_libfunc
;
6590 satfractuns_optab
->libcall_basename
= "satfractuns";
6591 satfractuns_optab
->libcall_gen
= gen_satfractuns_conv_libfunc
;
6593 /* The ffs function operates on `int'. Fall back on it if we do not
6594 have a libgcc2 function for that width. */
6595 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6597 int_mode
= mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0);
6598 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6602 /* Explicitly initialize the bswap libfuncs since we need them to be
6603 valid for things other than word_mode. */
6604 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6605 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6607 /* Use cabs for double complex abs, since systems generally have cabs.
6608 Don't define any libcall for float complex, so that cabs will be used. */
6609 if (complex_double_type_node
)
6610 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
), "cabs");
6612 abort_libfunc
= init_one_libfunc ("abort");
6613 memcpy_libfunc
= init_one_libfunc ("memcpy");
6614 memmove_libfunc
= init_one_libfunc ("memmove");
6615 memcmp_libfunc
= init_one_libfunc ("memcmp");
6616 memset_libfunc
= init_one_libfunc ("memset");
6617 setbits_libfunc
= init_one_libfunc ("__setbits");
6619 #ifndef DONT_USE_BUILTIN_SETJMP
6620 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6621 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6623 setjmp_libfunc
= init_one_libfunc ("setjmp");
6624 longjmp_libfunc
= init_one_libfunc ("longjmp");
6626 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6627 unwind_sjlj_unregister_libfunc
6628 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6630 /* For function entry/exit instrumentation. */
6631 profile_function_entry_libfunc
6632 = init_one_libfunc ("__cyg_profile_func_enter");
6633 profile_function_exit_libfunc
6634 = init_one_libfunc ("__cyg_profile_func_exit");
6636 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6638 /* Allow the target to add more libcalls or rename some, etc. */
6639 targetm
.init_libfuncs ();
6644 /* Print information about the current contents of the optabs on
6648 debug_optab_libfuncs (void)
6654 /* Dump the arithmetic optabs. */
6655 for (i
= 0; i
!= (int) OTI_MAX
; i
++)
6656 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6661 o
= &optab_table
[i
];
6662 l
= optab_libfunc (o
, (enum machine_mode
) j
);
6665 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6666 fprintf (stderr
, "%s\t%s:\t%s\n",
6667 GET_RTX_NAME (o
->code
),
6673 /* Dump the conversion optabs. */
6674 for (i
= 0; i
< (int) COI_MAX
; ++i
)
6675 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6676 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6681 o
= &convert_optab_table
[i
];
6682 l
= convert_optab_libfunc (o
, (enum machine_mode
) j
,
6683 (enum machine_mode
) k
);
6686 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6687 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6688 GET_RTX_NAME (o
->code
),
6697 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6698 CODE. Return 0 on failure. */
6701 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6703 enum machine_mode mode
= GET_MODE (op1
);
6704 enum insn_code icode
;
6708 if (mode
== VOIDmode
)
6711 icode
= optab_handler (ctrap_optab
, mode
)->insn_code
;
6712 if (icode
== CODE_FOR_nothing
)
6715 /* Some targets only accept a zero trap code. */
6716 if (insn_data
[icode
].operand
[3].predicate
6717 && !insn_data
[icode
].operand
[3].predicate (tcode
, VOIDmode
))
6720 do_pending_stack_adjust ();
6722 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6727 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6730 /* If that failed, then give up. */
6738 insn
= get_insns ();
6743 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6744 or unsigned operation code. */
6746 static enum rtx_code
6747 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6759 code
= unsignedp
? LTU
: LT
;
6762 code
= unsignedp
? LEU
: LE
;
6765 code
= unsignedp
? GTU
: GT
;
6768 code
= unsignedp
? GEU
: GE
;
6771 case UNORDERED_EXPR
:
6802 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6803 unsigned operators. Do not generate compare instruction. */
6806 vector_compare_rtx (tree cond
, bool unsignedp
, enum insn_code icode
)
6808 enum rtx_code rcode
;
6810 rtx rtx_op0
, rtx_op1
;
6812 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6813 ensures that condition is a relational operation. */
6814 gcc_assert (COMPARISON_CLASS_P (cond
));
6816 rcode
= get_rtx_code (TREE_CODE (cond
), unsignedp
);
6817 t_op0
= TREE_OPERAND (cond
, 0);
6818 t_op1
= TREE_OPERAND (cond
, 1);
6820 /* Expand operands. */
6821 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6823 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6826 if (!insn_data
[icode
].operand
[4].predicate (rtx_op0
, GET_MODE (rtx_op0
))
6827 && GET_MODE (rtx_op0
) != VOIDmode
)
6828 rtx_op0
= force_reg (GET_MODE (rtx_op0
), rtx_op0
);
6830 if (!insn_data
[icode
].operand
[5].predicate (rtx_op1
, GET_MODE (rtx_op1
))
6831 && GET_MODE (rtx_op1
) != VOIDmode
)
6832 rtx_op1
= force_reg (GET_MODE (rtx_op1
), rtx_op1
);
6834 return gen_rtx_fmt_ee (rcode
, VOIDmode
, rtx_op0
, rtx_op1
);
6837 /* Return insn code for VEC_COND_EXPR EXPR. */
6839 static inline enum insn_code
6840 get_vcond_icode (tree expr
, enum machine_mode mode
)
6842 enum insn_code icode
= CODE_FOR_nothing
;
6844 if (TYPE_UNSIGNED (TREE_TYPE (expr
)))
6845 icode
= vcondu_gen_code
[mode
];
6847 icode
= vcond_gen_code
[mode
];
6851 /* Return TRUE iff, appropriate vector insns are available
6852 for vector cond expr expr in VMODE mode. */
6855 expand_vec_cond_expr_p (tree expr
, enum machine_mode vmode
)
6857 if (get_vcond_icode (expr
, vmode
) == CODE_FOR_nothing
)
6862 /* Generate insns for VEC_COND_EXPR. */
6865 expand_vec_cond_expr (tree vec_cond_expr
, rtx target
)
6867 enum insn_code icode
;
6868 rtx comparison
, rtx_op1
, rtx_op2
, cc_op0
, cc_op1
;
6869 enum machine_mode mode
= TYPE_MODE (TREE_TYPE (vec_cond_expr
));
6870 bool unsignedp
= TYPE_UNSIGNED (TREE_TYPE (vec_cond_expr
));
6872 icode
= get_vcond_icode (vec_cond_expr
, mode
);
6873 if (icode
== CODE_FOR_nothing
)
6876 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
6877 target
= gen_reg_rtx (mode
);
6879 /* Get comparison rtx. First expand both cond expr operands. */
6880 comparison
= vector_compare_rtx (TREE_OPERAND (vec_cond_expr
, 0),
6882 cc_op0
= XEXP (comparison
, 0);
6883 cc_op1
= XEXP (comparison
, 1);
6884 /* Expand both operands and force them in reg, if required. */
6885 rtx_op1
= expand_normal (TREE_OPERAND (vec_cond_expr
, 1));
6886 if (!insn_data
[icode
].operand
[1].predicate (rtx_op1
, mode
)
6887 && mode
!= VOIDmode
)
6888 rtx_op1
= force_reg (mode
, rtx_op1
);
6890 rtx_op2
= expand_normal (TREE_OPERAND (vec_cond_expr
, 2));
6891 if (!insn_data
[icode
].operand
[2].predicate (rtx_op2
, mode
)
6892 && mode
!= VOIDmode
)
6893 rtx_op2
= force_reg (mode
, rtx_op2
);
6895 /* Emit instruction! */
6896 emit_insn (GEN_FCN (icode
) (target
, rtx_op1
, rtx_op2
,
6897 comparison
, cc_op0
, cc_op1
));
6903 /* This is an internal subroutine of the other compare_and_swap expanders.
6904 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
6905 operation. TARGET is an optional place to store the value result of
6906 the operation. ICODE is the particular instruction to expand. Return
6907 the result of the operation. */
6910 expand_val_compare_and_swap_1 (rtx mem
, rtx old_val
, rtx new_val
,
6911 rtx target
, enum insn_code icode
)
6913 enum machine_mode mode
= GET_MODE (mem
);
6916 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
6917 target
= gen_reg_rtx (mode
);
6919 if (GET_MODE (old_val
) != VOIDmode
&& GET_MODE (old_val
) != mode
)
6920 old_val
= convert_modes (mode
, GET_MODE (old_val
), old_val
, 1);
6921 if (!insn_data
[icode
].operand
[2].predicate (old_val
, mode
))
6922 old_val
= force_reg (mode
, old_val
);
6924 if (GET_MODE (new_val
) != VOIDmode
&& GET_MODE (new_val
) != mode
)
6925 new_val
= convert_modes (mode
, GET_MODE (new_val
), new_val
, 1);
6926 if (!insn_data
[icode
].operand
[3].predicate (new_val
, mode
))
6927 new_val
= force_reg (mode
, new_val
);
6929 insn
= GEN_FCN (icode
) (target
, mem
, old_val
, new_val
);
6930 if (insn
== NULL_RTX
)
6937 /* Expand a compare-and-swap operation and return its value. */
6940 expand_val_compare_and_swap (rtx mem
, rtx old_val
, rtx new_val
, rtx target
)
6942 enum machine_mode mode
= GET_MODE (mem
);
6943 enum insn_code icode
= sync_compare_and_swap
[mode
];
6945 if (icode
== CODE_FOR_nothing
)
6948 return expand_val_compare_and_swap_1 (mem
, old_val
, new_val
, target
, icode
);
6951 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
6955 find_cc_set (rtx x
, const_rtx pat
, void *data
)
6957 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
6958 && GET_CODE (pat
) == SET
)
6960 rtx
*p_cc_reg
= (rtx
*) data
;
6961 gcc_assert (!*p_cc_reg
);
6966 /* Expand a compare-and-swap operation and store true into the result if
6967 the operation was successful and false otherwise. Return the result.
6968 Unlike other routines, TARGET is not optional. */
6971 expand_bool_compare_and_swap (rtx mem
, rtx old_val
, rtx new_val
, rtx target
)
6973 enum machine_mode mode
= GET_MODE (mem
);
6974 enum insn_code icode
;
6975 rtx subtarget
, seq
, cc_reg
;
6977 /* If the target supports a compare-and-swap pattern that simultaneously
6978 sets some flag for success, then use it. Otherwise use the regular
6979 compare-and-swap and follow that immediately with a compare insn. */
6980 icode
= sync_compare_and_swap
[mode
];
6981 if (icode
== CODE_FOR_nothing
)
6987 subtarget
= expand_val_compare_and_swap_1 (mem
, old_val
, new_val
,
6990 if (subtarget
== NULL_RTX
)
6996 if (have_insn_for (COMPARE
, CCmode
))
6997 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7001 /* We might be comparing against an old value. Try again. :-( */
7002 if (!cc_reg
&& MEM_P (old_val
))
7005 old_val
= force_reg (mode
, old_val
);
7012 return emit_store_flag_force (target
, EQ
, cc_reg
, const0_rtx
, VOIDmode
, 0, 1);
7014 return emit_store_flag_force (target
, EQ
, subtarget
, old_val
, VOIDmode
, 1, 1);
7017 /* This is a helper function for the other atomic operations. This function
7018 emits a loop that contains SEQ that iterates until a compare-and-swap
7019 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7020 a set of instructions that takes a value from OLD_REG as an input and
7021 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7022 set to the current contents of MEM. After SEQ, a compare-and-swap will
7023 attempt to update MEM with NEW_REG. The function returns true when the
7024 loop was generated successfully. */
7027 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
7029 enum machine_mode mode
= GET_MODE (mem
);
7030 enum insn_code icode
;
7031 rtx label
, cmp_reg
, subtarget
, cc_reg
;
7033 /* The loop we want to generate looks like
7039 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
7040 if (cmp_reg != old_reg)
7043 Note that we only do the plain load from memory once. Subsequent
7044 iterations use the value loaded by the compare-and-swap pattern. */
7046 label
= gen_label_rtx ();
7047 cmp_reg
= gen_reg_rtx (mode
);
7049 emit_move_insn (cmp_reg
, mem
);
7051 emit_move_insn (old_reg
, cmp_reg
);
7055 /* If the target supports a compare-and-swap pattern that simultaneously
7056 sets some flag for success, then use it. Otherwise use the regular
7057 compare-and-swap and follow that immediately with a compare insn. */
7058 icode
= sync_compare_and_swap
[mode
];
7059 if (icode
== CODE_FOR_nothing
)
7062 subtarget
= expand_val_compare_and_swap_1 (mem
, old_reg
, new_reg
,
7064 if (subtarget
== NULL_RTX
)
7068 if (have_insn_for (COMPARE
, CCmode
))
7069 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7073 old_reg
= const0_rtx
;
7077 if (subtarget
!= cmp_reg
)
7078 emit_move_insn (cmp_reg
, subtarget
);
7081 /* ??? Mark this jump predicted not taken? */
7082 emit_cmp_and_jump_insns (cmp_reg
, old_reg
, NE
, const0_rtx
, GET_MODE (cmp_reg
), 1,
7087 /* This function generates the atomic operation MEM CODE= VAL. In this
7088 case, we do not care about any resulting value. Returns NULL if we
7089 cannot generate the operation. */
7092 expand_sync_operation (rtx mem
, rtx val
, enum rtx_code code
)
7094 enum machine_mode mode
= GET_MODE (mem
);
7095 enum insn_code icode
;
7098 /* Look to see if the target supports the operation directly. */
7102 icode
= sync_add_optab
[mode
];
7105 icode
= sync_ior_optab
[mode
];
7108 icode
= sync_xor_optab
[mode
];
7111 icode
= sync_and_optab
[mode
];
7114 icode
= sync_nand_optab
[mode
];
7118 icode
= sync_sub_optab
[mode
];
7119 if (icode
== CODE_FOR_nothing
|| CONST_INT_P (val
))
7121 icode
= sync_add_optab
[mode
];
7122 if (icode
!= CODE_FOR_nothing
)
7124 val
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, 1);
7134 /* Generate the direct operation, if present. */
7135 if (icode
!= CODE_FOR_nothing
)
7137 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7138 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7139 if (!insn_data
[icode
].operand
[1].predicate (val
, mode
))
7140 val
= force_reg (mode
, val
);
7142 insn
= GEN_FCN (icode
) (mem
, val
);
7150 /* Failing that, generate a compare-and-swap loop in which we perform the
7151 operation with normal arithmetic instructions. */
7152 if (sync_compare_and_swap
[mode
] != CODE_FOR_nothing
)
7154 rtx t0
= gen_reg_rtx (mode
), t1
;
7161 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
7162 true, OPTAB_LIB_WIDEN
);
7163 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
7166 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
,
7167 true, OPTAB_LIB_WIDEN
);
7168 insn
= get_insns ();
7171 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
7178 /* This function generates the atomic operation MEM CODE= VAL. In this
7179 case, we do care about the resulting value: if AFTER is true then
7180 return the value MEM holds after the operation, if AFTER is false
7181 then return the value MEM holds before the operation. TARGET is an
7182 optional place for the result value to be stored. */
7185 expand_sync_fetch_operation (rtx mem
, rtx val
, enum rtx_code code
,
7186 bool after
, rtx target
)
7188 enum machine_mode mode
= GET_MODE (mem
);
7189 enum insn_code old_code
, new_code
, icode
;
7193 /* Look to see if the target supports the operation directly. */
7197 old_code
= sync_old_add_optab
[mode
];
7198 new_code
= sync_new_add_optab
[mode
];
7201 old_code
= sync_old_ior_optab
[mode
];
7202 new_code
= sync_new_ior_optab
[mode
];
7205 old_code
= sync_old_xor_optab
[mode
];
7206 new_code
= sync_new_xor_optab
[mode
];
7209 old_code
= sync_old_and_optab
[mode
];
7210 new_code
= sync_new_and_optab
[mode
];
7213 old_code
= sync_old_nand_optab
[mode
];
7214 new_code
= sync_new_nand_optab
[mode
];
7218 old_code
= sync_old_sub_optab
[mode
];
7219 new_code
= sync_new_sub_optab
[mode
];
7220 if ((old_code
== CODE_FOR_nothing
&& new_code
== CODE_FOR_nothing
)
7221 || CONST_INT_P (val
))
7223 old_code
= sync_old_add_optab
[mode
];
7224 new_code
= sync_new_add_optab
[mode
];
7225 if (old_code
!= CODE_FOR_nothing
|| new_code
!= CODE_FOR_nothing
)
7227 val
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, 1);
7237 /* If the target does supports the proper new/old operation, great. But
7238 if we only support the opposite old/new operation, check to see if we
7239 can compensate. In the case in which the old value is supported, then
7240 we can always perform the operation again with normal arithmetic. In
7241 the case in which the new value is supported, then we can only handle
7242 this in the case the operation is reversible. */
7247 if (icode
== CODE_FOR_nothing
)
7250 if (icode
!= CODE_FOR_nothing
)
7257 if (icode
== CODE_FOR_nothing
7258 && (code
== PLUS
|| code
== MINUS
|| code
== XOR
))
7261 if (icode
!= CODE_FOR_nothing
)
7266 /* If we found something supported, great. */
7267 if (icode
!= CODE_FOR_nothing
)
7269 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
7270 target
= gen_reg_rtx (mode
);
7272 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7273 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7274 if (!insn_data
[icode
].operand
[2].predicate (val
, mode
))
7275 val
= force_reg (mode
, val
);
7277 insn
= GEN_FCN (icode
) (target
, mem
, val
);
7282 /* If we need to compensate for using an operation with the
7283 wrong return value, do so now. */
7290 else if (code
== MINUS
)
7296 target
= expand_simple_binop (mode
, AND
, target
, val
,
7299 target
= expand_simple_unop (mode
, code
, target
,
7303 target
= expand_simple_binop (mode
, code
, target
, val
,
7312 /* Failing that, generate a compare-and-swap loop in which we perform the
7313 operation with normal arithmetic instructions. */
7314 if (sync_compare_and_swap
[mode
] != CODE_FOR_nothing
)
7316 rtx t0
= gen_reg_rtx (mode
), t1
;
7318 if (!target
|| !register_operand (target
, mode
))
7319 target
= gen_reg_rtx (mode
);
7324 emit_move_insn (target
, t0
);
7328 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
7329 true, OPTAB_LIB_WIDEN
);
7330 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
7333 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
,
7334 true, OPTAB_LIB_WIDEN
);
7336 emit_move_insn (target
, t1
);
7338 insn
= get_insns ();
7341 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
7348 /* This function expands a test-and-set operation. Ideally we atomically
7349 store VAL in MEM and return the previous value in MEM. Some targets
7350 may not support this operation and only support VAL with the constant 1;
7351 in this case while the return value will be 0/1, but the exact value
7352 stored in MEM is target defined. TARGET is an option place to stick
7353 the return value. */
7356 expand_sync_lock_test_and_set (rtx mem
, rtx val
, rtx target
)
7358 enum machine_mode mode
= GET_MODE (mem
);
7359 enum insn_code icode
;
7362 /* If the target supports the test-and-set directly, great. */
7363 icode
= sync_lock_test_and_set
[mode
];
7364 if (icode
!= CODE_FOR_nothing
)
7366 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
7367 target
= gen_reg_rtx (mode
);
7369 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7370 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7371 if (!insn_data
[icode
].operand
[2].predicate (val
, mode
))
7372 val
= force_reg (mode
, val
);
7374 insn
= GEN_FCN (icode
) (target
, mem
, val
);
7382 /* Otherwise, use a compare-and-swap loop for the exchange. */
7383 if (sync_compare_and_swap
[mode
] != CODE_FOR_nothing
)
7385 if (!target
|| !register_operand (target
, mode
))
7386 target
= gen_reg_rtx (mode
);
7387 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7388 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7389 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7396 #include "gt-optabs.h"