1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 #ifdef DBX_DEBUGGING_INFO
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
111 #define HAVE_READONLY_DATA_SECTION 0
114 /* Last insn processed by final_scan_insn. */
115 static rtx debug_insn
;
116 rtx current_output_insn
;
118 /* Line number of last NOTE. */
119 static int last_linenum
;
121 /* Highest line number in current block. */
122 static int high_block_linenum
;
124 /* Likewise for function. */
125 static int high_function_linenum
;
127 /* Filename of last NOTE. */
128 static const char *last_filename
;
130 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
132 /* Nonzero while outputting an `asm' with operands.
133 This means that inconsistencies are the user's fault, so don't abort.
134 The precise value is the insn being output, to pass to error_for_asm. */
135 rtx this_is_asm_operands
;
137 /* Number of operands of this insn, for an `asm' with operands. */
138 static unsigned int insn_noperands
;
140 /* Compare optimization flag. */
142 static rtx last_ignored_compare
= 0;
144 /* Assign a unique number to each insn that is output.
145 This can be used to generate unique local labels. */
147 static int insn_counter
= 0;
150 /* This variable contains machine-dependent flags (defined in tm.h)
151 set and examined by output routines
152 that describe how to interpret the condition codes properly. */
156 /* During output of an insn, this contains a copy of cc_status
157 from before the insn. */
159 CC_STATUS cc_prev_status
;
162 /* Indexed by hardware reg number, is 1 if that register is ever
163 used in the current function.
165 In life_analysis, or in stupid_life_analysis, this is set
166 up to record the hard regs used explicitly. Reload adds
167 in the hard regs used for holding pseudo regs. Final uses
168 it to generate the code in the function prologue and epilogue
169 to save and restore registers as needed. */
171 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
173 /* Nonzero means current function must be given a frame pointer.
174 Set in stmt.c if anything is allocated on the stack there.
175 Set in reload1.c if anything is allocated on the stack there. */
177 int frame_pointer_needed
;
179 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
181 static int block_depth
;
183 /* Nonzero if have enabled APP processing of our assembler output. */
187 /* If we are outputting an insn sequence, this contains the sequence rtx.
192 #ifdef ASSEMBLER_DIALECT
194 /* Number of the assembler dialect to use, starting at 0. */
195 static int dialect_number
;
198 /* Indexed by line number, nonzero if there is a note for that line. */
200 static char *line_note_exists
;
202 #ifdef HAVE_conditional_execution
203 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
204 rtx current_insn_predicate
;
207 #ifdef HAVE_ATTR_length
208 static int asm_insn_count (rtx
);
210 static void profile_function (FILE *);
211 static void profile_after_prologue (FILE *);
212 static bool notice_source_line (rtx
);
213 static rtx
walk_alter_subreg (rtx
*);
214 static void output_asm_name (void);
215 static void output_alternate_entry_point (FILE *, rtx
);
216 static tree
get_mem_expr_from_op (rtx
, int *);
217 static void output_asm_operand_names (rtx
*, int *, int);
218 static void output_operand (rtx
, int);
219 #ifdef LEAF_REGISTERS
220 static void leaf_renumber_regs (rtx
);
223 static int alter_cond (rtx
);
225 #ifndef ADDR_VEC_ALIGN
226 static int final_addr_vec_align (rtx
);
228 #ifdef HAVE_ATTR_length
229 static int align_fuzz (rtx
, rtx
, int, unsigned);
232 /* Initialize data in final at the beginning of a compilation. */
235 init_final (const char *filename ATTRIBUTE_UNUSED
)
240 #ifdef ASSEMBLER_DIALECT
241 dialect_number
= ASSEMBLER_DIALECT
;
245 /* Default target function prologue and epilogue assembler output.
247 If not overridden for epilogue code, then the function body itself
248 contains return instructions wherever needed. */
250 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
251 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
255 /* Default target hook that outputs nothing to a stream. */
257 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
261 /* Enable APP processing of subsequent output.
262 Used before the output from an `asm' statement. */
269 fputs (ASM_APP_ON
, asm_out_file
);
274 /* Disable APP processing of subsequent output.
275 Called from varasm.c before most kinds of output. */
282 fputs (ASM_APP_OFF
, asm_out_file
);
287 /* Return the number of slots filled in the current
288 delayed branch sequence (we don't count the insn needing the
289 delay slot). Zero if not in a delayed branch sequence. */
293 dbr_sequence_length (void)
295 if (final_sequence
!= 0)
296 return XVECLEN (final_sequence
, 0) - 1;
302 /* The next two pages contain routines used to compute the length of an insn
303 and to shorten branches. */
305 /* Arrays for insn lengths, and addresses. The latter is referenced by
306 `insn_current_length'. */
308 static int *insn_lengths
;
310 varray_type insn_addresses_
;
312 /* Max uid for which the above arrays are valid. */
313 static int insn_lengths_max_uid
;
315 /* Address of insn being processed. Used by `insn_current_length'. */
316 int insn_current_address
;
318 /* Address of insn being processed in previous iteration. */
319 int insn_last_address
;
321 /* known invariant alignment of insn being processed. */
322 int insn_current_align
;
324 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
325 gives the next following alignment insn that increases the known
326 alignment, or NULL_RTX if there is no such insn.
327 For any alignment obtained this way, we can again index uid_align with
328 its uid to obtain the next following align that in turn increases the
329 alignment, till we reach NULL_RTX; the sequence obtained this way
330 for each insn we'll call the alignment chain of this insn in the following
333 struct label_alignment
339 static rtx
*uid_align
;
340 static int *uid_shuid
;
341 static struct label_alignment
*label_align
;
343 /* Indicate that branch shortening hasn't yet been done. */
346 init_insn_lengths (void)
357 insn_lengths_max_uid
= 0;
359 #ifdef HAVE_ATTR_length
360 INSN_ADDRESSES_FREE ();
369 /* Obtain the current length of an insn. If branch shortening has been done,
370 get its actual length. Otherwise, get its maximum length. */
373 get_attr_length (rtx insn ATTRIBUTE_UNUSED
)
375 #ifdef HAVE_ATTR_length
380 if (insn_lengths_max_uid
> INSN_UID (insn
))
381 return insn_lengths
[INSN_UID (insn
)];
383 switch (GET_CODE (insn
))
391 length
= insn_default_length (insn
);
395 body
= PATTERN (insn
);
396 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
398 /* Alignment is machine-dependent and should be handled by
402 length
= insn_default_length (insn
);
406 body
= PATTERN (insn
);
407 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
410 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
411 length
= asm_insn_count (body
) * insn_default_length (insn
);
412 else if (GET_CODE (body
) == SEQUENCE
)
413 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
414 length
+= get_attr_length (XVECEXP (body
, 0, i
));
416 length
= insn_default_length (insn
);
423 #ifdef ADJUST_INSN_LENGTH
424 ADJUST_INSN_LENGTH (insn
, length
);
427 #else /* not HAVE_ATTR_length */
429 #endif /* not HAVE_ATTR_length */
432 /* Code to handle alignment inside shorten_branches. */
434 /* Here is an explanation how the algorithm in align_fuzz can give
437 Call a sequence of instructions beginning with alignment point X
438 and continuing until the next alignment point `block X'. When `X'
439 is used in an expression, it means the alignment value of the
442 Call the distance between the start of the first insn of block X, and
443 the end of the last insn of block X `IX', for the `inner size of X'.
444 This is clearly the sum of the instruction lengths.
446 Likewise with the next alignment-delimited block following X, which we
449 Call the distance between the start of the first insn of block X, and
450 the start of the first insn of block Y `OX', for the `outer size of X'.
452 The estimated padding is then OX - IX.
454 OX can be safely estimated as
459 OX = round_up(IX, X) + Y - X
461 Clearly est(IX) >= real(IX), because that only depends on the
462 instruction lengths, and those being overestimated is a given.
464 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
465 we needn't worry about that when thinking about OX.
467 When X >= Y, the alignment provided by Y adds no uncertainty factor
468 for branch ranges starting before X, so we can just round what we have.
469 But when X < Y, we don't know anything about the, so to speak,
470 `middle bits', so we have to assume the worst when aligning up from an
471 address mod X to one mod Y, which is Y - X. */
474 #define LABEL_ALIGN(LABEL) align_labels_log
477 #ifndef LABEL_ALIGN_MAX_SKIP
478 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
482 #define LOOP_ALIGN(LABEL) align_loops_log
485 #ifndef LOOP_ALIGN_MAX_SKIP
486 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
489 #ifndef LABEL_ALIGN_AFTER_BARRIER
490 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
493 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
494 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
498 #define JUMP_ALIGN(LABEL) align_jumps_log
501 #ifndef JUMP_ALIGN_MAX_SKIP
502 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
505 #ifndef ADDR_VEC_ALIGN
507 final_addr_vec_align (rtx addr_vec
)
509 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
511 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
512 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
513 return exact_log2 (align
);
517 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
520 #ifndef INSN_LENGTH_ALIGNMENT
521 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
524 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
526 static int min_labelno
, max_labelno
;
528 #define LABEL_TO_ALIGNMENT(LABEL) \
529 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
531 #define LABEL_TO_MAX_SKIP(LABEL) \
532 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
534 /* For the benefit of port specific code do this also as a function. */
537 label_to_alignment (rtx label
)
539 return LABEL_TO_ALIGNMENT (label
);
542 #ifdef HAVE_ATTR_length
543 /* The differences in addresses
544 between a branch and its target might grow or shrink depending on
545 the alignment the start insn of the range (the branch for a forward
546 branch or the label for a backward branch) starts out on; if these
547 differences are used naively, they can even oscillate infinitely.
548 We therefore want to compute a 'worst case' address difference that
549 is independent of the alignment the start insn of the range end
550 up on, and that is at least as large as the actual difference.
551 The function align_fuzz calculates the amount we have to add to the
552 naively computed difference, by traversing the part of the alignment
553 chain of the start insn of the range that is in front of the end insn
554 of the range, and considering for each alignment the maximum amount
555 that it might contribute to a size increase.
557 For casesi tables, we also want to know worst case minimum amounts of
558 address difference, in case a machine description wants to introduce
559 some common offset that is added to all offsets in a table.
560 For this purpose, align_fuzz with a growth argument of 0 computes the
561 appropriate adjustment. */
563 /* Compute the maximum delta by which the difference of the addresses of
564 START and END might grow / shrink due to a different address for start
565 which changes the size of alignment insns between START and END.
566 KNOWN_ALIGN_LOG is the alignment known for START.
567 GROWTH should be ~0 if the objective is to compute potential code size
568 increase, and 0 if the objective is to compute potential shrink.
569 The return value is undefined for any other value of GROWTH. */
572 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
574 int uid
= INSN_UID (start
);
576 int known_align
= 1 << known_align_log
;
577 int end_shuid
= INSN_SHUID (end
);
580 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
582 int align_addr
, new_align
;
584 uid
= INSN_UID (align_label
);
585 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
586 if (uid_shuid
[uid
] > end_shuid
)
588 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
589 new_align
= 1 << known_align_log
;
590 if (new_align
< known_align
)
592 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
593 known_align
= new_align
;
598 /* Compute a worst-case reference address of a branch so that it
599 can be safely used in the presence of aligned labels. Since the
600 size of the branch itself is unknown, the size of the branch is
601 not included in the range. I.e. for a forward branch, the reference
602 address is the end address of the branch as known from the previous
603 branch shortening pass, minus a value to account for possible size
604 increase due to alignment. For a backward branch, it is the start
605 address of the branch as known from the current pass, plus a value
606 to account for possible size increase due to alignment.
607 NB.: Therefore, the maximum offset allowed for backward branches needs
608 to exclude the branch size. */
611 insn_current_reference_address (rtx branch
)
616 if (! INSN_ADDRESSES_SET_P ())
619 seq
= NEXT_INSN (PREV_INSN (branch
));
620 seq_uid
= INSN_UID (seq
);
621 if (GET_CODE (branch
) != JUMP_INSN
)
622 /* This can happen for example on the PA; the objective is to know the
623 offset to address something in front of the start of the function.
624 Thus, we can treat it like a backward branch.
625 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
626 any alignment we'd encounter, so we skip the call to align_fuzz. */
627 return insn_current_address
;
628 dest
= JUMP_LABEL (branch
);
630 /* BRANCH has no proper alignment chain set, so use SEQ.
631 BRANCH also has no INSN_SHUID. */
632 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
634 /* Forward branch. */
635 return (insn_last_address
+ insn_lengths
[seq_uid
]
636 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
640 /* Backward branch. */
641 return (insn_current_address
642 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
645 #endif /* HAVE_ATTR_length */
648 compute_alignments (void)
650 int log
, max_skip
, max_log
;
659 max_labelno
= max_label_num ();
660 min_labelno
= get_first_label_num ();
661 label_align
= (struct label_alignment
*)
662 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
664 /* If not optimizing or optimizing for size, don't assign any alignments. */
665 if (! optimize
|| optimize_size
)
670 rtx label
= bb
->head
;
671 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
674 if (GET_CODE (label
) != CODE_LABEL
675 || probably_never_executed_bb_p (bb
))
677 max_log
= LABEL_ALIGN (label
);
678 max_skip
= LABEL_ALIGN_MAX_SKIP
;
680 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
682 if (e
->flags
& EDGE_FALLTHRU
)
683 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
685 branch_frequency
+= EDGE_FREQUENCY (e
);
688 /* There are two purposes to align block with no fallthru incoming edge:
689 1) to avoid fetch stalls when branch destination is near cache boundary
690 2) to improve cache efficiency in case the previous block is not executed
691 (so it does not need to be in the cache).
693 We to catch first case, we align frequently executed blocks.
694 To catch the second, we align blocks that are executed more frequently
695 than the predecessor and the predecessor is likely to not be executed
696 when function is called. */
699 && (branch_frequency
> BB_FREQ_MAX
/ 10
700 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
701 && (bb
->prev_bb
->frequency
702 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
704 log
= JUMP_ALIGN (label
);
708 max_skip
= JUMP_ALIGN_MAX_SKIP
;
711 /* In case block is frequent and reached mostly by non-fallthru edge,
712 align it. It is most likely a first block of loop. */
714 && maybe_hot_bb_p (bb
)
715 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
716 && branch_frequency
> fallthru_frequency
* 2)
718 log
= LOOP_ALIGN (label
);
722 max_skip
= LOOP_ALIGN_MAX_SKIP
;
725 LABEL_TO_ALIGNMENT (label
) = max_log
;
726 LABEL_TO_MAX_SKIP (label
) = max_skip
;
730 /* Make a pass over all insns and compute their actual lengths by shortening
731 any branches of variable length if possible. */
733 /* Give a default value for the lowest address in a function. */
735 #ifndef FIRST_INSN_ADDRESS
736 #define FIRST_INSN_ADDRESS 0
739 /* shorten_branches might be called multiple times: for example, the SH
740 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
741 In order to do this, it needs proper length information, which it obtains
742 by calling shorten_branches. This cannot be collapsed with
743 shorten_branches itself into a single pass unless we also want to integrate
744 reorg.c, since the branch splitting exposes new instructions with delay
748 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
755 #ifdef HAVE_ATTR_length
756 #define MAX_CODE_ALIGN 16
758 int something_changed
= 1;
759 char *varying_length
;
762 rtx align_tab
[MAX_CODE_ALIGN
];
766 /* Compute maximum UID and allocate label_align / uid_shuid. */
767 max_uid
= get_max_uid ();
769 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
771 if (max_labelno
!= max_label_num ())
773 int old
= max_labelno
;
777 max_labelno
= max_label_num ();
779 n_labels
= max_labelno
- min_labelno
+ 1;
780 n_old_labels
= old
- min_labelno
+ 1;
782 label_align
= (struct label_alignment
*) xrealloc
783 (label_align
, n_labels
* sizeof (struct label_alignment
));
785 /* Range of labels grows monotonically in the function. Abort here
786 means that the initialization of array got lost. */
787 if (n_old_labels
> n_labels
)
790 memset (label_align
+ n_old_labels
, 0,
791 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
794 /* Initialize label_align and set up uid_shuid to be strictly
795 monotonically rising with insn order. */
796 /* We use max_log here to keep track of the maximum alignment we want to
797 impose on the next CODE_LABEL (or the current one if we are processing
798 the CODE_LABEL itself). */
803 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
807 INSN_SHUID (insn
) = i
++;
810 /* reorg might make the first insn of a loop being run once only,
811 and delete the label in front of it. Then we want to apply
812 the loop alignment to the new label created by reorg, which
813 is separated by the former loop start insn from the
814 NOTE_INSN_LOOP_BEG. */
816 else if (GET_CODE (insn
) == CODE_LABEL
)
820 /* Merge in alignments computed by compute_alignments. */
821 log
= LABEL_TO_ALIGNMENT (insn
);
825 max_skip
= LABEL_TO_MAX_SKIP (insn
);
828 log
= LABEL_ALIGN (insn
);
832 max_skip
= LABEL_ALIGN_MAX_SKIP
;
834 next
= NEXT_INSN (insn
);
835 /* ADDR_VECs only take room if read-only data goes into the text
837 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
838 if (next
&& GET_CODE (next
) == JUMP_INSN
)
840 rtx nextbody
= PATTERN (next
);
841 if (GET_CODE (nextbody
) == ADDR_VEC
842 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
844 log
= ADDR_VEC_ALIGN (next
);
848 max_skip
= LABEL_ALIGN_MAX_SKIP
;
852 LABEL_TO_ALIGNMENT (insn
) = max_log
;
853 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
857 else if (GET_CODE (insn
) == BARRIER
)
861 for (label
= insn
; label
&& ! INSN_P (label
);
862 label
= NEXT_INSN (label
))
863 if (GET_CODE (label
) == CODE_LABEL
)
865 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
869 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
875 #ifdef HAVE_ATTR_length
877 /* Allocate the rest of the arrays. */
878 insn_lengths
= (int *) xmalloc (max_uid
* sizeof (*insn_lengths
));
879 insn_lengths_max_uid
= max_uid
;
880 /* Syntax errors can lead to labels being outside of the main insn stream.
881 Initialize insn_addresses, so that we get reproducible results. */
882 INSN_ADDRESSES_ALLOC (max_uid
);
884 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
886 /* Initialize uid_align. We scan instructions
887 from end to start, and keep in align_tab[n] the last seen insn
888 that does an alignment of at least n+1, i.e. the successor
889 in the alignment chain for an insn that does / has a known
891 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
893 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
894 align_tab
[i
] = NULL_RTX
;
895 seq
= get_last_insn ();
896 for (; seq
; seq
= PREV_INSN (seq
))
898 int uid
= INSN_UID (seq
);
900 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
901 uid_align
[uid
] = align_tab
[0];
904 /* Found an alignment label. */
905 uid_align
[uid
] = align_tab
[log
];
906 for (i
= log
- 1; i
>= 0; i
--)
910 #ifdef CASE_VECTOR_SHORTEN_MODE
913 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
916 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
917 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
920 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
922 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
923 int len
, i
, min
, max
, insn_shuid
;
925 addr_diff_vec_flags flags
;
927 if (GET_CODE (insn
) != JUMP_INSN
928 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
930 pat
= PATTERN (insn
);
931 len
= XVECLEN (pat
, 1);
934 min_align
= MAX_CODE_ALIGN
;
935 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
937 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
938 int shuid
= INSN_SHUID (lab
);
949 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
950 min_align
= LABEL_TO_ALIGNMENT (lab
);
952 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
953 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
954 insn_shuid
= INSN_SHUID (insn
);
955 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
956 flags
.min_align
= min_align
;
957 flags
.base_after_vec
= rel
> insn_shuid
;
958 flags
.min_after_vec
= min
> insn_shuid
;
959 flags
.max_after_vec
= max
> insn_shuid
;
960 flags
.min_after_base
= min
> rel
;
961 flags
.max_after_base
= max
> rel
;
962 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
965 #endif /* CASE_VECTOR_SHORTEN_MODE */
967 /* Compute initial lengths, addresses, and varying flags for each insn. */
968 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
970 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
972 uid
= INSN_UID (insn
);
974 insn_lengths
[uid
] = 0;
976 if (GET_CODE (insn
) == CODE_LABEL
)
978 int log
= LABEL_TO_ALIGNMENT (insn
);
981 int align
= 1 << log
;
982 int new_address
= (insn_current_address
+ align
- 1) & -align
;
983 insn_lengths
[uid
] = new_address
- insn_current_address
;
987 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
989 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
990 || GET_CODE (insn
) == CODE_LABEL
)
992 if (INSN_DELETED_P (insn
))
995 body
= PATTERN (insn
);
996 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
998 /* This only takes room if read-only data goes into the text
1000 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1001 insn_lengths
[uid
] = (XVECLEN (body
,
1002 GET_CODE (body
) == ADDR_DIFF_VEC
)
1003 * GET_MODE_SIZE (GET_MODE (body
)));
1004 /* Alignment is handled by ADDR_VEC_ALIGN. */
1006 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1007 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1008 else if (GET_CODE (body
) == SEQUENCE
)
1011 int const_delay_slots
;
1013 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1015 const_delay_slots
= 0;
1017 /* Inside a delay slot sequence, we do not do any branch shortening
1018 if the shortening could change the number of delay slots
1020 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1022 rtx inner_insn
= XVECEXP (body
, 0, i
);
1023 int inner_uid
= INSN_UID (inner_insn
);
1026 if (GET_CODE (body
) == ASM_INPUT
1027 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1028 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1029 * insn_default_length (inner_insn
));
1031 inner_length
= insn_default_length (inner_insn
);
1033 insn_lengths
[inner_uid
] = inner_length
;
1034 if (const_delay_slots
)
1036 if ((varying_length
[inner_uid
]
1037 = insn_variable_length_p (inner_insn
)) != 0)
1038 varying_length
[uid
] = 1;
1039 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1040 + insn_lengths
[uid
]);
1043 varying_length
[inner_uid
] = 0;
1044 insn_lengths
[uid
] += inner_length
;
1047 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1049 insn_lengths
[uid
] = insn_default_length (insn
);
1050 varying_length
[uid
] = insn_variable_length_p (insn
);
1053 /* If needed, do any adjustment. */
1054 #ifdef ADJUST_INSN_LENGTH
1055 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1056 if (insn_lengths
[uid
] < 0)
1057 fatal_insn ("negative insn length", insn
);
1061 /* Now loop over all the insns finding varying length insns. For each,
1062 get the current insn length. If it has changed, reflect the change.
1063 When nothing changes for a full pass, we are done. */
1065 while (something_changed
)
1067 something_changed
= 0;
1068 insn_current_align
= MAX_CODE_ALIGN
- 1;
1069 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1071 insn
= NEXT_INSN (insn
))
1074 #ifdef ADJUST_INSN_LENGTH
1079 uid
= INSN_UID (insn
);
1081 if (GET_CODE (insn
) == CODE_LABEL
)
1083 int log
= LABEL_TO_ALIGNMENT (insn
);
1084 if (log
> insn_current_align
)
1086 int align
= 1 << log
;
1087 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1088 insn_lengths
[uid
] = new_address
- insn_current_address
;
1089 insn_current_align
= log
;
1090 insn_current_address
= new_address
;
1093 insn_lengths
[uid
] = 0;
1094 INSN_ADDRESSES (uid
) = insn_current_address
;
1098 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1099 if (length_align
< insn_current_align
)
1100 insn_current_align
= length_align
;
1102 insn_last_address
= INSN_ADDRESSES (uid
);
1103 INSN_ADDRESSES (uid
) = insn_current_address
;
1105 #ifdef CASE_VECTOR_SHORTEN_MODE
1106 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1107 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1109 rtx body
= PATTERN (insn
);
1110 int old_length
= insn_lengths
[uid
];
1111 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1112 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1113 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1114 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1115 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1116 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1119 addr_diff_vec_flags flags
;
1121 /* Avoid automatic aggregate initialization. */
1122 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1124 /* Try to find a known alignment for rel_lab. */
1125 for (prev
= rel_lab
;
1127 && ! insn_lengths
[INSN_UID (prev
)]
1128 && ! (varying_length
[INSN_UID (prev
)] & 1);
1129 prev
= PREV_INSN (prev
))
1130 if (varying_length
[INSN_UID (prev
)] & 2)
1132 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1136 /* See the comment on addr_diff_vec_flags in rtl.h for the
1137 meaning of the flags values. base: REL_LAB vec: INSN */
1138 /* Anything after INSN has still addresses from the last
1139 pass; adjust these so that they reflect our current
1140 estimate for this pass. */
1141 if (flags
.base_after_vec
)
1142 rel_addr
+= insn_current_address
- insn_last_address
;
1143 if (flags
.min_after_vec
)
1144 min_addr
+= insn_current_address
- insn_last_address
;
1145 if (flags
.max_after_vec
)
1146 max_addr
+= insn_current_address
- insn_last_address
;
1147 /* We want to know the worst case, i.e. lowest possible value
1148 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1149 its offset is positive, and we have to be wary of code shrink;
1150 otherwise, it is negative, and we have to be vary of code
1152 if (flags
.min_after_base
)
1154 /* If INSN is between REL_LAB and MIN_LAB, the size
1155 changes we are about to make can change the alignment
1156 within the observed offset, therefore we have to break
1157 it up into two parts that are independent. */
1158 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1160 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1161 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1164 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1168 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1170 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1171 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1174 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1176 /* Likewise, determine the highest lowest possible value
1177 for the offset of MAX_LAB. */
1178 if (flags
.max_after_base
)
1180 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1182 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1183 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1186 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1190 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1192 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1193 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1196 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1198 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1199 max_addr
- rel_addr
,
1201 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1204 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1205 insn_current_address
+= insn_lengths
[uid
];
1206 if (insn_lengths
[uid
] != old_length
)
1207 something_changed
= 1;
1212 #endif /* CASE_VECTOR_SHORTEN_MODE */
1214 if (! (varying_length
[uid
]))
1216 if (GET_CODE (insn
) == INSN
1217 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1221 body
= PATTERN (insn
);
1222 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1224 rtx inner_insn
= XVECEXP (body
, 0, i
);
1225 int inner_uid
= INSN_UID (inner_insn
);
1227 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1229 insn_current_address
+= insn_lengths
[inner_uid
];
1233 insn_current_address
+= insn_lengths
[uid
];
1238 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1242 body
= PATTERN (insn
);
1244 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1246 rtx inner_insn
= XVECEXP (body
, 0, i
);
1247 int inner_uid
= INSN_UID (inner_insn
);
1250 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1252 /* insn_current_length returns 0 for insns with a
1253 non-varying length. */
1254 if (! varying_length
[inner_uid
])
1255 inner_length
= insn_lengths
[inner_uid
];
1257 inner_length
= insn_current_length (inner_insn
);
1259 if (inner_length
!= insn_lengths
[inner_uid
])
1261 insn_lengths
[inner_uid
] = inner_length
;
1262 something_changed
= 1;
1264 insn_current_address
+= insn_lengths
[inner_uid
];
1265 new_length
+= inner_length
;
1270 new_length
= insn_current_length (insn
);
1271 insn_current_address
+= new_length
;
1274 #ifdef ADJUST_INSN_LENGTH
1275 /* If needed, do any adjustment. */
1276 tmp_length
= new_length
;
1277 ADJUST_INSN_LENGTH (insn
, new_length
);
1278 insn_current_address
+= (new_length
- tmp_length
);
1281 if (new_length
!= insn_lengths
[uid
])
1283 insn_lengths
[uid
] = new_length
;
1284 something_changed
= 1;
1287 /* For a non-optimizing compile, do only a single pass. */
1292 free (varying_length
);
1294 #endif /* HAVE_ATTR_length */
1297 #ifdef HAVE_ATTR_length
1298 /* Given the body of an INSN known to be generated by an ASM statement, return
1299 the number of machine instructions likely to be generated for this insn.
1300 This is used to compute its length. */
1303 asm_insn_count (rtx body
)
1305 const char *template;
1308 if (GET_CODE (body
) == ASM_INPUT
)
1309 template = XSTR (body
, 0);
1311 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1313 for (; *template; template++)
1314 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1321 /* Output assembler code for the start of a function,
1322 and initialize some of the variables in this file
1323 for the new function. The label for the function and associated
1324 assembler pseudo-ops have already been output in `assemble_start_function'.
1326 FIRST is the first insn of the rtl for the function being compiled.
1327 FILE is the file to write assembler code to.
1328 OPTIMIZE is nonzero if we should eliminate redundant
1329 test and compare insns. */
1332 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1333 int optimize ATTRIBUTE_UNUSED
)
1337 this_is_asm_operands
= 0;
1339 #ifdef NON_SAVING_SETJMP
1340 /* A function that calls setjmp should save and restore all the
1341 call-saved registers on a system where longjmp clobbers them. */
1342 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1346 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1347 if (!call_used_regs
[i
])
1348 regs_ever_live
[i
] = 1;
1352 last_filename
= locator_file (prologue_locator
);
1353 last_linenum
= locator_line (prologue_locator
);
1355 high_block_linenum
= high_function_linenum
= last_linenum
;
1357 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1359 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1360 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1361 dwarf2out_begin_prologue (0, NULL
);
1364 #ifdef LEAF_REG_REMAP
1365 if (current_function_uses_only_leaf_regs
)
1366 leaf_renumber_regs (first
);
1369 /* The Sun386i and perhaps other machines don't work right
1370 if the profiling code comes after the prologue. */
1371 #ifdef PROFILE_BEFORE_PROLOGUE
1372 if (current_function_profile
)
1373 profile_function (file
);
1374 #endif /* PROFILE_BEFORE_PROLOGUE */
1376 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1377 if (dwarf2out_do_frame ())
1378 dwarf2out_frame_debug (NULL_RTX
);
1381 /* If debugging, assign block numbers to all of the blocks in this
1385 remove_unnecessary_notes ();
1386 reemit_insn_block_notes ();
1387 number_blocks (current_function_decl
);
1388 /* We never actually put out begin/end notes for the top-level
1389 block in the function. But, conceptually, that block is
1391 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1394 /* First output the function prologue: code to set up the stack frame. */
1395 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1397 /* If the machine represents the prologue as RTL, the profiling code must
1398 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1399 #ifdef HAVE_prologue
1400 if (! HAVE_prologue
)
1402 profile_after_prologue (file
);
1406 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1408 #ifndef PROFILE_BEFORE_PROLOGUE
1409 if (current_function_profile
)
1410 profile_function (file
);
1411 #endif /* not PROFILE_BEFORE_PROLOGUE */
1415 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1417 #ifndef NO_PROFILE_COUNTERS
1418 # define NO_PROFILE_COUNTERS 0
1420 #if defined(ASM_OUTPUT_REG_PUSH)
1421 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1422 int sval
= current_function_returns_struct
;
1424 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1425 int cxt
= current_function_needs_context
;
1427 #endif /* ASM_OUTPUT_REG_PUSH */
1429 if (! NO_PROFILE_COUNTERS
)
1431 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1433 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1434 (*targetm
.asm_out
.internal_label
) (file
, "LP", current_function_funcdef_no
);
1435 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1438 function_section (current_function_decl
);
1440 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1442 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1444 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1447 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1452 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1454 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1456 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1459 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1464 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1466 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1468 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1470 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1473 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1478 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1480 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1482 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1485 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1491 /* Output assembler code for the end of a function.
1492 For clarity, args are same as those of `final_start_function'
1493 even though not all of them are needed. */
1496 final_end_function (void)
1500 (*debug_hooks
->end_function
) (high_function_linenum
);
1502 /* Finally, output the function epilogue:
1503 code to restore the stack frame and return to the caller. */
1504 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1506 /* And debug output. */
1507 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1509 #if defined (DWARF2_UNWIND_INFO)
1510 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1511 && dwarf2out_do_frame ())
1512 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1516 /* Output assembler code for some insns: all or part of a function.
1517 For description of args, see `final_start_function', above.
1519 PRESCAN is 1 if we are not really outputting,
1520 just scanning as if we were outputting.
1521 Prescanning deletes and rearranges insns just like ordinary output.
1522 PRESCAN is -2 if we are outputting after having prescanned.
1523 In this case, don't try to delete or rearrange insns
1524 because that has already been done.
1525 Prescanning is done only on certain machines. */
1528 final (rtx first
, FILE *file
, int optimize
, int prescan
)
1534 last_ignored_compare
= 0;
1536 /* Make a map indicating which line numbers appear in this function.
1537 When producing SDB debugging info, delete troublesome line number
1538 notes from inlined functions in other files as well as duplicate
1539 line number notes. */
1540 #ifdef SDB_DEBUGGING_INFO
1541 if (write_symbols
== SDB_DEBUG
)
1544 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1545 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1547 if ((RTX_INTEGRATED_P (insn
)
1548 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1550 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1551 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1553 delete_insn (insn
); /* Use delete_note. */
1557 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1558 max_line
= NOTE_LINE_NUMBER (insn
);
1564 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1565 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1566 max_line
= NOTE_LINE_NUMBER (insn
);
1569 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1571 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1573 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1574 max_uid
= INSN_UID (insn
);
1575 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1576 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
1578 /* If CC tracking across branches is enabled, record the insn which
1579 jumps to each branch only reached from one place. */
1580 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
1582 rtx lab
= JUMP_LABEL (insn
);
1583 if (lab
&& LABEL_NUSES (lab
) == 1)
1585 LABEL_REFS (lab
) = insn
;
1595 /* Output the insns. */
1596 for (insn
= NEXT_INSN (first
); insn
;)
1598 #ifdef HAVE_ATTR_length
1599 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1601 /* This can be triggered by bugs elsewhere in the compiler if
1602 new insns are created after init_insn_lengths is called. */
1603 if (GET_CODE (insn
) == NOTE
)
1604 insn_current_address
= -1;
1609 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1610 #endif /* HAVE_ATTR_length */
1612 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
1615 free (line_note_exists
);
1616 line_note_exists
= NULL
;
1620 get_insn_template (int code
, rtx insn
)
1622 const void *output
= insn_data
[code
].output
;
1623 switch (insn_data
[code
].output_format
)
1625 case INSN_OUTPUT_FORMAT_SINGLE
:
1626 return (const char *) output
;
1627 case INSN_OUTPUT_FORMAT_MULTI
:
1628 return ((const char *const *) output
)[which_alternative
];
1629 case INSN_OUTPUT_FORMAT_FUNCTION
:
1632 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
1639 /* Emit the appropriate declaration for an alternate-entry-point
1640 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1641 LABEL_KIND != LABEL_NORMAL.
1643 The case fall-through in this function is intentional. */
1645 output_alternate_entry_point (FILE *file
, rtx insn
)
1647 const char *name
= LABEL_NAME (insn
);
1649 switch (LABEL_KIND (insn
))
1651 case LABEL_WEAK_ENTRY
:
1652 #ifdef ASM_WEAKEN_LABEL
1653 ASM_WEAKEN_LABEL (file
, name
);
1655 case LABEL_GLOBAL_ENTRY
:
1656 (*targetm
.asm_out
.globalize_label
) (file
, name
);
1657 case LABEL_STATIC_ENTRY
:
1658 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1659 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1661 ASM_OUTPUT_LABEL (file
, name
);
1670 /* The final scan for one insn, INSN.
1671 Args are same as in `final', except that INSN
1672 is the insn being scanned.
1673 Value returned is the next insn to be scanned.
1675 NOPEEPHOLES is the flag to disallow peephole processing (currently
1676 used for within delayed branch sequence output). */
1679 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1680 int prescan
, int nopeepholes ATTRIBUTE_UNUSED
)
1688 /* Ignore deleted insns. These can occur when we split insns (due to a
1689 template of "#") while not optimizing. */
1690 if (INSN_DELETED_P (insn
))
1691 return NEXT_INSN (insn
);
1693 switch (GET_CODE (insn
))
1699 switch (NOTE_LINE_NUMBER (insn
))
1701 case NOTE_INSN_DELETED
:
1702 case NOTE_INSN_LOOP_BEG
:
1703 case NOTE_INSN_LOOP_END
:
1704 case NOTE_INSN_LOOP_END_TOP_COND
:
1705 case NOTE_INSN_LOOP_CONT
:
1706 case NOTE_INSN_LOOP_VTOP
:
1707 case NOTE_INSN_FUNCTION_END
:
1708 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1709 case NOTE_INSN_EXPECTED_VALUE
:
1712 case NOTE_INSN_BASIC_BLOCK
:
1713 #ifdef IA64_UNWIND_INFO
1714 IA64_UNWIND_EMIT (asm_out_file
, insn
);
1717 fprintf (asm_out_file
, "\t%s basic block %d\n",
1718 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1721 case NOTE_INSN_EH_REGION_BEG
:
1722 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1723 NOTE_EH_HANDLER (insn
));
1726 case NOTE_INSN_EH_REGION_END
:
1727 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1728 NOTE_EH_HANDLER (insn
));
1731 case NOTE_INSN_PROLOGUE_END
:
1732 (*targetm
.asm_out
.function_end_prologue
) (file
);
1733 profile_after_prologue (file
);
1736 case NOTE_INSN_EPILOGUE_BEG
:
1737 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
1740 case NOTE_INSN_FUNCTION_BEG
:
1742 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1745 case NOTE_INSN_BLOCK_BEG
:
1746 if (debug_info_level
== DINFO_LEVEL_NORMAL
1747 || debug_info_level
== DINFO_LEVEL_VERBOSE
1748 || write_symbols
== DWARF_DEBUG
1749 || write_symbols
== DWARF2_DEBUG
1750 || write_symbols
== VMS_AND_DWARF2_DEBUG
1751 || write_symbols
== VMS_DEBUG
)
1753 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1757 high_block_linenum
= last_linenum
;
1759 /* Output debugging info about the symbol-block beginning. */
1760 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1762 /* Mark this block as output. */
1763 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1767 case NOTE_INSN_BLOCK_END
:
1768 if (debug_info_level
== DINFO_LEVEL_NORMAL
1769 || debug_info_level
== DINFO_LEVEL_VERBOSE
1770 || write_symbols
== DWARF_DEBUG
1771 || write_symbols
== DWARF2_DEBUG
1772 || write_symbols
== VMS_AND_DWARF2_DEBUG
1773 || write_symbols
== VMS_DEBUG
)
1775 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1779 /* End of a symbol-block. */
1781 if (block_depth
< 0)
1784 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1788 case NOTE_INSN_DELETED_LABEL
:
1789 /* Emit the label. We may have deleted the CODE_LABEL because
1790 the label could be proved to be unreachable, though still
1791 referenced (in the form of having its address taken. */
1792 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1799 if (NOTE_LINE_NUMBER (insn
) <= 0)
1806 #if defined (DWARF2_UNWIND_INFO)
1807 if (dwarf2out_do_frame ())
1808 dwarf2out_frame_debug (insn
);
1813 /* The target port might emit labels in the output function for
1814 some insn, e.g. sh.c output_branchy_insn. */
1815 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1817 int align
= LABEL_TO_ALIGNMENT (insn
);
1818 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1819 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1822 if (align
&& NEXT_INSN (insn
))
1824 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1825 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1827 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1828 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1830 ASM_OUTPUT_ALIGN (file
, align
);
1837 /* If this label is reached from only one place, set the condition
1838 codes from the instruction just before the branch. */
1840 /* Disabled because some insns set cc_status in the C output code
1841 and NOTICE_UPDATE_CC alone can set incorrect status. */
1842 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1844 rtx jump
= LABEL_REFS (insn
);
1845 rtx barrier
= prev_nonnote_insn (insn
);
1847 /* If the LABEL_REFS field of this label has been set to point
1848 at a branch, the predecessor of the branch is a regular
1849 insn, and that branch is the only way to reach this label,
1850 set the condition codes based on the branch and its
1852 if (barrier
&& GET_CODE (barrier
) == BARRIER
1853 && jump
&& GET_CODE (jump
) == JUMP_INSN
1854 && (prev
= prev_nonnote_insn (jump
))
1855 && GET_CODE (prev
) == INSN
)
1857 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1858 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1865 #ifdef FINAL_PRESCAN_LABEL
1866 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
1869 if (LABEL_NAME (insn
))
1870 (*debug_hooks
->label
) (insn
);
1874 fputs (ASM_APP_OFF
, file
);
1877 if (NEXT_INSN (insn
) != 0
1878 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
1880 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
1882 /* If this label is followed by a jump-table,
1883 make sure we put the label in the read-only section. Also
1884 possibly write the label and jump table together. */
1886 if (GET_CODE (nextbody
) == ADDR_VEC
1887 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1889 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1890 /* In this case, the case vector is being moved by the
1891 target, so don't output the label at all. Leave that
1892 to the back end macros. */
1894 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1898 readonly_data_section ();
1900 #ifdef ADDR_VEC_ALIGN
1901 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
1903 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1905 ASM_OUTPUT_ALIGN (file
, log_align
);
1908 function_section (current_function_decl
);
1910 #ifdef ASM_OUTPUT_CASE_LABEL
1911 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1914 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1920 if (LABEL_ALT_ENTRY_P (insn
))
1921 output_alternate_entry_point (file
, insn
);
1923 (*targetm
.asm_out
.internal_label
) (file
, "L", CODE_LABEL_NUMBER (insn
));
1928 rtx body
= PATTERN (insn
);
1929 int insn_code_number
;
1930 const char *template;
1933 /* An INSN, JUMP_INSN or CALL_INSN.
1934 First check for special kinds that recog doesn't recognize. */
1936 if (GET_CODE (body
) == USE
/* These are just declarations */
1937 || GET_CODE (body
) == CLOBBER
)
1941 /* If there is a REG_CC_SETTER note on this insn, it means that
1942 the setting of the condition code was done in the delay slot
1943 of the insn that branched here. So recover the cc status
1944 from the insn that set it. */
1946 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1949 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
1950 cc_prev_status
= cc_status
;
1954 /* Detect insns that are really jump-tables
1955 and output them as such. */
1957 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1959 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1968 fputs (ASM_APP_OFF
, file
);
1972 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1973 if (GET_CODE (body
) == ADDR_VEC
)
1975 #ifdef ASM_OUTPUT_ADDR_VEC
1976 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
1983 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
1984 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
1990 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
1991 for (idx
= 0; idx
< vlen
; idx
++)
1993 if (GET_CODE (body
) == ADDR_VEC
)
1995 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
1996 ASM_OUTPUT_ADDR_VEC_ELT
1997 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2004 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2005 ASM_OUTPUT_ADDR_DIFF_ELT
2008 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2009 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2015 #ifdef ASM_OUTPUT_CASE_END
2016 ASM_OUTPUT_CASE_END (file
,
2017 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2022 function_section (current_function_decl
);
2026 /* Output this line note if it is the first or the last line
2028 if (notice_source_line (insn
))
2030 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2033 if (GET_CODE (body
) == ASM_INPUT
)
2035 const char *string
= XSTR (body
, 0);
2037 /* There's no telling what that did to the condition codes. */
2046 fputs (ASM_APP_ON
, file
);
2049 fprintf (asm_out_file
, "\t%s\n", string
);
2054 /* Detect `asm' construct with operands. */
2055 if (asm_noperands (body
) >= 0)
2057 unsigned int noperands
= asm_noperands (body
);
2058 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2061 /* There's no telling what that did to the condition codes. */
2066 /* Get out the operand values. */
2067 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2068 /* Inhibit aborts on what would otherwise be compiler bugs. */
2069 insn_noperands
= noperands
;
2070 this_is_asm_operands
= insn
;
2072 /* Output the insn using them. */
2077 fputs (ASM_APP_ON
, file
);
2080 output_asm_insn (string
, ops
);
2083 this_is_asm_operands
= 0;
2087 if (prescan
<= 0 && app_on
)
2089 fputs (ASM_APP_OFF
, file
);
2093 if (GET_CODE (body
) == SEQUENCE
)
2095 /* A delayed-branch sequence */
2101 final_sequence
= body
;
2103 /* Record the delay slots' frame information before the branch.
2104 This is needed for delayed calls: see execute_cfa_program(). */
2105 #if defined (DWARF2_UNWIND_INFO)
2106 if (dwarf2out_do_frame ())
2107 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2108 dwarf2out_frame_debug (XVECEXP (body
, 0, i
));
2111 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2112 force the restoration of a comparison that was previously
2113 thought unnecessary. If that happens, cancel this sequence
2114 and cause that insn to be restored. */
2116 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2117 if (next
!= XVECEXP (body
, 0, 1))
2123 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2125 rtx insn
= XVECEXP (body
, 0, i
);
2126 rtx next
= NEXT_INSN (insn
);
2127 /* We loop in case any instruction in a delay slot gets
2130 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2131 while (insn
!= next
);
2133 #ifdef DBR_OUTPUT_SEQEND
2134 DBR_OUTPUT_SEQEND (file
);
2138 /* If the insn requiring the delay slot was a CALL_INSN, the
2139 insns in the delay slot are actually executed before the
2140 called function. Hence we don't preserve any CC-setting
2141 actions in these insns and the CC must be marked as being
2142 clobbered by the function. */
2143 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2150 /* We have a real machine instruction as rtl. */
2152 body
= PATTERN (insn
);
2155 set
= single_set (insn
);
2157 /* Check for redundant test and compare instructions
2158 (when the condition codes are already set up as desired).
2159 This is done only when optimizing; if not optimizing,
2160 it should be possible for the user to alter a variable
2161 with the debugger in between statements
2162 and the next statement should reexamine the variable
2163 to compute the condition codes. */
2168 rtx set
= single_set (insn
);
2172 && GET_CODE (SET_DEST (set
)) == CC0
2173 && insn
!= last_ignored_compare
)
2175 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2176 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2177 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2179 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2180 XEXP (SET_SRC (set
), 0)
2181 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2182 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2183 XEXP (SET_SRC (set
), 1)
2184 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2186 if ((cc_status
.value1
!= 0
2187 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2188 || (cc_status
.value2
!= 0
2189 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2191 /* Don't delete insn if it has an addressing side-effect. */
2192 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2193 /* or if anything in it is volatile. */
2194 && ! volatile_refs_p (PATTERN (insn
)))
2196 /* We don't really delete the insn; just ignore it. */
2197 last_ignored_compare
= insn
;
2206 /* Don't bother outputting obvious no-ops, even without -O.
2207 This optimization is fast and doesn't interfere with debugging.
2208 Don't do this if the insn is in a delay slot, since this
2209 will cause an improper number of delay insns to be written. */
2210 if (final_sequence
== 0
2212 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2213 && GET_CODE (SET_SRC (body
)) == REG
2214 && GET_CODE (SET_DEST (body
)) == REG
2215 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2220 /* If this is a conditional branch, maybe modify it
2221 if the cc's are in a nonstandard state
2222 so that it accomplishes the same thing that it would
2223 do straightforwardly if the cc's were set up normally. */
2225 if (cc_status
.flags
!= 0
2226 && GET_CODE (insn
) == JUMP_INSN
2227 && GET_CODE (body
) == SET
2228 && SET_DEST (body
) == pc_rtx
2229 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2230 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2231 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2232 /* This is done during prescan; it is not done again
2233 in final scan when prescan has been done. */
2236 /* This function may alter the contents of its argument
2237 and clear some of the cc_status.flags bits.
2238 It may also return 1 meaning condition now always true
2239 or -1 meaning condition now always false
2240 or 2 meaning condition nontrivial but altered. */
2241 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2242 /* If condition now has fixed value, replace the IF_THEN_ELSE
2243 with its then-operand or its else-operand. */
2245 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2247 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2249 /* The jump is now either unconditional or a no-op.
2250 If it has become a no-op, don't try to output it.
2251 (It would not be recognized.) */
2252 if (SET_SRC (body
) == pc_rtx
)
2257 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2258 /* Replace (set (pc) (return)) with (return). */
2259 PATTERN (insn
) = body
= SET_SRC (body
);
2261 /* Rerecognize the instruction if it has changed. */
2263 INSN_CODE (insn
) = -1;
2266 /* Make same adjustments to instructions that examine the
2267 condition codes without jumping and instructions that
2268 handle conditional moves (if this machine has either one). */
2270 if (cc_status
.flags
!= 0
2273 rtx cond_rtx
, then_rtx
, else_rtx
;
2275 if (GET_CODE (insn
) != JUMP_INSN
2276 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2278 cond_rtx
= XEXP (SET_SRC (set
), 0);
2279 then_rtx
= XEXP (SET_SRC (set
), 1);
2280 else_rtx
= XEXP (SET_SRC (set
), 2);
2284 cond_rtx
= SET_SRC (set
);
2285 then_rtx
= const_true_rtx
;
2286 else_rtx
= const0_rtx
;
2289 switch (GET_CODE (cond_rtx
))
2303 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2305 result
= alter_cond (cond_rtx
);
2307 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2308 else if (result
== -1)
2309 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2310 else if (result
== 2)
2311 INSN_CODE (insn
) = -1;
2312 if (SET_DEST (set
) == SET_SRC (set
))
2324 #ifdef HAVE_peephole
2325 /* Do machine-specific peephole optimizations if desired. */
2327 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2329 rtx next
= peephole (insn
);
2330 /* When peepholing, if there were notes within the peephole,
2331 emit them before the peephole. */
2332 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2334 rtx prev
= PREV_INSN (insn
);
2336 for (note
= NEXT_INSN (insn
); note
!= next
;
2337 note
= NEXT_INSN (note
))
2338 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2340 /* In case this is prescan, put the notes
2341 in proper position for later rescan. */
2342 note
= NEXT_INSN (insn
);
2343 PREV_INSN (note
) = prev
;
2344 NEXT_INSN (prev
) = note
;
2345 NEXT_INSN (PREV_INSN (next
)) = insn
;
2346 PREV_INSN (insn
) = PREV_INSN (next
);
2347 NEXT_INSN (insn
) = next
;
2348 PREV_INSN (next
) = insn
;
2351 /* PEEPHOLE might have changed this. */
2352 body
= PATTERN (insn
);
2356 /* Try to recognize the instruction.
2357 If successful, verify that the operands satisfy the
2358 constraints for the instruction. Crash if they don't,
2359 since `reload' should have changed them so that they do. */
2361 insn_code_number
= recog_memoized (insn
);
2362 cleanup_subreg_operands (insn
);
2364 /* Dump the insn in the assembly for debugging. */
2365 if (flag_dump_rtl_in_asm
)
2367 print_rtx_head
= ASM_COMMENT_START
;
2368 print_rtl_single (asm_out_file
, insn
);
2369 print_rtx_head
= "";
2372 if (! constrain_operands_cached (1))
2373 fatal_insn_not_found (insn
);
2375 /* Some target machines need to prescan each insn before
2378 #ifdef FINAL_PRESCAN_INSN
2379 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2382 #ifdef HAVE_conditional_execution
2383 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2384 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2386 current_insn_predicate
= NULL_RTX
;
2390 cc_prev_status
= cc_status
;
2392 /* Update `cc_status' for this instruction.
2393 The instruction's output routine may change it further.
2394 If the output routine for a jump insn needs to depend
2395 on the cc status, it should look at cc_prev_status. */
2397 NOTICE_UPDATE_CC (body
, insn
);
2400 current_output_insn
= debug_insn
= insn
;
2402 #if defined (DWARF2_UNWIND_INFO)
2403 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2404 dwarf2out_frame_debug (insn
);
2407 /* Find the proper template for this insn. */
2408 template = get_insn_template (insn_code_number
, insn
);
2410 /* If the C code returns 0, it means that it is a jump insn
2411 which follows a deleted test insn, and that test insn
2412 needs to be reinserted. */
2417 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2420 /* We have already processed the notes between the setter and
2421 the user. Make sure we don't process them again, this is
2422 particularly important if one of the notes is a block
2423 scope note or an EH note. */
2425 prev
!= last_ignored_compare
;
2426 prev
= PREV_INSN (prev
))
2428 if (GET_CODE (prev
) == NOTE
)
2429 delete_insn (prev
); /* Use delete_note. */
2435 /* If the template is the string "#", it means that this insn must
2437 if (template[0] == '#' && template[1] == '\0')
2439 rtx
new = try_split (body
, insn
, 0);
2441 /* If we didn't split the insn, go away. */
2442 if (new == insn
&& PATTERN (new) == body
)
2443 fatal_insn ("could not split insn", insn
);
2445 #ifdef HAVE_ATTR_length
2446 /* This instruction should have been split in shorten_branches,
2447 to ensure that we would have valid length info for the
2458 #ifdef IA64_UNWIND_INFO
2459 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2461 /* Output assembler code from the template. */
2463 output_asm_insn (template, recog_data
.operand
);
2465 /* If necessary, report the effect that the instruction has on
2466 the unwind info. We've already done this for delay slots
2467 and call instructions. */
2468 #if defined (DWARF2_UNWIND_INFO)
2469 if (GET_CODE (insn
) == INSN
2470 #if !defined (HAVE_prologue)
2471 && !ACCUMULATE_OUTGOING_ARGS
2473 && final_sequence
== 0
2474 && dwarf2out_do_frame ())
2475 dwarf2out_frame_debug (insn
);
2479 /* It's not at all clear why we did this and doing so used to
2480 interfere with tests that used REG_WAS_0 notes, which are
2481 now gone, so let's try with this out. */
2483 /* Mark this insn as having been output. */
2484 INSN_DELETED_P (insn
) = 1;
2487 /* Emit information for vtable gc. */
2488 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2490 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2491 INTVAL (XEXP (XEXP (note
, 0), 1)));
2493 current_output_insn
= debug_insn
= 0;
2496 return NEXT_INSN (insn
);
2499 /* Output debugging info to the assembler file FILE
2500 based on the NOTE-insn INSN, assumed to be a line number. */
2503 notice_source_line (rtx insn
)
2505 const char *filename
= insn_file (insn
);
2506 int linenum
= insn_line (insn
);
2508 if (filename
&& (filename
!= last_filename
|| last_linenum
!= linenum
))
2510 last_filename
= filename
;
2511 last_linenum
= linenum
;
2512 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2513 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2519 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2520 directly to the desired hard register. */
2523 cleanup_subreg_operands (rtx insn
)
2526 extract_insn_cached (insn
);
2527 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2529 /* The following test cannot use recog_data.operand when tesing
2530 for a SUBREG: the underlying object might have been changed
2531 already if we are inside a match_operator expression that
2532 matches the else clause. Instead we test the underlying
2533 expression directly. */
2534 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2535 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2536 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2537 || GET_CODE (recog_data
.operand
[i
]) == MULT
2538 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
2539 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2542 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2544 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2545 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2546 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2547 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2548 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
2549 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2553 /* If X is a SUBREG, replace it with a REG or a MEM,
2554 based on the thing it is a subreg of. */
2557 alter_subreg (rtx
*xp
)
2560 rtx y
= SUBREG_REG (x
);
2562 /* simplify_subreg does not remove subreg from volatile references.
2563 We are required to. */
2564 if (GET_CODE (y
) == MEM
)
2565 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2568 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2573 /* Simplify_subreg can't handle some REG cases, but we have to. */
2574 else if (GET_CODE (y
) == REG
)
2576 unsigned int regno
= subreg_hard_regno (x
, 1);
2577 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2586 /* Do alter_subreg on all the SUBREGs contained in X. */
2589 walk_alter_subreg (rtx
*xp
)
2592 switch (GET_CODE (x
))
2596 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2597 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2601 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2605 return alter_subreg (xp
);
2616 /* Given BODY, the body of a jump instruction, alter the jump condition
2617 as required by the bits that are set in cc_status.flags.
2618 Not all of the bits there can be handled at this level in all cases.
2620 The value is normally 0.
2621 1 means that the condition has become always true.
2622 -1 means that the condition has become always false.
2623 2 means that COND has been altered. */
2626 alter_cond (rtx cond
)
2630 if (cc_status
.flags
& CC_REVERSED
)
2633 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2636 if (cc_status
.flags
& CC_INVERTED
)
2639 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2642 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2643 switch (GET_CODE (cond
))
2648 /* Jump becomes unconditional. */
2654 /* Jump becomes no-op. */
2658 PUT_CODE (cond
, EQ
);
2663 PUT_CODE (cond
, NE
);
2671 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2672 switch (GET_CODE (cond
))
2676 /* Jump becomes unconditional. */
2681 /* Jump becomes no-op. */
2686 PUT_CODE (cond
, EQ
);
2692 PUT_CODE (cond
, NE
);
2700 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2701 switch (GET_CODE (cond
))
2704 /* Jump becomes unconditional. */
2708 PUT_CODE (cond
, EQ
);
2713 PUT_CODE (cond
, NE
);
2718 /* Jump becomes no-op. */
2725 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2726 switch (GET_CODE (cond
))
2732 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2737 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2742 if (cc_status
.flags
& CC_NOT_SIGNED
)
2743 /* The flags are valid if signed condition operators are converted
2745 switch (GET_CODE (cond
))
2748 PUT_CODE (cond
, LEU
);
2753 PUT_CODE (cond
, LTU
);
2758 PUT_CODE (cond
, GTU
);
2763 PUT_CODE (cond
, GEU
);
2775 /* Report inconsistency between the assembler template and the operands.
2776 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2779 output_operand_lossage (const char *msgid
, ...)
2783 const char *pfx_str
;
2786 va_start (ap
, msgid
);
2788 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
2789 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
2790 vasprintf (&new_message
, fmt_string
, ap
);
2792 if (this_is_asm_operands
)
2793 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2795 internal_error ("%s", new_message
);
2802 /* Output of assembler code from a template, and its subroutines. */
2804 /* Annotate the assembly with a comment describing the pattern and
2805 alternative used. */
2808 output_asm_name (void)
2812 int num
= INSN_CODE (debug_insn
);
2813 fprintf (asm_out_file
, "\t%s %d\t%s",
2814 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2815 insn_data
[num
].name
);
2816 if (insn_data
[num
].n_alternatives
> 1)
2817 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2818 #ifdef HAVE_ATTR_length
2819 fprintf (asm_out_file
, "\t[length = %d]",
2820 get_attr_length (debug_insn
));
2822 /* Clear this so only the first assembler insn
2823 of any rtl insn will get the special comment for -dp. */
2828 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2829 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2830 corresponds to the address of the object and 0 if to the object. */
2833 get_mem_expr_from_op (rtx op
, int *paddressp
)
2840 if (GET_CODE (op
) == REG
)
2841 return REG_EXPR (op
);
2842 else if (GET_CODE (op
) != MEM
)
2845 if (MEM_EXPR (op
) != 0)
2846 return MEM_EXPR (op
);
2848 /* Otherwise we have an address, so indicate it and look at the address. */
2852 /* First check if we have a decl for the address, then look at the right side
2853 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2854 But don't allow the address to itself be indirect. */
2855 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2857 else if (GET_CODE (op
) == PLUS
2858 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2861 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
2862 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
2865 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2866 return inner_addressp
? 0 : expr
;
2869 /* Output operand names for assembler instructions. OPERANDS is the
2870 operand vector, OPORDER is the order to write the operands, and NOPS
2871 is the number of operands to write. */
2874 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2879 for (i
= 0; i
< nops
; i
++)
2882 rtx op
= operands
[oporder
[i
]];
2883 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2885 fprintf (asm_out_file
, "%c%s",
2886 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2890 fprintf (asm_out_file
, "%s",
2891 addressp
? "*" : "");
2892 print_mem_expr (asm_out_file
, expr
);
2895 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2896 && ORIGINAL_REGNO (op
) != REGNO (op
))
2897 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2901 /* Output text from TEMPLATE to the assembler output file,
2902 obeying %-directions to substitute operands taken from
2903 the vector OPERANDS.
2905 %N (for N a digit) means print operand N in usual manner.
2906 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2907 and print the label name with no punctuation.
2908 %cN means require operand N to be a constant
2909 and print the constant expression with no punctuation.
2910 %aN means expect operand N to be a memory address
2911 (not a memory reference!) and print a reference
2913 %nN means expect operand N to be a constant
2914 and print a constant expression for minus the value
2915 of the operand, with no other punctuation. */
2918 output_asm_insn (const char *template, rtx
*operands
)
2922 #ifdef ASSEMBLER_DIALECT
2925 int oporder
[MAX_RECOG_OPERANDS
];
2926 char opoutput
[MAX_RECOG_OPERANDS
];
2929 /* An insn may return a null string template
2930 in a case where no assembler code is needed. */
2934 memset (opoutput
, 0, sizeof opoutput
);
2936 putc ('\t', asm_out_file
);
2938 #ifdef ASM_OUTPUT_OPCODE
2939 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2946 if (flag_verbose_asm
)
2947 output_asm_operand_names (operands
, oporder
, ops
);
2948 if (flag_print_asm_name
)
2952 memset (opoutput
, 0, sizeof opoutput
);
2954 putc (c
, asm_out_file
);
2955 #ifdef ASM_OUTPUT_OPCODE
2956 while ((c
= *p
) == '\t')
2958 putc (c
, asm_out_file
);
2961 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2965 #ifdef ASSEMBLER_DIALECT
2971 output_operand_lossage ("nested assembly dialect alternatives");
2975 /* If we want the first dialect, do nothing. Otherwise, skip
2976 DIALECT_NUMBER of strings ending with '|'. */
2977 for (i
= 0; i
< dialect_number
; i
++)
2979 while (*p
&& *p
!= '}' && *p
++ != '|')
2988 output_operand_lossage ("unterminated assembly dialect alternative");
2995 /* Skip to close brace. */
3000 output_operand_lossage ("unterminated assembly dialect alternative");
3004 while (*p
++ != '}');
3008 putc (c
, asm_out_file
);
3013 putc (c
, asm_out_file
);
3019 /* %% outputs a single %. */
3023 putc (c
, asm_out_file
);
3025 /* %= outputs a number which is unique to each insn in the entire
3026 compilation. This is useful for making local labels that are
3027 referred to more than once in a given insn. */
3031 fprintf (asm_out_file
, "%d", insn_counter
);
3033 /* % followed by a letter and some digits
3034 outputs an operand in a special way depending on the letter.
3035 Letters `acln' are implemented directly.
3036 Other letters are passed to `output_operand' so that
3037 the PRINT_OPERAND macro can define them. */
3038 else if (ISALPHA (*p
))
3044 output_operand_lossage ("operand number missing after %%-letter");
3045 else if (this_is_asm_operands
3046 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3047 output_operand_lossage ("operand number out of range");
3048 else if (letter
== 'l')
3049 output_asm_label (operands
[c
]);
3050 else if (letter
== 'a')
3051 output_address (operands
[c
]);
3052 else if (letter
== 'c')
3054 if (CONSTANT_ADDRESS_P (operands
[c
]))
3055 output_addr_const (asm_out_file
, operands
[c
]);
3057 output_operand (operands
[c
], 'c');
3059 else if (letter
== 'n')
3061 if (GET_CODE (operands
[c
]) == CONST_INT
)
3062 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3063 - INTVAL (operands
[c
]));
3066 putc ('-', asm_out_file
);
3067 output_addr_const (asm_out_file
, operands
[c
]);
3071 output_operand (operands
[c
], letter
);
3077 while (ISDIGIT (c
= *p
))
3080 /* % followed by a digit outputs an operand the default way. */
3081 else if (ISDIGIT (*p
))
3084 if (this_is_asm_operands
3085 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3086 output_operand_lossage ("operand number out of range");
3088 output_operand (operands
[c
], 0);
3094 while (ISDIGIT (c
= *p
))
3097 /* % followed by punctuation: output something for that
3098 punctuation character alone, with no operand.
3099 The PRINT_OPERAND macro decides what is actually done. */
3100 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3101 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3102 output_operand (NULL_RTX
, *p
++);
3105 output_operand_lossage ("invalid %%-code");
3109 putc (c
, asm_out_file
);
3112 /* Write out the variable names for operands, if we know them. */
3113 if (flag_verbose_asm
)
3114 output_asm_operand_names (operands
, oporder
, ops
);
3115 if (flag_print_asm_name
)
3118 putc ('\n', asm_out_file
);
3121 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3124 output_asm_label (rtx x
)
3128 if (GET_CODE (x
) == LABEL_REF
)
3130 if (GET_CODE (x
) == CODE_LABEL
3131 || (GET_CODE (x
) == NOTE
3132 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3133 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3135 output_operand_lossage ("`%%l' operand isn't a label");
3137 assemble_name (asm_out_file
, buf
);
3140 /* Print operand X using machine-dependent assembler syntax.
3141 The macro PRINT_OPERAND is defined just to control this function.
3142 CODE is a non-digit that preceded the operand-number in the % spec,
3143 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3144 between the % and the digits.
3145 When CODE is a non-letter, X is 0.
3147 The meanings of the letters are machine-dependent and controlled
3148 by PRINT_OPERAND. */
3151 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3153 if (x
&& GET_CODE (x
) == SUBREG
)
3154 x
= alter_subreg (&x
);
3156 /* If X is a pseudo-register, abort now rather than writing trash to the
3159 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3162 PRINT_OPERAND (asm_out_file
, x
, code
);
3165 /* Print a memory reference operand for address X
3166 using machine-dependent assembler syntax.
3167 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3170 output_address (rtx x
)
3172 walk_alter_subreg (&x
);
3173 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3176 /* Print an integer constant expression in assembler syntax.
3177 Addition and subtraction are the only arithmetic
3178 that may appear in these expressions. */
3181 output_addr_const (FILE *file
, rtx x
)
3186 switch (GET_CODE (x
))
3193 #ifdef ASM_OUTPUT_SYMBOL_REF
3194 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3196 assemble_name (file
, XSTR (x
, 0));
3204 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3205 #ifdef ASM_OUTPUT_LABEL_REF
3206 ASM_OUTPUT_LABEL_REF (file
, buf
);
3208 assemble_name (file
, buf
);
3213 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3217 /* This used to output parentheses around the expression,
3218 but that does not work on the 386 (either ATT or BSD assembler). */
3219 output_addr_const (file
, XEXP (x
, 0));
3223 if (GET_MODE (x
) == VOIDmode
)
3225 /* We can use %d if the number is one word and positive. */
3226 if (CONST_DOUBLE_HIGH (x
))
3227 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3228 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3229 else if (CONST_DOUBLE_LOW (x
) < 0)
3230 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3232 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3235 /* We can't handle floating point constants;
3236 PRINT_OPERAND must handle them. */
3237 output_operand_lossage ("floating constant misused");
3241 /* Some assemblers need integer constants to appear last (eg masm). */
3242 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3244 output_addr_const (file
, XEXP (x
, 1));
3245 if (INTVAL (XEXP (x
, 0)) >= 0)
3246 fprintf (file
, "+");
3247 output_addr_const (file
, XEXP (x
, 0));
3251 output_addr_const (file
, XEXP (x
, 0));
3252 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3253 || INTVAL (XEXP (x
, 1)) >= 0)
3254 fprintf (file
, "+");
3255 output_addr_const (file
, XEXP (x
, 1));
3260 /* Avoid outputting things like x-x or x+5-x,
3261 since some assemblers can't handle that. */
3262 x
= simplify_subtraction (x
);
3263 if (GET_CODE (x
) != MINUS
)
3266 output_addr_const (file
, XEXP (x
, 0));
3267 fprintf (file
, "-");
3268 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3269 || GET_CODE (XEXP (x
, 1)) == PC
3270 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3271 output_addr_const (file
, XEXP (x
, 1));
3274 fputs (targetm
.asm_out
.open_paren
, file
);
3275 output_addr_const (file
, XEXP (x
, 1));
3276 fputs (targetm
.asm_out
.close_paren
, file
);
3283 output_addr_const (file
, XEXP (x
, 0));
3287 #ifdef OUTPUT_ADDR_CONST_EXTRA
3288 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3293 output_operand_lossage ("invalid expression as operand");
3297 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3298 %R prints the value of REGISTER_PREFIX.
3299 %L prints the value of LOCAL_LABEL_PREFIX.
3300 %U prints the value of USER_LABEL_PREFIX.
3301 %I prints the value of IMMEDIATE_PREFIX.
3302 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3303 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3305 We handle alternate assembler dialects here, just like output_asm_insn. */
3308 asm_fprintf (FILE *file
, const char *p
, ...)
3314 va_start (argptr
, p
);
3321 #ifdef ASSEMBLER_DIALECT
3326 /* If we want the first dialect, do nothing. Otherwise, skip
3327 DIALECT_NUMBER of strings ending with '|'. */
3328 for (i
= 0; i
< dialect_number
; i
++)
3330 while (*p
&& *p
++ != '|')
3340 /* Skip to close brace. */
3341 while (*p
&& *p
++ != '}')
3352 while (strchr ("-+ #0", c
))
3357 while (ISDIGIT (c
) || c
== '.')
3368 case 'd': case 'i': case 'u':
3369 case 'x': case 'X': case 'o':
3373 fprintf (file
, buf
, va_arg (argptr
, int));
3377 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3378 'o' cases, but we do not check for those cases. It
3379 means that the value is a HOST_WIDE_INT, which may be
3380 either `long' or `long long'. */
3381 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3382 q
+= strlen (HOST_WIDE_INT_PRINT
);
3385 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3390 #ifdef HAVE_LONG_LONG
3396 fprintf (file
, buf
, va_arg (argptr
, long long));
3403 fprintf (file
, buf
, va_arg (argptr
, long));
3411 fprintf (file
, buf
, va_arg (argptr
, char *));
3415 #ifdef ASM_OUTPUT_OPCODE
3416 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3421 #ifdef REGISTER_PREFIX
3422 fprintf (file
, "%s", REGISTER_PREFIX
);
3427 #ifdef IMMEDIATE_PREFIX
3428 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3433 #ifdef LOCAL_LABEL_PREFIX
3434 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3439 fputs (user_label_prefix
, file
);
3442 #ifdef ASM_FPRINTF_EXTENSIONS
3443 /* Upper case letters are reserved for general use by asm_fprintf
3444 and so are not available to target specific code. In order to
3445 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3446 they are defined here. As they get turned into real extensions
3447 to asm_fprintf they should be removed from this list. */
3448 case 'A': case 'B': case 'C': case 'D': case 'E':
3449 case 'F': case 'G': case 'H': case 'J': case 'K':
3450 case 'M': case 'N': case 'P': case 'Q': case 'S':
3451 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3454 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3467 /* Split up a CONST_DOUBLE or integer constant rtx
3468 into two rtx's for single words,
3469 storing in *FIRST the word that comes first in memory in the target
3470 and in *SECOND the other. */
3473 split_double (rtx value
, rtx
*first
, rtx
*second
)
3475 if (GET_CODE (value
) == CONST_INT
)
3477 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3479 /* In this case the CONST_INT holds both target words.
3480 Extract the bits from it into two word-sized pieces.
3481 Sign extend each half to HOST_WIDE_INT. */
3482 unsigned HOST_WIDE_INT low
, high
;
3483 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3485 /* Set sign_bit to the most significant bit of a word. */
3487 sign_bit
<<= BITS_PER_WORD
- 1;
3489 /* Set mask so that all bits of the word are set. We could
3490 have used 1 << BITS_PER_WORD instead of basing the
3491 calculation on sign_bit. However, on machines where
3492 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3493 compiler warning, even though the code would never be
3495 mask
= sign_bit
<< 1;
3498 /* Set sign_extend as any remaining bits. */
3499 sign_extend
= ~mask
;
3501 /* Pick the lower word and sign-extend it. */
3502 low
= INTVAL (value
);
3507 /* Pick the higher word, shifted to the least significant
3508 bits, and sign-extend it. */
3509 high
= INTVAL (value
);
3510 high
>>= BITS_PER_WORD
- 1;
3513 if (high
& sign_bit
)
3514 high
|= sign_extend
;
3516 /* Store the words in the target machine order. */
3517 if (WORDS_BIG_ENDIAN
)
3519 *first
= GEN_INT (high
);
3520 *second
= GEN_INT (low
);
3524 *first
= GEN_INT (low
);
3525 *second
= GEN_INT (high
);
3530 /* The rule for using CONST_INT for a wider mode
3531 is that we regard the value as signed.
3532 So sign-extend it. */
3533 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3534 if (WORDS_BIG_ENDIAN
)
3546 else if (GET_CODE (value
) != CONST_DOUBLE
)
3548 if (WORDS_BIG_ENDIAN
)
3550 *first
= const0_rtx
;
3556 *second
= const0_rtx
;
3559 else if (GET_MODE (value
) == VOIDmode
3560 /* This is the old way we did CONST_DOUBLE integers. */
3561 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3563 /* In an integer, the words are defined as most and least significant.
3564 So order them by the target's convention. */
3565 if (WORDS_BIG_ENDIAN
)
3567 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3568 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3572 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3573 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3580 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3582 /* Note, this converts the REAL_VALUE_TYPE to the target's
3583 format, splits up the floating point double and outputs
3584 exactly 32 bits of it into each of l[0] and l[1] --
3585 not necessarily BITS_PER_WORD bits. */
3586 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3588 /* If 32 bits is an entire word for the target, but not for the host,
3589 then sign-extend on the host so that the number will look the same
3590 way on the host that it would on the target. See for instance
3591 simplify_unary_operation. The #if is needed to avoid compiler
3594 #if HOST_BITS_PER_LONG > 32
3595 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3597 if (l
[0] & ((long) 1 << 31))
3598 l
[0] |= ((long) (-1) << 32);
3599 if (l
[1] & ((long) 1 << 31))
3600 l
[1] |= ((long) (-1) << 32);
3604 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
3605 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
3609 /* Return nonzero if this function has no function calls. */
3612 leaf_function_p (void)
3617 if (current_function_profile
|| profile_arc_flag
)
3620 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3622 if (GET_CODE (insn
) == CALL_INSN
3623 && ! SIBLING_CALL_P (insn
))
3625 if (GET_CODE (insn
) == INSN
3626 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3627 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3628 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3631 for (link
= current_function_epilogue_delay_list
;
3633 link
= XEXP (link
, 1))
3635 insn
= XEXP (link
, 0);
3637 if (GET_CODE (insn
) == CALL_INSN
3638 && ! SIBLING_CALL_P (insn
))
3640 if (GET_CODE (insn
) == INSN
3641 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3642 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
3643 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3650 /* Return 1 if branch is a forward branch.
3651 Uses insn_shuid array, so it works only in the final pass. May be used by
3652 output templates to customary add branch prediction hints.
3655 final_forward_branch_p (rtx insn
)
3657 int insn_id
, label_id
;
3660 insn_id
= INSN_SHUID (insn
);
3661 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3662 /* We've hit some insns that does not have id information available. */
3663 if (!insn_id
|| !label_id
)
3665 return insn_id
< label_id
;
3668 /* On some machines, a function with no call insns
3669 can run faster if it doesn't create its own register window.
3670 When output, the leaf function should use only the "output"
3671 registers. Ordinarily, the function would be compiled to use
3672 the "input" registers to find its arguments; it is a candidate
3673 for leaf treatment if it uses only the "input" registers.
3674 Leaf function treatment means renumbering so the function
3675 uses the "output" registers instead. */
3677 #ifdef LEAF_REGISTERS
3679 /* Return 1 if this function uses only the registers that can be
3680 safely renumbered. */
3683 only_leaf_regs_used (void)
3686 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3688 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3689 if ((regs_ever_live
[i
] || global_regs
[i
])
3690 && ! permitted_reg_in_leaf_functions
[i
])
3693 if (current_function_uses_pic_offset_table
3694 && pic_offset_table_rtx
!= 0
3695 && GET_CODE (pic_offset_table_rtx
) == REG
3696 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3702 /* Scan all instructions and renumber all registers into those
3703 available in leaf functions. */
3706 leaf_renumber_regs (rtx first
)
3710 /* Renumber only the actual patterns.
3711 The reg-notes can contain frame pointer refs,
3712 and renumbering them could crash, and should not be needed. */
3713 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3715 leaf_renumber_regs_insn (PATTERN (insn
));
3716 for (insn
= current_function_epilogue_delay_list
;
3718 insn
= XEXP (insn
, 1))
3719 if (INSN_P (XEXP (insn
, 0)))
3720 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3723 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3724 available in leaf functions. */
3727 leaf_renumber_regs_insn (rtx in_rtx
)
3730 const char *format_ptr
;
3735 /* Renumber all input-registers into output-registers.
3736 renumbered_regs would be 1 for an output-register;
3739 if (GET_CODE (in_rtx
) == REG
)
3743 /* Don't renumber the same reg twice. */
3747 newreg
= REGNO (in_rtx
);
3748 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3749 to reach here as part of a REG_NOTE. */
3750 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3755 newreg
= LEAF_REG_REMAP (newreg
);
3758 regs_ever_live
[REGNO (in_rtx
)] = 0;
3759 regs_ever_live
[newreg
] = 1;
3760 REGNO (in_rtx
) = newreg
;
3764 if (INSN_P (in_rtx
))
3766 /* Inside a SEQUENCE, we find insns.
3767 Renumber just the patterns of these insns,
3768 just as we do for the top-level insns. */
3769 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3773 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3775 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3776 switch (*format_ptr
++)
3779 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3783 if (NULL
!= XVEC (in_rtx
, i
))
3785 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3786 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3806 /* When -gused is used, emit debug info for only used symbols. But in
3807 addition to the standard intercepted debug_hooks there are some direct
3808 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3809 Those routines may also be called from a higher level intercepted routine. So
3810 to prevent recording data for an inner call to one of these for an intercept,
3811 we maintain a intercept nesting counter (debug_nesting). We only save the
3812 intercepted arguments if the nesting is 1. */
3813 int debug_nesting
= 0;
3815 static tree
*symbol_queue
;
3816 int symbol_queue_index
= 0;
3817 static int symbol_queue_size
= 0;
3819 /* Generate the symbols for any queued up type symbols we encountered
3820 while generating the type info for some originally used symbol.
3821 This might generate additional entries in the queue. Only when
3822 the nesting depth goes to 0 is this routine called. */
3825 debug_flush_symbol_queue (void)
3829 /* Make sure that additionally queued items are not flushed
3834 for (i
= 0; i
< symbol_queue_index
; ++i
)
3836 /* If we pushed queued symbols then such symbols are must be
3837 output no matter what anyone else says. Specifically,
3838 we need to make sure dbxout_symbol() thinks the symbol was
3839 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3840 which may be set for outside reasons. */
3841 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3842 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3843 TREE_USED (symbol_queue
[i
]) = 1;
3844 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3846 #ifdef DBX_DEBUGGING_INFO
3847 dbxout_symbol (symbol_queue
[i
], 0);
3850 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3851 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3854 symbol_queue_index
= 0;
3858 /* Queue a type symbol needed as part of the definition of a decl
3859 symbol. These symbols are generated when debug_flush_symbol_queue()
3863 debug_queue_symbol (tree decl
)
3865 if (symbol_queue_index
>= symbol_queue_size
)
3867 symbol_queue_size
+= 10;
3868 symbol_queue
= (tree
*) xrealloc (symbol_queue
,
3869 symbol_queue_size
* sizeof (tree
));
3872 symbol_queue
[symbol_queue_index
++] = decl
;
3875 /* Free symbol queue. */
3877 debug_free_queue (void)
3881 free (symbol_queue
);
3882 symbol_queue
= NULL
;
3883 symbol_queue_size
= 0;