1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
32 #include "insn-config.h"
36 #include "diagnostic-core.h"
44 #include "rtlhooks-def.h"
45 #include "tree-pass.h"
49 /* The basic idea of common subexpression elimination is to go
50 through the code, keeping a record of expressions that would
51 have the same value at the current scan point, and replacing
52 expressions encountered with the cheapest equivalent expression.
54 It is too complicated to keep track of the different possibilities
55 when control paths merge in this code; so, at each label, we forget all
56 that is known and start fresh. This can be described as processing each
57 extended basic block separately. We have a separate pass to perform
60 Note CSE can turn a conditional or computed jump into a nop or
61 an unconditional jump. When this occurs we arrange to run the jump
62 optimizer after CSE to delete the unreachable code.
64 We use two data structures to record the equivalent expressions:
65 a hash table for most expressions, and a vector of "quantity
66 numbers" to record equivalent (pseudo) registers.
68 The use of the special data structure for registers is desirable
69 because it is faster. It is possible because registers references
70 contain a fairly small number, the register number, taken from
71 a contiguously allocated series, and two register references are
72 identical if they have the same number. General expressions
73 do not have any such thing, so the only way to retrieve the
74 information recorded on an expression other than a register
75 is to keep it in a hash table.
77 Registers and "quantity numbers":
79 At the start of each basic block, all of the (hardware and pseudo)
80 registers used in the function are given distinct quantity
81 numbers to indicate their contents. During scan, when the code
82 copies one register into another, we copy the quantity number.
83 When a register is loaded in any other way, we allocate a new
84 quantity number to describe the value generated by this operation.
85 `REG_QTY (N)' records what quantity register N is currently thought
88 All real quantity numbers are greater than or equal to zero.
89 If register N has not been assigned a quantity, `REG_QTY (N)' will
90 equal -N - 1, which is always negative.
92 Quantity numbers below zero do not exist and none of the `qty_table'
93 entries should be referenced with a negative index.
95 We also maintain a bidirectional chain of registers for each
96 quantity number. The `qty_table` members `first_reg' and `last_reg',
97 and `reg_eqv_table' members `next' and `prev' hold these chains.
99 The first register in a chain is the one whose lifespan is least local.
100 Among equals, it is the one that was seen first.
101 We replace any equivalent register with that one.
103 If two registers have the same quantity number, it must be true that
104 REG expressions with qty_table `mode' must be in the hash table for both
105 registers and must be in the same class.
107 The converse is not true. Since hard registers may be referenced in
108 any mode, two REG expressions might be equivalent in the hash table
109 but not have the same quantity number if the quantity number of one
110 of the registers is not the same mode as those expressions.
112 Constants and quantity numbers
114 When a quantity has a known constant value, that value is stored
115 in the appropriate qty_table `const_rtx'. This is in addition to
116 putting the constant in the hash table as is usual for non-regs.
118 Whether a reg or a constant is preferred is determined by the configuration
119 macro CONST_COSTS and will often depend on the constant value. In any
120 event, expressions containing constants can be simplified, by fold_rtx.
122 When a quantity has a known nearly constant value (such as an address
123 of a stack slot), that value is stored in the appropriate qty_table
126 Integer constants don't have a machine mode. However, cse
127 determines the intended machine mode from the destination
128 of the instruction that moves the constant. The machine mode
129 is recorded in the hash table along with the actual RTL
130 constant expression so that different modes are kept separate.
134 To record known equivalences among expressions in general
135 we use a hash table called `table'. It has a fixed number of buckets
136 that contain chains of `struct table_elt' elements for expressions.
137 These chains connect the elements whose expressions have the same
140 Other chains through the same elements connect the elements which
141 currently have equivalent values.
143 Register references in an expression are canonicalized before hashing
144 the expression. This is done using `reg_qty' and qty_table `first_reg'.
145 The hash code of a register reference is computed using the quantity
146 number, not the register number.
148 When the value of an expression changes, it is necessary to remove from the
149 hash table not just that expression but all expressions whose values
150 could be different as a result.
152 1. If the value changing is in memory, except in special cases
153 ANYTHING referring to memory could be changed. That is because
154 nobody knows where a pointer does not point.
155 The function `invalidate_memory' removes what is necessary.
157 The special cases are when the address is constant or is
158 a constant plus a fixed register such as the frame pointer
159 or a static chain pointer. When such addresses are stored in,
160 we can tell exactly which other such addresses must be invalidated
161 due to overlap. `invalidate' does this.
162 All expressions that refer to non-constant
163 memory addresses are also invalidated. `invalidate_memory' does this.
165 2. If the value changing is a register, all expressions
166 containing references to that register, and only those,
169 Because searching the entire hash table for expressions that contain
170 a register is very slow, we try to figure out when it isn't necessary.
171 Precisely, this is necessary only when expressions have been
172 entered in the hash table using this register, and then the value has
173 changed, and then another expression wants to be added to refer to
174 the register's new value. This sequence of circumstances is rare
175 within any one basic block.
177 `REG_TICK' and `REG_IN_TABLE', accessors for members of
178 cse_reg_info, are used to detect this case. REG_TICK (i) is
179 incremented whenever a value is stored in register i.
180 REG_IN_TABLE (i) holds -1 if no references to register i have been
181 entered in the table; otherwise, it contains the value REG_TICK (i)
182 had when the references were entered. If we want to enter a
183 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
184 remove old references. Until we want to enter a new entry, the
185 mere fact that the two vectors don't match makes the entries be
186 ignored if anyone tries to match them.
188 Registers themselves are entered in the hash table as well as in
189 the equivalent-register chains. However, `REG_TICK' and
190 `REG_IN_TABLE' do not apply to expressions which are simple
191 register references. These expressions are removed from the table
192 immediately when they become invalid, and this can be done even if
193 we do not immediately search for all the expressions that refer to
196 A CLOBBER rtx in an instruction invalidates its operand for further
197 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
198 invalidates everything that resides in memory.
202 Constant expressions that differ only by an additive integer
203 are called related. When a constant expression is put in
204 the table, the related expression with no constant term
205 is also entered. These are made to point at each other
206 so that it is possible to find out if there exists any
207 register equivalent to an expression related to a given expression. */
209 /* Length of qty_table vector. We know in advance we will not need
210 a quantity number this big. */
214 /* Next quantity number to be allocated.
215 This is 1 + the largest number needed so far. */
219 /* Per-qty information tracking.
221 `first_reg' and `last_reg' track the head and tail of the
222 chain of registers which currently contain this quantity.
224 `mode' contains the machine mode of this quantity.
226 `const_rtx' holds the rtx of the constant value of this
227 quantity, if known. A summations of the frame/arg pointer
228 and a constant can also be entered here. When this holds
229 a known value, `const_insn' is the insn which stored the
232 `comparison_{code,const,qty}' are used to track when a
233 comparison between a quantity and some constant or register has
234 been passed. In such a case, we know the results of the comparison
235 in case we see it again. These members record a comparison that
236 is known to be true. `comparison_code' holds the rtx code of such
237 a comparison, else it is set to UNKNOWN and the other two
238 comparison members are undefined. `comparison_const' holds
239 the constant being compared against, or zero if the comparison
240 is not against a constant. `comparison_qty' holds the quantity
241 being compared against when the result is known. If the comparison
242 is not with a register, `comparison_qty' is -1. */
244 struct qty_table_elem
248 rtx comparison_const
;
250 unsigned int first_reg
, last_reg
;
251 /* The sizes of these fields should match the sizes of the
252 code and mode fields of struct rtx_def (see rtl.h). */
253 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
254 ENUM_BITFIELD(machine_mode
) mode
: 8;
257 /* The table of all qtys, indexed by qty number. */
258 static struct qty_table_elem
*qty_table
;
260 /* Structure used to pass arguments via for_each_rtx to function
261 cse_change_cc_mode. */
262 struct change_cc_mode_args
269 /* For machines that have a CC0, we do not record its value in the hash
270 table since its use is guaranteed to be the insn immediately following
271 its definition and any other insn is presumed to invalidate it.
273 Instead, we store below the current and last value assigned to CC0.
274 If it should happen to be a constant, it is stored in preference
275 to the actual assigned value. In case it is a constant, we store
276 the mode in which the constant should be interpreted. */
278 static rtx this_insn_cc0
, prev_insn_cc0
;
279 static enum machine_mode this_insn_cc0_mode
, prev_insn_cc0_mode
;
282 /* Insn being scanned. */
284 static rtx this_insn
;
285 static bool optimize_this_for_speed_p
;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem
*reg_eqv_table
;
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp
;
309 /* The quantity number of the register's current contents. */
312 /* The number of times the register has been altered in the current
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked
;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info
*cse_reg_info_table
;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size
;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized
;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp
;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table
;
351 /* True if CSE has altered the CFG. */
352 static bool cse_cfg_altered
;
354 /* True if CSE has altered conditional jump insns in such a way
355 that jump optimization should be redone. */
356 static bool cse_jumps_altered
;
358 /* True if we put a LABEL_REF into the hash table for an INSN
359 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
360 to put in the note. */
361 static bool recorded_label_ref
;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
367 static int do_not_record
;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory
;
374 /* The hash table contains buckets which are chains of `struct table_elt's,
375 each recording one expression's information.
376 That expression is in the `exp' field.
378 The canon_exp field contains a canonical (from the point of view of
379 alias analysis) version of the `exp' field.
381 Those elements with the same hash code are chained in both directions
382 through the `next_same_hash' and `prev_same_hash' fields.
384 Each set of expressions with equivalent values
385 are on a two-way chain through the `next_same_value'
386 and `prev_same_value' fields, and all point with
387 the `first_same_value' field at the first element in
388 that chain. The chain is in order of increasing cost.
389 Each element's cost value is in its `cost' field.
391 The `in_memory' field is nonzero for elements that
392 involve any reference to memory. These elements are removed
393 whenever a write is done to an unidentified location in memory.
394 To be safe, we assume that a memory address is unidentified unless
395 the address is either a symbol constant or a constant plus
396 the frame pointer or argument pointer.
398 The `related_value' field is used to connect related expressions
399 (that differ by adding an integer).
400 The related expressions are chained in a circular fashion.
401 `related_value' is zero for expressions for which this
404 The `cost' field stores the cost of this element's expression.
405 The `regcost' field stores the value returned by approx_reg_cost for
406 this element's expression.
408 The `is_const' flag is set if the element is a constant (including
411 The `flag' field is used as a temporary during some search routines.
413 The `mode' field is usually the same as GET_MODE (`exp'), but
414 if `exp' is a CONST_INT and has no machine mode then the `mode'
415 field is the mode it was being used as. Each constant is
416 recorded separately for each mode it is used with. */
422 struct table_elt
*next_same_hash
;
423 struct table_elt
*prev_same_hash
;
424 struct table_elt
*next_same_value
;
425 struct table_elt
*prev_same_value
;
426 struct table_elt
*first_same_value
;
427 struct table_elt
*related_value
;
430 /* The size of this field should match the size
431 of the mode field of struct rtx_def (see rtl.h). */
432 ENUM_BITFIELD(machine_mode
) mode
: 8;
438 /* We don't want a lot of buckets, because we rarely have very many
439 things stored in the hash table, and a lot of buckets slows
440 down a lot of loops that happen frequently. */
442 #define HASH_SIZE (1 << HASH_SHIFT)
443 #define HASH_MASK (HASH_SIZE - 1)
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : canon_hash (X, M)) & HASH_MASK)
453 /* Like HASH, but without side-effects. */
454 #define SAFE_HASH(X, M) \
455 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
457 : safe_hash (X, M)) & HASH_MASK)
459 /* Determine whether register number N is considered a fixed register for the
460 purpose of approximating register costs.
461 It is desirable to replace other regs with fixed regs, to reduce need for
463 A reg wins if it is either the frame pointer or designated as fixed. */
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 (REGNO_PTR_FRAME_P(N) \
475 || (HARD_REGISTER_NUM_P (N) \
476 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
478 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1))
479 #define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO))
481 /* Get the number of times this register has been updated in this
484 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
486 /* Get the point at which REG was recorded in the table. */
488 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
490 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
493 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
495 /* Get the quantity number for REG. */
497 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
499 /* Determine if the quantity number for register X represents a valid index
500 into the qty_table. */
502 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
504 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
506 #define CHEAPER(X, Y) \
507 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
509 static struct table_elt
*table
[HASH_SIZE
];
511 /* Chain of `struct table_elt's made so far for this function
512 but currently removed from the table. */
514 static struct table_elt
*free_element_chain
;
516 /* Set to the cost of a constant pool reference if one was found for a
517 symbolic constant. If this was found, it means we should try to
518 convert constants into constant pool entries if they don't fit in
521 static int constant_pool_entries_cost
;
522 static int constant_pool_entries_regcost
;
524 /* Trace a patch through the CFG. */
528 /* The basic block for this path entry. */
532 /* This data describes a block that will be processed by
533 cse_extended_basic_block. */
535 struct cse_basic_block_data
537 /* Total number of SETs in block. */
539 /* Size of current branch path, if any. */
541 /* Current path, indicating which basic_blocks will be processed. */
542 struct branch_path
*path
;
546 /* Pointers to the live in/live out bitmaps for the boundaries of the
548 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
550 /* A simple bitmap to track which basic blocks have been visited
551 already as part of an already processed extended basic block. */
552 static sbitmap cse_visited_basic_blocks
;
554 static bool fixed_base_plus_p (rtx x
);
555 static int notreg_cost (rtx
, enum rtx_code
, int);
556 static int approx_reg_cost_1 (rtx
*, void *);
557 static int approx_reg_cost (rtx
);
558 static int preferable (int, int, int, int);
559 static void new_basic_block (void);
560 static void make_new_qty (unsigned int, enum machine_mode
);
561 static void make_regs_eqv (unsigned int, unsigned int);
562 static void delete_reg_equiv (unsigned int);
563 static int mention_regs (rtx
);
564 static int insert_regs (rtx
, struct table_elt
*, int);
565 static void remove_from_table (struct table_elt
*, unsigned);
566 static void remove_pseudo_from_table (rtx
, unsigned);
567 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
568 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
569 static rtx
lookup_as_function (rtx
, enum rtx_code
);
570 static struct table_elt
*insert_with_costs (rtx
, struct table_elt
*, unsigned,
571 enum machine_mode
, int, int);
572 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
574 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
575 static void invalidate (rtx
, enum machine_mode
);
576 static void remove_invalid_refs (unsigned int);
577 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
579 static void rehash_using_reg (rtx
);
580 static void invalidate_memory (void);
581 static void invalidate_for_call (void);
582 static rtx
use_related_value (rtx
, struct table_elt
*);
584 static inline unsigned canon_hash (rtx
, enum machine_mode
);
585 static inline unsigned safe_hash (rtx
, enum machine_mode
);
586 static inline unsigned hash_rtx_string (const char *);
588 static rtx
canon_reg (rtx
, rtx
);
589 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
591 enum machine_mode
*);
592 static rtx
fold_rtx (rtx
, rtx
);
593 static rtx
equiv_constant (rtx
);
594 static void record_jump_equiv (rtx
, bool);
595 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
597 static void cse_insn (rtx
);
598 static void cse_prescan_path (struct cse_basic_block_data
*);
599 static void invalidate_from_clobbers (rtx
);
600 static void invalidate_from_sets_and_clobbers (rtx
);
601 static rtx
cse_process_notes (rtx
, rtx
, bool *);
602 static void cse_extended_basic_block (struct cse_basic_block_data
*);
603 static void count_reg_usage (rtx
, int *, rtx
, int);
604 static int check_for_label_ref (rtx
*, void *);
605 extern void dump_class (struct table_elt
*);
606 static void get_cse_reg_info_1 (unsigned int regno
);
607 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
608 static int check_dependence (rtx
*, void *);
610 static void flush_hash_table (void);
611 static bool insn_live_p (rtx
, int *);
612 static bool set_live_p (rtx
, rtx
, int *);
613 static int cse_change_cc_mode (rtx
*, void *);
614 static void cse_change_cc_mode_insn (rtx
, rtx
);
615 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
616 static enum machine_mode
cse_cc_succs (basic_block
, basic_block
, rtx
, rtx
,
620 #undef RTL_HOOKS_GEN_LOWPART
621 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
623 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
625 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
626 virtual regs here because the simplify_*_operation routines are called
627 by integrate.c, which is called before virtual register instantiation. */
630 fixed_base_plus_p (rtx x
)
632 switch (GET_CODE (x
))
635 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
637 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
639 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
640 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
645 if (!CONST_INT_P (XEXP (x
, 1)))
647 return fixed_base_plus_p (XEXP (x
, 0));
654 /* Dump the expressions in the equivalence class indicated by CLASSP.
655 This function is used only for debugging. */
657 dump_class (struct table_elt
*classp
)
659 struct table_elt
*elt
;
661 fprintf (stderr
, "Equivalence chain for ");
662 print_rtl (stderr
, classp
->exp
);
663 fprintf (stderr
, ": \n");
665 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
667 print_rtl (stderr
, elt
->exp
);
668 fprintf (stderr
, "\n");
672 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
675 approx_reg_cost_1 (rtx
*xp
, void *data
)
678 int *cost_p
= (int *) data
;
682 unsigned int regno
= REGNO (x
);
684 if (! CHEAP_REGNO (regno
))
686 if (regno
< FIRST_PSEUDO_REGISTER
)
688 if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
700 /* Return an estimate of the cost of the registers used in an rtx.
701 This is mostly the number of different REG expressions in the rtx;
702 however for some exceptions like fixed registers we use a cost of
703 0. If any other hard register reference occurs, return MAX_COST. */
706 approx_reg_cost (rtx x
)
710 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
716 /* Return a negative value if an rtx A, whose costs are given by COST_A
717 and REGCOST_A, is more desirable than an rtx B.
718 Return a positive value if A is less desirable, or 0 if the two are
721 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
723 /* First, get rid of cases involving expressions that are entirely
725 if (cost_a
!= cost_b
)
727 if (cost_a
== MAX_COST
)
729 if (cost_b
== MAX_COST
)
733 /* Avoid extending lifetimes of hardregs. */
734 if (regcost_a
!= regcost_b
)
736 if (regcost_a
== MAX_COST
)
738 if (regcost_b
== MAX_COST
)
742 /* Normal operation costs take precedence. */
743 if (cost_a
!= cost_b
)
744 return cost_a
- cost_b
;
745 /* Only if these are identical consider effects on register pressure. */
746 if (regcost_a
!= regcost_b
)
747 return regcost_a
- regcost_b
;
751 /* Internal function, to compute cost when X is not a register; called
752 from COST macro to keep it simple. */
755 notreg_cost (rtx x
, enum rtx_code outer
, int opno
)
757 return ((GET_CODE (x
) == SUBREG
758 && REG_P (SUBREG_REG (x
))
759 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
760 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
761 && (GET_MODE_SIZE (GET_MODE (x
))
762 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
763 && subreg_lowpart_p (x
)
764 && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x
),
765 GET_MODE (SUBREG_REG (x
))))
767 : rtx_cost (x
, outer
, opno
, optimize_this_for_speed_p
) * 2);
771 /* Initialize CSE_REG_INFO_TABLE. */
774 init_cse_reg_info (unsigned int nregs
)
776 /* Do we need to grow the table? */
777 if (nregs
> cse_reg_info_table_size
)
779 unsigned int new_size
;
781 if (cse_reg_info_table_size
< 2048)
783 /* Compute a new size that is a power of 2 and no smaller
784 than the large of NREGS and 64. */
785 new_size
= (cse_reg_info_table_size
786 ? cse_reg_info_table_size
: 64);
788 while (new_size
< nregs
)
793 /* If we need a big table, allocate just enough to hold
798 /* Reallocate the table with NEW_SIZE entries. */
799 free (cse_reg_info_table
);
800 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
801 cse_reg_info_table_size
= new_size
;
802 cse_reg_info_table_first_uninitialized
= 0;
805 /* Do we have all of the first NREGS entries initialized? */
806 if (cse_reg_info_table_first_uninitialized
< nregs
)
808 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
811 /* Put the old timestamp on newly allocated entries so that they
812 will all be considered out of date. We do not touch those
813 entries beyond the first NREGS entries to be nice to the
815 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
816 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
818 cse_reg_info_table_first_uninitialized
= nregs
;
822 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
825 get_cse_reg_info_1 (unsigned int regno
)
827 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
828 entry will be considered to have been initialized. */
829 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
831 /* Initialize the rest of the entry. */
832 cse_reg_info_table
[regno
].reg_tick
= 1;
833 cse_reg_info_table
[regno
].reg_in_table
= -1;
834 cse_reg_info_table
[regno
].subreg_ticked
= -1;
835 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
838 /* Find a cse_reg_info entry for REGNO. */
840 static inline struct cse_reg_info
*
841 get_cse_reg_info (unsigned int regno
)
843 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
845 /* If this entry has not been initialized, go ahead and initialize
847 if (p
->timestamp
!= cse_reg_info_timestamp
)
848 get_cse_reg_info_1 (regno
);
853 /* Clear the hash table and initialize each register with its own quantity,
854 for a new basic block. */
857 new_basic_block (void)
863 /* Invalidate cse_reg_info_table. */
864 cse_reg_info_timestamp
++;
866 /* Clear out hash table state for this pass. */
867 CLEAR_HARD_REG_SET (hard_regs_in_table
);
869 /* The per-quantity values used to be initialized here, but it is
870 much faster to initialize each as it is made in `make_new_qty'. */
872 for (i
= 0; i
< HASH_SIZE
; i
++)
874 struct table_elt
*first
;
879 struct table_elt
*last
= first
;
883 while (last
->next_same_hash
!= NULL
)
884 last
= last
->next_same_hash
;
886 /* Now relink this hash entire chain into
887 the free element list. */
889 last
->next_same_hash
= free_element_chain
;
890 free_element_chain
= first
;
899 /* Say that register REG contains a quantity in mode MODE not in any
900 register before and initialize that quantity. */
903 make_new_qty (unsigned int reg
, enum machine_mode mode
)
906 struct qty_table_elem
*ent
;
907 struct reg_eqv_elem
*eqv
;
909 gcc_assert (next_qty
< max_qty
);
911 q
= REG_QTY (reg
) = next_qty
++;
913 ent
->first_reg
= reg
;
916 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
917 ent
->comparison_code
= UNKNOWN
;
919 eqv
= ®_eqv_table
[reg
];
920 eqv
->next
= eqv
->prev
= -1;
923 /* Make reg NEW equivalent to reg OLD.
924 OLD is not changing; NEW is. */
927 make_regs_eqv (unsigned int new_reg
, unsigned int old_reg
)
929 unsigned int lastr
, firstr
;
930 int q
= REG_QTY (old_reg
);
931 struct qty_table_elem
*ent
;
935 /* Nothing should become eqv until it has a "non-invalid" qty number. */
936 gcc_assert (REGNO_QTY_VALID_P (old_reg
));
938 REG_QTY (new_reg
) = q
;
939 firstr
= ent
->first_reg
;
940 lastr
= ent
->last_reg
;
942 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
943 hard regs. Among pseudos, if NEW will live longer than any other reg
944 of the same qty, and that is beyond the current basic block,
945 make it the new canonical replacement for this qty. */
946 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
947 /* Certain fixed registers might be of the class NO_REGS. This means
948 that not only can they not be allocated by the compiler, but
949 they cannot be used in substitutions or canonicalizations
951 && (new_reg
>= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new_reg
) != NO_REGS
)
952 && ((new_reg
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new_reg
))
953 || (new_reg
>= FIRST_PSEUDO_REGISTER
954 && (firstr
< FIRST_PSEUDO_REGISTER
955 || (bitmap_bit_p (cse_ebb_live_out
, new_reg
)
956 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
957 || (bitmap_bit_p (cse_ebb_live_in
, new_reg
)
958 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
960 reg_eqv_table
[firstr
].prev
= new_reg
;
961 reg_eqv_table
[new_reg
].next
= firstr
;
962 reg_eqv_table
[new_reg
].prev
= -1;
963 ent
->first_reg
= new_reg
;
967 /* If NEW is a hard reg (known to be non-fixed), insert at end.
968 Otherwise, insert before any non-fixed hard regs that are at the
969 end. Registers of class NO_REGS cannot be used as an
970 equivalent for anything. */
971 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
972 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
973 && new_reg
>= FIRST_PSEUDO_REGISTER
)
974 lastr
= reg_eqv_table
[lastr
].prev
;
975 reg_eqv_table
[new_reg
].next
= reg_eqv_table
[lastr
].next
;
976 if (reg_eqv_table
[lastr
].next
>= 0)
977 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new_reg
;
979 qty_table
[q
].last_reg
= new_reg
;
980 reg_eqv_table
[lastr
].next
= new_reg
;
981 reg_eqv_table
[new_reg
].prev
= lastr
;
985 /* Remove REG from its equivalence class. */
988 delete_reg_equiv (unsigned int reg
)
990 struct qty_table_elem
*ent
;
991 int q
= REG_QTY (reg
);
994 /* If invalid, do nothing. */
995 if (! REGNO_QTY_VALID_P (reg
))
1000 p
= reg_eqv_table
[reg
].prev
;
1001 n
= reg_eqv_table
[reg
].next
;
1004 reg_eqv_table
[n
].prev
= p
;
1008 reg_eqv_table
[p
].next
= n
;
1012 REG_QTY (reg
) = -reg
- 1;
1015 /* Remove any invalid expressions from the hash table
1016 that refer to any of the registers contained in expression X.
1018 Make sure that newly inserted references to those registers
1019 as subexpressions will be considered valid.
1021 mention_regs is not called when a register itself
1022 is being stored in the table.
1024 Return 1 if we have done something that may have changed the hash code
1028 mention_regs (rtx x
)
1038 code
= GET_CODE (x
);
1041 unsigned int regno
= REGNO (x
);
1042 unsigned int endregno
= END_REGNO (x
);
1045 for (i
= regno
; i
< endregno
; i
++)
1047 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1048 remove_invalid_refs (i
);
1050 REG_IN_TABLE (i
) = REG_TICK (i
);
1051 SUBREG_TICKED (i
) = -1;
1057 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1058 pseudo if they don't use overlapping words. We handle only pseudos
1059 here for simplicity. */
1060 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1061 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1063 unsigned int i
= REGNO (SUBREG_REG (x
));
1065 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1067 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1068 the last store to this register really stored into this
1069 subreg, then remove the memory of this subreg.
1070 Otherwise, remove any memory of the entire register and
1071 all its subregs from the table. */
1072 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1073 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1074 remove_invalid_refs (i
);
1076 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1079 REG_IN_TABLE (i
) = REG_TICK (i
);
1080 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1084 /* If X is a comparison or a COMPARE and either operand is a register
1085 that does not have a quantity, give it one. This is so that a later
1086 call to record_jump_equiv won't cause X to be assigned a different
1087 hash code and not found in the table after that call.
1089 It is not necessary to do this here, since rehash_using_reg can
1090 fix up the table later, but doing this here eliminates the need to
1091 call that expensive function in the most common case where the only
1092 use of the register is in the comparison. */
1094 if (code
== COMPARE
|| COMPARISON_P (x
))
1096 if (REG_P (XEXP (x
, 0))
1097 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1098 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1100 rehash_using_reg (XEXP (x
, 0));
1104 if (REG_P (XEXP (x
, 1))
1105 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1106 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1108 rehash_using_reg (XEXP (x
, 1));
1113 fmt
= GET_RTX_FORMAT (code
);
1114 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1116 changed
|= mention_regs (XEXP (x
, i
));
1117 else if (fmt
[i
] == 'E')
1118 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1119 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1124 /* Update the register quantities for inserting X into the hash table
1125 with a value equivalent to CLASSP.
1126 (If the class does not contain a REG, it is irrelevant.)
1127 If MODIFIED is nonzero, X is a destination; it is being modified.
1128 Note that delete_reg_equiv should be called on a register
1129 before insert_regs is done on that register with MODIFIED != 0.
1131 Nonzero value means that elements of reg_qty have changed
1132 so X's hash code may be different. */
1135 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1139 unsigned int regno
= REGNO (x
);
1142 /* If REGNO is in the equivalence table already but is of the
1143 wrong mode for that equivalence, don't do anything here. */
1145 qty_valid
= REGNO_QTY_VALID_P (regno
);
1148 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1150 if (ent
->mode
!= GET_MODE (x
))
1154 if (modified
|| ! qty_valid
)
1157 for (classp
= classp
->first_same_value
;
1159 classp
= classp
->next_same_value
)
1160 if (REG_P (classp
->exp
)
1161 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1163 unsigned c_regno
= REGNO (classp
->exp
);
1165 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1167 /* Suppose that 5 is hard reg and 100 and 101 are
1170 (set (reg:si 100) (reg:si 5))
1171 (set (reg:si 5) (reg:si 100))
1172 (set (reg:di 101) (reg:di 5))
1174 We would now set REG_QTY (101) = REG_QTY (5), but the
1175 entry for 5 is in SImode. When we use this later in
1176 copy propagation, we get the register in wrong mode. */
1177 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1180 make_regs_eqv (regno
, c_regno
);
1184 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1185 than REG_IN_TABLE to find out if there was only a single preceding
1186 invalidation - for the SUBREG - or another one, which would be
1187 for the full register. However, if we find here that REG_TICK
1188 indicates that the register is invalid, it means that it has
1189 been invalidated in a separate operation. The SUBREG might be used
1190 now (then this is a recursive call), or we might use the full REG
1191 now and a SUBREG of it later. So bump up REG_TICK so that
1192 mention_regs will do the right thing. */
1194 && REG_IN_TABLE (regno
) >= 0
1195 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1197 make_new_qty (regno
, GET_MODE (x
));
1204 /* If X is a SUBREG, we will likely be inserting the inner register in the
1205 table. If that register doesn't have an assigned quantity number at
1206 this point but does later, the insertion that we will be doing now will
1207 not be accessible because its hash code will have changed. So assign
1208 a quantity number now. */
1210 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1211 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1213 insert_regs (SUBREG_REG (x
), NULL
, 0);
1218 return mention_regs (x
);
1222 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1223 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1224 CST is equal to an anchor. */
1227 compute_const_anchors (rtx cst
,
1228 HOST_WIDE_INT
*lower_base
, HOST_WIDE_INT
*lower_offs
,
1229 HOST_WIDE_INT
*upper_base
, HOST_WIDE_INT
*upper_offs
)
1231 HOST_WIDE_INT n
= INTVAL (cst
);
1233 *lower_base
= n
& ~(targetm
.const_anchor
- 1);
1234 if (*lower_base
== n
)
1238 (n
+ (targetm
.const_anchor
- 1)) & ~(targetm
.const_anchor
- 1);
1239 *upper_offs
= n
- *upper_base
;
1240 *lower_offs
= n
- *lower_base
;
1244 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1247 insert_const_anchor (HOST_WIDE_INT anchor
, rtx reg
, HOST_WIDE_INT offs
,
1248 enum machine_mode mode
)
1250 struct table_elt
*elt
;
1255 anchor_exp
= GEN_INT (anchor
);
1256 hash
= HASH (anchor_exp
, mode
);
1257 elt
= lookup (anchor_exp
, hash
, mode
);
1259 elt
= insert (anchor_exp
, NULL
, hash
, mode
);
1261 exp
= plus_constant (reg
, offs
);
1262 /* REG has just been inserted and the hash codes recomputed. */
1264 hash
= HASH (exp
, mode
);
1266 /* Use the cost of the register rather than the whole expression. When
1267 looking up constant anchors we will further offset the corresponding
1268 expression therefore it does not make sense to prefer REGs over
1269 reg-immediate additions. Prefer instead the oldest expression. Also
1270 don't prefer pseudos over hard regs so that we derive constants in
1271 argument registers from other argument registers rather than from the
1272 original pseudo that was used to synthesize the constant. */
1273 insert_with_costs (exp
, elt
, hash
, mode
, COST (reg
), 1);
1276 /* The constant CST is equivalent to the register REG. Create
1277 equivalences between the two anchors of CST and the corresponding
1278 register-offset expressions using REG. */
1281 insert_const_anchors (rtx reg
, rtx cst
, enum machine_mode mode
)
1283 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1285 if (!compute_const_anchors (cst
, &lower_base
, &lower_offs
,
1286 &upper_base
, &upper_offs
))
1289 /* Ignore anchors of value 0. Constants accessible from zero are
1291 if (lower_base
!= 0)
1292 insert_const_anchor (lower_base
, reg
, -lower_offs
, mode
);
1294 if (upper_base
!= 0)
1295 insert_const_anchor (upper_base
, reg
, -upper_offs
, mode
);
1298 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1299 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1300 valid expression. Return the cheapest and oldest of such expressions. In
1301 *OLD, return how old the resulting expression is compared to the other
1302 equivalent expressions. */
1305 find_reg_offset_for_const (struct table_elt
*anchor_elt
, HOST_WIDE_INT offs
,
1308 struct table_elt
*elt
;
1310 struct table_elt
*match_elt
;
1313 /* Find the cheapest and *oldest* expression to maximize the chance of
1314 reusing the same pseudo. */
1318 for (elt
= anchor_elt
->first_same_value
, idx
= 0;
1320 elt
= elt
->next_same_value
, idx
++)
1322 if (match_elt
&& CHEAPER (match_elt
, elt
))
1325 if (REG_P (elt
->exp
)
1326 || (GET_CODE (elt
->exp
) == PLUS
1327 && REG_P (XEXP (elt
->exp
, 0))
1328 && GET_CODE (XEXP (elt
->exp
, 1)) == CONST_INT
))
1332 /* Ignore expressions that are no longer valid. */
1333 if (!REG_P (elt
->exp
) && !exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
1336 x
= plus_constant (elt
->exp
, offs
);
1338 || (GET_CODE (x
) == PLUS
1339 && IN_RANGE (INTVAL (XEXP (x
, 1)),
1340 -targetm
.const_anchor
,
1341 targetm
.const_anchor
- 1)))
1353 /* Try to express the constant SRC_CONST using a register+offset expression
1354 derived from a constant anchor. Return it if successful or NULL_RTX,
1358 try_const_anchors (rtx src_const
, enum machine_mode mode
)
1360 struct table_elt
*lower_elt
, *upper_elt
;
1361 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1362 rtx lower_anchor_rtx
, upper_anchor_rtx
;
1363 rtx lower_exp
= NULL_RTX
, upper_exp
= NULL_RTX
;
1364 unsigned lower_old
, upper_old
;
1366 if (!compute_const_anchors (src_const
, &lower_base
, &lower_offs
,
1367 &upper_base
, &upper_offs
))
1370 lower_anchor_rtx
= GEN_INT (lower_base
);
1371 upper_anchor_rtx
= GEN_INT (upper_base
);
1372 lower_elt
= lookup (lower_anchor_rtx
, HASH (lower_anchor_rtx
, mode
), mode
);
1373 upper_elt
= lookup (upper_anchor_rtx
, HASH (upper_anchor_rtx
, mode
), mode
);
1376 lower_exp
= find_reg_offset_for_const (lower_elt
, lower_offs
, &lower_old
);
1378 upper_exp
= find_reg_offset_for_const (upper_elt
, upper_offs
, &upper_old
);
1385 /* Return the older expression. */
1386 return (upper_old
> lower_old
? upper_exp
: lower_exp
);
1389 /* Look in or update the hash table. */
1391 /* Remove table element ELT from use in the table.
1392 HASH is its hash code, made using the HASH macro.
1393 It's an argument because often that is known in advance
1394 and we save much time not recomputing it. */
1397 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1402 /* Mark this element as removed. See cse_insn. */
1403 elt
->first_same_value
= 0;
1405 /* Remove the table element from its equivalence class. */
1408 struct table_elt
*prev
= elt
->prev_same_value
;
1409 struct table_elt
*next
= elt
->next_same_value
;
1412 next
->prev_same_value
= prev
;
1415 prev
->next_same_value
= next
;
1418 struct table_elt
*newfirst
= next
;
1421 next
->first_same_value
= newfirst
;
1422 next
= next
->next_same_value
;
1427 /* Remove the table element from its hash bucket. */
1430 struct table_elt
*prev
= elt
->prev_same_hash
;
1431 struct table_elt
*next
= elt
->next_same_hash
;
1434 next
->prev_same_hash
= prev
;
1437 prev
->next_same_hash
= next
;
1438 else if (table
[hash
] == elt
)
1442 /* This entry is not in the proper hash bucket. This can happen
1443 when two classes were merged by `merge_equiv_classes'. Search
1444 for the hash bucket that it heads. This happens only very
1445 rarely, so the cost is acceptable. */
1446 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1447 if (table
[hash
] == elt
)
1452 /* Remove the table element from its related-value circular chain. */
1454 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1456 struct table_elt
*p
= elt
->related_value
;
1458 while (p
->related_value
!= elt
)
1459 p
= p
->related_value
;
1460 p
->related_value
= elt
->related_value
;
1461 if (p
->related_value
== p
)
1462 p
->related_value
= 0;
1465 /* Now add it to the free element chain. */
1466 elt
->next_same_hash
= free_element_chain
;
1467 free_element_chain
= elt
;
1470 /* Same as above, but X is a pseudo-register. */
1473 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1475 struct table_elt
*elt
;
1477 /* Because a pseudo-register can be referenced in more than one
1478 mode, we might have to remove more than one table entry. */
1479 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1480 remove_from_table (elt
, hash
);
1483 /* Look up X in the hash table and return its table element,
1484 or 0 if X is not in the table.
1486 MODE is the machine-mode of X, or if X is an integer constant
1487 with VOIDmode then MODE is the mode with which X will be used.
1489 Here we are satisfied to find an expression whose tree structure
1492 static struct table_elt
*
1493 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1495 struct table_elt
*p
;
1497 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1498 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1499 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1505 /* Like `lookup' but don't care whether the table element uses invalid regs.
1506 Also ignore discrepancies in the machine mode of a register. */
1508 static struct table_elt
*
1509 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1511 struct table_elt
*p
;
1515 unsigned int regno
= REGNO (x
);
1517 /* Don't check the machine mode when comparing registers;
1518 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1519 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1521 && REGNO (p
->exp
) == regno
)
1526 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1528 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1535 /* Look for an expression equivalent to X and with code CODE.
1536 If one is found, return that expression. */
1539 lookup_as_function (rtx x
, enum rtx_code code
)
1542 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1547 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1548 if (GET_CODE (p
->exp
) == code
1549 /* Make sure this is a valid entry in the table. */
1550 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1556 /* Insert X in the hash table, assuming HASH is its hash code and
1557 CLASSP is an element of the class it should go in (or 0 if a new
1558 class should be made). COST is the code of X and reg_cost is the
1559 cost of registers in X. It is inserted at the proper position to
1560 keep the class in the order cheapest first.
1562 MODE is the machine-mode of X, or if X is an integer constant
1563 with VOIDmode then MODE is the mode with which X will be used.
1565 For elements of equal cheapness, the most recent one
1566 goes in front, except that the first element in the list
1567 remains first unless a cheaper element is added. The order of
1568 pseudo-registers does not matter, as canon_reg will be called to
1569 find the cheapest when a register is retrieved from the table.
1571 The in_memory field in the hash table element is set to 0.
1572 The caller must set it nonzero if appropriate.
1574 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1575 and if insert_regs returns a nonzero value
1576 you must then recompute its hash code before calling here.
1578 If necessary, update table showing constant values of quantities. */
1580 static struct table_elt
*
1581 insert_with_costs (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1582 enum machine_mode mode
, int cost
, int reg_cost
)
1584 struct table_elt
*elt
;
1586 /* If X is a register and we haven't made a quantity for it,
1587 something is wrong. */
1588 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1590 /* If X is a hard register, show it is being put in the table. */
1591 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1592 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1594 /* Put an element for X into the right hash bucket. */
1596 elt
= free_element_chain
;
1598 free_element_chain
= elt
->next_same_hash
;
1600 elt
= XNEW (struct table_elt
);
1603 elt
->canon_exp
= NULL_RTX
;
1605 elt
->regcost
= reg_cost
;
1606 elt
->next_same_value
= 0;
1607 elt
->prev_same_value
= 0;
1608 elt
->next_same_hash
= table
[hash
];
1609 elt
->prev_same_hash
= 0;
1610 elt
->related_value
= 0;
1613 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1616 table
[hash
]->prev_same_hash
= elt
;
1619 /* Put it into the proper value-class. */
1622 classp
= classp
->first_same_value
;
1623 if (CHEAPER (elt
, classp
))
1624 /* Insert at the head of the class. */
1626 struct table_elt
*p
;
1627 elt
->next_same_value
= classp
;
1628 classp
->prev_same_value
= elt
;
1629 elt
->first_same_value
= elt
;
1631 for (p
= classp
; p
; p
= p
->next_same_value
)
1632 p
->first_same_value
= elt
;
1636 /* Insert not at head of the class. */
1637 /* Put it after the last element cheaper than X. */
1638 struct table_elt
*p
, *next
;
1641 (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1645 /* Put it after P and before NEXT. */
1646 elt
->next_same_value
= next
;
1648 next
->prev_same_value
= elt
;
1650 elt
->prev_same_value
= p
;
1651 p
->next_same_value
= elt
;
1652 elt
->first_same_value
= classp
;
1656 elt
->first_same_value
= elt
;
1658 /* If this is a constant being set equivalent to a register or a register
1659 being set equivalent to a constant, note the constant equivalence.
1661 If this is a constant, it cannot be equivalent to a different constant,
1662 and a constant is the only thing that can be cheaper than a register. So
1663 we know the register is the head of the class (before the constant was
1666 If this is a register that is not already known equivalent to a
1667 constant, we must check the entire class.
1669 If this is a register that is already known equivalent to an insn,
1670 update the qtys `const_insn' to show that `this_insn' is the latest
1671 insn making that quantity equivalent to the constant. */
1673 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1676 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1677 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1679 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1680 exp_ent
->const_insn
= this_insn
;
1685 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1688 struct table_elt
*p
;
1690 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1692 if (p
->is_const
&& !REG_P (p
->exp
))
1694 int x_q
= REG_QTY (REGNO (x
));
1695 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1698 = gen_lowpart (GET_MODE (x
), p
->exp
);
1699 x_ent
->const_insn
= this_insn
;
1706 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1707 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1708 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1710 /* If this is a constant with symbolic value,
1711 and it has a term with an explicit integer value,
1712 link it up with related expressions. */
1713 if (GET_CODE (x
) == CONST
)
1715 rtx subexp
= get_related_value (x
);
1717 struct table_elt
*subelt
, *subelt_prev
;
1721 /* Get the integer-free subexpression in the hash table. */
1722 subhash
= SAFE_HASH (subexp
, mode
);
1723 subelt
= lookup (subexp
, subhash
, mode
);
1725 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1726 /* Initialize SUBELT's circular chain if it has none. */
1727 if (subelt
->related_value
== 0)
1728 subelt
->related_value
= subelt
;
1729 /* Find the element in the circular chain that precedes SUBELT. */
1730 subelt_prev
= subelt
;
1731 while (subelt_prev
->related_value
!= subelt
)
1732 subelt_prev
= subelt_prev
->related_value
;
1733 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1734 This way the element that follows SUBELT is the oldest one. */
1735 elt
->related_value
= subelt_prev
->related_value
;
1736 subelt_prev
->related_value
= elt
;
1743 /* Wrap insert_with_costs by passing the default costs. */
1745 static struct table_elt
*
1746 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1747 enum machine_mode mode
)
1750 insert_with_costs (x
, classp
, hash
, mode
, COST (x
), approx_reg_cost (x
));
1754 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1755 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1756 the two classes equivalent.
1758 CLASS1 will be the surviving class; CLASS2 should not be used after this
1761 Any invalid entries in CLASS2 will not be copied. */
1764 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1766 struct table_elt
*elt
, *next
, *new_elt
;
1768 /* Ensure we start with the head of the classes. */
1769 class1
= class1
->first_same_value
;
1770 class2
= class2
->first_same_value
;
1772 /* If they were already equal, forget it. */
1773 if (class1
== class2
)
1776 for (elt
= class2
; elt
; elt
= next
)
1780 enum machine_mode mode
= elt
->mode
;
1782 next
= elt
->next_same_value
;
1784 /* Remove old entry, make a new one in CLASS1's class.
1785 Don't do this for invalid entries as we cannot find their
1786 hash code (it also isn't necessary). */
1787 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1789 bool need_rehash
= false;
1791 hash_arg_in_memory
= 0;
1792 hash
= HASH (exp
, mode
);
1796 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1797 delete_reg_equiv (REGNO (exp
));
1800 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1801 remove_pseudo_from_table (exp
, hash
);
1803 remove_from_table (elt
, hash
);
1805 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1807 rehash_using_reg (exp
);
1808 hash
= HASH (exp
, mode
);
1810 new_elt
= insert (exp
, class1
, hash
, mode
);
1811 new_elt
->in_memory
= hash_arg_in_memory
;
1816 /* Flush the entire hash table. */
1819 flush_hash_table (void)
1822 struct table_elt
*p
;
1824 for (i
= 0; i
< HASH_SIZE
; i
++)
1825 for (p
= table
[i
]; p
; p
= table
[i
])
1827 /* Note that invalidate can remove elements
1828 after P in the current hash chain. */
1830 invalidate (p
->exp
, VOIDmode
);
1832 remove_from_table (p
, i
);
1836 /* Function called for each rtx to check whether true dependence exist. */
1837 struct check_dependence_data
1839 enum machine_mode mode
;
1845 check_dependence (rtx
*x
, void *data
)
1847 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1848 if (*x
&& MEM_P (*x
))
1849 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
, NULL_RTX
);
1854 /* Remove from the hash table, or mark as invalid, all expressions whose
1855 values could be altered by storing in X. X is a register, a subreg, or
1856 a memory reference with nonvarying address (because, when a memory
1857 reference with a varying address is stored in, all memory references are
1858 removed by invalidate_memory so specific invalidation is superfluous).
1859 FULL_MODE, if not VOIDmode, indicates that this much should be
1860 invalidated instead of just the amount indicated by the mode of X. This
1861 is only used for bitfield stores into memory.
1863 A nonvarying address may be just a register or just a symbol reference,
1864 or it may be either of those plus a numeric offset. */
1867 invalidate (rtx x
, enum machine_mode full_mode
)
1870 struct table_elt
*p
;
1873 switch (GET_CODE (x
))
1877 /* If X is a register, dependencies on its contents are recorded
1878 through the qty number mechanism. Just change the qty number of
1879 the register, mark it as invalid for expressions that refer to it,
1880 and remove it itself. */
1881 unsigned int regno
= REGNO (x
);
1882 unsigned int hash
= HASH (x
, GET_MODE (x
));
1884 /* Remove REGNO from any quantity list it might be on and indicate
1885 that its value might have changed. If it is a pseudo, remove its
1886 entry from the hash table.
1888 For a hard register, we do the first two actions above for any
1889 additional hard registers corresponding to X. Then, if any of these
1890 registers are in the table, we must remove any REG entries that
1891 overlap these registers. */
1893 delete_reg_equiv (regno
);
1895 SUBREG_TICKED (regno
) = -1;
1897 if (regno
>= FIRST_PSEUDO_REGISTER
)
1898 remove_pseudo_from_table (x
, hash
);
1901 HOST_WIDE_INT in_table
1902 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1903 unsigned int endregno
= END_HARD_REGNO (x
);
1904 unsigned int tregno
, tendregno
, rn
;
1905 struct table_elt
*p
, *next
;
1907 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1909 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1911 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1912 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1913 delete_reg_equiv (rn
);
1915 SUBREG_TICKED (rn
) = -1;
1919 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1920 for (p
= table
[hash
]; p
; p
= next
)
1922 next
= p
->next_same_hash
;
1925 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1928 tregno
= REGNO (p
->exp
);
1929 tendregno
= END_HARD_REGNO (p
->exp
);
1930 if (tendregno
> regno
&& tregno
< endregno
)
1931 remove_from_table (p
, hash
);
1938 invalidate (SUBREG_REG (x
), VOIDmode
);
1942 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1943 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1947 /* This is part of a disjoint return value; extract the location in
1948 question ignoring the offset. */
1949 invalidate (XEXP (x
, 0), VOIDmode
);
1953 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1954 /* Calculate the canonical version of X here so that
1955 true_dependence doesn't generate new RTL for X on each call. */
1958 /* Remove all hash table elements that refer to overlapping pieces of
1960 if (full_mode
== VOIDmode
)
1961 full_mode
= GET_MODE (x
);
1963 for (i
= 0; i
< HASH_SIZE
; i
++)
1965 struct table_elt
*next
;
1967 for (p
= table
[i
]; p
; p
= next
)
1969 next
= p
->next_same_hash
;
1972 struct check_dependence_data d
;
1974 /* Just canonicalize the expression once;
1975 otherwise each time we call invalidate
1976 true_dependence will canonicalize the
1977 expression again. */
1979 p
->canon_exp
= canon_rtx (p
->exp
);
1983 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1984 remove_from_table (p
, i
);
1995 /* Remove all expressions that refer to register REGNO,
1996 since they are already invalid, and we are about to
1997 mark that register valid again and don't want the old
1998 expressions to reappear as valid. */
2001 remove_invalid_refs (unsigned int regno
)
2004 struct table_elt
*p
, *next
;
2006 for (i
= 0; i
< HASH_SIZE
; i
++)
2007 for (p
= table
[i
]; p
; p
= next
)
2009 next
= p
->next_same_hash
;
2011 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
2012 remove_from_table (p
, i
);
2016 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2019 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
2020 enum machine_mode mode
)
2023 struct table_elt
*p
, *next
;
2024 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
2026 for (i
= 0; i
< HASH_SIZE
; i
++)
2027 for (p
= table
[i
]; p
; p
= next
)
2030 next
= p
->next_same_hash
;
2033 && (GET_CODE (exp
) != SUBREG
2034 || !REG_P (SUBREG_REG (exp
))
2035 || REGNO (SUBREG_REG (exp
)) != regno
2036 || (((SUBREG_BYTE (exp
)
2037 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
2038 && SUBREG_BYTE (exp
) <= end
))
2039 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
2040 remove_from_table (p
, i
);
2044 /* Recompute the hash codes of any valid entries in the hash table that
2045 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2047 This is called when we make a jump equivalence. */
2050 rehash_using_reg (rtx x
)
2053 struct table_elt
*p
, *next
;
2056 if (GET_CODE (x
) == SUBREG
)
2059 /* If X is not a register or if the register is known not to be in any
2060 valid entries in the table, we have no work to do. */
2063 || REG_IN_TABLE (REGNO (x
)) < 0
2064 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2067 /* Scan all hash chains looking for valid entries that mention X.
2068 If we find one and it is in the wrong hash chain, move it. */
2070 for (i
= 0; i
< HASH_SIZE
; i
++)
2071 for (p
= table
[i
]; p
; p
= next
)
2073 next
= p
->next_same_hash
;
2074 if (reg_mentioned_p (x
, p
->exp
)
2075 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2076 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2078 if (p
->next_same_hash
)
2079 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2081 if (p
->prev_same_hash
)
2082 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2084 table
[i
] = p
->next_same_hash
;
2086 p
->next_same_hash
= table
[hash
];
2087 p
->prev_same_hash
= 0;
2089 table
[hash
]->prev_same_hash
= p
;
2095 /* Remove from the hash table any expression that is a call-clobbered
2096 register. Also update their TICK values. */
2099 invalidate_for_call (void)
2101 unsigned int regno
, endregno
;
2104 struct table_elt
*p
, *next
;
2107 /* Go through all the hard registers. For each that is clobbered in
2108 a CALL_INSN, remove the register from quantity chains and update
2109 reg_tick if defined. Also see if any of these registers is currently
2112 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2113 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
2115 delete_reg_equiv (regno
);
2116 if (REG_TICK (regno
) >= 0)
2119 SUBREG_TICKED (regno
) = -1;
2122 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2125 /* In the case where we have no call-clobbered hard registers in the
2126 table, we are done. Otherwise, scan the table and remove any
2127 entry that overlaps a call-clobbered register. */
2130 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2131 for (p
= table
[hash
]; p
; p
= next
)
2133 next
= p
->next_same_hash
;
2136 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2139 regno
= REGNO (p
->exp
);
2140 endregno
= END_HARD_REGNO (p
->exp
);
2142 for (i
= regno
; i
< endregno
; i
++)
2143 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2145 remove_from_table (p
, hash
);
2151 /* Given an expression X of type CONST,
2152 and ELT which is its table entry (or 0 if it
2153 is not in the hash table),
2154 return an alternate expression for X as a register plus integer.
2155 If none can be found, return 0. */
2158 use_related_value (rtx x
, struct table_elt
*elt
)
2160 struct table_elt
*relt
= 0;
2161 struct table_elt
*p
, *q
;
2162 HOST_WIDE_INT offset
;
2164 /* First, is there anything related known?
2165 If we have a table element, we can tell from that.
2166 Otherwise, must look it up. */
2168 if (elt
!= 0 && elt
->related_value
!= 0)
2170 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2172 rtx subexp
= get_related_value (x
);
2174 relt
= lookup (subexp
,
2175 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2182 /* Search all related table entries for one that has an
2183 equivalent register. */
2188 /* This loop is strange in that it is executed in two different cases.
2189 The first is when X is already in the table. Then it is searching
2190 the RELATED_VALUE list of X's class (RELT). The second case is when
2191 X is not in the table. Then RELT points to a class for the related
2194 Ensure that, whatever case we are in, that we ignore classes that have
2195 the same value as X. */
2197 if (rtx_equal_p (x
, p
->exp
))
2200 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2207 p
= p
->related_value
;
2209 /* We went all the way around, so there is nothing to be found.
2210 Alternatively, perhaps RELT was in the table for some other reason
2211 and it has no related values recorded. */
2212 if (p
== relt
|| p
== 0)
2219 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2220 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2221 return plus_constant (q
->exp
, offset
);
2225 /* Hash a string. Just add its bytes up. */
2226 static inline unsigned
2227 hash_rtx_string (const char *ps
)
2230 const unsigned char *p
= (const unsigned char *) ps
;
2239 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2240 When the callback returns true, we continue with the new rtx. */
2243 hash_rtx_cb (const_rtx x
, enum machine_mode mode
,
2244 int *do_not_record_p
, int *hash_arg_in_memory_p
,
2245 bool have_reg_qty
, hash_rtx_callback_function cb
)
2251 enum machine_mode newmode
;
2254 /* Used to turn recursion into iteration. We can't rely on GCC's
2255 tail-recursion elimination since we need to keep accumulating values
2261 /* Invoke the callback first. */
2263 && ((*cb
) (x
, mode
, &newx
, &newmode
)))
2265 hash
+= hash_rtx_cb (newx
, newmode
, do_not_record_p
,
2266 hash_arg_in_memory_p
, have_reg_qty
, cb
);
2270 code
= GET_CODE (x
);
2275 unsigned int regno
= REGNO (x
);
2277 if (do_not_record_p
&& !reload_completed
)
2279 /* On some machines, we can't record any non-fixed hard register,
2280 because extending its life will cause reload problems. We
2281 consider ap, fp, sp, gp to be fixed for this purpose.
2283 We also consider CCmode registers to be fixed for this purpose;
2284 failure to do so leads to failure to simplify 0<100 type of
2287 On all machines, we can't record any global registers.
2288 Nor should we record any register that is in a small
2289 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2292 if (regno
>= FIRST_PSEUDO_REGISTER
)
2294 else if (x
== frame_pointer_rtx
2295 || x
== hard_frame_pointer_rtx
2296 || x
== arg_pointer_rtx
2297 || x
== stack_pointer_rtx
2298 || x
== pic_offset_table_rtx
)
2300 else if (global_regs
[regno
])
2302 else if (fixed_regs
[regno
])
2304 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2306 else if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
2308 else if (targetm
.class_likely_spilled_p (REGNO_REG_CLASS (regno
)))
2315 *do_not_record_p
= 1;
2320 hash
+= ((unsigned int) REG
<< 7);
2321 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2325 /* We handle SUBREG of a REG specially because the underlying
2326 reg changes its hash value with every value change; we don't
2327 want to have to forget unrelated subregs when one subreg changes. */
2330 if (REG_P (SUBREG_REG (x
)))
2332 hash
+= (((unsigned int) SUBREG
<< 7)
2333 + REGNO (SUBREG_REG (x
))
2334 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2341 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2342 + (unsigned int) INTVAL (x
));
2346 /* This is like the general case, except that it only counts
2347 the integers representing the constant. */
2348 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2349 if (GET_MODE (x
) != VOIDmode
)
2350 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2352 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2353 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2357 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2358 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2366 units
= CONST_VECTOR_NUNITS (x
);
2368 for (i
= 0; i
< units
; ++i
)
2370 elt
= CONST_VECTOR_ELT (x
, i
);
2371 hash
+= hash_rtx_cb (elt
, GET_MODE (elt
),
2372 do_not_record_p
, hash_arg_in_memory_p
,
2379 /* Assume there is only one rtx object for any given label. */
2381 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2382 differences and differences between each stage's debugging dumps. */
2383 hash
+= (((unsigned int) LABEL_REF
<< 7)
2384 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2389 /* Don't hash on the symbol's address to avoid bootstrap differences.
2390 Different hash values may cause expressions to be recorded in
2391 different orders and thus different registers to be used in the
2392 final assembler. This also avoids differences in the dump files
2393 between various stages. */
2395 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2398 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2400 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2405 /* We don't record if marked volatile or if BLKmode since we don't
2406 know the size of the move. */
2407 if (do_not_record_p
&& (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
))
2409 *do_not_record_p
= 1;
2412 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2413 *hash_arg_in_memory_p
= 1;
2415 /* Now that we have already found this special case,
2416 might as well speed it up as much as possible. */
2417 hash
+= (unsigned) MEM
;
2422 /* A USE that mentions non-volatile memory needs special
2423 handling since the MEM may be BLKmode which normally
2424 prevents an entry from being made. Pure calls are
2425 marked by a USE which mentions BLKmode memory.
2426 See calls.c:emit_call_1. */
2427 if (MEM_P (XEXP (x
, 0))
2428 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2430 hash
+= (unsigned) USE
;
2433 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2434 *hash_arg_in_memory_p
= 1;
2436 /* Now that we have already found this special case,
2437 might as well speed it up as much as possible. */
2438 hash
+= (unsigned) MEM
;
2453 case UNSPEC_VOLATILE
:
2454 if (do_not_record_p
) {
2455 *do_not_record_p
= 1;
2463 if (do_not_record_p
&& MEM_VOLATILE_P (x
))
2465 *do_not_record_p
= 1;
2470 /* We don't want to take the filename and line into account. */
2471 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2472 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2473 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2474 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2476 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2478 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2480 hash
+= (hash_rtx_cb (ASM_OPERANDS_INPUT (x
, i
),
2481 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2482 do_not_record_p
, hash_arg_in_memory_p
,
2485 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2488 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2489 x
= ASM_OPERANDS_INPUT (x
, 0);
2490 mode
= GET_MODE (x
);
2502 i
= GET_RTX_LENGTH (code
) - 1;
2503 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2504 fmt
= GET_RTX_FORMAT (code
);
2510 /* If we are about to do the last recursive call
2511 needed at this level, change it into iteration.
2512 This function is called enough to be worth it. */
2519 hash
+= hash_rtx_cb (XEXP (x
, i
), VOIDmode
, do_not_record_p
,
2520 hash_arg_in_memory_p
,
2525 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2526 hash
+= hash_rtx_cb (XVECEXP (x
, i
, j
), VOIDmode
, do_not_record_p
,
2527 hash_arg_in_memory_p
,
2532 hash
+= hash_rtx_string (XSTR (x
, i
));
2536 hash
+= (unsigned int) XINT (x
, i
);
2551 /* Hash an rtx. We are careful to make sure the value is never negative.
2552 Equivalent registers hash identically.
2553 MODE is used in hashing for CONST_INTs only;
2554 otherwise the mode of X is used.
2556 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2558 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2559 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2561 Note that cse_insn knows that the hash code of a MEM expression
2562 is just (int) MEM plus the hash code of the address. */
2565 hash_rtx (const_rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2566 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2568 return hash_rtx_cb (x
, mode
, do_not_record_p
,
2569 hash_arg_in_memory_p
, have_reg_qty
, NULL
);
2572 /* Hash an rtx X for cse via hash_rtx.
2573 Stores 1 in do_not_record if any subexpression is volatile.
2574 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2575 does not have the RTX_UNCHANGING_P bit set. */
2577 static inline unsigned
2578 canon_hash (rtx x
, enum machine_mode mode
)
2580 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2583 /* Like canon_hash but with no side effects, i.e. do_not_record
2584 and hash_arg_in_memory are not changed. */
2586 static inline unsigned
2587 safe_hash (rtx x
, enum machine_mode mode
)
2589 int dummy_do_not_record
;
2590 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2593 /* Return 1 iff X and Y would canonicalize into the same thing,
2594 without actually constructing the canonicalization of either one.
2595 If VALIDATE is nonzero,
2596 we assume X is an expression being processed from the rtl
2597 and Y was found in the hash table. We check register refs
2598 in Y for being marked as valid.
2600 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2603 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2609 /* Note: it is incorrect to assume an expression is equivalent to itself
2610 if VALIDATE is nonzero. */
2611 if (x
== y
&& !validate
)
2614 if (x
== 0 || y
== 0)
2617 code
= GET_CODE (x
);
2618 if (code
!= GET_CODE (y
))
2621 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2622 if (GET_MODE (x
) != GET_MODE (y
))
2625 /* MEMs referring to different address space are not equivalent. */
2626 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2639 return XEXP (x
, 0) == XEXP (y
, 0);
2642 return XSTR (x
, 0) == XSTR (y
, 0);
2646 return REGNO (x
) == REGNO (y
);
2649 unsigned int regno
= REGNO (y
);
2651 unsigned int endregno
= END_REGNO (y
);
2653 /* If the quantities are not the same, the expressions are not
2654 equivalent. If there are and we are not to validate, they
2655 are equivalent. Otherwise, ensure all regs are up-to-date. */
2657 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2663 for (i
= regno
; i
< endregno
; i
++)
2664 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2673 /* A volatile mem should not be considered equivalent to any
2675 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2678 /* Can't merge two expressions in different alias sets, since we
2679 can decide that the expression is transparent in a block when
2680 it isn't, due to it being set with the different alias set.
2682 Also, can't merge two expressions with different MEM_ATTRS.
2683 They could e.g. be two different entities allocated into the
2684 same space on the stack (see e.g. PR25130). In that case, the
2685 MEM addresses can be the same, even though the two MEMs are
2686 absolutely not equivalent.
2688 But because really all MEM attributes should be the same for
2689 equivalent MEMs, we just use the invariant that MEMs that have
2690 the same attributes share the same mem_attrs data structure. */
2691 if (MEM_ATTRS (x
) != MEM_ATTRS (y
))
2696 /* For commutative operations, check both orders. */
2704 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2706 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2707 validate
, for_gcse
))
2708 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2710 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2711 validate
, for_gcse
)));
2714 /* We don't use the generic code below because we want to
2715 disregard filename and line numbers. */
2717 /* A volatile asm isn't equivalent to any other. */
2718 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2721 if (GET_MODE (x
) != GET_MODE (y
)
2722 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2723 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2724 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2725 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2726 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2729 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2731 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2732 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2733 ASM_OPERANDS_INPUT (y
, i
),
2735 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2736 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2746 /* Compare the elements. If any pair of corresponding elements
2747 fail to match, return 0 for the whole thing. */
2749 fmt
= GET_RTX_FORMAT (code
);
2750 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2755 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2756 validate
, for_gcse
))
2761 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2763 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2764 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2765 validate
, for_gcse
))
2770 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2775 if (XINT (x
, i
) != XINT (y
, i
))
2780 if (XWINT (x
, i
) != XWINT (y
, i
))
2796 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2797 the result if necessary. INSN is as for canon_reg. */
2800 validate_canon_reg (rtx
*xloc
, rtx insn
)
2804 rtx new_rtx
= canon_reg (*xloc
, insn
);
2806 /* If replacing pseudo with hard reg or vice versa, ensure the
2807 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2808 gcc_assert (insn
&& new_rtx
);
2809 validate_change (insn
, xloc
, new_rtx
, 1);
2813 /* Canonicalize an expression:
2814 replace each register reference inside it
2815 with the "oldest" equivalent register.
2817 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2818 after we make our substitution. The calls are made with IN_GROUP nonzero
2819 so apply_change_group must be called upon the outermost return from this
2820 function (unless INSN is zero). The result of apply_change_group can
2821 generally be discarded since the changes we are making are optional. */
2824 canon_reg (rtx x
, rtx insn
)
2833 code
= GET_CODE (x
);
2853 struct qty_table_elem
*ent
;
2855 /* Never replace a hard reg, because hard regs can appear
2856 in more than one machine mode, and we must preserve the mode
2857 of each occurrence. Also, some hard regs appear in
2858 MEMs that are shared and mustn't be altered. Don't try to
2859 replace any reg that maps to a reg of class NO_REGS. */
2860 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2861 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2864 q
= REG_QTY (REGNO (x
));
2865 ent
= &qty_table
[q
];
2866 first
= ent
->first_reg
;
2867 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2868 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2869 : gen_rtx_REG (ent
->mode
, first
));
2876 fmt
= GET_RTX_FORMAT (code
);
2877 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2882 validate_canon_reg (&XEXP (x
, i
), insn
);
2883 else if (fmt
[i
] == 'E')
2884 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2885 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2891 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2892 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2893 what values are being compared.
2895 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2896 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2897 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2898 compared to produce cc0.
2900 The return value is the comparison operator and is either the code of
2901 A or the code corresponding to the inverse of the comparison. */
2903 static enum rtx_code
2904 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2905 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
2909 arg1
= *parg1
, arg2
= *parg2
;
2911 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2913 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2915 /* Set nonzero when we find something of interest. */
2917 int reverse_code
= 0;
2918 struct table_elt
*p
= 0;
2920 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2921 On machines with CC0, this is the only case that can occur, since
2922 fold_rtx will return the COMPARE or item being compared with zero
2925 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2928 /* If ARG1 is a comparison operator and CODE is testing for
2929 STORE_FLAG_VALUE, get the inner arguments. */
2931 else if (COMPARISON_P (arg1
))
2933 #ifdef FLOAT_STORE_FLAG_VALUE
2934 REAL_VALUE_TYPE fsfv
;
2938 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2939 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2940 #ifdef FLOAT_STORE_FLAG_VALUE
2941 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2942 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2943 REAL_VALUE_NEGATIVE (fsfv
)))
2948 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2949 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2950 #ifdef FLOAT_STORE_FLAG_VALUE
2951 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2952 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2953 REAL_VALUE_NEGATIVE (fsfv
)))
2956 x
= arg1
, reverse_code
= 1;
2959 /* ??? We could also check for
2961 (ne (and (eq (...) (const_int 1))) (const_int 0))
2963 and related forms, but let's wait until we see them occurring. */
2966 /* Look up ARG1 in the hash table and see if it has an equivalence
2967 that lets us see what is being compared. */
2968 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
2971 p
= p
->first_same_value
;
2973 /* If what we compare is already known to be constant, that is as
2975 We need to break the loop in this case, because otherwise we
2976 can have an infinite loop when looking at a reg that is known
2977 to be a constant which is the same as a comparison of a reg
2978 against zero which appears later in the insn stream, which in
2979 turn is constant and the same as the comparison of the first reg
2985 for (; p
; p
= p
->next_same_value
)
2987 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2988 #ifdef FLOAT_STORE_FLAG_VALUE
2989 REAL_VALUE_TYPE fsfv
;
2992 /* If the entry isn't valid, skip it. */
2993 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2996 /* If it's the same comparison we're already looking at, skip it. */
2997 if (COMPARISON_P (p
->exp
)
2998 && XEXP (p
->exp
, 0) == arg1
2999 && XEXP (p
->exp
, 1) == arg2
)
3002 if (GET_CODE (p
->exp
) == COMPARE
3003 /* Another possibility is that this machine has a compare insn
3004 that includes the comparison code. In that case, ARG1 would
3005 be equivalent to a comparison operation that would set ARG1 to
3006 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3007 ORIG_CODE is the actual comparison being done; if it is an EQ,
3008 we must reverse ORIG_CODE. On machine with a negative value
3009 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3012 && val_signbit_known_set_p (inner_mode
,
3014 #ifdef FLOAT_STORE_FLAG_VALUE
3016 && SCALAR_FLOAT_MODE_P (inner_mode
)
3017 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3018 REAL_VALUE_NEGATIVE (fsfv
)))
3021 && COMPARISON_P (p
->exp
)))
3026 else if ((code
== EQ
3028 && val_signbit_known_set_p (inner_mode
,
3030 #ifdef FLOAT_STORE_FLAG_VALUE
3032 && SCALAR_FLOAT_MODE_P (inner_mode
)
3033 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3034 REAL_VALUE_NEGATIVE (fsfv
)))
3037 && COMPARISON_P (p
->exp
))
3044 /* If this non-trapping address, e.g. fp + constant, the
3045 equivalent is a better operand since it may let us predict
3046 the value of the comparison. */
3047 else if (!rtx_addr_can_trap_p (p
->exp
))
3054 /* If we didn't find a useful equivalence for ARG1, we are done.
3055 Otherwise, set up for the next iteration. */
3059 /* If we need to reverse the comparison, make sure that that is
3060 possible -- we can't necessarily infer the value of GE from LT
3061 with floating-point operands. */
3064 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3065 if (reversed
== UNKNOWN
)
3070 else if (COMPARISON_P (x
))
3071 code
= GET_CODE (x
);
3072 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3075 /* Return our results. Return the modes from before fold_rtx
3076 because fold_rtx might produce const_int, and then it's too late. */
3077 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3078 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3083 /* If X is a nontrivial arithmetic operation on an argument for which
3084 a constant value can be determined, return the result of operating
3085 on that value, as a constant. Otherwise, return X, possibly with
3086 one or more operands changed to a forward-propagated constant.
3088 If X is a register whose contents are known, we do NOT return
3089 those contents here; equiv_constant is called to perform that task.
3090 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3092 INSN is the insn that we may be modifying. If it is 0, make a copy
3093 of X before modifying it. */
3096 fold_rtx (rtx x
, rtx insn
)
3099 enum machine_mode mode
;
3105 /* Operands of X. */
3109 /* Constant equivalents of first three operands of X;
3110 0 when no such equivalent is known. */
3115 /* The mode of the first operand of X. We need this for sign and zero
3117 enum machine_mode mode_arg0
;
3122 /* Try to perform some initial simplifications on X. */
3123 code
= GET_CODE (x
);
3128 if ((new_rtx
= equiv_constant (x
)) != NULL_RTX
)
3141 /* No use simplifying an EXPR_LIST
3142 since they are used only for lists of args
3143 in a function call's REG_EQUAL note. */
3149 return prev_insn_cc0
;
3155 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3156 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3157 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3161 #ifdef NO_FUNCTION_CSE
3163 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3168 /* Anything else goes through the loop below. */
3173 mode
= GET_MODE (x
);
3177 mode_arg0
= VOIDmode
;
3179 /* Try folding our operands.
3180 Then see which ones have constant values known. */
3182 fmt
= GET_RTX_FORMAT (code
);
3183 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3186 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3187 enum machine_mode mode_arg
= GET_MODE (folded_arg
);
3189 switch (GET_CODE (folded_arg
))
3194 const_arg
= equiv_constant (folded_arg
);
3204 const_arg
= folded_arg
;
3209 folded_arg
= prev_insn_cc0
;
3210 mode_arg
= prev_insn_cc0_mode
;
3211 const_arg
= equiv_constant (folded_arg
);
3216 folded_arg
= fold_rtx (folded_arg
, insn
);
3217 const_arg
= equiv_constant (folded_arg
);
3221 /* For the first three operands, see if the operand
3222 is constant or equivalent to a constant. */
3226 folded_arg0
= folded_arg
;
3227 const_arg0
= const_arg
;
3228 mode_arg0
= mode_arg
;
3231 folded_arg1
= folded_arg
;
3232 const_arg1
= const_arg
;
3235 const_arg2
= const_arg
;
3239 /* Pick the least expensive of the argument and an equivalent constant
3242 && const_arg
!= folded_arg
3243 && COST_IN (const_arg
, code
, i
) <= COST_IN (folded_arg
, code
, i
)
3245 /* It's not safe to substitute the operand of a conversion
3246 operator with a constant, as the conversion's identity
3247 depends upon the mode of its operand. This optimization
3248 is handled by the call to simplify_unary_operation. */
3249 && (GET_RTX_CLASS (code
) != RTX_UNARY
3250 || GET_MODE (const_arg
) == mode_arg0
3251 || (code
!= ZERO_EXTEND
3252 && code
!= SIGN_EXTEND
3254 && code
!= FLOAT_TRUNCATE
3255 && code
!= FLOAT_EXTEND
3258 && code
!= UNSIGNED_FLOAT
3259 && code
!= UNSIGNED_FIX
)))
3260 folded_arg
= const_arg
;
3262 if (folded_arg
== XEXP (x
, i
))
3265 if (insn
== NULL_RTX
&& !changed
)
3268 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3273 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3274 consistent with the order in X. */
3275 if (canonicalize_change_group (insn
, x
))
3278 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3279 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3282 apply_change_group ();
3285 /* If X is an arithmetic operation, see if we can simplify it. */
3287 switch (GET_RTX_CLASS (code
))
3291 /* We can't simplify extension ops unless we know the
3293 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3294 && mode_arg0
== VOIDmode
)
3297 new_rtx
= simplify_unary_operation (code
, mode
,
3298 const_arg0
? const_arg0
: folded_arg0
,
3304 case RTX_COMM_COMPARE
:
3305 /* See what items are actually being compared and set FOLDED_ARG[01]
3306 to those values and CODE to the actual comparison code. If any are
3307 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3308 do anything if both operands are already known to be constant. */
3310 /* ??? Vector mode comparisons are not supported yet. */
3311 if (VECTOR_MODE_P (mode
))
3314 if (const_arg0
== 0 || const_arg1
== 0)
3316 struct table_elt
*p0
, *p1
;
3317 rtx true_rtx
, false_rtx
;
3318 enum machine_mode mode_arg1
;
3320 if (SCALAR_FLOAT_MODE_P (mode
))
3322 #ifdef FLOAT_STORE_FLAG_VALUE
3323 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3324 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3326 true_rtx
= NULL_RTX
;
3328 false_rtx
= CONST0_RTX (mode
);
3332 true_rtx
= const_true_rtx
;
3333 false_rtx
= const0_rtx
;
3336 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3337 &mode_arg0
, &mode_arg1
);
3339 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3340 what kinds of things are being compared, so we can't do
3341 anything with this comparison. */
3343 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3346 const_arg0
= equiv_constant (folded_arg0
);
3347 const_arg1
= equiv_constant (folded_arg1
);
3349 /* If we do not now have two constants being compared, see
3350 if we can nevertheless deduce some things about the
3352 if (const_arg0
== 0 || const_arg1
== 0)
3354 if (const_arg1
!= NULL
)
3356 rtx cheapest_simplification
;
3359 struct table_elt
*p
;
3361 /* See if we can find an equivalent of folded_arg0
3362 that gets us a cheaper expression, possibly a
3363 constant through simplifications. */
3364 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3369 cheapest_simplification
= x
;
3370 cheapest_cost
= COST (x
);
3372 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3376 /* If the entry isn't valid, skip it. */
3377 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3380 /* Try to simplify using this equivalence. */
3382 = simplify_relational_operation (code
, mode
,
3387 if (simp_result
== NULL
)
3390 cost
= COST (simp_result
);
3391 if (cost
< cheapest_cost
)
3393 cheapest_cost
= cost
;
3394 cheapest_simplification
= simp_result
;
3398 /* If we have a cheaper expression now, use that
3399 and try folding it further, from the top. */
3400 if (cheapest_simplification
!= x
)
3401 return fold_rtx (copy_rtx (cheapest_simplification
),
3406 /* See if the two operands are the same. */
3408 if ((REG_P (folded_arg0
)
3409 && REG_P (folded_arg1
)
3410 && (REG_QTY (REGNO (folded_arg0
))
3411 == REG_QTY (REGNO (folded_arg1
))))
3412 || ((p0
= lookup (folded_arg0
,
3413 SAFE_HASH (folded_arg0
, mode_arg0
),
3415 && (p1
= lookup (folded_arg1
,
3416 SAFE_HASH (folded_arg1
, mode_arg0
),
3418 && p0
->first_same_value
== p1
->first_same_value
))
3419 folded_arg1
= folded_arg0
;
3421 /* If FOLDED_ARG0 is a register, see if the comparison we are
3422 doing now is either the same as we did before or the reverse
3423 (we only check the reverse if not floating-point). */
3424 else if (REG_P (folded_arg0
))
3426 int qty
= REG_QTY (REGNO (folded_arg0
));
3428 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3430 struct qty_table_elem
*ent
= &qty_table
[qty
];
3432 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3433 || (! FLOAT_MODE_P (mode_arg0
)
3434 && comparison_dominates_p (ent
->comparison_code
,
3435 reverse_condition (code
))))
3436 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3438 && rtx_equal_p (ent
->comparison_const
,
3440 || (REG_P (folded_arg1
)
3441 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3443 if (comparison_dominates_p (ent
->comparison_code
, code
))
3458 /* If we are comparing against zero, see if the first operand is
3459 equivalent to an IOR with a constant. If so, we may be able to
3460 determine the result of this comparison. */
3461 if (const_arg1
== const0_rtx
&& !const_arg0
)
3463 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3467 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3468 && CONST_INT_P (inner_const
)
3469 && INTVAL (inner_const
) != 0)
3470 folded_arg0
= gen_rtx_IOR (mode_arg0
, XEXP (y
, 0), inner_const
);
3474 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
3475 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
3476 new_rtx
= simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
3481 case RTX_COMM_ARITH
:
3485 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3486 with that LABEL_REF as its second operand. If so, the result is
3487 the first operand of that MINUS. This handles switches with an
3488 ADDR_DIFF_VEC table. */
3489 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3492 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3493 : lookup_as_function (folded_arg0
, MINUS
);
3495 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3496 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
3499 /* Now try for a CONST of a MINUS like the above. */
3500 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3501 : lookup_as_function (folded_arg0
, CONST
))) != 0
3502 && GET_CODE (XEXP (y
, 0)) == MINUS
3503 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3504 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
3505 return XEXP (XEXP (y
, 0), 0);
3508 /* Likewise if the operands are in the other order. */
3509 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3512 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3513 : lookup_as_function (folded_arg1
, MINUS
);
3515 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3516 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
3519 /* Now try for a CONST of a MINUS like the above. */
3520 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3521 : lookup_as_function (folded_arg1
, CONST
))) != 0
3522 && GET_CODE (XEXP (y
, 0)) == MINUS
3523 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3524 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
3525 return XEXP (XEXP (y
, 0), 0);
3528 /* If second operand is a register equivalent to a negative
3529 CONST_INT, see if we can find a register equivalent to the
3530 positive constant. Make a MINUS if so. Don't do this for
3531 a non-negative constant since we might then alternate between
3532 choosing positive and negative constants. Having the positive
3533 constant previously-used is the more common case. Be sure
3534 the resulting constant is non-negative; if const_arg1 were
3535 the smallest negative number this would overflow: depending
3536 on the mode, this would either just be the same value (and
3537 hence not save anything) or be incorrect. */
3538 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
)
3539 && INTVAL (const_arg1
) < 0
3540 /* This used to test
3542 -INTVAL (const_arg1) >= 0
3544 But The Sun V5.0 compilers mis-compiled that test. So
3545 instead we test for the problematic value in a more direct
3546 manner and hope the Sun compilers get it correct. */
3547 && INTVAL (const_arg1
) !=
3548 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
3549 && REG_P (folded_arg1
))
3551 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3553 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3556 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3558 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3559 canon_reg (p
->exp
, NULL_RTX
));
3564 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3565 If so, produce (PLUS Z C2-C). */
3566 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
))
3568 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3569 if (y
&& CONST_INT_P (XEXP (y
, 1)))
3570 return fold_rtx (plus_constant (copy_rtx (y
),
3571 -INTVAL (const_arg1
)),
3578 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3579 case IOR
: case AND
: case XOR
:
3581 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3582 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3583 is known to be of similar form, we may be able to replace the
3584 operation with a combined operation. This may eliminate the
3585 intermediate operation if every use is simplified in this way.
3586 Note that the similar optimization done by combine.c only works
3587 if the intermediate operation's result has only one reference. */
3589 if (REG_P (folded_arg0
)
3590 && const_arg1
&& CONST_INT_P (const_arg1
))
3593 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3594 rtx y
, inner_const
, new_const
;
3595 rtx canon_const_arg1
= const_arg1
;
3596 enum rtx_code associate_code
;
3599 && (INTVAL (const_arg1
) >= GET_MODE_PRECISION (mode
)
3600 || INTVAL (const_arg1
) < 0))
3602 if (SHIFT_COUNT_TRUNCATED
)
3603 canon_const_arg1
= GEN_INT (INTVAL (const_arg1
)
3604 & (GET_MODE_BITSIZE (mode
)
3610 y
= lookup_as_function (folded_arg0
, code
);
3614 /* If we have compiled a statement like
3615 "if (x == (x & mask1))", and now are looking at
3616 "x & mask2", we will have a case where the first operand
3617 of Y is the same as our first operand. Unless we detect
3618 this case, an infinite loop will result. */
3619 if (XEXP (y
, 0) == folded_arg0
)
3622 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3623 if (!inner_const
|| !CONST_INT_P (inner_const
))
3626 /* Don't associate these operations if they are a PLUS with the
3627 same constant and it is a power of two. These might be doable
3628 with a pre- or post-increment. Similarly for two subtracts of
3629 identical powers of two with post decrement. */
3631 if (code
== PLUS
&& const_arg1
== inner_const
3632 && ((HAVE_PRE_INCREMENT
3633 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3634 || (HAVE_POST_INCREMENT
3635 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3636 || (HAVE_PRE_DECREMENT
3637 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
3638 || (HAVE_POST_DECREMENT
3639 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
3642 /* ??? Vector mode shifts by scalar
3643 shift operand are not supported yet. */
3644 if (is_shift
&& VECTOR_MODE_P (mode
))
3648 && (INTVAL (inner_const
) >= GET_MODE_PRECISION (mode
)
3649 || INTVAL (inner_const
) < 0))
3651 if (SHIFT_COUNT_TRUNCATED
)
3652 inner_const
= GEN_INT (INTVAL (inner_const
)
3653 & (GET_MODE_BITSIZE (mode
) - 1));
3658 /* Compute the code used to compose the constants. For example,
3659 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3661 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3663 new_const
= simplify_binary_operation (associate_code
, mode
,
3670 /* If we are associating shift operations, don't let this
3671 produce a shift of the size of the object or larger.
3672 This could occur when we follow a sign-extend by a right
3673 shift on a machine that does a sign-extend as a pair
3677 && CONST_INT_P (new_const
)
3678 && INTVAL (new_const
) >= GET_MODE_PRECISION (mode
))
3680 /* As an exception, we can turn an ASHIFTRT of this
3681 form into a shift of the number of bits - 1. */
3682 if (code
== ASHIFTRT
)
3683 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
3684 else if (!side_effects_p (XEXP (y
, 0)))
3685 return CONST0_RTX (mode
);
3690 y
= copy_rtx (XEXP (y
, 0));
3692 /* If Y contains our first operand (the most common way this
3693 can happen is if Y is a MEM), we would do into an infinite
3694 loop if we tried to fold it. So don't in that case. */
3696 if (! reg_mentioned_p (folded_arg0
, y
))
3697 y
= fold_rtx (y
, insn
);
3699 return simplify_gen_binary (code
, mode
, y
, new_const
);
3703 case DIV
: case UDIV
:
3704 /* ??? The associative optimization performed immediately above is
3705 also possible for DIV and UDIV using associate_code of MULT.
3706 However, we would need extra code to verify that the
3707 multiplication does not overflow, that is, there is no overflow
3708 in the calculation of new_const. */
3715 new_rtx
= simplify_binary_operation (code
, mode
,
3716 const_arg0
? const_arg0
: folded_arg0
,
3717 const_arg1
? const_arg1
: folded_arg1
);
3721 /* (lo_sum (high X) X) is simply X. */
3722 if (code
== LO_SUM
&& const_arg0
!= 0
3723 && GET_CODE (const_arg0
) == HIGH
3724 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3729 case RTX_BITFIELD_OPS
:
3730 new_rtx
= simplify_ternary_operation (code
, mode
, mode_arg0
,
3731 const_arg0
? const_arg0
: folded_arg0
,
3732 const_arg1
? const_arg1
: folded_arg1
,
3733 const_arg2
? const_arg2
: XEXP (x
, 2));
3740 return new_rtx
? new_rtx
: x
;
3743 /* Return a constant value currently equivalent to X.
3744 Return 0 if we don't know one. */
3747 equiv_constant (rtx x
)
3750 && REGNO_QTY_VALID_P (REGNO (x
)))
3752 int x_q
= REG_QTY (REGNO (x
));
3753 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3755 if (x_ent
->const_rtx
)
3756 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3759 if (x
== 0 || CONSTANT_P (x
))
3762 if (GET_CODE (x
) == SUBREG
)
3764 enum machine_mode mode
= GET_MODE (x
);
3765 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3768 /* See if we previously assigned a constant value to this SUBREG. */
3769 if ((new_rtx
= lookup_as_function (x
, CONST_INT
)) != 0
3770 || (new_rtx
= lookup_as_function (x
, CONST_DOUBLE
)) != 0
3771 || (new_rtx
= lookup_as_function (x
, CONST_FIXED
)) != 0)
3774 /* If we didn't and if doing so makes sense, see if we previously
3775 assigned a constant value to the enclosing word mode SUBREG. */
3776 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
)
3777 && GET_MODE_SIZE (word_mode
) < GET_MODE_SIZE (imode
))
3779 int byte
= SUBREG_BYTE (x
) - subreg_lowpart_offset (mode
, word_mode
);
3780 if (byte
>= 0 && (byte
% UNITS_PER_WORD
) == 0)
3782 rtx y
= gen_rtx_SUBREG (word_mode
, SUBREG_REG (x
), byte
);
3783 new_rtx
= lookup_as_function (y
, CONST_INT
);
3785 return gen_lowpart (mode
, new_rtx
);
3789 /* Otherwise see if we already have a constant for the inner REG. */
3790 if (REG_P (SUBREG_REG (x
))
3791 && (new_rtx
= equiv_constant (SUBREG_REG (x
))) != 0)
3792 return simplify_subreg (mode
, new_rtx
, imode
, SUBREG_BYTE (x
));
3797 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3798 the hash table in case its value was seen before. */
3802 struct table_elt
*elt
;
3804 x
= avoid_constant_pool_reference (x
);
3808 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3812 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3813 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3820 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3823 In certain cases, this can cause us to add an equivalence. For example,
3824 if we are following the taken case of
3826 we can add the fact that `i' and '2' are now equivalent.
3828 In any case, we can record that this comparison was passed. If the same
3829 comparison is seen later, we will know its value. */
3832 record_jump_equiv (rtx insn
, bool taken
)
3834 int cond_known_true
;
3837 enum machine_mode mode
, mode0
, mode1
;
3838 int reversed_nonequality
= 0;
3841 /* Ensure this is the right kind of insn. */
3842 gcc_assert (any_condjump_p (insn
));
3844 set
= pc_set (insn
);
3846 /* See if this jump condition is known true or false. */
3848 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3850 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3852 /* Get the type of comparison being done and the operands being compared.
3853 If we had to reverse a non-equality condition, record that fact so we
3854 know that it isn't valid for floating-point. */
3855 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3856 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3857 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3859 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3860 if (! cond_known_true
)
3862 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3864 /* Don't remember if we can't find the inverse. */
3865 if (code
== UNKNOWN
)
3869 /* The mode is the mode of the non-constant. */
3871 if (mode1
!= VOIDmode
)
3874 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3877 /* Yet another form of subreg creation. In this case, we want something in
3878 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3881 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
3883 enum machine_mode op_mode
= GET_MODE (op
);
3884 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3886 return lowpart_subreg (mode
, op
, op_mode
);
3889 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3890 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3891 Make any useful entries we can with that information. Called from
3892 above function and called recursively. */
3895 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
3896 rtx op1
, int reversed_nonequality
)
3898 unsigned op0_hash
, op1_hash
;
3899 int op0_in_memory
, op1_in_memory
;
3900 struct table_elt
*op0_elt
, *op1_elt
;
3902 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3903 we know that they are also equal in the smaller mode (this is also
3904 true for all smaller modes whether or not there is a SUBREG, but
3905 is not worth testing for with no SUBREG). */
3907 /* Note that GET_MODE (op0) may not equal MODE. */
3908 if (code
== EQ
&& paradoxical_subreg_p (op0
))
3910 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3911 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3913 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3914 reversed_nonequality
);
3917 if (code
== EQ
&& paradoxical_subreg_p (op1
))
3919 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3920 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3922 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3923 reversed_nonequality
);
3926 /* Similarly, if this is an NE comparison, and either is a SUBREG
3927 making a smaller mode, we know the whole thing is also NE. */
3929 /* Note that GET_MODE (op0) may not equal MODE;
3930 if we test MODE instead, we can get an infinite recursion
3931 alternating between two modes each wider than MODE. */
3933 if (code
== NE
&& GET_CODE (op0
) == SUBREG
3934 && subreg_lowpart_p (op0
)
3935 && (GET_MODE_SIZE (GET_MODE (op0
))
3936 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
3938 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3939 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3941 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3942 reversed_nonequality
);
3945 if (code
== NE
&& GET_CODE (op1
) == SUBREG
3946 && subreg_lowpart_p (op1
)
3947 && (GET_MODE_SIZE (GET_MODE (op1
))
3948 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
3950 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3951 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3953 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3954 reversed_nonequality
);
3957 /* Hash both operands. */
3960 hash_arg_in_memory
= 0;
3961 op0_hash
= HASH (op0
, mode
);
3962 op0_in_memory
= hash_arg_in_memory
;
3968 hash_arg_in_memory
= 0;
3969 op1_hash
= HASH (op1
, mode
);
3970 op1_in_memory
= hash_arg_in_memory
;
3975 /* Look up both operands. */
3976 op0_elt
= lookup (op0
, op0_hash
, mode
);
3977 op1_elt
= lookup (op1
, op1_hash
, mode
);
3979 /* If both operands are already equivalent or if they are not in the
3980 table but are identical, do nothing. */
3981 if ((op0_elt
!= 0 && op1_elt
!= 0
3982 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
3983 || op0
== op1
|| rtx_equal_p (op0
, op1
))
3986 /* If we aren't setting two things equal all we can do is save this
3987 comparison. Similarly if this is floating-point. In the latter
3988 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3989 If we record the equality, we might inadvertently delete code
3990 whose intent was to change -0 to +0. */
3992 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
3994 struct qty_table_elem
*ent
;
3997 /* If we reversed a floating-point comparison, if OP0 is not a
3998 register, or if OP1 is neither a register or constant, we can't
4002 op1
= equiv_constant (op1
);
4004 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4005 || !REG_P (op0
) || op1
== 0)
4008 /* Put OP0 in the hash table if it isn't already. This gives it a
4009 new quantity number. */
4012 if (insert_regs (op0
, NULL
, 0))
4014 rehash_using_reg (op0
);
4015 op0_hash
= HASH (op0
, mode
);
4017 /* If OP0 is contained in OP1, this changes its hash code
4018 as well. Faster to rehash than to check, except
4019 for the simple case of a constant. */
4020 if (! CONSTANT_P (op1
))
4021 op1_hash
= HASH (op1
,mode
);
4024 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4025 op0_elt
->in_memory
= op0_in_memory
;
4028 qty
= REG_QTY (REGNO (op0
));
4029 ent
= &qty_table
[qty
];
4031 ent
->comparison_code
= code
;
4034 /* Look it up again--in case op0 and op1 are the same. */
4035 op1_elt
= lookup (op1
, op1_hash
, mode
);
4037 /* Put OP1 in the hash table so it gets a new quantity number. */
4040 if (insert_regs (op1
, NULL
, 0))
4042 rehash_using_reg (op1
);
4043 op1_hash
= HASH (op1
, mode
);
4046 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4047 op1_elt
->in_memory
= op1_in_memory
;
4050 ent
->comparison_const
= NULL_RTX
;
4051 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4055 ent
->comparison_const
= op1
;
4056 ent
->comparison_qty
= -1;
4062 /* If either side is still missing an equivalence, make it now,
4063 then merge the equivalences. */
4067 if (insert_regs (op0
, NULL
, 0))
4069 rehash_using_reg (op0
);
4070 op0_hash
= HASH (op0
, mode
);
4073 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4074 op0_elt
->in_memory
= op0_in_memory
;
4079 if (insert_regs (op1
, NULL
, 0))
4081 rehash_using_reg (op1
);
4082 op1_hash
= HASH (op1
, mode
);
4085 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4086 op1_elt
->in_memory
= op1_in_memory
;
4089 merge_equiv_classes (op0_elt
, op1_elt
);
4092 /* CSE processing for one instruction.
4094 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4095 but the few that "leak through" are cleaned up by cse_insn, and complex
4096 addressing modes are often formed here.
4098 The main function is cse_insn, and between here and that function
4099 a couple of helper functions is defined to keep the size of cse_insn
4100 within reasonable proportions.
4102 Data is shared between the main and helper functions via STRUCT SET,
4103 that contains all data related for every set in the instruction that
4106 Note that cse_main processes all sets in the instruction. Most
4107 passes in GCC only process simple SET insns or single_set insns, but
4108 CSE processes insns with multiple sets as well. */
4110 /* Data on one SET contained in the instruction. */
4114 /* The SET rtx itself. */
4116 /* The SET_SRC of the rtx (the original value, if it is changing). */
4118 /* The hash-table element for the SET_SRC of the SET. */
4119 struct table_elt
*src_elt
;
4120 /* Hash value for the SET_SRC. */
4122 /* Hash value for the SET_DEST. */
4124 /* The SET_DEST, with SUBREG, etc., stripped. */
4126 /* Nonzero if the SET_SRC is in memory. */
4128 /* Nonzero if the SET_SRC contains something
4129 whose value cannot be predicted and understood. */
4131 /* Original machine mode, in case it becomes a CONST_INT.
4132 The size of this field should match the size of the mode
4133 field of struct rtx_def (see rtl.h). */
4134 ENUM_BITFIELD(machine_mode
) mode
: 8;
4135 /* A constant equivalent for SET_SRC, if any. */
4137 /* Hash value of constant equivalent for SET_SRC. */
4138 unsigned src_const_hash
;
4139 /* Table entry for constant equivalent for SET_SRC, if any. */
4140 struct table_elt
*src_const_elt
;
4141 /* Table entry for the destination address. */
4142 struct table_elt
*dest_addr_elt
;
4145 /* Special handling for (set REG0 REG1) where REG0 is the
4146 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4147 be used in the sequel, so (if easily done) change this insn to
4148 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4149 that computed their value. Then REG1 will become a dead store
4150 and won't cloud the situation for later optimizations.
4152 Do not make this change if REG1 is a hard register, because it will
4153 then be used in the sequel and we may be changing a two-operand insn
4154 into a three-operand insn.
4156 This is the last transformation that cse_insn will try to do. */
4159 try_back_substitute_reg (rtx set
, rtx insn
)
4161 rtx dest
= SET_DEST (set
);
4162 rtx src
= SET_SRC (set
);
4165 && REG_P (src
) && ! HARD_REGISTER_P (src
)
4166 && REGNO_QTY_VALID_P (REGNO (src
)))
4168 int src_q
= REG_QTY (REGNO (src
));
4169 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
4171 if (src_ent
->first_reg
== REGNO (dest
))
4173 /* Scan for the previous nonnote insn, but stop at a basic
4176 rtx bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
4179 prev
= PREV_INSN (prev
);
4181 while (prev
!= bb_head
&& (NOTE_P (prev
) || DEBUG_INSN_P (prev
)));
4183 /* Do not swap the registers around if the previous instruction
4184 attaches a REG_EQUIV note to REG1.
4186 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4187 from the pseudo that originally shadowed an incoming argument
4188 to another register. Some uses of REG_EQUIV might rely on it
4189 being attached to REG1 rather than REG2.
4191 This section previously turned the REG_EQUIV into a REG_EQUAL
4192 note. We cannot do that because REG_EQUIV may provide an
4193 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4194 if (NONJUMP_INSN_P (prev
)
4195 && GET_CODE (PATTERN (prev
)) == SET
4196 && SET_DEST (PATTERN (prev
)) == src
4197 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
4201 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
4202 validate_change (insn
, &SET_DEST (set
), src
, 1);
4203 validate_change (insn
, &SET_SRC (set
), dest
, 1);
4204 apply_change_group ();
4206 /* If INSN has a REG_EQUAL note, and this note mentions
4207 REG0, then we must delete it, because the value in
4208 REG0 has changed. If the note's value is REG1, we must
4209 also delete it because that is now this insn's dest. */
4210 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4212 && (reg_mentioned_p (dest
, XEXP (note
, 0))
4213 || rtx_equal_p (src
, XEXP (note
, 0))))
4214 remove_note (insn
, note
);
4220 /* Record all the SETs in this instruction into SETS_PTR,
4221 and return the number of recorded sets. */
4223 find_sets_in_insn (rtx insn
, struct set
**psets
)
4225 struct set
*sets
= *psets
;
4227 rtx x
= PATTERN (insn
);
4229 if (GET_CODE (x
) == SET
)
4231 /* Ignore SETs that are unconditional jumps.
4232 They never need cse processing, so this does not hurt.
4233 The reason is not efficiency but rather
4234 so that we can test at the end for instructions
4235 that have been simplified to unconditional jumps
4236 and not be misled by unchanged instructions
4237 that were unconditional jumps to begin with. */
4238 if (SET_DEST (x
) == pc_rtx
4239 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4241 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4242 The hard function value register is used only once, to copy to
4243 someplace else, so it isn't worth cse'ing. */
4244 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4247 sets
[n_sets
++].rtl
= x
;
4249 else if (GET_CODE (x
) == PARALLEL
)
4251 int i
, lim
= XVECLEN (x
, 0);
4253 /* Go over the epressions of the PARALLEL in forward order, to
4254 put them in the same order in the SETS array. */
4255 for (i
= 0; i
< lim
; i
++)
4257 rtx y
= XVECEXP (x
, 0, i
);
4258 if (GET_CODE (y
) == SET
)
4260 /* As above, we ignore unconditional jumps and call-insns and
4261 ignore the result of apply_change_group. */
4262 if (SET_DEST (y
) == pc_rtx
4263 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4265 else if (GET_CODE (SET_SRC (y
)) == CALL
)
4268 sets
[n_sets
++].rtl
= y
;
4276 /* Where possible, substitute every register reference in the N_SETS
4277 number of SETS in INSN with the the canonical register.
4279 Register canonicalization propagatest the earliest register (i.e.
4280 one that is set before INSN) with the same value. This is a very
4281 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4282 to RTL. For instance, a CONST for an address is usually expanded
4283 multiple times to loads into different registers, thus creating many
4284 subexpressions of the form:
4286 (set (reg1) (some_const))
4287 (set (mem (... reg1 ...) (thing)))
4288 (set (reg2) (some_const))
4289 (set (mem (... reg2 ...) (thing)))
4291 After canonicalizing, the code takes the following form:
4293 (set (reg1) (some_const))
4294 (set (mem (... reg1 ...) (thing)))
4295 (set (reg2) (some_const))
4296 (set (mem (... reg1 ...) (thing)))
4298 The set to reg2 is now trivially dead, and the memory reference (or
4299 address, or whatever) may be a candidate for further CSEing.
4301 In this function, the result of apply_change_group can be ignored;
4305 canonicalize_insn (rtx insn
, struct set
**psets
, int n_sets
)
4307 struct set
*sets
= *psets
;
4309 rtx x
= PATTERN (insn
);
4314 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4315 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4318 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
4320 canon_reg (SET_SRC (x
), insn
);
4321 apply_change_group ();
4322 fold_rtx (SET_SRC (x
), insn
);
4324 else if (GET_CODE (x
) == CLOBBER
)
4326 /* If we clobber memory, canon the address.
4327 This does nothing when a register is clobbered
4328 because we have already invalidated the reg. */
4329 if (MEM_P (XEXP (x
, 0)))
4330 canon_reg (XEXP (x
, 0), insn
);
4332 else if (GET_CODE (x
) == USE
4333 && ! (REG_P (XEXP (x
, 0))
4334 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4335 /* Canonicalize a USE of a pseudo register or memory location. */
4336 canon_reg (x
, insn
);
4337 else if (GET_CODE (x
) == ASM_OPERANDS
)
4339 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
4341 rtx input
= ASM_OPERANDS_INPUT (x
, i
);
4342 if (!(REG_P (input
) && REGNO (input
) < FIRST_PSEUDO_REGISTER
))
4344 input
= canon_reg (input
, insn
);
4345 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
), input
, 1);
4349 else if (GET_CODE (x
) == CALL
)
4351 canon_reg (x
, insn
);
4352 apply_change_group ();
4355 else if (DEBUG_INSN_P (insn
))
4356 canon_reg (PATTERN (insn
), insn
);
4357 else if (GET_CODE (x
) == PARALLEL
)
4359 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
4361 rtx y
= XVECEXP (x
, 0, i
);
4362 if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
4364 canon_reg (SET_SRC (y
), insn
);
4365 apply_change_group ();
4366 fold_rtx (SET_SRC (y
), insn
);
4368 else if (GET_CODE (y
) == CLOBBER
)
4370 if (MEM_P (XEXP (y
, 0)))
4371 canon_reg (XEXP (y
, 0), insn
);
4373 else if (GET_CODE (y
) == USE
4374 && ! (REG_P (XEXP (y
, 0))
4375 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4376 canon_reg (y
, insn
);
4377 else if (GET_CODE (y
) == CALL
)
4379 canon_reg (y
, insn
);
4380 apply_change_group ();
4386 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4387 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4389 /* We potentially will process this insn many times. Therefore,
4390 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4393 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4394 because cse_insn handles those specially. */
4395 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != STRICT_LOW_PART
4396 && rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
4397 remove_note (insn
, tem
);
4400 canon_reg (XEXP (tem
, 0), insn
);
4401 apply_change_group ();
4402 XEXP (tem
, 0) = fold_rtx (XEXP (tem
, 0), insn
);
4403 df_notes_rescan (insn
);
4407 /* Canonicalize sources and addresses of destinations.
4408 We do this in a separate pass to avoid problems when a MATCH_DUP is
4409 present in the insn pattern. In that case, we want to ensure that
4410 we don't break the duplicate nature of the pattern. So we will replace
4411 both operands at the same time. Otherwise, we would fail to find an
4412 equivalent substitution in the loop calling validate_change below.
4414 We used to suppress canonicalization of DEST if it appears in SRC,
4415 but we don't do this any more. */
4417 for (i
= 0; i
< n_sets
; i
++)
4419 rtx dest
= SET_DEST (sets
[i
].rtl
);
4420 rtx src
= SET_SRC (sets
[i
].rtl
);
4421 rtx new_rtx
= canon_reg (src
, insn
);
4423 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
4425 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4427 validate_change (insn
, &XEXP (dest
, 1),
4428 canon_reg (XEXP (dest
, 1), insn
), 1);
4429 validate_change (insn
, &XEXP (dest
, 2),
4430 canon_reg (XEXP (dest
, 2), insn
), 1);
4433 while (GET_CODE (dest
) == SUBREG
4434 || GET_CODE (dest
) == ZERO_EXTRACT
4435 || GET_CODE (dest
) == STRICT_LOW_PART
)
4436 dest
= XEXP (dest
, 0);
4439 canon_reg (dest
, insn
);
4442 /* Now that we have done all the replacements, we can apply the change
4443 group and see if they all work. Note that this will cause some
4444 canonicalizations that would have worked individually not to be applied
4445 because some other canonicalization didn't work, but this should not
4448 The result of apply_change_group can be ignored; see canon_reg. */
4450 apply_change_group ();
4453 /* Main function of CSE.
4454 First simplify sources and addresses of all assignments
4455 in the instruction, using previously-computed equivalents values.
4456 Then install the new sources and destinations in the table
4457 of available values. */
4462 rtx x
= PATTERN (insn
);
4468 struct table_elt
*src_eqv_elt
= 0;
4469 int src_eqv_volatile
= 0;
4470 int src_eqv_in_memory
= 0;
4471 unsigned src_eqv_hash
= 0;
4473 struct set
*sets
= (struct set
*) 0;
4475 if (GET_CODE (x
) == SET
)
4476 sets
= XALLOCA (struct set
);
4477 else if (GET_CODE (x
) == PARALLEL
)
4478 sets
= XALLOCAVEC (struct set
, XVECLEN (x
, 0));
4482 /* Records what this insn does to set CC0. */
4484 this_insn_cc0_mode
= VOIDmode
;
4487 /* Find all regs explicitly clobbered in this insn,
4488 to ensure they are not replaced with any other regs
4489 elsewhere in this insn. */
4490 invalidate_from_sets_and_clobbers (insn
);
4492 /* Record all the SETs in this instruction. */
4493 n_sets
= find_sets_in_insn (insn
, &sets
);
4495 /* Substitute the canonical register where possible. */
4496 canonicalize_insn (insn
, &sets
, n_sets
);
4498 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4499 if different, or if the DEST is a STRICT_LOW_PART. The latter condition
4500 is necessary because SRC_EQV is handled specially for this case, and if
4501 it isn't set, then there will be no equivalence for the destination. */
4502 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4503 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4504 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4505 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4506 src_eqv
= copy_rtx (XEXP (tem
, 0));
4508 /* Set sets[i].src_elt to the class each source belongs to.
4509 Detect assignments from or to volatile things
4510 and set set[i] to zero so they will be ignored
4511 in the rest of this function.
4513 Nothing in this loop changes the hash table or the register chains. */
4515 for (i
= 0; i
< n_sets
; i
++)
4517 bool repeat
= false;
4520 struct table_elt
*elt
= 0, *p
;
4521 enum machine_mode mode
;
4524 rtx src_related
= 0;
4525 bool src_related_is_const_anchor
= false;
4526 struct table_elt
*src_const_elt
= 0;
4527 int src_cost
= MAX_COST
;
4528 int src_eqv_cost
= MAX_COST
;
4529 int src_folded_cost
= MAX_COST
;
4530 int src_related_cost
= MAX_COST
;
4531 int src_elt_cost
= MAX_COST
;
4532 int src_regcost
= MAX_COST
;
4533 int src_eqv_regcost
= MAX_COST
;
4534 int src_folded_regcost
= MAX_COST
;
4535 int src_related_regcost
= MAX_COST
;
4536 int src_elt_regcost
= MAX_COST
;
4537 /* Set nonzero if we need to call force_const_mem on with the
4538 contents of src_folded before using it. */
4539 int src_folded_force_flag
= 0;
4541 dest
= SET_DEST (sets
[i
].rtl
);
4542 src
= SET_SRC (sets
[i
].rtl
);
4544 /* If SRC is a constant that has no machine mode,
4545 hash it with the destination's machine mode.
4546 This way we can keep different modes separate. */
4548 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4549 sets
[i
].mode
= mode
;
4553 enum machine_mode eqvmode
= mode
;
4554 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4555 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4557 hash_arg_in_memory
= 0;
4558 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4560 /* Find the equivalence class for the equivalent expression. */
4563 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4565 src_eqv_volatile
= do_not_record
;
4566 src_eqv_in_memory
= hash_arg_in_memory
;
4569 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4570 value of the INNER register, not the destination. So it is not
4571 a valid substitution for the source. But save it for later. */
4572 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4575 src_eqv_here
= src_eqv
;
4577 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4578 simplified result, which may not necessarily be valid. */
4579 src_folded
= fold_rtx (src
, insn
);
4582 /* ??? This caused bad code to be generated for the m68k port with -O2.
4583 Suppose src is (CONST_INT -1), and that after truncation src_folded
4584 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4585 At the end we will add src and src_const to the same equivalence
4586 class. We now have 3 and -1 on the same equivalence class. This
4587 causes later instructions to be mis-optimized. */
4588 /* If storing a constant in a bitfield, pre-truncate the constant
4589 so we will be able to record it later. */
4590 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4592 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4594 if (CONST_INT_P (src
)
4595 && CONST_INT_P (width
)
4596 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4597 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4599 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4600 << INTVAL (width
)) - 1));
4604 /* Compute SRC's hash code, and also notice if it
4605 should not be recorded at all. In that case,
4606 prevent any further processing of this assignment. */
4608 hash_arg_in_memory
= 0;
4611 sets
[i
].src_hash
= HASH (src
, mode
);
4612 sets
[i
].src_volatile
= do_not_record
;
4613 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4615 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4616 a pseudo, do not record SRC. Using SRC as a replacement for
4617 anything else will be incorrect in that situation. Note that
4618 this usually occurs only for stack slots, in which case all the
4619 RTL would be referring to SRC, so we don't lose any optimization
4620 opportunities by not having SRC in the hash table. */
4623 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4625 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4626 sets
[i
].src_volatile
= 1;
4629 /* It is no longer clear why we used to do this, but it doesn't
4630 appear to still be needed. So let's try without it since this
4631 code hurts cse'ing widened ops. */
4632 /* If source is a paradoxical subreg (such as QI treated as an SI),
4633 treat it as volatile. It may do the work of an SI in one context
4634 where the extra bits are not being used, but cannot replace an SI
4636 if (paradoxical_subreg_p (src
))
4637 sets
[i
].src_volatile
= 1;
4640 /* Locate all possible equivalent forms for SRC. Try to replace
4641 SRC in the insn with each cheaper equivalent.
4643 We have the following types of equivalents: SRC itself, a folded
4644 version, a value given in a REG_EQUAL note, or a value related
4647 Each of these equivalents may be part of an additional class
4648 of equivalents (if more than one is in the table, they must be in
4649 the same class; we check for this).
4651 If the source is volatile, we don't do any table lookups.
4653 We note any constant equivalent for possible later use in a
4656 if (!sets
[i
].src_volatile
)
4657 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4659 sets
[i
].src_elt
= elt
;
4661 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4663 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4665 /* The REG_EQUAL is indicating that two formerly distinct
4666 classes are now equivalent. So merge them. */
4667 merge_equiv_classes (elt
, src_eqv_elt
);
4668 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4669 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4675 else if (src_eqv_elt
)
4678 /* Try to find a constant somewhere and record it in `src_const'.
4679 Record its table element, if any, in `src_const_elt'. Look in
4680 any known equivalences first. (If the constant is not in the
4681 table, also set `sets[i].src_const_hash'). */
4683 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4687 src_const_elt
= elt
;
4692 && (CONSTANT_P (src_folded
)
4693 /* Consider (minus (label_ref L1) (label_ref L2)) as
4694 "constant" here so we will record it. This allows us
4695 to fold switch statements when an ADDR_DIFF_VEC is used. */
4696 || (GET_CODE (src_folded
) == MINUS
4697 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4698 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4699 src_const
= src_folded
, src_const_elt
= elt
;
4700 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4701 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4703 /* If we don't know if the constant is in the table, get its
4704 hash code and look it up. */
4705 if (src_const
&& src_const_elt
== 0)
4707 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4708 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4711 sets
[i
].src_const
= src_const
;
4712 sets
[i
].src_const_elt
= src_const_elt
;
4714 /* If the constant and our source are both in the table, mark them as
4715 equivalent. Otherwise, if a constant is in the table but the source
4716 isn't, set ELT to it. */
4717 if (src_const_elt
&& elt
4718 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4719 merge_equiv_classes (elt
, src_const_elt
);
4720 else if (src_const_elt
&& elt
== 0)
4721 elt
= src_const_elt
;
4723 /* See if there is a register linearly related to a constant
4724 equivalent of SRC. */
4726 && (GET_CODE (src_const
) == CONST
4727 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4729 src_related
= use_related_value (src_const
, src_const_elt
);
4732 struct table_elt
*src_related_elt
4733 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4734 if (src_related_elt
&& elt
)
4736 if (elt
->first_same_value
4737 != src_related_elt
->first_same_value
)
4738 /* This can occur when we previously saw a CONST
4739 involving a SYMBOL_REF and then see the SYMBOL_REF
4740 twice. Merge the involved classes. */
4741 merge_equiv_classes (elt
, src_related_elt
);
4744 src_related_elt
= 0;
4746 else if (src_related_elt
&& elt
== 0)
4747 elt
= src_related_elt
;
4751 /* See if we have a CONST_INT that is already in a register in a
4754 if (src_const
&& src_related
== 0 && CONST_INT_P (src_const
)
4755 && GET_MODE_CLASS (mode
) == MODE_INT
4756 && GET_MODE_PRECISION (mode
) < BITS_PER_WORD
)
4758 enum machine_mode wider_mode
;
4760 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
4761 wider_mode
!= VOIDmode
4762 && GET_MODE_PRECISION (wider_mode
) <= BITS_PER_WORD
4763 && src_related
== 0;
4764 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4766 struct table_elt
*const_elt
4767 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4772 for (const_elt
= const_elt
->first_same_value
;
4773 const_elt
; const_elt
= const_elt
->next_same_value
)
4774 if (REG_P (const_elt
->exp
))
4776 src_related
= gen_lowpart (mode
, const_elt
->exp
);
4782 /* Another possibility is that we have an AND with a constant in
4783 a mode narrower than a word. If so, it might have been generated
4784 as part of an "if" which would narrow the AND. If we already
4785 have done the AND in a wider mode, we can use a SUBREG of that
4788 if (flag_expensive_optimizations
&& ! src_related
4789 && GET_CODE (src
) == AND
&& CONST_INT_P (XEXP (src
, 1))
4790 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4792 enum machine_mode tmode
;
4793 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4795 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4796 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4797 tmode
= GET_MODE_WIDER_MODE (tmode
))
4799 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4800 struct table_elt
*larger_elt
;
4804 PUT_MODE (new_and
, tmode
);
4805 XEXP (new_and
, 0) = inner
;
4806 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4807 if (larger_elt
== 0)
4810 for (larger_elt
= larger_elt
->first_same_value
;
4811 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4812 if (REG_P (larger_elt
->exp
))
4815 = gen_lowpart (mode
, larger_elt
->exp
);
4825 #ifdef LOAD_EXTEND_OP
4826 /* See if a MEM has already been loaded with a widening operation;
4827 if it has, we can use a subreg of that. Many CISC machines
4828 also have such operations, but this is only likely to be
4829 beneficial on these machines. */
4831 if (flag_expensive_optimizations
&& src_related
== 0
4832 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4833 && GET_MODE_CLASS (mode
) == MODE_INT
4834 && MEM_P (src
) && ! do_not_record
4835 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
4837 struct rtx_def memory_extend_buf
;
4838 rtx memory_extend_rtx
= &memory_extend_buf
;
4839 enum machine_mode tmode
;
4841 /* Set what we are trying to extend and the operation it might
4842 have been extended with. */
4843 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
4844 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
4845 XEXP (memory_extend_rtx
, 0) = src
;
4847 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4848 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4849 tmode
= GET_MODE_WIDER_MODE (tmode
))
4851 struct table_elt
*larger_elt
;
4853 PUT_MODE (memory_extend_rtx
, tmode
);
4854 larger_elt
= lookup (memory_extend_rtx
,
4855 HASH (memory_extend_rtx
, tmode
), tmode
);
4856 if (larger_elt
== 0)
4859 for (larger_elt
= larger_elt
->first_same_value
;
4860 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4861 if (REG_P (larger_elt
->exp
))
4863 src_related
= gen_lowpart (mode
, larger_elt
->exp
);
4871 #endif /* LOAD_EXTEND_OP */
4873 /* Try to express the constant using a register+offset expression
4874 derived from a constant anchor. */
4876 if (targetm
.const_anchor
4879 && GET_CODE (src_const
) == CONST_INT
)
4881 src_related
= try_const_anchors (src_const
, mode
);
4882 src_related_is_const_anchor
= src_related
!= NULL_RTX
;
4886 if (src
== src_folded
)
4889 /* At this point, ELT, if nonzero, points to a class of expressions
4890 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4891 and SRC_RELATED, if nonzero, each contain additional equivalent
4892 expressions. Prune these latter expressions by deleting expressions
4893 already in the equivalence class.
4895 Check for an equivalent identical to the destination. If found,
4896 this is the preferred equivalent since it will likely lead to
4897 elimination of the insn. Indicate this by placing it in
4901 elt
= elt
->first_same_value
;
4902 for (p
= elt
; p
; p
= p
->next_same_value
)
4904 enum rtx_code code
= GET_CODE (p
->exp
);
4906 /* If the expression is not valid, ignore it. Then we do not
4907 have to check for validity below. In most cases, we can use
4908 `rtx_equal_p', since canonicalization has already been done. */
4909 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
4912 /* Also skip paradoxical subregs, unless that's what we're
4914 if (paradoxical_subreg_p (p
->exp
)
4916 && GET_CODE (src
) == SUBREG
4917 && GET_MODE (src
) == GET_MODE (p
->exp
)
4918 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
4919 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
4922 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
4924 else if (src_folded
&& GET_CODE (src_folded
) == code
4925 && rtx_equal_p (src_folded
, p
->exp
))
4927 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
4928 && rtx_equal_p (src_eqv_here
, p
->exp
))
4930 else if (src_related
&& GET_CODE (src_related
) == code
4931 && rtx_equal_p (src_related
, p
->exp
))
4934 /* This is the same as the destination of the insns, we want
4935 to prefer it. Copy it to src_related. The code below will
4936 then give it a negative cost. */
4937 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
4941 /* Find the cheapest valid equivalent, trying all the available
4942 possibilities. Prefer items not in the hash table to ones
4943 that are when they are equal cost. Note that we can never
4944 worsen an insn as the current contents will also succeed.
4945 If we find an equivalent identical to the destination, use it as best,
4946 since this insn will probably be eliminated in that case. */
4949 if (rtx_equal_p (src
, dest
))
4950 src_cost
= src_regcost
= -1;
4953 src_cost
= COST (src
);
4954 src_regcost
= approx_reg_cost (src
);
4960 if (rtx_equal_p (src_eqv_here
, dest
))
4961 src_eqv_cost
= src_eqv_regcost
= -1;
4964 src_eqv_cost
= COST (src_eqv_here
);
4965 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
4971 if (rtx_equal_p (src_folded
, dest
))
4972 src_folded_cost
= src_folded_regcost
= -1;
4975 src_folded_cost
= COST (src_folded
);
4976 src_folded_regcost
= approx_reg_cost (src_folded
);
4982 if (rtx_equal_p (src_related
, dest
))
4983 src_related_cost
= src_related_regcost
= -1;
4986 src_related_cost
= COST (src_related
);
4987 src_related_regcost
= approx_reg_cost (src_related
);
4989 /* If a const-anchor is used to synthesize a constant that
4990 normally requires multiple instructions then slightly prefer
4991 it over the original sequence. These instructions are likely
4992 to become redundant now. We can't compare against the cost
4993 of src_eqv_here because, on MIPS for example, multi-insn
4994 constants have zero cost; they are assumed to be hoisted from
4996 if (src_related_is_const_anchor
4997 && src_related_cost
== src_cost
5003 /* If this was an indirect jump insn, a known label will really be
5004 cheaper even though it looks more expensive. */
5005 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5006 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5008 /* Terminate loop when replacement made. This must terminate since
5009 the current contents will be tested and will always be valid. */
5014 /* Skip invalid entries. */
5015 while (elt
&& !REG_P (elt
->exp
)
5016 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5017 elt
= elt
->next_same_value
;
5019 /* A paradoxical subreg would be bad here: it'll be the right
5020 size, but later may be adjusted so that the upper bits aren't
5021 what we want. So reject it. */
5023 && paradoxical_subreg_p (elt
->exp
)
5024 /* It is okay, though, if the rtx we're trying to match
5025 will ignore any of the bits we can't predict. */
5027 && GET_CODE (src
) == SUBREG
5028 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5029 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5030 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5032 elt
= elt
->next_same_value
;
5038 src_elt_cost
= elt
->cost
;
5039 src_elt_regcost
= elt
->regcost
;
5042 /* Find cheapest and skip it for the next time. For items
5043 of equal cost, use this order:
5044 src_folded, src, src_eqv, src_related and hash table entry. */
5046 && preferable (src_folded_cost
, src_folded_regcost
,
5047 src_cost
, src_regcost
) <= 0
5048 && preferable (src_folded_cost
, src_folded_regcost
,
5049 src_eqv_cost
, src_eqv_regcost
) <= 0
5050 && preferable (src_folded_cost
, src_folded_regcost
,
5051 src_related_cost
, src_related_regcost
) <= 0
5052 && preferable (src_folded_cost
, src_folded_regcost
,
5053 src_elt_cost
, src_elt_regcost
) <= 0)
5055 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5056 if (src_folded_force_flag
)
5058 rtx forced
= force_const_mem (mode
, trial
);
5064 && preferable (src_cost
, src_regcost
,
5065 src_eqv_cost
, src_eqv_regcost
) <= 0
5066 && preferable (src_cost
, src_regcost
,
5067 src_related_cost
, src_related_regcost
) <= 0
5068 && preferable (src_cost
, src_regcost
,
5069 src_elt_cost
, src_elt_regcost
) <= 0)
5070 trial
= src
, src_cost
= MAX_COST
;
5071 else if (src_eqv_here
5072 && preferable (src_eqv_cost
, src_eqv_regcost
,
5073 src_related_cost
, src_related_regcost
) <= 0
5074 && preferable (src_eqv_cost
, src_eqv_regcost
,
5075 src_elt_cost
, src_elt_regcost
) <= 0)
5076 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
5077 else if (src_related
5078 && preferable (src_related_cost
, src_related_regcost
,
5079 src_elt_cost
, src_elt_regcost
) <= 0)
5080 trial
= src_related
, src_related_cost
= MAX_COST
;
5084 elt
= elt
->next_same_value
;
5085 src_elt_cost
= MAX_COST
;
5088 /* Avoid creation of overlapping memory moves. */
5089 if (MEM_P (trial
) && MEM_P (SET_DEST (sets
[i
].rtl
)))
5093 /* BLKmode moves are not handled by cse anyway. */
5094 if (GET_MODE (trial
) == BLKmode
)
5097 src
= canon_rtx (trial
);
5098 dest
= canon_rtx (SET_DEST (sets
[i
].rtl
));
5100 if (!MEM_P (src
) || !MEM_P (dest
)
5101 || !nonoverlapping_memrefs_p (src
, dest
, false))
5106 (set (reg:M N) (const_int A))
5107 (set (reg:M2 O) (const_int B))
5108 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5110 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5111 && CONST_INT_P (trial
)
5112 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5113 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5114 && REG_P (XEXP (SET_DEST (sets
[i
].rtl
), 0))
5115 && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets
[i
].rtl
)))
5116 >= INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1)))
5117 && ((unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5118 + (unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5119 <= HOST_BITS_PER_WIDE_INT
))
5121 rtx dest_reg
= XEXP (SET_DEST (sets
[i
].rtl
), 0);
5122 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5123 rtx pos
= XEXP (SET_DEST (sets
[i
].rtl
), 2);
5124 unsigned int dest_hash
= HASH (dest_reg
, GET_MODE (dest_reg
));
5125 struct table_elt
*dest_elt
5126 = lookup (dest_reg
, dest_hash
, GET_MODE (dest_reg
));
5127 rtx dest_cst
= NULL
;
5130 for (p
= dest_elt
->first_same_value
; p
; p
= p
->next_same_value
)
5131 if (p
->is_const
&& CONST_INT_P (p
->exp
))
5138 HOST_WIDE_INT val
= INTVAL (dest_cst
);
5141 if (BITS_BIG_ENDIAN
)
5142 shift
= GET_MODE_PRECISION (GET_MODE (dest_reg
))
5143 - INTVAL (pos
) - INTVAL (width
);
5145 shift
= INTVAL (pos
);
5146 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
5147 mask
= ~(HOST_WIDE_INT
) 0;
5149 mask
= ((HOST_WIDE_INT
) 1 << INTVAL (width
)) - 1;
5150 val
&= ~(mask
<< shift
);
5151 val
|= (INTVAL (trial
) & mask
) << shift
;
5152 val
= trunc_int_for_mode (val
, GET_MODE (dest_reg
));
5153 validate_unshare_change (insn
, &SET_DEST (sets
[i
].rtl
),
5155 validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5157 if (apply_change_group ())
5159 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5162 remove_note (insn
, note
);
5163 df_notes_rescan (insn
);
5167 src_eqv_volatile
= 0;
5168 src_eqv_in_memory
= 0;
5176 /* We don't normally have an insn matching (set (pc) (pc)), so
5177 check for this separately here. We will delete such an
5180 For other cases such as a table jump or conditional jump
5181 where we know the ultimate target, go ahead and replace the
5182 operand. While that may not make a valid insn, we will
5183 reemit the jump below (and also insert any necessary
5185 if (n_sets
== 1 && dest
== pc_rtx
5187 || (GET_CODE (trial
) == LABEL_REF
5188 && ! condjump_p (insn
))))
5190 /* Don't substitute non-local labels, this confuses CFG. */
5191 if (GET_CODE (trial
) == LABEL_REF
5192 && LABEL_REF_NONLOCAL_P (trial
))
5195 SET_SRC (sets
[i
].rtl
) = trial
;
5196 cse_jumps_altered
= true;
5200 /* Reject certain invalid forms of CONST that we create. */
5201 else if (CONSTANT_P (trial
)
5202 && GET_CODE (trial
) == CONST
5203 /* Reject cases that will cause decode_rtx_const to
5204 die. On the alpha when simplifying a switch, we
5205 get (const (truncate (minus (label_ref)
5207 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5208 /* Likewise on IA-64, except without the
5210 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5211 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5212 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5213 /* Do nothing for this case. */
5216 /* Look for a substitution that makes a valid insn. */
5217 else if (validate_unshare_change
5218 (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5220 rtx new_rtx
= canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5222 /* The result of apply_change_group can be ignored; see
5225 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
5226 apply_change_group ();
5231 /* If we previously found constant pool entries for
5232 constants and this is a constant, try making a
5233 pool entry. Put it in src_folded unless we already have done
5234 this since that is where it likely came from. */
5236 else if (constant_pool_entries_cost
5237 && CONSTANT_P (trial
)
5239 || (!MEM_P (src_folded
)
5240 && ! src_folded_force_flag
))
5241 && GET_MODE_CLASS (mode
) != MODE_CC
5242 && mode
!= VOIDmode
)
5244 src_folded_force_flag
= 1;
5246 src_folded_cost
= constant_pool_entries_cost
;
5247 src_folded_regcost
= constant_pool_entries_regcost
;
5251 /* If we changed the insn too much, handle this set from scratch. */
5258 src
= SET_SRC (sets
[i
].rtl
);
5260 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5261 However, there is an important exception: If both are registers
5262 that are not the head of their equivalence class, replace SET_SRC
5263 with the head of the class. If we do not do this, we will have
5264 both registers live over a portion of the basic block. This way,
5265 their lifetimes will likely abut instead of overlapping. */
5267 && REGNO_QTY_VALID_P (REGNO (dest
)))
5269 int dest_q
= REG_QTY (REGNO (dest
));
5270 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5272 if (dest_ent
->mode
== GET_MODE (dest
)
5273 && dest_ent
->first_reg
!= REGNO (dest
)
5274 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5275 /* Don't do this if the original insn had a hard reg as
5276 SET_SRC or SET_DEST. */
5277 && (!REG_P (sets
[i
].src
)
5278 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5279 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5280 /* We can't call canon_reg here because it won't do anything if
5281 SRC is a hard register. */
5283 int src_q
= REG_QTY (REGNO (src
));
5284 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5285 int first
= src_ent
->first_reg
;
5287 = (first
>= FIRST_PSEUDO_REGISTER
5288 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5290 /* We must use validate-change even for this, because this
5291 might be a special no-op instruction, suitable only to
5293 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5296 /* If we had a constant that is cheaper than what we are now
5297 setting SRC to, use that constant. We ignored it when we
5298 thought we could make this into a no-op. */
5299 if (src_const
&& COST (src_const
) < COST (src
)
5300 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5307 /* If we made a change, recompute SRC values. */
5308 if (src
!= sets
[i
].src
)
5311 hash_arg_in_memory
= 0;
5313 sets
[i
].src_hash
= HASH (src
, mode
);
5314 sets
[i
].src_volatile
= do_not_record
;
5315 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5316 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5319 /* If this is a single SET, we are setting a register, and we have an
5320 equivalent constant, we want to add a REG_NOTE. We don't want
5321 to write a REG_EQUAL note for a constant pseudo since verifying that
5322 that pseudo hasn't been eliminated is a pain. Such a note also
5323 won't help anything.
5325 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5326 which can be created for a reference to a compile time computable
5327 entry in a jump table. */
5329 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5330 && !REG_P (src_const
)
5331 && ! (GET_CODE (src_const
) == CONST
5332 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5333 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5334 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5336 /* We only want a REG_EQUAL note if src_const != src. */
5337 if (! rtx_equal_p (src
, src_const
))
5339 /* Make sure that the rtx is not shared. */
5340 src_const
= copy_rtx (src_const
);
5342 /* Record the actual constant value in a REG_EQUAL note,
5343 making a new one if one does not already exist. */
5344 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5345 df_notes_rescan (insn
);
5349 /* Now deal with the destination. */
5352 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5353 while (GET_CODE (dest
) == SUBREG
5354 || GET_CODE (dest
) == ZERO_EXTRACT
5355 || GET_CODE (dest
) == STRICT_LOW_PART
)
5356 dest
= XEXP (dest
, 0);
5358 sets
[i
].inner_dest
= dest
;
5362 #ifdef PUSH_ROUNDING
5363 /* Stack pushes invalidate the stack pointer. */
5364 rtx addr
= XEXP (dest
, 0);
5365 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5366 && XEXP (addr
, 0) == stack_pointer_rtx
)
5367 invalidate (stack_pointer_rtx
, VOIDmode
);
5369 dest
= fold_rtx (dest
, insn
);
5372 /* Compute the hash code of the destination now,
5373 before the effects of this instruction are recorded,
5374 since the register values used in the address computation
5375 are those before this instruction. */
5376 sets
[i
].dest_hash
= HASH (dest
, mode
);
5378 /* Don't enter a bit-field in the hash table
5379 because the value in it after the store
5380 may not equal what was stored, due to truncation. */
5382 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5384 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5386 if (src_const
!= 0 && CONST_INT_P (src_const
)
5387 && CONST_INT_P (width
)
5388 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5389 && ! (INTVAL (src_const
)
5390 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5391 /* Exception: if the value is constant,
5392 and it won't be truncated, record it. */
5396 /* This is chosen so that the destination will be invalidated
5397 but no new value will be recorded.
5398 We must invalidate because sometimes constant
5399 values can be recorded for bitfields. */
5400 sets
[i
].src_elt
= 0;
5401 sets
[i
].src_volatile
= 1;
5407 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5409 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5411 /* One less use of the label this insn used to jump to. */
5412 delete_insn_and_edges (insn
);
5413 cse_jumps_altered
= true;
5414 /* No more processing for this set. */
5418 /* If this SET is now setting PC to a label, we know it used to
5419 be a conditional or computed branch. */
5420 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5421 && !LABEL_REF_NONLOCAL_P (src
))
5423 /* We reemit the jump in as many cases as possible just in
5424 case the form of an unconditional jump is significantly
5425 different than a computed jump or conditional jump.
5427 If this insn has multiple sets, then reemitting the
5428 jump is nontrivial. So instead we just force rerecognition
5429 and hope for the best. */
5434 new_rtx
= emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
5435 JUMP_LABEL (new_rtx
) = XEXP (src
, 0);
5436 LABEL_NUSES (XEXP (src
, 0))++;
5438 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5439 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5442 XEXP (note
, 1) = NULL_RTX
;
5443 REG_NOTES (new_rtx
) = note
;
5446 delete_insn_and_edges (insn
);
5450 INSN_CODE (insn
) = -1;
5452 /* Do not bother deleting any unreachable code, let jump do it. */
5453 cse_jumps_altered
= true;
5457 /* If destination is volatile, invalidate it and then do no further
5458 processing for this assignment. */
5460 else if (do_not_record
)
5462 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5463 invalidate (dest
, VOIDmode
);
5464 else if (MEM_P (dest
))
5465 invalidate (dest
, VOIDmode
);
5466 else if (GET_CODE (dest
) == STRICT_LOW_PART
5467 || GET_CODE (dest
) == ZERO_EXTRACT
)
5468 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5472 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5473 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5476 /* If setting CC0, record what it was set to, or a constant, if it
5477 is equivalent to a constant. If it is being set to a floating-point
5478 value, make a COMPARE with the appropriate constant of 0. If we
5479 don't do this, later code can interpret this as a test against
5480 const0_rtx, which can cause problems if we try to put it into an
5481 insn as a floating-point operand. */
5482 if (dest
== cc0_rtx
)
5484 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5485 this_insn_cc0_mode
= mode
;
5486 if (FLOAT_MODE_P (mode
))
5487 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5493 /* Now enter all non-volatile source expressions in the hash table
5494 if they are not already present.
5495 Record their equivalence classes in src_elt.
5496 This way we can insert the corresponding destinations into
5497 the same classes even if the actual sources are no longer in them
5498 (having been invalidated). */
5500 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5501 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5503 struct table_elt
*elt
;
5504 struct table_elt
*classp
= sets
[0].src_elt
;
5505 rtx dest
= SET_DEST (sets
[0].rtl
);
5506 enum machine_mode eqvmode
= GET_MODE (dest
);
5508 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5510 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5513 if (insert_regs (src_eqv
, classp
, 0))
5515 rehash_using_reg (src_eqv
);
5516 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5518 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5519 elt
->in_memory
= src_eqv_in_memory
;
5522 /* Check to see if src_eqv_elt is the same as a set source which
5523 does not yet have an elt, and if so set the elt of the set source
5525 for (i
= 0; i
< n_sets
; i
++)
5526 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5527 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5528 sets
[i
].src_elt
= src_eqv_elt
;
5531 for (i
= 0; i
< n_sets
; i
++)
5532 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5533 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5535 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5537 /* REG_EQUAL in setting a STRICT_LOW_PART
5538 gives an equivalent for the entire destination register,
5539 not just for the subreg being stored in now.
5540 This is a more interesting equivalence, so we arrange later
5541 to treat the entire reg as the destination. */
5542 sets
[i
].src_elt
= src_eqv_elt
;
5543 sets
[i
].src_hash
= src_eqv_hash
;
5547 /* Insert source and constant equivalent into hash table, if not
5549 struct table_elt
*classp
= src_eqv_elt
;
5550 rtx src
= sets
[i
].src
;
5551 rtx dest
= SET_DEST (sets
[i
].rtl
);
5552 enum machine_mode mode
5553 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5555 /* It's possible that we have a source value known to be
5556 constant but don't have a REG_EQUAL note on the insn.
5557 Lack of a note will mean src_eqv_elt will be NULL. This
5558 can happen where we've generated a SUBREG to access a
5559 CONST_INT that is already in a register in a wider mode.
5560 Ensure that the source expression is put in the proper
5563 classp
= sets
[i
].src_const_elt
;
5565 if (sets
[i
].src_elt
== 0)
5567 struct table_elt
*elt
;
5569 /* Note that these insert_regs calls cannot remove
5570 any of the src_elt's, because they would have failed to
5571 match if not still valid. */
5572 if (insert_regs (src
, classp
, 0))
5574 rehash_using_reg (src
);
5575 sets
[i
].src_hash
= HASH (src
, mode
);
5577 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5578 elt
->in_memory
= sets
[i
].src_in_memory
;
5579 sets
[i
].src_elt
= classp
= elt
;
5581 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5582 && src
!= sets
[i
].src_const
5583 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5584 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5585 sets
[i
].src_const_hash
, mode
);
5588 else if (sets
[i
].src_elt
== 0)
5589 /* If we did not insert the source into the hash table (e.g., it was
5590 volatile), note the equivalence class for the REG_EQUAL value, if any,
5591 so that the destination goes into that class. */
5592 sets
[i
].src_elt
= src_eqv_elt
;
5594 /* Record destination addresses in the hash table. This allows us to
5595 check if they are invalidated by other sets. */
5596 for (i
= 0; i
< n_sets
; i
++)
5600 rtx x
= sets
[i
].inner_dest
;
5601 struct table_elt
*elt
;
5602 enum machine_mode mode
;
5608 mode
= GET_MODE (x
);
5609 hash
= HASH (x
, mode
);
5610 elt
= lookup (x
, hash
, mode
);
5613 if (insert_regs (x
, NULL
, 0))
5615 rtx dest
= SET_DEST (sets
[i
].rtl
);
5617 rehash_using_reg (x
);
5618 hash
= HASH (x
, mode
);
5619 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5621 elt
= insert (x
, NULL
, hash
, mode
);
5624 sets
[i
].dest_addr_elt
= elt
;
5627 sets
[i
].dest_addr_elt
= NULL
;
5631 invalidate_from_clobbers (insn
);
5633 /* Some registers are invalidated by subroutine calls. Memory is
5634 invalidated by non-constant calls. */
5638 if (!(RTL_CONST_OR_PURE_CALL_P (insn
)))
5639 invalidate_memory ();
5640 invalidate_for_call ();
5643 /* Now invalidate everything set by this instruction.
5644 If a SUBREG or other funny destination is being set,
5645 sets[i].rtl is still nonzero, so here we invalidate the reg
5646 a part of which is being set. */
5648 for (i
= 0; i
< n_sets
; i
++)
5651 /* We can't use the inner dest, because the mode associated with
5652 a ZERO_EXTRACT is significant. */
5653 rtx dest
= SET_DEST (sets
[i
].rtl
);
5655 /* Needed for registers to remove the register from its
5656 previous quantity's chain.
5657 Needed for memory if this is a nonvarying address, unless
5658 we have just done an invalidate_memory that covers even those. */
5659 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5660 invalidate (dest
, VOIDmode
);
5661 else if (MEM_P (dest
))
5662 invalidate (dest
, VOIDmode
);
5663 else if (GET_CODE (dest
) == STRICT_LOW_PART
5664 || GET_CODE (dest
) == ZERO_EXTRACT
)
5665 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5668 /* A volatile ASM invalidates everything. */
5669 if (NONJUMP_INSN_P (insn
)
5670 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5671 && MEM_VOLATILE_P (PATTERN (insn
)))
5672 flush_hash_table ();
5674 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5675 the regs restored by the longjmp come from a later time
5677 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5679 flush_hash_table ();
5683 /* Make sure registers mentioned in destinations
5684 are safe for use in an expression to be inserted.
5685 This removes from the hash table
5686 any invalid entry that refers to one of these registers.
5688 We don't care about the return value from mention_regs because
5689 we are going to hash the SET_DEST values unconditionally. */
5691 for (i
= 0; i
< n_sets
; i
++)
5695 rtx x
= SET_DEST (sets
[i
].rtl
);
5701 /* We used to rely on all references to a register becoming
5702 inaccessible when a register changes to a new quantity,
5703 since that changes the hash code. However, that is not
5704 safe, since after HASH_SIZE new quantities we get a
5705 hash 'collision' of a register with its own invalid
5706 entries. And since SUBREGs have been changed not to
5707 change their hash code with the hash code of the register,
5708 it wouldn't work any longer at all. So we have to check
5709 for any invalid references lying around now.
5710 This code is similar to the REG case in mention_regs,
5711 but it knows that reg_tick has been incremented, and
5712 it leaves reg_in_table as -1 . */
5713 unsigned int regno
= REGNO (x
);
5714 unsigned int endregno
= END_REGNO (x
);
5717 for (i
= regno
; i
< endregno
; i
++)
5719 if (REG_IN_TABLE (i
) >= 0)
5721 remove_invalid_refs (i
);
5722 REG_IN_TABLE (i
) = -1;
5729 /* We may have just removed some of the src_elt's from the hash table.
5730 So replace each one with the current head of the same class.
5731 Also check if destination addresses have been removed. */
5733 for (i
= 0; i
< n_sets
; i
++)
5736 if (sets
[i
].dest_addr_elt
5737 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5739 /* The elt was removed, which means this destination is not
5740 valid after this instruction. */
5741 sets
[i
].rtl
= NULL_RTX
;
5743 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5744 /* If elt was removed, find current head of same class,
5745 or 0 if nothing remains of that class. */
5747 struct table_elt
*elt
= sets
[i
].src_elt
;
5749 while (elt
&& elt
->prev_same_value
)
5750 elt
= elt
->prev_same_value
;
5752 while (elt
&& elt
->first_same_value
== 0)
5753 elt
= elt
->next_same_value
;
5754 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5758 /* Now insert the destinations into their equivalence classes. */
5760 for (i
= 0; i
< n_sets
; i
++)
5763 rtx dest
= SET_DEST (sets
[i
].rtl
);
5764 struct table_elt
*elt
;
5766 /* Don't record value if we are not supposed to risk allocating
5767 floating-point values in registers that might be wider than
5769 if ((flag_float_store
5771 && FLOAT_MODE_P (GET_MODE (dest
)))
5772 /* Don't record BLKmode values, because we don't know the
5773 size of it, and can't be sure that other BLKmode values
5774 have the same or smaller size. */
5775 || GET_MODE (dest
) == BLKmode
5776 /* If we didn't put a REG_EQUAL value or a source into the hash
5777 table, there is no point is recording DEST. */
5778 || sets
[i
].src_elt
== 0
5779 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5780 or SIGN_EXTEND, don't record DEST since it can cause
5781 some tracking to be wrong.
5783 ??? Think about this more later. */
5784 || (paradoxical_subreg_p (dest
)
5785 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5786 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5789 /* STRICT_LOW_PART isn't part of the value BEING set,
5790 and neither is the SUBREG inside it.
5791 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5792 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5793 dest
= SUBREG_REG (XEXP (dest
, 0));
5795 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5796 /* Registers must also be inserted into chains for quantities. */
5797 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5799 /* If `insert_regs' changes something, the hash code must be
5801 rehash_using_reg (dest
);
5802 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5805 elt
= insert (dest
, sets
[i
].src_elt
,
5806 sets
[i
].dest_hash
, GET_MODE (dest
));
5808 /* If this is a constant, insert the constant anchors with the
5809 equivalent register-offset expressions using register DEST. */
5810 if (targetm
.const_anchor
5812 && SCALAR_INT_MODE_P (GET_MODE (dest
))
5813 && GET_CODE (sets
[i
].src_elt
->exp
) == CONST_INT
)
5814 insert_const_anchors (dest
, sets
[i
].src_elt
->exp
, GET_MODE (dest
));
5816 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5817 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5819 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5820 narrower than M2, and both M1 and M2 are the same number of words,
5821 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5822 make that equivalence as well.
5824 However, BAR may have equivalences for which gen_lowpart
5825 will produce a simpler value than gen_lowpart applied to
5826 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5827 BAR's equivalences. If we don't get a simplified form, make
5828 the SUBREG. It will not be used in an equivalence, but will
5829 cause two similar assignments to be detected.
5831 Note the loop below will find SUBREG_REG (DEST) since we have
5832 already entered SRC and DEST of the SET in the table. */
5834 if (GET_CODE (dest
) == SUBREG
5835 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
5837 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
5838 && (GET_MODE_SIZE (GET_MODE (dest
))
5839 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5840 && sets
[i
].src_elt
!= 0)
5842 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
5843 struct table_elt
*elt
, *classp
= 0;
5845 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
5846 elt
= elt
->next_same_value
)
5850 struct table_elt
*src_elt
;
5853 /* Ignore invalid entries. */
5854 if (!REG_P (elt
->exp
)
5855 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5858 /* We may have already been playing subreg games. If the
5859 mode is already correct for the destination, use it. */
5860 if (GET_MODE (elt
->exp
) == new_mode
)
5864 /* Calculate big endian correction for the SUBREG_BYTE.
5865 We have already checked that M1 (GET_MODE (dest))
5866 is not narrower than M2 (new_mode). */
5867 if (BYTES_BIG_ENDIAN
)
5868 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
5869 - GET_MODE_SIZE (new_mode
));
5871 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
5872 GET_MODE (dest
), byte
);
5875 /* The call to simplify_gen_subreg fails if the value
5876 is VOIDmode, yet we can't do any simplification, e.g.
5877 for EXPR_LISTs denoting function call results.
5878 It is invalid to construct a SUBREG with a VOIDmode
5879 SUBREG_REG, hence a zero new_src means we can't do
5880 this substitution. */
5884 src_hash
= HASH (new_src
, new_mode
);
5885 src_elt
= lookup (new_src
, src_hash
, new_mode
);
5887 /* Put the new source in the hash table is if isn't
5891 if (insert_regs (new_src
, classp
, 0))
5893 rehash_using_reg (new_src
);
5894 src_hash
= HASH (new_src
, new_mode
);
5896 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
5897 src_elt
->in_memory
= elt
->in_memory
;
5899 else if (classp
&& classp
!= src_elt
->first_same_value
)
5900 /* Show that two things that we've seen before are
5901 actually the same. */
5902 merge_equiv_classes (src_elt
, classp
);
5904 classp
= src_elt
->first_same_value
;
5905 /* Ignore invalid entries. */
5907 && !REG_P (classp
->exp
)
5908 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
5909 classp
= classp
->next_same_value
;
5914 /* Special handling for (set REG0 REG1) where REG0 is the
5915 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5916 be used in the sequel, so (if easily done) change this insn to
5917 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5918 that computed their value. Then REG1 will become a dead store
5919 and won't cloud the situation for later optimizations.
5921 Do not make this change if REG1 is a hard register, because it will
5922 then be used in the sequel and we may be changing a two-operand insn
5923 into a three-operand insn.
5925 Also do not do this if we are operating on a copy of INSN. */
5927 if (n_sets
== 1 && sets
[0].rtl
)
5928 try_back_substitute_reg (sets
[0].rtl
, insn
);
5933 /* Remove from the hash table all expressions that reference memory. */
5936 invalidate_memory (void)
5939 struct table_elt
*p
, *next
;
5941 for (i
= 0; i
< HASH_SIZE
; i
++)
5942 for (p
= table
[i
]; p
; p
= next
)
5944 next
= p
->next_same_hash
;
5946 remove_from_table (p
, i
);
5950 /* Perform invalidation on the basis of everything about INSN,
5951 except for invalidating the actual places that are SET in it.
5952 This includes the places CLOBBERed, and anything that might
5953 alias with something that is SET or CLOBBERed. */
5956 invalidate_from_clobbers (rtx insn
)
5958 rtx x
= PATTERN (insn
);
5960 if (GET_CODE (x
) == CLOBBER
)
5962 rtx ref
= XEXP (x
, 0);
5965 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5967 invalidate (ref
, VOIDmode
);
5968 else if (GET_CODE (ref
) == STRICT_LOW_PART
5969 || GET_CODE (ref
) == ZERO_EXTRACT
)
5970 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5973 else if (GET_CODE (x
) == PARALLEL
)
5976 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
5978 rtx y
= XVECEXP (x
, 0, i
);
5979 if (GET_CODE (y
) == CLOBBER
)
5981 rtx ref
= XEXP (y
, 0);
5982 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5984 invalidate (ref
, VOIDmode
);
5985 else if (GET_CODE (ref
) == STRICT_LOW_PART
5986 || GET_CODE (ref
) == ZERO_EXTRACT
)
5987 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5993 /* Perform invalidation on the basis of everything about INSN.
5994 This includes the places CLOBBERed, and anything that might
5995 alias with something that is SET or CLOBBERed. */
5998 invalidate_from_sets_and_clobbers (rtx insn
)
6001 rtx x
= PATTERN (insn
);
6005 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6006 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6007 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6010 /* Ensure we invalidate the destination register of a CALL insn.
6011 This is necessary for machines where this register is a fixed_reg,
6012 because no other code would invalidate it. */
6013 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
6014 invalidate (SET_DEST (x
), VOIDmode
);
6016 else if (GET_CODE (x
) == PARALLEL
)
6020 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6022 rtx y
= XVECEXP (x
, 0, i
);
6023 if (GET_CODE (y
) == CLOBBER
)
6025 rtx clobbered
= XEXP (y
, 0);
6027 if (REG_P (clobbered
)
6028 || GET_CODE (clobbered
) == SUBREG
)
6029 invalidate (clobbered
, VOIDmode
);
6030 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6031 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6032 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6034 else if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
6035 invalidate (SET_DEST (y
), VOIDmode
);
6040 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6041 and replace any registers in them with either an equivalent constant
6042 or the canonical form of the register. If we are inside an address,
6043 only do this if the address remains valid.
6045 OBJECT is 0 except when within a MEM in which case it is the MEM.
6047 Return the replacement for X. */
6050 cse_process_notes_1 (rtx x
, rtx object
, bool *changed
)
6052 enum rtx_code code
= GET_CODE (x
);
6053 const char *fmt
= GET_RTX_FORMAT (code
);
6071 validate_change (x
, &XEXP (x
, 0),
6072 cse_process_notes (XEXP (x
, 0), x
, changed
), 0);
6077 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6078 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
, changed
);
6080 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
, changed
);
6087 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6088 /* We don't substitute VOIDmode constants into these rtx,
6089 since they would impede folding. */
6090 if (GET_MODE (new_rtx
) != VOIDmode
)
6091 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6096 i
= REG_QTY (REGNO (x
));
6098 /* Return a constant or a constant register. */
6099 if (REGNO_QTY_VALID_P (REGNO (x
)))
6101 struct qty_table_elem
*ent
= &qty_table
[i
];
6103 if (ent
->const_rtx
!= NULL_RTX
6104 && (CONSTANT_P (ent
->const_rtx
)
6105 || REG_P (ent
->const_rtx
)))
6107 rtx new_rtx
= gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6109 return copy_rtx (new_rtx
);
6113 /* Otherwise, canonicalize this register. */
6114 return canon_reg (x
, NULL_RTX
);
6120 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6122 validate_change (object
, &XEXP (x
, i
),
6123 cse_process_notes (XEXP (x
, i
), object
, changed
), 0);
6129 cse_process_notes (rtx x
, rtx object
, bool *changed
)
6131 rtx new_rtx
= cse_process_notes_1 (x
, object
, changed
);
6138 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6140 DATA is a pointer to a struct cse_basic_block_data, that is used to
6142 It is filled with a queue of basic blocks, starting with FIRST_BB
6143 and following a trace through the CFG.
6145 If all paths starting at FIRST_BB have been followed, or no new path
6146 starting at FIRST_BB can be constructed, this function returns FALSE.
6147 Otherwise, DATA->path is filled and the function returns TRUE indicating
6148 that a path to follow was found.
6150 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6151 block in the path will be FIRST_BB. */
6154 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
6161 SET_BIT (cse_visited_basic_blocks
, first_bb
->index
);
6163 /* See if there is a previous path. */
6164 path_size
= data
->path_size
;
6166 /* There is a previous path. Make sure it started with FIRST_BB. */
6168 gcc_assert (data
->path
[0].bb
== first_bb
);
6170 /* There was only one basic block in the last path. Clear the path and
6171 return, so that paths starting at another basic block can be tried. */
6178 /* If the path was empty from the beginning, construct a new path. */
6180 data
->path
[path_size
++].bb
= first_bb
;
6183 /* Otherwise, path_size must be equal to or greater than 2, because
6184 a previous path exists that is at least two basic blocks long.
6186 Update the previous branch path, if any. If the last branch was
6187 previously along the branch edge, take the fallthrough edge now. */
6188 while (path_size
>= 2)
6190 basic_block last_bb_in_path
, previous_bb_in_path
;
6194 last_bb_in_path
= data
->path
[path_size
].bb
;
6195 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
6197 /* If we previously followed a path along the branch edge, try
6198 the fallthru edge now. */
6199 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
6200 && any_condjump_p (BB_END (previous_bb_in_path
))
6201 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
6202 && e
== BRANCH_EDGE (previous_bb_in_path
))
6204 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
6205 if (bb
!= EXIT_BLOCK_PTR
6206 && single_pred_p (bb
)
6207 /* We used to assert here that we would only see blocks
6208 that we have not visited yet. But we may end up
6209 visiting basic blocks twice if the CFG has changed
6210 in this run of cse_main, because when the CFG changes
6211 the topological sort of the CFG also changes. A basic
6212 blocks that previously had more than two predecessors
6213 may now have a single predecessor, and become part of
6214 a path that starts at another basic block.
6216 We still want to visit each basic block only once, so
6217 halt the path here if we have already visited BB. */
6218 && !TEST_BIT (cse_visited_basic_blocks
, bb
->index
))
6220 SET_BIT (cse_visited_basic_blocks
, bb
->index
);
6221 data
->path
[path_size
++].bb
= bb
;
6226 data
->path
[path_size
].bb
= NULL
;
6229 /* If only one block remains in the path, bail. */
6237 /* Extend the path if possible. */
6240 bb
= data
->path
[path_size
- 1].bb
;
6241 while (bb
&& path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
))
6243 if (single_succ_p (bb
))
6244 e
= single_succ_edge (bb
);
6245 else if (EDGE_COUNT (bb
->succs
) == 2
6246 && any_condjump_p (BB_END (bb
)))
6248 /* First try to follow the branch. If that doesn't lead
6249 to a useful path, follow the fallthru edge. */
6250 e
= BRANCH_EDGE (bb
);
6251 if (!single_pred_p (e
->dest
))
6252 e
= FALLTHRU_EDGE (bb
);
6258 && !((e
->flags
& EDGE_ABNORMAL_CALL
) && cfun
->has_nonlocal_label
)
6259 && e
->dest
!= EXIT_BLOCK_PTR
6260 && single_pred_p (e
->dest
)
6261 /* Avoid visiting basic blocks twice. The large comment
6262 above explains why this can happen. */
6263 && !TEST_BIT (cse_visited_basic_blocks
, e
->dest
->index
))
6265 basic_block bb2
= e
->dest
;
6266 SET_BIT (cse_visited_basic_blocks
, bb2
->index
);
6267 data
->path
[path_size
++].bb
= bb2
;
6276 data
->path_size
= path_size
;
6277 return path_size
!= 0;
6280 /* Dump the path in DATA to file F. NSETS is the number of sets
6284 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
6288 fprintf (f
, ";; Following path with %d sets: ", nsets
);
6289 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
6290 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
6291 fputc ('\n', dump_file
);
6296 /* Return true if BB has exception handling successor edges. */
6299 have_eh_succ_edges (basic_block bb
)
6304 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6305 if (e
->flags
& EDGE_EH
)
6312 /* Scan to the end of the path described by DATA. Return an estimate of
6313 the total number of SETs of all insns in the path. */
6316 cse_prescan_path (struct cse_basic_block_data
*data
)
6319 int path_size
= data
->path_size
;
6322 /* Scan to end of each basic block in the path. */
6323 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6328 bb
= data
->path
[path_entry
].bb
;
6330 FOR_BB_INSNS (bb
, insn
)
6335 /* A PARALLEL can have lots of SETs in it,
6336 especially if it is really an ASM_OPERANDS. */
6337 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6338 nsets
+= XVECLEN (PATTERN (insn
), 0);
6344 data
->nsets
= nsets
;
6347 /* Process a single extended basic block described by EBB_DATA. */
6350 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6352 int path_size
= ebb_data
->path_size
;
6356 /* Allocate the space needed by qty_table. */
6357 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6360 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6361 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6362 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6367 bb
= ebb_data
->path
[path_entry
].bb
;
6369 /* Invalidate recorded information for eh regs if there is an EH
6370 edge pointing to that bb. */
6371 if (bb_has_eh_pred (bb
))
6375 for (def_rec
= df_get_artificial_defs (bb
->index
); *def_rec
; def_rec
++)
6377 df_ref def
= *def_rec
;
6378 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
6379 invalidate (DF_REF_REG (def
), GET_MODE (DF_REF_REG (def
)));
6383 optimize_this_for_speed_p
= optimize_bb_for_speed_p (bb
);
6384 FOR_BB_INSNS (bb
, insn
)
6386 /* If we have processed 1,000 insns, flush the hash table to
6387 avoid extreme quadratic behavior. We must not include NOTEs
6388 in the count since there may be more of them when generating
6389 debugging information. If we clear the table at different
6390 times, code generated with -g -O might be different than code
6391 generated with -O but not -g.
6393 FIXME: This is a real kludge and needs to be done some other
6395 if (NONDEBUG_INSN_P (insn
)
6396 && num_insns
++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS
))
6398 flush_hash_table ();
6404 /* Process notes first so we have all notes in canonical forms
6405 when looking for duplicate operations. */
6406 if (REG_NOTES (insn
))
6408 bool changed
= false;
6409 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
),
6410 NULL_RTX
, &changed
);
6412 df_notes_rescan (insn
);
6417 /* If we haven't already found an insn where we added a LABEL_REF,
6419 if (INSN_P (insn
) && !recorded_label_ref
6420 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
6422 recorded_label_ref
= true;
6425 if (NONDEBUG_INSN_P (insn
))
6427 /* If the previous insn sets CC0 and this insn no
6428 longer references CC0, delete the previous insn.
6429 Here we use fact that nothing expects CC0 to be
6430 valid over an insn, which is true until the final
6434 prev_insn
= prev_nonnote_nondebug_insn (insn
);
6435 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6436 && (tem
= single_set (prev_insn
)) != NULL_RTX
6437 && SET_DEST (tem
) == cc0_rtx
6438 && ! reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
6439 delete_insn (prev_insn
);
6441 /* If this insn is not the last insn in the basic
6442 block, it will be PREV_INSN(insn) in the next
6443 iteration. If we recorded any CC0-related
6444 information for this insn, remember it. */
6445 if (insn
!= BB_END (bb
))
6447 prev_insn_cc0
= this_insn_cc0
;
6448 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6455 /* With non-call exceptions, we are not always able to update
6456 the CFG properly inside cse_insn. So clean up possibly
6457 redundant EH edges here. */
6458 if (cfun
->can_throw_non_call_exceptions
&& have_eh_succ_edges (bb
))
6459 cse_cfg_altered
|= purge_dead_edges (bb
);
6461 /* If we changed a conditional jump, we may have terminated
6462 the path we are following. Check that by verifying that
6463 the edge we would take still exists. If the edge does
6464 not exist anymore, purge the remainder of the path.
6465 Note that this will cause us to return to the caller. */
6466 if (path_entry
< path_size
- 1)
6468 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6469 if (!find_edge (bb
, next_bb
))
6475 /* If we truncate the path, we must also reset the
6476 visited bit on the remaining blocks in the path,
6477 or we will never visit them at all. */
6478 RESET_BIT (cse_visited_basic_blocks
,
6479 ebb_data
->path
[path_size
].bb
->index
);
6480 ebb_data
->path
[path_size
].bb
= NULL
;
6482 while (path_size
- 1 != path_entry
);
6483 ebb_data
->path_size
= path_size
;
6487 /* If this is a conditional jump insn, record any known
6488 equivalences due to the condition being tested. */
6490 if (path_entry
< path_size
- 1
6492 && single_set (insn
)
6493 && any_condjump_p (insn
))
6495 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6496 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6497 record_jump_equiv (insn
, taken
);
6501 /* Clear the CC0-tracking related insns, they can't provide
6502 useful information across basic block boundaries. */
6507 gcc_assert (next_qty
<= max_qty
);
6513 /* Perform cse on the instructions of a function.
6514 F is the first instruction.
6515 NREGS is one plus the highest pseudo-reg number used in the instruction.
6517 Return 2 if jump optimizations should be redone due to simplifications
6518 in conditional jump instructions.
6519 Return 1 if the CFG should be cleaned up because it has been modified.
6520 Return 0 otherwise. */
6523 cse_main (rtx f ATTRIBUTE_UNUSED
, int nregs
)
6525 struct cse_basic_block_data ebb_data
;
6527 int *rc_order
= XNEWVEC (int, last_basic_block
);
6530 df_set_flags (DF_LR_RUN_DCE
);
6532 df_set_flags (DF_DEFER_INSN_RESCAN
);
6534 reg_scan (get_insns (), max_reg_num ());
6535 init_cse_reg_info (nregs
);
6537 ebb_data
.path
= XNEWVEC (struct branch_path
,
6538 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6540 cse_cfg_altered
= false;
6541 cse_jumps_altered
= false;
6542 recorded_label_ref
= false;
6543 constant_pool_entries_cost
= 0;
6544 constant_pool_entries_regcost
= 0;
6545 ebb_data
.path_size
= 0;
6547 rtl_hooks
= cse_rtl_hooks
;
6550 init_alias_analysis ();
6552 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6554 /* Set up the table of already visited basic blocks. */
6555 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block
);
6556 sbitmap_zero (cse_visited_basic_blocks
);
6558 /* Loop over basic blocks in reverse completion order (RPO),
6559 excluding the ENTRY and EXIT blocks. */
6560 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6562 while (i
< n_blocks
)
6564 /* Find the first block in the RPO queue that we have not yet
6565 processed before. */
6568 bb
= BASIC_BLOCK (rc_order
[i
++]);
6570 while (TEST_BIT (cse_visited_basic_blocks
, bb
->index
)
6573 /* Find all paths starting with BB, and process them. */
6574 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6576 /* Pre-scan the path. */
6577 cse_prescan_path (&ebb_data
);
6579 /* If this basic block has no sets, skip it. */
6580 if (ebb_data
.nsets
== 0)
6583 /* Get a reasonable estimate for the maximum number of qty's
6584 needed for this path. For this, we take the number of sets
6585 and multiply that by MAX_RECOG_OPERANDS. */
6586 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6588 /* Dump the path we're about to process. */
6590 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6592 cse_extended_basic_block (&ebb_data
);
6597 end_alias_analysis ();
6598 free (reg_eqv_table
);
6599 free (ebb_data
.path
);
6600 sbitmap_free (cse_visited_basic_blocks
);
6602 rtl_hooks
= general_rtl_hooks
;
6604 if (cse_jumps_altered
|| recorded_label_ref
)
6606 else if (cse_cfg_altered
)
6612 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6613 which there isn't a REG_LABEL_OPERAND note.
6614 Return one if so. DATA is the insn. */
6617 check_for_label_ref (rtx
*rtl
, void *data
)
6619 rtx insn
= (rtx
) data
;
6621 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6622 note for it, we must rerun jump since it needs to place the note. If
6623 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6624 don't do this since no REG_LABEL_OPERAND will be added. */
6625 return (GET_CODE (*rtl
) == LABEL_REF
6626 && ! LABEL_REF_NONLOCAL_P (*rtl
)
6628 || !label_is_jump_target_p (XEXP (*rtl
, 0), insn
))
6629 && LABEL_P (XEXP (*rtl
, 0))
6630 && INSN_UID (XEXP (*rtl
, 0)) != 0
6631 && ! find_reg_note (insn
, REG_LABEL_OPERAND
, XEXP (*rtl
, 0)));
6634 /* Count the number of times registers are used (not set) in X.
6635 COUNTS is an array in which we accumulate the count, INCR is how much
6636 we count each register usage.
6638 Don't count a usage of DEST, which is the SET_DEST of a SET which
6639 contains X in its SET_SRC. This is because such a SET does not
6640 modify the liveness of DEST.
6641 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6642 We must then count uses of a SET_DEST regardless, because the insn can't be
6646 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6656 switch (code
= GET_CODE (x
))
6660 counts
[REGNO (x
)] += incr
;
6675 /* If we are clobbering a MEM, mark any registers inside the address
6677 if (MEM_P (XEXP (x
, 0)))
6678 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6682 /* Unless we are setting a REG, count everything in SET_DEST. */
6683 if (!REG_P (SET_DEST (x
)))
6684 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6685 count_reg_usage (SET_SRC (x
), counts
,
6686 dest
? dest
: SET_DEST (x
),
6696 /* We expect dest to be NULL_RTX here. If the insn may trap,
6697 or if it cannot be deleted due to side-effects, mark this fact
6698 by setting DEST to pc_rtx. */
6699 if (insn_could_throw_p (x
) || side_effects_p (PATTERN (x
)))
6701 if (code
== CALL_INSN
)
6702 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6703 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6705 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6708 note
= find_reg_equal_equiv_note (x
);
6711 rtx eqv
= XEXP (note
, 0);
6713 if (GET_CODE (eqv
) == EXPR_LIST
)
6714 /* This REG_EQUAL note describes the result of a function call.
6715 Process all the arguments. */
6718 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6719 eqv
= XEXP (eqv
, 1);
6721 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6723 count_reg_usage (eqv
, counts
, dest
, incr
);
6728 if (REG_NOTE_KIND (x
) == REG_EQUAL
6729 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6730 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6731 involving registers in the address. */
6732 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
6733 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6735 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6739 /* Iterate over just the inputs, not the constraints as well. */
6740 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6741 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6751 fmt
= GET_RTX_FORMAT (code
);
6752 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6755 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6756 else if (fmt
[i
] == 'E')
6757 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6758 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6762 /* Return true if X is a dead register. */
6765 is_dead_reg (rtx x
, int *counts
)
6768 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6769 && counts
[REGNO (x
)] == 0);
6772 /* Return true if set is live. */
6774 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
6781 if (set_noop_p (set
))
6785 else if (GET_CODE (SET_DEST (set
)) == CC0
6786 && !side_effects_p (SET_SRC (set
))
6787 && ((tem
= next_nonnote_nondebug_insn (insn
)) == NULL_RTX
6789 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
6792 else if (!is_dead_reg (SET_DEST (set
), counts
)
6793 || side_effects_p (SET_SRC (set
)))
6798 /* Return true if insn is live. */
6801 insn_live_p (rtx insn
, int *counts
)
6804 if (insn_could_throw_p (insn
))
6806 else if (GET_CODE (PATTERN (insn
)) == SET
)
6807 return set_live_p (PATTERN (insn
), insn
, counts
);
6808 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6810 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6812 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6814 if (GET_CODE (elt
) == SET
)
6816 if (set_live_p (elt
, insn
, counts
))
6819 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
6824 else if (DEBUG_INSN_P (insn
))
6828 for (next
= NEXT_INSN (insn
); next
; next
= NEXT_INSN (next
))
6831 else if (!DEBUG_INSN_P (next
))
6833 else if (INSN_VAR_LOCATION_DECL (insn
) == INSN_VAR_LOCATION_DECL (next
))
6842 /* Count the number of stores into pseudo. Callback for note_stores. */
6845 count_stores (rtx x
, const_rtx set ATTRIBUTE_UNUSED
, void *data
)
6847 int *counts
= (int *) data
;
6848 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
6849 counts
[REGNO (x
)]++;
6852 struct dead_debug_insn_data
6859 /* Return if a DEBUG_INSN needs to be reset because some dead
6860 pseudo doesn't have a replacement. Callback for for_each_rtx. */
6863 is_dead_debug_insn (rtx
*loc
, void *data
)
6866 struct dead_debug_insn_data
*ddid
= (struct dead_debug_insn_data
*) data
;
6868 if (is_dead_reg (x
, ddid
->counts
))
6870 if (ddid
->replacements
&& ddid
->replacements
[REGNO (x
)] != NULL_RTX
)
6871 ddid
->seen_repl
= true;
6878 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6879 Callback for simplify_replace_fn_rtx. */
6882 replace_dead_reg (rtx x
, const_rtx old_rtx ATTRIBUTE_UNUSED
, void *data
)
6884 rtx
*replacements
= (rtx
*) data
;
6887 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6888 && replacements
[REGNO (x
)] != NULL_RTX
)
6890 if (GET_MODE (x
) == GET_MODE (replacements
[REGNO (x
)]))
6891 return replacements
[REGNO (x
)];
6892 return lowpart_subreg (GET_MODE (x
), replacements
[REGNO (x
)],
6893 GET_MODE (replacements
[REGNO (x
)]));
6898 /* Scan all the insns and delete any that are dead; i.e., they store a register
6899 that is never used or they copy a register to itself.
6901 This is used to remove insns made obviously dead by cse, loop or other
6902 optimizations. It improves the heuristics in loop since it won't try to
6903 move dead invariants out of loops or make givs for dead quantities. The
6904 remaining passes of the compilation are also sped up. */
6907 delete_trivially_dead_insns (rtx insns
, int nreg
)
6911 rtx
*replacements
= NULL
;
6914 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
6915 /* First count the number of times each register is used. */
6916 if (MAY_HAVE_DEBUG_INSNS
)
6918 counts
= XCNEWVEC (int, nreg
* 3);
6919 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6920 if (DEBUG_INSN_P (insn
))
6921 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
6923 else if (INSN_P (insn
))
6925 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6926 note_stores (PATTERN (insn
), count_stores
, counts
+ nreg
* 2);
6928 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6929 First one counts how many times each pseudo is used outside
6930 of debug insns, second counts how many times each pseudo is
6931 used in debug insns and third counts how many times a pseudo
6936 counts
= XCNEWVEC (int, nreg
);
6937 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6939 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6940 /* If no debug insns can be present, COUNTS is just an array
6941 which counts how many times each pseudo is used. */
6943 /* Go from the last insn to the first and delete insns that only set unused
6944 registers or copy a register to itself. As we delete an insn, remove
6945 usage counts for registers it uses.
6947 The first jump optimization pass may leave a real insn as the last
6948 insn in the function. We must not skip that insn or we may end
6949 up deleting code that is not really dead.
6951 If some otherwise unused register is only used in DEBUG_INSNs,
6952 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
6953 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
6954 has been created for the unused register, replace it with
6955 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
6956 for (insn
= get_last_insn (); insn
; insn
= prev
)
6960 prev
= PREV_INSN (insn
);
6964 live_insn
= insn_live_p (insn
, counts
);
6966 /* If this is a dead insn, delete it and show registers in it aren't
6969 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
6971 if (DEBUG_INSN_P (insn
))
6972 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
6977 if (MAY_HAVE_DEBUG_INSNS
6978 && (set
= single_set (insn
)) != NULL_RTX
6979 && is_dead_reg (SET_DEST (set
), counts
)
6980 /* Used at least once in some DEBUG_INSN. */
6981 && counts
[REGNO (SET_DEST (set
)) + nreg
] > 0
6982 /* And set exactly once. */
6983 && counts
[REGNO (SET_DEST (set
)) + nreg
* 2] == 1
6984 && !side_effects_p (SET_SRC (set
))
6985 && asm_noperands (PATTERN (insn
)) < 0)
6989 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
6990 dval
= make_debug_expr_from_rtl (SET_DEST (set
));
6992 /* Emit a debug bind insn before the insn in which
6994 bind
= gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set
)),
6995 DEBUG_EXPR_TREE_DECL (dval
),
6997 VAR_INIT_STATUS_INITIALIZED
);
6998 count_reg_usage (bind
, counts
+ nreg
, NULL_RTX
, 1);
7000 bind
= emit_debug_insn_before (bind
, insn
);
7001 df_insn_rescan (bind
);
7003 if (replacements
== NULL
)
7004 replacements
= XCNEWVEC (rtx
, nreg
);
7005 replacements
[REGNO (SET_DEST (set
))] = dval
;
7008 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7011 delete_insn_and_edges (insn
);
7015 if (MAY_HAVE_DEBUG_INSNS
)
7017 struct dead_debug_insn_data ddid
;
7018 ddid
.counts
= counts
;
7019 ddid
.replacements
= replacements
;
7020 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
7021 if (DEBUG_INSN_P (insn
))
7023 /* If this debug insn references a dead register that wasn't replaced
7024 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7025 ddid
.seen_repl
= false;
7026 if (for_each_rtx (&INSN_VAR_LOCATION_LOC (insn
),
7027 is_dead_debug_insn
, &ddid
))
7029 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
7030 df_insn_rescan (insn
);
7032 else if (ddid
.seen_repl
)
7034 INSN_VAR_LOCATION_LOC (insn
)
7035 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn
),
7036 NULL_RTX
, replace_dead_reg
,
7038 df_insn_rescan (insn
);
7041 free (replacements
);
7044 if (dump_file
&& ndead
)
7045 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7049 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7053 /* This function is called via for_each_rtx. The argument, NEWREG, is
7054 a condition code register with the desired mode. If we are looking
7055 at the same register in a different mode, replace it with
7059 cse_change_cc_mode (rtx
*loc
, void *data
)
7061 struct change_cc_mode_args
* args
= (struct change_cc_mode_args
*)data
;
7065 && REGNO (*loc
) == REGNO (args
->newreg
)
7066 && GET_MODE (*loc
) != GET_MODE (args
->newreg
))
7068 validate_change (args
->insn
, loc
, args
->newreg
, 1);
7075 /* Change the mode of any reference to the register REGNO (NEWREG) to
7076 GET_MODE (NEWREG) in INSN. */
7079 cse_change_cc_mode_insn (rtx insn
, rtx newreg
)
7081 struct change_cc_mode_args args
;
7088 args
.newreg
= newreg
;
7090 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, &args
);
7091 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, &args
);
7093 /* If the following assertion was triggered, there is most probably
7094 something wrong with the cc_modes_compatible back end function.
7095 CC modes only can be considered compatible if the insn - with the mode
7096 replaced by any of the compatible modes - can still be recognized. */
7097 success
= apply_change_group ();
7098 gcc_assert (success
);
7101 /* Change the mode of any reference to the register REGNO (NEWREG) to
7102 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7103 any instruction which modifies NEWREG. */
7106 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7110 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7112 if (! INSN_P (insn
))
7115 if (reg_set_p (newreg
, insn
))
7118 cse_change_cc_mode_insn (insn
, newreg
);
7122 /* BB is a basic block which finishes with CC_REG as a condition code
7123 register which is set to CC_SRC. Look through the successors of BB
7124 to find blocks which have a single predecessor (i.e., this one),
7125 and look through those blocks for an assignment to CC_REG which is
7126 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7127 permitted to change the mode of CC_SRC to a compatible mode. This
7128 returns VOIDmode if no equivalent assignments were found.
7129 Otherwise it returns the mode which CC_SRC should wind up with.
7130 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7131 but is passed unmodified down to recursive calls in order to prevent
7134 The main complexity in this function is handling the mode issues.
7135 We may have more than one duplicate which we can eliminate, and we
7136 try to find a mode which will work for multiple duplicates. */
7138 static enum machine_mode
7139 cse_cc_succs (basic_block bb
, basic_block orig_bb
, rtx cc_reg
, rtx cc_src
,
7140 bool can_change_mode
)
7143 enum machine_mode mode
;
7144 unsigned int insn_count
;
7147 enum machine_mode modes
[2];
7153 /* We expect to have two successors. Look at both before picking
7154 the final mode for the comparison. If we have more successors
7155 (i.e., some sort of table jump, although that seems unlikely),
7156 then we require all beyond the first two to use the same
7159 found_equiv
= false;
7160 mode
= GET_MODE (cc_src
);
7162 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7167 if (e
->flags
& EDGE_COMPLEX
)
7170 if (EDGE_COUNT (e
->dest
->preds
) != 1
7171 || e
->dest
== EXIT_BLOCK_PTR
7172 /* Avoid endless recursion on unreachable blocks. */
7173 || e
->dest
== orig_bb
)
7176 end
= NEXT_INSN (BB_END (e
->dest
));
7177 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7181 if (! INSN_P (insn
))
7184 /* If CC_SRC is modified, we have to stop looking for
7185 something which uses it. */
7186 if (modified_in_p (cc_src
, insn
))
7189 /* Check whether INSN sets CC_REG to CC_SRC. */
7190 set
= single_set (insn
);
7192 && REG_P (SET_DEST (set
))
7193 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7196 enum machine_mode set_mode
;
7197 enum machine_mode comp_mode
;
7200 set_mode
= GET_MODE (SET_SRC (set
));
7201 comp_mode
= set_mode
;
7202 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7204 else if (GET_CODE (cc_src
) == COMPARE
7205 && GET_CODE (SET_SRC (set
)) == COMPARE
7207 && rtx_equal_p (XEXP (cc_src
, 0),
7208 XEXP (SET_SRC (set
), 0))
7209 && rtx_equal_p (XEXP (cc_src
, 1),
7210 XEXP (SET_SRC (set
), 1)))
7213 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7214 if (comp_mode
!= VOIDmode
7215 && (can_change_mode
|| comp_mode
== mode
))
7222 if (insn_count
< ARRAY_SIZE (insns
))
7224 insns
[insn_count
] = insn
;
7225 modes
[insn_count
] = set_mode
;
7226 last_insns
[insn_count
] = end
;
7229 if (mode
!= comp_mode
)
7231 gcc_assert (can_change_mode
);
7234 /* The modified insn will be re-recognized later. */
7235 PUT_MODE (cc_src
, mode
);
7240 if (set_mode
!= mode
)
7242 /* We found a matching expression in the
7243 wrong mode, but we don't have room to
7244 store it in the array. Punt. This case
7248 /* INSN sets CC_REG to a value equal to CC_SRC
7249 with the right mode. We can simply delete
7254 /* We found an instruction to delete. Keep looking,
7255 in the hopes of finding a three-way jump. */
7259 /* We found an instruction which sets the condition
7260 code, so don't look any farther. */
7264 /* If INSN sets CC_REG in some other way, don't look any
7266 if (reg_set_p (cc_reg
, insn
))
7270 /* If we fell off the bottom of the block, we can keep looking
7271 through successors. We pass CAN_CHANGE_MODE as false because
7272 we aren't prepared to handle compatibility between the
7273 further blocks and this block. */
7276 enum machine_mode submode
;
7278 submode
= cse_cc_succs (e
->dest
, orig_bb
, cc_reg
, cc_src
, false);
7279 if (submode
!= VOIDmode
)
7281 gcc_assert (submode
== mode
);
7283 can_change_mode
= false;
7291 /* Now INSN_COUNT is the number of instructions we found which set
7292 CC_REG to a value equivalent to CC_SRC. The instructions are in
7293 INSNS. The modes used by those instructions are in MODES. */
7296 for (i
= 0; i
< insn_count
; ++i
)
7298 if (modes
[i
] != mode
)
7300 /* We need to change the mode of CC_REG in INSNS[i] and
7301 subsequent instructions. */
7304 if (GET_MODE (cc_reg
) == mode
)
7307 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7309 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7313 delete_insn_and_edges (insns
[i
]);
7319 /* If we have a fixed condition code register (or two), walk through
7320 the instructions and try to eliminate duplicate assignments. */
7323 cse_condition_code_reg (void)
7325 unsigned int cc_regno_1
;
7326 unsigned int cc_regno_2
;
7331 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7334 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7335 if (cc_regno_2
!= INVALID_REGNUM
)
7336 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7338 cc_reg_2
= NULL_RTX
;
7347 enum machine_mode mode
;
7348 enum machine_mode orig_mode
;
7350 /* Look for blocks which end with a conditional jump based on a
7351 condition code register. Then look for the instruction which
7352 sets the condition code register. Then look through the
7353 successor blocks for instructions which set the condition
7354 code register to the same value. There are other possible
7355 uses of the condition code register, but these are by far the
7356 most common and the ones which we are most likely to be able
7359 last_insn
= BB_END (bb
);
7360 if (!JUMP_P (last_insn
))
7363 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7365 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7370 cc_src_insn
= NULL_RTX
;
7372 for (insn
= PREV_INSN (last_insn
);
7373 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7374 insn
= PREV_INSN (insn
))
7378 if (! INSN_P (insn
))
7380 set
= single_set (insn
);
7382 && REG_P (SET_DEST (set
))
7383 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7386 cc_src
= SET_SRC (set
);
7389 else if (reg_set_p (cc_reg
, insn
))
7396 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7399 /* Now CC_REG is a condition code register used for a
7400 conditional jump at the end of the block, and CC_SRC, in
7401 CC_SRC_INSN, is the value to which that condition code
7402 register is set, and CC_SRC is still meaningful at the end of
7405 orig_mode
= GET_MODE (cc_src
);
7406 mode
= cse_cc_succs (bb
, bb
, cc_reg
, cc_src
, true);
7407 if (mode
!= VOIDmode
)
7409 gcc_assert (mode
== GET_MODE (cc_src
));
7410 if (mode
!= orig_mode
)
7412 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7414 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7416 /* Do the same in the following insns that use the
7417 current value of CC_REG within BB. */
7418 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7419 NEXT_INSN (last_insn
),
7427 /* Perform common subexpression elimination. Nonzero value from
7428 `cse_main' means that jumps were simplified and some code may now
7429 be unreachable, so do jump optimization again. */
7431 gate_handle_cse (void)
7433 return optimize
> 0;
7437 rest_of_handle_cse (void)
7442 dump_flow_info (dump_file
, dump_flags
);
7444 tem
= cse_main (get_insns (), max_reg_num ());
7446 /* If we are not running more CSE passes, then we are no longer
7447 expecting CSE to be run. But always rerun it in a cheap mode. */
7448 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7452 timevar_push (TV_JUMP
);
7453 rebuild_jump_labels (get_insns ());
7454 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7455 timevar_pop (TV_JUMP
);
7457 else if (tem
== 1 || optimize
> 1)
7463 struct rtl_opt_pass pass_cse
=
7468 gate_handle_cse
, /* gate */
7469 rest_of_handle_cse
, /* execute */
7472 0, /* static_pass_number */
7474 0, /* properties_required */
7475 0, /* properties_provided */
7476 0, /* properties_destroyed */
7477 0, /* todo_flags_start */
7478 TODO_df_finish
| TODO_verify_rtl_sharing
|
7480 TODO_verify_flow
, /* todo_flags_finish */
7486 gate_handle_cse2 (void)
7488 return optimize
> 0 && flag_rerun_cse_after_loop
;
7491 /* Run second CSE pass after loop optimizations. */
7493 rest_of_handle_cse2 (void)
7498 dump_flow_info (dump_file
, dump_flags
);
7500 tem
= cse_main (get_insns (), max_reg_num ());
7502 /* Run a pass to eliminate duplicated assignments to condition code
7503 registers. We have to run this after bypass_jumps, because it
7504 makes it harder for that pass to determine whether a jump can be
7506 cse_condition_code_reg ();
7508 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7512 timevar_push (TV_JUMP
);
7513 rebuild_jump_labels (get_insns ());
7514 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7515 timevar_pop (TV_JUMP
);
7520 cse_not_expected
= 1;
7525 struct rtl_opt_pass pass_cse2
=
7530 gate_handle_cse2
, /* gate */
7531 rest_of_handle_cse2
, /* execute */
7534 0, /* static_pass_number */
7535 TV_CSE2
, /* tv_id */
7536 0, /* properties_required */
7537 0, /* properties_provided */
7538 0, /* properties_destroyed */
7539 0, /* todo_flags_start */
7540 TODO_df_finish
| TODO_verify_rtl_sharing
|
7542 TODO_verify_flow
/* todo_flags_finish */
7547 gate_handle_cse_after_global_opts (void)
7549 return optimize
> 0 && flag_rerun_cse_after_global_opts
;
7552 /* Run second CSE pass after loop optimizations. */
7554 rest_of_handle_cse_after_global_opts (void)
7559 /* We only want to do local CSE, so don't follow jumps. */
7560 save_cfj
= flag_cse_follow_jumps
;
7561 flag_cse_follow_jumps
= 0;
7563 rebuild_jump_labels (get_insns ());
7564 tem
= cse_main (get_insns (), max_reg_num ());
7565 purge_all_dead_edges ();
7566 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7568 cse_not_expected
= !flag_rerun_cse_after_loop
;
7570 /* If cse altered any jumps, rerun jump opts to clean things up. */
7573 timevar_push (TV_JUMP
);
7574 rebuild_jump_labels (get_insns ());
7575 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7576 timevar_pop (TV_JUMP
);
7581 flag_cse_follow_jumps
= save_cfj
;
7585 struct rtl_opt_pass pass_cse_after_global_opts
=
7589 "cse_local", /* name */
7590 gate_handle_cse_after_global_opts
, /* gate */
7591 rest_of_handle_cse_after_global_opts
, /* execute */
7594 0, /* static_pass_number */
7596 0, /* properties_required */
7597 0, /* properties_provided */
7598 0, /* properties_destroyed */
7599 0, /* todo_flags_start */
7600 TODO_df_finish
| TODO_verify_rtl_sharing
|
7602 TODO_verify_flow
/* todo_flags_finish */