gcc/testsuite/gcc.target/arm/neon-vext.c

   1 /* { dg-do compile } */
   2 /* { dg-require-effective-target arm_neon_ok } */
   3 /* { dg-require-effective-target arm_little_endian } */
   4 /* { dg-options "-O2" } */
   5 /* { dg-add-options arm_neon } */
   6
   7 #include <arm_neon.h>
   8
   9 uint8x8_t
  10 tst_vext_u8 (uint8x8_t __a, uint8x8_t __b)
  11 {
  12   uint8x8_t __mask1 = {2, 3, 4, 5, 6, 7, 8, 9};
  13
  14   return __builtin_shuffle ( __a, __b, __mask1) ;
  15 }
  16
  17 uint8x8_t
  18 tst_vext_u8_rotate (uint8x8_t __a)
  19 {
  20   uint8x8_t __mask1 = {2, 3, 4, 5, 6, 7, 0, 1};
  21   return __builtin_shuffle ( __a, __mask1) ;
  22 }
  23
  24 uint16x4_t
  25 tst_vext_u16 (uint16x4_t __a, uint16x4_t __b)
  26 {
  27   uint16x4_t __mask1 = {2, 3, 4, 5};
  28   return __builtin_shuffle ( __a, __b, __mask1) ;
  29 }
  30
  31 uint16x4_t
  32 tst_vext_u16_rotate (uint16x4_t __a)
  33 {
  34   uint16x4_t __mask1 = {2, 3, 0, 1};
  35   return __builtin_shuffle ( __a, __mask1) ;
  36 }
  37
  38 uint32x2_t
  39 tst_vext_u32 (uint32x2_t __a, uint32x2_t __b)
  40 {
  41   uint32x2_t __mask1 = {1, 2};
  42   return __builtin_shuffle ( __a, __b, __mask1) ;
  43 }
  44
  45 /* This one is mapped into vrev64.32.  */
  46 uint32x2_t
  47 tst_vext_u32_rotate (uint32x2_t __a)
  48 {
  49   uint32x2_t __mask1 = {1, 0};
  50   return __builtin_shuffle ( __a, __mask1) ;
  51 }
  52
  53 uint8x16_t
  54 tst_vextq_u8 (uint8x16_t __a, uint8x16_t __b)
  55 {
  56   uint8x16_t __mask1 = {4, 5, 6, 7, 8, 9, 10, 11,
  57                         12, 13, 14, 15, 16, 17, 18, 19};
  58   return __builtin_shuffle ( __a, __b, __mask1) ;
  59 }
  60
  61 uint8x16_t
  62 tst_vextq_u8_rotate (uint8x16_t __a)
  63 {
  64   uint8x16_t __mask1 = {4, 5, 6, 7, 8, 9, 10, 11,
  65                         12, 13, 14, 15, 0, 1, 2, 3};
  66   return __builtin_shuffle ( __a, __mask1) ;
  67 }
  68
  69 uint16x8_t
  70 tst_vextq_u16 (uint16x8_t __a, uint16x8_t __b)
  71 {
  72   uint16x8_t __mask1 = {2, 3, 4, 5, 6, 7, 8, 9};
  73   return __builtin_shuffle ( __a, __b, __mask1) ;
  74 }
  75
  76 uint16x8_t
  77 tst_vextq_u16_rotate (uint16x8_t __a)
  78 {
  79   uint16x8_t __mask1 = {2, 3, 4, 5, 6, 7, 0, 1};
  80   return __builtin_shuffle ( __a, __mask1) ;
  81 }
  82
  83 uint32x4_t
  84 tst_vextq_u32 (uint32x4_t __a, uint32x4_t __b)
  85 {
  86   uint32x4_t __mask1 = {1, 2, 3, 4};
  87   return __builtin_shuffle ( __a, __b, __mask1) ;
  88 }
  89
  90 uint32x4_t
  91 tst_vextq_u32_rotate (uint32x4_t __a)
  92 {
  93   uint32x4_t __mask1 = {1, 2, 3, 0};
  94   return __builtin_shuffle ( __a, __mask1) ;
  95 }
  96
  97 uint64x2_t
  98 tst_vextq_u64 (uint64x2_t __a, uint64x2_t __b)
  99 {
 100   uint64x2_t __mask1 = {1, 2};
 101   return __builtin_shuffle ( __a, __b, __mask1) ;
 102 }
 103
 104 uint64x2_t
 105 tst_vextq_u64_rotate (uint64x2_t __a)
 106 {
 107   uint64x2_t __mask1 = {1, 0};
 108   return __builtin_shuffle ( __a, __mask1) ;
 109 }
 110
 111 /* { dg-final {scan-assembler-times "vext\.8\\t" 4} }  */
 112 /* { dg-final {scan-assembler-times "vext\.16\\t" 4} }  */
 113 /* { dg-final {scan-assembler-times "vext\.32\\t" 3} }  */
 114 /* { dg-final {scan-assembler-times "vrev64\.32\\t" 1} }  */
 115 /* { dg-final {scan-assembler-times "vext\.64\\t" 2} }  */