1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num
= 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num
;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num
;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers
;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl
[GR_MAX
];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
103 REAL_VALUE_TYPE dconst0
;
104 REAL_VALUE_TYPE dconst1
;
105 REAL_VALUE_TYPE dconst2
;
106 REAL_VALUE_TYPE dconstm1
;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab
;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab
;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn
;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw
PARAMS ((rtx
));
179 static rtx make_call_insn_raw
PARAMS ((rtx
));
180 static rtx find_line_note
PARAMS ((rtx
));
181 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
182 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
184 static void unshare_all_rtl_1
PARAMS ((rtx
));
185 static void unshare_all_decls
PARAMS ((tree
));
186 static void reset_used_decls
PARAMS ((tree
));
187 static void mark_label_nuses
PARAMS ((rtx
));
188 static hashval_t const_int_htab_hash
PARAMS ((const void *));
189 static int const_int_htab_eq
PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
192 static int mem_attrs_htab_eq
PARAMS ((const void *,
194 static void mem_attrs_mark
PARAMS ((const void *));
195 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
198 static tree component_ref_for_mem_expr
PARAMS ((tree
));
200 /* Probability of the conditional branch currently proceeded by try_split.
201 Set to -1 otherwise. */
202 int split_branch_probability
= -1;
204 /* Returns a hash code for X (which is a really a CONST_INT). */
207 const_int_htab_hash (x
)
210 return (hashval_t
) INTVAL ((const struct rtx_def
*) x
);
213 /* Returns non-zero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (x
, y
)
222 return (INTVAL ((const struct rtx_def
*) x
) == *((const HOST_WIDE_INT
*) y
));
225 /* Returns a hash code for X (which is a really a mem_attrs *). */
228 mem_attrs_htab_hash (x
)
231 mem_attrs
*p
= (mem_attrs
*) x
;
233 return (p
->alias
^ (p
->align
* 1000)
234 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
235 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
239 /* Returns non-zero if the value represented by X (which is really a
240 mem_attrs *) is the same as that given by Y (which is also really a
244 mem_attrs_htab_eq (x
, y
)
248 mem_attrs
*p
= (mem_attrs
*) x
;
249 mem_attrs
*q
= (mem_attrs
*) y
;
251 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
252 && p
->size
== q
->size
&& p
->align
== q
->align
);
255 /* This routine is called when we determine that we need a mem_attrs entry.
256 It marks the associated decl and RTL as being used, if present. */
262 mem_attrs
*p
= (mem_attrs
*) x
;
265 ggc_mark_tree (p
->expr
);
268 ggc_mark_rtx (p
->offset
);
271 ggc_mark_rtx (p
->size
);
274 /* Allocate a new mem_attrs structure and insert it into the hash table if
275 one identical to it is not already in the table. We are doing this for
279 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
285 enum machine_mode mode
;
290 /* If everything is the default, we can just return zero. */
291 if (alias
== 0 && expr
== 0 && offset
== 0
293 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
294 && (align
== BITS_PER_UNIT
295 || (mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
300 attrs
.offset
= offset
;
304 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
307 *slot
= ggc_alloc (sizeof (mem_attrs
));
308 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
314 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
315 don't attempt to share with the various global pieces of rtl (such as
316 frame_pointer_rtx). */
319 gen_raw_REG (mode
, regno
)
320 enum machine_mode mode
;
323 rtx x
= gen_rtx_raw_REG (mode
, regno
);
324 ORIGINAL_REGNO (x
) = regno
;
328 /* There are some RTL codes that require special attention; the generation
329 functions do the raw handling. If you add to this list, modify
330 special_rtx in gengenrtl.c as well. */
333 gen_rtx_CONST_INT (mode
, arg
)
334 enum machine_mode mode ATTRIBUTE_UNUSED
;
339 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
340 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
342 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
343 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
344 return const_true_rtx
;
347 /* Look up the CONST_INT in the hash table. */
348 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
349 (hashval_t
) arg
, INSERT
);
351 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
356 /* CONST_DOUBLEs needs special handling because their length is known
360 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
)
361 enum machine_mode mode
;
362 HOST_WIDE_INT arg0
, arg1
;
364 rtx r
= rtx_alloc (CONST_DOUBLE
);
368 X0EXP (r
, 0) = NULL_RTX
;
372 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 2; --i
)
379 gen_rtx_REG (mode
, regno
)
380 enum machine_mode mode
;
383 /* In case the MD file explicitly references the frame pointer, have
384 all such references point to the same frame pointer. This is
385 used during frame pointer elimination to distinguish the explicit
386 references to these registers from pseudos that happened to be
389 If we have eliminated the frame pointer or arg pointer, we will
390 be using it as a normal register, for example as a spill
391 register. In such cases, we might be accessing it in a mode that
392 is not Pmode and therefore cannot use the pre-allocated rtx.
394 Also don't do this when we are making new REGs in reload, since
395 we don't want to get confused with the real pointers. */
397 if (mode
== Pmode
&& !reload_in_progress
)
399 if (regno
== FRAME_POINTER_REGNUM
)
400 return frame_pointer_rtx
;
401 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
402 if (regno
== HARD_FRAME_POINTER_REGNUM
)
403 return hard_frame_pointer_rtx
;
405 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
406 if (regno
== ARG_POINTER_REGNUM
)
407 return arg_pointer_rtx
;
409 #ifdef RETURN_ADDRESS_POINTER_REGNUM
410 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
411 return return_address_pointer_rtx
;
413 if (regno
== STACK_POINTER_REGNUM
)
414 return stack_pointer_rtx
;
417 return gen_raw_REG (mode
, regno
);
421 gen_rtx_MEM (mode
, addr
)
422 enum machine_mode mode
;
425 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
427 /* This field is not cleared by the mere allocation of the rtx, so
435 gen_rtx_SUBREG (mode
, reg
, offset
)
436 enum machine_mode mode
;
440 /* This is the most common failure type.
441 Catch it early so we can see who does it. */
442 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
445 /* This check isn't usable right now because combine will
446 throw arbitrary crap like a CALL into a SUBREG in
447 gen_lowpart_for_combine so we must just eat it. */
449 /* Check for this too. */
450 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
453 return gen_rtx_fmt_ei (SUBREG
, mode
, reg
, offset
);
456 /* Generate a SUBREG representing the least-significant part of REG if MODE
457 is smaller than mode of REG, otherwise paradoxical SUBREG. */
460 gen_lowpart_SUBREG (mode
, reg
)
461 enum machine_mode mode
;
464 enum machine_mode inmode
;
466 inmode
= GET_MODE (reg
);
467 if (inmode
== VOIDmode
)
469 return gen_rtx_SUBREG (mode
, reg
,
470 subreg_lowpart_offset (mode
, inmode
));
473 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
475 ** This routine generates an RTX of the size specified by
476 ** <code>, which is an RTX code. The RTX structure is initialized
477 ** from the arguments <element1> through <elementn>, which are
478 ** interpreted according to the specific RTX type's format. The
479 ** special machine mode associated with the rtx (if any) is specified
482 ** gen_rtx can be invoked in a way which resembles the lisp-like
483 ** rtx it will generate. For example, the following rtx structure:
485 ** (plus:QI (mem:QI (reg:SI 1))
486 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
488 ** ...would be generated by the following C code:
490 ** gen_rtx (PLUS, QImode,
491 ** gen_rtx (MEM, QImode,
492 ** gen_rtx (REG, SImode, 1)),
493 ** gen_rtx (MEM, QImode,
494 ** gen_rtx (PLUS, SImode,
495 ** gen_rtx (REG, SImode, 2),
496 ** gen_rtx (REG, SImode, 3)))),
501 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
503 int i
; /* Array indices... */
504 const char *fmt
; /* Current rtx's format... */
505 rtx rt_val
; /* RTX to return to caller... */
508 VA_FIXEDARG (p
, enum rtx_code
, code
);
509 VA_FIXEDARG (p
, enum machine_mode
, mode
);
514 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
519 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
520 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
522 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
);
527 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
531 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
535 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
536 rt_val
->mode
= mode
; /* Store the machine mode... */
538 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
539 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
543 case '0': /* Unused field. */
546 case 'i': /* An integer? */
547 XINT (rt_val
, i
) = va_arg (p
, int);
550 case 'w': /* A wide integer? */
551 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
554 case 's': /* A string? */
555 XSTR (rt_val
, i
) = va_arg (p
, char *);
558 case 'e': /* An expression? */
559 case 'u': /* An insn? Same except when printing. */
560 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
563 case 'E': /* An RTX vector? */
564 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
567 case 'b': /* A bitmap? */
568 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
571 case 't': /* A tree? */
572 XTREE (rt_val
, i
) = va_arg (p
, tree
);
586 /* gen_rtvec (n, [rt1, ..., rtn])
588 ** This routine creates an rtvec and stores within it the
589 ** pointers to rtx's which are its arguments.
594 gen_rtvec
VPARAMS ((int n
, ...))
600 VA_FIXEDARG (p
, int, n
);
603 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
605 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
607 for (i
= 0; i
< n
; i
++)
608 vector
[i
] = va_arg (p
, rtx
);
610 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
614 return gen_rtvec_v (save_n
, vector
);
618 gen_rtvec_v (n
, argp
)
626 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
628 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
630 for (i
= 0; i
< n
; i
++)
631 rt_val
->elem
[i
] = *argp
++;
636 /* Generate a REG rtx for a new pseudo register of mode MODE.
637 This pseudo is assigned the next sequential register number. */
641 enum machine_mode mode
;
643 struct function
*f
= cfun
;
646 /* Don't let anything called after initial flow analysis create new
651 if (generating_concat_p
652 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
653 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
655 /* For complex modes, don't make a single pseudo.
656 Instead, make a CONCAT of two pseudos.
657 This allows noncontiguous allocation of the real and imaginary parts,
658 which makes much better code. Besides, allocating DCmode
659 pseudos overstrains reload on some machines like the 386. */
660 rtx realpart
, imagpart
;
661 int size
= GET_MODE_UNIT_SIZE (mode
);
662 enum machine_mode partmode
663 = mode_for_size (size
* BITS_PER_UNIT
,
664 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
665 ? MODE_FLOAT
: MODE_INT
),
668 realpart
= gen_reg_rtx (partmode
);
669 imagpart
= gen_reg_rtx (partmode
);
670 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
673 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
674 enough to have an element for this pseudo reg number. */
676 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
678 int old_size
= f
->emit
->regno_pointer_align_length
;
683 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
684 memset (new + old_size
, 0, old_size
);
685 f
->emit
->regno_pointer_align
= (unsigned char *) new;
687 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
688 old_size
* 2 * sizeof (rtx
));
689 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
690 regno_reg_rtx
= new1
;
692 new2
= (tree
*) xrealloc (f
->emit
->regno_decl
,
693 old_size
* 2 * sizeof (tree
));
694 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
695 f
->emit
->regno_decl
= new2
;
697 f
->emit
->regno_pointer_align_length
= old_size
* 2;
700 val
= gen_raw_REG (mode
, reg_rtx_no
);
701 regno_reg_rtx
[reg_rtx_no
++] = val
;
705 /* Identify REG (which may be a CONCAT) as a user register. */
711 if (GET_CODE (reg
) == CONCAT
)
713 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
714 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
716 else if (GET_CODE (reg
) == REG
)
717 REG_USERVAR_P (reg
) = 1;
722 /* Identify REG as a probable pointer register and show its alignment
723 as ALIGN, if nonzero. */
726 mark_reg_pointer (reg
, align
)
730 if (! REG_POINTER (reg
))
732 REG_POINTER (reg
) = 1;
735 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
737 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
738 /* We can no-longer be sure just how aligned this pointer is */
739 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
742 /* Return 1 plus largest pseudo reg number used in the current function. */
750 /* Return 1 + the largest label number used so far in the current function. */
755 if (last_label_num
&& label_num
== base_label_num
)
756 return last_label_num
;
760 /* Return first label number used in this function (if any were used). */
763 get_first_label_num ()
765 return first_label_num
;
768 /* Return the final regno of X, which is a SUBREG of a hard
771 subreg_hard_regno (x
, check_mode
)
775 enum machine_mode mode
= GET_MODE (x
);
776 unsigned int byte_offset
, base_regno
, final_regno
;
777 rtx reg
= SUBREG_REG (x
);
779 /* This is where we attempt to catch illegal subregs
780 created by the compiler. */
781 if (GET_CODE (x
) != SUBREG
782 || GET_CODE (reg
) != REG
)
784 base_regno
= REGNO (reg
);
785 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
787 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
790 /* Catch non-congruent offsets too. */
791 byte_offset
= SUBREG_BYTE (x
);
792 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
795 final_regno
= subreg_regno (x
);
800 /* Return a value representing some low-order bits of X, where the number
801 of low-order bits is given by MODE. Note that no conversion is done
802 between floating-point and fixed-point values, rather, the bit
803 representation is returned.
805 This function handles the cases in common between gen_lowpart, below,
806 and two variants in cse.c and combine.c. These are the cases that can
807 be safely handled at all points in the compilation.
809 If this is not a case we can handle, return 0. */
812 gen_lowpart_common (mode
, x
)
813 enum machine_mode mode
;
816 int msize
= GET_MODE_SIZE (mode
);
817 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
820 if (GET_MODE (x
) == mode
)
823 /* MODE must occupy no more words than the mode of X. */
824 if (GET_MODE (x
) != VOIDmode
825 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
826 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
829 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
831 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
832 && (GET_MODE_CLASS (mode
) == MODE_INT
833 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
835 /* If we are getting the low-order part of something that has been
836 sign- or zero-extended, we can either just use the object being
837 extended or make a narrower extension. If we want an even smaller
838 piece than the size of the object being extended, call ourselves
841 This case is used mostly by combine and cse. */
843 if (GET_MODE (XEXP (x
, 0)) == mode
)
845 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
846 return gen_lowpart_common (mode
, XEXP (x
, 0));
847 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
848 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
850 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
851 || GET_CODE (x
) == CONCAT
)
852 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
853 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
854 from the low-order part of the constant. */
855 else if ((GET_MODE_CLASS (mode
) == MODE_INT
856 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
857 && GET_MODE (x
) == VOIDmode
858 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
860 /* If MODE is twice the host word size, X is already the desired
861 representation. Otherwise, if MODE is wider than a word, we can't
862 do this. If MODE is exactly a word, return just one CONST_INT. */
864 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
866 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
868 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
869 return (GET_CODE (x
) == CONST_INT
? x
870 : GEN_INT (CONST_DOUBLE_LOW (x
)));
873 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
874 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
875 : CONST_DOUBLE_LOW (x
));
877 /* Sign extend to HOST_WIDE_INT. */
878 val
= trunc_int_for_mode (val
, mode
);
880 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
885 #ifndef REAL_ARITHMETIC
886 /* If X is an integral constant but we want it in floating-point, it
887 must be the case that we have a union of an integer and a floating-point
888 value. If the machine-parameters allow it, simulate that union here
889 and return the result. The two-word and single-word cases are
892 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
893 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
894 || flag_pretend_float
)
895 && GET_MODE_CLASS (mode
) == MODE_FLOAT
896 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
897 && GET_CODE (x
) == CONST_INT
898 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
900 union {HOST_WIDE_INT i
; float d
; } u
;
903 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
905 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
906 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
907 || flag_pretend_float
)
908 && GET_MODE_CLASS (mode
) == MODE_FLOAT
909 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
910 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
911 && GET_MODE (x
) == VOIDmode
912 && (sizeof (double) * HOST_BITS_PER_CHAR
913 == 2 * HOST_BITS_PER_WIDE_INT
))
915 union {HOST_WIDE_INT i
[2]; double d
; } u
;
916 HOST_WIDE_INT low
, high
;
918 if (GET_CODE (x
) == CONST_INT
)
919 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
921 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
923 #ifdef HOST_WORDS_BIG_ENDIAN
924 u
.i
[0] = high
, u
.i
[1] = low
;
926 u
.i
[0] = low
, u
.i
[1] = high
;
929 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
932 /* Similarly, if this is converting a floating-point value into a
933 single-word integer. Only do this is the host and target parameters are
936 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
937 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
938 || flag_pretend_float
)
939 && (GET_MODE_CLASS (mode
) == MODE_INT
940 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
941 && GET_CODE (x
) == CONST_DOUBLE
942 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
943 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
944 return constant_subword (x
, (offset
/ UNITS_PER_WORD
), GET_MODE (x
));
946 /* Similarly, if this is converting a floating-point value into a
947 two-word integer, we can do this one word at a time and make an
948 integer. Only do this is the host and target parameters are
951 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
952 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
953 || flag_pretend_float
)
954 && (GET_MODE_CLASS (mode
) == MODE_INT
955 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
956 && GET_CODE (x
) == CONST_DOUBLE
957 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
958 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
960 rtx lowpart
, highpart
;
962 lowpart
= constant_subword (x
,
963 (offset
/ UNITS_PER_WORD
) + WORDS_BIG_ENDIAN
,
965 highpart
= constant_subword (x
,
966 (offset
/ UNITS_PER_WORD
) + (! WORDS_BIG_ENDIAN
),
968 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
969 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
970 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
972 #else /* ifndef REAL_ARITHMETIC */
974 /* When we have a FP emulator, we can handle all conversions between
975 FP and integer operands. This simplifies reload because it
976 doesn't have to deal with constructs like (subreg:DI
977 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
978 /* Single-precision floats are always 32-bits and double-precision
979 floats are always 64-bits. */
981 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
982 && GET_MODE_BITSIZE (mode
) == 32
983 && GET_CODE (x
) == CONST_INT
)
989 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
990 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
992 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
993 && GET_MODE_BITSIZE (mode
) == 64
994 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
995 && GET_MODE (x
) == VOIDmode
)
999 HOST_WIDE_INT low
, high
;
1001 if (GET_CODE (x
) == CONST_INT
)
1004 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1008 low
= CONST_DOUBLE_LOW (x
);
1009 high
= CONST_DOUBLE_HIGH (x
);
1012 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1014 if (WORDS_BIG_ENDIAN
)
1015 i
[0] = high
, i
[1] = low
;
1017 i
[0] = low
, i
[1] = high
;
1019 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
1020 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1022 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1023 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1024 && GET_CODE (x
) == CONST_DOUBLE
1025 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1028 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1029 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1031 /* Convert 'r' into an array of four 32-bit words in target word
1033 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1034 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1037 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1040 i
[3 - 3 * endian
] = 0;
1043 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1044 i
[2 - 2 * endian
] = 0;
1045 i
[3 - 2 * endian
] = 0;
1048 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1049 i
[3 - 3 * endian
] = 0;
1052 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1057 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1059 #if HOST_BITS_PER_WIDE_INT == 32
1060 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1062 if (HOST_BITS_PER_WIDE_INT
!= 64)
1065 return immed_double_const ((((unsigned long) i
[3 * endian
])
1066 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1067 (((unsigned long) i
[2 - endian
])
1068 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1072 #endif /* ifndef REAL_ARITHMETIC */
1074 /* Otherwise, we can't do this. */
1078 /* Return the real part (which has mode MODE) of a complex value X.
1079 This always comes at the low address in memory. */
1082 gen_realpart (mode
, x
)
1083 enum machine_mode mode
;
1086 if (WORDS_BIG_ENDIAN
1087 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1089 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1091 ("can't access real part of complex value in hard register");
1092 else if (WORDS_BIG_ENDIAN
)
1093 return gen_highpart (mode
, x
);
1095 return gen_lowpart (mode
, x
);
1098 /* Return the imaginary part (which has mode MODE) of a complex value X.
1099 This always comes at the high address in memory. */
1102 gen_imagpart (mode
, x
)
1103 enum machine_mode mode
;
1106 if (WORDS_BIG_ENDIAN
)
1107 return gen_lowpart (mode
, x
);
1108 else if (! WORDS_BIG_ENDIAN
1109 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1111 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1113 ("can't access imaginary part of complex value in hard register");
1115 return gen_highpart (mode
, x
);
1118 /* Return 1 iff X, assumed to be a SUBREG,
1119 refers to the real part of the complex value in its containing reg.
1120 Complex values are always stored with the real part in the first word,
1121 regardless of WORDS_BIG_ENDIAN. */
1124 subreg_realpart_p (x
)
1127 if (GET_CODE (x
) != SUBREG
)
1130 return ((unsigned int) SUBREG_BYTE (x
)
1131 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1134 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1135 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1136 least-significant part of X.
1137 MODE specifies how big a part of X to return;
1138 it usually should not be larger than a word.
1139 If X is a MEM whose address is a QUEUED, the value may be so also. */
1142 gen_lowpart (mode
, x
)
1143 enum machine_mode mode
;
1146 rtx result
= gen_lowpart_common (mode
, x
);
1150 else if (GET_CODE (x
) == REG
)
1152 /* Must be a hard reg that's not valid in MODE. */
1153 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1158 else if (GET_CODE (x
) == MEM
)
1160 /* The only additional case we can do is MEM. */
1162 if (WORDS_BIG_ENDIAN
)
1163 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1164 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1166 if (BYTES_BIG_ENDIAN
)
1167 /* Adjust the address so that the address-after-the-data
1169 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1170 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1172 return adjust_address (x
, mode
, offset
);
1174 else if (GET_CODE (x
) == ADDRESSOF
)
1175 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1180 /* Like `gen_lowpart', but refer to the most significant part.
1181 This is used to access the imaginary part of a complex number. */
1184 gen_highpart (mode
, x
)
1185 enum machine_mode mode
;
1188 unsigned int msize
= GET_MODE_SIZE (mode
);
1191 /* This case loses if X is a subreg. To catch bugs early,
1192 complain if an invalid MODE is used even in other cases. */
1193 if (msize
> UNITS_PER_WORD
1194 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1197 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1198 subreg_highpart_offset (mode
, GET_MODE (x
)));
1200 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1201 the target if we have a MEM. gen_highpart must return a valid operand,
1202 emitting code if necessary to do so. */
1203 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1204 result
= validize_mem (result
);
1211 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1212 be VOIDmode constant. */
1214 gen_highpart_mode (outermode
, innermode
, exp
)
1215 enum machine_mode outermode
, innermode
;
1218 if (GET_MODE (exp
) != VOIDmode
)
1220 if (GET_MODE (exp
) != innermode
)
1222 return gen_highpart (outermode
, exp
);
1224 return simplify_gen_subreg (outermode
, exp
, innermode
,
1225 subreg_highpart_offset (outermode
, innermode
));
1227 /* Return offset in bytes to get OUTERMODE low part
1228 of the value in mode INNERMODE stored in memory in target format. */
1231 subreg_lowpart_offset (outermode
, innermode
)
1232 enum machine_mode outermode
, innermode
;
1234 unsigned int offset
= 0;
1235 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1239 if (WORDS_BIG_ENDIAN
)
1240 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1241 if (BYTES_BIG_ENDIAN
)
1242 offset
+= difference
% UNITS_PER_WORD
;
1248 /* Return offset in bytes to get OUTERMODE high part
1249 of the value in mode INNERMODE stored in memory in target format. */
1251 subreg_highpart_offset (outermode
, innermode
)
1252 enum machine_mode outermode
, innermode
;
1254 unsigned int offset
= 0;
1255 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1257 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1262 if (! WORDS_BIG_ENDIAN
)
1263 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1264 if (! BYTES_BIG_ENDIAN
)
1265 offset
+= difference
% UNITS_PER_WORD
;
1271 /* Return 1 iff X, assumed to be a SUBREG,
1272 refers to the least significant part of its containing reg.
1273 If X is not a SUBREG, always return 1 (it is its own low part!). */
1276 subreg_lowpart_p (x
)
1279 if (GET_CODE (x
) != SUBREG
)
1281 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1284 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1285 == SUBREG_BYTE (x
));
1289 /* Helper routine for all the constant cases of operand_subword.
1290 Some places invoke this directly. */
1293 constant_subword (op
, offset
, mode
)
1296 enum machine_mode mode
;
1298 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1301 /* If OP is already an integer word, return it. */
1302 if (GET_MODE_CLASS (mode
) == MODE_INT
1303 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1306 #ifdef REAL_ARITHMETIC
1307 /* The output is some bits, the width of the target machine's word.
1308 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1310 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1311 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1312 && GET_MODE_BITSIZE (mode
) == 64
1313 && GET_CODE (op
) == CONST_DOUBLE
)
1318 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1319 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1321 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1322 which the words are written depends on the word endianness.
1323 ??? This is a potential portability problem and should
1324 be fixed at some point.
1326 We must exercise caution with the sign bit. By definition there
1327 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1328 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1329 So we explicitly mask and sign-extend as necessary. */
1330 if (BITS_PER_WORD
== 32)
1333 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1334 return GEN_INT (val
);
1336 #if HOST_BITS_PER_WIDE_INT >= 64
1337 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1339 val
= k
[! WORDS_BIG_ENDIAN
];
1340 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1341 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1342 return GEN_INT (val
);
1345 else if (BITS_PER_WORD
== 16)
1347 val
= k
[offset
>> 1];
1348 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1350 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1351 return GEN_INT (val
);
1356 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1357 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1358 && GET_MODE_BITSIZE (mode
) > 64
1359 && GET_CODE (op
) == CONST_DOUBLE
)
1364 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1365 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1367 if (BITS_PER_WORD
== 32)
1370 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1371 return GEN_INT (val
);
1373 #if HOST_BITS_PER_WIDE_INT >= 64
1374 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1376 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1377 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1378 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1379 return GEN_INT (val
);
1385 #else /* no REAL_ARITHMETIC */
1386 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1387 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1388 || flag_pretend_float
)
1389 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1390 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1391 && GET_CODE (op
) == CONST_DOUBLE
)
1393 /* The constant is stored in the host's word-ordering,
1394 but we want to access it in the target's word-ordering. Some
1395 compilers don't like a conditional inside macro args, so we have two
1396 copies of the return. */
1397 #ifdef HOST_WORDS_BIG_ENDIAN
1398 return GEN_INT (offset
== WORDS_BIG_ENDIAN
1399 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1401 return GEN_INT (offset
!= WORDS_BIG_ENDIAN
1402 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1405 #endif /* no REAL_ARITHMETIC */
1407 /* Single word float is a little harder, since single- and double-word
1408 values often do not have the same high-order bits. We have already
1409 verified that we want the only defined word of the single-word value. */
1410 #ifdef REAL_ARITHMETIC
1411 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1412 && GET_MODE_BITSIZE (mode
) == 32
1413 && GET_CODE (op
) == CONST_DOUBLE
)
1418 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1419 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1421 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1423 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1425 if (BITS_PER_WORD
== 16)
1427 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1429 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1432 return GEN_INT (val
);
1435 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1436 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1437 || flag_pretend_float
)
1438 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1439 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1440 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1441 && GET_CODE (op
) == CONST_DOUBLE
)
1444 union {float f
; HOST_WIDE_INT i
; } u
;
1446 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1449 return GEN_INT (u
.i
);
1451 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1452 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1453 || flag_pretend_float
)
1454 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1455 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1456 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1457 && GET_CODE (op
) == CONST_DOUBLE
)
1460 union {double d
; HOST_WIDE_INT i
; } u
;
1462 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1465 return GEN_INT (u
.i
);
1467 #endif /* no REAL_ARITHMETIC */
1469 /* The only remaining cases that we can handle are integers.
1470 Convert to proper endianness now since these cases need it.
1471 At this point, offset == 0 means the low-order word.
1473 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1474 in general. However, if OP is (const_int 0), we can just return
1477 if (op
== const0_rtx
)
1480 if (GET_MODE_CLASS (mode
) != MODE_INT
1481 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1482 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1485 if (WORDS_BIG_ENDIAN
)
1486 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1488 /* Find out which word on the host machine this value is in and get
1489 it from the constant. */
1490 val
= (offset
/ size_ratio
== 0
1491 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1492 : (GET_CODE (op
) == CONST_INT
1493 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1495 /* Get the value we want into the low bits of val. */
1496 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1497 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1499 val
= trunc_int_for_mode (val
, word_mode
);
1501 return GEN_INT (val
);
1504 /* Return subword OFFSET of operand OP.
1505 The word number, OFFSET, is interpreted as the word number starting
1506 at the low-order address. OFFSET 0 is the low-order word if not
1507 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1509 If we cannot extract the required word, we return zero. Otherwise,
1510 an rtx corresponding to the requested word will be returned.
1512 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1513 reload has completed, a valid address will always be returned. After
1514 reload, if a valid address cannot be returned, we return zero.
1516 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1517 it is the responsibility of the caller.
1519 MODE is the mode of OP in case it is a CONST_INT.
1521 ??? This is still rather broken for some cases. The problem for the
1522 moment is that all callers of this thing provide no 'goal mode' to
1523 tell us to work with. This exists because all callers were written
1524 in a word based SUBREG world.
1525 Now use of this function can be deprecated by simplify_subreg in most
1530 operand_subword (op
, offset
, validate_address
, mode
)
1532 unsigned int offset
;
1533 int validate_address
;
1534 enum machine_mode mode
;
1536 if (mode
== VOIDmode
)
1537 mode
= GET_MODE (op
);
1539 if (mode
== VOIDmode
)
1542 /* If OP is narrower than a word, fail. */
1544 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1547 /* If we want a word outside OP, return zero. */
1549 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1552 /* Form a new MEM at the requested address. */
1553 if (GET_CODE (op
) == MEM
)
1555 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1557 if (! validate_address
)
1560 else if (reload_completed
)
1562 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1566 return replace_equiv_address (new, XEXP (new, 0));
1569 /* Rest can be handled by simplify_subreg. */
1570 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1573 /* Similar to `operand_subword', but never return 0. If we can't extract
1574 the required subword, put OP into a register and try again. If that fails,
1575 abort. We always validate the address in this case.
1577 MODE is the mode of OP, in case it is CONST_INT. */
1580 operand_subword_force (op
, offset
, mode
)
1582 unsigned int offset
;
1583 enum machine_mode mode
;
1585 rtx result
= operand_subword (op
, offset
, 1, mode
);
1590 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1592 /* If this is a register which can not be accessed by words, copy it
1593 to a pseudo register. */
1594 if (GET_CODE (op
) == REG
)
1595 op
= copy_to_reg (op
);
1597 op
= force_reg (mode
, op
);
1600 result
= operand_subword (op
, offset
, 1, mode
);
1607 /* Given a compare instruction, swap the operands.
1608 A test instruction is changed into a compare of 0 against the operand. */
1611 reverse_comparison (insn
)
1614 rtx body
= PATTERN (insn
);
1617 if (GET_CODE (body
) == SET
)
1618 comp
= SET_SRC (body
);
1620 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1622 if (GET_CODE (comp
) == COMPARE
)
1624 rtx op0
= XEXP (comp
, 0);
1625 rtx op1
= XEXP (comp
, 1);
1626 XEXP (comp
, 0) = op1
;
1627 XEXP (comp
, 1) = op0
;
1631 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1632 CONST0_RTX (GET_MODE (comp
)), comp
);
1633 if (GET_CODE (body
) == SET
)
1634 SET_SRC (body
) = new;
1636 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1640 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1641 or (2) a component ref of something variable. Represent the later with
1642 a NULL expression. */
1645 component_ref_for_mem_expr (ref
)
1648 tree inner
= TREE_OPERAND (ref
, 0);
1650 if (TREE_CODE (inner
) == COMPONENT_REF
)
1651 inner
= component_ref_for_mem_expr (inner
);
1654 tree placeholder_ptr
= 0;
1656 /* Now remove any conversions: they don't change what the underlying
1657 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1658 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1659 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1660 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1661 || TREE_CODE (inner
) == SAVE_EXPR
1662 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1663 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1664 inner
= find_placeholder (inner
, &placeholder_ptr
);
1666 inner
= TREE_OPERAND (inner
, 0);
1668 if (! DECL_P (inner
))
1672 if (inner
== TREE_OPERAND (ref
, 0))
1675 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1676 TREE_OPERAND (ref
, 1));
1679 /* Given REF, a MEM, and T, either the type of X or the expression
1680 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1681 if we are making a new object of this type. */
1684 set_mem_attributes (ref
, t
, objectp
)
1689 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1690 tree expr
= MEM_EXPR (ref
);
1691 rtx offset
= MEM_OFFSET (ref
);
1692 rtx size
= MEM_SIZE (ref
);
1693 unsigned int align
= MEM_ALIGN (ref
);
1696 /* It can happen that type_for_mode was given a mode for which there
1697 is no language-level type. In which case it returns NULL, which
1702 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1704 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1705 wrong answer, as it assumes that DECL_RTL already has the right alias
1706 info. Callers should not set DECL_RTL until after the call to
1707 set_mem_attributes. */
1708 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1711 /* Get the alias set from the expression or type (perhaps using a
1712 front-end routine) and use it. */
1713 alias
= get_alias_set (t
);
1715 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1716 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1717 RTX_UNCHANGING_P (ref
)
1718 |= ((lang_hooks
.honor_readonly
1719 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1720 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1722 /* If we are making an object of this type, or if this is a DECL, we know
1723 that it is a scalar if the type is not an aggregate. */
1724 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1725 MEM_SCALAR_P (ref
) = 1;
1727 /* We can set the alignment from the type if we are making an object,
1728 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1729 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1730 align
= MAX (align
, TYPE_ALIGN (type
));
1732 /* If the size is known, we can set that. */
1733 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1734 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1736 /* If T is not a type, we may be able to deduce some more information about
1740 maybe_set_unchanging (ref
, t
);
1741 if (TREE_THIS_VOLATILE (t
))
1742 MEM_VOLATILE_P (ref
) = 1;
1744 /* Now remove any conversions: they don't change what the underlying
1745 object is. Likewise for SAVE_EXPR. */
1746 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1747 || TREE_CODE (t
) == NON_LVALUE_EXPR
1748 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1749 || TREE_CODE (t
) == SAVE_EXPR
)
1750 t
= TREE_OPERAND (t
, 0);
1752 /* If this expression can't be addressed (e.g., it contains a reference
1753 to a non-addressable field), show we don't change its alias set. */
1754 if (! can_address_p (t
))
1755 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1757 /* If this is a decl, set the attributes of the MEM from it. */
1761 offset
= const0_rtx
;
1762 size
= (DECL_SIZE_UNIT (t
)
1763 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1764 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1765 align
= DECL_ALIGN (t
);
1768 /* If this is a constant, we know the alignment. */
1769 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1771 align
= TYPE_ALIGN (type
);
1772 #ifdef CONSTANT_ALIGNMENT
1773 align
= CONSTANT_ALIGNMENT (t
, align
);
1777 /* If this is a field reference and not a bit-field, record it. */
1778 /* ??? There is some information that can be gleened from bit-fields,
1779 such as the word offset in the structure that might be modified.
1780 But skip it for now. */
1781 else if (TREE_CODE (t
) == COMPONENT_REF
1782 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1784 expr
= component_ref_for_mem_expr (t
);
1785 offset
= const0_rtx
;
1786 /* ??? Any reason the field size would be different than
1787 the size we got from the type? */
1790 /* If this is an array reference, look for an outer field reference. */
1791 else if (TREE_CODE (t
) == ARRAY_REF
)
1793 tree off_tree
= size_zero_node
;
1798 = fold (build (PLUS_EXPR
, sizetype
,
1799 fold (build (MULT_EXPR
, sizetype
,
1800 TREE_OPERAND (t
, 1),
1801 TYPE_SIZE_UNIT (TREE_TYPE (t
)))),
1803 t
= TREE_OPERAND (t
, 0);
1805 while (TREE_CODE (t
) == ARRAY_REF
);
1807 if (TREE_CODE (t
) == COMPONENT_REF
)
1809 expr
= component_ref_for_mem_expr (t
);
1810 if (host_integerp (off_tree
, 1))
1811 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1812 /* ??? Any reason the field size would be different than
1813 the size we got from the type? */
1818 /* Now set the attributes we computed above. */
1820 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1822 /* If this is already known to be a scalar or aggregate, we are done. */
1823 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1826 /* If it is a reference into an aggregate, this is part of an aggregate.
1827 Otherwise we don't know. */
1828 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1829 || TREE_CODE (t
) == ARRAY_RANGE_REF
1830 || TREE_CODE (t
) == BIT_FIELD_REF
)
1831 MEM_IN_STRUCT_P (ref
) = 1;
1834 /* Set the alias set of MEM to SET. */
1837 set_mem_alias_set (mem
, set
)
1841 #ifdef ENABLE_CHECKING
1842 /* If the new and old alias sets don't conflict, something is wrong. */
1843 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1847 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1848 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1852 /* Set the alignment of MEM to ALIGN bits. */
1855 set_mem_align (mem
, align
)
1859 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1860 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1864 /* Set the expr for MEM to EXPR. */
1867 set_mem_expr (mem
, expr
)
1872 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1873 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1876 /* Set the offset of MEM to OFFSET. */
1879 set_mem_offset (mem
, offset
)
1882 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1883 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1887 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1888 and its address changed to ADDR. (VOIDmode means don't change the mode.
1889 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1890 returned memory location is required to be valid. The memory
1891 attributes are not changed. */
1894 change_address_1 (memref
, mode
, addr
, validate
)
1896 enum machine_mode mode
;
1902 if (GET_CODE (memref
) != MEM
)
1904 if (mode
== VOIDmode
)
1905 mode
= GET_MODE (memref
);
1907 addr
= XEXP (memref
, 0);
1911 if (reload_in_progress
|| reload_completed
)
1913 if (! memory_address_p (mode
, addr
))
1917 addr
= memory_address (mode
, addr
);
1920 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1923 new = gen_rtx_MEM (mode
, addr
);
1924 MEM_COPY_ATTRIBUTES (new, memref
);
1928 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1929 way we are changing MEMREF, so we only preserve the alias set. */
1932 change_address (memref
, mode
, addr
)
1934 enum machine_mode mode
;
1937 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
1938 enum machine_mode mmode
= GET_MODE (new);
1941 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
1942 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
1943 (mmode
== BLKmode
? BITS_PER_UNIT
1944 : GET_MODE_ALIGNMENT (mmode
)),
1950 /* Return a memory reference like MEMREF, but with its mode changed
1951 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1952 nonzero, the memory address is forced to be valid.
1953 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1954 and caller is responsible for adjusting MEMREF base register. */
1957 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
1959 enum machine_mode mode
;
1960 HOST_WIDE_INT offset
;
1961 int validate
, adjust
;
1963 rtx addr
= XEXP (memref
, 0);
1965 rtx memoffset
= MEM_OFFSET (memref
);
1967 unsigned int memalign
= MEM_ALIGN (memref
);
1969 /* ??? Prefer to create garbage instead of creating shared rtl.
1970 This may happen even if offset is non-zero -- consider
1971 (plus (plus reg reg) const_int) -- so do this always. */
1972 addr
= copy_rtx (addr
);
1976 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1977 object, we can merge it into the LO_SUM. */
1978 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1980 && (unsigned HOST_WIDE_INT
) offset
1981 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1982 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1983 plus_constant (XEXP (addr
, 1), offset
));
1985 addr
= plus_constant (addr
, offset
);
1988 new = change_address_1 (memref
, mode
, addr
, validate
);
1990 /* Compute the new values of the memory attributes due to this adjustment.
1991 We add the offsets and update the alignment. */
1993 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1995 /* Compute the new alignment by taking the MIN of the alignment and the
1996 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1999 memalign
= MIN (memalign
,
2000 (unsigned int) (offset
& -offset
) * BITS_PER_UNIT
);
2002 /* We can compute the size in a number of ways. */
2003 if (GET_MODE (new) != BLKmode
)
2004 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2005 else if (MEM_SIZE (memref
))
2006 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2008 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2009 memoffset
, size
, memalign
, GET_MODE (new));
2011 /* At some point, we should validate that this offset is within the object,
2012 if all the appropriate values are known. */
2016 /* Return a memory reference like MEMREF, but with its mode changed
2017 to MODE and its address changed to ADDR, which is assumed to be
2018 MEMREF offseted by OFFSET bytes. If VALIDATE is
2019 nonzero, the memory address is forced to be valid. */
2022 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2024 enum machine_mode mode
;
2026 HOST_WIDE_INT offset
;
2029 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2030 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2033 /* Return a memory reference like MEMREF, but whose address is changed by
2034 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2035 known to be in OFFSET (possibly 1). */
2038 offset_address (memref
, offset
, pow2
)
2043 rtx
new = change_address_1 (memref
, VOIDmode
,
2044 gen_rtx_PLUS (Pmode
, XEXP (memref
, 0),
2045 force_reg (Pmode
, offset
)), 1);
2047 /* Update the alignment to reflect the offset. Reset the offset, which
2050 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2051 MIN (MEM_ALIGN (memref
),
2052 (unsigned int) pow2
* BITS_PER_UNIT
),
2057 /* Return a memory reference like MEMREF, but with its address changed to
2058 ADDR. The caller is asserting that the actual piece of memory pointed
2059 to is the same, just the form of the address is being changed, such as
2060 by putting something into a register. */
2063 replace_equiv_address (memref
, addr
)
2067 /* change_address_1 copies the memory attribute structure without change
2068 and that's exactly what we want here. */
2069 update_temp_slot_address (XEXP (memref
, 0), addr
);
2070 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2073 /* Likewise, but the reference is not required to be valid. */
2076 replace_equiv_address_nv (memref
, addr
)
2080 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2083 /* Return a memory reference like MEMREF, but with its mode widened to
2084 MODE and offset by OFFSET. This would be used by targets that e.g.
2085 cannot issue QImode memory operations and have to use SImode memory
2086 operations plus masking logic. */
2089 widen_memory_access (memref
, mode
, offset
)
2091 enum machine_mode mode
;
2092 HOST_WIDE_INT offset
;
2094 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2095 tree expr
= MEM_EXPR (new);
2096 rtx memoffset
= MEM_OFFSET (new);
2097 unsigned int size
= GET_MODE_SIZE (mode
);
2099 /* If we don't know what offset we were at within the expression, then
2100 we can't know if we've overstepped the bounds. */
2101 if (! memoffset
&& offset
!= 0)
2106 if (TREE_CODE (expr
) == COMPONENT_REF
)
2108 tree field
= TREE_OPERAND (expr
, 1);
2110 if (! DECL_SIZE_UNIT (field
))
2116 /* Is the field at least as large as the access? If so, ok,
2117 otherwise strip back to the containing structure. */
2118 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2119 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2120 && INTVAL (memoffset
) >= 0)
2123 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2129 expr
= TREE_OPERAND (expr
, 0);
2130 memoffset
= (GEN_INT (INTVAL (memoffset
)
2131 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2132 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2135 /* Similarly for the decl. */
2136 else if (DECL_P (expr
)
2137 && DECL_SIZE_UNIT (expr
)
2138 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2139 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2143 /* The widened memory access overflows the expression, which means
2144 that it could alias another expression. Zap it. */
2151 memoffset
= NULL_RTX
;
2153 /* The widened memory may alias other stuff, so zap the alias set. */
2154 /* ??? Maybe use get_alias_set on any remaining expression. */
2156 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2157 MEM_ALIGN (new), mode
);
2162 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2169 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
2170 NULL_RTX
, label_num
++, NULL
, NULL
);
2172 LABEL_NUSES (label
) = 0;
2173 LABEL_ALTERNATE_NAME (label
) = NULL
;
2177 /* For procedure integration. */
2179 /* Install new pointers to the first and last insns in the chain.
2180 Also, set cur_insn_uid to one higher than the last in use.
2181 Used for an inline-procedure after copying the insn chain. */
2184 set_new_first_and_last_insn (first
, last
)
2193 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2194 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2199 /* Set the range of label numbers found in the current function.
2200 This is used when belatedly compiling an inline function. */
2203 set_new_first_and_last_label_num (first
, last
)
2206 base_label_num
= label_num
;
2207 first_label_num
= first
;
2208 last_label_num
= last
;
2211 /* Set the last label number found in the current function.
2212 This is used when belatedly compiling an inline function. */
2215 set_new_last_label_num (last
)
2218 base_label_num
= label_num
;
2219 last_label_num
= last
;
2222 /* Restore all variables describing the current status from the structure *P.
2223 This is used after a nested function. */
2226 restore_emit_status (p
)
2227 struct function
*p ATTRIBUTE_UNUSED
;
2230 clear_emit_caches ();
2233 /* Clear out all parts of the state in F that can safely be discarded
2234 after the function has been compiled, to let garbage collection
2235 reclaim the memory. */
2238 free_emit_status (f
)
2241 free (f
->emit
->x_regno_reg_rtx
);
2242 free (f
->emit
->regno_pointer_align
);
2243 free (f
->emit
->regno_decl
);
2248 /* Go through all the RTL insn bodies and copy any invalid shared
2249 structure. This routine should only be called once. */
2252 unshare_all_rtl (fndecl
, insn
)
2258 /* Make sure that virtual parameters are not shared. */
2259 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2260 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2262 /* Make sure that virtual stack slots are not shared. */
2263 unshare_all_decls (DECL_INITIAL (fndecl
));
2265 /* Unshare just about everything else. */
2266 unshare_all_rtl_1 (insn
);
2268 /* Make sure the addresses of stack slots found outside the insn chain
2269 (such as, in DECL_RTL of a variable) are not shared
2270 with the insn chain.
2272 This special care is necessary when the stack slot MEM does not
2273 actually appear in the insn chain. If it does appear, its address
2274 is unshared from all else at that point. */
2275 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2278 /* Go through all the RTL insn bodies and copy any invalid shared
2279 structure, again. This is a fairly expensive thing to do so it
2280 should be done sparingly. */
2283 unshare_all_rtl_again (insn
)
2289 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2292 reset_used_flags (PATTERN (p
));
2293 reset_used_flags (REG_NOTES (p
));
2294 reset_used_flags (LOG_LINKS (p
));
2297 /* Make sure that virtual stack slots are not shared. */
2298 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2300 /* Make sure that virtual parameters are not shared. */
2301 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2302 reset_used_flags (DECL_RTL (decl
));
2304 reset_used_flags (stack_slot_list
);
2306 unshare_all_rtl (cfun
->decl
, insn
);
2309 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2310 Assumes the mark bits are cleared at entry. */
2313 unshare_all_rtl_1 (insn
)
2316 for (; insn
; insn
= NEXT_INSN (insn
))
2319 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2320 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2321 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2325 /* Go through all virtual stack slots of a function and copy any
2326 shared structure. */
2328 unshare_all_decls (blk
)
2333 /* Copy shared decls. */
2334 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2335 if (DECL_RTL_SET_P (t
))
2336 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2338 /* Now process sub-blocks. */
2339 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2340 unshare_all_decls (t
);
2343 /* Go through all virtual stack slots of a function and mark them as
2346 reset_used_decls (blk
)
2352 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2353 if (DECL_RTL_SET_P (t
))
2354 reset_used_flags (DECL_RTL (t
));
2356 /* Now process sub-blocks. */
2357 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2358 reset_used_decls (t
);
2361 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2362 Recursively does the same for subexpressions. */
2365 copy_rtx_if_shared (orig
)
2371 const char *format_ptr
;
2377 code
= GET_CODE (x
);
2379 /* These types may be freely shared. */
2392 /* SCRATCH must be shared because they represent distinct values. */
2396 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2397 a LABEL_REF, it isn't sharable. */
2398 if (GET_CODE (XEXP (x
, 0)) == PLUS
2399 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2400 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2409 /* The chain of insns is not being copied. */
2413 /* A MEM is allowed to be shared if its address is constant.
2415 We used to allow sharing of MEMs which referenced
2416 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2417 that can lose. instantiate_virtual_regs will not unshare
2418 the MEMs, and combine may change the structure of the address
2419 because it looks safe and profitable in one context, but
2420 in some other context it creates unrecognizable RTL. */
2421 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2430 /* This rtx may not be shared. If it has already been seen,
2431 replace it with a copy of itself. */
2437 copy
= rtx_alloc (code
);
2439 (sizeof (*copy
) - sizeof (copy
->fld
)
2440 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2446 /* Now scan the subexpressions recursively.
2447 We can store any replaced subexpressions directly into X
2448 since we know X is not shared! Any vectors in X
2449 must be copied if X was copied. */
2451 format_ptr
= GET_RTX_FORMAT (code
);
2453 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2455 switch (*format_ptr
++)
2458 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2462 if (XVEC (x
, i
) != NULL
)
2465 int len
= XVECLEN (x
, i
);
2467 if (copied
&& len
> 0)
2468 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2469 for (j
= 0; j
< len
; j
++)
2470 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2478 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2479 to look for shared sub-parts. */
2482 reset_used_flags (x
)
2487 const char *format_ptr
;
2492 code
= GET_CODE (x
);
2494 /* These types may be freely shared so we needn't do any resetting
2515 /* The chain of insns is not being copied. */
2524 format_ptr
= GET_RTX_FORMAT (code
);
2525 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2527 switch (*format_ptr
++)
2530 reset_used_flags (XEXP (x
, i
));
2534 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2535 reset_used_flags (XVECEXP (x
, i
, j
));
2541 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2542 Return X or the rtx for the pseudo reg the value of X was copied into.
2543 OTHER must be valid as a SET_DEST. */
2546 make_safe_from (x
, other
)
2550 switch (GET_CODE (other
))
2553 other
= SUBREG_REG (other
);
2555 case STRICT_LOW_PART
:
2558 other
= XEXP (other
, 0);
2564 if ((GET_CODE (other
) == MEM
2566 && GET_CODE (x
) != REG
2567 && GET_CODE (x
) != SUBREG
)
2568 || (GET_CODE (other
) == REG
2569 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2570 || reg_mentioned_p (other
, x
))))
2572 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2573 emit_move_insn (temp
, x
);
2579 /* Emission of insns (adding them to the doubly-linked list). */
2581 /* Return the first insn of the current sequence or current function. */
2589 /* Return the last insn emitted in current sequence or current function. */
2597 /* Specify a new insn as the last in the chain. */
2600 set_last_insn (insn
)
2603 if (NEXT_INSN (insn
) != 0)
2608 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2611 get_last_insn_anywhere ()
2613 struct sequence_stack
*stack
;
2616 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2617 if (stack
->last
!= 0)
2622 /* Return a number larger than any instruction's uid in this function. */
2627 return cur_insn_uid
;
2630 /* Renumber instructions so that no instruction UIDs are wasted. */
2633 renumber_insns (stream
)
2638 /* If we're not supposed to renumber instructions, don't. */
2639 if (!flag_renumber_insns
)
2642 /* If there aren't that many instructions, then it's not really
2643 worth renumbering them. */
2644 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2649 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2652 fprintf (stream
, "Renumbering insn %d to %d\n",
2653 INSN_UID (insn
), cur_insn_uid
);
2654 INSN_UID (insn
) = cur_insn_uid
++;
2658 /* Return the next insn. If it is a SEQUENCE, return the first insn
2667 insn
= NEXT_INSN (insn
);
2668 if (insn
&& GET_CODE (insn
) == INSN
2669 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2670 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2676 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2680 previous_insn (insn
)
2685 insn
= PREV_INSN (insn
);
2686 if (insn
&& GET_CODE (insn
) == INSN
2687 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2688 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2694 /* Return the next insn after INSN that is not a NOTE. This routine does not
2695 look inside SEQUENCEs. */
2698 next_nonnote_insn (insn
)
2703 insn
= NEXT_INSN (insn
);
2704 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2711 /* Return the previous insn before INSN that is not a NOTE. This routine does
2712 not look inside SEQUENCEs. */
2715 prev_nonnote_insn (insn
)
2720 insn
= PREV_INSN (insn
);
2721 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2728 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2729 or 0, if there is none. This routine does not look inside
2733 next_real_insn (insn
)
2738 insn
= NEXT_INSN (insn
);
2739 if (insn
== 0 || GET_CODE (insn
) == INSN
2740 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2747 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2748 or 0, if there is none. This routine does not look inside
2752 prev_real_insn (insn
)
2757 insn
= PREV_INSN (insn
);
2758 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2759 || GET_CODE (insn
) == JUMP_INSN
)
2766 /* Find the next insn after INSN that really does something. This routine
2767 does not look inside SEQUENCEs. Until reload has completed, this is the
2768 same as next_real_insn. */
2771 active_insn_p (insn
)
2774 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2775 || (GET_CODE (insn
) == INSN
2776 && (! reload_completed
2777 || (GET_CODE (PATTERN (insn
)) != USE
2778 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2782 next_active_insn (insn
)
2787 insn
= NEXT_INSN (insn
);
2788 if (insn
== 0 || active_insn_p (insn
))
2795 /* Find the last insn before INSN that really does something. This routine
2796 does not look inside SEQUENCEs. Until reload has completed, this is the
2797 same as prev_real_insn. */
2800 prev_active_insn (insn
)
2805 insn
= PREV_INSN (insn
);
2806 if (insn
== 0 || active_insn_p (insn
))
2813 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2821 insn
= NEXT_INSN (insn
);
2822 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2829 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2837 insn
= PREV_INSN (insn
);
2838 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2846 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2847 and REG_CC_USER notes so we can find it. */
2850 link_cc0_insns (insn
)
2853 rtx user
= next_nonnote_insn (insn
);
2855 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2856 user
= XVECEXP (PATTERN (user
), 0, 0);
2858 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2860 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2863 /* Return the next insn that uses CC0 after INSN, which is assumed to
2864 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2865 applied to the result of this function should yield INSN).
2867 Normally, this is simply the next insn. However, if a REG_CC_USER note
2868 is present, it contains the insn that uses CC0.
2870 Return 0 if we can't find the insn. */
2873 next_cc0_user (insn
)
2876 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2879 return XEXP (note
, 0);
2881 insn
= next_nonnote_insn (insn
);
2882 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2883 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2885 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2891 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2892 note, it is the previous insn. */
2895 prev_cc0_setter (insn
)
2898 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2901 return XEXP (note
, 0);
2903 insn
= prev_nonnote_insn (insn
);
2904 if (! sets_cc0_p (PATTERN (insn
)))
2911 /* Increment the label uses for all labels present in rtx. */
2921 code
= GET_CODE (x
);
2922 if (code
== LABEL_REF
)
2923 LABEL_NUSES (XEXP (x
, 0))++;
2925 fmt
= GET_RTX_FORMAT (code
);
2926 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2929 mark_label_nuses (XEXP (x
, i
));
2930 else if (fmt
[i
] == 'E')
2931 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2932 mark_label_nuses (XVECEXP (x
, i
, j
));
2937 /* Try splitting insns that can be split for better scheduling.
2938 PAT is the pattern which might split.
2939 TRIAL is the insn providing PAT.
2940 LAST is non-zero if we should return the last insn of the sequence produced.
2942 If this routine succeeds in splitting, it returns the first or last
2943 replacement insn depending on the value of LAST. Otherwise, it
2944 returns TRIAL. If the insn to be returned can be split, it will be. */
2947 try_split (pat
, trial
, last
)
2951 rtx before
= PREV_INSN (trial
);
2952 rtx after
= NEXT_INSN (trial
);
2953 int has_barrier
= 0;
2958 if (any_condjump_p (trial
)
2959 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
2960 split_branch_probability
= INTVAL (XEXP (note
, 0));
2961 probability
= split_branch_probability
;
2963 seq
= split_insns (pat
, trial
);
2965 split_branch_probability
= -1;
2967 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2968 We may need to handle this specially. */
2969 if (after
&& GET_CODE (after
) == BARRIER
)
2972 after
= NEXT_INSN (after
);
2977 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2978 The latter case will normally arise only when being done so that
2979 it, in turn, will be split (SFmode on the 29k is an example). */
2980 if (GET_CODE (seq
) == SEQUENCE
)
2984 /* Avoid infinite loop if any insn of the result matches
2985 the original pattern. */
2986 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2987 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
2988 && rtx_equal_p (PATTERN (XVECEXP (seq
, 0, i
)), pat
))
2992 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2993 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2995 rtx insn
= XVECEXP (seq
, 0, i
);
2996 mark_jump_label (PATTERN (insn
),
2997 XVECEXP (seq
, 0, i
), 0);
2999 if (probability
!= -1
3000 && any_condjump_p (insn
)
3001 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3003 /* We can preserve the REG_BR_PROB notes only if exactly
3004 one jump is created, otherwise the machine description
3005 is responsible for this step using
3006 split_branch_probability variable. */
3010 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3011 GEN_INT (probability
),
3016 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3017 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3018 if (GET_CODE (trial
) == CALL_INSN
)
3019 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3020 if (GET_CODE (XVECEXP (seq
, 0, i
)) == CALL_INSN
)
3021 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq
, 0, i
))
3022 = CALL_INSN_FUNCTION_USAGE (trial
);
3024 /* Copy notes, particularly those related to the CFG. */
3025 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3027 switch (REG_NOTE_KIND (note
))
3030 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3032 rtx insn
= XVECEXP (seq
, 0, i
);
3033 if (GET_CODE (insn
) == CALL_INSN
3034 || (flag_non_call_exceptions
3035 && may_trap_p (PATTERN (insn
))))
3037 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3045 case REG_ALWAYS_RETURN
:
3046 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3048 rtx insn
= XVECEXP (seq
, 0, i
);
3049 if (GET_CODE (insn
) == CALL_INSN
)
3051 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3057 case REG_NON_LOCAL_GOTO
:
3058 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3060 rtx insn
= XVECEXP (seq
, 0, i
);
3061 if (GET_CODE (insn
) == JUMP_INSN
)
3063 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3074 /* If there are LABELS inside the split insns increment the
3075 usage count so we don't delete the label. */
3076 if (GET_CODE (trial
) == INSN
)
3077 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
3078 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
)
3079 mark_label_nuses (PATTERN (XVECEXP (seq
, 0, i
)));
3081 tem
= emit_insn_after (seq
, trial
);
3083 delete_related_insns (trial
);
3085 emit_barrier_after (tem
);
3087 /* Recursively call try_split for each new insn created; by the
3088 time control returns here that insn will be fully split, so
3089 set LAST and continue from the insn after the one returned.
3090 We can't use next_active_insn here since AFTER may be a note.
3091 Ignore deleted insns, which can be occur if not optimizing. */
3092 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3093 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3094 tem
= try_split (PATTERN (tem
), tem
, 1);
3096 /* Avoid infinite loop if the result matches the original pattern. */
3097 else if (rtx_equal_p (seq
, pat
))
3101 PATTERN (trial
) = seq
;
3102 INSN_CODE (trial
) = -1;
3103 try_split (seq
, trial
, last
);
3106 /* Return either the first or the last insn, depending on which was
3109 ? (after
? PREV_INSN (after
) : last_insn
)
3110 : NEXT_INSN (before
);
3116 /* Make and return an INSN rtx, initializing all its slots.
3117 Store PATTERN in the pattern slots. */
3120 make_insn_raw (pattern
)
3125 insn
= rtx_alloc (INSN
);
3127 INSN_UID (insn
) = cur_insn_uid
++;
3128 PATTERN (insn
) = pattern
;
3129 INSN_CODE (insn
) = -1;
3130 LOG_LINKS (insn
) = NULL
;
3131 REG_NOTES (insn
) = NULL
;
3133 #ifdef ENABLE_RTL_CHECKING
3136 && (returnjump_p (insn
)
3137 || (GET_CODE (insn
) == SET
3138 && SET_DEST (insn
) == pc_rtx
)))
3140 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3148 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3151 make_jump_insn_raw (pattern
)
3156 insn
= rtx_alloc (JUMP_INSN
);
3157 INSN_UID (insn
) = cur_insn_uid
++;
3159 PATTERN (insn
) = pattern
;
3160 INSN_CODE (insn
) = -1;
3161 LOG_LINKS (insn
) = NULL
;
3162 REG_NOTES (insn
) = NULL
;
3163 JUMP_LABEL (insn
) = NULL
;
3168 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3171 make_call_insn_raw (pattern
)
3176 insn
= rtx_alloc (CALL_INSN
);
3177 INSN_UID (insn
) = cur_insn_uid
++;
3179 PATTERN (insn
) = pattern
;
3180 INSN_CODE (insn
) = -1;
3181 LOG_LINKS (insn
) = NULL
;
3182 REG_NOTES (insn
) = NULL
;
3183 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3188 /* Add INSN to the end of the doubly-linked list.
3189 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3195 PREV_INSN (insn
) = last_insn
;
3196 NEXT_INSN (insn
) = 0;
3198 if (NULL
!= last_insn
)
3199 NEXT_INSN (last_insn
) = insn
;
3201 if (NULL
== first_insn
)
3207 /* Add INSN into the doubly-linked list after insn AFTER. This and
3208 the next should be the only functions called to insert an insn once
3209 delay slots have been filled since only they know how to update a
3213 add_insn_after (insn
, after
)
3216 rtx next
= NEXT_INSN (after
);
3219 if (optimize
&& INSN_DELETED_P (after
))
3222 NEXT_INSN (insn
) = next
;
3223 PREV_INSN (insn
) = after
;
3227 PREV_INSN (next
) = insn
;
3228 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3229 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3231 else if (last_insn
== after
)
3235 struct sequence_stack
*stack
= seq_stack
;
3236 /* Scan all pending sequences too. */
3237 for (; stack
; stack
= stack
->next
)
3238 if (after
== stack
->last
)
3248 if (basic_block_for_insn
3249 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3250 && (bb
= BLOCK_FOR_INSN (after
)))
3252 set_block_for_insn (insn
, bb
);
3253 /* Should not happen as first in the BB is always
3254 either NOTE or LABEL. */
3255 if (bb
->end
== after
3256 /* Avoid clobbering of structure when creating new BB. */
3257 && GET_CODE (insn
) != BARRIER
3258 && (GET_CODE (insn
) != NOTE
3259 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3263 NEXT_INSN (after
) = insn
;
3264 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3266 rtx sequence
= PATTERN (after
);
3267 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3271 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3272 the previous should be the only functions called to insert an insn once
3273 delay slots have been filled since only they know how to update a
3277 add_insn_before (insn
, before
)
3280 rtx prev
= PREV_INSN (before
);
3283 if (optimize
&& INSN_DELETED_P (before
))
3286 PREV_INSN (insn
) = prev
;
3287 NEXT_INSN (insn
) = before
;
3291 NEXT_INSN (prev
) = insn
;
3292 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3294 rtx sequence
= PATTERN (prev
);
3295 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3298 else if (first_insn
== before
)
3302 struct sequence_stack
*stack
= seq_stack
;
3303 /* Scan all pending sequences too. */
3304 for (; stack
; stack
= stack
->next
)
3305 if (before
== stack
->first
)
3307 stack
->first
= insn
;
3315 if (basic_block_for_insn
3316 && (unsigned int)INSN_UID (before
) < basic_block_for_insn
->num_elements
3317 && (bb
= BLOCK_FOR_INSN (before
)))
3319 set_block_for_insn (insn
, bb
);
3320 /* Should not happen as first in the BB is always
3321 either NOTE or LABEl. */
3322 if (bb
->head
== insn
3323 /* Avoid clobbering of structure when creating new BB. */
3324 && GET_CODE (insn
) != BARRIER
3325 && (GET_CODE (insn
) != NOTE
3326 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3330 PREV_INSN (before
) = insn
;
3331 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3332 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3335 /* Remove an insn from its doubly-linked list. This function knows how
3336 to handle sequences. */
3341 rtx next
= NEXT_INSN (insn
);
3342 rtx prev
= PREV_INSN (insn
);
3347 NEXT_INSN (prev
) = next
;
3348 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3350 rtx sequence
= PATTERN (prev
);
3351 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3354 else if (first_insn
== insn
)
3358 struct sequence_stack
*stack
= seq_stack
;
3359 /* Scan all pending sequences too. */
3360 for (; stack
; stack
= stack
->next
)
3361 if (insn
== stack
->first
)
3363 stack
->first
= next
;
3373 PREV_INSN (next
) = prev
;
3374 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3375 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3377 else if (last_insn
== insn
)
3381 struct sequence_stack
*stack
= seq_stack
;
3382 /* Scan all pending sequences too. */
3383 for (; stack
; stack
= stack
->next
)
3384 if (insn
== stack
->last
)
3393 if (basic_block_for_insn
3394 && (unsigned int)INSN_UID (insn
) < basic_block_for_insn
->num_elements
3395 && (bb
= BLOCK_FOR_INSN (insn
)))
3397 if (bb
->head
== insn
)
3399 /* Never ever delete the basic block note without deleting whole basic
3401 if (GET_CODE (insn
) == NOTE
)
3405 if (bb
->end
== insn
)
3410 /* Delete all insns made since FROM.
3411 FROM becomes the new last instruction. */
3414 delete_insns_since (from
)
3420 NEXT_INSN (from
) = 0;
3424 /* This function is deprecated, please use sequences instead.
3426 Move a consecutive bunch of insns to a different place in the chain.
3427 The insns to be moved are those between FROM and TO.
3428 They are moved to a new position after the insn AFTER.
3429 AFTER must not be FROM or TO or any insn in between.
3431 This function does not know about SEQUENCEs and hence should not be
3432 called after delay-slot filling has been done. */
3435 reorder_insns_nobb (from
, to
, after
)
3436 rtx from
, to
, after
;
3438 /* Splice this bunch out of where it is now. */
3439 if (PREV_INSN (from
))
3440 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3442 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3443 if (last_insn
== to
)
3444 last_insn
= PREV_INSN (from
);
3445 if (first_insn
== from
)
3446 first_insn
= NEXT_INSN (to
);
3448 /* Make the new neighbors point to it and it to them. */
3449 if (NEXT_INSN (after
))
3450 PREV_INSN (NEXT_INSN (after
)) = to
;
3452 NEXT_INSN (to
) = NEXT_INSN (after
);
3453 PREV_INSN (from
) = after
;
3454 NEXT_INSN (after
) = from
;
3455 if (after
== last_insn
)
3459 /* Same as function above, but take care to update BB boundaries. */
3461 reorder_insns (from
, to
, after
)
3462 rtx from
, to
, after
;
3464 rtx prev
= PREV_INSN (from
);
3465 basic_block bb
, bb2
;
3467 reorder_insns_nobb (from
, to
, after
);
3469 if (basic_block_for_insn
3470 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3471 && (bb
= BLOCK_FOR_INSN (after
)))
3475 if (basic_block_for_insn
3476 && (unsigned int)INSN_UID (from
) < basic_block_for_insn
->num_elements
3477 && (bb2
= BLOCK_FOR_INSN (from
)))
3483 if (bb
->end
== after
)
3486 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3487 set_block_for_insn (x
, bb
);
3491 /* Return the line note insn preceding INSN. */
3494 find_line_note (insn
)
3497 if (no_line_numbers
)
3500 for (; insn
; insn
= PREV_INSN (insn
))
3501 if (GET_CODE (insn
) == NOTE
3502 && NOTE_LINE_NUMBER (insn
) >= 0)
3508 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3509 of the moved insns when debugging. This may insert a note between AFTER
3510 and FROM, and another one after TO. */
3513 reorder_insns_with_line_notes (from
, to
, after
)
3514 rtx from
, to
, after
;
3516 rtx from_line
= find_line_note (from
);
3517 rtx after_line
= find_line_note (after
);
3519 reorder_insns (from
, to
, after
);
3521 if (from_line
== after_line
)
3525 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3526 NOTE_LINE_NUMBER (from_line
),
3529 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3530 NOTE_LINE_NUMBER (after_line
),
3534 /* Remove unnecessary notes from the instruction stream. */
3537 remove_unnecessary_notes ()
3539 rtx block_stack
= NULL_RTX
;
3540 rtx eh_stack
= NULL_RTX
;
3545 /* We must not remove the first instruction in the function because
3546 the compiler depends on the first instruction being a note. */
3547 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3549 /* Remember what's next. */
3550 next
= NEXT_INSN (insn
);
3552 /* We're only interested in notes. */
3553 if (GET_CODE (insn
) != NOTE
)
3556 switch (NOTE_LINE_NUMBER (insn
))
3558 case NOTE_INSN_DELETED
:
3562 case NOTE_INSN_EH_REGION_BEG
:
3563 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3566 case NOTE_INSN_EH_REGION_END
:
3567 /* Too many end notes. */
3568 if (eh_stack
== NULL_RTX
)
3570 /* Mismatched nesting. */
3571 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3574 eh_stack
= XEXP (eh_stack
, 1);
3575 free_INSN_LIST_node (tmp
);
3578 case NOTE_INSN_BLOCK_BEG
:
3579 /* By now, all notes indicating lexical blocks should have
3580 NOTE_BLOCK filled in. */
3581 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3583 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3586 case NOTE_INSN_BLOCK_END
:
3587 /* Too many end notes. */
3588 if (block_stack
== NULL_RTX
)
3590 /* Mismatched nesting. */
3591 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3594 block_stack
= XEXP (block_stack
, 1);
3595 free_INSN_LIST_node (tmp
);
3597 /* Scan back to see if there are any non-note instructions
3598 between INSN and the beginning of this block. If not,
3599 then there is no PC range in the generated code that will
3600 actually be in this block, so there's no point in
3601 remembering the existence of the block. */
3602 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3604 /* This block contains a real instruction. Note that we
3605 don't include labels; if the only thing in the block
3606 is a label, then there are still no PC values that
3607 lie within the block. */
3611 /* We're only interested in NOTEs. */
3612 if (GET_CODE (tmp
) != NOTE
)
3615 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3617 /* We just verified that this BLOCK matches us with
3618 the block_stack check above. Never delete the
3619 BLOCK for the outermost scope of the function; we
3620 can refer to names from that scope even if the
3621 block notes are messed up. */
3622 if (! is_body_block (NOTE_BLOCK (insn
))
3623 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3630 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3631 /* There's a nested block. We need to leave the
3632 current block in place since otherwise the debugger
3633 wouldn't be able to show symbols from our block in
3634 the nested block. */
3640 /* Too many begin notes. */
3641 if (block_stack
|| eh_stack
)
3646 /* Emit an insn of given code and pattern
3647 at a specified place within the doubly-linked list. */
3649 /* Make an instruction with body PATTERN
3650 and output it before the instruction BEFORE. */
3653 emit_insn_before (pattern
, before
)
3654 rtx pattern
, before
;
3658 if (GET_CODE (pattern
) == SEQUENCE
)
3662 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3664 insn
= XVECEXP (pattern
, 0, i
);
3665 add_insn_before (insn
, before
);
3670 insn
= make_insn_raw (pattern
);
3671 add_insn_before (insn
, before
);
3677 /* Make an instruction with body PATTERN and code JUMP_INSN
3678 and output it before the instruction BEFORE. */
3681 emit_jump_insn_before (pattern
, before
)
3682 rtx pattern
, before
;
3686 if (GET_CODE (pattern
) == SEQUENCE
)
3687 insn
= emit_insn_before (pattern
, before
);
3690 insn
= make_jump_insn_raw (pattern
);
3691 add_insn_before (insn
, before
);
3697 /* Make an instruction with body PATTERN and code CALL_INSN
3698 and output it before the instruction BEFORE. */
3701 emit_call_insn_before (pattern
, before
)
3702 rtx pattern
, before
;
3706 if (GET_CODE (pattern
) == SEQUENCE
)
3707 insn
= emit_insn_before (pattern
, before
);
3710 insn
= make_call_insn_raw (pattern
);
3711 add_insn_before (insn
, before
);
3712 PUT_CODE (insn
, CALL_INSN
);
3718 /* Make an insn of code BARRIER
3719 and output it before the insn BEFORE. */
3722 emit_barrier_before (before
)
3725 rtx insn
= rtx_alloc (BARRIER
);
3727 INSN_UID (insn
) = cur_insn_uid
++;
3729 add_insn_before (insn
, before
);
3733 /* Emit the label LABEL before the insn BEFORE. */
3736 emit_label_before (label
, before
)
3739 /* This can be called twice for the same label as a result of the
3740 confusion that follows a syntax error! So make it harmless. */
3741 if (INSN_UID (label
) == 0)
3743 INSN_UID (label
) = cur_insn_uid
++;
3744 add_insn_before (label
, before
);
3750 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3753 emit_note_before (subtype
, before
)
3757 rtx note
= rtx_alloc (NOTE
);
3758 INSN_UID (note
) = cur_insn_uid
++;
3759 NOTE_SOURCE_FILE (note
) = 0;
3760 NOTE_LINE_NUMBER (note
) = subtype
;
3762 add_insn_before (note
, before
);
3766 /* Make an insn of code INSN with body PATTERN
3767 and output it after the insn AFTER. */
3770 emit_insn_after (pattern
, after
)
3775 if (GET_CODE (pattern
) == SEQUENCE
)
3779 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3781 insn
= XVECEXP (pattern
, 0, i
);
3782 add_insn_after (insn
, after
);
3788 insn
= make_insn_raw (pattern
);
3789 add_insn_after (insn
, after
);
3795 /* Similar to emit_insn_after, except that line notes are to be inserted so
3796 as to act as if this insn were at FROM. */
3799 emit_insn_after_with_line_notes (pattern
, after
, from
)
3800 rtx pattern
, after
, from
;
3802 rtx from_line
= find_line_note (from
);
3803 rtx after_line
= find_line_note (after
);
3804 rtx insn
= emit_insn_after (pattern
, after
);
3807 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3808 NOTE_LINE_NUMBER (from_line
),
3812 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3813 NOTE_LINE_NUMBER (after_line
),
3817 /* Make an insn of code JUMP_INSN with body PATTERN
3818 and output it after the insn AFTER. */
3821 emit_jump_insn_after (pattern
, after
)
3826 if (GET_CODE (pattern
) == SEQUENCE
)
3827 insn
= emit_insn_after (pattern
, after
);
3830 insn
= make_jump_insn_raw (pattern
);
3831 add_insn_after (insn
, after
);
3837 /* Make an insn of code BARRIER
3838 and output it after the insn AFTER. */
3841 emit_barrier_after (after
)
3844 rtx insn
= rtx_alloc (BARRIER
);
3846 INSN_UID (insn
) = cur_insn_uid
++;
3848 add_insn_after (insn
, after
);
3852 /* Emit the label LABEL after the insn AFTER. */
3855 emit_label_after (label
, after
)
3858 /* This can be called twice for the same label
3859 as a result of the confusion that follows a syntax error!
3860 So make it harmless. */
3861 if (INSN_UID (label
) == 0)
3863 INSN_UID (label
) = cur_insn_uid
++;
3864 add_insn_after (label
, after
);
3870 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3873 emit_note_after (subtype
, after
)
3877 rtx note
= rtx_alloc (NOTE
);
3878 INSN_UID (note
) = cur_insn_uid
++;
3879 NOTE_SOURCE_FILE (note
) = 0;
3880 NOTE_LINE_NUMBER (note
) = subtype
;
3881 add_insn_after (note
, after
);
3885 /* Emit a line note for FILE and LINE after the insn AFTER. */
3888 emit_line_note_after (file
, line
, after
)
3895 if (no_line_numbers
&& line
> 0)
3901 note
= rtx_alloc (NOTE
);
3902 INSN_UID (note
) = cur_insn_uid
++;
3903 NOTE_SOURCE_FILE (note
) = file
;
3904 NOTE_LINE_NUMBER (note
) = line
;
3905 add_insn_after (note
, after
);
3909 /* Make an insn of code INSN with pattern PATTERN
3910 and add it to the end of the doubly-linked list.
3911 If PATTERN is a SEQUENCE, take the elements of it
3912 and emit an insn for each element.
3914 Returns the last insn emitted. */
3920 rtx insn
= last_insn
;
3922 if (GET_CODE (pattern
) == SEQUENCE
)
3926 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3928 insn
= XVECEXP (pattern
, 0, i
);
3934 insn
= make_insn_raw (pattern
);
3941 /* Emit the insns in a chain starting with INSN.
3942 Return the last insn emitted. */
3952 rtx next
= NEXT_INSN (insn
);
3961 /* Emit the insns in a chain starting with INSN and place them in front of
3962 the insn BEFORE. Return the last insn emitted. */
3965 emit_insns_before (insn
, before
)
3973 rtx next
= NEXT_INSN (insn
);
3974 add_insn_before (insn
, before
);
3982 /* Emit the insns in a chain starting with FIRST and place them in back of
3983 the insn AFTER. Return the last insn emitted. */
3986 emit_insns_after (first
, after
)
4000 if (basic_block_for_insn
4001 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
4002 && (bb
= BLOCK_FOR_INSN (after
)))
4004 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4005 set_block_for_insn (last
, bb
);
4006 set_block_for_insn (last
, bb
);
4007 if (bb
->end
== after
)
4011 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4014 after_after
= NEXT_INSN (after
);
4016 NEXT_INSN (after
) = first
;
4017 PREV_INSN (first
) = after
;
4018 NEXT_INSN (last
) = after_after
;
4020 PREV_INSN (after_after
) = last
;
4022 if (after
== last_insn
)
4027 /* Make an insn of code JUMP_INSN with pattern PATTERN
4028 and add it to the end of the doubly-linked list. */
4031 emit_jump_insn (pattern
)
4034 if (GET_CODE (pattern
) == SEQUENCE
)
4035 return emit_insn (pattern
);
4038 rtx insn
= make_jump_insn_raw (pattern
);
4044 /* Make an insn of code CALL_INSN with pattern PATTERN
4045 and add it to the end of the doubly-linked list. */
4048 emit_call_insn (pattern
)
4051 if (GET_CODE (pattern
) == SEQUENCE
)
4052 return emit_insn (pattern
);
4055 rtx insn
= make_call_insn_raw (pattern
);
4057 PUT_CODE (insn
, CALL_INSN
);
4062 /* Add the label LABEL to the end of the doubly-linked list. */
4068 /* This can be called twice for the same label
4069 as a result of the confusion that follows a syntax error!
4070 So make it harmless. */
4071 if (INSN_UID (label
) == 0)
4073 INSN_UID (label
) = cur_insn_uid
++;
4079 /* Make an insn of code BARRIER
4080 and add it to the end of the doubly-linked list. */
4085 rtx barrier
= rtx_alloc (BARRIER
);
4086 INSN_UID (barrier
) = cur_insn_uid
++;
4091 /* Make an insn of code NOTE
4092 with data-fields specified by FILE and LINE
4093 and add it to the end of the doubly-linked list,
4094 but only if line-numbers are desired for debugging info. */
4097 emit_line_note (file
, line
)
4101 set_file_and_line_for_stmt (file
, line
);
4104 if (no_line_numbers
)
4108 return emit_note (file
, line
);
4111 /* Make an insn of code NOTE
4112 with data-fields specified by FILE and LINE
4113 and add it to the end of the doubly-linked list.
4114 If it is a line-number NOTE, omit it if it matches the previous one. */
4117 emit_note (file
, line
)
4125 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4126 && line
== last_linenum
)
4128 last_filename
= file
;
4129 last_linenum
= line
;
4132 if (no_line_numbers
&& line
> 0)
4138 note
= rtx_alloc (NOTE
);
4139 INSN_UID (note
) = cur_insn_uid
++;
4140 NOTE_SOURCE_FILE (note
) = file
;
4141 NOTE_LINE_NUMBER (note
) = line
;
4146 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4149 emit_line_note_force (file
, line
)
4154 return emit_line_note (file
, line
);
4157 /* Cause next statement to emit a line note even if the line number
4158 has not changed. This is used at the beginning of a function. */
4161 force_next_line_note ()
4166 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4167 note of this type already exists, remove it first. */
4170 set_unique_reg_note (insn
, kind
, datum
)
4175 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4181 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4182 has multiple sets (some callers assume single_set
4183 means the insn only has one set, when in fact it
4184 means the insn only has one * useful * set). */
4185 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4192 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4193 It serves no useful purpose and breaks eliminate_regs. */
4194 if (GET_CODE (datum
) == ASM_OPERANDS
)
4204 XEXP (note
, 0) = datum
;
4208 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4209 return REG_NOTES (insn
);
4212 /* Return an indication of which type of insn should have X as a body.
4213 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4219 if (GET_CODE (x
) == CODE_LABEL
)
4221 if (GET_CODE (x
) == CALL
)
4223 if (GET_CODE (x
) == RETURN
)
4225 if (GET_CODE (x
) == SET
)
4227 if (SET_DEST (x
) == pc_rtx
)
4229 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4234 if (GET_CODE (x
) == PARALLEL
)
4237 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4238 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4240 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4241 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4243 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4244 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4250 /* Emit the rtl pattern X as an appropriate kind of insn.
4251 If X is a label, it is simply added into the insn chain. */
4257 enum rtx_code code
= classify_insn (x
);
4259 if (code
== CODE_LABEL
)
4260 return emit_label (x
);
4261 else if (code
== INSN
)
4262 return emit_insn (x
);
4263 else if (code
== JUMP_INSN
)
4265 rtx insn
= emit_jump_insn (x
);
4266 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4267 return emit_barrier ();
4270 else if (code
== CALL_INSN
)
4271 return emit_call_insn (x
);
4276 /* Begin emitting insns to a sequence which can be packaged in an
4277 RTL_EXPR. If this sequence will contain something that might cause
4278 the compiler to pop arguments to function calls (because those
4279 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4280 details), use do_pending_stack_adjust before calling this function.
4281 That will ensure that the deferred pops are not accidentally
4282 emitted in the middle of this sequence. */
4287 struct sequence_stack
*tem
;
4289 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
4291 tem
->next
= seq_stack
;
4292 tem
->first
= first_insn
;
4293 tem
->last
= last_insn
;
4294 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4302 /* Similarly, but indicate that this sequence will be placed in T, an
4303 RTL_EXPR. See the documentation for start_sequence for more
4304 information about how to use this function. */
4307 start_sequence_for_rtl_expr (t
)
4315 /* Set up the insn chain starting with FIRST as the current sequence,
4316 saving the previously current one. See the documentation for
4317 start_sequence for more information about how to use this function. */
4320 push_to_sequence (first
)
4327 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4333 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4336 push_to_full_sequence (first
, last
)
4342 /* We really should have the end of the insn chain here. */
4343 if (last
&& NEXT_INSN (last
))
4347 /* Set up the outer-level insn chain
4348 as the current sequence, saving the previously current one. */
4351 push_topmost_sequence ()
4353 struct sequence_stack
*stack
, *top
= NULL
;
4357 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4360 first_insn
= top
->first
;
4361 last_insn
= top
->last
;
4362 seq_rtl_expr
= top
->sequence_rtl_expr
;
4365 /* After emitting to the outer-level insn chain, update the outer-level
4366 insn chain, and restore the previous saved state. */
4369 pop_topmost_sequence ()
4371 struct sequence_stack
*stack
, *top
= NULL
;
4373 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4376 top
->first
= first_insn
;
4377 top
->last
= last_insn
;
4378 /* ??? Why don't we save seq_rtl_expr here? */
4383 /* After emitting to a sequence, restore previous saved state.
4385 To get the contents of the sequence just made, you must call
4386 `gen_sequence' *before* calling here.
4388 If the compiler might have deferred popping arguments while
4389 generating this sequence, and this sequence will not be immediately
4390 inserted into the instruction stream, use do_pending_stack_adjust
4391 before calling gen_sequence. That will ensure that the deferred
4392 pops are inserted into this sequence, and not into some random
4393 location in the instruction stream. See INHIBIT_DEFER_POP for more
4394 information about deferred popping of arguments. */
4399 struct sequence_stack
*tem
= seq_stack
;
4401 first_insn
= tem
->first
;
4402 last_insn
= tem
->last
;
4403 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4404 seq_stack
= tem
->next
;
4409 /* This works like end_sequence, but records the old sequence in FIRST
4413 end_full_sequence (first
, last
)
4416 *first
= first_insn
;
4421 /* Return 1 if currently emitting into a sequence. */
4426 return seq_stack
!= 0;
4429 /* Generate a SEQUENCE rtx containing the insns already emitted
4430 to the current sequence.
4432 This is how the gen_... function from a DEFINE_EXPAND
4433 constructs the SEQUENCE that it returns. */
4443 /* Count the insns in the chain. */
4445 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
4448 /* If only one insn, return it rather than a SEQUENCE.
4449 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4450 the case of an empty list.)
4451 We only return the pattern of an insn if its code is INSN and it
4452 has no notes. This ensures that no information gets lost. */
4454 && ! RTX_FRAME_RELATED_P (first_insn
)
4455 && GET_CODE (first_insn
) == INSN
4456 /* Don't throw away any reg notes. */
4457 && REG_NOTES (first_insn
) == 0)
4458 return PATTERN (first_insn
);
4460 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
4462 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
4463 XVECEXP (result
, 0, i
) = tem
;
4468 /* Put the various virtual registers into REGNO_REG_RTX. */
4471 init_virtual_regs (es
)
4472 struct emit_status
*es
;
4474 rtx
*ptr
= es
->x_regno_reg_rtx
;
4475 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4476 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4477 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4478 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4479 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4483 clear_emit_caches ()
4487 /* Clear the start_sequence/gen_sequence cache. */
4488 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
4489 sequence_result
[i
] = 0;
4493 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4494 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4495 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4496 static int copy_insn_n_scratches
;
4498 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4499 copied an ASM_OPERANDS.
4500 In that case, it is the original input-operand vector. */
4501 static rtvec orig_asm_operands_vector
;
4503 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4504 copied an ASM_OPERANDS.
4505 In that case, it is the copied input-operand vector. */
4506 static rtvec copy_asm_operands_vector
;
4508 /* Likewise for the constraints vector. */
4509 static rtvec orig_asm_constraints_vector
;
4510 static rtvec copy_asm_constraints_vector
;
4512 /* Recursively create a new copy of an rtx for copy_insn.
4513 This function differs from copy_rtx in that it handles SCRATCHes and
4514 ASM_OPERANDs properly.
4515 Normally, this function is not used directly; use copy_insn as front end.
4516 However, you could first copy an insn pattern with copy_insn and then use
4517 this function afterwards to properly copy any REG_NOTEs containing
4527 const char *format_ptr
;
4529 code
= GET_CODE (orig
);
4545 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4546 if (copy_insn_scratch_in
[i
] == orig
)
4547 return copy_insn_scratch_out
[i
];
4551 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4552 a LABEL_REF, it isn't sharable. */
4553 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4554 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4555 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4559 /* A MEM with a constant address is not sharable. The problem is that
4560 the constant address may need to be reloaded. If the mem is shared,
4561 then reloading one copy of this mem will cause all copies to appear
4562 to have been reloaded. */
4568 copy
= rtx_alloc (code
);
4570 /* Copy the various flags, and other information. We assume that
4571 all fields need copying, and then clear the fields that should
4572 not be copied. That is the sensible default behavior, and forces
4573 us to explicitly document why we are *not* copying a flag. */
4574 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
4576 /* We do not copy the USED flag, which is used as a mark bit during
4577 walks over the RTL. */
4580 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4581 if (GET_RTX_CLASS (code
) == 'i')
4585 copy
->frame_related
= 0;
4588 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4590 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4592 copy
->fld
[i
] = orig
->fld
[i
];
4593 switch (*format_ptr
++)
4596 if (XEXP (orig
, i
) != NULL
)
4597 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4602 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4603 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4604 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4605 XVEC (copy
, i
) = copy_asm_operands_vector
;
4606 else if (XVEC (orig
, i
) != NULL
)
4608 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4609 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4610 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4621 /* These are left unchanged. */
4629 if (code
== SCRATCH
)
4631 i
= copy_insn_n_scratches
++;
4632 if (i
>= MAX_RECOG_OPERANDS
)
4634 copy_insn_scratch_in
[i
] = orig
;
4635 copy_insn_scratch_out
[i
] = copy
;
4637 else if (code
== ASM_OPERANDS
)
4639 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4640 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4641 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4642 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4648 /* Create a new copy of an rtx.
4649 This function differs from copy_rtx in that it handles SCRATCHes and
4650 ASM_OPERANDs properly.
4651 INSN doesn't really have to be a full INSN; it could be just the
4657 copy_insn_n_scratches
= 0;
4658 orig_asm_operands_vector
= 0;
4659 orig_asm_constraints_vector
= 0;
4660 copy_asm_operands_vector
= 0;
4661 copy_asm_constraints_vector
= 0;
4662 return copy_insn_1 (insn
);
4665 /* Initialize data structures and variables in this file
4666 before generating rtl for each function. */
4671 struct function
*f
= cfun
;
4673 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
4676 seq_rtl_expr
= NULL
;
4678 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
4681 first_label_num
= label_num
;
4685 clear_emit_caches ();
4687 /* Init the tables that describe all the pseudo regs. */
4689 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
4691 f
->emit
->regno_pointer_align
4692 = (unsigned char *) xcalloc (f
->emit
->regno_pointer_align_length
,
4693 sizeof (unsigned char));
4696 = (rtx
*) xcalloc (f
->emit
->regno_pointer_align_length
, sizeof (rtx
));
4699 = (tree
*) xcalloc (f
->emit
->regno_pointer_align_length
, sizeof (tree
));
4701 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4702 init_virtual_regs (f
->emit
);
4704 /* Indicate that the virtual registers and stack locations are
4706 REG_POINTER (stack_pointer_rtx
) = 1;
4707 REG_POINTER (frame_pointer_rtx
) = 1;
4708 REG_POINTER (hard_frame_pointer_rtx
) = 1;
4709 REG_POINTER (arg_pointer_rtx
) = 1;
4711 REG_POINTER (virtual_incoming_args_rtx
) = 1;
4712 REG_POINTER (virtual_stack_vars_rtx
) = 1;
4713 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
4714 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
4715 REG_POINTER (virtual_cfa_rtx
) = 1;
4717 #ifdef STACK_BOUNDARY
4718 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
4719 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4720 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4721 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
4723 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4724 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
4725 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
4726 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4727 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
4730 #ifdef INIT_EXPANDERS
4735 /* Mark SS for GC. */
4738 mark_sequence_stack (ss
)
4739 struct sequence_stack
*ss
;
4743 ggc_mark_rtx (ss
->first
);
4744 ggc_mark_tree (ss
->sequence_rtl_expr
);
4749 /* Mark ES for GC. */
4752 mark_emit_status (es
)
4753 struct emit_status
*es
;
4762 for (i
= es
->regno_pointer_align_length
, r
= es
->x_regno_reg_rtx
,
4764 i
> 0; --i
, ++r
, ++t
)
4770 mark_sequence_stack (es
->sequence_stack
);
4771 ggc_mark_tree (es
->sequence_rtl_expr
);
4772 ggc_mark_rtx (es
->x_first_insn
);
4775 /* Create some permanent unique rtl objects shared between all functions.
4776 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4779 init_emit_once (line_numbers
)
4783 enum machine_mode mode
;
4784 enum machine_mode double_mode
;
4786 /* Initialize the CONST_INT and memory attribute hash tables. */
4787 const_int_htab
= htab_create (37, const_int_htab_hash
,
4788 const_int_htab_eq
, NULL
);
4789 ggc_add_deletable_htab (const_int_htab
, 0, 0);
4791 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
4792 mem_attrs_htab_eq
, NULL
);
4793 ggc_add_deletable_htab (mem_attrs_htab
, 0, mem_attrs_mark
);
4795 no_line_numbers
= ! line_numbers
;
4797 /* Compute the word and byte modes. */
4799 byte_mode
= VOIDmode
;
4800 word_mode
= VOIDmode
;
4801 double_mode
= VOIDmode
;
4803 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4804 mode
= GET_MODE_WIDER_MODE (mode
))
4806 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
4807 && byte_mode
== VOIDmode
)
4810 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
4811 && word_mode
== VOIDmode
)
4815 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4816 mode
= GET_MODE_WIDER_MODE (mode
))
4818 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
4819 && double_mode
== VOIDmode
)
4823 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
4825 /* Assign register numbers to the globally defined register rtx.
4826 This must be done at runtime because the register number field
4827 is in a union and some compilers can't initialize unions. */
4829 pc_rtx
= gen_rtx (PC
, VOIDmode
);
4830 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
4831 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
4832 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
4833 if (hard_frame_pointer_rtx
== 0)
4834 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
4835 HARD_FRAME_POINTER_REGNUM
);
4836 if (arg_pointer_rtx
== 0)
4837 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
4838 virtual_incoming_args_rtx
=
4839 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
4840 virtual_stack_vars_rtx
=
4841 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
4842 virtual_stack_dynamic_rtx
=
4843 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
4844 virtual_outgoing_args_rtx
=
4845 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
4846 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
4848 /* These rtx must be roots if GC is enabled. */
4849 ggc_add_rtx_root (global_rtl
, GR_MAX
);
4851 #ifdef INIT_EXPANDERS
4852 /* This is to initialize {init|mark|free}_machine_status before the first
4853 call to push_function_context_to. This is needed by the Chill front
4854 end which calls push_function_context_to before the first call to
4855 init_function_start. */
4859 /* Create the unique rtx's for certain rtx codes and operand values. */
4861 /* Don't use gen_rtx here since gen_rtx in this case
4862 tries to use these variables. */
4863 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
4864 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
4865 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
4866 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
4868 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
4869 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
4870 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
4872 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
4874 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
4875 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
4876 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
4877 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
4879 for (i
= 0; i
<= 2; i
++)
4881 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4882 mode
= GET_MODE_WIDER_MODE (mode
))
4884 rtx tem
= rtx_alloc (CONST_DOUBLE
);
4885 union real_extract u
;
4887 /* Zero any holes in a structure. */
4888 memset ((char *) &u
, 0, sizeof u
);
4889 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
4891 /* Avoid trailing garbage in the rtx. */
4892 if (sizeof (u
) < sizeof (HOST_WIDE_INT
))
4893 CONST_DOUBLE_LOW (tem
) = 0;
4894 if (sizeof (u
) < 2 * sizeof (HOST_WIDE_INT
))
4895 CONST_DOUBLE_HIGH (tem
) = 0;
4897 memcpy (&CONST_DOUBLE_LOW (tem
), &u
, sizeof u
);
4898 CONST_DOUBLE_CHAIN (tem
) = NULL_RTX
;
4899 PUT_MODE (tem
, mode
);
4901 const_tiny_rtx
[i
][(int) mode
] = tem
;
4904 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
4906 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4907 mode
= GET_MODE_WIDER_MODE (mode
))
4908 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4910 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
4912 mode
= GET_MODE_WIDER_MODE (mode
))
4913 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4916 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
4917 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
4918 const_tiny_rtx
[0][i
] = const0_rtx
;
4920 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
4921 if (STORE_FLAG_VALUE
== 1)
4922 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
4924 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4925 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4926 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4927 ggc_add_rtx_root ((rtx
*) const_tiny_rtx
, sizeof const_tiny_rtx
/ sizeof (rtx
));
4928 ggc_add_rtx_root (&const_true_rtx
, 1);
4930 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4931 return_address_pointer_rtx
4932 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
4936 struct_value_rtx
= STRUCT_VALUE
;
4938 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
4941 #ifdef STRUCT_VALUE_INCOMING
4942 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
4944 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4945 struct_value_incoming_rtx
4946 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
4948 struct_value_incoming_rtx
= struct_value_rtx
;
4952 #ifdef STATIC_CHAIN_REGNUM
4953 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
4955 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4956 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
4957 static_chain_incoming_rtx
4958 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
4961 static_chain_incoming_rtx
= static_chain_rtx
;
4965 static_chain_rtx
= STATIC_CHAIN
;
4967 #ifdef STATIC_CHAIN_INCOMING
4968 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
4970 static_chain_incoming_rtx
= static_chain_rtx
;
4974 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
4975 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
4977 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
4978 ggc_add_rtx_root (&struct_value_rtx
, 1);
4979 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
4980 ggc_add_rtx_root (&static_chain_rtx
, 1);
4981 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
4982 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
4985 /* Query and clear/ restore no_line_numbers. This is used by the
4986 switch / case handling in stmt.c to give proper line numbers in
4987 warnings about unreachable code. */
4990 force_line_numbers ()
4992 int old
= no_line_numbers
;
4994 no_line_numbers
= 0;
4996 force_next_line_note ();
5001 restore_line_number_status (old_value
)
5004 no_line_numbers
= old_value
;