1 # Copyright
(C
) 1999-2017 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite
's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources
] {
48 set tmp_additional_sources
"$additional_sources"
49 set additional_sources
""
52 if { [llength $
args] > 0 } {
53 set options
[list
"additional_flags=[lindex $args 0]"]
57 switch -glob
-- $contents
{
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default
{ set src $
{basename
}[pid
].c
}
72 set compile_type $type
74 assembly
{ set output $
{basename
}[pid
].s
}
75 object
{ set output $
{basename
}[pid
].o
}
76 executable
{ set output $
{basename
}[pid
].exe
}
78 set output $
{basename
}[pid
].s
79 lappend options
"additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
89 set scan_output $output
90 # Don
't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
93 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources
] {
99 set additional_sources
"$tmp_additional_sources"
102 return [list $lines $scan_output
]
105 proc current_target_name
{ } {
107 if [info exists target_info
(target
,name)] {
108 set answer $target_info
(target
,name)
115 # Implement an effective
-target check
for property PROP by invoking
116 # the Tcl command
ARGS and seeing
if it returns true.
118 proc check_cached_effective_target
{ prop
args } {
122 set target
[current_target_name
]
123 if {![info exists et_cache
($prop
,target
)]
124 || $et_cache
($prop
,target
) != $target
} {
125 verbose
"check_cached_effective_target $prop: checking $target" 2
126 set et_cache
($prop
,target
) $target
127 set et_cache
($prop
,value
) [uplevel eval $
args]
128 if {![info exists et_prop_list
]
129 ||
[lsearch $et_prop_list $prop
] < 0} {
130 lappend et_prop_list $prop
132 verbose
"check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache
($prop
,value
)
135 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective
-target
cache. This is useful after testing
140 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
142 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
143 #
do a clear_effective_target_cache at the end as the target
cache can
144 # make decisions based upon the flags
, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init
/asan_finish pair.
148 proc clear_effective_target_cache
{ } {
152 if {[info exists et_prop_list
]} {
153 verbose
"clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list
{
155 unset et_cache
($prop
,value
)
156 unset et_cache
($prop
,target
)
162 # Like check_compile
, but
delete the output file and
return true
if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache
{args} {
165 set result
[eval check_compile $
args]
166 set lines
[lindex $result
0]
167 set output
[lindex $result
1]
168 remote_file build
delete $output
169 return [string match
"" $lines]
172 # Like check_no_compiler_messages_nocache
, but
cache the result.
173 # PROP is the
property we
're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP
, otherwise they satisfy it
185 #
if they
do match regular expression PATTERN.
(PATTERN can start
186 # with something like
"[!]" if the regular expression needs to match
187 #
"!" as the first character.)
189 #
Delete the output file before returning. The other arguments are
190 # as
for check_compile.
191 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
194 set result
[eval
[list check_compile $basename
] $
args]
195 set lines
[lindex $result
0]
196 set output
[lindex $result
1]
199 if { [string match
"" $lines] } {
200 set chan
[open
"$output"]
201 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
202 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
206 remote_file build
delete $output
210 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
211 # PROP is the
property we
're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking
, and doubles as a prefix
for temporary
247 proc check_runtime
{prop
args} {
250 return [check_cached_effective_target $prop
{
251 eval
[list check_runtime_nocache $prop
] $
args
255 #
Return 1 if GCC was configured with $pattern.
256 proc check_configured_with
{ pattern
} {
259 set gcc_output
[$
{tool
}_target_compile
"-v" "" "none" ""]
260 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose
"Matched: $pattern" 2
265 verbose
"Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available
{ }
271 ###############################
273 # weak symbols are only supported in some configs
/object formats
274 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
276 proc check_weak_available
{ } {
279 # All mips targets should support it
281 if { [ string first
"mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget
*-*-aix
*] } {
291 # All solaris2 targets should support it
293 if { [istarget
*-*-solaris2
*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
303 # HP
-UX
10.X doesn
't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 ###############################
332 # proc check_weak_override_available { }
333 ###############################
335 # Like check_weak_available, but return 0 if weak symbol definitions
336 # cannot be overridden.
338 proc check_weak_override_available { } {
339 if { [istarget *-*-mingw*] } {
342 return [check_weak_available]
345 ###############################
346 # proc check_visibility_available { what_kind }
347 ###############################
349 # The visibility attribute is only support in some object formats
350 # This proc returns 1 if it is supported, 0 if not.
351 # The argument is the kind of visibility, default/protected/hidden/internal.
353 proc check_visibility_available { what_kind } {
354 if [string match "" $what_kind] { set what_kind "hidden" }
356 return [check_no_compiler_messages visibility_available_$what_kind object "
357 void f() __attribute__((visibility(\"$what_kind\")));
362 ###############################
363 # proc check_alias_available { }
364 ###############################
366 # Determine if the target toolchain supports the alias attribute.
368 # Returns 2 if the target supports aliases. Returns 1 if the target
369 # only supports weak aliased. Returns 0 if the target does not
370 # support aliases at all. Returns -1 if support for aliases could not
373 proc check_alias_available { } {
374 global alias_available_saved
377 if [info exists alias_available_saved] {
378 verbose "check_alias_available returning saved $alias_available_saved" 2
382 verbose "check_alias_available compiling testfile $src" 2
383 set f [open $src "w"]
384 # Compile a small test program. The definition of "g" is
385 # necessary to keep the Solaris assembler from complaining
387 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
388 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
390 set lines [${tool}_target_compile $src $obj object ""]
392 remote_file build delete $obj
394 if [string match "" $lines] then {
395 # No error messages, everything is OK.
396 set alias_available_saved 2
398 if [regexp "alias definitions not supported" $lines] {
399 verbose "check_alias_available target does not support aliases" 2
401 set objformat [gcc_target_object_format]
403 if { $objformat == "elf" } {
404 verbose "check_alias_available but target uses ELF format, so it ought to" 2
405 set alias_available_saved -1
407 set alias_available_saved 0
410 if [regexp "only weak aliases are supported" $lines] {
411 verbose "check_alias_available target supports only weak aliases" 2
412 set alias_available_saved 1
414 set alias_available_saved -1
419 verbose "check_alias_available returning $alias_available_saved" 2
422 return $alias_available_saved
425 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
427 proc check_effective_target_alias { } {
428 if { [check_alias_available] < 2 } {
435 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
437 proc check_ifunc_available { } {
438 return [check_no_compiler_messages ifunc_available object {
443 void f() __attribute__((ifunc("g")));
447 # Returns true if --gc-sections is supported on the target.
449 proc check_gc_sections_available { } {
450 global gc_sections_available_saved
453 if {![info exists gc_sections_available_saved]} {
454 # Some targets don't support gc
-sections despite whatever
's
455 # advertised by ld's options.
456 if { [istarget alpha
*-*-*]
457 ||
[istarget ia64
-*-*] } {
458 set gc_sections_available_saved
0
462 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
464 if { [board_info target
exists ldflags
]
465 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
466 set gc_sections_available_saved
0
470 # VxWorks kernel modules are relocatable objects linked with
-r
,
471 #
while RTP executables are linked with
-q
(--emit
-relocs
).
472 # Both of these options are incompatible with
--gc
-sections.
473 if { [istarget
*-*-vxworks
*] } {
474 set gc_sections_available_saved
0
478 # Check
if the
ld used by gcc supports
--gc
-sections.
479 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
480 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
481 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
482 set gc_sections_available_saved
1
484 set gc_sections_available_saved
0
487 return $gc_sections_available_saved
490 #
Return 1 if according to target_info struct and explicit target list
491 # target is supposed to support trampolines.
493 proc check_effective_target_trampolines
{ } {
494 if [target_info
exists gcc
,no_trampolines
] {
497 if { [istarget avr
-*-*]
498 ||
[istarget msp430
-*-*]
499 ||
[istarget nvptx
-*-*]
500 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
501 ||
[istarget hppa64
-hp
-hpux11.23
] } {
507 #
Return 1 if target has limited stack size.
509 proc check_effective_target_stack_size
{ } {
510 if [target_info
exists gcc
,stack_size
] {
516 #
Return the value attribute of an effective target
, otherwise
return 0.
518 proc dg
-effective
-target
-value
{ effective_target
} {
519 if { "$effective_target" == "stack_size" } {
520 if [check_effective_target_stack_size
] {
521 return [target_info gcc
,stack_size
]
528 #
Return 1 if signal.h is supported.
530 proc check_effective_target_signal
{ } {
531 if [target_info
exists gcc
,signal_suppress
] {
537 #
Return 1 if according to target_info struct and explicit target list
538 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
539 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
540 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
541 # depend
on this option should
do that
).
543 proc check_effective_target_keeps_null_pointer_checks
{ } {
544 if [target_info
exists keeps_null_pointer_checks
] {
547 if { [istarget avr
-*-*] } {
553 #
Return the autofdo profile wrapper
555 # Linux by default allows
516KB of perf event buffers
556 # in
/proc
/sys
/kernel
/perf_event_mlock_kb
557 # Each individual perf tries to grab it
558 # This causes problems with parallel test suite runs. Instead
559 #
limit us to
8 pages
(32K
), which should be good enough
560 #
for the small test programs. With the default settings
561 # this allows parallelism of
16 and higher of parallel gcc
-auto
-profile
562 proc profopt
-perf
-wrapper
{ } {
564 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
567 #
Return true
if profiling is supported
on the target.
569 proc check_profiling_available
{ test_what
} {
570 global profiling_available_saved
572 verbose
"Profiling argument is <$test_what>" 1
574 # These conditions depend
on the
argument so examine them before
575 # looking at the
cache variable.
577 # Tree profiling requires TLS runtime support.
578 if { $test_what
== "-fprofile-generate" } {
579 if { ![check_effective_target_tls_runtime
] } {
584 if { $test_what
== "-fauto-profile" } {
585 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
586 verbose
"autofdo only supported on linux"
589 # not cross compiling?
591 verbose
"autofdo not supported for non native builds"
594 set event
[profopt
-perf
-wrapper
]
596 verbose
"autofdo not supported"
600 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
601 if { [lindex $
status 0] != 0 } {
602 verbose
"autofdo not supported because perf does not work"
606 # no good way to check this in advance
-- check later instead.
607 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
608 #
if { [lindex $
status 0] != 255 } {
609 # verbose
"autofdo not supported due to missing create_gcov"
614 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
615 # vendor compiler. We cannot reliably predict the directory where the
616 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
617 # necessarily find mcrt1.o even if we have it.
618 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
622 # We don't yet support profiling
for MIPS16.
623 if { [istarget mips
*-*-*]
624 && ![check_effective_target_nomips16
]
625 && ($test_what
== "-p" || $test_what == "-pg") } {
629 # MinGW does not support
-p.
630 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
634 # cygwin does not support
-p.
635 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
639 # uClibc does not have gcrt1.o.
640 if { [check_effective_target_uclibc
]
641 && ($test_what
== "-p" || $test_what == "-pg") } {
645 # Now examine the
cache variable.
646 if {![info exists profiling_available_saved
]} {
647 # Some targets don
't have any implementation of __bb_init_func or are
648 # missing other needed machinery.
649 if {[istarget aarch64*-*-elf]
650 || [istarget am3*-*-linux*]
651 || [istarget arm*-*-eabi*]
652 || [istarget arm*-*-elf]
653 || [istarget arm*-*-symbianelf*]
654 || [istarget avr-*-*]
655 || [istarget bfin-*-*]
656 || [istarget cris-*-*]
657 || [istarget crisv32-*-*]
658 || [istarget fido-*-elf]
659 || [istarget h8300-*-*]
660 || [istarget lm32-*-*]
661 || [istarget m32c-*-elf]
662 || [istarget m68k-*-elf]
663 || [istarget m68k-*-uclinux*]
664 || [istarget mips*-*-elf*]
665 || [istarget mmix-*-*]
666 || [istarget mn10300-*-elf*]
667 || [istarget moxie-*-elf*]
668 || [istarget msp430-*-*]
669 || [istarget nds32*-*-elf]
670 || [istarget nios2-*-elf]
671 || [istarget nvptx-*-*]
672 || [istarget powerpc-*-eabi*]
673 || [istarget powerpc-*-elf]
675 || [istarget tic6x-*-elf]
676 || [istarget visium-*-*]
677 || [istarget xstormy16-*]
678 || [istarget xtensa*-*-elf]
679 || [istarget *-*-rtems*]
680 || [istarget *-*-vxworks*] } {
681 set profiling_available_saved 0
683 set profiling_available_saved 1
687 # -pg link test result can't be cached since it may change between
689 set profiling_working $profiling_available_saved
690 if { $profiling_available_saved
== 1
691 && ![check_no_compiler_messages_nocache profiling executable
{
692 int main
() { return 0; } } "-pg"] } {
693 set profiling_working
0
696 return $profiling_working
699 # Check to see
if a target is
"freestanding". This is as per the definition
700 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
701 # extra headers or libraries other than what is considered essential.
702 proc check_effective_target_freestanding
{ } {
703 if { [istarget nvptx
-*-*] } {
709 #
Return 1 if target has packed layout of structure members by
710 # default
, 0 otherwise. Note that this is slightly different than
711 # whether the target has
"natural alignment": both attributes may be
714 proc check_effective_target_default_packed
{ } {
715 return [check_no_compiler_messages default_packed assembly
{
716 struct x
{ char a
; long b
; } c
;
717 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
721 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
722 # documentation
, where the test also comes from.
724 proc check_effective_target_pcc_bitfield_type_matters
{ } {
725 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
726 # bitfields, but let's stick to the example code from the docs.
727 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
728 struct foo1
{ char x
; char
:0; char y
; };
729 struct foo2
{ char x
; int :0; char y
; };
730 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
734 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
736 proc add_options_for_tls
{ flags
} {
737 #
On Solaris
9, __tls_get_addr
/___tls_get_addr only lives in
738 # libthread
, so always pass
-pthread
for native TLS. Same
for AIX.
739 # Need to duplicate native TLS check from
740 # check_effective_target_tls_native to avoid recursion.
741 if { ([istarget powerpc
-ibm
-aix
*]) &&
742 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
744 int f
(void
) { return i
; }
745 void g
(int j
) { i
= j
; }
747 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
752 #
Return 1 if indirect jumps are supported
, 0 otherwise.
754 proc check_effective_target_indirect_jumps
{} {
755 if { [istarget nvptx
-*-*] } {
761 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
763 proc check_effective_target_nonlocal_goto
{} {
764 if { [istarget nvptx
-*-*] } {
770 #
Return 1 if global constructors are supported
, 0 otherwise.
772 proc check_effective_target_global_constructor
{} {
773 if { [istarget nvptx
-*-*] } {
779 #
Return 1 if taking label
values is supported
, 0 otherwise.
781 proc check_effective_target_label_values
{} {
782 if { [istarget nvptx
-*-*] ||
[target_info
exists gcc
,no_label_values
] } {
789 #
Return 1 if builtin_return_address and builtin_frame_address are
790 # supported
, 0 otherwise.
792 proc check_effective_target_return_address
{} {
793 if { [istarget nvptx
-*-*] } {
799 #
Return 1 if the assembler does not verify function types against
800 # calls
, 0 otherwise. Such verification will typically
show up problems
801 # with K
&R C function declarations.
803 proc check_effective_target_untyped_assembly
{} {
804 if { [istarget nvptx
-*-*] } {
810 #
Return 1 if alloca is supported
, 0 otherwise.
812 proc check_effective_target_alloca
{} {
813 if { [istarget nvptx
-*-*] } {
814 return [check_no_compiler_messages alloca assembly
{
816 void g
(int n
) { f
(__builtin_alloca
(n
)); }
822 #
Return 1 if thread local storage
(TLS
) is supported
, 0 otherwise.
824 proc check_effective_target_tls
{} {
825 return [check_no_compiler_messages tls assembly
{
827 int f
(void
) { return i
; }
828 void g
(int j
) { i
= j
; }
832 #
Return 1 if *native
* thread local storage
(TLS
) is supported
, 0 otherwise.
834 proc check_effective_target_tls_native
{} {
835 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
836 # functions
, so we fail to automatically detect it.
837 if { [istarget
*-*-vxworks
*] } {
841 return [check_no_messages_and_pattern tls_native
"!emutls" assembly {
843 int f
(void
) { return i
; }
844 void g
(int j
) { i
= j
; }
848 #
Return 1 if *emulated
* thread local storage
(TLS
) is supported
, 0 otherwise.
850 proc check_effective_target_tls_emulated
{} {
851 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
852 # functions
, so we fail to automatically detect it.
853 if { [istarget
*-*-vxworks
*] } {
857 return [check_no_messages_and_pattern tls_emulated
"emutls" assembly {
859 int f
(void
) { return i
; }
860 void g
(int j
) { i
= j
; }
864 #
Return 1 if TLS executables can run correctly
, 0 otherwise.
866 proc check_effective_target_tls_runtime
{} {
867 # The runtime does not have TLS support
, but just
868 # running the test below is insufficient to
show this.
869 if { [istarget msp430
-*-*] ||
[istarget visium
-*-*] } {
872 return [check_runtime tls_runtime
{
873 __thread
int thr
= 0;
874 int main
(void
) { return thr
; }
875 } [add_options_for_tls
""]]
878 #
Return 1 if atomic compare
-and
-swap is supported
on 'int'
880 proc check_effective_target_cas_char
{} {
881 return [check_no_compiler_messages cas_char assembly
{
882 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
888 proc check_effective_target_cas_int
{} {
889 return [check_no_compiler_messages cas_int assembly
{
890 #
if __INT_MAX__
== 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
892 #elif __INT_MAX__
== 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
900 #
Return 1 if -ffunction
-sections is supported
, 0 otherwise.
902 proc check_effective_target_function_sections
{} {
903 # Darwin has its own scheme and silently accepts
-ffunction
-sections.
904 if { [istarget
*-*-darwin
*] } {
908 return [check_no_compiler_messages functionsections assembly
{
910 } "-ffunction-sections"]
913 #
Return 1 if instruction scheduling is available
, 0 otherwise.
915 proc check_effective_target_scheduling
{} {
916 return [check_no_compiler_messages scheduling object
{
918 } "-fschedule-insns"]
921 #
Return 1 if trapping arithmetic is available
, 0 otherwise.
923 proc check_effective_target_trapping
{} {
924 return [check_no_compiler_messages trapping object
{
925 int add
(int a
, int b
) { return a
+ b
; }
929 #
Return 1 if compilation with
-fgraphite is error
-free
for trivial
932 proc check_effective_target_fgraphite
{} {
933 return [check_no_compiler_messages fgraphite object
{
938 #
Return 1 if compilation with
-fopenacc is error
-free
for trivial
941 proc check_effective_target_fopenacc
{} {
942 # nvptx can be built with the device
-side bits of openacc
, but it
943 # does not make sense to test it as an openacc host.
944 if [istarget nvptx
-*-*] { return 0 }
946 return [check_no_compiler_messages fopenacc object
{
951 #
Return 1 if compilation with
-fopenmp is error
-free
for trivial
954 proc check_effective_target_fopenmp
{} {
955 # nvptx can be built with the device
-side bits of libgomp
, but it
956 # does not make sense to test it as an openmp host.
957 if [istarget nvptx
-*-*] { return 0 }
959 return [check_no_compiler_messages fopenmp object
{
964 #
Return 1 if compilation with
-fgnu
-tm is error
-free
for trivial
967 proc check_effective_target_fgnu_tm
{} {
968 return [check_no_compiler_messages fgnu_tm object
{
973 #
Return 1 if the target supports mmap
, 0 otherwise.
975 proc check_effective_target_mmap
{} {
976 return [check_function_available
"mmap"]
979 #
Return 1 if the target supports dlopen
, 0 otherwise.
980 proc check_effective_target_dlopen
{} {
981 return [check_no_compiler_messages dlopen executable
{
983 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
984 } [add_options_for_dlopen
""]]
987 proc add_options_for_dlopen
{ flags
} {
991 #
Return 1 if the target supports clone
, 0 otherwise.
992 proc check_effective_target_clone
{} {
993 return [check_function_available
"clone"]
996 #
Return 1 if the target supports setrlimit
, 0 otherwise.
997 proc check_effective_target_setrlimit
{} {
998 # Darwin has non
-posix compliant RLIMIT_AS
999 if { [istarget
*-*-darwin
*] } {
1002 return [check_function_available
"setrlimit"]
1005 #
Return 1 if the target supports gettimeofday
, 0 otherwise.
1006 proc check_effective_target_gettimeofday
{} {
1007 return [check_function_available
"gettimeofday"]
1010 #
Return 1 if the target supports swapcontext
, 0 otherwise.
1011 proc check_effective_target_swapcontext
{} {
1012 return [check_no_compiler_messages swapcontext executable
{
1013 #
include <ucontext.h
>
1016 ucontext_t orig_context
,child_context
;
1017 if (swapcontext
(&child_context
, &orig_context
) < 0) { }
1022 #
Return 1 if compilation with
-pthread is error
-free
for trivial
1023 # code
, 0 otherwise.
1025 proc check_effective_target_pthread
{} {
1026 return [check_no_compiler_messages pthread object
{
1031 #
Return 1 if compilation with
-gstabs is error
-free
for trivial
1032 # code
, 0 otherwise.
1034 proc check_effective_target_stabs
{} {
1035 return [check_no_compiler_messages stabs object
{
1040 #
Return 1 if compilation with
-mpe
-aligned
-commons is error
-free
1041 #
for trivial code
, 0 otherwise.
1043 proc check_effective_target_pe_aligned_commons
{} {
1044 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
1045 return [check_no_compiler_messages pe_aligned_commons object
{
1047 } "-mpe-aligned-commons"]
1052 #
Return 1 if the target supports
-static
1053 proc check_effective_target_static
{} {
1054 return [check_no_compiler_messages static executable
{
1055 int main
(void
) { return 0; }
1059 #
Return 1 if the target supports
-fstack
-protector
1060 proc check_effective_target_fstack_protector
{} {
1061 return [check_runtime fstack_protector
{
1062 int main
(void
) { return 0; }
1063 } "-fstack-protector"]
1066 #
Return 1 if the target supports
-fstack
-check or
-fstack
-check
=$stack_kind
1067 proc check_stack_check_available
{ stack_kind
} {
1068 if [string match
"" $stack_kind] then {
1069 set stack_opt
"-fstack-check"
1070 } else { set stack_opt
"-fstack-check=$stack_kind" }
1072 return [check_no_compiler_messages stack_check_$stack_kind executable
{
1073 int main
(void
) { return 0; }
1077 #
Return 1 if compilation with
-freorder
-blocks
-and
-partition is error
-free
1078 #
for trivial code
, 0 otherwise. As some targets
(ARM
for example
) only
1079 # warn when
-fprofile
-use is also supplied we test that combination too.
1081 proc check_effective_target_freorder
{} {
1082 if { [check_no_compiler_messages freorder object
{
1084 } "-freorder-blocks-and-partition"]
1085 && [check_no_compiler_messages fprofile_use_freorder object
{
1087 } "-fprofile-use -freorder-blocks-and-partition"] } {
1093 #
Return 1 if -fpic and
-fPIC are supported
, as in no warnings or errors
1094 # emitted
, 0 otherwise. Whether a shared library can actually be built is
1095 # out of scope
for this test.
1097 proc check_effective_target_fpic
{ } {
1098 # Note that M68K has a multilib that supports
-fpic but not
1099 #
-fPIC
, so we need to check both. We test with a
program that
1100 # requires GOT references.
1101 foreach
arg {fpic fPIC
} {
1102 if [check_no_compiler_messages $
arg object
{
1103 extern
int foo
(void
); extern
int bar
;
1104 int baz
(void
) { return foo
() + bar
; }
1112 #
On AArch64
, if -fpic is not supported
, then we will fall
back to
-fPIC
1113 # silently. So
, we can
't rely on above "check_effective_target_fpic" as it
1114 # assumes compiler will give warning if -fpic not supported. Here we check
1115 # whether binutils supports those new -fpic relocation modifiers, and assume
1116 # -fpic is supported if there is binutils support. GCC configuration will
1117 # enable -fpic for AArch64 in this case.
1119 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1120 # memory model -fpic relocation types.
1122 proc check_effective_target_aarch64_small_fpic { } {
1123 if { [istarget aarch64*-*-*] } {
1124 return [check_no_compiler_messages aarch64_small_fpic object {
1125 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1132 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1133 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1134 # in binutils since
2015-03-04 as PR gas
/17843.
1136 # This test directive make sure binutils support all features needed by TLS LE
1137 # under
-mtls
-size
=32 on AArch64.
1139 proc check_effective_target_aarch64_tlsle32
{ } {
1140 if { [istarget aarch64
*-*-*] } {
1141 return [check_no_compiler_messages aarch64_tlsle32 object
{
1142 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1149 #
Return 1 if -shared is supported
, as in no warnings or errors
1150 # emitted
, 0 otherwise.
1152 proc check_effective_target_shared
{ } {
1153 # Note that M68K has a multilib that supports
-fpic but not
1154 #
-fPIC
, so we need to check both. We test with a
program that
1155 # requires GOT references.
1156 return [check_no_compiler_messages shared executable
{
1157 extern
int foo
(void
); extern
int bar
;
1158 int baz
(void
) { return foo
() + bar
; }
1162 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1164 proc check_effective_target_pie
{ } {
1165 if { [istarget
*-*-darwin\
[912\
]*]
1166 ||
[istarget
*-*-dragonfly
*]
1167 ||
[istarget
*-*-freebsd
*]
1168 ||
[istarget
*-*-linux
*]
1169 ||
[istarget
*-*-gnu
*] } {
1172 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1173 # Full PIE support was added in Solaris
11.x and Solaris
12, but gcc
1174 # errors out
if missing
, so check
for that.
1175 return [check_no_compiler_messages pie executable
{
1176 int main
(void
) { return 0; }
1182 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1184 proc check_effective_target_mpaired_single
{ } {
1185 return [check_no_compiler_messages mpaired_single object
{
1187 } "-mpaired-single"]
1190 #
Return true
if the target has access to FPU instructions.
1192 proc check_effective_target_hard_float
{ } {
1193 if { [istarget mips
*-*-*] } {
1194 return [check_no_compiler_messages hard_float assembly
{
1195 #
if (defined __mips_soft_float || defined __mips16
)
1196 #error __mips_soft_float || __mips16
1201 # This proc is actually checking the availabilty of FPU
1202 # support
for doubles
, so
on the RX we must fail
if the
1203 #
64-bit double multilib has been selected.
1204 if { [istarget rx
-*-*] } {
1206 #
return [check_no_compiler_messages hard_float assembly
{
1207 #
if defined __RX_64_BIT_DOUBLES__
1208 #error __RX_64_BIT_DOUBLES__
1213 # The generic test equates hard_float with
"no call for adding doubles".
1214 return [check_no_messages_and_pattern hard_float
"!\\(call" rtl-expand {
1215 double a
(double b
, double c
) { return b
+ c
; }
1219 #
Return true
if the target is a
64-bit MIPS target.
1221 proc check_effective_target_mips64
{ } {
1222 return [check_no_compiler_messages mips64 assembly
{
1229 #
Return true
if the target is a MIPS target that does not produce
1232 proc check_effective_target_nomips16
{ } {
1233 return [check_no_compiler_messages nomips16 object
{
1237 /* A cheap way of testing
for -mflip
-mips16.
*/
1238 void foo
(void
) { asm
("addiu $20,$20,1"); }
1239 void bar
(void
) { asm
("addiu $20,$20,1"); }
1244 # Add the options needed
for MIPS16 function attributes. At the moment
,
1245 # we don
't support MIPS16 PIC.
1247 proc add_options_for_mips16_attribute { flags } {
1248 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1251 # Return true if we can force a mode that allows MIPS16 code generation.
1252 # We don't support MIPS16 PIC
, and only support MIPS16
-mhard
-float
1255 proc check_effective_target_mips16_attribute
{ } {
1256 return [check_no_compiler_messages mips16_attribute assembly
{
1260 #
if defined __mips_hard_float \
1261 && (!defined _ABIO32 || _MIPS_SIM
!= _ABIO32
) \
1262 && (!defined _ABIO64 || _MIPS_SIM
!= _ABIO64
)
1263 #error __mips_hard_float
&& (!_ABIO32 ||
!_ABIO64
)
1265 } [add_options_for_mips16_attribute
""]]
1268 #
Return 1 if the target supports long double larger than double when
1269 # using the new ABI
, 0 otherwise.
1271 proc check_effective_target_mips_newabi_large_long_double
{ } {
1272 return [check_no_compiler_messages mips_newabi_large_long_double object
{
1273 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
1277 #
Return true
if the target is a MIPS target that has access
1278 # to the LL and SC instructions.
1280 proc check_effective_target_mips_llsc
{ } {
1281 if { ![istarget mips
*-*-*] } {
1284 # Assume that these instructions are always implemented
for
1285 # non
-elf
* targets
, via emulation
if necessary.
1286 if { ![istarget
*-*-elf
*] } {
1289 # Otherwise assume LL
/SC support
for everything but MIPS I.
1290 return [check_no_compiler_messages mips_llsc assembly
{
1297 #
Return true
if the target is a MIPS target that uses in
-place relocations.
1299 proc check_effective_target_mips_rel
{ } {
1300 if { ![istarget mips
*-*-*] } {
1303 return [check_no_compiler_messages mips_rel object
{
1304 #
if (defined _ABIN32
&& _MIPS_SIM
== _ABIN32
) \
1305 ||
(defined _ABI64
&& _MIPS_SIM
== _ABI64
)
1306 #error _ABIN32
&& (_ABIN32 || _ABI64
)
1311 #
Return true
if the target is a MIPS target that uses the EABI.
1313 proc check_effective_target_mips_eabi
{ } {
1314 if { ![istarget mips
*-*-*] } {
1317 return [check_no_compiler_messages mips_eabi object
{
1324 #
Return 1 if the current multilib does not generate PIC by default.
1326 proc check_effective_target_nonpic
{ } {
1327 return [check_no_compiler_messages nonpic assembly
{
1334 #
Return 1 if the current multilib generates PIE by default.
1336 proc check_effective_target_pie_enabled
{ } {
1337 return [check_no_compiler_messages pie_enabled assembly
{
1344 #
Return 1 if the target generates
-fstack
-protector by default.
1346 proc check_effective_target_fstack_protector_enabled
{} {
1347 return [ check_no_compiler_messages fstack_protector_enabled assembly
{
1348 #
if !defined
(__SSP__
) && !defined
(__SSP_ALL__
) && \
1349 !defined
(__SSP_STRONG__
) && !defined
(__SSP_EXPICIT__
)
1355 #
Return 1 if the target does not use a
status wrapper.
1357 proc check_effective_target_unwrapped
{ } {
1358 if { [target_info needs_status_wrapper
] != "" \
1359 && [target_info needs_status_wrapper
] != "0" } {
1365 #
Return true
if iconv is supported
on the target. In particular IBM1047.
1367 proc check_iconv_available
{ test_what
} {
1370 #
If the tool configuration file has not
set libiconv
, try
"-liconv"
1371 if { ![info exists libiconv
] } {
1372 set libiconv
"-liconv"
1374 set test_what
[lindex $test_what
1]
1375 return [check_runtime_nocache $test_what
[subst
{
1381 cd
= iconv_open
("$test_what", "UTF-8");
1382 if (cd
== (iconv_t
) -1)
1389 #
Return true
if Cilk Library is supported
on the target.
1390 proc check_effective_target_cilkplus_runtime
{ } {
1391 return [ check_no_compiler_messages_nocache cilkplus_runtime executable
{
1395 int __cilkrts_set_param
(const char
*, const char
*);
1397 int x
= __cilkrts_set_param
("nworkers", "0");
1400 } "-fcilkplus -lcilkrts" ]
1403 #
Return true
if the atomic library is supported
on the target.
1404 proc check_effective_target_libatomic_available
{ } {
1405 return [check_no_compiler_messages libatomic_available executable
{
1406 int main
(void
) { return 0; }
1410 #
Return 1 if an ASCII locale is supported
on this host
, 0 otherwise.
1412 proc check_ascii_locale_available
{ } {
1416 #
Return true
if named sections are supported
on this target.
1418 proc check_named_sections_available
{ } {
1419 return [check_no_compiler_messages named_sections assembly
{
1420 int __attribute__
((section
("whatever"))) foo;
1424 #
Return true
if the
"naked" function attribute is supported on this target.
1426 proc check_effective_target_naked_functions
{ } {
1427 return [check_no_compiler_messages naked_functions assembly
{
1428 void f
() __attribute__
((naked
));
1432 #
Return 1 if the target supports Fortran real kinds larger than real
(8),
1435 # When the target
name changes
, replace the cached result.
1437 proc check_effective_target_fortran_large_real
{ } {
1438 return [check_no_compiler_messages fortran_large_real executable
{
1440 integer,parameter
:: k
= selected_real_kind
(precision
(0.0_8
) + 1)
1447 #
Return 1 if the target supports Fortran real kind real
(16),
1448 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1449 # this checks
for Real
(16) only
; the other returned real
(10) if
1450 # both real
(10) and real
(16) are available.
1452 # When the target
name changes
, replace the cached result.
1454 proc check_effective_target_fortran_real_16
{ } {
1455 return [check_no_compiler_messages fortran_real_16 executable
{
1464 #
Return 1 if the target supports Fortran
's IEEE modules,
1467 # When the target name changes, replace the cached result.
1469 proc check_effective_target_fortran_ieee { flags } {
1470 return [check_no_compiler_messages fortran_ieee executable {
1472 use, intrinsic :: ieee_features
1478 # Return 1 if the target supports SQRT for the largest floating-point
1479 # type. (Some targets lack the libm support for this FP type.)
1480 # On most targets, this check effectively checks either whether sqrtl is
1481 # available or on __float128 systems whether libquadmath is installed,
1482 # which provides sqrtq.
1484 # When the target name changes, replace the cached result.
1486 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1487 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1489 use iso_fortran_env, only: real_kinds
1490 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1491 real(kind=maxFP), volatile :: x
1499 # Return 1 if the target supports Fortran integer kinds larger than
1500 # integer(8), 0 otherwise.
1502 # When the target name changes, replace the cached result.
1504 proc check_effective_target_fortran_large_int { } {
1505 return [check_no_compiler_messages fortran_large_int executable {
1507 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1508 integer(kind=k) :: i
1513 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1515 # When the target name changes, replace the cached result.
1517 proc check_effective_target_fortran_integer_16 { } {
1518 return [check_no_compiler_messages fortran_integer_16 executable {
1525 # Return 1 if we can statically link libgfortran, 0 otherwise.
1527 # When the target name changes, replace the cached result.
1529 proc check_effective_target_static_libgfortran { } {
1530 return [check_no_compiler_messages static_libgfortran executable {
1537 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1539 proc check_effective_target_rdynamic { } {
1540 return [check_no_compiler_messages rdynamic executable {
1541 int main() { return 0; }
1545 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1547 proc check_effective_target_cilkplus { } {
1548 # Skip cilk-plus tests on int16 and size16 targets for now.
1549 # The cilk-plus tests are not generic enough to cover these
1550 # cases and would throw hundreds of FAILs.
1551 if { [check_effective_target_int16]
1552 || ![check_effective_target_size32plus] } {
1556 # Skip AVR, its RAM is too small and too many tests would fail.
1557 if { [istarget avr-*-*] } {
1561 if { ! [check_effective_target_pthread] } {
1568 proc check_linker_plugin_available { } {
1569 return [check_no_compiler_messages_nocache linker_plugin executable {
1570 int main() { return 0; }
1571 } "-flto -fuse-linker-plugin"]
1574 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1575 # otherwise. Cache the result.
1577 proc check_750cl_hw_available { } {
1578 return [check_cached_effective_target 750cl_hw_available {
1579 # If this is not the right target then we can skip the test.
1580 if { ![istarget powerpc-*paired*] } {
1583 check_runtime_nocache 750cl_hw_available {
1587 asm volatile ("ps_mul v0,v0,v0");
1589 asm volatile ("ps_mul 0,0,0");
1598 # Return 1 if the target OS supports running SSE executables, 0
1599 # otherwise. Cache the result.
1601 proc check_sse_os_support_available { } {
1602 return [check_cached_effective_target sse_os_support_available {
1603 # If this is not the right target then we can skip the test.
1604 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1606 } elseif { [istarget i?86-*-solaris2*] } {
1607 # The Solaris 2 kernel doesn't save and restore SSE registers
1608 # before Solaris
9 4/04. Before that
, executables die with SIGILL.
1609 check_runtime_nocache sse_os_support_available
{
1612 asm volatile
("movaps %xmm0,%xmm0");
1622 #
Return 1 if the target OS supports running AVX executables
, 0
1623 # otherwise.
Cache the result.
1625 proc check_avx_os_support_available
{ } {
1626 return [check_cached_effective_target avx_os_support_available
{
1627 #
If this is not the right target
then we can skip the test.
1628 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1631 # Check that OS has AVX and SSE saving enabled.
1632 check_runtime_nocache avx_os_support_available
{
1635 unsigned
int eax
, edx
;
1637 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1638 return (eax
& 6) != 6;
1645 #
Return 1 if the target supports executing SSE instructions
, 0
1646 # otherwise.
Cache the result.
1648 proc check_sse_hw_available
{ } {
1649 return [check_cached_effective_target sse_hw_available
{
1650 #
If this is not the right target
then we can skip the test.
1651 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1654 check_runtime_nocache sse_hw_available
{
1658 unsigned
int eax
, ebx
, ecx
, edx
;
1659 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1660 return !(edx
& bit_SSE
);
1668 #
Return 1 if the target supports executing MIPS Paired
-Single instructions
,
1669 #
0 otherwise.
Cache the result.
1671 proc check_mpaired_single_hw_available
{ } {
1672 return [check_cached_effective_target mpaired_single_hw_available
{
1673 #
If this is not the right target
then we can skip the test.
1674 if { !([istarget mips
*-*-*]) } {
1677 check_runtime_nocache mpaired_single_hw_available
{
1680 asm volatile
("pll.ps $f2,$f4,$f6");
1688 #
Return 1 if the target supports executing Loongson vector instructions
,
1689 #
0 otherwise.
Cache the result.
1691 proc check_mips_loongson_hw_available
{ } {
1692 return [check_cached_effective_target mips_loongson_hw_available
{
1693 #
If this is not the right target
then we can skip the test.
1694 if { !([istarget mips
*-*-*]) } {
1697 check_runtime_nocache mips_loongson_hw_available
{
1698 #
include <loongson.h
>
1701 asm volatile
("paddw $f2,$f4,$f6");
1709 #
Return 1 if the target supports executing MIPS MSA instructions
, 0
1710 # otherwise.
Cache the result.
1712 proc check_mips_msa_hw_available
{ } {
1713 return [check_cached_effective_target mips_msa_hw_available
{
1714 #
If this is not the right target
then we can skip the test.
1715 if { !([istarget mips
*-*-*]) } {
1718 check_runtime_nocache mips_msa_hw_available
{
1719 #
if !defined
(__mips_msa
)
1720 #error
"MSA NOT AVAIL"
1722 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
1723 #error
"MSA NOT AVAIL FOR ISA REV < 2"
1725 #
if !defined
(__mips_hard_float
)
1726 #error
"MSA HARD_FLOAT REQUIRED"
1728 #
if __mips_fpr
!= 64
1729 #error
"MSA 64-bit FPR REQUIRED"
1735 v8i16 v
= __builtin_msa_ldi_h
(0);
1745 #
Return 1 if the target supports executing SSE2 instructions
, 0
1746 # otherwise.
Cache the result.
1748 proc check_sse2_hw_available
{ } {
1749 return [check_cached_effective_target sse2_hw_available
{
1750 #
If this is not the right target
then we can skip the test.
1751 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1754 check_runtime_nocache sse2_hw_available
{
1758 unsigned
int eax
, ebx
, ecx
, edx
;
1759 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1760 return !(edx
& bit_SSE2
);
1768 #
Return 1 if the target supports executing SSE4 instructions
, 0
1769 # otherwise.
Cache the result.
1771 proc check_sse4_hw_available
{ } {
1772 return [check_cached_effective_target sse4_hw_available
{
1773 #
If this is not the right target
then we can skip the test.
1774 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1777 check_runtime_nocache sse4_hw_available
{
1781 unsigned
int eax
, ebx
, ecx
, edx
;
1782 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1783 return !(ecx
& bit_SSE4_2
);
1791 #
Return 1 if the target supports executing AVX instructions
, 0
1792 # otherwise.
Cache the result.
1794 proc check_avx_hw_available
{ } {
1795 return [check_cached_effective_target avx_hw_available
{
1796 #
If this is not the right target
then we can skip the test.
1797 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1800 check_runtime_nocache avx_hw_available
{
1804 unsigned
int eax
, ebx
, ecx
, edx
;
1805 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1806 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
1807 != (bit_AVX | bit_OSXSAVE
));
1815 #
Return 1 if the target supports executing AVX2 instructions
, 0
1816 # otherwise.
Cache the result.
1818 proc check_avx2_hw_available
{ } {
1819 return [check_cached_effective_target avx2_hw_available
{
1820 #
If this is not the right target
then we can skip the test.
1821 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1824 check_runtime_nocache avx2_hw_available
{
1828 unsigned
int eax
, ebx
, ecx
, edx
;
1829 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
)
1830 ||
((ecx
& bit_OSXSAVE
) != bit_OSXSAVE
))
1833 if (__get_cpuid_max
(0, NULL
) < 7)
1836 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1838 return (ebx
& bit_AVX2
) != bit_AVX2
;
1845 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
1847 proc check_effective_target_sse_runtime
{ } {
1848 if { [check_effective_target_sse
]
1849 && [check_sse_hw_available
]
1850 && [check_sse_os_support_available
] } {
1856 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1858 proc check_effective_target_sse2_runtime
{ } {
1859 if { [check_effective_target_sse2
]
1860 && [check_sse2_hw_available
]
1861 && [check_sse_os_support_available
] } {
1867 #
Return 1 if the target supports running SSE4 executables
, 0 otherwise.
1869 proc check_effective_target_sse4_runtime
{ } {
1870 if { [check_effective_target_sse4
]
1871 && [check_sse4_hw_available
]
1872 && [check_sse_os_support_available
] } {
1878 #
Return 1 if the target supports running MIPS Paired
-Single
1879 # executables
, 0 otherwise.
1881 proc check_effective_target_mpaired_single_runtime
{ } {
1882 if { [check_effective_target_mpaired_single
]
1883 && [check_mpaired_single_hw_available
] } {
1889 #
Return 1 if the target supports running Loongson executables
, 0 otherwise.
1891 proc check_effective_target_mips_loongson_runtime
{ } {
1892 if { [check_effective_target_mips_loongson
]
1893 && [check_mips_loongson_hw_available
] } {
1899 #
Return 1 if the target supports running MIPS MSA executables
, 0 otherwise.
1901 proc check_effective_target_mips_msa_runtime
{ } {
1902 if { [check_effective_target_mips_msa
]
1903 && [check_mips_msa_hw_available
] } {
1909 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
1911 proc check_effective_target_avx_runtime
{ } {
1912 if { [check_effective_target_avx
]
1913 && [check_avx_hw_available
]
1914 && [check_avx_os_support_available
] } {
1920 #
Return 1 if the target supports running AVX2 executables
, 0 otherwise.
1922 proc check_effective_target_avx2_runtime
{ } {
1923 if { [check_effective_target_avx2
]
1924 && [check_avx2_hw_available
]
1925 && [check_avx_os_support_available
] } {
1931 #
Return 1 if we are compiling
for 64-bit PowerPC but we
do not use direct
1932 #
move instructions
for moves from GPR to FPR.
1934 proc check_effective_target_powerpc64_no_dm
{ } {
1935 # The
"mulld" checks if we are generating PowerPC64 code. The "lfd"
1936 # checks
if we
do not use direct moves
, but use the old
-fashioned
1937 # slower
move-via
-the
-stack.
1938 return [check_no_messages_and_pattern powerpc64_no_dm \
1939 {\mmulld\M.
*\mlfd
} assembly
{
1940 double f
(long long x
) { return x
*x
; }
1944 #
Return 1 if the target supports the __builtin_cpu_supports built
-in
,
1945 # including having a new enough library to support the test.
Cache the result.
1946 # Require at least a power7 to run
on.
1948 proc check_ppc_cpu_supports_hw_available
{ } {
1949 return [check_cached_effective_target ppc_cpu_supports_hw_available
{
1950 # Some simulators are known to not support VSX
/power8 instructions.
1951 #
For now
, disable
on Darwin
1952 if { [istarget powerpc
-*-eabi
]
1953 ||
[istarget powerpc
*-*-eabispe
]
1954 ||
[istarget
*-*-darwin
*]} {
1958 check_runtime_nocache ppc_cpu_supports_hw_available
{
1962 asm volatile
("xxlor vs0,vs0,vs0");
1964 asm volatile
("xxlor 0,0,0");
1966 if (!__builtin_cpu_supports
("vsx"))
1975 #
Return 1 if the target supports executing power8 vector instructions
, 0
1976 # otherwise.
Cache the result.
1978 proc check_p8vector_hw_available
{ } {
1979 return [check_cached_effective_target p8vector_hw_available
{
1980 # Some simulators are known to not support VSX
/power8 instructions.
1981 #
For now
, disable
on Darwin
1982 if { [istarget powerpc
-*-eabi
]
1983 ||
[istarget powerpc
*-*-eabispe
]
1984 ||
[istarget
*-*-darwin
*]} {
1987 set options
"-mpower8-vector"
1988 check_runtime_nocache p8vector_hw_available
{
1992 asm volatile
("xxlorc vs0,vs0,vs0");
1994 asm volatile
("xxlorc 0,0,0");
2003 #
Return 1 if the target supports executing power9 vector instructions
, 0
2004 # otherwise.
Cache the result.
2006 proc check_p9vector_hw_available
{ } {
2007 return [check_cached_effective_target p9vector_hw_available
{
2008 # Some simulators are known to not support VSX
/power8
/power9
2009 # instructions.
For now
, disable
on Darwin.
2010 if { [istarget powerpc
-*-eabi
]
2011 ||
[istarget powerpc
*-*-eabispe
]
2012 ||
[istarget
*-*-darwin
*]} {
2015 set options
"-mpower9-vector"
2016 check_runtime_nocache p9vector_hw_available
{
2020 vector double v
= (vector double
) { 0.0, 0.0 };
2021 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2029 #
Return 1 if the target supports executing power9 modulo instructions
, 0
2030 # otherwise.
Cache the result.
2032 proc check_p9modulo_hw_available
{ } {
2033 return [check_cached_effective_target p9modulo_hw_available
{
2034 # Some simulators are known to not support VSX
/power8
/power9
2035 # instructions.
For now
, disable
on Darwin.
2036 if { [istarget powerpc
-*-eabi
]
2037 ||
[istarget powerpc
*-*-eabispe
]
2038 ||
[istarget
*-*-darwin
*]} {
2041 set options
"-mmodulo"
2042 check_runtime_nocache p9modulo_hw_available
{
2045 int i
= 5, j
= 3, r
= -1;
2046 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2054 #
Return 1 if the target supports executing __float128
on PowerPC via software
2055 # emulation
, 0 otherwise.
Cache the result.
2057 proc check_ppc_float128_sw_available
{ } {
2058 return [check_cached_effective_target ppc_float128_sw_available
{
2059 # Some simulators are known to not support VSX
/power8
/power9
2060 # instructions.
For now
, disable
on Darwin.
2061 if { [istarget powerpc
-*-eabi
]
2062 ||
[istarget powerpc
*-*-eabispe
]
2063 ||
[istarget
*-*-darwin
*]} {
2066 set options
"-mfloat128 -mvsx"
2067 check_runtime_nocache ppc_float128_sw_available
{
2068 volatile __float128 x
= 1.0q
;
2069 volatile __float128 y
= 2.0q
;
2072 __float128 z
= x
+ y
;
2080 #
Return 1 if the target supports executing __float128
on PowerPC via power9
2081 # hardware instructions
, 0 otherwise.
Cache the result.
2083 proc check_ppc_float128_hw_available
{ } {
2084 return [check_cached_effective_target ppc_float128_hw_available
{
2085 # Some simulators are known to not support VSX
/power8
/power9
2086 # instructions.
For now
, disable
on Darwin.
2087 if { [istarget powerpc
-*-eabi
]
2088 ||
[istarget powerpc
*-*-eabispe
]
2089 ||
[istarget
*-*-darwin
*]} {
2092 set options
"-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2093 check_runtime_nocache ppc_float128_hw_available
{
2094 volatile __float128 x
= 1.0q
;
2095 volatile __float128 y
= 2.0q
;
2098 __float128 z
= x
+ y
;
2099 __float128 w
= -1.0q
;
2101 __asm__
("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2102 return ((z
!= 3.0q
) ||
(z
!= w
);
2109 #
Return 1 if the target supports executing VSX instructions
, 0
2110 # otherwise.
Cache the result.
2112 proc check_vsx_hw_available
{ } {
2113 return [check_cached_effective_target vsx_hw_available
{
2114 # Some simulators are known to not support VSX instructions.
2115 #
For now
, disable
on Darwin
2116 if { [istarget powerpc
-*-eabi
]
2117 ||
[istarget powerpc
*-*-eabispe
]
2118 ||
[istarget
*-*-darwin
*]} {
2122 check_runtime_nocache vsx_hw_available
{
2126 asm volatile
("xxlor vs0,vs0,vs0");
2128 asm volatile
("xxlor 0,0,0");
2137 #
Return 1 if the target supports executing AltiVec instructions
, 0
2138 # otherwise.
Cache the result.
2140 proc check_vmx_hw_available
{ } {
2141 return [check_cached_effective_target vmx_hw_available
{
2142 # Some simulators are known to not support VMX instructions.
2143 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
2146 # Most targets don
't require special flags for this test case, but
2147 # Darwin does. Just to be sure, make sure VSX is not enabled for
2148 # the altivec tests.
2149 if { [istarget *-*-darwin*]
2150 || [istarget *-*-aix*] } {
2151 set options "-maltivec -mno-vsx"
2153 set options "-mno-vsx"
2155 check_runtime_nocache vmx_hw_available {
2159 asm volatile ("vor v0,v0,v0");
2161 asm volatile ("vor 0,0,0");
2170 proc check_ppc_recip_hw_available { } {
2171 return [check_cached_effective_target ppc_recip_hw_available {
2172 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2173 # For now, disable on Darwin
2174 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2177 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2178 check_runtime_nocache ppc_recip_hw_available {
2179 volatile double d_recip, d_rsqrt, d_four = 4.0;
2180 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2183 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2184 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2185 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2186 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2194 # Return 1 if the target supports executing AltiVec and Cell PPU
2195 # instructions, 0 otherwise. Cache the result.
2197 proc check_effective_target_cell_hw { } {
2198 return [check_cached_effective_target cell_hw_available {
2199 # Some simulators are known to not support VMX and PPU instructions.
2200 if { [istarget powerpc-*-eabi*] } {
2203 # Most targets don't require special flags
for this test
2204 # case
, but Darwin and AIX
do.
2205 if { [istarget
*-*-darwin
*]
2206 ||
[istarget
*-*-aix
*] } {
2207 set options
"-maltivec -mcpu=cell"
2209 set options
"-mcpu=cell"
2211 check_runtime_nocache cell_hw_available
{
2215 asm volatile
("vor v0,v0,v0");
2216 asm volatile
("lvlx v0,r0,r0");
2218 asm volatile
("vor 0,0,0");
2219 asm volatile
("lvlx 0,0,0");
2228 #
Return 1 if the target supports executing
64-bit instructions
, 0
2229 # otherwise.
Cache the result.
2231 proc check_effective_target_powerpc64
{ } {
2232 global powerpc64_available_saved
2235 if [info exists powerpc64_available_saved
] {
2236 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2238 set powerpc64_available_saved
0
2240 # Some simulators are known to not support powerpc64 instructions.
2241 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
2242 verbose
"check_effective_target_powerpc64 returning 0" 2
2243 return $powerpc64_available_saved
2246 #
Set up
, compile, and
execute a test
program containing a
64-bit
2247 # instruction.
Include the current process ID in the file
2248 # names to prevent conflicts with invocations
for multiple
2253 set f
[open $src
"w"]
2254 puts $f
"int main() {"
2255 puts $f
"#ifdef __MACH__"
2256 puts $f
" asm volatile (\"extsw r0,r0\");"
2258 puts $f
" asm volatile (\"extsw 0,0\");"
2260 puts $f
" return 0; }"
2263 set opts
"additional_flags=-mcpu=G5"
2265 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
2266 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
2269 if [string match
"" $lines] then {
2270 # No error message
, compilation succeeded.
2271 set result
[$
{tool
}_load
"./$exe" "" ""]
2272 set status [lindex $result
0]
2273 remote_file build
delete $exe
2274 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
2276 if { $
status == "pass" } then {
2277 set powerpc64_available_saved
1
2280 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
2284 return $powerpc64_available_saved
2287 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
2288 # complex float arguments. This affects gfortran tests that
call cabsf
2289 # in libm built by an earlier compiler.
Return 0 if libm uses the same
2290 #
argument passing as the compiler under test
, 1 otherwise.
2292 proc check_effective_target_broken_cplxf_arg
{ } {
2293 # Skip the work
for targets known not to be affected.
2294 if { ![istarget powerpc
*-*-linux
*] ||
![is
-effective
-target lp64
] } {
2298 return [check_cached_effective_target broken_cplxf_arg
{
2299 check_runtime_nocache broken_cplxf_arg
{
2300 #
include <complex.h
>
2301 extern void abort
(void
);
2302 float fabsf
(float
);
2303 float cabsf
(_Complex float
);
2310 if (fabsf
(f
- 5.0) > 0.0001)
2311 /* Yes
, it
's broken. */
2313 /* All fine, not broken. */
2320 # Return 1 is this is a TI C6X target supporting C67X instructions
2321 proc check_effective_target_ti_c67x { } {
2322 return [check_no_compiler_messages ti_c67x assembly {
2323 #if !defined(_TMS320C6700)
2324 #error !_TMS320C6700
2329 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2330 proc check_effective_target_ti_c64xp { } {
2331 return [check_no_compiler_messages ti_c64xp assembly {
2332 #if !defined(_TMS320C6400_PLUS)
2333 #error !_TMS320C6400_PLUS
2339 proc check_alpha_max_hw_available { } {
2340 return [check_runtime alpha_max_hw_available {
2341 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2345 # Returns true iff the FUNCTION is available on the target system.
2346 # (This is essentially a Tcl implementation of Autoconf's
2349 proc check_function_available
{ function
} {
2350 return [check_no_compiler_messages $
{function
}_available \
2356 int main
() { $function
(); }
2360 # Returns true iff
"fork" is available on the target system.
2362 proc check_fork_available
{} {
2363 return [check_function_available
"fork"]
2366 # Returns true iff
"mkfifo" is available on the target system.
2368 proc check_mkfifo_available
{} {
2369 if { [istarget
*-*-cygwin
*] } {
2370 # Cygwin has mkfifo
, but support is incomplete.
2374 return [check_function_available
"mkfifo"]
2377 # Returns true iff
"__cxa_atexit" is used on the target system.
2379 proc check_cxa_atexit_available
{ } {
2380 return [check_cached_effective_target cxa_atexit_available
{
2381 if { [istarget hppa
*-*-hpux10
*] } {
2382 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
2384 } elseif { [istarget *-*-vxworks] } {
2385 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2388 check_runtime_nocache cxa_atexit_available
{
2391 static unsigned
int count;
2408 Y
() { f
(); count = 2; }
2417 int main
() { return 0; }
2423 proc check_effective_target_objc2
{ } {
2424 return [check_no_compiler_messages objc2 object
{
2433 proc check_effective_target_next_runtime
{ } {
2434 return [check_no_compiler_messages objc2 object
{
2435 #ifdef __NEXT_RUNTIME__
2438 #error
!__NEXT_RUNTIME__
2443 #
Return 1 if we
're generating 32-bit code using default options, 0
2446 proc check_effective_target_ilp32 { } {
2447 return [check_no_compiler_messages ilp32 object {
2448 int dummy[sizeof (int) == 4
2449 && sizeof (void *) == 4
2450 && sizeof (long) == 4 ? 1 : -1];
2454 # Return 1 if we're generating ia32 code using default options
, 0
2457 proc check_effective_target_ia32
{ } {
2458 return [check_no_compiler_messages ia32 object
{
2459 int dummy
[sizeof
(int) == 4
2460 && sizeof
(void
*) == 4
2461 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
2465 #
Return 1 if we
're generating x32 code using default options, 0
2468 proc check_effective_target_x32 { } {
2469 return [check_no_compiler_messages x32 object {
2470 int dummy[sizeof (int) == 4
2471 && sizeof (void *) == 4
2472 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2476 # Return 1 if we're generating
32-bit integers using default
2477 # options
, 0 otherwise.
2479 proc check_effective_target_int32
{ } {
2480 return [check_no_compiler_messages int32 object
{
2481 int dummy
[sizeof
(int) == 4 ?
1 : -1];
2485 #
Return 1 if we
're generating 32-bit or larger integers using default
2486 # options, 0 otherwise.
2488 proc check_effective_target_int32plus { } {
2489 return [check_no_compiler_messages int32plus object {
2490 int dummy[sizeof (int) >= 4 ? 1 : -1];
2494 # Return 1 if we're generating
32-bit or larger pointers using default
2495 # options
, 0 otherwise.
2497 proc check_effective_target_ptr32plus
{ } {
2498 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
2499 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
2500 # cannot really hold a
32-bit address
, so we always
return false here.
2501 if { [istarget msp430
-*-*] } {
2505 return [check_no_compiler_messages ptr32plus object
{
2506 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
2510 #
Return 1 if we support
32-bit or larger array and structure sizes
2511 # using default options
, 0 otherwise. Avoid false positive
on
2512 # targets with
20 or
24 bit address spaces.
2514 proc check_effective_target_size32plus
{ } {
2515 return [check_no_compiler_messages size32plus object
{
2516 char dummy
[16777217L];
2520 # Returns
1 if we
're generating 16-bit or smaller integers with the
2521 # default options, 0 otherwise.
2523 proc check_effective_target_int16 { } {
2524 return [check_no_compiler_messages int16 object {
2525 int dummy[sizeof (int) < 4 ? 1 : -1];
2529 # Return 1 if we're generating
64-bit code using default options
, 0
2532 proc check_effective_target_lp64
{ } {
2533 return [check_no_compiler_messages lp64 object
{
2534 int dummy
[sizeof
(int) == 4
2535 && sizeof
(void
*) == 8
2536 && sizeof
(long
) == 8 ?
1 : -1];
2540 #
Return 1 if we
're generating 64-bit code using default llp64 options,
2543 proc check_effective_target_llp64 { } {
2544 return [check_no_compiler_messages llp64 object {
2545 int dummy[sizeof (int) == 4
2546 && sizeof (void *) == 8
2547 && sizeof (long long) == 8
2548 && sizeof (long) == 4 ? 1 : -1];
2552 # Return 1 if long and int have different sizes,
2555 proc check_effective_target_long_neq_int { } {
2556 return [check_no_compiler_messages long_ne_int object {
2557 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2561 # Return 1 if the target supports long double larger than double,
2564 proc check_effective_target_large_long_double { } {
2565 return [check_no_compiler_messages large_long_double object {
2566 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2570 # Return 1 if the target supports double larger than float,
2573 proc check_effective_target_large_double { } {
2574 return [check_no_compiler_messages large_double object {
2575 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2579 # Return 1 if the target supports long double of 128 bits,
2582 proc check_effective_target_longdouble128 { } {
2583 return [check_no_compiler_messages longdouble128 object {
2584 int dummy[sizeof(long double) == 16 ? 1 : -1];
2588 # Return 1 if the target supports double of 64 bits,
2591 proc check_effective_target_double64 { } {
2592 return [check_no_compiler_messages double64 object {
2593 int dummy[sizeof(double) == 8 ? 1 : -1];
2597 # Return 1 if the target supports double of at least 64 bits,
2600 proc check_effective_target_double64plus { } {
2601 return [check_no_compiler_messages double64plus object {
2602 int dummy[sizeof(double) >= 8 ? 1 : -1];
2606 # Return 1 if the target supports 'w
' suffix on floating constant
2609 proc check_effective_target_has_w_floating_suffix { } {
2611 if [check_effective_target_c++] {
2612 append opts "-std=gnu++03"
2614 return [check_no_compiler_messages w_fp_suffix object {
2619 # Return 1 if the target supports 'q
' suffix on floating constant
2622 proc check_effective_target_has_q_floating_suffix { } {
2624 if [check_effective_target_c++] {
2625 append opts "-std=gnu++03"
2627 return [check_no_compiler_messages q_fp_suffix object {
2632 # Return 1 if the target supports the _FloatN / _FloatNx type
2633 # indicated in the function name, 0 otherwise.
2635 proc check_effective_target_float16 {} {
2636 return [check_no_compiler_messages_nocache float16 object {
2638 } [add_options_for_float16 ""]]
2641 proc check_effective_target_float32 {} {
2642 return [check_no_compiler_messages_nocache float32 object {
2644 } [add_options_for_float32 ""]]
2647 proc check_effective_target_float64 {} {
2648 return [check_no_compiler_messages_nocache float64 object {
2650 } [add_options_for_float64 ""]]
2653 proc check_effective_target_float128 {} {
2654 return [check_no_compiler_messages_nocache float128 object {
2656 } [add_options_for_float128 ""]]
2659 proc check_effective_target_float32x {} {
2660 return [check_no_compiler_messages_nocache float32x object {
2662 } [add_options_for_float32x ""]]
2665 proc check_effective_target_float64x {} {
2666 return [check_no_compiler_messages_nocache float64x object {
2668 } [add_options_for_float64x ""]]
2671 proc check_effective_target_float128x {} {
2672 return [check_no_compiler_messages_nocache float128x object {
2674 } [add_options_for_float128x ""]]
2677 # Likewise, but runtime support for any special options used as well
2678 # as compile-time support is required.
2680 proc check_effective_target_float16_runtime {} {
2681 return [check_effective_target_float16]
2684 proc check_effective_target_float32_runtime {} {
2685 return [check_effective_target_float32]
2688 proc check_effective_target_float64_runtime {} {
2689 return [check_effective_target_float64]
2692 proc check_effective_target_float128_runtime {} {
2693 if { ![check_effective_target_float128] } {
2696 if { [istarget powerpc*-*-*] } {
2697 return [check_effective_target_base_quadfloat_support]
2702 proc check_effective_target_float32x_runtime {} {
2703 return [check_effective_target_float32x]
2706 proc check_effective_target_float64x_runtime {} {
2707 if { ![check_effective_target_float64x] } {
2710 if { [istarget powerpc*-*-*] } {
2711 return [check_effective_target_base_quadfloat_support]
2716 proc check_effective_target_float128x_runtime {} {
2717 return [check_effective_target_float128x]
2720 # Return 1 if the target hardware supports any options added for
2721 # _FloatN and _FloatNx types, 0 otherwise.
2723 proc check_effective_target_floatn_nx_runtime {} {
2724 if { [istarget powerpc*-*-aix*] } {
2727 if { [istarget powerpc*-*-*] } {
2728 return [check_effective_target_base_quadfloat_support]
2733 # Add options needed to use the _FloatN / _FloatNx type indicated in
2734 # the function name.
2736 proc add_options_for_float16 { flags } {
2737 if { [istarget arm*-*-*] } {
2738 return "$flags -mfp16-format=ieee"
2743 proc add_options_for_float32 { flags } {
2747 proc add_options_for_float64 { flags } {
2751 proc add_options_for_float128 { flags } {
2752 return [add_options_for___float128 "$flags"]
2755 proc add_options_for_float32x { flags } {
2759 proc add_options_for_float64x { flags } {
2760 return [add_options_for___float128 "$flags"]
2763 proc add_options_for_float128x { flags } {
2767 # Return 1 if the target supports __float128,
2770 proc check_effective_target___float128 { } {
2771 if { [istarget powerpc*-*-*] } {
2772 return [check_ppc_float128_sw_available]
2774 if { [istarget ia64-*-*]
2775 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2781 proc add_options_for___float128 { flags } {
2782 if { [istarget powerpc*-*-*] } {
2783 return "$flags -mfloat128 -mvsx"
2788 # Return 1 if the target supports any special run-time requirements
2789 # for __float128 or _Float128,
2792 proc check_effective_target_base_quadfloat_support { } {
2793 if { [istarget powerpc*-*-*] } {
2794 return [check_vsx_hw_available]
2799 # Return 1 if the target supports compiling fixed-point,
2802 proc check_effective_target_fixed_point { } {
2803 return [check_no_compiler_messages fixed_point object {
2804 _Sat _Fract x; _Sat _Accum y;
2808 # Return 1 if the target supports compiling decimal floating point,
2811 proc check_effective_target_dfp_nocache { } {
2812 verbose "check_effective_target_dfp_nocache: compiling source" 2
2813 set ret [check_no_compiler_messages_nocache dfp object {
2814 float x __attribute__((mode(DD)));
2816 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2820 proc check_effective_target_dfprt_nocache { } {
2821 return [check_runtime_nocache dfprt {
2822 typedef float d64 __attribute__((mode(DD)));
2823 d64 x = 1.2df, y = 2.3dd, z;
2824 int main () { z = x + y; return 0; }
2828 # Return 1 if the target supports compiling Decimal Floating Point,
2831 # This won't change
for different subtargets so
cache the result.
2833 proc check_effective_target_dfp
{ } {
2834 return [check_cached_effective_target dfp
{
2835 check_effective_target_dfp_nocache
2839 #
Return 1 if the target supports linking and executing Decimal Floating
2840 # Point
, 0 otherwise.
2842 # This won
't change for different subtargets so cache the result.
2844 proc check_effective_target_dfprt { } {
2845 return [check_cached_effective_target dfprt {
2846 check_effective_target_dfprt_nocache
2850 proc check_effective_target_powerpc_popcntb_ok { } {
2851 return [check_cached_effective_target powerpc_popcntb_ok {
2853 # Disable on Darwin.
2854 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2857 check_runtime_nocache powerpc_popcntb_ok {
2859 volatile int a = 0x12345678;
2862 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2870 # Return 1 if the target supports executing DFP hardware instructions,
2871 # 0 otherwise. Cache the result.
2873 proc check_dfp_hw_available { } {
2874 return [check_cached_effective_target dfp_hw_available {
2875 # For now, disable on Darwin
2876 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2879 check_runtime_nocache dfp_hw_available {
2880 volatile _Decimal64 r;
2881 volatile _Decimal64 a = 4.0DD;
2882 volatile _Decimal64 b = 2.0DD;
2885 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2886 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2887 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2888 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2891 } "-mcpu=power6 -mhard-float"
2896 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2898 proc check_effective_target_ucn_nocache { } {
2899 # -std=c99 is only valid for C
2900 if [check_effective_target_c] {
2901 set ucnopts "-std=c99"
2905 verbose "check_effective_target_ucn_nocache: compiling source" 2
2906 set ret [check_no_compiler_messages_nocache ucn object {
2909 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2913 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2915 # This won't change
for different subtargets
, so
cache the result.
2917 proc check_effective_target_ucn
{ } {
2918 return [check_cached_effective_target ucn
{
2919 check_effective_target_ucn_nocache
2923 #
Return 1 if the target needs a command line
argument to enable a SIMD
2926 proc check_effective_target_vect_cmdline_needed
{ } {
2927 global et_vect_cmdline_needed_saved
2928 global et_vect_cmdline_needed_target_name
2930 if { ![info exists et_vect_cmdline_needed_target_name
] } {
2931 set et_vect_cmdline_needed_target_name
""
2934 #
If the target has changed since we
set the cached value
, clear it.
2935 set current_target
[current_target_name
]
2936 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
2937 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2938 set et_vect_cmdline_needed_target_name $current_target
2939 if { [info exists et_vect_cmdline_needed_saved
] } {
2940 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
2941 unset et_vect_cmdline_needed_saved
2945 if [info exists et_vect_cmdline_needed_saved
] {
2946 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
2948 set et_vect_cmdline_needed_saved
1
2949 if { [istarget alpha
*-*-*]
2950 ||
[istarget ia64
-*-*]
2951 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
2952 && ![is
-effective
-target ia32
])
2953 ||
([istarget powerpc
*-*-*]
2954 && ([check_effective_target_powerpc_spe
]
2955 ||
[check_effective_target_powerpc_altivec
]))
2956 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
2957 ||
[istarget spu
-*-*]
2958 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
2959 ||
[istarget aarch64
*-*-*] } {
2960 set et_vect_cmdline_needed_saved
0
2964 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2965 return $et_vect_cmdline_needed_saved
2968 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
2970 # This won
't change for different subtargets so cache the result.
2972 proc check_effective_target_vect_int { } {
2973 global et_vect_int_saved
2976 if [info exists et_vect_int_saved($et_index)] {
2977 verbose "check_effective_target_vect_int: using cached result" 2
2979 set et_vect_int_saved($et_index) 0
2980 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2981 || ([istarget powerpc*-*-*]
2982 && ![istarget powerpc-*-linux*paired*])
2983 || [istarget spu-*-*]
2984 || [istarget sparc*-*-*]
2985 || [istarget alpha*-*-*]
2986 || [istarget ia64-*-*]
2987 || [istarget aarch64*-*-*]
2988 || [is-effective-target arm_neon]
2989 || ([istarget mips*-*-*]
2990 && ([et-is-effective-target mips_loongson]
2991 || [et-is-effective-target mips_msa])) } {
2992 set et_vect_int_saved($et_index) 1
2996 verbose "check_effective_target_vect_int:\
2997 returning $et_vect_int_saved($et_index)" 2
2998 return $et_vect_int_saved($et_index)
3001 # Return 1 if the target supports signed int->float conversion
3004 proc check_effective_target_vect_intfloat_cvt { } {
3005 global et_vect_intfloat_cvt_saved
3008 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3009 verbose "check_effective_target_vect_intfloat_cvt:\
3010 using cached result" 2
3012 set et_vect_intfloat_cvt_saved($et_index) 0
3013 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3014 || ([istarget powerpc*-*-*]
3015 && ![istarget powerpc-*-linux*paired*])
3016 || [is-effective-target arm_neon]
3017 || ([istarget mips*-*-*]
3018 && [et-is-effective-target mips_msa]) } {
3019 set et_vect_intfloat_cvt_saved($et_index) 1
3023 verbose "check_effective_target_vect_intfloat_cvt:\
3024 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3025 return $et_vect_intfloat_cvt_saved($et_index)
3028 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
3030 proc check_effective_target_int128
{ } {
3031 return [check_no_compiler_messages int128 object
{
3033 #ifndef __SIZEOF_INT128__
3042 #
Return 1 if the target supports unsigned
int->float conversion
3045 proc check_effective_target_vect_uintfloat_cvt
{ } {
3046 global et_vect_uintfloat_cvt_saved
3049 if [info exists et_vect_uintfloat_cvt_saved
($et_index
)] {
3050 verbose
"check_effective_target_vect_uintfloat_cvt:\
3051 using cached result
" 2
3053 set et_vect_uintfloat_cvt_saved
($et_index
) 0
3054 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3055 ||
([istarget powerpc
*-*-*]
3056 && ![istarget powerpc
-*-linux
*paired
*])
3057 ||
[istarget aarch64
*-*-*]
3058 ||
[is
-effective
-target arm_neon
]
3059 ||
([istarget mips
*-*-*]
3060 && [et
-is
-effective
-target mips_msa
]) } {
3061 set et_vect_uintfloat_cvt_saved
($et_index
) 1
3065 verbose
"check_effective_target_vect_uintfloat_cvt:\
3066 returning $et_vect_uintfloat_cvt_saved
($et_index
)" 2
3067 return $et_vect_uintfloat_cvt_saved
($et_index
)
3071 #
Return 1 if the target supports signed float
->int conversion
3074 proc check_effective_target_vect_floatint_cvt
{ } {
3075 global et_vect_floatint_cvt_saved
3078 if [info exists et_vect_floatint_cvt_saved
($et_index
)] {
3079 verbose
"check_effective_target_vect_floatint_cvt:\
3080 using cached result
" 2
3082 set et_vect_floatint_cvt_saved
($et_index
) 0
3083 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3084 ||
([istarget powerpc
*-*-*]
3085 && ![istarget powerpc
-*-linux
*paired
*])
3086 ||
[is
-effective
-target arm_neon
]
3087 ||
([istarget mips
*-*-*]
3088 && [et
-is
-effective
-target mips_msa
]) } {
3089 set et_vect_floatint_cvt_saved
($et_index
) 1
3093 verbose
"check_effective_target_vect_floatint_cvt:\
3094 returning $et_vect_floatint_cvt_saved
($et_index
)" 2
3095 return $et_vect_floatint_cvt_saved
($et_index
)
3098 #
Return 1 if the target supports unsigned float
->int conversion
3101 proc check_effective_target_vect_floatuint_cvt
{ } {
3102 global et_vect_floatuint_cvt_saved
3105 if [info exists et_vect_floatuint_cvt_saved
($et_index
)] {
3106 verbose
"check_effective_target_vect_floatuint_cvt:\
3107 using cached result
" 2
3109 set et_vect_floatuint_cvt_saved
($et_index
) 0
3110 if { ([istarget powerpc
*-*-*]
3111 && ![istarget powerpc
-*-linux
*paired
*])
3112 ||
[is
-effective
-target arm_neon
]
3113 ||
([istarget mips
*-*-*]
3114 && [et
-is
-effective
-target mips_msa
]) } {
3115 set et_vect_floatuint_cvt_saved
($et_index
) 1
3119 verbose
"check_effective_target_vect_floatuint_cvt:\
3120 returning $et_vect_floatuint_cvt_saved
($et_index
)" 2
3121 return $et_vect_floatuint_cvt_saved
($et_index
)
3124 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
3126 # This won
't change for different subtargets so cache the result.
3128 proc check_effective_target_vect_simd_clones { } {
3129 global et_vect_simd_clones_saved
3132 if [info exists et_vect_simd_clones_saved($et_index)] {
3133 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3135 set et_vect_simd_clones_saved($et_index) 0
3136 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3137 # avx2 and avx512f clone. Only the right clone for the
3138 # specified arch will be chosen, but still we need to at least
3139 # be able to assemble avx512f.
3140 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3141 && [check_effective_target_avx512f]) } {
3142 set et_vect_simd_clones_saved($et_index) 1
3146 verbose "check_effective_target_vect_simd_clones:\
3147 returning $et_vect_simd_clones_saved($et_index)" 2
3148 return $et_vect_simd_clones_saved($et_index)
3151 # Return 1 if this is a AArch64 target supporting big endian
3152 proc check_effective_target_aarch64_big_endian { } {
3153 return [check_no_compiler_messages aarch64_big_endian assembly {
3154 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3155 #error !__aarch64__ || !__AARCH64EB__
3160 # Return 1 if this is a AArch64 target supporting little endian
3161 proc check_effective_target_aarch64_little_endian { } {
3162 if { ![istarget aarch64*-*-*] } {
3166 return [check_no_compiler_messages aarch64_little_endian assembly {
3167 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3173 # Return 1 if this is a compiler supporting ARC atomic operations
3174 proc check_effective_target_arc_atomic { } {
3175 return [check_no_compiler_messages arc_atomic assembly {
3176 #if !defined(__ARC_ATOMIC__)
3182 # Return 1 if this is an arm target using 32-bit instructions
3183 proc check_effective_target_arm32 { } {
3184 if { ![istarget arm*-*-*] } {
3188 return [check_no_compiler_messages arm32 assembly {
3189 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3190 #error !__arm || __thumb__ && !__thumb2__
3195 # Return 1 if this is an arm target not using Thumb
3196 proc check_effective_target_arm_nothumb { } {
3197 if { ![istarget arm*-*-*] } {
3201 return [check_no_compiler_messages arm_nothumb assembly {
3202 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3203 #error !__arm__ || __thumb || __thumb2__
3208 # Return 1 if this is a little-endian ARM target
3209 proc check_effective_target_arm_little_endian { } {
3210 if { ![istarget arm*-*-*] } {
3214 return [check_no_compiler_messages arm_little_endian assembly {
3215 #if !defined(__arm__) || !defined(__ARMEL__)
3216 #error !__arm__ || !__ARMEL__
3221 # Return 1 if this is an ARM target that only supports aligned vector accesses
3222 proc check_effective_target_arm_vect_no_misalign { } {
3223 if { ![istarget arm*-*-*] } {
3227 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3228 #if !defined(__arm__) \
3229 || (defined(__ARM_FEATURE_UNALIGNED) \
3230 && defined(__ARMEL__))
3231 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3237 # Return 1 if this is an ARM target supporting -mfpu=vfp
3238 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3241 proc check_effective_target_arm_vfp_ok { } {
3242 if { [check_effective_target_arm32] } {
3243 return [check_no_compiler_messages arm_vfp_ok object {
3245 } "-mfpu=vfp -mfloat-abi=softfp"]
3251 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3252 # -mfloat-abi=softfp.
3254 proc check_effective_target_arm_vfp3_ok { } {
3255 if { [check_effective_target_arm32] } {
3256 return [check_no_compiler_messages arm_vfp3_ok object {
3258 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3264 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3265 # -mfloat-abi=softfp.
3266 proc check_effective_target_arm_v8_vfp_ok {} {
3267 if { [check_effective_target_arm32] } {
3268 return [check_no_compiler_messages arm_v8_vfp_ok object {
3271 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3274 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3280 # Return 1 if this is an ARM target supporting -mfpu=vfp
3281 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3284 proc check_effective_target_arm_hard_vfp_ok { } {
3285 if { [check_effective_target_arm32]
3286 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3287 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3288 int main() { return 0;}
3289 } "-mfpu=vfp -mfloat-abi=hard"]
3295 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3296 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3297 # incompatible with these options. Also set et_arm_fp_flags to the
3298 # best options to add.
3300 proc check_effective_target_arm_fp_ok_nocache { } {
3301 global et_arm_fp_flags
3302 set et_arm_fp_flags ""
3303 if { [check_effective_target_arm32] } {
3304 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3305 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3307 #error __ARM_FP not defined
3310 set et_arm_fp_flags $flags
3319 proc check_effective_target_arm_fp_ok { } {
3320 return [check_cached_effective_target arm_fp_ok \
3321 check_effective_target_arm_fp_ok_nocache]
3324 # Add the options needed to define __ARM_FP. We need either
3325 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3326 # specified by the multilib, use it.
3328 proc add_options_for_arm_fp { flags } {
3329 if { ! [check_effective_target_arm_fp_ok] } {
3332 global et_arm_fp_flags
3333 return "$flags $et_arm_fp_flags"
3336 # Return 1 if this is an ARM target that supports DSP multiply with
3337 # current multilib flags.
3339 proc check_effective_target_arm_dsp { } {
3340 return [check_no_compiler_messages arm_dsp assembly {
3341 #ifndef __ARM_FEATURE_DSP
3348 # Return 1 if this is an ARM target that supports unaligned word/halfword
3349 # load/store instructions.
3351 proc check_effective_target_arm_unaligned { } {
3352 return [check_no_compiler_messages arm_unaligned assembly {
3353 #ifndef __ARM_FEATURE_UNALIGNED
3354 #error no unaligned support
3360 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3361 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3362 # incompatible with these options. Also set et_arm_crypto_flags to the
3363 # best options to add.
3365 proc check_effective_target_arm_crypto_ok_nocache { } {
3366 global et_arm_crypto_flags
3367 set et_arm_crypto_flags ""
3368 if { [check_effective_target_arm_v8_neon_ok] } {
3369 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3370 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3371 #include "arm_neon.h"
3373 foo (uint8x16_t a, uint8x16_t b)
3375 return vaeseq_u8 (a, b);
3378 set et_arm_crypto_flags $flags
3387 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3389 proc check_effective_target_arm_crypto_ok { } {
3390 return [check_cached_effective_target arm_crypto_ok \
3391 check_effective_target_arm_crypto_ok_nocache]
3394 # Add options for crypto extensions.
3395 proc add_options_for_arm_crypto { flags } {
3396 if { ! [check_effective_target_arm_crypto_ok] } {
3399 global et_arm_crypto_flags
3400 return "$flags $et_arm_crypto_flags"
3403 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3404 # or -mfloat-abi=hard, but if one is already specified by the
3405 # multilib, use it. Similarly, if a -mfpu option already enables
3406 # NEON, do not add -mfpu=neon.
3408 proc add_options_for_arm_neon { flags } {
3409 if { ! [check_effective_target_arm_neon_ok] } {
3412 global et_arm_neon_flags
3413 return "$flags $et_arm_neon_flags"
3416 proc add_options_for_arm_v8_vfp { flags } {
3417 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3420 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3423 proc add_options_for_arm_v8_neon { flags } {
3424 if { ! [check_effective_target_arm_v8_neon_ok] } {
3427 global et_arm_v8_neon_flags
3428 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3431 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3432 # options for AArch64 and for ARM.
3434 proc add_options_for_arm_v8_1a_neon { flags } {
3435 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3438 global et_arm_v8_1a_neon_flags
3439 return "$flags $et_arm_v8_1a_neon_flags"
3442 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3443 # Also adds the ARMv8 FP options for ARM and for AArch64.
3445 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3446 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3449 global et_arm_v8_2a_fp16_scalar_flags
3450 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3453 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3454 # the ARMv8 NEON options for ARM and for AArch64.
3456 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3457 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3460 global et_arm_v8_2a_fp16_neon_flags
3461 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3464 proc add_options_for_arm_crc { flags } {
3465 if { ! [check_effective_target_arm_crc_ok] } {
3468 global et_arm_crc_flags
3469 return "$flags $et_arm_crc_flags"
3472 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3473 # or -mfloat-abi=hard, but if one is already specified by the
3474 # multilib, use it. Similarly, if a -mfpu option already enables
3475 # NEON, do not add -mfpu=neon.
3477 proc add_options_for_arm_neonv2 { flags } {
3478 if { ! [check_effective_target_arm_neonv2_ok] } {
3481 global et_arm_neonv2_flags
3482 return "$flags $et_arm_neonv2_flags"
3485 # Add the options needed for vfp3.
3486 proc add_options_for_arm_vfp3 { flags } {
3487 if { ! [check_effective_target_arm_vfp3_ok] } {
3490 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3493 # Return 1 if this is an ARM target supporting -mfpu=neon
3494 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3495 # incompatible with these options. Also set et_arm_neon_flags to the
3496 # best options to add.
3498 proc check_effective_target_arm_neon_ok_nocache { } {
3499 global et_arm_neon_flags
3500 set et_arm_neon_flags ""
3501 if { [check_effective_target_arm32] } {
3502 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3503 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3504 #include <arm_neon.h>
3506 #ifndef __ARM_NEON__
3509 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3510 configured for -mcpu=arm926ej-s, for example. */
3511 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3512 #error Architecture does not support NEON.
3515 set et_arm_neon_flags $flags
3524 proc check_effective_target_arm_neon_ok { } {
3525 return [check_cached_effective_target arm_neon_ok \
3526 check_effective_target_arm_neon_ok_nocache]
3529 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3530 # -mfloat-abi= option. Useful in tests where add_options is not
3531 # supported (such as lto tests).
3533 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3534 if { [check_effective_target_arm32] } {
3535 foreach flags {"-mfpu=neon"} {
3536 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3537 #include <arm_neon.h>
3539 #ifndef __ARM_NEON__
3542 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3543 configured for -mcpu=arm926ej-s, for example. */
3544 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3545 #error Architecture does not support NEON.
3556 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3557 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3558 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3561 proc check_effective_target_arm_crc_ok_nocache { } {
3562 global et_arm_crc_flags
3563 set et_arm_crc_flags "-march=armv8-a+crc"
3564 return [check_no_compiler_messages_nocache arm_crc_ok object {
3565 #if !defined (__ARM_FEATURE_CRC32)
3568 } "$et_arm_crc_flags"]
3571 proc check_effective_target_arm_crc_ok { } {
3572 return [check_cached_effective_target arm_crc_ok \
3573 check_effective_target_arm_crc_ok_nocache]
3576 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3577 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3578 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3579 # the best options to add.
3581 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3582 global et_arm_neon_fp16_flags
3583 global et_arm_neon_flags
3584 set et_arm_neon_fp16_flags ""
3585 if { [check_effective_target_arm32]
3586 && [check_effective_target_arm_neon_ok] } {
3587 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3588 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3589 "-mfp16-format=ieee"
3590 "-mfloat-abi=softfp -mfp16-format=ieee"
3591 "-mfpu=neon-fp16 -mfp16-format=ieee"
3592 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3593 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3594 #include "arm_neon.h"
3596 foo (float32x4_t arg)
3598 return vcvt_f16_f32 (arg);
3600 } "$et_arm_neon_flags $flags"] } {
3601 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3610 proc check_effective_target_arm_neon_fp16_ok { } {
3611 return [check_cached_effective_target arm_neon_fp16_ok \
3612 check_effective_target_arm_neon_fp16_ok_nocache]
3615 proc check_effective_target_arm_neon_fp16_hw { } {
3616 if {! [check_effective_target_arm_neon_fp16_ok] } {
3619 global et_arm_neon_fp16_flags
3620 check_runtime_nocache arm_neon_fp16_hw {
3622 main (int argc, char **argv)
3624 asm ("vcvt.f32.f16 q1, d0");
3627 } $et_arm_neon_fp16_flags
3630 proc add_options_for_arm_neon_fp16 { flags } {
3631 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3634 global et_arm_neon_fp16_flags
3635 return "$flags $et_arm_neon_fp16_flags"
3638 # Return 1 if this is an ARM target supporting the FP16 alternative
3639 # format. Some multilibs may be incompatible with the options needed. Also
3640 # set et_arm_neon_fp16_flags to the best options to add.
3642 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3643 global et_arm_neon_fp16_flags
3644 set et_arm_neon_fp16_flags ""
3645 if { [check_effective_target_arm32] } {
3646 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3647 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3648 if { [check_no_compiler_messages_nocache \
3649 arm_fp16_alternative_ok object {
3650 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3651 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3653 } "$flags -mfp16-format=alternative"] } {
3654 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3663 proc check_effective_target_arm_fp16_alternative_ok { } {
3664 return [check_cached_effective_target arm_fp16_alternative_ok \
3665 check_effective_target_arm_fp16_alternative_ok_nocache]
3668 # Return 1 if this is an ARM target supports specifying the FP16 none
3669 # format. Some multilibs may be incompatible with the options needed.
3671 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3672 if { [check_effective_target_arm32] } {
3673 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3674 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3675 if { [check_no_compiler_messages_nocache \
3676 arm_fp16_none_ok object {
3677 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3678 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3680 #if defined (__ARM_FP16_FORMAT_IEEE)
3681 #error __ARM_FP16_FORMAT_IEEE defined
3683 } "$flags -mfp16-format=none"] } {
3692 proc check_effective_target_arm_fp16_none_ok { } {
3693 return [check_cached_effective_target arm_fp16_none_ok \
3694 check_effective_target_arm_fp16_none_ok_nocache]
3697 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3698 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3699 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3700 # best options to add.
3702 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3703 global et_arm_v8_neon_flags
3704 set et_arm_v8_neon_flags ""
3705 if { [check_effective_target_arm32] } {
3706 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3707 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3709 #error not armv8 or later
3711 #include "arm_neon.h"
3715 __asm__ volatile ("vrintn.f32 q0, q0");
3717 } "$flags -march=armv8-a"] } {
3718 set et_arm_v8_neon_flags $flags
3727 proc check_effective_target_arm_v8_neon_ok { } {
3728 return [check_cached_effective_target arm_v8_neon_ok \
3729 check_effective_target_arm_v8_neon_ok_nocache]
3732 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3733 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3734 # incompatible with these options. Also set et_arm_neonv2_flags to the
3735 # best options to add.
3737 proc check_effective_target_arm_neonv2_ok_nocache { } {
3738 global et_arm_neonv2_flags
3739 global et_arm_neon_flags
3740 set et_arm_neonv2_flags ""
3741 if { [check_effective_target_arm32]
3742 && [check_effective_target_arm_neon_ok] } {
3743 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3744 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3745 #include "arm_neon.h"
3747 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3749 return vfma_f32 (a, b, c);
3751 } "$et_arm_neon_flags $flags"] } {
3752 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3761 proc check_effective_target_arm_neonv2_ok { } {
3762 return [check_cached_effective_target arm_neonv2_ok \
3763 check_effective_target_arm_neonv2_ok_nocache]
3766 # Add the options needed for VFP FP16 support. We need either
3767 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3768 # the multilib, use it.
3770 proc add_options_for_arm_fp16 { flags } {
3771 if { ! [check_effective_target_arm_fp16_ok] } {
3774 global et_arm_fp16_flags
3775 return "$flags $et_arm_fp16_flags"
3778 # Add the options needed to enable support for IEEE format
3779 # half-precision support. This is valid for ARM targets.
3781 proc add_options_for_arm_fp16_ieee { flags } {
3782 if { ! [check_effective_target_arm_fp16_ok] } {
3785 global et_arm_fp16_flags
3786 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3789 # Add the options needed to enable support for ARM Alternative format
3790 # half-precision support. This is valid for ARM targets.
3792 proc add_options_for_arm_fp16_alternative { flags } {
3793 if { ! [check_effective_target_arm_fp16_ok] } {
3796 global et_arm_fp16_flags
3797 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3800 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3801 # Skip multilibs that are incompatible with these options and set
3802 # et_arm_fp16_flags to the best options to add. This test is valid for
3805 proc check_effective_target_arm_fp16_ok_nocache { } {
3806 global et_arm_fp16_flags
3807 set et_arm_fp16_flags ""
3808 if { ! [check_effective_target_arm32] } {
3812 [list "" { *-*-* } { "-mfpu=*" } \
3813 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3814 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3815 # Multilib flags would override -mfpu.
3818 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3819 # Must generate floating-point instructions.
3822 if [check_effective_target_arm_hf_eabi] {
3823 # Use existing float-abi and force an fpu which supports fp16
3824 set et_arm_fp16_flags "-mfpu=vfpv4"
3827 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3828 # The existing -mfpu value is OK; use it, but add softfp.
3829 set et_arm_fp16_flags "-mfloat-abi=softfp"
3832 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3833 # macro to check for this support.
3834 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3835 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3838 set et_arm_fp16_flags "$flags"
3845 proc check_effective_target_arm_fp16_ok { } {
3846 return [check_cached_effective_target arm_fp16_ok \
3847 check_effective_target_arm_fp16_ok_nocache]
3850 # Return 1 if the target supports executing VFP FP16 instructions, 0
3851 # otherwise. This test is valid for ARM only.
3853 proc check_effective_target_arm_fp16_hw { } {
3854 if {! [check_effective_target_arm_fp16_ok] } {
3857 global et_arm_fp16_flags
3858 check_runtime_nocache arm_fp16_hw {
3860 main (int argc, char **argv)
3864 asm ("vcvtb.f32.f16 %0, %1"
3865 : "=w" (r) : "w" (a)
3866 : /* No clobbers. */);
3867 return (r == 1.0) ? 0 : 1;
3869 } "$et_arm_fp16_flags -mfp16-format=ieee"
3872 # Creates a series of routines that return 1 if the given architecture
3873 # can be selected and a routine to give the flags to select that architecture
3874 # Note: Extra flags may be added to disable options from newer compilers
3875 # (Thumb in particular - but others may be added in the future).
3876 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
3877 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
3878 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
3879 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3880 # /* { dg-add-options arm_arch_v5 } */
3881 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3882 foreach { armfunc armflag armdefs } {
3883 v4 "-march=armv4 -marm" __ARM_ARCH_4__
3884 v4t "-march=armv4t" __ARM_ARCH_4T__
3885 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3886 v5t "-march=armv5t" __ARM_ARCH_5T__
3887 v5te "-march=armv5te" __ARM_ARCH_5TE__
3888 v6 "-march=armv6" __ARM_ARCH_6__
3889 v6k "-march=armv6k" __ARM_ARCH_6K__
3890 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3891 v6z "-march=armv6z" __ARM_ARCH_6Z__
3892 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
3893 v7a "-march=armv7-a" __ARM_ARCH_7A__
3894 v7r "-march=armv7-r" __ARM_ARCH_7R__
3895 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3896 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3897 v7ve "-march=armv7ve -marm"
3898 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
3899 v8a "-march=armv8-a" __ARM_ARCH_8A__
3900 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
3901 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
3902 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
3903 __ARM_ARCH_8M_BASE__
3904 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
3905 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
3906 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
3907 proc check_effective_target_arm_arch_FUNC_ok { } {
3908 if { [ string match "*-marm*" "FLAG" ] &&
3909 ![check_effective_target_arm_arm_ok] } {
3912 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3919 proc add_options_for_arm_arch_FUNC { flags } {
3920 return "$flags FLAG"
3923 proc check_effective_target_arm_arch_FUNC_multilib { } {
3924 return [check_runtime arm_arch_FUNC_multilib {
3930 } [add_options_for_arm_arch_FUNC ""]]
3935 # Return 1 if GCC was configured with --with-mode=
3936 proc check_effective_target_default_mode { } {
3938 return [check_configured_with "with-mode="]
3941 # Return 1 if this is an ARM target where -marm causes ARM to be
3944 proc check_effective_target_arm_arm_ok { } {
3945 return [check_no_compiler_messages arm_arm_ok assembly {
3946 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3947 #error !__arm__ || __thumb__ || __thumb2__
3953 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3956 proc check_effective_target_arm_thumb1_ok { } {
3957 return [check_no_compiler_messages arm_thumb1_ok assembly {
3958 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3959 #error !__arm__ || !__thumb__ || __thumb2__
3961 int foo (int i) { return i; }
3965 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3968 proc check_effective_target_arm_thumb2_ok { } {
3969 return [check_no_compiler_messages arm_thumb2_ok assembly {
3970 #if !defined(__thumb2__)
3973 int foo (int i) { return i; }
3977 # Return 1 if this is an ARM target where Thumb-1 is used without options
3978 # added by the test.
3980 proc check_effective_target_arm_thumb1 { } {
3981 return [check_no_compiler_messages arm_thumb1 assembly {
3982 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3983 #error !__arm__ || !__thumb__ || __thumb2__
3989 # Return 1 if this is an ARM target where Thumb-2 is used without options
3990 # added by the test.
3992 proc check_effective_target_arm_thumb2 { } {
3993 return [check_no_compiler_messages arm_thumb2 assembly {
3994 #if !defined(__thumb2__)
4001 # Return 1 if this is an ARM target where conditional execution is available.
4003 proc check_effective_target_arm_cond_exec { } {
4004 return [check_no_compiler_messages arm_cond_exec assembly {
4005 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4012 # Return 1 if this is an ARM cortex-M profile cpu
4014 proc check_effective_target_arm_cortex_m { } {
4015 if { ![istarget arm*-*-*] } {
4018 return [check_no_compiler_messages arm_cortex_m assembly {
4019 #if defined(__ARM_ARCH_ISA_ARM)
4020 #error __ARM_ARCH_ISA_ARM is defined
4026 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4027 # used and MOVT/MOVW instructions to be available.
4029 proc check_effective_target_arm_thumb1_movt_ok {} {
4030 if [check_effective_target_arm_thumb1_ok] {
4031 return [check_no_compiler_messages arm_movt object {
4035 asm ("movt r0, #42");
4043 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4044 # used and CBZ and CBNZ instructions are available.
4046 proc check_effective_target_arm_thumb1_cbz_ok {} {
4047 if [check_effective_target_arm_thumb1_ok] {
4048 return [check_no_compiler_messages arm_movt object {
4052 asm ("cbz r0, 2f\n2:");
4060 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4063 proc check_effective_target_arm_cmse_ok {} {
4064 return [check_no_compiler_messages arm_cmse object {
4073 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4075 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4076 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4077 int foo (void) { return 0; }
4078 } "-O2 -mprint-tune-info" ]
4081 # Return 1 if the target supports executing NEON instructions, 0
4082 # otherwise. Cache the result.
4084 proc check_effective_target_arm_neon_hw { } {
4085 return [check_runtime arm_neon_hw_available {
4089 long long a = 0, b = 1;
4090 asm ("vorr %P0, %P1, %P2"
4092 : "0" (a), "w" (b));
4095 } [add_options_for_arm_neon ""]]
4098 proc check_effective_target_arm_neonv2_hw { } {
4099 return [check_runtime arm_neon_hwv2_available {
4100 #include "arm_neon.h"
4104 float32x2_t a, b, c;
4105 asm ("vfma.f32 %P0, %P1, %P2"
4107 : "w" (b), "w" (c));
4110 } [add_options_for_arm_neonv2 ""]]
4113 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4114 # otherwise. The test is valid for AArch64 and ARM. Record the command
4115 # line options needed.
4117 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4118 global et_arm_v8_1a_neon_flags
4119 set et_arm_v8_1a_neon_flags ""
4121 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4125 # Iterate through sets of options to find the compiler flags that
4126 # need to be added to the -march option. Start with the empty set
4127 # since AArch64 only needs the -march setting.
4128 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4129 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4130 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4131 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4132 #if !defined (__ARM_FEATURE_QRDMX)
4133 #error "__ARM_FEATURE_QRDMX not defined"
4135 } "$flags $arches"] } {
4136 set et_arm_v8_1a_neon_flags "$flags $arches"
4145 proc check_effective_target_arm_v8_1a_neon_ok { } {
4146 return [check_cached_effective_target arm_v8_1a_neon_ok \
4147 check_effective_target_arm_v8_1a_neon_ok_nocache]
4150 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4151 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4152 # Record the command line options needed.
4154 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4155 global et_arm_v8_2a_fp16_scalar_flags
4156 set et_arm_v8_2a_fp16_scalar_flags ""
4158 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4162 # Iterate through sets of options to find the compiler flags that
4163 # need to be added to the -march option.
4164 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4165 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4166 if { [check_no_compiler_messages_nocache \
4167 arm_v8_2a_fp16_scalar_ok object {
4168 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4169 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4171 } "$flags -march=armv8.2-a+fp16"] } {
4172 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4180 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4181 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4182 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4185 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4186 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4187 # Record the command line options needed.
4189 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4190 global et_arm_v8_2a_fp16_neon_flags
4191 set et_arm_v8_2a_fp16_neon_flags ""
4193 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4197 # Iterate through sets of options to find the compiler flags that
4198 # need to be added to the -march option.
4199 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4200 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4201 if { [check_no_compiler_messages_nocache \
4202 arm_v8_2a_fp16_neon_ok object {
4203 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4204 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4206 } "$flags -march=armv8.2-a+fp16"] } {
4207 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4215 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4216 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4217 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4220 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4223 proc check_effective_target_arm_v8_neon_hw { } {
4224 return [check_runtime arm_v8_neon_hw_available {
4225 #include "arm_neon.h"
4229 float32x2_t a = { 1.0f, 2.0f };
4230 #ifdef __ARM_ARCH_ISA_A64
4231 asm ("frinta %0.2s, %1.2s"
4235 asm ("vrinta.f32 %P0, %P1"
4239 return a[0] == 2.0f;
4241 } [add_options_for_arm_v8_neon ""]]
4244 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4245 # otherwise. The test is valid for AArch64 and ARM.
4247 proc check_effective_target_arm_v8_1a_neon_hw { } {
4248 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4251 return [check_runtime arm_v8_1a_neon_hw_available {
4255 #ifdef __ARM_ARCH_ISA_A64
4256 __Int32x2_t a = {0, 1};
4257 __Int32x2_t b = {0, 2};
4260 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4263 : /* No clobbers. */);
4267 __simd64_int32_t a = {0, 1};
4268 __simd64_int32_t b = {0, 2};
4269 __simd64_int32_t result;
4271 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4274 : /* No clobbers. */);
4279 } [add_options_for_arm_v8_1a_neon ""]]
4282 # Return 1 if the target supports executing floating point instructions from
4283 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4286 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4287 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4290 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4297 #ifdef __ARM_ARCH_ISA_A64
4299 asm ("fabs %h0, %h1"
4302 : /* No clobbers. */);
4306 asm ("vabs.f16 %0, %1"
4309 : /* No clobbers. */);
4313 return (result == 1.0) ? 0 : 1;
4315 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4318 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4319 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4322 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4323 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4326 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4330 #ifdef __ARM_ARCH_ISA_A64
4332 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4333 __Float16x4_t result;
4335 asm ("fabs %0.4h, %1.4h"
4338 : /* No clobbers. */);
4342 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4343 __simd64_float16_t result;
4345 asm ("vabs.f16 %P0, %P1"
4348 : /* No clobbers. */);
4352 return (result[0] == 1.0) ? 0 : 1;
4354 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4357 # Return 1 if this is a ARM target with NEON enabled.
4359 proc check_effective_target_arm_neon { } {
4360 if { [check_effective_target_arm32] } {
4361 return [check_no_compiler_messages arm_neon object {
4362 #ifndef __ARM_NEON__
4373 proc check_effective_target_arm_neonv2 { } {
4374 if { [check_effective_target_arm32] } {
4375 return [check_no_compiler_messages arm_neon object {
4376 #ifndef __ARM_NEON__
4379 #ifndef __ARM_FEATURE_FMA
4391 # Return 1 if this is an ARM target with load acquire and store release
4392 # instructions for 8-, 16- and 32-bit types.
4394 proc check_effective_target_arm_acq_rel { } {
4395 return [check_no_compiler_messages arm_acq_rel object {
4397 load_acquire_store_release (void)
4399 asm ("lda r0, [r1]\n\t"
4405 : : : "r0", "memory");
4410 # Add the options needed for MIPS Paired-Single.
4412 proc add_options_for_mpaired_single { flags } {
4413 if { ! [check_effective_target_mpaired_single] } {
4416 return "$flags -mpaired-single"
4419 # Add the options needed for MIPS SIMD Architecture.
4421 proc add_options_for_mips_msa { flags } {
4422 if { ! [check_effective_target_mips_msa] } {
4425 return "$flags -mmsa"
4428 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4429 # the Loongson vector modes.
4431 proc check_effective_target_mips_loongson { } {
4432 return [check_no_compiler_messages loongson assembly {
4433 #if !defined(__mips_loongson_vector_rev)
4434 #error !__mips_loongson_vector_rev
4439 # Return 1 if this is a MIPS target that supports the legacy NAN.
4441 proc check_effective_target_mips_nanlegacy { } {
4442 return [check_no_compiler_messages nanlegacy assembly {
4444 int main () { return 0; }
4448 # Return 1 if an MSA program can be compiled to object
4450 proc check_effective_target_mips_msa { } {
4451 if ![check_effective_target_nomips16] {
4454 return [check_no_compiler_messages msa object {
4455 #if !defined(__mips_msa)
4456 #error "MSA NOT AVAIL"
4458 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4459 #error "MSA NOT AVAIL FOR ISA REV < 2"
4461 #if !defined(__mips_hard_float)
4462 #error "MSA HARD_FLOAT REQUIRED"
4464 #if __mips_fpr != 64
4465 #error "MSA 64-bit FPR REQUIRED"
4471 v8i16 v = __builtin_msa_ldi_h (1);
4479 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4482 proc check_effective_target_arm_eabi { } {
4483 return [check_no_compiler_messages arm_eabi object {
4484 #ifndef __ARM_EABI__
4492 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4493 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4495 proc check_effective_target_arm_hf_eabi { } {
4496 return [check_no_compiler_messages arm_hf_eabi object {
4497 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4498 #error not hard-float EABI
4505 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4506 # Some multilibs may be incompatible with this option.
4508 proc check_effective_target_arm_iwmmxt_ok { } {
4509 if { [check_effective_target_arm32] } {
4510 return [check_no_compiler_messages arm_iwmmxt_ok object {
4518 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4519 # for an ARM target.
4520 proc check_effective_target_arm_prefer_ldrd_strd { } {
4521 if { ![check_effective_target_arm32] } {
4525 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4526 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4530 # Return 1 if this is a PowerPC target supporting -meabi.
4532 proc check_effective_target_powerpc_eabi_ok { } {
4533 if { [istarget powerpc*-*-*] } {
4534 return [check_no_compiler_messages powerpc_eabi_ok object {
4542 # Return 1 if this is a PowerPC target with floating-point registers.
4544 proc check_effective_target_powerpc_fprs { } {
4545 if { [istarget powerpc*-*-*]
4546 || [istarget rs6000-*-*] } {
4547 return [check_no_compiler_messages powerpc_fprs object {
4559 # Return 1 if this is a PowerPC target with hardware double-precision
4562 proc check_effective_target_powerpc_hard_double { } {
4563 if { [istarget powerpc*-*-*]
4564 || [istarget rs6000-*-*] } {
4565 return [check_no_compiler_messages powerpc_hard_double object {
4577 # Return 1 if this is a PowerPC target supporting -maltivec.
4579 proc check_effective_target_powerpc_altivec_ok { } {
4580 if { ([istarget powerpc*-*-*]
4581 && ![istarget powerpc-*-linux*paired*])
4582 || [istarget rs6000-*-*] } {
4583 # AltiVec is not supported on AIX before 5.3.
4584 if { [istarget powerpc*-*-aix4*]
4585 || [istarget powerpc*-*-aix5.1*]
4586 || [istarget powerpc*-*-aix5.2*] } {
4589 return [check_no_compiler_messages powerpc_altivec_ok object {
4597 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4599 proc check_effective_target_powerpc_p8vector_ok { } {
4600 if { ([istarget powerpc*-*-*]
4601 && ![istarget powerpc-*-linux*paired*])
4602 || [istarget rs6000-*-*] } {
4603 # AltiVec is not supported on AIX before 5.3.
4604 if { [istarget powerpc*-*-aix4*]
4605 || [istarget powerpc*-*-aix5.1*]
4606 || [istarget powerpc*-*-aix5.2*] } {
4609 return [check_no_compiler_messages powerpc_p8vector_ok object {
4612 asm volatile ("xxlorc vs0,vs0,vs0");
4614 asm volatile ("xxlorc 0,0,0");
4618 } "-mpower8-vector"]
4624 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4626 proc check_effective_target_powerpc_p9vector_ok { } {
4627 if { ([istarget powerpc*-*-*]
4628 && ![istarget powerpc-*-linux*paired*])
4629 || [istarget rs6000-*-*] } {
4630 # AltiVec is not supported on AIX before 5.3.
4631 if { [istarget powerpc*-*-aix4*]
4632 || [istarget powerpc*-*-aix5.1*]
4633 || [istarget powerpc*-*-aix5.2*] } {
4636 return [check_no_compiler_messages powerpc_p9vector_ok object {
4639 vector double v = (vector double) { 0.0, 0.0 };
4640 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4643 } "-mpower9-vector"]
4649 # Return 1 if this is a PowerPC target supporting -mmodulo
4651 proc check_effective_target_powerpc_p9modulo_ok { } {
4652 if { ([istarget powerpc*-*-*]
4653 && ![istarget powerpc-*-linux*paired*])
4654 || [istarget rs6000-*-*] } {
4655 # AltiVec is not supported on AIX before 5.3.
4656 if { [istarget powerpc*-*-aix4*]
4657 || [istarget powerpc*-*-aix5.1*]
4658 || [istarget powerpc*-*-aix5.2*] } {
4661 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4663 int i = 5, j = 3, r = -1;
4664 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4673 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4674 # software emulation on power7/power8 systems or hardware support on power9.
4676 proc check_effective_target_powerpc_float128_sw_ok { } {
4677 if { ([istarget powerpc*-*-*]
4678 && ![istarget powerpc-*-linux*paired*])
4679 || [istarget rs6000-*-*] } {
4680 # AltiVec is not supported on AIX before 5.3.
4681 if { [istarget powerpc*-*-aix4*]
4682 || [istarget powerpc*-*-aix5.1*]
4683 || [istarget powerpc*-*-aix5.2*] } {
4686 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4687 volatile __float128 x = 1.0q;
4688 volatile __float128 y = 2.0q;
4690 __float128 z = x + y;
4693 } "-mfloat128 -mvsx"]
4699 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4700 # support on power9.
4702 proc check_effective_target_powerpc_float128_hw_ok { } {
4703 if { ([istarget powerpc*-*-*]
4704 && ![istarget powerpc-*-linux*paired*])
4705 || [istarget rs6000-*-*] } {
4706 # AltiVec is not supported on AIX before 5.3.
4707 if { [istarget powerpc*-*-aix4*]
4708 || [istarget powerpc*-*-aix5.1*]
4709 || [istarget powerpc*-*-aix5.2*] } {
4712 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4713 volatile __float128 x = 1.0q;
4714 volatile __float128 y = 2.0q;
4717 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4720 } "-mfloat128-hardware"]
4726 # Return 1 if this is a PowerPC target supporting -mvsx
4728 proc check_effective_target_powerpc_vsx_ok { } {
4729 if { ([istarget powerpc*-*-*]
4730 && ![istarget powerpc-*-linux*paired*])
4731 || [istarget rs6000-*-*] } {
4732 # VSX is not supported on AIX before 7.1.
4733 if { [istarget powerpc*-*-aix4*]
4734 || [istarget powerpc*-*-aix5*]
4735 || [istarget powerpc*-*-aix6*] } {
4738 return [check_no_compiler_messages powerpc_vsx_ok object {
4741 asm volatile ("xxlor vs0,vs0,vs0");
4743 asm volatile ("xxlor 0,0,0");
4753 # Return 1 if this is a PowerPC target supporting -mhtm
4755 proc check_effective_target_powerpc_htm_ok { } {
4756 if { ([istarget powerpc*-*-*]
4757 && ![istarget powerpc-*-linux*paired*])
4758 || [istarget rs6000-*-*] } {
4759 # HTM is not supported on AIX yet.
4760 if { [istarget powerpc*-*-aix*] } {
4763 return [check_no_compiler_messages powerpc_htm_ok object {
4765 asm volatile ("tbegin. 0");
4774 # Return 1 if the target supports executing HTM hardware instructions,
4775 # 0 otherwise. Cache the result.
4777 proc check_htm_hw_available { } {
4778 return [check_cached_effective_target htm_hw_available {
4779 # For now, disable on Darwin
4780 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4783 check_runtime_nocache htm_hw_available {
4793 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4795 proc check_effective_target_powerpc_ppu_ok { } {
4796 if [check_effective_target_powerpc_altivec_ok] {
4797 return [check_no_compiler_messages cell_asm_available object {
4800 asm volatile ("lvlx v0,v0,v0");
4802 asm volatile ("lvlx 0,0,0");
4812 # Return 1 if this is a PowerPC target that supports SPU.
4814 proc check_effective_target_powerpc_spu { } {
4815 if { [istarget powerpc*-*-linux*] } {
4816 return [check_effective_target_powerpc_altivec_ok]
4822 # Return 1 if this is a PowerPC SPE target. The check includes options
4823 # specified by dg-options for this test, so don't
cache the result.
4825 proc check_effective_target_powerpc_spe_nocache
{ } {
4826 if { [istarget powerpc
*-*-*] } {
4827 return [check_no_compiler_messages_nocache powerpc_spe object
{
4833 } [current_compiler_flags
]]
4839 #
Return 1 if this is a PowerPC target with SPE enabled.
4841 proc check_effective_target_powerpc_spe
{ } {
4842 if { [istarget powerpc
*-*-*] } {
4843 return [check_no_compiler_messages powerpc_spe object
{
4855 #
Return 1 if this is a PowerPC target with Altivec enabled.
4857 proc check_effective_target_powerpc_altivec
{ } {
4858 if { [istarget powerpc
*-*-*] } {
4859 return [check_no_compiler_messages powerpc_altivec object
{
4871 #
Return 1 if this is a PowerPC
405 target. The check includes options
4872 # specified by dg
-options
for this test
, so don
't cache the result.
4874 proc check_effective_target_powerpc_405_nocache { } {
4875 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4876 return [check_no_compiler_messages_nocache powerpc_405 object {
4882 } [current_compiler_flags]]
4888 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4890 proc check_effective_target_powerpc_elfv2 { } {
4891 if { [istarget powerpc*-*-*] } {
4892 return [check_no_compiler_messages powerpc_elfv2 object {
4894 #error not ELF v2 ABI
4904 # Return 1 if this is a SPU target with a toolchain that
4905 # supports automatic overlay generation.
4907 proc check_effective_target_spu_auto_overlay { } {
4908 if { [istarget spu*-*-elf*] } {
4909 return [check_no_compiler_messages spu_auto_overlay executable {
4911 } "-Wl,--auto-overlay" ]
4917 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4918 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4919 # test environment appears to run executables on such a simulator.
4921 proc check_effective_target_ultrasparc_hw { } {
4922 return [check_runtime ultrasparc_hw {
4923 int main() { return 0; }
4924 } "-mcpu=ultrasparc"]
4927 # Return 1 if the test environment supports executing UltraSPARC VIS2
4928 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
4930 proc check_effective_target_ultrasparc_vis2_hw { } {
4931 return [check_runtime ultrasparc_vis2_hw {
4932 int main() { __asm__(".word 0x81b00320"); return 0; }
4933 } "-mcpu=ultrasparc3"]
4936 # Return 1 if the test environment supports executing UltraSPARC VIS3
4937 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
4939 proc check_effective_target_ultrasparc_vis3_hw { } {
4940 return [check_runtime ultrasparc_vis3_hw {
4941 int main() { __asm__(".word 0x81b00220"); return 0; }
4945 # Return 1 if this is a SPARC-V9 target.
4947 proc check_effective_target_sparc_v9 { } {
4948 if { [istarget sparc*-*-*] } {
4949 return [check_no_compiler_messages sparc_v9 object {
4951 asm volatile ("return %i7+8");
4960 # Return 1 if this is a SPARC target with VIS enabled.
4962 proc check_effective_target_sparc_vis { } {
4963 if { [istarget sparc*-*-*] } {
4964 return [check_no_compiler_messages sparc_vis object {
4976 # Return 1 if the target supports hardware vector shift operation.
4978 proc check_effective_target_vect_shift { } {
4979 global et_vect_shift_saved
4982 if [info exists et_vect_shift_saved($et_index)] {
4983 verbose "check_effective_target_vect_shift: using cached result" 2
4985 set et_vect_shift_saved($et_index) 0
4986 if { ([istarget powerpc*-*-*]
4987 && ![istarget powerpc-*-linux*paired*])
4988 || [istarget ia64-*-*]
4989 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4990 || [istarget aarch64*-*-*]
4991 || [is-effective-target arm_neon]
4992 || ([istarget mips*-*-*]
4993 && ([et-is-effective-target mips_msa]
4994 || [et-is-effective-target mips_loongson])) } {
4995 set et_vect_shift_saved($et_index) 1
4999 verbose "check_effective_target_vect_shift:\
5000 returning $et_vect_shift_saved($et_index)" 2
5001 return $et_vect_shift_saved($et_index)
5004 proc check_effective_target_whole_vector_shift { } {
5005 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5006 || [istarget ia64-*-*]
5007 || [istarget aarch64*-*-*]
5008 || [istarget powerpc64*-*-*]
5009 || ([is-effective-target arm_neon]
5010 && [check_effective_target_arm_little_endian])
5011 || ([istarget mips*-*-*]
5012 && [et-is-effective-target mips_loongson]) } {
5018 verbose "check_effective_target_vect_long: returning $answer" 2
5022 # Return 1 if the target supports vector bswap operations.
5024 proc check_effective_target_vect_bswap { } {
5025 global et_vect_bswap_saved
5028 if [info exists et_vect_bswap_saved($et_index)] {
5029 verbose "check_effective_target_vect_bswap: using cached result" 2
5031 set et_vect_bswap_saved($et_index) 0
5032 if { [istarget aarch64*-*-*]
5033 || [is-effective-target arm_neon]
5035 set et_vect_bswap_saved($et_index) 1
5039 verbose "check_effective_target_vect_bswap:\
5040 returning $et_vect_bswap_saved($et_index)" 2
5041 return $et_vect_bswap_saved($et_index)
5044 # Return 1 if the target supports hardware vector shift operation for char.
5046 proc check_effective_target_vect_shift_char { } {
5047 global et_vect_shift_char_saved
5050 if [info exists et_vect_shift_char_saved($et_index)] {
5051 verbose "check_effective_target_vect_shift_char: using cached result" 2
5053 set et_vect_shift_char_saved($et_index) 0
5054 if { ([istarget powerpc*-*-*]
5055 && ![istarget powerpc-*-linux*paired*])
5056 || [is-effective-target arm_neon]
5057 || ([istarget mips*-*-*]
5058 && [et-is-effective-target mips_msa]) } {
5059 set et_vect_shift_char_saved($et_index) 1
5063 verbose "check_effective_target_vect_shift_char:\
5064 returning $et_vect_shift_char_saved($et_index)" 2
5065 return $et_vect_shift_char_saved($et_index)
5068 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5070 # This can change for different subtargets so do not cache the result.
5072 proc check_effective_target_vect_long { } {
5073 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5074 || (([istarget powerpc*-*-*]
5075 && ![istarget powerpc-*-linux*paired*])
5076 && [check_effective_target_ilp32])
5077 || [is-effective-target arm_neon]
5078 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5079 || [istarget aarch64*-*-*]
5080 || ([istarget mips*-*-*]
5081 && [et-is-effective-target mips_msa]) } {
5087 verbose "check_effective_target_vect_long: returning $answer" 2
5091 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5093 # This won't change
for different subtargets so
cache the result.
5095 proc check_effective_target_vect_float
{ } {
5096 global et_vect_float_saved
5099 if [info exists et_vect_float_saved
($et_index
)] {
5100 verbose
"check_effective_target_vect_float: using cached result" 2
5102 set et_vect_float_saved
($et_index
) 0
5103 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5104 ||
[istarget powerpc
*-*-*]
5105 ||
[istarget spu
-*-*]
5106 ||
[istarget mips
-sde
-elf
]
5107 ||
[istarget mipsisa64
*-*-*]
5108 ||
[istarget ia64
-*-*]
5109 ||
[istarget aarch64
*-*-*]
5110 ||
([istarget mips
*-*-*]
5111 && [et
-is
-effective
-target mips_msa
])
5112 ||
[is
-effective
-target arm_neon
] } {
5113 set et_vect_float_saved
($et_index
) 1
5117 verbose
"check_effective_target_vect_float:\
5118 returning $et_vect_float_saved
($et_index
)" 2
5119 return $et_vect_float_saved
($et_index
)
5122 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
5124 # This won
't change for different subtargets so cache the result.
5126 proc check_effective_target_vect_double { } {
5127 global et_vect_double_saved
5130 if [info exists et_vect_double_saved($et_index)] {
5131 verbose "check_effective_target_vect_double: using cached result" 2
5133 set et_vect_double_saved($et_index) 0
5134 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5135 && [check_no_compiler_messages vect_double assembly {
5136 #ifdef __tune_atom__
5137 # error No double vectorizer support.
5140 || [istarget aarch64*-*-*]
5141 || [istarget spu-*-*]
5142 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5143 || ([istarget mips*-*-*]
5144 && [et-is-effective-target mips_msa]) } {
5145 set et_vect_double_saved($et_index) 1
5149 verbose "check_effective_target_vect_double:\
5150 returning $et_vect_double_saved($et_index)" 2
5151 return $et_vect_double_saved($et_index)
5154 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5156 # This won't change
for different subtargets so
cache the result.
5158 proc check_effective_target_vect_long_long
{ } {
5159 global et_vect_long_long_saved
5162 if [info exists et_vect_long_long_saved
($et_index
)] {
5163 verbose
"check_effective_target_vect_long_long: using cached result" 2
5165 set et_vect_long_long_saved
($et_index
) 0
5166 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5167 ||
([istarget mips
*-*-*]
5168 && [et
-is
-effective
-target mips_msa
]) } {
5169 set et_vect_long_long_saved
($et_index
) 1
5173 verbose
"check_effective_target_vect_long_long:\
5174 returning $et_vect_long_long_saved
($et_index
)" 2
5175 return $et_vect_long_long_saved
($et_index
)
5179 #
Return 1 if the target plus current options does not support a vector
5180 #
max instruction
on "int", 0 otherwise.
5182 # This won
't change for different subtargets so cache the result.
5184 proc check_effective_target_vect_no_int_min_max { } {
5185 global et_vect_no_int_min_max_saved
5188 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5189 verbose "check_effective_target_vect_no_int_min_max:\
5190 using cached result" 2
5192 set et_vect_no_int_min_max_saved($et_index) 0
5193 if { [istarget sparc*-*-*]
5194 || [istarget spu-*-*]
5195 || [istarget alpha*-*-*]
5196 || ([istarget mips*-*-*]
5197 && [et-is-effective-target mips_loongson]) } {
5198 set et_vect_no_int_min_max_saved($et_index) 1
5201 verbose "check_effective_target_vect_no_int_min_max:\
5202 returning $et_vect_no_int_min_max_saved($et_index)" 2
5203 return $et_vect_no_int_min_max_saved($et_index)
5206 # Return 1 if the target plus current options does not support a vector
5207 # add instruction on "int", 0 otherwise.
5209 # This won't change
for different subtargets so
cache the result.
5211 proc check_effective_target_vect_no_int_add
{ } {
5212 global et_vect_no_int_add_saved
5215 if [info exists et_vect_no_int_add_saved
($et_index
)] {
5216 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
5218 set et_vect_no_int_add_saved
($et_index
) 0
5219 # Alpha only supports vector add
on V8QI and V4HI.
5220 if { [istarget alpha
*-*-*] } {
5221 set et_vect_no_int_add_saved
($et_index
) 1
5224 verbose
"check_effective_target_vect_no_int_add:\
5225 returning $et_vect_no_int_add_saved
($et_index
)" 2
5226 return $et_vect_no_int_add_saved
($et_index
)
5229 #
Return 1 if the target plus current options does not support vector
5230 # bitwise instructions
, 0 otherwise.
5232 # This won
't change for different subtargets so cache the result.
5234 proc check_effective_target_vect_no_bitwise { } {
5235 global et_vect_no_bitwise_saved
5238 if [info exists et_vect_no_bitwise_saved($et_index)] {
5239 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5241 set et_vect_no_bitwise_saved($et_index) 0
5243 verbose "check_effective_target_vect_no_bitwise:\
5244 returning $et_vect_no_bitwise_saved($et_index)" 2
5245 return $et_vect_no_bitwise_saved($et_index)
5248 # Return 1 if the target plus current options supports vector permutation,
5251 # This won't change
for different subtargets so
cache the result.
5253 proc check_effective_target_vect_perm
{ } {
5254 global et_vect_perm_saved
5257 if [info exists et_vect_perm_saved
($et_index
)] {
5258 verbose
"check_effective_target_vect_perm: using cached result" 2
5260 set et_vect_perm_saved
($et_index
) 0
5261 if { [is
-effective
-target arm_neon
]
5262 ||
[istarget aarch64
*-*-*]
5263 ||
[istarget powerpc
*-*-*]
5264 ||
[istarget spu
-*-*]
5265 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5266 ||
([istarget mips
*-*-*]
5267 && ([et
-is
-effective
-target mpaired_single
]
5268 ||
[et
-is
-effective
-target mips_msa
])) } {
5269 set et_vect_perm_saved
($et_index
) 1
5272 verbose
"check_effective_target_vect_perm:\
5273 returning $et_vect_perm_saved
($et_index
)" 2
5274 return $et_vect_perm_saved
($et_index
)
5277 #
Return 1 if the target plus current options supports vector permutation
5278 #
on byte
-sized elements
, 0 otherwise.
5280 # This won
't change for different subtargets so cache the result.
5282 proc check_effective_target_vect_perm_byte { } {
5283 global et_vect_perm_byte_saved
5286 if [info exists et_vect_perm_byte_saved($et_index)] {
5287 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5289 set et_vect_perm_byte_saved($et_index) 0
5290 if { ([is-effective-target arm_neon]
5291 && [is-effective-target arm_little_endian])
5292 || ([istarget aarch64*-*-*]
5293 && [is-effective-target aarch64_little_endian])
5294 || [istarget powerpc*-*-*]
5295 || [istarget spu-*-*]
5296 || ([istarget mips-*.*]
5297 && [et-is-effective-target mips_msa]) } {
5298 set et_vect_perm_byte_saved($et_index) 1
5301 verbose "check_effective_target_vect_perm_byte:\
5302 returning $et_vect_perm_byte_saved($et_index)" 2
5303 return $et_vect_perm_byte_saved($et_index)
5306 # Return 1 if the target plus current options supports vector permutation
5307 # on short-sized elements, 0 otherwise.
5309 # This won't change
for different subtargets so
cache the result.
5311 proc check_effective_target_vect_perm_short
{ } {
5312 global et_vect_perm_short_saved
5315 if [info exists et_vect_perm_short_saved
($et_index
)] {
5316 verbose
"check_effective_target_vect_perm_short: using cached result" 2
5318 set et_vect_perm_short_saved
($et_index
) 0
5319 if { ([is
-effective
-target arm_neon
]
5320 && [is
-effective
-target arm_little_endian
])
5321 ||
([istarget aarch64
*-*-*]
5322 && [is
-effective
-target aarch64_little_endian
])
5323 ||
[istarget powerpc
*-*-*]
5324 ||
[istarget spu
-*-*]
5325 ||
([istarget mips
*-*-*]
5326 && [et
-is
-effective
-target mips_msa
]) } {
5327 set et_vect_perm_short_saved
($et_index
) 1
5330 verbose
"check_effective_target_vect_perm_short:\
5331 returning $et_vect_perm_short_saved
($et_index
)" 2
5332 return $et_vect_perm_short_saved
($et_index
)
5335 #
Return 1 if the target plus current options supports folding of
5336 # copysign into XORSIGN.
5338 # This won
't change for different subtargets so cache the result.
5340 proc check_effective_target_xorsign { } {
5341 global et_xorsign_saved
5344 if [info exists et_xorsign_saved($et_index)] {
5345 verbose "check_effective_target_xorsign: using cached result" 2
5347 set et_xorsign_saved($et_index) 0
5348 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
5349 set et_xorsign_saved($et_index) 1
5352 verbose "check_effective_target_xorsign:\
5353 returning $et_xorsign_saved($et_index)" 2
5354 return $et_xorsign_saved($et_index)
5357 # Return 1 if the target plus current options supports a vector
5358 # widening summation of *short* args into *int* result, 0 otherwise.
5360 # This won't change
for different subtargets so
cache the result.
5362 proc check_effective_target_vect_widen_sum_hi_to_si_pattern
{ } {
5363 global et_vect_widen_sum_hi_to_si_pattern_saved
5366 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)] {
5367 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5368 using cached result
" 2
5370 set et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
) 0
5371 if { [istarget powerpc
*-*-*]
5372 ||
[istarget aarch64
*-*-*]
5373 ||
[is
-effective
-target arm_neon
]
5374 ||
[istarget ia64
-*-*] } {
5375 set et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
) 1
5378 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5379 returning $et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)" 2
5380 return $et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)
5383 #
Return 1 if the target plus current options supports a vector
5384 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
5385 # A target can also support this widening summation
if it can support
5386 # promotion
(unpacking
) from shorts to ints.
5388 # This won
't change for different subtargets so cache the result.
5390 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5391 global et_vect_widen_sum_hi_to_si_saved
5394 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5395 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5396 using cached result" 2
5398 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5399 [check_effective_target_vect_unpack]
5400 if { [istarget powerpc*-*-*]
5401 || [istarget ia64-*-*] } {
5402 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5405 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5406 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5407 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5410 # Return 1 if the target plus current options supports a vector
5411 # widening summation of *char* args into *short* result, 0 otherwise.
5412 # A target can also support this widening summation if it can support
5413 # promotion (unpacking) from chars to shorts.
5415 # This won't change
for different subtargets so
cache the result.
5417 proc check_effective_target_vect_widen_sum_qi_to_hi
{ } {
5418 global et_vect_widen_sum_qi_to_hi_saved
5421 if [info exists et_vect_widen_sum_qi_to_hi_saved
($et_index
)] {
5422 verbose
"check_effective_target_vect_widen_sum_qi_to_hi:\
5423 using cached result
" 2
5425 set et_vect_widen_sum_qi_to_hi_saved
($et_index
) 0
5426 if { [check_effective_target_vect_unpack
]
5427 ||
[is
-effective
-target arm_neon
]
5428 ||
[istarget ia64
-*-*] } {
5429 set et_vect_widen_sum_qi_to_hi_saved
($et_index
) 1
5432 verbose
"check_effective_target_vect_widen_sum_qi_to_hi:\
5433 returning $et_vect_widen_sum_qi_to_hi_saved
($et_index
)" 2
5434 return $et_vect_widen_sum_qi_to_hi_saved
($et_index
)
5437 #
Return 1 if the target plus current options supports a vector
5438 # widening summation of
*char
* args into
*int* result
, 0 otherwise.
5440 # This won
't change for different subtargets so cache the result.
5442 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5443 global et_vect_widen_sum_qi_to_si_saved
5446 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5447 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5448 using cached result" 2
5450 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5451 if { [istarget powerpc*-*-*] } {
5452 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5455 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5456 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5457 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5460 # Return 1 if the target plus current options supports a vector
5461 # widening multiplication of *char* args into *short* result, 0 otherwise.
5462 # A target can also support this widening multplication if it can support
5463 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5464 # multiplication of shorts).
5466 # This won't change
for different subtargets so
cache the result.
5469 proc check_effective_target_vect_widen_mult_qi_to_hi
{ } {
5470 global et_vect_widen_mult_qi_to_hi_saved
5473 if [info exists et_vect_widen_mult_qi_to_hi_saved
($et_index
)] {
5474 verbose
"check_effective_target_vect_widen_mult_qi_to_hi:\
5475 using cached result
" 2
5477 if { [check_effective_target_vect_unpack
]
5478 && [check_effective_target_vect_short_mult
] } {
5479 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 1
5481 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 0
5483 if { [istarget powerpc
*-*-*]
5484 ||
[istarget aarch64
*-*-*]
5485 ||
[is
-effective
-target arm_neon
] } {
5486 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 1
5489 verbose
"check_effective_target_vect_widen_mult_qi_to_hi:\
5490 returning $et_vect_widen_mult_qi_to_hi_saved
($et_index
)" 2
5491 return $et_vect_widen_mult_qi_to_hi_saved
($et_index
)
5494 #
Return 1 if the target plus current options supports a vector
5495 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
5496 # A target can also support this widening multplication
if it can support
5497 # promotion
(unpacking
) from shorts to ints
, and vect_int_mult
(non
-widening
5498 # multiplication of ints
).
5500 # This won
't change for different subtargets so cache the result.
5503 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5504 global et_vect_widen_mult_hi_to_si_saved
5507 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5508 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5509 using cached result" 2
5511 if { [check_effective_target_vect_unpack]
5512 && [check_effective_target_vect_int_mult] } {
5513 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5515 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5517 if { [istarget powerpc*-*-*]
5518 || [istarget spu-*-*]
5519 || [istarget ia64-*-*]
5520 || [istarget aarch64*-*-*]
5521 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5522 || [is-effective-target arm_neon] } {
5523 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5526 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5527 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5528 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5531 # Return 1 if the target plus current options supports a vector
5532 # widening multiplication of *char* args into *short* result, 0 otherwise.
5534 # This won't change
for different subtargets so
cache the result.
5536 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern
{ } {
5537 global et_vect_widen_mult_qi_to_hi_pattern_saved
5540 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)] {
5541 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5542 using cached result
" 2
5544 set et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
) 0
5545 if { [istarget powerpc
*-*-*]
5546 ||
([is
-effective
-target arm_neon
]
5547 && [check_effective_target_arm_little_endian
]) } {
5548 set et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
) 1
5551 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5552 returning $et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)" 2
5553 return $et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)
5556 #
Return 1 if the target plus current options supports a vector
5557 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
5559 # This won
't change for different subtargets so cache the result.
5561 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5562 global et_vect_widen_mult_hi_to_si_pattern_saved
5565 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5566 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5567 using cached result" 2
5569 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5570 if { [istarget powerpc*-*-*]
5571 || [istarget spu-*-*]
5572 || [istarget ia64-*-*]
5573 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5574 || ([is-effective-target arm_neon]
5575 && [check_effective_target_arm_little_endian]) } {
5576 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5579 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5580 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5581 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5584 # Return 1 if the target plus current options supports a vector
5585 # widening multiplication of *int* args into *long* result, 0 otherwise.
5587 # This won't change
for different subtargets so
cache the result.
5589 proc check_effective_target_vect_widen_mult_si_to_di_pattern
{ } {
5590 global et_vect_widen_mult_si_to_di_pattern_saved
5593 if [info exists et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)] {
5594 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern:\
5595 using cached result
" 2
5597 set et_vect_widen_mult_si_to_di_pattern_saved
($et_index
) 0
5598 if {[istarget ia64
-*-*]
5599 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
5600 set et_vect_widen_mult_si_to_di_pattern_saved
($et_index
) 1
5603 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern:\
5604 returning $et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)" 2
5605 return $et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)
5608 #
Return 1 if the target plus current options supports a vector
5609 # widening shift
, 0 otherwise.
5611 # This won
't change for different subtargets so cache the result.
5613 proc check_effective_target_vect_widen_shift { } {
5614 global et_vect_widen_shift_saved
5617 if [info exists et_vect_shift_saved($et_index)] {
5618 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5620 set et_vect_widen_shift_saved($et_index) 0
5621 if { [is-effective-target arm_neon] } {
5622 set et_vect_widen_shift_saved($et_index) 1
5625 verbose "check_effective_target_vect_widen_shift:\
5626 returning $et_vect_widen_shift_saved($et_index)" 2
5627 return $et_vect_widen_shift_saved($et_index)
5630 # Return 1 if the target plus current options supports a vector
5631 # dot-product of signed chars, 0 otherwise.
5633 # This won't change
for different subtargets so
cache the result.
5635 proc check_effective_target_vect_sdot_qi
{ } {
5636 global et_vect_sdot_qi_saved
5639 if [info exists et_vect_sdot_qi_saved
($et_index
)] {
5640 verbose
"check_effective_target_vect_sdot_qi: using cached result" 2
5642 set et_vect_sdot_qi_saved
($et_index
) 0
5643 if { [istarget ia64
-*-*]
5644 ||
([istarget mips
*-*-*]
5645 && [et
-is
-effective
-target mips_msa
]) } {
5646 set et_vect_udot_qi_saved
1
5649 verbose
"check_effective_target_vect_sdot_qi:\
5650 returning $et_vect_sdot_qi_saved
($et_index
)" 2
5651 return $et_vect_sdot_qi_saved
($et_index
)
5654 #
Return 1 if the target plus current options supports a vector
5655 # dot
-product of unsigned chars
, 0 otherwise.
5657 # This won
't change for different subtargets so cache the result.
5659 proc check_effective_target_vect_udot_qi { } {
5660 global et_vect_udot_qi_saved
5663 if [info exists et_vect_udot_qi_saved($et_index)] {
5664 verbose "check_effective_target_vect_udot_qi: using cached result" 2
5666 set et_vect_udot_qi_saved($et_index) 0
5667 if { [istarget powerpc*-*-*]
5668 || [istarget ia64-*-*]
5669 || ([istarget mips*-*-*]
5670 && [et-is-effective-target mips_msa]) } {
5671 set et_vect_udot_qi_saved($et_index) 1
5674 verbose "check_effective_target_vect_udot_qi:\
5675 returning $et_vect_udot_qi_saved($et_index)" 2
5676 return $et_vect_udot_qi_saved($et_index)
5679 # Return 1 if the target plus current options supports a vector
5680 # dot-product of signed shorts, 0 otherwise.
5682 # This won't change
for different subtargets so
cache the result.
5684 proc check_effective_target_vect_sdot_hi
{ } {
5685 global et_vect_sdot_hi_saved
5688 if [info exists et_vect_sdot_hi_saved
($et_index
)] {
5689 verbose
"check_effective_target_vect_sdot_hi: using cached result" 2
5691 set et_vect_sdot_hi_saved
($et_index
) 0
5692 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
5693 ||
[istarget ia64
-*-*]
5694 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5695 ||
([istarget mips
*-*-*]
5696 && [et
-is
-effective
-target mips_msa
]) } {
5697 set et_vect_sdot_hi_saved
($et_index
) 1
5700 verbose
"check_effective_target_vect_sdot_hi:\
5701 returning $et_vect_sdot_hi_saved
($et_index
)" 2
5702 return $et_vect_sdot_hi_saved
($et_index
)
5705 #
Return 1 if the target plus current options supports a vector
5706 # dot
-product of unsigned shorts
, 0 otherwise.
5708 # This won
't change for different subtargets so cache the result.
5710 proc check_effective_target_vect_udot_hi { } {
5711 global et_vect_udot_hi_saved
5714 if [info exists et_vect_udot_hi_saved($et_index)] {
5715 verbose "check_effective_target_vect_udot_hi: using cached result" 2
5717 set et_vect_udot_hi_saved($et_index) 0
5718 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5719 || ([istarget mips*-*-*]
5720 && [et-is-effective-target mips_msa]) } {
5721 set et_vect_udot_hi_saved($et_index) 1
5724 verbose "check_effective_target_vect_udot_hi:\
5725 returning $et_vect_udot_hi_saved($et_index)" 2
5726 return $et_vect_udot_hi_saved($et_index)
5729 # Return 1 if the target plus current options supports a vector
5730 # sad operation of unsigned chars, 0 otherwise.
5732 # This won't change
for different subtargets so
cache the result.
5734 proc check_effective_target_vect_usad_char
{ } {
5735 global et_vect_usad_char_saved
5738 if [info exists et_vect_usad_char_saved
($et_index
)] {
5739 verbose
"check_effective_target_vect_usad_char: using cached result" 2
5741 set et_vect_usad_char_saved
($et_index
) 0
5742 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
5743 set et_vect_usad_char_saved
($et_index
) 1
5746 verbose
"check_effective_target_vect_usad_char:\
5747 returning $et_vect_usad_char_saved
($et_index
)" 2
5748 return $et_vect_usad_char_saved
($et_index
)
5751 #
Return 1 if the target plus current options supports a vector
5752 # demotion
(packing
) of shorts
(to chars
) and ints
(to shorts
)
5753 # using modulo arithmetic
, 0 otherwise.
5755 # This won
't change for different subtargets so cache the result.
5757 proc check_effective_target_vect_pack_trunc { } {
5758 global et_vect_pack_trunc_saved
5761 if [info exists et_vect_pack_trunc_saved($et_index)] {
5762 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
5764 set et_vect_pack_trunc_saved($et_index) 0
5765 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5766 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5767 || [istarget aarch64*-*-*]
5768 || [istarget spu-*-*]
5769 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5770 && [check_effective_target_arm_little_endian])
5771 || ([istarget mips*-*-*]
5772 && [et-is-effective-target mips_msa]) } {
5773 set et_vect_pack_trunc_saved($et_index) 1
5776 verbose "check_effective_target_vect_pack_trunc:\
5777 returning $et_vect_pack_trunc_saved($et_index)" 2
5778 return $et_vect_pack_trunc_saved($et_index)
5781 # Return 1 if the target plus current options supports a vector
5782 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
5784 # This won't change
for different subtargets so
cache the result.
5786 proc check_effective_target_vect_unpack
{ } {
5787 global et_vect_unpack_saved
5790 if [info exists et_vect_unpack_saved
($et_index
)] {
5791 verbose
"check_effective_target_vect_unpack: using cached result" 2
5793 set et_vect_unpack_saved
($et_index
) 0
5794 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*paired
*])
5795 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5796 ||
[istarget spu
-*-*]
5797 ||
[istarget ia64
-*-*]
5798 ||
[istarget aarch64
*-*-*]
5799 ||
([istarget mips
*-*-*]
5800 && [et
-is
-effective
-target mips_msa
])
5801 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
5802 && [check_effective_target_arm_little_endian
]) } {
5803 set et_vect_unpack_saved
($et_index
) 1
5806 verbose
"check_effective_target_vect_unpack:\
5807 returning $et_vect_unpack_saved
($et_index
)" 2
5808 return $et_vect_unpack_saved
($et_index
)
5811 #
Return 1 if the target plus current options does not guarantee
5812 # that its STACK_BOUNDARY is
>= the reguired vector alignment.
5814 # This won
't change for different subtargets so cache the result.
5816 proc check_effective_target_unaligned_stack { } {
5817 global et_unaligned_stack_saved
5819 if [info exists et_unaligned_stack_saved] {
5820 verbose "check_effective_target_unaligned_stack: using cached result" 2
5822 set et_unaligned_stack_saved 0
5824 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
5825 return $et_unaligned_stack_saved
5828 # Return 1 if the target plus current options does not support a vector
5829 # alignment mechanism, 0 otherwise.
5831 # This won't change
for different subtargets so
cache the result.
5833 proc check_effective_target_vect_no_align
{ } {
5834 global et_vect_no_align_saved
5837 if [info exists et_vect_no_align_saved
($et_index
)] {
5838 verbose
"check_effective_target_vect_no_align: using cached result" 2
5840 set et_vect_no_align_saved
($et_index
) 0
5841 if { [istarget mipsisa64
*-*-*]
5842 ||
[istarget mips
-sde
-elf
]
5843 ||
[istarget sparc
*-*-*]
5844 ||
[istarget ia64
-*-*]
5845 ||
[check_effective_target_arm_vect_no_misalign
]
5846 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
5847 ||
([istarget mips
*-*-*]
5848 && [et
-is
-effective
-target mips_loongson
]) } {
5849 set et_vect_no_align_saved
($et_index
) 1
5852 verbose
"check_effective_target_vect_no_align:\
5853 returning $et_vect_no_align_saved
($et_index
)" 2
5854 return $et_vect_no_align_saved
($et_index
)
5857 #
Return 1 if the target supports a vector misalign access
, 0 otherwise.
5859 # This won
't change for different subtargets so cache the result.
5861 proc check_effective_target_vect_hw_misalign { } {
5862 global et_vect_hw_misalign_saved
5865 if [info exists et_vect_hw_misalign_saved($et_index)] {
5866 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
5868 set et_vect_hw_misalign_saved($et_index) 0
5869 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5870 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5871 || [istarget aarch64*-*-*]
5872 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } {
5873 set et_vect_hw_misalign_saved($et_index) 1
5875 if { [istarget arm*-*-*] } {
5876 set et_vect_hw_misalign_saved($et_index) [check_effective_target_arm_vect_no_misalign]
5879 verbose "check_effective_target_vect_hw_misalign:\
5880 returning $et_vect_hw_misalign_saved($et_index)" 2
5881 return $et_vect_hw_misalign_saved($et_index)
5885 # Return 1 if arrays are aligned to the vector alignment
5886 # boundary, 0 otherwise.
5888 proc check_effective_target_vect_aligned_arrays { } {
5889 set et_vect_aligned_arrays 0
5890 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5891 && !([is-effective-target ia32]
5892 || ([check_avx_available] && ![check_prefer_avx128])))
5893 || [istarget spu-*-*] } {
5894 set et_vect_aligned_arrays 1
5897 verbose "check_effective_target_vect_aligned_arrays:\
5898 returning $et_vect_aligned_arrays" 2
5899 return $et_vect_aligned_arrays
5902 # Return 1 if types of size 32 bit or less are naturally aligned
5903 # (aligned to their type-size), 0 otherwise.
5905 # This won't change
for different subtargets so
cache the result.
5907 proc check_effective_target_natural_alignment_32
{ } {
5908 global et_natural_alignment_32
5910 if [info exists et_natural_alignment_32_saved
] {
5911 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
5913 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
5914 set et_natural_alignment_32_saved
1
5915 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
])
5916 ||
[istarget avr
-*-*] } {
5917 set et_natural_alignment_32_saved
0
5920 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
5921 return $et_natural_alignment_32_saved
5924 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
5925 # type
-size
), 0 otherwise.
5927 # This won
't change for different subtargets so cache the result.
5929 proc check_effective_target_natural_alignment_64 { } {
5930 global et_natural_alignment_64
5932 if [info exists et_natural_alignment_64_saved] {
5933 verbose "check_effective_target_natural_alignment_64: using cached result" 2
5935 set et_natural_alignment_64_saved 0
5936 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
5937 || [istarget spu-*-*] } {
5938 set et_natural_alignment_64_saved 1
5941 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
5942 return $et_natural_alignment_64_saved
5945 # Return 1 if all vector types are naturally aligned (aligned to their
5946 # type-size), 0 otherwise.
5948 proc check_effective_target_vect_natural_alignment { } {
5949 set et_vect_natural_alignment 1
5950 if { [check_effective_target_arm_eabi]
5951 || [istarget nvptx-*-*]
5952 || [istarget s390*-*-*] } {
5953 set et_vect_natural_alignment 0
5955 verbose "check_effective_target_vect_natural_alignment:\
5956 returning $et_vect_natural_alignment" 2
5957 return $et_vect_natural_alignment
5960 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
5962 proc check_effective_target_vector_alignment_reachable { } {
5963 set et_vector_alignment_reachable 0
5964 if { [check_effective_target_vect_aligned_arrays]
5965 || [check_effective_target_natural_alignment_32] } {
5966 set et_vector_alignment_reachable 1
5968 verbose "check_effective_target_vector_alignment_reachable:\
5969 returning $et_vector_alignment_reachable" 2
5970 return $et_vector_alignment_reachable
5973 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
5975 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
5976 set et_vector_alignment_reachable_for_64bit 0
5977 if { [check_effective_target_vect_aligned_arrays]
5978 || [check_effective_target_natural_alignment_64] } {
5979 set et_vector_alignment_reachable_for_64bit 1
5981 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
5982 returning $et_vector_alignment_reachable_for_64bit" 2
5983 return $et_vector_alignment_reachable_for_64bit
5986 # Return 1 if the target only requires element alignment for vector accesses
5988 proc check_effective_target_vect_element_align { } {
5989 global et_vect_element_align
5992 if [info exists et_vect_element_align($et_index)] {
5993 verbose "check_effective_target_vect_element_align:\
5994 using cached result" 2
5996 set et_vect_element_align($et_index) 0
5997 if { ([istarget arm*-*-*]
5998 && ![check_effective_target_arm_vect_no_misalign])
5999 || [check_effective_target_vect_hw_misalign] } {
6000 set et_vect_element_align($et_index) 1
6004 verbose "check_effective_target_vect_element_align:\
6005 returning $et_vect_element_align($et_index)" 2
6006 return $et_vect_element_align($et_index)
6009 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6011 proc check_effective_target_vect_load_lanes { } {
6012 global et_vect_load_lanes
6014 if [info exists et_vect_load_lanes] {
6015 verbose "check_effective_target_vect_load_lanes: using cached result" 2
6017 set et_vect_load_lanes 0
6018 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6019 || [istarget aarch64*-*-*] } {
6020 set et_vect_load_lanes 1
6024 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6025 return $et_vect_load_lanes
6028 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6030 proc check_effective_target_vect_condition { } {
6031 global et_vect_cond_saved
6034 if [info exists et_vect_cond_saved($et_index)] {
6035 verbose "check_effective_target_vect_cond: using cached result" 2
6037 set et_vect_cond_saved($et_index) 0
6038 if { [istarget aarch64*-*-*]
6039 || [istarget powerpc*-*-*]
6040 || [istarget ia64-*-*]
6041 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6042 || [istarget spu-*-*]
6043 || ([istarget mips*-*-*]
6044 && [et-is-effective-target mips_msa])
6045 || ([istarget arm*-*-*]
6046 && [check_effective_target_arm_neon_ok]) } {
6047 set et_vect_cond_saved($et_index) 1
6051 verbose "check_effective_target_vect_cond:\
6052 returning $et_vect_cond_saved($et_index)" 2
6053 return $et_vect_cond_saved($et_index)
6056 # Return 1 if the target supports vector conditional operations where
6057 # the comparison has different type from the lhs, 0 otherwise.
6059 proc check_effective_target_vect_cond_mixed { } {
6060 global et_vect_cond_mixed_saved
6063 if [info exists et_vect_cond_mixed_saved($et_index)] {
6064 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
6066 set et_vect_cond_mixed_saved($et_index) 0
6067 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6068 || [istarget aarch64*-*-*]
6069 || [istarget powerpc*-*-*]
6070 || ([istarget mips*-*-*]
6071 && [et-is-effective-target mips_msa]) } {
6072 set et_vect_cond_mixed_saved($et_index) 1
6076 verbose "check_effective_target_vect_cond_mixed:\
6077 returning $et_vect_cond_mixed_saved($et_index)" 2
6078 return $et_vect_cond_mixed_saved($et_index)
6081 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6083 proc check_effective_target_vect_char_mult { } {
6084 global et_vect_char_mult_saved
6087 if [info exists et_vect_char_mult_saved($et_index)] {
6088 verbose "check_effective_target_vect_char_mult: using cached result" 2
6090 set et_vect_char_mult_saved($et_index) 0
6091 if { [istarget aarch64*-*-*]
6092 || [istarget ia64-*-*]
6093 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6094 || [check_effective_target_arm32]
6095 || [check_effective_target_powerpc_altivec]
6096 || ([istarget mips*-*-*]
6097 && [et-is-effective-target mips_msa]) } {
6098 set et_vect_char_mult_saved($et_index) 1
6102 verbose "check_effective_target_vect_char_mult:\
6103 returning $et_vect_char_mult_saved($et_index)" 2
6104 return $et_vect_char_mult_saved($et_index)
6107 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6109 proc check_effective_target_vect_short_mult { } {
6110 global et_vect_short_mult_saved
6113 if [info exists et_vect_short_mult_saved($et_index)] {
6114 verbose "check_effective_target_vect_short_mult: using cached result" 2
6116 set et_vect_short_mult_saved($et_index) 0
6117 if { [istarget ia64-*-*]
6118 || [istarget spu-*-*]
6119 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6120 || [istarget powerpc*-*-*]
6121 || [istarget aarch64*-*-*]
6122 || [check_effective_target_arm32]
6123 || ([istarget mips*-*-*]
6124 && ([et-is-effective-target mips_msa]
6125 || [et-is-effective-target mips_loongson])) } {
6126 set et_vect_short_mult_saved($et_index) 1
6130 verbose "check_effective_target_vect_short_mult:\
6131 returning $et_vect_short_mult_saved($et_index)" 2
6132 return $et_vect_short_mult_saved($et_index)
6135 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6137 proc check_effective_target_vect_int_mult { } {
6138 global et_vect_int_mult_saved
6141 if [info exists et_vect_int_mult_saved($et_index)] {
6142 verbose "check_effective_target_vect_int_mult: using cached result" 2
6144 set et_vect_int_mult_saved($et_index) 0
6145 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6146 || [istarget spu-*-*]
6147 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6148 || [istarget ia64-*-*]
6149 || [istarget aarch64*-*-*]
6150 || ([istarget mips*-*-*]
6151 && [et-is-effective-target mips_msa])
6152 || [check_effective_target_arm32] } {
6153 set et_vect_int_mult_saved($et_index) 1
6157 verbose "check_effective_target_vect_int_mult:\
6158 returning $et_vect_int_mult_saved($et_index)" 2
6159 return $et_vect_int_mult_saved($et_index)
6162 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6164 proc check_effective_target_vect_extract_even_odd { } {
6165 global et_vect_extract_even_odd_saved
6168 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6169 verbose "check_effective_target_vect_extract_even_odd:\
6170 using cached result" 2
6172 set et_vect_extract_even_odd_saved($et_index) 0
6173 if { [istarget aarch64*-*-*]
6174 || [istarget powerpc*-*-*]
6175 || [is-effective-target arm_neon]
6176 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6177 || [istarget ia64-*-*]
6178 || [istarget spu-*-*]
6179 || ([istarget mips*-*-*]
6180 && ([et-is-effective-target mips_msa]
6181 || [et-is-effective-target mpaired_single])) } {
6182 set et_vect_extract_even_odd_saved($et_index) 1
6186 verbose "check_effective_target_vect_extract_even_odd:\
6187 returning $et_vect_extract_even_odd_saved($et_index)" 2
6188 return $et_vect_extract_even_odd_saved($et_index)
6191 # Return 1 if the target supports vector interleaving, 0 otherwise.
6193 proc check_effective_target_vect_interleave { } {
6194 global et_vect_interleave_saved
6197 if [info exists et_vect_interleave_saved($et_index)] {
6198 verbose "check_effective_target_vect_interleave: using cached result" 2
6200 set et_vect_interleave_saved($et_index) 0
6201 if { [istarget aarch64*-*-*]
6202 || [istarget powerpc*-*-*]
6203 || [is-effective-target arm_neon]
6204 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6205 || [istarget ia64-*-*]
6206 || [istarget spu-*-*]
6207 || ([istarget mips*-*-*]
6208 && ([et-is-effective-target mpaired_single]
6209 || [et-is-effective-target mips_msa])) } {
6210 set et_vect_interleave_saved($et_index) 1
6214 verbose "check_effective_target_vect_interleave:\
6215 returning $et_vect_interleave_saved($et_index)" 2
6216 return $et_vect_interleave_saved($et_index)
6219 foreach N {2 3 4 8} {
6220 eval [string map [list N $N] {
6221 # Return 1 if the target supports 2-vector interleaving
6222 proc check_effective_target_vect_stridedN { } {
6223 global et_vect_stridedN_saved
6226 if [info exists et_vect_stridedN_saved($et_index)] {
6227 verbose "check_effective_target_vect_stridedN:\
6228 using cached result" 2
6230 set et_vect_stridedN_saved($et_index) 0
6232 && [check_effective_target_vect_interleave]
6233 && [check_effective_target_vect_extract_even_odd] } {
6234 set et_vect_stridedN_saved($et_index) 1
6236 if { ([istarget arm*-*-*]
6237 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6238 set et_vect_stridedN_saved($et_index) 1
6242 verbose "check_effective_target_vect_stridedN:\
6243 returning $et_vect_stridedN_saved($et_index)" 2
6244 return $et_vect_stridedN_saved($et_index)
6249 # Return 1 if the target supports multiple vector sizes
6251 proc check_effective_target_vect_multiple_sizes { } {
6252 global et_vect_multiple_sizes_saved
6255 set et_vect_multiple_sizes_saved($et_index) 0
6256 if { [istarget aarch64*-*-*]
6257 || [is-effective-target arm_neon]
6258 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6259 && ([check_avx_available] && ![check_prefer_avx128])) } {
6260 set et_vect_multiple_sizes_saved($et_index) 1
6263 verbose "check_effective_target_vect_multiple_sizes:\
6264 returning $et_vect_multiple_sizes_saved($et_index)" 2
6265 return $et_vect_multiple_sizes_saved($et_index)
6268 # Return 1 if the target supports vectors of 64 bits.
6270 proc check_effective_target_vect64 { } {
6271 global et_vect64_saved
6274 if [info exists et_vect64_saved($et_index)] {
6275 verbose "check_effective_target_vect64: using cached result" 2
6277 set et_vect64_saved($et_index) 0
6278 if { ([is-effective-target arm_neon]
6279 && [check_effective_target_arm_little_endian])
6280 || [istarget aarch64*-*-*]
6281 || [istarget sparc*-*-*] } {
6282 set et_vect64_saved($et_index) 1
6286 verbose "check_effective_target_vect64:\
6287 returning $et_vect64_saved($et_index)" 2
6288 return $et_vect64_saved($et_index)
6291 # Return 1 if the target supports vector copysignf calls.
6293 proc check_effective_target_vect_call_copysignf { } {
6294 global et_vect_call_copysignf_saved
6297 if [info exists et_vect_call_copysignf_saved($et_index)] {
6298 verbose "check_effective_target_vect_call_copysignf:\
6299 using cached result" 2
6301 set et_vect_call_copysignf_saved($et_index) 0
6302 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6303 || [istarget powerpc*-*-*]
6304 || [istarget aarch64*-*-*] } {
6305 set et_vect_call_copysignf_saved($et_index) 1
6309 verbose "check_effective_target_vect_call_copysignf:\
6310 returning $et_vect_call_copysignf_saved($et_index)" 2
6311 return $et_vect_call_copysignf_saved($et_index)
6314 # Return 1 if the target supports hardware square root instructions.
6316 proc check_effective_target_sqrt_insn { } {
6317 global et_sqrt_insn_saved
6319 if [info exists et_sqrt_insn_saved] {
6320 verbose "check_effective_target_hw_sqrt: using cached result" 2
6322 set et_sqrt_insn_saved 0
6323 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6324 || [istarget powerpc*-*-*]
6325 || [istarget aarch64*-*-*]
6326 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
6327 set et_sqrt_insn_saved 1
6331 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6332 return $et_sqrt_insn_saved
6335 # Return 1 if the target supports vector sqrtf calls.
6337 proc check_effective_target_vect_call_sqrtf { } {
6338 global et_vect_call_sqrtf_saved
6341 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6342 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6344 set et_vect_call_sqrtf_saved($et_index) 0
6345 if { [istarget aarch64*-*-*]
6346 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6347 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
6348 set et_vect_call_sqrtf_saved($et_index) 1
6352 verbose "check_effective_target_vect_call_sqrtf:\
6353 returning $et_vect_call_sqrtf_saved($et_index)" 2
6354 return $et_vect_call_sqrtf_saved($et_index)
6357 # Return 1 if the target supports vector lrint calls.
6359 proc check_effective_target_vect_call_lrint { } {
6360 set et_vect_call_lrint 0
6361 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6362 && [check_effective_target_ilp32]) } {
6363 set et_vect_call_lrint 1
6366 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6367 return $et_vect_call_lrint
6370 # Return 1 if the target supports vector btrunc calls.
6372 proc check_effective_target_vect_call_btrunc { } {
6373 global et_vect_call_btrunc_saved
6376 if [info exists et_vect_call_btrunc_saved($et_index)] {
6377 verbose "check_effective_target_vect_call_btrunc:\
6378 using cached result" 2
6380 set et_vect_call_btrunc_saved($et_index) 0
6381 if { [istarget aarch64*-*-*] } {
6382 set et_vect_call_btrunc_saved($et_index) 1
6386 verbose "check_effective_target_vect_call_btrunc:\
6387 returning $et_vect_call_btrunc_saved($et_index)" 2
6388 return $et_vect_call_btrunc_saved($et_index)
6391 # Return 1 if the target supports vector btruncf calls.
6393 proc check_effective_target_vect_call_btruncf { } {
6394 global et_vect_call_btruncf_saved
6397 if [info exists et_vect_call_btruncf_saved($et_index)] {
6398 verbose "check_effective_target_vect_call_btruncf:\
6399 using cached result" 2
6401 set et_vect_call_btruncf_saved($et_index) 0
6402 if { [istarget aarch64*-*-*] } {
6403 set et_vect_call_btruncf_saved($et_index) 1
6407 verbose "check_effective_target_vect_call_btruncf:\
6408 returning $et_vect_call_btruncf_saved($et_index)" 2
6409 return $et_vect_call_btruncf_saved($et_index)
6412 # Return 1 if the target supports vector ceil calls.
6414 proc check_effective_target_vect_call_ceil { } {
6415 global et_vect_call_ceil_saved
6418 if [info exists et_vect_call_ceil_saved($et_index)] {
6419 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6421 set et_vect_call_ceil_saved($et_index) 0
6422 if { [istarget aarch64*-*-*] } {
6423 set et_vect_call_ceil_saved($et_index) 1
6427 verbose "check_effective_target_vect_call_ceil:\
6428 returning $et_vect_call_ceil_saved($et_index)" 2
6429 return $et_vect_call_ceil_saved($et_index)
6432 # Return 1 if the target supports vector ceilf calls.
6434 proc check_effective_target_vect_call_ceilf { } {
6435 global et_vect_call_ceilf_saved
6438 if [info exists et_vect_call_ceilf_saved($et_index)] {
6439 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6441 set et_vect_call_ceilf_saved($et_index) 0
6442 if { [istarget aarch64*-*-*] } {
6443 set et_vect_call_ceilf_saved($et_index) 1
6447 verbose "check_effective_target_vect_call_ceilf:\
6448 returning $et_vect_call_ceilf_saved($et_index)" 2
6449 return $et_vect_call_ceilf_saved($et_index)
6452 # Return 1 if the target supports vector floor calls.
6454 proc check_effective_target_vect_call_floor { } {
6455 global et_vect_call_floor_saved
6458 if [info exists et_vect_call_floor_saved($et_index)] {
6459 verbose "check_effective_target_vect_call_floor: using cached result" 2
6461 set et_vect_call_floor_saved($et_index) 0
6462 if { [istarget aarch64*-*-*] } {
6463 set et_vect_call_floor_saved($et_index) 1
6467 verbose "check_effective_target_vect_call_floor:\
6468 returning $et_vect_call_floor_saved($et_index)" 2
6469 return $et_vect_call_floor_saved($et_index)
6472 # Return 1 if the target supports vector floorf calls.
6474 proc check_effective_target_vect_call_floorf { } {
6475 global et_vect_call_floorf_saved
6478 if [info exists et_vect_call_floorf_saved($et_index)] {
6479 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6481 set et_vect_call_floorf_saved($et_index) 0
6482 if { [istarget aarch64*-*-*] } {
6483 set et_vect_call_floorf_saved($et_index) 1
6487 verbose "check_effective_target_vect_call_floorf:\
6488 returning $et_vect_call_floorf_saved($et_index)" 2
6489 return $et_vect_call_floorf_saved($et_index)
6492 # Return 1 if the target supports vector lceil calls.
6494 proc check_effective_target_vect_call_lceil { } {
6495 global et_vect_call_lceil_saved
6498 if [info exists et_vect_call_lceil_saved($et_index)] {
6499 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6501 set et_vect_call_lceil_saved($et_index) 0
6502 if { [istarget aarch64*-*-*] } {
6503 set et_vect_call_lceil_saved($et_index) 1
6507 verbose "check_effective_target_vect_call_lceil:\
6508 returning $et_vect_call_lceil_saved($et_index)" 2
6509 return $et_vect_call_lceil_saved($et_index)
6512 # Return 1 if the target supports vector lfloor calls.
6514 proc check_effective_target_vect_call_lfloor { } {
6515 global et_vect_call_lfloor_saved
6518 if [info exists et_vect_call_lfloor_saved($et_index)] {
6519 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6521 set et_vect_call_lfloor_saved($et_index) 0
6522 if { [istarget aarch64*-*-*] } {
6523 set et_vect_call_lfloor_saved($et_index) 1
6527 verbose "check_effective_target_vect_call_lfloor:\
6528 returning $et_vect_call_lfloor_saved($et_index)" 2
6529 return $et_vect_call_lfloor_saved($et_index)
6532 # Return 1 if the target supports vector nearbyint calls.
6534 proc check_effective_target_vect_call_nearbyint { } {
6535 global et_vect_call_nearbyint_saved
6538 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6539 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6541 set et_vect_call_nearbyint_saved($et_index) 0
6542 if { [istarget aarch64*-*-*] } {
6543 set et_vect_call_nearbyint_saved($et_index) 1
6547 verbose "check_effective_target_vect_call_nearbyint:\
6548 returning $et_vect_call_nearbyint_saved($et_index)" 2
6549 return $et_vect_call_nearbyint_saved($et_index)
6552 # Return 1 if the target supports vector nearbyintf calls.
6554 proc check_effective_target_vect_call_nearbyintf { } {
6555 global et_vect_call_nearbyintf_saved
6558 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
6559 verbose "check_effective_target_vect_call_nearbyintf:\
6560 using cached result" 2
6562 set et_vect_call_nearbyintf_saved($et_index) 0
6563 if { [istarget aarch64*-*-*] } {
6564 set et_vect_call_nearbyintf_saved($et_index) 1
6568 verbose "check_effective_target_vect_call_nearbyintf:\
6569 returning $et_vect_call_nearbyintf_saved($et_index)" 2
6570 return $et_vect_call_nearbyintf_saved($et_index)
6573 # Return 1 if the target supports vector round calls.
6575 proc check_effective_target_vect_call_round { } {
6576 global et_vect_call_round_saved
6579 if [info exists et_vect_call_round_saved($et_index)] {
6580 verbose "check_effective_target_vect_call_round: using cached result" 2
6582 set et_vect_call_round_saved($et_index) 0
6583 if { [istarget aarch64*-*-*] } {
6584 set et_vect_call_round_saved($et_index) 1
6588 verbose "check_effective_target_vect_call_round:\
6589 returning $et_vect_call_round_saved($et_index)" 2
6590 return $et_vect_call_round_saved($et_index)
6593 # Return 1 if the target supports vector roundf calls.
6595 proc check_effective_target_vect_call_roundf { } {
6596 global et_vect_call_roundf_saved
6599 if [info exists et_vect_call_roundf_saved($et_index)] {
6600 verbose "check_effective_target_vect_call_roundf: using cached result" 2
6602 set et_vect_call_roundf_saved($et_index) 0
6603 if { [istarget aarch64*-*-*] } {
6604 set et_vect_call_roundf_saved($et_index) 1
6608 verbose "check_effective_target_vect_call_roundf:\
6609 returning $et_vect_call_roundf_saved($et_index)" 2
6610 return $et_vect_call_roundf_saved($et_index)
6613 # Return 1 if the target supports section-anchors
6615 proc check_effective_target_section_anchors { } {
6616 global et_section_anchors_saved
6618 if [info exists et_section_anchors_saved] {
6619 verbose "check_effective_target_section_anchors: using cached result" 2
6621 set et_section_anchors_saved 0
6622 if { [istarget powerpc*-*-*]
6623 || [istarget arm*-*-*]
6624 || [istarget aarch64*-*-*] } {
6625 set et_section_anchors_saved 1
6629 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
6630 return $et_section_anchors_saved
6633 # Return 1 if the target supports atomic operations on "int_128" values.
6635 proc check_effective_target_sync_int_128 { } {
6636 if { [istarget spu-*-*] } {
6643 # Return 1 if the target supports atomic operations on "int_128" values
6644 # and can execute them.
6645 # This requires support for both compare-and-swap and true atomic loads.
6647 proc check_effective_target_sync_int_128_runtime { } {
6648 if { [istarget spu-*-*] } {
6655 # Return 1 if the target supports atomic operations on "long long".
6657 # Note: 32bit x86 targets require -march=pentium in dg-options.
6658 # Note: 32bit s390 targets require -mzarch in dg-options.
6660 proc check_effective_target_sync_long_long { } {
6661 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
6662 || [istarget aarch64*-*-*]
6663 || [istarget arm*-*-*]
6664 || [istarget alpha*-*-*]
6665 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
6666 || [istarget s390*-*-*]
6667 || [istarget spu-*-*] } {
6674 # Return 1 if the target supports atomic operations on "long long"
6675 # and can execute them.
6677 # Note: 32bit x86 targets require -march=pentium in dg-options.
6679 proc check_effective_target_sync_long_long_runtime { } {
6680 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
6681 && [check_cached_effective_target sync_long_long_available {
6682 check_runtime_nocache sync_long_long_available {
6686 unsigned int eax, ebx, ecx, edx;
6687 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6688 return !(edx & bit_CMPXCHG8B);
6693 || [istarget aarch64*-*-*]
6694 || ([istarget arm*-*-linux-*]
6695 && [check_runtime sync_longlong_runtime {
6701 if (sizeof (long long) != 8)
6704 /* Just check for native;
6705 checking for kernel fallback is tricky. */
6706 asm volatile ("ldrexd r0,r1, [%0]"
6707 : : "r" (&l1) : "r0", "r1");
6711 || [istarget alpha*-*-*]
6712 || ([istarget sparc*-*-*]
6713 && [check_effective_target_lp64]
6714 && [check_effective_target_ultrasparc_hw])
6715 || [istarget spu-*-*]
6716 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
6723 # Return 1 if the target supports byte swap instructions.
6725 proc check_effective_target_bswap { } {
6726 global et_bswap_saved
6728 if [info exists et_bswap_saved] {
6729 verbose "check_effective_target_bswap: using cached result" 2
6731 set et_bswap_saved 0
6732 if { [istarget aarch64*-*-*]
6733 || [istarget alpha*-*-*]
6734 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6735 || [istarget m68k-*-*]
6736 || [istarget powerpc*-*-*]
6737 || [istarget rs6000-*-*]
6738 || [istarget s390*-*-*]
6739 || ([istarget arm*-*-*]
6740 && [check_no_compiler_messages_nocache arm_v6_or_later object {
6742 #error not armv6 or later
6746 set et_bswap_saved 1
6750 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
6751 return $et_bswap_saved
6754 # Return 1 if the target supports 16-bit byte swap instructions.
6756 proc check_effective_target_bswap16 { } {
6757 global et_bswap16_saved
6759 if [info exists et_bswap16_saved] {
6760 verbose "check_effective_target_bswap16: using cached result" 2
6762 set et_bswap16_saved 0
6763 if { [is-effective-target bswap]
6764 && ![istarget alpha*-*-*]
6765 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
6766 set et_bswap16_saved 1
6770 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
6771 return $et_bswap16_saved
6774 # Return 1 if the target supports 32-bit byte swap instructions.
6776 proc check_effective_target_bswap32 { } {
6777 global et_bswap32_saved
6779 if [info exists et_bswap32_saved] {
6780 verbose "check_effective_target_bswap32: using cached result" 2
6782 set et_bswap32_saved 0
6783 if { [is-effective-target bswap] } {
6784 set et_bswap32_saved 1
6788 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
6789 return $et_bswap32_saved
6792 # Return 1 if the target supports 64-bit byte swap instructions.
6794 # Note: 32bit s390 targets require -mzarch in dg-options.
6796 proc check_effective_target_bswap64 { } {
6797 global et_bswap64_saved
6799 # expand_unop can expand 64-bit byte swap on 32-bit targets
6800 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
6806 # Return 1 if the target supports atomic operations on "int" and "long".
6808 proc check_effective_target_sync_int_long { } {
6809 global et_sync_int_long_saved
6811 if [info exists et_sync_int_long_saved] {
6812 verbose "check_effective_target_sync_int_long: using cached result" 2
6814 set et_sync_int_long_saved 0
6815 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6816 #
load-reserved/store
-conditional instructions.
6817 if { [istarget ia64
-*-*]
6818 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6819 ||
[istarget aarch64
*-*-*]
6820 ||
[istarget alpha
*-*-*]
6821 ||
[istarget arm
*-*-linux
-*]
6822 ||
([istarget arm
*-*-*]
6823 && [check_effective_target_arm_acq_rel
])
6824 ||
[istarget bfin
*-*linux
*]
6825 ||
[istarget hppa
*-*linux
*]
6826 ||
[istarget s390
*-*-*]
6827 ||
[istarget powerpc
*-*-*]
6828 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
6829 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
6830 ||
[istarget spu
-*-*]
6831 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
6832 ||
[check_effective_target_mips_llsc
] } {
6833 set et_sync_int_long_saved
1
6837 verbose
"check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
6838 return $et_sync_int_long_saved
6841 #
Return 1 if the target supports atomic operations
on "char" and "short".
6843 proc check_effective_target_sync_char_short
{ } {
6844 global et_sync_char_short_saved
6846 if [info exists et_sync_char_short_saved
] {
6847 verbose
"check_effective_target_sync_char_short: using cached result" 2
6849 set et_sync_char_short_saved
0
6850 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
6851 # load-reserved/store-conditional instructions.
6852 if { [istarget aarch64*-*-*]
6853 || [istarget ia64-*-*]
6854 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6855 || [istarget alpha*-*-*]
6856 || [istarget arm*-*-linux-*]
6857 || ([istarget arm*-*-*]
6858 && [check_effective_target_arm_acq_rel])
6859 || [istarget hppa*-*linux*]
6860 || [istarget s390*-*-*]
6861 || [istarget powerpc*-*-*]
6862 || [istarget crisv32-*-*] || [istarget cris-*-*]
6863 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6864 || [istarget spu-*-*]
6865 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6866 || [check_effective_target_mips_llsc] } {
6867 set et_sync_char_short_saved 1
6871 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
6872 return $et_sync_char_short_saved
6875 # Return 1 if the target uses a ColdFire FPU.
6877 proc check_effective_target_coldfire_fpu { } {
6878 return [check_no_compiler_messages coldfire_fpu assembly {
6885 # Return true if this is a uClibc target.
6887 proc check_effective_target_uclibc {} {
6888 return [check_no_compiler_messages uclibc object {
6889 #include <features.h>
6890 #if !defined (__UCLIBC__)
6896 # Return true if this is a uclibc target and if the uclibc feature
6897 # described by __$feature__ is not present.
6899 proc check_missing_uclibc_feature {feature} {
6900 return [check_no_compiler_messages $feature object "
6901 #include <features.h>
6902 #if !defined (__UCLIBC) || defined (__${feature}__)
6908 # Return true if this is a Newlib target.
6910 proc check_effective_target_newlib {} {
6911 return [check_no_compiler_messages newlib object {
6916 # Some newlib versions don't provide a frexpl and instead depend
6917 #
on frexp to implement long double conversions in their printf
-like
6918 # functions. This leads to broken results. Detect such versions here.
6920 proc check_effective_target_newlib_broken_long_double_io
{} {
6921 if { [is
-effective
-target newlib
] && ![is
-effective
-target frexpl
] } {
6927 #
Return true
if this is NOT a Bionic target.
6929 proc check_effective_target_non_bionic
{} {
6930 return [check_no_compiler_messages non_bionic object
{
6932 #
if defined
(__BIONIC__
)
6938 #
Return true
if this target has error.h header.
6940 proc check_effective_target_error_h
{} {
6941 return [check_no_compiler_messages error_h object
{
6946 #
Return true
if this target has tgmath.h header.
6948 proc check_effective_target_tgmath_h
{} {
6949 return [check_no_compiler_messages tgmath_h object
{
6954 #
Return true
if target
's libc supports complex functions.
6956 proc check_effective_target_libc_has_complex_functions {} {
6957 return [check_no_compiler_messages libc_has_complex_functions object {
6958 #include <complex.h>
6963 # (a) an error of a few ULP is expected in string to floating-point
6964 # conversion functions; and
6965 # (b) overflow is not always detected correctly by those functions.
6967 proc check_effective_target_lax_strtofp {} {
6968 # By default, assume that all uClibc targets suffer from this.
6969 return [check_effective_target_uclibc]
6972 # Return 1 if this is a target for which wcsftime is a dummy
6973 # function that always returns 0.
6975 proc check_effective_target_dummy_wcsftime {} {
6976 # By default, assume that all uClibc targets suffer from this.
6977 return [check_effective_target_uclibc]
6980 # Return 1 if constructors with initialization priority arguments are
6981 # supposed on this target.
6983 proc check_effective_target_init_priority {} {
6984 return [check_no_compiler_messages init_priority assembly "
6985 void f() __attribute__((constructor (1000)));
6990 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
6991 # This can be used with any check_* proc that takes no argument and
6992 # returns only 1 or 0. It could be used with check_* procs that take
6993 # arguments with keywords that pass particular arguments.
6995 proc is-effective-target { arg } {
6998 if { ![info exists et_index] } {
6999 # Initialize the effective target index that is used in some
7000 # check_effective_target_* procs.
7003 if { [info procs check_effective_target_${arg}] != [list] } {
7004 set selected [check_effective_target_${arg}]
7007 "vmx_hw" { set selected [check_vmx_hw_available] }
7008 "vsx_hw" { set selected [check_vsx_hw_available] }
7009 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7010 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7011 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7012 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7013 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7014 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7015 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7016 "dfp_hw" { set selected [check_dfp_hw_available] }
7017 "htm_hw" { set selected [check_htm_hw_available] }
7018 "named_sections" { set selected [check_named_sections_available] }
7019 "gc_sections" { set selected [check_gc_sections_available] }
7020 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7021 default { error "unknown effective target keyword `$arg'" }
7024 verbose
"is-effective-target: $arg $selected" 2
7028 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
7030 proc is
-effective
-target
-keyword
{ arg } {
7031 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7034 # These have different names
for their check_
* procs.
7036 "vmx_hw" { return 1 }
7037 "vsx_hw" { return 1 }
7038 "p8vector_hw" { return 1 }
7039 "p9vector_hw" { return 1 }
7040 "p9modulo_hw" { return 1 }
7041 "ppc_float128_sw" { return 1 }
7042 "ppc_float128_hw" { return 1 }
7043 "ppc_recip_hw" { return 1 }
7044 "dfp_hw" { return 1 }
7045 "htm_hw" { return 1 }
7046 "named_sections" { return 1 }
7047 "gc_sections" { return 1 }
7048 "cxa_atexit" { return 1 }
7049 default
{ return 0 }
7054 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
7055 # indicate what target is currently being processed. This is
for
7056 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
7059 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
7060 global dg
-do-what
-default
7061 global EFFECTIVE_TARGETS
7064 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
7065 foreach target $EFFECTIVE_TARGETS
{
7066 set target_flags $flags
7067 set dg
-do-what
-default
compile
7068 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
7069 if { [info procs add_options_for_$
{target
}] != [list
] } {
7070 set target_flags
[add_options_for_$
{target
} "$flags"]
7072 if { [info procs check_effective_target_$
{target
}_runtime
]
7073 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
7074 set dg
-do-what
-default run
7076 $runtest $testcases $target_flags $
{default
-extra
-flags
}
7080 $runtest $testcases $flags $
{default
-extra
-flags
}
7084 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7085 # et_index
, 0 otherwise.
7087 proc et
-is
-effective
-target
{ target
} {
7088 global EFFECTIVE_TARGETS
7091 if { [llength $EFFECTIVE_TARGETS
] > $et_index
7092 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
7098 #
Return 1 if target default to short enums
7100 proc check_effective_target_short_enums
{ } {
7101 return [check_no_compiler_messages short_enums assembly
{
7103 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
7107 #
Return 1 if target supports merging string constants at link time.
7109 proc check_effective_target_string_merging
{ } {
7110 return [check_no_messages_and_pattern string_merging \
7111 "rodata\\.str" assembly {
7112 const char
*var
= "String";
7116 #
Return 1 if target has the basic signed and unsigned types in
7117 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
7118 # working
<stdint.h
> for all targets.
7120 proc check_effective_target_stdint_types
{ } {
7121 return [check_no_compiler_messages stdint_types assembly
{
7123 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
7124 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
7128 #
Return 1 if target has the basic signed and unsigned types in
7129 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
7130 # these types agree with those in the header, as some systems have
7131 # only <inttypes.h>.
7133 proc check_effective_target_inttypes_types { } {
7134 return [check_no_compiler_messages inttypes_types assembly {
7135 #include <inttypes.h>
7136 int8_t a; int16_t b; int32_t c; int64_t d;
7137 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7141 # Return 1 if programs are intended to be run on a simulator
7142 # (i.e. slowly) rather than hardware (i.e. fast).
7144 proc check_effective_target_simulator { } {
7146 # All "src/sim" simulators set this one.
7147 if [board_info target exists is_simulator] {
7148 return [board_info target is_simulator]
7151 # The "sid" simulators don't
set that one
, but at least they
set
7153 if [board_info target
exists slow_simulator
] {
7154 return [board_info target slow_simulator
]
7160 #
Return 1 if programs are intended to be run
on hardware rather than
7163 proc check_effective_target_hw
{ } {
7165 # All
"src/sim" simulators set this one.
7166 if [board_info target
exists is_simulator
] {
7167 if [board_info target is_simulator
] {
7174 # The
"sid" simulators don't set that one, but at least they set
7176 if [board_info target
exists slow_simulator
] {
7177 if [board_info target slow_simulator
] {
7187 #
Return 1 if the target is a VxWorks kernel.
7189 proc check_effective_target_vxworks_kernel
{ } {
7190 return [check_no_compiler_messages vxworks_kernel assembly
{
7191 #
if !defined __vxworks || defined __RTP__
7197 #
Return 1 if the target is a VxWorks RTP.
7199 proc check_effective_target_vxworks_rtp
{ } {
7200 return [check_no_compiler_messages vxworks_rtp assembly
{
7201 #
if !defined __vxworks ||
!defined __RTP__
7207 #
Return 1 if the target is expected to provide wide character support.
7209 proc check_effective_target_wchar
{ } {
7210 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
7213 return [check_no_compiler_messages wchar assembly
{
7218 #
Return 1 if the target has
<pthread.h
>.
7220 proc check_effective_target_pthread_h
{ } {
7221 return [check_no_compiler_messages pthread_h assembly
{
7222 #
include <pthread.h
>
7226 #
Return 1 if the target can truncate a file from a file
-descriptor
,
7227 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
7228 # chsize. We test
for a trivially functional truncation
; no stubs.
7229 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
7230 # different function to be used.
7232 proc check_effective_target_fd_truncate { } {
7234 #define _FILE_OFFSET_BITS 64
7241 FILE *f = fopen ("tst.tmp", "wb");
7243 const char t[] = "test writing more than ten characters";
7247 write (fd, t, sizeof (t) - 1);
7249 if (ftruncate (fd, 10) != 0)
7258 f = fopen ("tst.tmp", "rb");
7259 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7267 if { [check_runtime ftruncate $prog] } {
7271 regsub "ftruncate" $prog "chsize" prog
7272 return [check_runtime chsize $prog]
7275 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7277 proc add_options_for_c99_runtime { flags } {
7278 if { [istarget *-*-solaris2*] } {
7279 return "$flags -std=c99"
7281 if { [istarget powerpc-*-darwin*] } {
7282 return "$flags -mmacosx-version-min=10.3"
7287 # Add to FLAGS all the target-specific flags needed to enable
7288 # full IEEE compliance mode.
7290 proc add_options_for_ieee { flags } {
7291 if { [istarget alpha*-*-*]
7292 || [istarget sh*-*-*] } {
7293 return "$flags -mieee"
7295 if { [istarget rx-*-*] } {
7296 return "$flags -mnofpu"
7301 if {![info exists flags_to_postpone]} {
7302 set flags_to_postpone ""
7305 # Add to FLAGS the flags needed to enable functions to bind locally
7306 # when using pic/PIC passes in the testsuite.
7307 proc add_options_for_bind_pic_locally { flags } {
7308 global flags_to_postpone
7310 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
7311 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
7312 # order to make sure that the multilib_flags doesn't override this.
7314 if {[check_no_compiler_messages using_pic2 assembly
{
7319 set flags_to_postpone
"-fPIE"
7322 if {[check_no_compiler_messages using_pic1 assembly
{
7327 set flags_to_postpone
"-fpie"
7333 # Add to FLAGS the flags needed to enable
64-bit vectors.
7335 proc add_options_for_double_vectors
{ flags
} {
7336 if [is
-effective
-target arm_neon_ok
] {
7337 return "$flags -mvectorize-with-neon-double"
7343 # Add to FLAGS the flags needed to
define the STACK_SIZE macro.
7345 proc add_options_for_stack_size
{ flags
} {
7346 if [is
-effective
-target stack_size
] {
7347 set stack_size
[dg
-effective
-target
-value stack_size
]
7348 return "$flags -DSTACK_SIZE=$stack_size"
7354 #
Return 1 if the target provides a full C99 runtime.
7356 proc check_effective_target_c99_runtime
{ } {
7357 return [check_cached_effective_target c99_runtime
{
7360 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
7361 set contents
[read $file
]
7364 #ifndef HAVE_C99_RUNTIME
7365 #error
!HAVE_C99_RUNTIME
7368 check_no_compiler_messages_nocache c99_runtime assembly \
7369 $contents
[add_options_for_c99_runtime
""]
7373 #
Return 1 if target wchar_t is at least
4 bytes.
7375 proc check_effective_target_4byte_wchar_t
{ } {
7376 return [check_no_compiler_messages
4byte_wchar_t object
{
7377 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
7381 #
Return 1 if the target supports automatic stack alignment.
7383 proc check_effective_target_automatic_stack_alignment
{ } {
7384 # Ordinarily x86 supports automatic stack alignment ...
7385 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
7386 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
7387 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
7388 return [check_effective_target_ilp32];
7395 # Return true if we are compiling for AVX target.
7397 proc check_avx_available { } {
7398 if { [check_no_compiler_messages avx_available assembly {
7408 # Return true if 32- and 16-bytes vectors are available.
7410 proc check_effective_target_vect_sizes_32B_16B { } {
7411 if { [check_avx_available] && ![check_prefer_avx128] } {
7418 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7421 proc check_prefer_avx128 { } {
7422 if ![check_avx_available] {
7425 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7426 float a[1024],b[1024],c[1024];
7427 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7428 } "-O2 -ftree-vectorize"]
7432 # Return 1 if avx512f instructions can be compiled.
7434 proc check_effective_target_avx512f { } {
7435 return [check_no_compiler_messages avx512f object {
7436 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7438 __m512d _mm512_add (__m512d a)
7440 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7445 # Return 1 if avx instructions can be compiled.
7447 proc check_effective_target_avx { } {
7448 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7451 return [check_no_compiler_messages avx object {
7452 void _mm256_zeroall (void)
7454 __builtin_ia32_vzeroall ();
7459 # Return 1 if avx2 instructions can be compiled.
7460 proc check_effective_target_avx2 { } {
7461 return [check_no_compiler_messages avx2 object {
7462 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7464 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7466 return __builtin_ia32_andnotsi256 (__X, __Y);
7471 # Return 1 if sse instructions can be compiled.
7472 proc check_effective_target_sse { } {
7473 return [check_no_compiler_messages sse object {
7476 __builtin_ia32_stmxcsr ();
7482 # Return 1 if sse2 instructions can be compiled.
7483 proc check_effective_target_sse2 { } {
7484 return [check_no_compiler_messages sse2 object {
7485 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7487 __m128i _mm_srli_si128 (__m128i __A, int __N)
7489 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7494 # Return 1 if sse4.1 instructions can be compiled.
7495 proc check_effective_target_sse4 { } {
7496 return [check_no_compiler_messages sse4.1 object {
7497 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7498 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7500 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7502 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7508 # Return 1 if F16C instructions can be compiled.
7510 proc check_effective_target_f16c { } {
7511 return [check_no_compiler_messages f16c object {
7512 #include "immintrin.h"
7514 foo (unsigned short val)
7516 return _cvtsh_ss (val);
7521 # Return 1 if C wchar_t type is compatible with char16_t.
7523 proc check_effective_target_wchar_t_char16_t_compatible { } {
7524 return [check_no_compiler_messages wchar_t_char16_t object {
7526 __CHAR16_TYPE__ *p16 = &wc;
7527 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7531 # Return 1 if C wchar_t type is compatible with char32_t.
7533 proc check_effective_target_wchar_t_char32_t_compatible { } {
7534 return [check_no_compiler_messages wchar_t_char32_t object {
7536 __CHAR32_TYPE__ *p32 = &wc;
7537 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7541 # Return 1 if pow10 function exists.
7543 proc check_effective_target_pow10 { } {
7544 return [check_runtime pow10 {
7554 # Return 1 if frexpl function exists.
7556 proc check_effective_target_frexpl { } {
7557 return [check_runtime frexpl {
7562 x = frexpl (5.0, &y);
7569 # Return 1 if issignaling function exists.
7570 proc check_effective_target_issignaling {} {
7571 return [check_runtime issignaling {
7576 return issignaling (0.0);
7581 # Return 1 if current options generate DFP instructions, 0 otherwise.
7582 proc check_effective_target_hard_dfp {} {
7583 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7584 typedef float d64 __attribute__((mode(DD)));
7586 void foo (void) { z = x + y; }
7590 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7591 # for strchr etc. functions.
7593 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7594 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7597 #if !defined(__cplusplus) \
7598 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7599 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7600 ISO C++ correct string.h and wchar.h protos not supported.
7607 # Return 1 if GNU as is used.
7609 proc check_effective_target_gas { } {
7610 global use_gas_saved
7613 if {![info exists use_gas_saved]} {
7614 # Check if the as used by gcc is GNU as.
7615 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7616 # Provide /dev/null as input, otherwise gas times out reading from
7618 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7619 set as_output [lindex $status 1]
7620 if { [ string first "GNU" $as_output ] >= 0 } {
7626 return $use_gas_saved
7629 # Return 1 if GNU ld is used.
7631 proc check_effective_target_gld { } {
7632 global use_gld_saved
7635 if {![info exists use_gld_saved]} {
7636 # Check if the ld used by gcc is GNU ld.
7637 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
7638 set status [remote_exec host "$gcc_ld" "--version"]
7639 set ld_output [lindex $status 1]
7640 if { [ string first "GNU" $ld_output ] >= 0 } {
7646 return $use_gld_saved
7649 # Return 1 if the compiler has been configure with link-time optimization
7652 proc check_effective_target_lto { } {
7653 if { [istarget nvptx-*-*] } {
7656 return [check_no_compiler_messages lto object {
7661 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
7663 proc check_effective_target_maybe_x32 { } {
7664 return [check_no_compiler_messages maybe_x32 object {
7666 } "-mx32 -maddress-mode=short"]
7669 # Return 1 if this target supports the -fsplit-stack option, 0
7672 proc check_effective_target_split_stack {} {
7673 return [check_no_compiler_messages split_stack object {
7678 # Return 1 if this target supports the -masm=intel option, 0
7681 proc check_effective_target_masm_intel {} {
7682 return [check_no_compiler_messages masm_intel object {
7683 extern void abort (void);
7687 # Return 1 if the language for the compiler under test is C.
7689 proc check_effective_target_c { } {
7691 if [string match $tool "gcc"] {
7697 # Return 1 if the language for the compiler under test is C++.
7699 proc check_effective_target_c++ { } {
7701 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
7707 set cxx_default "c++14"
7708 # Check whether the current active language standard supports the features
7709 # of C++11/C++14 by checking for the presence of one of the -std flags.
7710 # This assumes that the default for the compiler is $cxx_default, and that
7711 # there will never be multiple -std= arguments on the command line.
7712 proc check_effective_target_c++11_only { } {
7714 if ![check_effective_target_c++] {
7717 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
7720 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
7725 proc check_effective_target_c++11 { } {
7726 if [check_effective_target_c++11_only] {
7729 return [check_effective_target_c++14]
7731 proc check_effective_target_c++11_down { } {
7732 if ![check_effective_target_c++] {
7735 return [expr ![check_effective_target_c++14] ]
7738 proc check_effective_target_c++14_only { } {
7740 if ![check_effective_target_c++] {
7743 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
7746 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
7752 proc check_effective_target_c++14 { } {
7753 if [check_effective_target_c++14_only] {
7756 return [check_effective_target_c++1z]
7758 proc check_effective_target_c++14_down { } {
7759 if ![check_effective_target_c++] {
7762 return [expr ![check_effective_target_c++1z] ]
7765 proc check_effective_target_c++98_only { } {
7767 if ![check_effective_target_c++] {
7770 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
7773 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
7779 proc check_effective_target_c++1z_only { } {
7781 if ![check_effective_target_c++] {
7784 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
7787 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
7792 proc check_effective_target_c++1z { } {
7793 return [check_effective_target_c++1z_only]
7796 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
7797 proc check_effective_target_concepts { } {
7798 return [check-flags { "" { } { -fconcepts } }]
7801 # Return 1 if expensive testcases should be run.
7803 proc check_effective_target_run_expensive_tests { } {
7804 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
7810 # Returns 1 if "mempcpy" is available on the target system.
7812 proc check_effective_target_mempcpy {} {
7813 return [check_function_available "mempcpy"]
7816 # Returns 1 if "stpcpy" is available on the target system.
7818 proc check_effective_target_stpcpy {} {
7819 return [check_function_available "stpcpy"]
7822 # Check whether the vectorizer tests are supported by the target and
7823 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
7824 # If a port wants to execute the tests more than once it should append
7825 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
7826 # will be added by a call to add_options_for_<target>.
7827 # Set dg-do-what-default to either compile or run, depending on target
7828 # capabilities. Do not set this if the supported target is appended to
7829 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
7830 # automatically. Return the number of effective targets if vectorizer tests
7831 # are supported, 0 otherwise.
7833 proc check_vect_support_and_set_flags { } {
7834 global DEFAULT_VECTCFLAGS
7835 global dg-do-what-default
7836 global EFFECTIVE_TARGETS
7838 if [istarget powerpc-*paired*] {
7839 lappend DEFAULT_VECTCFLAGS "-mpaired"
7840 if [check_750cl_hw_available] {
7841 set dg-do-what-default run
7843 set dg-do-what-default compile
7845 } elseif [istarget powerpc*-*-*] {
7846 # Skip targets not supporting -maltivec.
7847 if ![is-effective-target powerpc_altivec_ok] {
7851 lappend DEFAULT_VECTCFLAGS "-maltivec"
7852 if [check_p9vector_hw_available] {
7853 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
7854 } elseif [check_p8vector_hw_available] {
7855 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
7856 } elseif [check_vsx_hw_available] {
7857 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
7860 if [check_vmx_hw_available] {
7861 set dg-do-what-default run
7863 if [is-effective-target ilp32] {
7864 # Specify a cpu that supports VMX for compile-only tests.
7865 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
7867 set dg-do-what-default compile
7869 } elseif { [istarget spu-*-*] } {
7870 set dg-do-what-default run
7871 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7872 lappend DEFAULT_VECTCFLAGS "-msse2"
7873 if { [check_effective_target_sse2_runtime] } {
7874 set dg-do-what-default run
7876 set dg-do-what-default compile
7878 } elseif { [istarget mips*-*-*]
7879 && [check_effective_target_nomips16] } {
7880 if { [check_effective_target_mpaired_single] } {
7881 lappend EFFECTIVE_TARGETS mpaired_single
7883 if { [check_effective_target_mips_loongson] } {
7884 lappend EFFECTIVE_TARGETS mips_loongson
7886 if { [check_effective_target_mips_msa] } {
7887 lappend EFFECTIVE_TARGETS mips_msa
7889 return [llength $EFFECTIVE_TARGETS]
7890 } elseif [istarget sparc*-*-*] {
7891 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
7892 if [check_effective_target_ultrasparc_hw] {
7893 set dg-do-what-default run
7895 set dg-do-what-default compile
7897 } elseif [istarget alpha*-*-*] {
7898 # Alpha's vectorization capabilities are extremely limited.
7899 # It
's more effort than its worth disabling all of the tests
7900 # that it cannot pass. But if you actually want to see what
7901 # does work, command out the return.
7904 lappend DEFAULT_VECTCFLAGS "-mmax"
7905 if [check_alpha_max_hw_available] {
7906 set dg-do-what-default run
7908 set dg-do-what-default compile
7910 } elseif [istarget ia64-*-*] {
7911 set dg-do-what-default run
7912 } elseif [is-effective-target arm_neon_ok] {
7913 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
7914 # NEON does not support denormals, so is not used for vectorization by
7915 # default to avoid loss of precision. We must pass -ffast-math to test
7916 # vectorization of float operations.
7917 lappend DEFAULT_VECTCFLAGS "-ffast-math"
7918 if [is-effective-target arm_neon_hw] {
7919 set dg-do-what-default run
7921 set dg-do-what-default compile
7923 } elseif [istarget "aarch64*-*-*"] {
7924 set dg-do-what-default run
7932 # Return 1 if the target does *not* require strict alignment.
7934 proc check_effective_target_non_strict_align {} {
7936 # On ARM, the default is to use STRICT_ALIGNMENT, but there
7937 # are interfaces defined for misaligned access and thus
7938 # depending on the architecture levels unaligned access is
7940 if [istarget "arm*-*-*"] {
7941 return [check_effective_target_arm_unaligned]
7944 return [check_no_compiler_messages non_strict_align assembly {
7946 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
7948 void foo(void) { z = (c *) y; }
7952 # Return 1 if the target has <ucontext.h>.
7954 proc check_effective_target_ucontext_h { } {
7955 return [check_no_compiler_messages ucontext_h assembly {
7956 #include <ucontext.h>
7960 proc check_effective_target_aarch64_tiny { } {
7961 if { [istarget aarch64*-*-*] } {
7962 return [check_no_compiler_messages aarch64_tiny object {
7963 #ifdef __AARCH64_CMODEL_TINY__
7966 #error target not AArch64 tiny code model
7974 # Create functions to check that the AArch64 assembler supports the
7975 # various architecture extensions via the .arch_extension pseudo-op.
7977 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
7978 eval [string map [list FUNC $aarch64_ext] {
7979 proc check_effective_target_aarch64_asm_FUNC_ok { } {
7980 if { [istarget aarch64*-*-*] } {
7981 return [check_no_compiler_messages aarch64_FUNC_assembler object {
7982 __asm__ (".arch_extension FUNC");
7983 } "-march=armv8-a+FUNC"]
7991 proc check_effective_target_aarch64_small { } {
7992 if { [istarget aarch64*-*-*] } {
7993 return [check_no_compiler_messages aarch64_small object {
7994 #ifdef __AARCH64_CMODEL_SMALL__
7997 #error target not AArch64 small code model
8005 proc check_effective_target_aarch64_large { } {
8006 if { [istarget aarch64*-*-*] } {
8007 return [check_no_compiler_messages aarch64_large object {
8008 #ifdef __AARCH64_CMODEL_LARGE__
8011 #error target not AArch64 large code model
8020 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8021 # register set, instruction set, addressing capabilities and ABI.
8023 proc check_effective_target_avr_tiny { } {
8024 if { [istarget avr*-*-*] } {
8025 return [check_no_compiler_messages avr_tiny object {
8029 #error target not a reduced AVR Tiny core
8037 # Return 1 if <fenv.h> is available with all the standard IEEE
8038 # exceptions and floating-point exceptions are raised by arithmetic
8039 # operations. (If the target requires special options for "inexact"
8040 # exceptions, those need to be specified in the testcases.)
8042 proc check_effective_target_fenv_exceptions {} {
8043 return [check_runtime fenv_exceptions {
8046 #ifndef FE_DIVBYZERO
8047 # error Missing FE_DIVBYZERO
8050 # error Missing FE_INEXACT
8053 # error Missing FE_INVALID
8056 # error Missing FE_OVERFLOW
8058 #ifndef FE_UNDERFLOW
8059 # error Missing FE_UNDERFLOW
8061 volatile float a = 0.0f, r;
8066 if (fetestexcept (FE_INVALID))
8071 } [add_options_for_ieee "-std=gnu99"]]
8074 proc check_effective_target_tiny {} {
8075 global et_target_tiny_saved
8077 if [info exists et_target_tiny_saved] {
8078 verbose "check_effective_target_tiny: using cached result" 2
8080 set et_target_tiny_saved 0
8081 if { [istarget aarch64*-*-*]
8082 && [check_effective_target_aarch64_tiny] } {
8083 set et_target_tiny_saved 1
8085 if { [istarget avr-*-*]
8086 && [check_effective_target_avr_tiny] } {
8087 set et_target_tiny_saved 1
8091 return $et_target_tiny_saved
8094 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8096 proc check_effective_target_logical_op_short_circuit {} {
8097 if { [istarget mips*-*-*]
8098 || [istarget arc*-*-*]
8099 || [istarget avr*-*-*]
8100 || [istarget crisv32-*-*] || [istarget cris-*-*]
8101 || [istarget mmix-*-*]
8102 || [istarget s390*-*-*]
8103 || [istarget powerpc*-*-*]
8104 || [istarget nios2*-*-*]
8105 || [istarget riscv*-*-*]
8106 || [istarget visium-*-*]
8107 || [check_effective_target_arm_cortex_m] } {
8113 # Record that dg-final test TEST requires convential compilation.
8115 proc force_conventional_output_for { test } {
8116 if { [info proc $test] == "" } {
8117 perror "$test does not exist"
8120 proc ${test}_required_options {} {
8121 global gcc_force_conventional_output
8122 return $gcc_force_conventional_output
8126 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8127 # otherwise. Cache the result.
8129 proc check_effective_target_pie_copyreloc { } {
8130 global pie_copyreloc_available_saved
8132 global GCC_UNDER_TEST
8134 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8138 # Need auto-host.h to check linker support.
8139 if { ![file exists ../../auto-host.h ] } {
8143 if [info exists pie_copyreloc_available_saved] {
8144 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8146 # Set up and compile to see if linker supports PIE with copy
8147 # reloc. Include the current process ID in the file names to
8148 # prevent conflicts with invocations for multiple testsuites.
8153 set f [open $src "w"]
8154 puts $f "#include \"../../auto-host.h\""
8155 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8156 puts $f "# error Linker does not support PIE with copy reloc."
8160 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8161 set lines [${tool}_target_compile $src $obj object ""]
8166 if [string match "" $lines] then {
8167 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8168 set pie_copyreloc_available_saved 1
8170 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8171 set pie_copyreloc_available_saved 0
8175 return $pie_copyreloc_available_saved
8178 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8179 # otherwise. Cache the result.
8181 proc check_effective_target_got32x_reloc { } {
8182 global got32x_reloc_available_saved
8184 global GCC_UNDER_TEST
8186 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8190 # Need auto-host.h to check linker support.
8191 if { ![file exists ../../auto-host.h ] } {
8195 if [info exists got32x_reloc_available_saved] {
8196 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8198 # Include the current process ID in the file names to prevent
8199 # conflicts with invocations for multiple testsuites.
8201 set src got32x[pid].c
8202 set obj got32x[pid].o
8204 set f [open $src "w"]
8205 puts $f "#include \"../../auto-host.h\""
8206 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8207 puts $f "# error Assembler does not support R_386_GOT32X."
8211 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8212 set lines [${tool}_target_compile $src $obj object ""]
8217 if [string match "" $lines] then {
8218 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8219 set got32x_reloc_available_saved 1
8221 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8222 set got32x_reloc_available_saved 0
8226 return $got32x_reloc_available_saved
8229 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8230 # 0 otherwise. Cache the result.
8232 proc check_effective_target_tls_get_addr_via_got { } {
8233 global tls_get_addr_via_got_available_saved
8235 global GCC_UNDER_TEST
8237 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8241 # Need auto-host.h to check linker support.
8242 if { ![file exists ../../auto-host.h ] } {
8246 if [info exists tls_get_addr_via_got_available_saved] {
8247 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8249 # Include the current process ID in the file names to prevent
8250 # conflicts with invocations for multiple testsuites.
8252 set src tls_get_addr_via_got[pid].c
8253 set obj tls_get_addr_via_got[pid].o
8255 set f [open $src "w"]
8256 puts $f "#include \"../../auto-host.h\""
8257 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8258 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8262 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8263 set lines [${tool}_target_compile $src $obj object ""]
8268 if [string match "" $lines] then {
8269 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8270 set tls_get_addr_via_got_available_saved 1
8272 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8273 set tls_get_addr_via_got_available_saved 0
8277 return $tls_get_addr_via_got_available_saved
8280 # Return 1 if the target uses comdat groups.
8282 proc check_effective_target_comdat_group {} {
8283 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8285 inline int foo () { return 1; }
8290 # Return 1 if target supports __builtin_eh_return
8291 proc check_effective_target_builtin_eh_return { } {
8292 return [check_no_compiler_messages builtin_eh_return object {
8293 void test (long l, void *p)
8295 __builtin_eh_return (l, p);
8300 # Return 1 if the target supports max reduction for vectors.
8302 proc check_effective_target_vect_max_reduc { } {
8303 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
8309 # Return 1 if there is an nvptx offload compiler.
8311 proc check_effective_target_offload_nvptx { } {
8312 return [check_no_compiler_messages offload_nvptx object {
8313 int main () {return 0;}
8314 } "-foffload=nvptx-none" ]
8317 # Return 1 if the compiler has been configured with hsa offloading.
8319 proc check_effective_target_offload_hsa { } {
8320 return [check_no_compiler_messages offload_hsa assembly {
8321 int main () {return 0;}
8325 # Return 1 if the target support -fprofile-update=atomic
8326 proc check_effective_target_profile_update_atomic {} {
8327 return [check_no_compiler_messages profile_update_atomic assembly {
8328 int main (void) { return 0; }
8329 } "-fprofile-update=atomic -fprofile-generate"]
8332 # Return 1 if vector (va - vector add) instructions are understood by
8333 # the assembler and can be executed. This also covers checking for
8334 # the VX kernel feature. A kernel without that feature does not
8335 # enable the vector facility and the following check will die with a
8337 proc check_effective_target_s390_vx { } {
8338 if ![istarget s390*-*-*] then {
8342 return [check_runtime s390_check_vx {
8345 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8348 } "-march=z13 -mzarch" ]
8351 # Same as above but for the arch12 vector enhancement facility. Test
8352 # is performed with the vector nand instruction.
8353 proc check_effective_target_s390_vxe { } {
8354 if ![istarget s390*-*-*] then {
8358 return [check_runtime s390_check_vxe {
8361 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8364 } "-march=arch12 -mzarch" ]
8367 #For versions of ARM architectures that have hardware div insn,
8368 #disable the divmod transform
8370 proc check_effective_target_arm_divmod_simode { } {
8371 return [check_no_compiler_messages arm_divmod assembly {
8372 #ifdef __ARM_ARCH_EXT_IDIV__
8379 # Return 1 if target supports divmod hardware insn or divmod libcall.
8381 proc check_effective_target_divmod { } {
8382 #TODO: Add checks for all targets that have either hardware divmod insn
8383 # or define libfunc for divmod.
8384 if { [istarget arm*-*-*]
8385 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8391 # Return 1 if target supports divmod for SImode. The reason for
8392 # separating this from check_effective_target_divmod is that
8393 # some versions of ARM architecture define div instruction
8394 # only for simode, and for these archs, we do not want to enable
8395 # divmod transform for simode.
8397 proc check_effective_target_divmod_simode { } {
8398 if { [istarget arm*-*-*] } {
8399 return [check_effective_target_arm_divmod_simode]
8402 return [check_effective_target_divmod]
8405 # Return 1 if store merging optimization is applicable for target.
8406 # Store merging is not profitable for targets like the avr which
8407 # can load/store only one byte at a time. Use int size as a proxy
8408 # for the number of bytes the target can write, and skip for targets
8409 # with a smallish (< 32) size.
8411 proc check_effective_target_store_merge { } {
8412 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8419 # Return 1 if we're able to assemble rdrand
8421 proc check_effective_target_rdrand
{ } {
8422 return [check_no_compiler_messages_nocache rdrand object
{
8427 __builtin_ia32_rdrand32_step
(&val
);
8433 #
Return 1 if the target supports coprocessor instructions
: cdp
, ldc
, stc
, mcr and
8435 proc check_effective_target_arm_coproc1_ok_nocache
{ } {
8436 if { ![istarget arm
*-*-*] } {
8439 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly
{
8440 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 4
8446 proc check_effective_target_arm_coproc1_ok
{ } {
8447 return [check_cached_effective_target arm_coproc1_ok \
8448 check_effective_target_arm_coproc1_ok_nocache
]
8451 #
Return 1 if the target supports all coprocessor instructions checked by
8452 # check_effective_target_arm_coproc1_ok in addition to the following
: cdp2
,
8453 # ldc2
, ldc2l
, stc2
, stc2l
, mcr2 and mrc2.
8454 proc check_effective_target_arm_coproc2_ok_nocache
{ } {
8455 if { ![check_effective_target_arm_coproc1_ok
] } {
8458 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly
{
8465 proc check_effective_target_arm_coproc2_ok
{ } {
8466 return [check_cached_effective_target arm_coproc2_ok \
8467 check_effective_target_arm_coproc2_ok_nocache
]
8470 #
Return 1 if the target supports all coprocessor instructions checked by
8471 # check_effective_target_arm_coproc2_ok in addition the following
: mcrr and
8473 proc check_effective_target_arm_coproc3_ok_nocache
{ } {
8474 if { ![check_effective_target_arm_coproc2_ok
] } {
8477 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly
{
8478 #
if __ARM_ARCH
< 6 && !defined
(__ARM_ARCH_5TE__
)
8484 proc check_effective_target_arm_coproc3_ok
{ } {
8485 return [check_cached_effective_target arm_coproc3_ok \
8486 check_effective_target_arm_coproc3_ok_nocache
]
8489 #
Return 1 if the target supports all coprocessor instructions checked by
8490 # check_effective_target_arm_coproc3_ok in addition the following
: mcrr2 and
8492 proc check_effective_target_arm_coproc4_ok_nocache
{ } {
8493 if { ![check_effective_target_arm_coproc3_ok
] } {
8496 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly
{
8503 proc check_effective_target_arm_coproc4_ok
{ } {
8504 return [check_cached_effective_target arm_coproc4_ok \
8505 check_effective_target_arm_coproc4_ok_nocache
]
8508 #
Return 1 if the target supports the auto_inc_dec optimization pass.
8509 proc check_effective_target_autoincdec
{ } {
8510 if { ![check_no_compiler_messages auto_incdec assembly
{ void f
() { }
8511 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
8515 set dumpfile
[glob
-nocomplain
"auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
8516 if { [file
exists $dumpfile
] } {
8517 file
delete $dumpfile