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* target.h (asm_out.byte_op, asm_out.aligned_op, asm_out.unaligned_op,
[official-gcc.git] / gcc / config / i370 / i370.h
blob826382fbe6076935126a11b56347b3e6aa5715a7
1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000
3 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27 /* Run-time compilation parameters selecting different hardware subsets. */
28
29 extern int target_flags;
30
31 /* The sizes of the code and literals on the current page. */
32
33 extern int mvs_page_code, mvs_page_lit;
34
35 /* The current page number and the base page number for the function. */
36
37 extern int mvs_page_num, function_base_page;
38
39 /* The name of the current function. */
40
41 extern char *mvs_function_name;
42
43 /* The length of the function name malloc'd area. */
44
45 extern int mvs_function_name_length;
46
47 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
48 these are more than twice as fast as load-op-store.
49 On 3090 don't use this since load-op-store is much faster. */
50
51 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
52
53 /* Default target switches */
54
55 #define TARGET_DEFAULT 1
56
57 /* Macro to define tables used to set the flags. This is a list in braces
58 of pairs in braces, each pair being { "NAME", VALUE }
59 where VALUE is the bits to set or minus the bits to clear.
60 An empty string NAME is used to identify the default VALUE. */
61
62 #define TARGET_SWITCHES \
63 { { "char-instructions", 1, N_("Generate char instructions")}, \
64 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
65 { "", TARGET_DEFAULT, 0} }
66
67 /* To use IBM supplied macro function prologue and epilogue, define the
68 following to 1. Should only be needed if IBM changes the definition
69 of their prologue and epilogue. */
70
71 #define MACROPROLOGUE 0
72 #define MACROEPILOGUE 0
73
74 /* Target machine storage layout */
75
76 /* Define this if most significant bit is lowest numbered in instructions
77 that operate on numbered bit-fields. */
78
79 #define BITS_BIG_ENDIAN 1
80
81 /* Define this if most significant byte of a word is the lowest numbered. */
82
83 #define BYTES_BIG_ENDIAN 1
84
85 /* Define this if MS word of a multiword is the lowest numbered. */
86
87 #define WORDS_BIG_ENDIAN 1
88
89 /* Number of bits in an addressable storage unit. */
90
91 #define BITS_PER_UNIT 8
92
93 /* Width in bits of a "word", which is the contents of a machine register. */
94
95 #define BITS_PER_WORD 32
96
97 /* Width of a word, in units (bytes). */
98
99 #define UNITS_PER_WORD 4
100
101 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
102
103 #define POINTER_SIZE 32
104
105 /* Allocation boundary (in *bits*) for storing pointers in memory. */
106
107 #define POINTER_BOUNDARY 32
108
109 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
110
111 #define PARM_BOUNDARY 32
112
113 /* Boundary (in *bits*) on which stack pointer should be aligned. */
114
115 #define STACK_BOUNDARY 32
116
117 /* Allocation boundary (in *bits*) for the code of a function. */
118
119 #define FUNCTION_BOUNDARY 32
120
121 /* There is no point aligning anything to a rounder boundary than this. */
122
123 #define BIGGEST_ALIGNMENT 64
124
125 /* Alignment of field after `int : 0' in a structure. */
126
127 #define EMPTY_FIELD_BOUNDARY 32
128
129 /* Define this if move instructions will actually fail to work when given
130 unaligned data. */
131
132 #define STRICT_ALIGNMENT 0
133
134 /* Define target floating point format. */
135
136 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
137
138 /* Define character mapping for cross-compiling. */
139 /* but only define it if really needed, since otherwise it will break builds */
140
141 #ifdef TARGET_EBCDIC
142 #ifdef HOST_EBCDIC
143 #define MAP_CHARACTER(c) ((char)(c))
144 #else
145 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
146 #endif
147 #endif
148
149 #ifdef TARGET_HLASM
150 /* HLASM requires #pragma map. */
151 #define REGISTER_TARGET_PRAGMAS(PFILE) \
152 cpp_register_pragma (PFILE, 0, "map", i370_pr_map)
153 #endif /* TARGET_HLASM */
154
155 /* Define maximum length of page minus page escape overhead. */
156
157 #define MAX_MVS_PAGE_LENGTH 4080
158
159 /* Define special register allocation order desired.
160 Don't fiddle with this. I did, and I got all sorts of register
161 spill errors when compiling even relatively simple programs...
162 I have no clue why ...
163 E.g. this one is bad:
164 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
165 */
166
167 #define REG_ALLOC_ORDER \
168 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
169
170 /* Standard register usage. */
171
172 /* Number of actual hardware registers. The hardware registers are
173 assigned numbers for the compiler from 0 to just below
174 FIRST_PSEUDO_REGISTER.
175 All registers that the compiler knows about must be given numbers,
176 even those that are not normally considered general registers.
177 For the 370, we give the data registers numbers 0-15,
178 and the floating point registers numbers 16-19. */
179
180 #define FIRST_PSEUDO_REGISTER 20
181
182 /* Define base and page registers. */
183
184 #define BASE_REGISTER 3
185 #define PAGE_REGISTER 4
186
187 #ifdef TARGET_HLASM
188 /* 1 for registers that have pervasive standard uses and are not available
189 for the register allocator. These are registers that must have fixed,
190 valid values stored in them for the entire length of the subroutine call,
191 and must not in any way be moved around, jiggered with, etc. That is,
192 they must never be clobbered, and, if clobbered, the register allocator
193 will never restore them back.
194
195 We use five registers in this special way:
196 -- R3 which is used as the base register
197 -- R4 the page origin table pointer used to load R3,
198 -- R11 the arg pointer.
199 -- R12 the TCA pointer
200 -- R13 the stack (DSA) pointer
201
202 A fifth register is also exceptional: R14 is used in many branch
203 instructions to hold the target of the branch. Technically, this
204 does not qualify R14 as a register with a long-term meaning; it should
205 be enough, theoretically, to note that these instructions clobber
206 R14, and let the compiler deal with that. In practice, however,
207 the "clobber" directive acts as a barrier to optimization, and the
208 optimizer appears to be unable to perform optimizations around branches.
209 Thus, a much better strategy appears to give R14 a pervasive use;
210 this eliminates it from the register pool witout hurting optimization.
211
212 There are other registers which have special meanings, but its OK
213 for them to get clobbered, since other allocator config below will
214 make sure that they always have the right value. These are for
215 example:
216 -- R1 the returned structure pointer.
217 -- R10 the static chain reg.
218 -- R15 holds the value a subroutine returns.
219
220 Notice that it is *almost* safe to mark R11 as available to the allocator.
221 By marking it as a call_used_register, in most cases, the compiler
222 can handle it being clobbered. However, there are a few rare
223 circumstances where the register allocator will allocate r11 and
224 also try to use it as the arg pointer ... thus it must be marked fixed.
225 I think this is a bug, but I can't track it down...
226 */
227
228 #define FIXED_REGISTERS \
229 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
230 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
231
232 /* 1 for registers not available across function calls. These must include
233 the FIXED_REGISTERS and also any registers that can be used without being
234 saved.
235 The latter must include the registers where values are returned
236 and the register where structure-value addresses are passed.
237 NOTE: all floating registers are undefined across calls.
238 */
239
240 #define CALL_USED_REGISTERS \
241 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
242 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
243
244 /* Return number of consecutive hard regs needed starting at reg REGNO
245 to hold something of mode MODE.
246 This is ordinarily the length in words of a value of mode MODE
247 but can be less for certain modes in special long registers.
248 Note that DCmode (complex double) needs two regs.
249 */
250 #endif /* TARGET_HLASM */
251
252 /* ================= */
253 #ifdef TARGET_ELF_ABI
254 /* The Linux/ELF ABI uses the same register layout as the
255 * the MVS/OE version, with the following exceptions:
256 * -- r12 (rtca) is not used.
257 */
258
259 #define FIXED_REGISTERS \
260 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
261 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
262
263 #define CALL_USED_REGISTERS \
264 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
265 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
266
267 #endif /* TARGET_ELF_ABI */
268 /* ================= */
269
270
271 #define HARD_REGNO_NREGS(REGNO, MODE) \
272 ((REGNO) > 15 ? \
273 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
274 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
275
276 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
277 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
278 even registers can hold DI. The floating point registers can hold
279 either SF, DF, SC or DC. */
280
281 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
282 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
283 (((MODE) != DImode) && ((MODE) != DFmode))) \
284 : ((MODE) == SFmode || (MODE) == DFmode) || \
285 (MODE) == SCmode || (MODE) == DCmode)
286
287 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
288 mode MODE1 and one has mode MODE2.
289 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
290 for any hard reg, then this must be 0 for correct output. */
291
292 #define MODES_TIEABLE_P(MODE1, MODE2) \
293 (((MODE1) == SFmode || (MODE1) == DFmode) \
294 == ((MODE2) == SFmode || (MODE2) == DFmode))
295
296 /* Mark external references. */
297
298 #define ENCODE_SECTION_INFO(decl) \
299 if (DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)) \
300 SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1;
301
302 /* Specify the registers used for certain standard purposes.
303 The values of these macros are register numbers. */
304
305 /* 370 PC isn't overloaded on a register. */
306
307 /* #define PC_REGNUM */
308
309 /* Register to use for pushing function arguments. */
310
311 #define STACK_POINTER_REGNUM 13
312
313 /* Base register for access to local variables of the function. */
314
315 #define FRAME_POINTER_REGNUM 13
316
317 /* Value should be nonzero if functions must have frame pointers.
318 Zero means the frame pointer need not be set up (and parms may be
319 accessed via the stack pointer) in functions that seem suitable.
320 This is computed in `reload', in reload1.c. */
321
322 #define FRAME_POINTER_REQUIRED 1
323
324 /* Base register for access to arguments of the function. */
325
326 #define ARG_POINTER_REGNUM 11
327
328 /* R10 is register in which static-chain is passed to a function.
329 Static-chaining is done when a nested function references as a global
330 a stack variable of its parent: e.g.
331 int parent_func (int arg) {
332 int x; // x is in parents stack
333 void child_func (void) { x++: } // child references x as global var
334 ...
335 }
336 */
337
338 #define STATIC_CHAIN_REGNUM 10
339
340 /* R1 is register in which address to store a structure value is passed to
341 a function. This is used only when returning 64-bit long-long in a 32-bit arch
342 and when calling functions that return structs by value. e.g.
343 typedef struct A_s { int a,b,c; } A_t;
344 A_t fun_returns_value (void) {
345 A_t a; a.a=1; a.b=2 a.c=3;
346 return a;
347 }
348 In the above, the storage for the return value is in the callers stack, and
349 the R1 points at that mem location.
350 */
351
352 #define STRUCT_VALUE_REGNUM 1
353
354 /* Define the classes of registers for register constraints in the
355 machine description. Also define ranges of constants.
356
357 One of the classes must always be named ALL_REGS and include all hard regs.
358 If there is more than one class, another class must be named NO_REGS
359 and contain no registers.
360
361 The name GENERAL_REGS must be the name of a class (or an alias for
362 another name such as ALL_REGS). This is the class of registers
363 that is allowed by "g" or "r" in a register constraint.
364 Also, registers outside this class are allocated only when
365 instructions express preferences for them.
366
367 The classes must be numbered in nondecreasing order; that is,
368 a larger-numbered class must never be contained completely
369 in a smaller-numbered class.
370
371 For any two classes, it is very desirable that there be another
372 class that represents their union. */
373
374 enum reg_class
375 {
376 NO_REGS, ADDR_REGS, DATA_REGS,
377 FP_REGS, ALL_REGS, LIM_REG_CLASSES
378 };
379
380 #define GENERAL_REGS DATA_REGS
381 #define N_REG_CLASSES (int) LIM_REG_CLASSES
382
383 /* Give names of register classes as strings for dump file. */
384
385 #define REG_CLASS_NAMES \
386 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
387
388 /* Define which registers fit in which classes. This is an initializer for
389 a vector of HARD_REG_SET of length N_REG_CLASSES. */
390
391 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
392
393 /* The same information, inverted:
394 Return the class number of the smallest class containing
395 reg number REGNO. This could be a conditional expression
396 or could index an array. */
397
398 #define REGNO_REG_CLASS(REGNO) \
399 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
400
401 /* The class value for index registers, and the one for base regs. */
402
403 #define INDEX_REG_CLASS ADDR_REGS
404 #define BASE_REG_CLASS ADDR_REGS
405
406 /* Get reg_class from a letter such as appears in the machine description. */
407
408 #define REG_CLASS_FROM_LETTER(C) \
409 ((C) == 'a' ? ADDR_REGS : \
410 ((C) == 'd' ? DATA_REGS : \
411 ((C) == 'f' ? FP_REGS : NO_REGS)))
412
413 /* The letters I, J, K, L and M in a register constraint string can be used
414 to stand for particular ranges of immediate operands.
415 This macro defines what the ranges are.
416 C is the letter, and VALUE is a constant value.
417 Return 1 if VALUE is in the range specified by C. */
418
419 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
420 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
421 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
422 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
423
424 /* Similar, but for floating constants, and defining letters G and H.
425 Here VALUE is the CONST_DOUBLE rtx itself. */
426
427 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
428
429 /* see recog.c for details */
430 #define EXTRA_CONSTRAINT(OP,C) \
431 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
432 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
433
434 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
435 return the class of reg to actually use. In general this is just CLASS;
436 but on some machines in some cases it is preferable to use a more
437 restrictive class.
438
439 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
440 rare occasions when lots of egisters are spilled, reload() will try
441 to put a const int into r0 and then use r0 as an index register.
442 */
443
444 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
445 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
446 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
447 GET_CODE(X) == LABEL_REF || \
448 GET_CODE(X) == SYMBOL_REF || \
449 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
450
451 /* Return the maximum number of consecutive registers needed to represent
452 mode MODE in a register of class CLASS.
453 Note that DCmode (complex double) needs two regs.
454 */
455
456 #define CLASS_MAX_NREGS(CLASS, MODE) \
457 ((CLASS) == FP_REGS ? \
458 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
459 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
460
461 /* Stack layout; function entry, exit and calling. */
462
463 /* Define this if pushing a word on the stack makes the stack pointer a
464 smaller address. */
465 /* ------------------------------------------------------------------- */
466
467 /* ================= */
468 #ifdef TARGET_HLASM
469 /* #define STACK_GROWS_DOWNWARD */
470
471 /* Define this if the nominal address of the stack frame is at the
472 high-address end of the local variables; that is, each additional local
473 variable allocated goes at a more negative offset in the frame. */
474
475 /* #define FRAME_GROWS_DOWNWARD */
476
477 /* Offset within stack frame to start allocating local variables at.
478 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
479 first local allocated. Otherwise, it is the offset to the BEGINNING
480 of the first local allocated. */
481
482 #define STARTING_FRAME_OFFSET \
483 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
484
485 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
486
487 /* If we generate an insn to push BYTES bytes, this says how many the stack
488 pointer really advances by. On the 370, we have no push instruction. */
489
490 #endif /* TARGET_HLASM */
491
492 /* ================= */
493 #ifdef TARGET_ELF_ABI
494
495 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
496 But we want the compiler to generate posistive displacements from the
497 stack pointer, and so we make the frame lie above the stack. */
498
499 #define STACK_GROWS_DOWNWARD
500 /* #define FRAME_GROWS_DOWNWARD */
501
502 /* Offset within stack frame to start allocating local variables at.
503 This is the offset to the BEGINNING of the first local allocated. */
504
505 #define STARTING_FRAME_OFFSET \
506 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
507
508 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
509
510 #endif /* TARGET_ELF_ABI */
511 /* ================= */
512
513 /* #define PUSH_ROUNDING(BYTES) */
514
515 /* Accumulate the outgoing argument count so we can request the right
516 DSA size and determine stack offset. */
517
518 #define ACCUMULATE_OUTGOING_ARGS 1
519
520 /* Define offset from stack pointer, to location where a parm can be
521 pushed. */
522
523 #define STACK_POINTER_OFFSET 148
524
525 /* Offset of first parameter from the argument pointer register value. */
526
527 #define FIRST_PARM_OFFSET(FNDECL) 0
528
529 /* 1 if N is a possible register number for function argument passing.
530 On the 370, no registers are used in this way. */
531
532 #define FUNCTION_ARG_REGNO_P(N) 0
533
534 /* Define a data type for recording info about an argument list during
535 the scan of that argument list. This data type should hold all
536 necessary information about the function itself and about the args
537 processed so far, enough to enable macros such as FUNCTION_ARG to
538 determine where the next arg should go. */
539
540 #define CUMULATIVE_ARGS int
541
542 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
543 a function whose data type is FNTYPE.
544 For a library call, FNTYPE is 0. */
545
546 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
547
548 /* Update the data in CUM to advance over an argument of mode MODE and
549 data type TYPE. (TYPE is null for libcalls where that information
550 may not be available.) */
551
552 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
553 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
554 ? 256 \
555 : (MODE) != BLKmode \
556 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
557 : (int_size_in_bytes (TYPE) + 3) / 4))
558
559 /* Define where to put the arguments to a function. Value is zero to push
560 the argument on the stack, or a hard register in which to store the
561 argument. */
562
563 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
564
565 /* For an arg passed partly in registers and partly in memory, this is the
566 number of registers used. For args passed entirely in registers or
567 entirely in memory, zero. */
568
569 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
570
571 /* Define if returning from a function call automatically pops the
572 arguments described by the number-of-args field in the call. */
573
574 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
575
576 /* The FUNCTION_VALUE macro defines how to find the value returned by a
577 function. VALTYPE is the data type of the value (as a tree).
578 If the precise function being called is known, FUNC is its FUNCTION_DECL;
579 otherwise, FUNC is NULL.
580
581 On the 370 the return value is in R15 or R16. However,
582 DImode (64-bit ints) scalars need to get returned on the stack,
583 with r15 pointing to the location. To accomplish this, we define
584 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
585 and the DImode scalars.
586 */
587
588 #define RET_REG(MODE) \
589 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
590
591 #define FUNCTION_VALUE(VALTYPE, FUNC) \
592 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
593
594 #define RETURN_IN_MEMORY(VALTYPE) \
595 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
596
597 /* Define how to find the value returned by a library function assuming
598 the value has mode MODE. */
599
600 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
601
602 /* 1 if N is a possible register number for a function value.
603 On the 370 under C/370, R15 and R16 are thus used. */
604
605 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
606
607 /* This macro definition sets up a default value for `main' to return. */
608
609 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
610
611
612 /* Output assembler code for a block containing the constant parts of a
613 trampoline, leaving space for the variable parts.
614
615 On the 370, the trampoline contains these instructions:
616
617 BALR 14,0
618 USING *,14
619 L STATIC_CHAIN_REGISTER,X
620 L 15,Y
621 BR 15
622 X DS 0F
623 Y DS 0F */
624 /*
625 I am confused as to why this emitting raw binary, instead of instructions ...
626 see for example, rs6000/rs000.c for an example of a different way to
627 do this ... especially since BASR should probably be substituted for BALR.
628 */
629
630 #define TRAMPOLINE_TEMPLATE(FILE) \
631 { \
632 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
633 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
634 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
635 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
636 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
637 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
638 assemble_aligned_integer (2, const0_rtx); \
639 assemble_aligned_integer (2, const0_rtx); \
640 assemble_aligned_integer (2, const0_rtx); \
641 assemble_aligned_integer (2, const0_rtx); \
642 }
643
644 /* Length in units of the trampoline for entering a nested function. */
645
646 #define TRAMPOLINE_SIZE 20
647
648 /* Emit RTL insns to initialize the variable parts of a trampoline. */
649
650 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
651 { \
652 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
653 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
654 }
655
656 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
657 pointer does not matter (provided there is a frame pointer). */
658
659 #define EXIT_IGNORE_STACK 1
660
661 /* Addressing modes, and classification of registers for them. */
662
663 /* #define HAVE_POST_INCREMENT */
664 /* #define HAVE_POST_DECREMENT */
665
666 /* #define HAVE_PRE_DECREMENT */
667 /* #define HAVE_PRE_INCREMENT */
668
669 /* These assume that REGNO is a hard or pseudo reg number. They give
670 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
671 reg currently allocated to a suitable hard reg.
672 These definitions are NOT overridden anywhere. */
673
674 #define REGNO_OK_FOR_INDEX_P(REGNO) \
675 (((REGNO) > 0 && (REGNO) < 16) \
676 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
677
678 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
679
680 #define REGNO_OK_FOR_DATA_P(REGNO) \
681 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
682
683 #define REGNO_OK_FOR_FP_P(REGNO) \
684 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
685
686 /* Now macros that check whether X is a register and also,
687 strictly, whether it is in a specified class. */
688
689 /* 1 if X is a data register. */
690
691 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
692
693 /* 1 if X is an fp register. */
694
695 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
696
697 /* 1 if X is an address register. */
698
699 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
700
701 /* Maximum number of registers that can appear in a valid memory address. */
702
703 #define MAX_REGS_PER_ADDRESS 2
704
705 /* Recognize any constant value that is a valid address. */
706
707 #define CONSTANT_ADDRESS_P(X) \
708 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
709 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
710 || (GET_CODE (X) == CONST \
711 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
712 || (GET_CODE (X) == CONST \
713 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
714 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
715
716 /* Nonzero if the constant value X is a legitimate general operand.
717 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
718
719 #define LEGITIMATE_CONSTANT_P(X) 1
720
721 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
722 its validity for a certain class. We have two alternate definitions
723 for each of them. The usual definition accepts all pseudo regs; the
724 other rejects them all. The symbol REG_OK_STRICT causes the latter
725 definition to be used.
726
727 Most source files want to accept pseudo regs in the hope that they will
728 get allocated to the class that the insn wants them to be in.
729 Some source files that are used after register allocation
730 need to be strict. */
731
732 #ifndef REG_OK_STRICT
733
734 /* Nonzero if X is a hard reg that can be used as an index or if it is
735 a pseudo reg. */
736
737 #define REG_OK_FOR_INDEX_P(X) \
738 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
739
740 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
741 a pseudo reg. */
742
743 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
744
745 #else /* REG_OK_STRICT */
746
747 /* Nonzero if X is a hard reg that can be used as an index. */
748
749 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
750
751 /* Nonzero if X is a hard reg that can be used as a base reg. */
752
753 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
754
755 #endif /* REG_OK_STRICT */
756
757 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
758 valid memory address for an instruction.
759 The MODE argument is the machine mode for the MEM expression
760 that wants to use this address.
761
762 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
763 except for CONSTANT_ADDRESS_P which is actually machine-independent.
764 */
765
766 #define COUNT_REGS(X, REGS, FAIL) \
767 if (REG_P (X)) { \
768 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
769 else goto FAIL; \
770 } \
771 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
772 goto FAIL;
773
774 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
775 { \
776 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
777 goto ADDR; \
778 if (GET_CODE (X) == PLUS) \
779 { \
780 int regs = 0; \
781 rtx x0 = XEXP (X, 0); \
782 rtx x1 = XEXP (X, 1); \
783 if (GET_CODE (x0) == PLUS) \
784 { \
785 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
786 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
787 COUNT_REGS (x1, regs, FAIL); \
788 if (regs == 2) \
789 goto ADDR; \
790 } \
791 else if (GET_CODE (x1) == PLUS) \
792 { \
793 COUNT_REGS (x0, regs, FAIL); \
794 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
795 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
796 if (regs == 2) \
797 goto ADDR; \
798 } \
799 else \
800 { \
801 COUNT_REGS (x0, regs, FAIL); \
802 COUNT_REGS (x1, regs, FAIL); \
803 if (regs != 0) \
804 goto ADDR; \
805 } \
806 } \
807 FAIL: ; \
808 }
809
810 /* The 370 has no mode dependent addresses. */
811
812 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
813
814 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
815 Try machine-dependent ways of modifying an illegitimate address
816 to be legitimate. If we find one, return the new, valid address.
817 This macro is used in only one place: `memory_address' in explow.c.
818
819 Several comments:
820 (1) It's not obvious that this macro results in better code
821 than its omission does. For historical reasons we leave it in.
822
823 (2) This macro may be (???) implicated in the accidental promotion
824 or RS operand to RX operands, which bombs out any RS, SI, SS
825 instruction that was expecting a simple address. Note that
826 this occurs fairly rarely ...
827
828 (3) There is a bug somewhere that causes either r4 to be spilled,
829 or causes r0 to be used as a base register. Changeing the macro
830 below will make the bug move around, but will not make it go away
831 ... Note that this is a rare bug ...
832
833 */
834
835 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
836 { \
837 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
838 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
839 copy_to_mode_reg (SImode, XEXP (X, 1))); \
840 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
841 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
842 copy_to_mode_reg (SImode, XEXP (X, 0))); \
843 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
844 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
845 force_operand (XEXP (X, 0), 0)); \
846 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
847 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
848 force_operand (XEXP (X, 1), 0)); \
849 if (memory_address_p (MODE, X)) \
850 goto WIN; \
851 }
852
853 /* Specify the machine mode that this machine uses for the index in the
854 tablejump instruction. */
855
856 #define CASE_VECTOR_MODE SImode
857
858 /* Define this if the tablejump instruction expects the table to contain
859 offsets from the address of the table.
860 Do not define this if the table should contain absolute addresses. */
861
862 /* #define CASE_VECTOR_PC_RELATIVE */
863
864 /* Specify the tree operation to be used to convert reals to integers. */
865
866 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
867
868 /* Define this if fixuns_trunc is the same as fix_trunc. */
869
870 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
871
872 /* We use "unsigned char" as default. */
873
874 #define DEFAULT_SIGNED_CHAR 0
875
876 /* This is the kind of divide that is easiest to do in the general case. */
877
878 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
879
880 /* Max number of bytes we can move from memory to memory in one reasonably
881 fast instruction. */
882
883 #define MOVE_MAX 256
884
885 /* Define this if zero-extension is slow (more than one real instruction). */
886
887 #define SLOW_ZERO_EXTEND 1
888
889 /* Nonzero if access to memory by bytes is slow and undesirable. */
890
891 #define SLOW_BYTE_ACCESS 1
892
893 /* Define if shifts truncate the shift count which implies one can omit
894 a sign-extension or zero-extension of a shift count. */
895
896 /* #define SHIFT_COUNT_TRUNCATED */
897
898 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
899 is done just by pretending it is already truncated. */
900
901 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
902
903 /* We assume that the store-condition-codes instructions store 0 for false
904 and some other value for true. This is the value stored for true. */
905
906 /* #define STORE_FLAG_VALUE (-1) */
907
908 /* When a prototype says `char' or `short', really pass an `int'. */
909
910 #define PROMOTE_PROTOTYPES 1
911
912 /* Don't perform CSE on function addresses. */
913
914 #define NO_FUNCTION_CSE
915
916 /* Specify the machine mode that pointers have.
917 After generation of rtl, the compiler makes no further distinction
918 between pointers and any other objects of this machine mode. */
919
920 #define Pmode SImode
921
922 /* A function address in a call instruction is a byte address (for
923 indexing purposes) so give the MEM rtx a byte's mode. */
924
925 #define FUNCTION_MODE QImode
926
927 /* Compute the cost of computing a constant rtl expression RTX whose
928 rtx-code is CODE. The body of this macro is a portion of a switch
929 statement. If the code is computed here, return it with a return
930 statement. Otherwise, break from the switch. */
931
932 #define CONST_COSTS(RTX, CODE, OUTERCODE) \
933 case CONST_INT: \
934 if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
935 case CONST: \
936 case LABEL_REF: \
937 case SYMBOL_REF: \
938 return 2; \
939 case CONST_DOUBLE: \
940 return 4;
941
942 /* A C statement (sans semicolon) to update the integer variable COST
943 based on the relationship between INSN that is dependent on
944 DEP_INSN through the dependence LINK. The default is to make no
945 adjustment to COST. This can be used for example to specify to
946 the scheduler that an output- or anti-dependence does not incur
947 the same cost as a data-dependence.
948
949 We will want to use this to indicate that there is a cost associated
950 with the loading, followed by use of base registers ...
951 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
952 */
953
954 /* Tell final.c how to eliminate redundant test instructions. */
955
956 /* Here we define machine-dependent flags and fields in cc_status
957 (see `conditions.h'). */
958
959 /* Store in cc_status the expressions that the condition codes will
960 describe after execution of an instruction whose pattern is EXP.
961 Do not alter them if the instruction would not alter the cc's.
962
963 On the 370, load insns do not alter the cc's. However, in some
964 cases these instructions can make it possibly invalid to use the
965 saved cc's. In those cases we clear out some or all of the saved
966 cc's so they won't be used.
967
968 Note that only some arith instructions set the CC. These include
969 add, subtract, complement, various shifts. Note that multiply
970 and divide do *not* set set the CC. Therefore, in the code below,
971 don't set the status for MUL, DIV, etc.
972
973 Note that the bitwise ops set the condition code, but not in a
974 way that we can make use of it. So we treat these as clobbering,
975 rather than setting the CC. These are clobbered in the individual
976 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
977 */
978
979 #define NOTICE_UPDATE_CC(EXP, INSN) \
980 { \
981 rtx exp = (EXP); \
982 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
983 exp = XVECEXP (exp, 0, 0); \
984 if (GET_CODE (exp) != SET) \
985 CC_STATUS_INIT; \
986 else \
987 { \
988 if (XEXP (exp, 0) == cc0_rtx) \
989 { \
990 cc_status.value1 = XEXP (exp, 0); \
991 cc_status.value2 = XEXP (exp, 1); \
992 cc_status.flags = 0; \
993 } \
994 else \
995 { \
996 if (cc_status.value1 \
997 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
998 cc_status.value1 = 0; \
999 if (cc_status.value2 \
1000 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
1001 cc_status.value2 = 0; \
1002 switch (GET_CODE (XEXP (exp, 1))) \
1003 { \
1004 case PLUS: case MINUS: case NEG: \
1005 case NOT: case ABS: \
1006 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
1007 \
1008 /* mult and div don't set any cc codes !! */ \
1009 case MULT: /* case UMULT: */ case DIV: case UDIV: \
1010 /* and, or and xor set the cc's the wrong way !! */ \
1011 case AND: case IOR: case XOR: \
1012 /* some shifts set the CC some don't. */ \
1013 case ASHIFT: case ASHIFTRT: \
1014 do {} while (0); \
1015 default: \
1016 break; \
1017 } \
1018 } \
1019 } \
1020 }
1021
1022
1023 #define CC_STATUS_SET(V1, V2) \
1024 { \
1025 cc_status.flags = 0; \
1026 cc_status.value1 = (V1); \
1027 cc_status.value2 = (V2); \
1028 if (cc_status.value1 \
1029 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
1030 cc_status.value2 = 0; \
1031 }
1032
1033 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1034 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
1035
1036 /* ------------------------------------------ */
1037 /* Control the assembler format that we output. */
1038
1039 /* Define standard character escape sequences for non-ASCII targets
1040 only. */
1041
1042 #ifdef TARGET_EBCDIC
1043 #define TARGET_ESC 39
1044 #define TARGET_BELL 47
1045 #define TARGET_BS 22
1046 #define TARGET_TAB 5
1047 #define TARGET_NEWLINE 21
1048 #define TARGET_VT 11
1049 #define TARGET_FF 12
1050 #define TARGET_CR 13
1051 #endif
1052
1053 /* ======================================================== */
1054
1055 #ifdef TARGET_HLASM
1056 #define TEXT_SECTION_ASM_OP "* Program text area"
1057 #define DATA_SECTION_ASM_OP "* Program data area"
1058 #define INIT_SECTION_ASM_OP "* Program initialization area"
1059 #define SHARED_SECTION_ASM_OP "* Program shared data"
1060 #define CTOR_LIST_BEGIN /* NO OP */
1061 #define CTOR_LIST_END /* NO OP */
1062 #define MAX_MVS_LABEL_SIZE 8
1063
1064 /* How to refer to registers in assembler output. This sequence is
1065 indexed by compiler's hard-register-number (see above). */
1066
1067 #define REGISTER_NAMES \
1068 { "0", "1", "2", "3", "4", "5", "6", "7", \
1069 "8", "9", "10", "11", "12", "13", "14", "15", \
1070 "0", "2", "4", "6" \
1071 }
1072
1073 #define ASM_FILE_START(FILE) \
1074 { fputs ("\tRMODE\tANY\n", FILE); \
1075 fputs ("\tCSECT\n", FILE); }
1076
1077 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1078 #define ASM_COMMENT_START "*"
1079 #define ASM_APP_OFF ""
1080 #define ASM_APP_ON ""
1081
1082 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1083 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1084
1085 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1086 { \
1087 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1088 if (mvs_check_alias (NAME, temp) == 2) \
1089 { \
1090 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1091 } \
1092 }
1093
1094 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1095 { \
1096 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1097 if (mvs_check_alias (NAME, temp) == 2) \
1098 { \
1099 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1100 } \
1101 fputs ("\tENTRY\t", FILE); \
1102 assemble_name (FILE, NAME); \
1103 fputs ("\n", FILE); \
1104 }
1105
1106 /* MVS externals are limited to 8 characters, upper case only.
1107 The '_' is mapped to '@', except for MVS functions, then '#'. */
1108
1109
1110 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1111 { \
1112 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1113 if (!mvs_get_alias (NAME, temp)) \
1114 strcpy (temp, NAME); \
1115 if (!strcmp (temp,"main")) \
1116 strcpy (temp,"gccmain"); \
1117 if (mvs_function_check (temp)) \
1118 ch = '#'; \
1119 else \
1120 ch = '@'; \
1121 for (bp = temp; *bp; bp++) \
1122 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1123 fprintf (FILE, "%s", temp); \
1124 }
1125
1126 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1127 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1128
1129 /* Generate internal label. Since we can branch here from off page, we
1130 must reload the base register. */
1131
1132 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1133 { \
1134 if (!strcmp (PREFIX,"L")) \
1135 { \
1136 mvs_add_label(NUM); \
1137 } \
1138 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
1139 }
1140
1141 /* Generate case label. For HLASM we can change to the data CSECT
1142 and put the vectors out of the code body. The assembler just
1143 concatenates CSECTs with the same name. */
1144
1145 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1146 fprintf (FILE, "\tDS\t0F\n"); \
1147 fprintf (FILE,"\tCSECT\n"); \
1148 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1149
1150 /* Put the CSECT back to the code body */
1151
1152 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1153 assemble_name (FILE, mvs_function_name); \
1154 fputs ("\tCSECT\n", FILE);
1155
1156 /* This is how to output an element of a case-vector that is absolute. */
1157
1158 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1159 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1160
1161 /* This is how to output an element of a case-vector that is relative. */
1162
1163 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1164 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1165
1166 /* This is how to output an insn to push a register on the stack.
1167 It need not be very fast code.
1168 Right now, PUSH & POP are used only when profiling is enabled,
1169 and then, only to push the static chain reg and the function struct
1170 value reg, and only if those are used. Since profiling is not
1171 supported anyway, punt on this. */
1172
1173 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1174 mvs_check_page (FILE, 8, 4); \
1175 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1176 reg_names[REGNO], STACK_POINTER_OFFSET)
1177
1178 /* This is how to output an insn to pop a register from the stack.
1179 It need not be very fast code. */
1180
1181 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1182 mvs_check_page (FILE, 8, 0); \
1183 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1184 reg_names[REGNO], STACK_POINTER_OFFSET)
1185
1186 /* This is how to output an assembler line defining a `double' constant. */
1187 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1188 fprintf (FILE, "\tDC\tD'%.18G'\n", (VALUE))
1189
1190 /* This is how to output an assembler line defining a `float' constant. */
1191 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1192 fprintf (FILE, "\tDC\tE'%.9G'\n", (VALUE))
1193
1194 /* This outputs a text string. The string are chopped up to fit into
1195 an 80 byte record. Also, control and special characters, interpreted
1196 by the IBM assembler, are output numerically. */
1197
1198 #define MVS_ASCII_TEXT_LENGTH 48
1199
1200 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1201 { \
1202 size_t i, limit = (LEN); \
1203 int j; \
1204 for (j = 0, i = 0; i < limit; j++, i++) \
1205 { \
1206 int c = (PTR)[i]; \
1207 if (ISCNTRL (c) || c == '&') \
1208 { \
1209 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1210 fprintf (FILE, "'\n"); \
1211 j = -1; \
1212 if (c == '&') c = MAP_CHARACTER (c); \
1213 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1214 } \
1215 else \
1216 { \
1217 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1218 fprintf (FILE, "\tDC\tC'"); \
1219 if ( c == '\'' ) \
1220 fprintf (FILE, "%c%c", c, c); \
1221 else \
1222 fprintf (FILE, "%c", c); \
1223 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1224 fprintf (FILE, "'\n" ); \
1225 } \
1226 } \
1227 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1228 fprintf (FILE, "'\n"); \
1229 }
1230
1231 /* This is how to output an assembler line that says to advance the
1232 location counter to a multiple of 2**LOG bytes. */
1233
1234 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1235 if (LOG) \
1236 { \
1237 if ((LOG) == 1) \
1238 fprintf (FILE, "\tDS\t0H\n" ); \
1239 else \
1240 fprintf (FILE, "\tDS\t0F\n" ); \
1241 } \
1242
1243 /* The maximum length of memory that the IBM assembler will allow in one
1244 DS operation. */
1245
1246 #define MAX_CHUNK 32767
1247
1248 /* A C statement to output to the stdio stream FILE an assembler
1249 instruction to advance the location counter by SIZE bytes. Those
1250 bytes should be zero when loaded. */
1251
1252 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1253 { \
1254 int s, k; \
1255 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1256 { \
1257 if (s > MAX_CHUNK) \
1258 k = MAX_CHUNK; \
1259 else \
1260 k = s; \
1261 fprintf (FILE, "\tDS\tXL%d\n", k); \
1262 } \
1263 }
1264
1265 /* A C statement (sans semicolon) to output to the stdio stream
1266 FILE the assembler definition of a common-label named NAME whose
1267 size is SIZE bytes. The variable ROUNDED is the size rounded up
1268 to whatever alignment the caller wants. */
1269
1270 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1271 { \
1272 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1273 if (mvs_check_alias(NAME, temp) == 2) \
1274 { \
1275 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1276 } \
1277 fputs ("\tENTRY\t", FILE); \
1278 assemble_name (FILE, NAME); \
1279 fputs ("\n", FILE); \
1280 fprintf (FILE, "\tDS\t0F\n"); \
1281 ASM_OUTPUT_LABEL (FILE,NAME); \
1282 ASM_OUTPUT_SKIP (FILE,SIZE); \
1283 }
1284
1285 /* A C statement (sans semicolon) to output to the stdio stream
1286 FILE the assembler definition of a local-common-label named NAME
1287 whose size is SIZE bytes. The variable ROUNDED is the size
1288 rounded up to whatever alignment the caller wants. */
1289
1290 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1291 { \
1292 fprintf (FILE, "\tDS\t0F\n"); \
1293 ASM_OUTPUT_LABEL (FILE,NAME); \
1294 ASM_OUTPUT_SKIP (FILE,SIZE); \
1295 }
1296
1297 /* Store in OUTPUT a string (made with alloca) containing an
1298 assembler-name for a local static variable named NAME.
1299 LABELNO is an integer which is different for each call. */
1300
1301 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1302 { \
1303 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1304 sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
1305 }
1306
1307 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1308 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1309 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1310
1311 #define PRINT_OPERAND(FILE, XV, CODE) \
1312 { \
1313 switch (GET_CODE (XV)) \
1314 { \
1315 static char curreg[4]; \
1316 case REG: \
1317 if (CODE == 'N') \
1318 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1319 else \
1320 strcpy (curreg, reg_names[REGNO (XV)]); \
1321 fprintf (FILE, "%s", curreg); \
1322 break; \
1323 case MEM: \
1324 { \
1325 rtx addr = XEXP (XV, 0); \
1326 if (CODE == 'O') \
1327 { \
1328 if (GET_CODE (addr) == PLUS) \
1329 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1330 else \
1331 fprintf (FILE, "0"); \
1332 } \
1333 else if (CODE == 'R') \
1334 { \
1335 if (GET_CODE (addr) == PLUS) \
1336 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1337 else \
1338 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1339 } \
1340 else \
1341 output_address (XEXP (XV, 0)); \
1342 } \
1343 break; \
1344 case SYMBOL_REF: \
1345 case LABEL_REF: \
1346 mvs_page_lit += 4; \
1347 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1348 else fprintf (FILE, "=A("); \
1349 output_addr_const (FILE, XV); \
1350 fprintf (FILE, ")"); \
1351 break; \
1352 case CONST_INT: \
1353 if (CODE == 'B') \
1354 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1355 else if (CODE == 'X') \
1356 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1357 else if (CODE == 'h') \
1358 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1359 else if (CODE == 'H') \
1360 { \
1361 mvs_page_lit += 2; \
1362 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1363 } \
1364 else if (CODE == 'K') \
1365 { \
1366 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1367 mvs_page_lit += 4; \
1368 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1369 } \
1370 else if (CODE == 'W') \
1371 { \
1372 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1373 mvs_page_lit += 8; \
1374 if (0 <= INTVAL (XV)) { \
1375 fprintf (FILE, "=XL8'00000000"); \
1376 } else { \
1377 fprintf (FILE, "=XL8'FFFFFFFF"); \
1378 } \
1379 fprintf (FILE, "%08X'", INTVAL (XV)); \
1380 } \
1381 else \
1382 { \
1383 mvs_page_lit += 4; \
1384 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1385 } \
1386 break; \
1387 case CONST_DOUBLE: \
1388 if (GET_MODE (XV) == DImode) \
1389 { \
1390 if (CODE == 'M') \
1391 { \
1392 mvs_page_lit += 4; \
1393 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1394 } \
1395 else if (CODE == 'L') \
1396 { \
1397 mvs_page_lit += 4; \
1398 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1399 } \
1400 else \
1401 { \
1402 mvs_page_lit += 8; \
1403 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1404 CONST_DOUBLE_HIGH (XV)); \
1405 } \
1406 } \
1407 else \
1408 { \
1409 /* hack alert -- this prints wildly incorrect values */ \
1410 /* when run in cross-compiler mode. See ELF section */ \
1411 /* for suggested fix */ \
1412 union { double d; int i[2]; } u; \
1413 u.i[0] = CONST_DOUBLE_LOW (XV); \
1414 u.i[1] = CONST_DOUBLE_HIGH (XV); \
1415 if (GET_MODE (XV) == SFmode) \
1416 { \
1417 mvs_page_lit += 4; \
1418 fprintf (FILE, "=E'%.9G'", u.d); \
1419 } \
1420 else \
1421 { \
1422 mvs_page_lit += 8; \
1423 fprintf (FILE, "=D'%.18G'", u.d); \
1424 } \
1425 } \
1426 break; \
1427 case CONST: \
1428 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1429 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1430 { \
1431 mvs_page_lit += 4; \
1432 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1433 { \
1434 fprintf (FILE, "=V("); \
1435 ASM_OUTPUT_LABELREF (FILE, \
1436 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1437 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1438 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1439 } \
1440 else \
1441 { \
1442 fprintf (FILE, "=A("); \
1443 output_addr_const (FILE, XV); \
1444 fprintf (FILE, ")"); \
1445 } \
1446 } \
1447 else \
1448 { \
1449 mvs_page_lit += 4; \
1450 fprintf (FILE, "=F'"); \
1451 output_addr_const (FILE, XV); \
1452 fprintf (FILE, "'"); \
1453 } \
1454 break; \
1455 default: \
1456 abort(); \
1457 } \
1458 }
1459
1460 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1461 { \
1462 rtx breg, xreg, offset, plus; \
1463 \
1464 switch (GET_CODE (ADDR)) \
1465 { \
1466 case REG: \
1467 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1468 break; \
1469 case PLUS: \
1470 breg = 0; \
1471 xreg = 0; \
1472 offset = 0; \
1473 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1474 { \
1475 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1476 breg = XEXP (ADDR, 1); \
1477 else \
1478 offset = XEXP (ADDR, 1); \
1479 plus = XEXP (ADDR, 0); \
1480 } \
1481 else \
1482 { \
1483 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1484 breg = XEXP (ADDR, 0); \
1485 else \
1486 offset = XEXP (ADDR, 0); \
1487 plus = XEXP (ADDR, 1); \
1488 } \
1489 if (GET_CODE (plus) == PLUS) \
1490 { \
1491 if (GET_CODE (XEXP (plus, 0)) == REG) \
1492 { \
1493 if (breg) \
1494 xreg = XEXP (plus, 0); \
1495 else \
1496 breg = XEXP (plus, 0); \
1497 } \
1498 else \
1499 { \
1500 offset = XEXP (plus, 0); \
1501 } \
1502 if (GET_CODE (XEXP (plus, 1)) == REG) \
1503 { \
1504 if (breg) \
1505 xreg = XEXP (plus, 1); \
1506 else \
1507 breg = XEXP (plus, 1); \
1508 } \
1509 else \
1510 { \
1511 offset = XEXP (plus, 1); \
1512 } \
1513 } \
1514 else if (GET_CODE (plus) == REG) \
1515 { \
1516 if (breg) \
1517 xreg = plus; \
1518 else \
1519 breg = plus; \
1520 } \
1521 else \
1522 { \
1523 offset = plus; \
1524 } \
1525 if (offset) \
1526 { \
1527 if (GET_CODE (offset) == LABEL_REF) \
1528 fprintf (FILE, "L%d", \
1529 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1530 else \
1531 output_addr_const (FILE, offset); \
1532 } \
1533 else \
1534 fprintf (FILE, "0"); \
1535 if (xreg) \
1536 fprintf (FILE, "(%s,%s)", \
1537 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1538 else \
1539 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1540 break; \
1541 default: \
1542 mvs_page_lit += 4; \
1543 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1544 else fprintf (FILE, "=A("); \
1545 output_addr_const (FILE, ADDR); \
1546 fprintf (FILE, ")"); \
1547 break; \
1548 } \
1549 }
1550
1551 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1552 { \
1553 if (strlen (NAME) + 1 > mvs_function_name_length) \
1554 { \
1555 if (mvs_function_name) \
1556 free (mvs_function_name); \
1557 mvs_function_name = 0; \
1558 } \
1559 if (!mvs_function_name) \
1560 { \
1561 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1562 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1563 } \
1564 if (!strcmp (NAME, "main")) \
1565 strcpy (mvs_function_name, "gccmain"); \
1566 else \
1567 strcpy (mvs_function_name, NAME); \
1568 fprintf (FILE, "\tDS\t0F\n"); \
1569 assemble_name (FILE, mvs_function_name); \
1570 fputs ("\tRMODE\tANY\n", FILE); \
1571 assemble_name (FILE, mvs_function_name); \
1572 fputs ("\tCSECT\n", FILE); \
1573 }
1574
1575 /* Output assembler code to FILE to increment profiler label # LABELNO
1576 for profiling a function entry. */
1577
1578 #define FUNCTION_PROFILER(FILE, LABELNO) \
1579 fprintf (FILE, "Error: No profiling available.\n")
1580
1581 #endif /* TARGET_HLASM */
1582
1583 /* ======================================================== */
1584
1585 #ifdef TARGET_ELF_ABI
1586
1587 /* How to refer to registers in assembler output. This sequence is
1588 indexed by compiler's hard-register-number (see above). */
1589
1590 #define REGISTER_NAMES \
1591 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1592 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1593 "f0", "f2", "f4", "f6" \
1594 }
1595
1596 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1597 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1598 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1599
1600 #define PRINT_OPERAND(FILE, XV, CODE) \
1601 { \
1602 switch (GET_CODE (XV)) \
1603 { \
1604 static char curreg[4]; \
1605 case REG: \
1606 if (CODE == 'N') \
1607 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1608 else \
1609 strcpy (curreg, reg_names[REGNO (XV)]); \
1610 fprintf (FILE, "%s", curreg); \
1611 break; \
1612 case MEM: \
1613 { \
1614 rtx addr = XEXP (XV, 0); \
1615 if (CODE == 'O') \
1616 { \
1617 if (GET_CODE (addr) == PLUS) \
1618 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1619 else \
1620 fprintf (FILE, "0"); \
1621 } \
1622 else if (CODE == 'R') \
1623 { \
1624 if (GET_CODE (addr) == PLUS) \
1625 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1626 else \
1627 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1628 } \
1629 else \
1630 output_address (XEXP (XV, 0)); \
1631 } \
1632 break; \
1633 case SYMBOL_REF: \
1634 case LABEL_REF: \
1635 mvs_page_lit += 4; \
1636 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1637 else fprintf (FILE, "=A("); \
1638 output_addr_const (FILE, XV); \
1639 fprintf (FILE, ")"); \
1640 break; \
1641 case CONST_INT: \
1642 if (CODE == 'B') \
1643 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1644 else if (CODE == 'X') \
1645 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1646 else if (CODE == 'h') \
1647 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1648 else if (CODE == 'H') \
1649 { \
1650 mvs_page_lit += 2; \
1651 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1652 } \
1653 else if (CODE == 'K') \
1654 { \
1655 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1656 mvs_page_lit += 4; \
1657 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1658 } \
1659 else if (CODE == 'W') \
1660 { \
1661 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1662 mvs_page_lit += 8; \
1663 if (0 <= INTVAL (XV)) { \
1664 fprintf (FILE, "=XL8'00000000"); \
1665 } else { \
1666 fprintf (FILE, "=XL8'FFFFFFFF"); \
1667 } \
1668 fprintf (FILE, "%08X'", INTVAL (XV)); \
1669 } \
1670 else \
1671 { \
1672 mvs_page_lit += 4; \
1673 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1674 } \
1675 break; \
1676 case CONST_DOUBLE: \
1677 if (GET_MODE (XV) == DImode) \
1678 { \
1679 if (CODE == 'M') \
1680 { \
1681 mvs_page_lit += 4; \
1682 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1683 } \
1684 else if (CODE == 'L') \
1685 { \
1686 mvs_page_lit += 4; \
1687 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1688 } \
1689 else \
1690 { \
1691 mvs_page_lit += 8; \
1692 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1693 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1694 } \
1695 } \
1696 else \
1697 { \
1698 char buf[50]; \
1699 REAL_VALUE_TYPE rval; \
1700 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1701 REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
1702 if (GET_MODE (XV) == SFmode) \
1703 { \
1704 mvs_page_lit += 4; \
1705 fprintf (FILE, "=E'%s'", buf); \
1706 } \
1707 else \
1708 if (GET_MODE (XV) == DFmode) \
1709 { \
1710 mvs_page_lit += 8; \
1711 fprintf (FILE, "=D'%s'", buf); \
1712 } \
1713 else /* VOIDmode !?!? strange but true ... */ \
1714 { \
1715 mvs_page_lit += 8; \
1716 fprintf (FILE, "=XL8'%08X%08X'", \
1717 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1718 } \
1719 } \
1720 break; \
1721 case CONST: \
1722 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1723 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1724 { \
1725 mvs_page_lit += 4; \
1726 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1727 { \
1728 fprintf (FILE, "=V("); \
1729 ASM_OUTPUT_LABELREF (FILE, \
1730 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1731 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1732 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1733 } \
1734 else \
1735 { \
1736 fprintf (FILE, "=A("); \
1737 output_addr_const (FILE, XV); \
1738 fprintf (FILE, ")"); \
1739 } \
1740 } \
1741 else \
1742 { \
1743 mvs_page_lit += 4; \
1744 fprintf (FILE, "=bogus_bad_F'"); \
1745 output_addr_const (FILE, XV); \
1746 fprintf (FILE, "'"); \
1747 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1748 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1749 debug_rtx (XV); \
1750 abort(); \
1751 } \
1752 break; \
1753 default: \
1754 abort(); \
1755 } \
1756 }
1757
1758 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1759 { \
1760 rtx breg, xreg, offset, plus; \
1761 \
1762 switch (GET_CODE (ADDR)) \
1763 { \
1764 case REG: \
1765 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1766 break; \
1767 case PLUS: \
1768 breg = 0; \
1769 xreg = 0; \
1770 offset = 0; \
1771 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1772 { \
1773 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1774 breg = XEXP (ADDR, 1); \
1775 else \
1776 offset = XEXP (ADDR, 1); \
1777 plus = XEXP (ADDR, 0); \
1778 } \
1779 else \
1780 { \
1781 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1782 breg = XEXP (ADDR, 0); \
1783 else \
1784 offset = XEXP (ADDR, 0); \
1785 plus = XEXP (ADDR, 1); \
1786 } \
1787 if (GET_CODE (plus) == PLUS) \
1788 { \
1789 if (GET_CODE (XEXP (plus, 0)) == REG) \
1790 { \
1791 if (breg) \
1792 xreg = XEXP (plus, 0); \
1793 else \
1794 breg = XEXP (plus, 0); \
1795 } \
1796 else \
1797 { \
1798 offset = XEXP (plus, 0); \
1799 } \
1800 if (GET_CODE (XEXP (plus, 1)) == REG) \
1801 { \
1802 if (breg) \
1803 xreg = XEXP (plus, 1); \
1804 else \
1805 breg = XEXP (plus, 1); \
1806 } \
1807 else \
1808 { \
1809 offset = XEXP (plus, 1); \
1810 } \
1811 } \
1812 else if (GET_CODE (plus) == REG) \
1813 { \
1814 if (breg) \
1815 xreg = plus; \
1816 else \
1817 breg = plus; \
1818 } \
1819 else \
1820 { \
1821 offset = plus; \
1822 } \
1823 if (offset) \
1824 { \
1825 if (GET_CODE (offset) == LABEL_REF) \
1826 fprintf (FILE, "L%d", \
1827 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1828 else \
1829 output_addr_const (FILE, offset); \
1830 } \
1831 else \
1832 fprintf (FILE, "0"); \
1833 if (xreg) \
1834 fprintf (FILE, "(%s,%s)", \
1835 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1836 else \
1837 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1838 break; \
1839 default: \
1840 mvs_page_lit += 4; \
1841 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1842 else fprintf (FILE, "=A("); \
1843 output_addr_const (FILE, ADDR); \
1844 fprintf (FILE, ")"); \
1845 break; \
1846 } \
1847 }
1848
1849 /* Output assembler code to FILE to increment profiler label # LABELNO
1850 for profiling a function entry. */
1851 /* Make it a no-op for now, so we can at least compile glibc */
1852 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1853 mvs_check_page (FILE, 24, 4); \
1854 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1855 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1856 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1857 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1858 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1859 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1860 }
1861
1862 /* Don't bother to output .extern pseudo-ops. They are not needed by
1863 ELF assemblers. */
1864
1865 #undef ASM_OUTPUT_EXTERNAL
1866
1867 #define ASM_DOUBLE "\t.double"
1868
1869 /* Argument to the flt pt. macros is a REAL_VALUE_TYPE which
1870 may or may not be a float/double, depending on whther we
1871 are running in cross-compiler mode. */
1872 /* This is how to output an assembler line defining a `double' constant. */
1873 #define ASM_OUTPUT_DOUBLE(FILE, RVAL) { \
1874 char buf[50]; \
1875 REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DOUBLE_HEX, buf); \
1876 fprintf (FILE, "\tDC\tD'%s'\n", buf); \
1877 }
1878
1879 /* This is how to output an assembler line defining a `float' constant. */
1880 #define ASM_OUTPUT_FLOAT(FILE, RVAL) { \
1881 char buf[50]; \
1882 REAL_VALUE_TO_DECIMAL (RVAL, HOST_WIDE_INT_PRINT_DEC, buf); \
1883 fprintf (FILE, "\tDC\tE'%s'\n", buf); \
1884 }
1885
1886
1887 /* This is how to output the definition of a user-level label named NAME,
1888 such as the label on a static function or variable NAME. */
1889 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1890 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1891
1892 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1893
1894 /* Generate internal label. Since we can branch here from off page, we
1895 must reload the base register. Note that internal labels are generated
1896 for loops, goto's and case labels. */
1897 #undef ASM_OUTPUT_INTERNAL_LABEL
1898 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1899 { \
1900 if (!strcmp (PREFIX,"L")) \
1901 { \
1902 mvs_add_label(NUM); \
1903 } \
1904 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
1905 }
1906
1907 /* let config/svr4.h define this ...
1908 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1909 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1910 */
1911
1912 /* This is how to output an element of a case-vector that is absolute. */
1913 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1914 mvs_check_page (FILE, 4, 0); \
1915 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1916
1917 /* This is how to output an element of a case-vector that is relative. */
1918 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1919 mvs_check_page (FILE, 4, 0); \
1920 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1921
1922 /* Right now, PUSH & POP are used only when profiling is enabled,
1923 and then, only to push the static chain reg and the function struct
1924 value reg, and only if those are used by the function being profiled.
1925 We don't need this for profiling, so punt. */
1926 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1927 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1928
1929
1930 /* Indicate that jump tables go in the text section. This is
1931 necessary when compiling PIC code. */
1932 #define JUMP_TABLES_IN_TEXT_SECTION 1
1933
1934 /* Define macro used to output shift-double opcodes when the shift
1935 count is in %cl. Some assemblers require %cl as an argument;
1936 some don't.
1937
1938 GAS requires the %cl argument, so override i386/unix.h. */
1939
1940 #undef SHIFT_DOUBLE_OMITS_COUNT
1941 #define SHIFT_DOUBLE_OMITS_COUNT 0
1942
1943 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1944 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1945 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1946
1947 /* Allow #sccs in preprocessor. */
1948 #define SCCS_DIRECTIVE
1949
1950 /* Implicit library calls should use memcpy, not bcopy, etc. */
1951 #define TARGET_MEM_FUNCTIONS
1952
1953 /* Output before read-only data. */
1954 #define TEXT_SECTION_ASM_OP "\t.text"
1955
1956 /* Output before writable (initialized) data. */
1957 #define DATA_SECTION_ASM_OP "\t.data"
1958
1959 /* Output before writable (uninitialized) data. */
1960 #define BSS_SECTION_ASM_OP "\t.bss"
1961
1962 /* In the past there was confusion as to what the argument to .align was
1963 in GAS. For the last several years the rule has been this: for a.out
1964 file formats that argument is LOG, and for all other file formats the
1965 argument is 1<<LOG.
1966
1967 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1968 doubt or guess work, and since this file is used for both a.out and other
1969 file formats, we use one of them. */
1970
1971 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1972 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1973
1974 /* This is how to output a command to make the user-level label named NAME
1975 defined for reference from other files. */
1976
1977 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1978 (fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE))
1979
1980 /* This says how to output an assembler line
1981 to define a global common symbol. */
1982
1983 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1984 ( fputs (".comm ", (FILE)), \
1985 assemble_name ((FILE), (NAME)), \
1986 fprintf ((FILE), ",%u\n", (ROUNDED)))
1987
1988 /* This says how to output an assembler line
1989 to define a local common symbol. */
1990
1991 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1992 ( fputs (".lcomm ", (FILE)), \
1993 assemble_name ((FILE), (NAME)), \
1994 fprintf ((FILE), ",%u\n", (ROUNDED)))
1995
1996 #endif /* TARGET_ELF_ABI */
1997 #endif /* ! GCC_I370_H */
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