1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
50 #include "coretypes.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
60 #include "conditions.h"
62 #include "hard-reg-set.h"
66 #include "rtl-error.h"
67 #include "toplev.h" /* exact_log2, floor_log2 */
70 #include "basic-block.h"
72 #include "targhooks.h"
75 #include "cfglayout.h"
76 #include "tree-pass.h"
77 #include "tree-flow.h"
87 #ifdef XCOFF_DEBUGGING_INFO
88 #include "xcoffout.h" /* Needed for external data
89 declarations for e.g. AIX 4.x. */
92 #include "dwarf2out.h"
94 #ifdef DBX_DEBUGGING_INFO
98 #ifdef SDB_DEBUGGING_INFO
102 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
103 So define a null default for it to save conditionalization later. */
104 #ifndef CC_STATUS_INIT
105 #define CC_STATUS_INIT
108 /* How to start an assembler comment. */
109 #ifndef ASM_COMMENT_START
110 #define ASM_COMMENT_START ";#"
113 /* Is the given character a logical line separator for the assembler? */
114 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
115 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
118 #ifndef JUMP_TABLES_IN_TEXT_SECTION
119 #define JUMP_TABLES_IN_TEXT_SECTION 0
122 /* Bitflags used by final_scan_insn. */
125 #define SEEN_EMITTED 4
127 /* Last insn processed by final_scan_insn. */
128 static rtx debug_insn
;
129 rtx current_output_insn
;
131 /* Line number of last NOTE. */
132 static int last_linenum
;
134 /* Last discriminator written to assembly. */
135 static int last_discriminator
;
137 /* Discriminator of current block. */
138 static int discriminator
;
140 /* Highest line number in current block. */
141 static int high_block_linenum
;
143 /* Likewise for function. */
144 static int high_function_linenum
;
146 /* Filename of last NOTE. */
147 static const char *last_filename
;
149 /* Override filename and line number. */
150 static const char *override_filename
;
151 static int override_linenum
;
153 /* Whether to force emission of a line note before the next insn. */
154 static bool force_source_line
= false;
156 extern const int length_unit_log
; /* This is defined in insn-attrtab.c. */
158 /* Nonzero while outputting an `asm' with operands.
159 This means that inconsistencies are the user's fault, so don't die.
160 The precise value is the insn being output, to pass to error_for_asm. */
161 rtx this_is_asm_operands
;
163 /* Number of operands of this insn, for an `asm' with operands. */
164 static unsigned int insn_noperands
;
166 /* Compare optimization flag. */
168 static rtx last_ignored_compare
= 0;
170 /* Assign a unique number to each insn that is output.
171 This can be used to generate unique local labels. */
173 static int insn_counter
= 0;
176 /* This variable contains machine-dependent flags (defined in tm.h)
177 set and examined by output routines
178 that describe how to interpret the condition codes properly. */
182 /* During output of an insn, this contains a copy of cc_status
183 from before the insn. */
185 CC_STATUS cc_prev_status
;
188 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
190 static int block_depth
;
192 /* Nonzero if have enabled APP processing of our assembler output. */
196 /* If we are outputting an insn sequence, this contains the sequence rtx.
201 #ifdef ASSEMBLER_DIALECT
203 /* Number of the assembler dialect to use, starting at 0. */
204 static int dialect_number
;
207 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
208 rtx current_insn_predicate
;
210 /* True if printing into -fdump-final-insns= dump. */
211 bool final_insns_dump_p
;
213 #ifdef HAVE_ATTR_length
214 static int asm_insn_count (rtx
);
216 static void profile_function (FILE *);
217 static void profile_after_prologue (FILE *);
218 static bool notice_source_line (rtx
, bool *);
219 static rtx
walk_alter_subreg (rtx
*, bool *);
220 static void output_asm_name (void);
221 static void output_alternate_entry_point (FILE *, rtx
);
222 static tree
get_mem_expr_from_op (rtx
, int *);
223 static void output_asm_operand_names (rtx
*, int *, int);
224 #ifdef LEAF_REGISTERS
225 static void leaf_renumber_regs (rtx
);
228 static int alter_cond (rtx
);
230 #ifndef ADDR_VEC_ALIGN
231 static int final_addr_vec_align (rtx
);
233 #ifdef HAVE_ATTR_length
234 static int align_fuzz (rtx
, rtx
, int, unsigned);
237 /* Initialize data in final at the beginning of a compilation. */
240 init_final (const char *filename ATTRIBUTE_UNUSED
)
245 #ifdef ASSEMBLER_DIALECT
246 dialect_number
= ASSEMBLER_DIALECT
;
250 /* Default target function prologue and epilogue assembler output.
252 If not overridden for epilogue code, then the function body itself
253 contains return instructions wherever needed. */
255 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
256 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
261 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED
,
262 tree decl ATTRIBUTE_UNUSED
,
263 bool new_is_cold ATTRIBUTE_UNUSED
)
267 /* Default target hook that outputs nothing to a stream. */
269 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
273 /* Enable APP processing of subsequent output.
274 Used before the output from an `asm' statement. */
281 fputs (ASM_APP_ON
, asm_out_file
);
286 /* Disable APP processing of subsequent output.
287 Called from varasm.c before most kinds of output. */
294 fputs (ASM_APP_OFF
, asm_out_file
);
299 /* Return the number of slots filled in the current
300 delayed branch sequence (we don't count the insn needing the
301 delay slot). Zero if not in a delayed branch sequence. */
305 dbr_sequence_length (void)
307 if (final_sequence
!= 0)
308 return XVECLEN (final_sequence
, 0) - 1;
314 /* The next two pages contain routines used to compute the length of an insn
315 and to shorten branches. */
317 /* Arrays for insn lengths, and addresses. The latter is referenced by
318 `insn_current_length'. */
320 static int *insn_lengths
;
322 VEC(int,heap
) *insn_addresses_
;
324 /* Max uid for which the above arrays are valid. */
325 static int insn_lengths_max_uid
;
327 /* Address of insn being processed. Used by `insn_current_length'. */
328 int insn_current_address
;
330 /* Address of insn being processed in previous iteration. */
331 int insn_last_address
;
333 /* known invariant alignment of insn being processed. */
334 int insn_current_align
;
336 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
337 gives the next following alignment insn that increases the known
338 alignment, or NULL_RTX if there is no such insn.
339 For any alignment obtained this way, we can again index uid_align with
340 its uid to obtain the next following align that in turn increases the
341 alignment, till we reach NULL_RTX; the sequence obtained this way
342 for each insn we'll call the alignment chain of this insn in the following
345 struct label_alignment
351 static rtx
*uid_align
;
352 static int *uid_shuid
;
353 static struct label_alignment
*label_align
;
355 /* Indicate that branch shortening hasn't yet been done. */
358 init_insn_lengths (void)
369 insn_lengths_max_uid
= 0;
371 #ifdef HAVE_ATTR_length
372 INSN_ADDRESSES_FREE ();
381 /* Obtain the current length of an insn. If branch shortening has been done,
382 get its actual length. Otherwise, use FALLBACK_FN to calculate the
385 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
386 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
388 #ifdef HAVE_ATTR_length
393 if (insn_lengths_max_uid
> INSN_UID (insn
))
394 return insn_lengths
[INSN_UID (insn
)];
396 switch (GET_CODE (insn
))
405 length
= fallback_fn (insn
);
409 body
= PATTERN (insn
);
410 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
412 /* Alignment is machine-dependent and should be handled by
416 length
= fallback_fn (insn
);
420 body
= PATTERN (insn
);
421 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
424 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
425 length
= asm_insn_count (body
) * fallback_fn (insn
);
426 else if (GET_CODE (body
) == SEQUENCE
)
427 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
428 length
+= get_attr_length_1 (XVECEXP (body
, 0, i
), fallback_fn
);
430 length
= fallback_fn (insn
);
437 #ifdef ADJUST_INSN_LENGTH
438 ADJUST_INSN_LENGTH (insn
, length
);
441 #else /* not HAVE_ATTR_length */
443 #define insn_default_length 0
444 #define insn_min_length 0
445 #endif /* not HAVE_ATTR_length */
448 /* Obtain the current length of an insn. If branch shortening has been done,
449 get its actual length. Otherwise, get its maximum length. */
451 get_attr_length (rtx insn
)
453 return get_attr_length_1 (insn
, insn_default_length
);
456 /* Obtain the current length of an insn. If branch shortening has been done,
457 get its actual length. Otherwise, get its minimum length. */
459 get_attr_min_length (rtx insn
)
461 return get_attr_length_1 (insn
, insn_min_length
);
464 /* Code to handle alignment inside shorten_branches. */
466 /* Here is an explanation how the algorithm in align_fuzz can give
469 Call a sequence of instructions beginning with alignment point X
470 and continuing until the next alignment point `block X'. When `X'
471 is used in an expression, it means the alignment value of the
474 Call the distance between the start of the first insn of block X, and
475 the end of the last insn of block X `IX', for the `inner size of X'.
476 This is clearly the sum of the instruction lengths.
478 Likewise with the next alignment-delimited block following X, which we
481 Call the distance between the start of the first insn of block X, and
482 the start of the first insn of block Y `OX', for the `outer size of X'.
484 The estimated padding is then OX - IX.
486 OX can be safely estimated as
491 OX = round_up(IX, X) + Y - X
493 Clearly est(IX) >= real(IX), because that only depends on the
494 instruction lengths, and those being overestimated is a given.
496 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
497 we needn't worry about that when thinking about OX.
499 When X >= Y, the alignment provided by Y adds no uncertainty factor
500 for branch ranges starting before X, so we can just round what we have.
501 But when X < Y, we don't know anything about the, so to speak,
502 `middle bits', so we have to assume the worst when aligning up from an
503 address mod X to one mod Y, which is Y - X. */
506 #define LABEL_ALIGN(LABEL) align_labels_log
510 #define LOOP_ALIGN(LABEL) align_loops_log
513 #ifndef LABEL_ALIGN_AFTER_BARRIER
514 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
518 #define JUMP_ALIGN(LABEL) align_jumps_log
522 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED
)
528 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED
)
530 return align_loops_max_skip
;
534 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED
)
536 return align_labels_max_skip
;
540 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED
)
542 return align_jumps_max_skip
;
545 #ifndef ADDR_VEC_ALIGN
547 final_addr_vec_align (rtx addr_vec
)
549 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
551 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
552 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
553 return exact_log2 (align
);
557 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
560 #ifndef INSN_LENGTH_ALIGNMENT
561 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
564 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
566 static int min_labelno
, max_labelno
;
568 #define LABEL_TO_ALIGNMENT(LABEL) \
569 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
571 #define LABEL_TO_MAX_SKIP(LABEL) \
572 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
574 /* For the benefit of port specific code do this also as a function. */
577 label_to_alignment (rtx label
)
579 if (CODE_LABEL_NUMBER (label
) <= max_labelno
)
580 return LABEL_TO_ALIGNMENT (label
);
585 label_to_max_skip (rtx label
)
587 if (CODE_LABEL_NUMBER (label
) <= max_labelno
)
588 return LABEL_TO_MAX_SKIP (label
);
592 #ifdef HAVE_ATTR_length
593 /* The differences in addresses
594 between a branch and its target might grow or shrink depending on
595 the alignment the start insn of the range (the branch for a forward
596 branch or the label for a backward branch) starts out on; if these
597 differences are used naively, they can even oscillate infinitely.
598 We therefore want to compute a 'worst case' address difference that
599 is independent of the alignment the start insn of the range end
600 up on, and that is at least as large as the actual difference.
601 The function align_fuzz calculates the amount we have to add to the
602 naively computed difference, by traversing the part of the alignment
603 chain of the start insn of the range that is in front of the end insn
604 of the range, and considering for each alignment the maximum amount
605 that it might contribute to a size increase.
607 For casesi tables, we also want to know worst case minimum amounts of
608 address difference, in case a machine description wants to introduce
609 some common offset that is added to all offsets in a table.
610 For this purpose, align_fuzz with a growth argument of 0 computes the
611 appropriate adjustment. */
613 /* Compute the maximum delta by which the difference of the addresses of
614 START and END might grow / shrink due to a different address for start
615 which changes the size of alignment insns between START and END.
616 KNOWN_ALIGN_LOG is the alignment known for START.
617 GROWTH should be ~0 if the objective is to compute potential code size
618 increase, and 0 if the objective is to compute potential shrink.
619 The return value is undefined for any other value of GROWTH. */
622 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
624 int uid
= INSN_UID (start
);
626 int known_align
= 1 << known_align_log
;
627 int end_shuid
= INSN_SHUID (end
);
630 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
632 int align_addr
, new_align
;
634 uid
= INSN_UID (align_label
);
635 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
636 if (uid_shuid
[uid
] > end_shuid
)
638 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
639 new_align
= 1 << known_align_log
;
640 if (new_align
< known_align
)
642 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
643 known_align
= new_align
;
648 /* Compute a worst-case reference address of a branch so that it
649 can be safely used in the presence of aligned labels. Since the
650 size of the branch itself is unknown, the size of the branch is
651 not included in the range. I.e. for a forward branch, the reference
652 address is the end address of the branch as known from the previous
653 branch shortening pass, minus a value to account for possible size
654 increase due to alignment. For a backward branch, it is the start
655 address of the branch as known from the current pass, plus a value
656 to account for possible size increase due to alignment.
657 NB.: Therefore, the maximum offset allowed for backward branches needs
658 to exclude the branch size. */
661 insn_current_reference_address (rtx branch
)
666 if (! INSN_ADDRESSES_SET_P ())
669 seq
= NEXT_INSN (PREV_INSN (branch
));
670 seq_uid
= INSN_UID (seq
);
671 if (!JUMP_P (branch
))
672 /* This can happen for example on the PA; the objective is to know the
673 offset to address something in front of the start of the function.
674 Thus, we can treat it like a backward branch.
675 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
676 any alignment we'd encounter, so we skip the call to align_fuzz. */
677 return insn_current_address
;
678 dest
= JUMP_LABEL (branch
);
680 /* BRANCH has no proper alignment chain set, so use SEQ.
681 BRANCH also has no INSN_SHUID. */
682 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
684 /* Forward branch. */
685 return (insn_last_address
+ insn_lengths
[seq_uid
]
686 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
690 /* Backward branch. */
691 return (insn_current_address
692 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
695 #endif /* HAVE_ATTR_length */
697 /* Compute branch alignments based on frequency information in the
701 compute_alignments (void)
703 int log
, max_skip
, max_log
;
706 int freq_threshold
= 0;
714 max_labelno
= max_label_num ();
715 min_labelno
= get_first_label_num ();
716 label_align
= XCNEWVEC (struct label_alignment
, max_labelno
- min_labelno
+ 1);
718 /* If not optimizing or optimizing for size, don't assign any alignments. */
719 if (! optimize
|| optimize_function_for_size_p (cfun
))
724 dump_flow_info (dump_file
, TDF_DETAILS
);
725 flow_loops_dump (dump_file
, NULL
, 1);
727 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
729 if (bb
->frequency
> freq_max
)
730 freq_max
= bb
->frequency
;
731 freq_threshold
= freq_max
/ PARAM_VALUE (PARAM_ALIGN_THRESHOLD
);
734 fprintf(dump_file
, "freq_max: %i\n",freq_max
);
737 rtx label
= BB_HEAD (bb
);
738 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
743 || optimize_bb_for_size_p (bb
))
746 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
747 bb
->index
, bb
->frequency
, bb
->loop_father
->num
, bb
->loop_depth
);
750 max_log
= LABEL_ALIGN (label
);
751 max_skip
= targetm
.asm_out
.label_align_max_skip (label
);
753 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
755 if (e
->flags
& EDGE_FALLTHRU
)
756 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
758 branch_frequency
+= EDGE_FREQUENCY (e
);
762 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
763 bb
->index
, bb
->frequency
, bb
->loop_father
->num
,
765 fallthru_frequency
, branch_frequency
);
766 if (!bb
->loop_father
->inner
&& bb
->loop_father
->num
)
767 fprintf (dump_file
, " inner_loop");
768 if (bb
->loop_father
->header
== bb
)
769 fprintf (dump_file
, " loop_header");
770 fprintf (dump_file
, "\n");
773 /* There are two purposes to align block with no fallthru incoming edge:
774 1) to avoid fetch stalls when branch destination is near cache boundary
775 2) to improve cache efficiency in case the previous block is not executed
776 (so it does not need to be in the cache).
778 We to catch first case, we align frequently executed blocks.
779 To catch the second, we align blocks that are executed more frequently
780 than the predecessor and the predecessor is likely to not be executed
781 when function is called. */
784 && (branch_frequency
> freq_threshold
785 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
786 && (bb
->prev_bb
->frequency
787 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
789 log
= JUMP_ALIGN (label
);
791 fprintf(dump_file
, " jump alignment added.\n");
795 max_skip
= targetm
.asm_out
.jump_align_max_skip (label
);
798 /* In case block is frequent and reached mostly by non-fallthru edge,
799 align it. It is most likely a first block of loop. */
801 && optimize_bb_for_speed_p (bb
)
802 && branch_frequency
+ fallthru_frequency
> freq_threshold
804 > fallthru_frequency
* PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS
)))
806 log
= LOOP_ALIGN (label
);
808 fprintf(dump_file
, " internal loop alignment added.\n");
812 max_skip
= targetm
.asm_out
.loop_align_max_skip (label
);
815 LABEL_TO_ALIGNMENT (label
) = max_log
;
816 LABEL_TO_MAX_SKIP (label
) = max_skip
;
819 loop_optimizer_finalize ();
820 free_dominance_info (CDI_DOMINATORS
);
824 struct rtl_opt_pass pass_compute_alignments
=
828 "alignments", /* name */
830 compute_alignments
, /* execute */
833 0, /* static_pass_number */
835 0, /* properties_required */
836 0, /* properties_provided */
837 0, /* properties_destroyed */
838 0, /* todo_flags_start */
839 TODO_dump_func
| TODO_verify_rtl_sharing
840 | TODO_ggc_collect
/* todo_flags_finish */
845 /* Make a pass over all insns and compute their actual lengths by shortening
846 any branches of variable length if possible. */
848 /* shorten_branches might be called multiple times: for example, the SH
849 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
850 In order to do this, it needs proper length information, which it obtains
851 by calling shorten_branches. This cannot be collapsed with
852 shorten_branches itself into a single pass unless we also want to integrate
853 reorg.c, since the branch splitting exposes new instructions with delay
857 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
864 #ifdef HAVE_ATTR_length
865 #define MAX_CODE_ALIGN 16
867 int something_changed
= 1;
868 char *varying_length
;
871 rtx align_tab
[MAX_CODE_ALIGN
];
875 /* Compute maximum UID and allocate label_align / uid_shuid. */
876 max_uid
= get_max_uid ();
878 /* Free uid_shuid before reallocating it. */
881 uid_shuid
= XNEWVEC (int, max_uid
);
883 if (max_labelno
!= max_label_num ())
885 int old
= max_labelno
;
889 max_labelno
= max_label_num ();
891 n_labels
= max_labelno
- min_labelno
+ 1;
892 n_old_labels
= old
- min_labelno
+ 1;
894 label_align
= XRESIZEVEC (struct label_alignment
, label_align
, n_labels
);
896 /* Range of labels grows monotonically in the function. Failing here
897 means that the initialization of array got lost. */
898 gcc_assert (n_old_labels
<= n_labels
);
900 memset (label_align
+ n_old_labels
, 0,
901 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
904 /* Initialize label_align and set up uid_shuid to be strictly
905 monotonically rising with insn order. */
906 /* We use max_log here to keep track of the maximum alignment we want to
907 impose on the next CODE_LABEL (or the current one if we are processing
908 the CODE_LABEL itself). */
913 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
917 INSN_SHUID (insn
) = i
++;
924 bool next_is_jumptable
;
926 /* Merge in alignments computed by compute_alignments. */
927 log
= LABEL_TO_ALIGNMENT (insn
);
931 max_skip
= LABEL_TO_MAX_SKIP (insn
);
934 next
= next_nonnote_insn (insn
);
935 next_is_jumptable
= next
&& JUMP_TABLE_DATA_P (next
);
936 if (!next_is_jumptable
)
938 log
= LABEL_ALIGN (insn
);
942 max_skip
= targetm
.asm_out
.label_align_max_skip (insn
);
945 /* ADDR_VECs only take room if read-only data goes into the text
947 if ((JUMP_TABLES_IN_TEXT_SECTION
948 || readonly_data_section
== text_section
)
949 && next_is_jumptable
)
951 log
= ADDR_VEC_ALIGN (next
);
955 max_skip
= targetm
.asm_out
.label_align_max_skip (insn
);
958 LABEL_TO_ALIGNMENT (insn
) = max_log
;
959 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
963 else if (BARRIER_P (insn
))
967 for (label
= insn
; label
&& ! INSN_P (label
);
968 label
= NEXT_INSN (label
))
971 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
975 max_skip
= targetm
.asm_out
.label_align_after_barrier_max_skip (label
);
981 #ifdef HAVE_ATTR_length
983 /* Allocate the rest of the arrays. */
984 insn_lengths
= XNEWVEC (int, max_uid
);
985 insn_lengths_max_uid
= max_uid
;
986 /* Syntax errors can lead to labels being outside of the main insn stream.
987 Initialize insn_addresses, so that we get reproducible results. */
988 INSN_ADDRESSES_ALLOC (max_uid
);
990 varying_length
= XCNEWVEC (char, max_uid
);
992 /* Initialize uid_align. We scan instructions
993 from end to start, and keep in align_tab[n] the last seen insn
994 that does an alignment of at least n+1, i.e. the successor
995 in the alignment chain for an insn that does / has a known
997 uid_align
= XCNEWVEC (rtx
, max_uid
);
999 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1000 align_tab
[i
] = NULL_RTX
;
1001 seq
= get_last_insn ();
1002 for (; seq
; seq
= PREV_INSN (seq
))
1004 int uid
= INSN_UID (seq
);
1006 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
1007 uid_align
[uid
] = align_tab
[0];
1010 /* Found an alignment label. */
1011 uid_align
[uid
] = align_tab
[log
];
1012 for (i
= log
- 1; i
>= 0; i
--)
1016 #ifdef CASE_VECTOR_SHORTEN_MODE
1019 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1022 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1023 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1026 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1028 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1029 int len
, i
, min
, max
, insn_shuid
;
1031 addr_diff_vec_flags flags
;
1034 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1036 pat
= PATTERN (insn
);
1037 len
= XVECLEN (pat
, 1);
1038 gcc_assert (len
> 0);
1039 min_align
= MAX_CODE_ALIGN
;
1040 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1042 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1043 int shuid
= INSN_SHUID (lab
);
1054 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1055 min_align
= LABEL_TO_ALIGNMENT (lab
);
1057 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
1058 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
1059 insn_shuid
= INSN_SHUID (insn
);
1060 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1061 memset (&flags
, 0, sizeof (flags
));
1062 flags
.min_align
= min_align
;
1063 flags
.base_after_vec
= rel
> insn_shuid
;
1064 flags
.min_after_vec
= min
> insn_shuid
;
1065 flags
.max_after_vec
= max
> insn_shuid
;
1066 flags
.min_after_base
= min
> rel
;
1067 flags
.max_after_base
= max
> rel
;
1068 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1071 #endif /* CASE_VECTOR_SHORTEN_MODE */
1073 /* Compute initial lengths, addresses, and varying flags for each insn. */
1074 for (insn_current_address
= 0, insn
= first
;
1076 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1078 uid
= INSN_UID (insn
);
1080 insn_lengths
[uid
] = 0;
1084 int log
= LABEL_TO_ALIGNMENT (insn
);
1087 int align
= 1 << log
;
1088 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1089 insn_lengths
[uid
] = new_address
- insn_current_address
;
1093 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1095 if (NOTE_P (insn
) || BARRIER_P (insn
)
1096 || LABEL_P (insn
) || DEBUG_INSN_P(insn
))
1098 if (INSN_DELETED_P (insn
))
1101 body
= PATTERN (insn
);
1102 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1104 /* This only takes room if read-only data goes into the text
1106 if (JUMP_TABLES_IN_TEXT_SECTION
1107 || readonly_data_section
== text_section
)
1108 insn_lengths
[uid
] = (XVECLEN (body
,
1109 GET_CODE (body
) == ADDR_DIFF_VEC
)
1110 * GET_MODE_SIZE (GET_MODE (body
)));
1111 /* Alignment is handled by ADDR_VEC_ALIGN. */
1113 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1114 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1115 else if (GET_CODE (body
) == SEQUENCE
)
1118 int const_delay_slots
;
1120 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1122 const_delay_slots
= 0;
1124 /* Inside a delay slot sequence, we do not do any branch shortening
1125 if the shortening could change the number of delay slots
1127 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1129 rtx inner_insn
= XVECEXP (body
, 0, i
);
1130 int inner_uid
= INSN_UID (inner_insn
);
1133 if (GET_CODE (body
) == ASM_INPUT
1134 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1135 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1136 * insn_default_length (inner_insn
));
1138 inner_length
= insn_default_length (inner_insn
);
1140 insn_lengths
[inner_uid
] = inner_length
;
1141 if (const_delay_slots
)
1143 if ((varying_length
[inner_uid
]
1144 = insn_variable_length_p (inner_insn
)) != 0)
1145 varying_length
[uid
] = 1;
1146 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1147 + insn_lengths
[uid
]);
1150 varying_length
[inner_uid
] = 0;
1151 insn_lengths
[uid
] += inner_length
;
1154 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1156 insn_lengths
[uid
] = insn_default_length (insn
);
1157 varying_length
[uid
] = insn_variable_length_p (insn
);
1160 /* If needed, do any adjustment. */
1161 #ifdef ADJUST_INSN_LENGTH
1162 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1163 if (insn_lengths
[uid
] < 0)
1164 fatal_insn ("negative insn length", insn
);
1168 /* Now loop over all the insns finding varying length insns. For each,
1169 get the current insn length. If it has changed, reflect the change.
1170 When nothing changes for a full pass, we are done. */
1172 while (something_changed
)
1174 something_changed
= 0;
1175 insn_current_align
= MAX_CODE_ALIGN
- 1;
1176 for (insn_current_address
= 0, insn
= first
;
1178 insn
= NEXT_INSN (insn
))
1181 #ifdef ADJUST_INSN_LENGTH
1186 uid
= INSN_UID (insn
);
1190 int log
= LABEL_TO_ALIGNMENT (insn
);
1191 if (log
> insn_current_align
)
1193 int align
= 1 << log
;
1194 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1195 insn_lengths
[uid
] = new_address
- insn_current_address
;
1196 insn_current_align
= log
;
1197 insn_current_address
= new_address
;
1200 insn_lengths
[uid
] = 0;
1201 INSN_ADDRESSES (uid
) = insn_current_address
;
1205 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1206 if (length_align
< insn_current_align
)
1207 insn_current_align
= length_align
;
1209 insn_last_address
= INSN_ADDRESSES (uid
);
1210 INSN_ADDRESSES (uid
) = insn_current_address
;
1212 #ifdef CASE_VECTOR_SHORTEN_MODE
1213 if (optimize
&& JUMP_P (insn
)
1214 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1216 rtx body
= PATTERN (insn
);
1217 int old_length
= insn_lengths
[uid
];
1218 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1219 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1220 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1221 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1222 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1223 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1226 addr_diff_vec_flags flags
;
1228 /* Avoid automatic aggregate initialization. */
1229 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1231 /* Try to find a known alignment for rel_lab. */
1232 for (prev
= rel_lab
;
1234 && ! insn_lengths
[INSN_UID (prev
)]
1235 && ! (varying_length
[INSN_UID (prev
)] & 1);
1236 prev
= PREV_INSN (prev
))
1237 if (varying_length
[INSN_UID (prev
)] & 2)
1239 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1243 /* See the comment on addr_diff_vec_flags in rtl.h for the
1244 meaning of the flags values. base: REL_LAB vec: INSN */
1245 /* Anything after INSN has still addresses from the last
1246 pass; adjust these so that they reflect our current
1247 estimate for this pass. */
1248 if (flags
.base_after_vec
)
1249 rel_addr
+= insn_current_address
- insn_last_address
;
1250 if (flags
.min_after_vec
)
1251 min_addr
+= insn_current_address
- insn_last_address
;
1252 if (flags
.max_after_vec
)
1253 max_addr
+= insn_current_address
- insn_last_address
;
1254 /* We want to know the worst case, i.e. lowest possible value
1255 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1256 its offset is positive, and we have to be wary of code shrink;
1257 otherwise, it is negative, and we have to be vary of code
1259 if (flags
.min_after_base
)
1261 /* If INSN is between REL_LAB and MIN_LAB, the size
1262 changes we are about to make can change the alignment
1263 within the observed offset, therefore we have to break
1264 it up into two parts that are independent. */
1265 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1267 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1268 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1271 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1275 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1277 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1278 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1281 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1283 /* Likewise, determine the highest lowest possible value
1284 for the offset of MAX_LAB. */
1285 if (flags
.max_after_base
)
1287 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1289 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1290 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1293 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1297 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1299 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1300 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1303 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1305 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1306 max_addr
- rel_addr
,
1308 if (JUMP_TABLES_IN_TEXT_SECTION
1309 || readonly_data_section
== text_section
)
1312 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1313 insn_current_address
+= insn_lengths
[uid
];
1314 if (insn_lengths
[uid
] != old_length
)
1315 something_changed
= 1;
1320 #endif /* CASE_VECTOR_SHORTEN_MODE */
1322 if (! (varying_length
[uid
]))
1324 if (NONJUMP_INSN_P (insn
)
1325 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1329 body
= PATTERN (insn
);
1330 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1332 rtx inner_insn
= XVECEXP (body
, 0, i
);
1333 int inner_uid
= INSN_UID (inner_insn
);
1335 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1337 insn_current_address
+= insn_lengths
[inner_uid
];
1341 insn_current_address
+= insn_lengths
[uid
];
1346 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1350 body
= PATTERN (insn
);
1352 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1354 rtx inner_insn
= XVECEXP (body
, 0, i
);
1355 int inner_uid
= INSN_UID (inner_insn
);
1358 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1360 /* insn_current_length returns 0 for insns with a
1361 non-varying length. */
1362 if (! varying_length
[inner_uid
])
1363 inner_length
= insn_lengths
[inner_uid
];
1365 inner_length
= insn_current_length (inner_insn
);
1367 if (inner_length
!= insn_lengths
[inner_uid
])
1369 insn_lengths
[inner_uid
] = inner_length
;
1370 something_changed
= 1;
1372 insn_current_address
+= insn_lengths
[inner_uid
];
1373 new_length
+= inner_length
;
1378 new_length
= insn_current_length (insn
);
1379 insn_current_address
+= new_length
;
1382 #ifdef ADJUST_INSN_LENGTH
1383 /* If needed, do any adjustment. */
1384 tmp_length
= new_length
;
1385 ADJUST_INSN_LENGTH (insn
, new_length
);
1386 insn_current_address
+= (new_length
- tmp_length
);
1389 if (new_length
!= insn_lengths
[uid
])
1391 insn_lengths
[uid
] = new_length
;
1392 something_changed
= 1;
1395 /* For a non-optimizing compile, do only a single pass. */
1400 free (varying_length
);
1402 #endif /* HAVE_ATTR_length */
1405 #ifdef HAVE_ATTR_length
1406 /* Given the body of an INSN known to be generated by an ASM statement, return
1407 the number of machine instructions likely to be generated for this insn.
1408 This is used to compute its length. */
1411 asm_insn_count (rtx body
)
1415 if (GET_CODE (body
) == ASM_INPUT
)
1416 templ
= XSTR (body
, 0);
1418 templ
= decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
, NULL
);
1420 return asm_str_count (templ
);
1424 /* Return the number of machine instructions likely to be generated for the
1425 inline-asm template. */
1427 asm_str_count (const char *templ
)
1434 for (; *templ
; templ
++)
1435 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ
, templ
)
1442 /* ??? This is probably the wrong place for these. */
1443 /* Structure recording the mapping from source file and directory
1444 names at compile time to those to be embedded in debug
1446 typedef struct debug_prefix_map
1448 const char *old_prefix
;
1449 const char *new_prefix
;
1452 struct debug_prefix_map
*next
;
1455 /* Linked list of such structures. */
1456 debug_prefix_map
*debug_prefix_maps
;
1459 /* Record a debug file prefix mapping. ARG is the argument to
1460 -fdebug-prefix-map and must be of the form OLD=NEW. */
1463 add_debug_prefix_map (const char *arg
)
1465 debug_prefix_map
*map
;
1468 p
= strchr (arg
, '=');
1471 error ("invalid argument %qs to -fdebug-prefix-map", arg
);
1474 map
= XNEW (debug_prefix_map
);
1475 map
->old_prefix
= xstrndup (arg
, p
- arg
);
1476 map
->old_len
= p
- arg
;
1478 map
->new_prefix
= xstrdup (p
);
1479 map
->new_len
= strlen (p
);
1480 map
->next
= debug_prefix_maps
;
1481 debug_prefix_maps
= map
;
1484 /* Perform user-specified mapping of debug filename prefixes. Return
1485 the new name corresponding to FILENAME. */
1488 remap_debug_filename (const char *filename
)
1490 debug_prefix_map
*map
;
1495 for (map
= debug_prefix_maps
; map
; map
= map
->next
)
1496 if (filename_ncmp (filename
, map
->old_prefix
, map
->old_len
) == 0)
1500 name
= filename
+ map
->old_len
;
1501 name_len
= strlen (name
) + 1;
1502 s
= (char *) alloca (name_len
+ map
->new_len
);
1503 memcpy (s
, map
->new_prefix
, map
->new_len
);
1504 memcpy (s
+ map
->new_len
, name
, name_len
);
1505 return ggc_strdup (s
);
1508 /* Return true if DWARF2 debug info can be emitted for DECL. */
1511 dwarf2_debug_info_emitted_p (tree decl
)
1513 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1516 if (DECL_IGNORED_P (decl
))
1522 /* Output assembler code for the start of a function,
1523 and initialize some of the variables in this file
1524 for the new function. The label for the function and associated
1525 assembler pseudo-ops have already been output in `assemble_start_function'.
1527 FIRST is the first insn of the rtl for the function being compiled.
1528 FILE is the file to write assembler code to.
1529 OPTIMIZE_P is nonzero if we should eliminate redundant
1530 test and compare insns. */
1533 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1534 int optimize_p ATTRIBUTE_UNUSED
)
1538 this_is_asm_operands
= 0;
1540 last_filename
= locator_file (prologue_locator
);
1541 last_linenum
= locator_line (prologue_locator
);
1542 last_discriminator
= discriminator
= 0;
1544 high_block_linenum
= high_function_linenum
= last_linenum
;
1546 if (!DECL_IGNORED_P (current_function_decl
))
1547 debug_hooks
->begin_prologue (last_linenum
, last_filename
);
1549 if (!dwarf2_debug_info_emitted_p (current_function_decl
))
1550 dwarf2out_begin_prologue (0, NULL
);
1552 #ifdef LEAF_REG_REMAP
1553 if (current_function_uses_only_leaf_regs
)
1554 leaf_renumber_regs (first
);
1557 /* The Sun386i and perhaps other machines don't work right
1558 if the profiling code comes after the prologue. */
1559 if (targetm
.profile_before_prologue () && crtl
->profile
)
1560 profile_function (file
);
1562 #if defined (HAVE_prologue)
1563 if (dwarf2out_do_frame ())
1564 dwarf2out_frame_debug_init ();
1567 /* If debugging, assign block numbers to all of the blocks in this
1571 reemit_insn_block_notes ();
1572 number_blocks (current_function_decl
);
1573 /* We never actually put out begin/end notes for the top-level
1574 block in the function. But, conceptually, that block is
1576 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1579 if (warn_frame_larger_than
1580 && get_frame_size () > frame_larger_than_size
)
1582 /* Issue a warning */
1583 warning (OPT_Wframe_larger_than_
,
1584 "the frame size of %wd bytes is larger than %wd bytes",
1585 get_frame_size (), frame_larger_than_size
);
1588 /* First output the function prologue: code to set up the stack frame. */
1589 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1591 /* If the machine represents the prologue as RTL, the profiling code must
1592 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1593 #ifdef HAVE_prologue
1594 if (! HAVE_prologue
)
1596 profile_after_prologue (file
);
1600 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1602 if (!targetm
.profile_before_prologue () && crtl
->profile
)
1603 profile_function (file
);
1607 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1609 #ifndef NO_PROFILE_COUNTERS
1610 # define NO_PROFILE_COUNTERS 0
1612 #ifdef ASM_OUTPUT_REG_PUSH
1613 rtx sval
= NULL
, chain
= NULL
;
1615 if (cfun
->returns_struct
)
1616 sval
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
),
1618 if (cfun
->static_chain_decl
)
1619 chain
= targetm
.calls
.static_chain (current_function_decl
, true);
1620 #endif /* ASM_OUTPUT_REG_PUSH */
1622 if (! NO_PROFILE_COUNTERS
)
1624 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1625 switch_to_section (data_section
);
1626 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1627 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1628 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1631 switch_to_section (current_function_section ());
1633 #ifdef ASM_OUTPUT_REG_PUSH
1634 if (sval
&& REG_P (sval
))
1635 ASM_OUTPUT_REG_PUSH (file
, REGNO (sval
));
1636 if (chain
&& REG_P (chain
))
1637 ASM_OUTPUT_REG_PUSH (file
, REGNO (chain
));
1640 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1642 #ifdef ASM_OUTPUT_REG_PUSH
1643 if (chain
&& REG_P (chain
))
1644 ASM_OUTPUT_REG_POP (file
, REGNO (chain
));
1645 if (sval
&& REG_P (sval
))
1646 ASM_OUTPUT_REG_POP (file
, REGNO (sval
));
1650 /* Output assembler code for the end of a function.
1651 For clarity, args are same as those of `final_start_function'
1652 even though not all of them are needed. */
1655 final_end_function (void)
1659 if (!DECL_IGNORED_P (current_function_decl
))
1660 debug_hooks
->end_function (high_function_linenum
);
1662 /* Finally, output the function epilogue:
1663 code to restore the stack frame and return to the caller. */
1664 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1666 /* And debug output. */
1667 if (!DECL_IGNORED_P (current_function_decl
))
1668 debug_hooks
->end_epilogue (last_linenum
, last_filename
);
1670 if (!dwarf2_debug_info_emitted_p (current_function_decl
)
1671 && dwarf2out_do_frame ())
1672 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1675 /* Output assembler code for some insns: all or part of a function.
1676 For description of args, see `final_start_function', above. */
1679 final (rtx first
, FILE *file
, int optimize_p
)
1685 last_ignored_compare
= 0;
1687 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1689 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1690 max_uid
= INSN_UID (insn
);
1692 /* If CC tracking across branches is enabled, record the insn which
1693 jumps to each branch only reached from one place. */
1694 if (optimize_p
&& JUMP_P (insn
))
1696 rtx lab
= JUMP_LABEL (insn
);
1697 if (lab
&& LABEL_NUSES (lab
) == 1)
1699 LABEL_REFS (lab
) = insn
;
1709 /* Output the insns. */
1710 for (insn
= first
; insn
;)
1712 #ifdef HAVE_ATTR_length
1713 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1715 /* This can be triggered by bugs elsewhere in the compiler if
1716 new insns are created after init_insn_lengths is called. */
1717 gcc_assert (NOTE_P (insn
));
1718 insn_current_address
= -1;
1721 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1722 #endif /* HAVE_ATTR_length */
1724 insn
= final_scan_insn (insn
, file
, optimize_p
, 0, &seen
);
1729 get_insn_template (int code
, rtx insn
)
1731 switch (insn_data
[code
].output_format
)
1733 case INSN_OUTPUT_FORMAT_SINGLE
:
1734 return insn_data
[code
].output
.single
;
1735 case INSN_OUTPUT_FORMAT_MULTI
:
1736 return insn_data
[code
].output
.multi
[which_alternative
];
1737 case INSN_OUTPUT_FORMAT_FUNCTION
:
1739 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1746 /* Emit the appropriate declaration for an alternate-entry-point
1747 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1748 LABEL_KIND != LABEL_NORMAL.
1750 The case fall-through in this function is intentional. */
1752 output_alternate_entry_point (FILE *file
, rtx insn
)
1754 const char *name
= LABEL_NAME (insn
);
1756 switch (LABEL_KIND (insn
))
1758 case LABEL_WEAK_ENTRY
:
1759 #ifdef ASM_WEAKEN_LABEL
1760 ASM_WEAKEN_LABEL (file
, name
);
1762 case LABEL_GLOBAL_ENTRY
:
1763 targetm
.asm_out
.globalize_label (file
, name
);
1764 case LABEL_STATIC_ENTRY
:
1765 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1766 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1768 ASM_OUTPUT_LABEL (file
, name
);
1777 /* Given a CALL_INSN, find and return the nested CALL. */
1779 call_from_call_insn (rtx insn
)
1782 gcc_assert (CALL_P (insn
));
1785 while (GET_CODE (x
) != CALL
)
1787 switch (GET_CODE (x
))
1792 x
= COND_EXEC_CODE (x
);
1795 x
= XVECEXP (x
, 0, 0);
1805 /* The final scan for one insn, INSN.
1806 Args are same as in `final', except that INSN
1807 is the insn being scanned.
1808 Value returned is the next insn to be scanned.
1810 NOPEEPHOLES is the flag to disallow peephole processing (currently
1811 used for within delayed branch sequence output).
1813 SEEN is used to track the end of the prologue, for emitting
1814 debug information. We force the emission of a line note after
1815 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1816 at the beginning of the second basic block, whichever comes
1820 final_scan_insn (rtx insn
, FILE *file
, int optimize_p ATTRIBUTE_UNUSED
,
1821 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1830 /* Ignore deleted insns. These can occur when we split insns (due to a
1831 template of "#") while not optimizing. */
1832 if (INSN_DELETED_P (insn
))
1833 return NEXT_INSN (insn
);
1835 switch (GET_CODE (insn
))
1838 switch (NOTE_KIND (insn
))
1840 case NOTE_INSN_DELETED
:
1843 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1844 in_cold_section_p
= !in_cold_section_p
;
1846 if (dwarf2out_do_frame ())
1847 dwarf2out_switch_text_section ();
1848 else if (!DECL_IGNORED_P (current_function_decl
))
1849 debug_hooks
->switch_text_section ();
1851 switch_to_section (current_function_section ());
1852 targetm
.asm_out
.function_switched_text_sections (asm_out_file
,
1853 current_function_decl
,
1857 case NOTE_INSN_BASIC_BLOCK
:
1858 if (targetm
.asm_out
.unwind_emit
)
1859 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1862 fprintf (asm_out_file
, "\t%s basic block %d\n",
1863 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1865 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1867 *seen
|= SEEN_EMITTED
;
1868 force_source_line
= true;
1873 discriminator
= NOTE_BASIC_BLOCK (insn
)->discriminator
;
1877 case NOTE_INSN_EH_REGION_BEG
:
1878 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1879 NOTE_EH_HANDLER (insn
));
1882 case NOTE_INSN_EH_REGION_END
:
1883 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1884 NOTE_EH_HANDLER (insn
));
1887 case NOTE_INSN_PROLOGUE_END
:
1888 targetm
.asm_out
.function_end_prologue (file
);
1889 profile_after_prologue (file
);
1891 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1893 *seen
|= SEEN_EMITTED
;
1894 force_source_line
= true;
1901 case NOTE_INSN_EPILOGUE_BEG
:
1902 #if defined (HAVE_epilogue)
1903 if (dwarf2out_do_frame ())
1904 dwarf2out_cfi_begin_epilogue (insn
);
1906 (*debug_hooks
->begin_epilogue
) (last_linenum
, last_filename
);
1907 targetm
.asm_out
.function_begin_epilogue (file
);
1910 case NOTE_INSN_CFA_RESTORE_STATE
:
1911 dwarf2out_frame_debug_restore_state ();
1914 case NOTE_INSN_FUNCTION_BEG
:
1916 if (!DECL_IGNORED_P (current_function_decl
))
1917 debug_hooks
->end_prologue (last_linenum
, last_filename
);
1919 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1921 *seen
|= SEEN_EMITTED
;
1922 force_source_line
= true;
1929 case NOTE_INSN_BLOCK_BEG
:
1930 if (debug_info_level
== DINFO_LEVEL_NORMAL
1931 || debug_info_level
== DINFO_LEVEL_VERBOSE
1932 || write_symbols
== DWARF2_DEBUG
1933 || write_symbols
== VMS_AND_DWARF2_DEBUG
1934 || write_symbols
== VMS_DEBUG
)
1936 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1940 high_block_linenum
= last_linenum
;
1942 /* Output debugging info about the symbol-block beginning. */
1943 if (!DECL_IGNORED_P (current_function_decl
))
1944 debug_hooks
->begin_block (last_linenum
, n
);
1946 /* Mark this block as output. */
1947 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1949 if (write_symbols
== DBX_DEBUG
1950 || write_symbols
== SDB_DEBUG
)
1952 location_t
*locus_ptr
1953 = block_nonartificial_location (NOTE_BLOCK (insn
));
1955 if (locus_ptr
!= NULL
)
1957 override_filename
= LOCATION_FILE (*locus_ptr
);
1958 override_linenum
= LOCATION_LINE (*locus_ptr
);
1963 case NOTE_INSN_BLOCK_END
:
1964 if (debug_info_level
== DINFO_LEVEL_NORMAL
1965 || debug_info_level
== DINFO_LEVEL_VERBOSE
1966 || write_symbols
== DWARF2_DEBUG
1967 || write_symbols
== VMS_AND_DWARF2_DEBUG
1968 || write_symbols
== VMS_DEBUG
)
1970 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1974 /* End of a symbol-block. */
1976 gcc_assert (block_depth
>= 0);
1978 if (!DECL_IGNORED_P (current_function_decl
))
1979 debug_hooks
->end_block (high_block_linenum
, n
);
1981 if (write_symbols
== DBX_DEBUG
1982 || write_symbols
== SDB_DEBUG
)
1984 tree outer_block
= BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn
));
1985 location_t
*locus_ptr
1986 = block_nonartificial_location (outer_block
);
1988 if (locus_ptr
!= NULL
)
1990 override_filename
= LOCATION_FILE (*locus_ptr
);
1991 override_linenum
= LOCATION_LINE (*locus_ptr
);
1995 override_filename
= NULL
;
1996 override_linenum
= 0;
2001 case NOTE_INSN_DELETED_LABEL
:
2002 /* Emit the label. We may have deleted the CODE_LABEL because
2003 the label could be proved to be unreachable, though still
2004 referenced (in the form of having its address taken. */
2005 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2008 case NOTE_INSN_VAR_LOCATION
:
2009 case NOTE_INSN_CALL_ARG_LOCATION
:
2010 if (!DECL_IGNORED_P (current_function_decl
))
2011 debug_hooks
->var_location (insn
);
2021 if (dwarf2out_do_frame ())
2022 dwarf2out_frame_debug (insn
, false);
2026 /* The target port might emit labels in the output function for
2027 some insn, e.g. sh.c output_branchy_insn. */
2028 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2030 int align
= LABEL_TO_ALIGNMENT (insn
);
2031 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2032 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2035 if (align
&& NEXT_INSN (insn
))
2037 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2038 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2040 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2041 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
2043 ASM_OUTPUT_ALIGN (file
, align
);
2050 if (!DECL_IGNORED_P (current_function_decl
) && LABEL_NAME (insn
))
2051 debug_hooks
->label (insn
);
2055 next
= next_nonnote_insn (insn
);
2056 /* If this label is followed by a jump-table, make sure we put
2057 the label in the read-only section. Also possibly write the
2058 label and jump table together. */
2059 if (next
!= 0 && JUMP_TABLE_DATA_P (next
))
2061 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2062 /* In this case, the case vector is being moved by the
2063 target, so don't output the label at all. Leave that
2064 to the back end macros. */
2066 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2070 switch_to_section (targetm
.asm_out
.function_rodata_section
2071 (current_function_decl
));
2073 #ifdef ADDR_VEC_ALIGN
2074 log_align
= ADDR_VEC_ALIGN (next
);
2076 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2078 ASM_OUTPUT_ALIGN (file
, log_align
);
2081 switch_to_section (current_function_section ());
2083 #ifdef ASM_OUTPUT_CASE_LABEL
2084 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2087 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2092 if (LABEL_ALT_ENTRY_P (insn
))
2093 output_alternate_entry_point (file
, insn
);
2095 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2100 rtx body
= PATTERN (insn
);
2101 int insn_code_number
;
2105 /* Reset this early so it is correct for ASM statements. */
2106 current_insn_predicate
= NULL_RTX
;
2108 /* An INSN, JUMP_INSN or CALL_INSN.
2109 First check for special kinds that recog doesn't recognize. */
2111 if (GET_CODE (body
) == USE
/* These are just declarations. */
2112 || GET_CODE (body
) == CLOBBER
)
2117 /* If there is a REG_CC_SETTER note on this insn, it means that
2118 the setting of the condition code was done in the delay slot
2119 of the insn that branched here. So recover the cc status
2120 from the insn that set it. */
2122 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2125 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2126 cc_prev_status
= cc_status
;
2131 /* Detect insns that are really jump-tables
2132 and output them as such. */
2134 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2136 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2140 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2141 switch_to_section (targetm
.asm_out
.function_rodata_section
2142 (current_function_decl
));
2144 switch_to_section (current_function_section ());
2148 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2149 if (GET_CODE (body
) == ADDR_VEC
)
2151 #ifdef ASM_OUTPUT_ADDR_VEC
2152 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2159 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2160 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2166 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2167 for (idx
= 0; idx
< vlen
; idx
++)
2169 if (GET_CODE (body
) == ADDR_VEC
)
2171 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2172 ASM_OUTPUT_ADDR_VEC_ELT
2173 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2180 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2181 ASM_OUTPUT_ADDR_DIFF_ELT
2184 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2185 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2191 #ifdef ASM_OUTPUT_CASE_END
2192 ASM_OUTPUT_CASE_END (file
,
2193 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2198 switch_to_section (current_function_section ());
2202 /* Output this line note if it is the first or the last line
2204 if (!DECL_IGNORED_P (current_function_decl
)
2205 && notice_source_line (insn
, &is_stmt
))
2206 (*debug_hooks
->source_line
) (last_linenum
, last_filename
,
2207 last_discriminator
, is_stmt
);
2209 if (GET_CODE (body
) == ASM_INPUT
)
2211 const char *string
= XSTR (body
, 0);
2213 /* There's no telling what that did to the condition codes. */
2218 expanded_location loc
;
2221 loc
= expand_location (ASM_INPUT_SOURCE_LOCATION (body
));
2222 if (*loc
.file
&& loc
.line
)
2223 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2224 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2225 fprintf (asm_out_file
, "\t%s\n", string
);
2226 #if HAVE_AS_LINE_ZERO
2227 if (*loc
.file
&& loc
.line
)
2228 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2234 /* Detect `asm' construct with operands. */
2235 if (asm_noperands (body
) >= 0)
2237 unsigned int noperands
= asm_noperands (body
);
2238 rtx
*ops
= XALLOCAVEC (rtx
, noperands
);
2241 expanded_location expanded
;
2243 /* There's no telling what that did to the condition codes. */
2246 /* Get out the operand values. */
2247 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
, &loc
);
2248 /* Inhibit dying on what would otherwise be compiler bugs. */
2249 insn_noperands
= noperands
;
2250 this_is_asm_operands
= insn
;
2251 expanded
= expand_location (loc
);
2253 #ifdef FINAL_PRESCAN_INSN
2254 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2257 /* Output the insn using them. */
2261 if (expanded
.file
&& expanded
.line
)
2262 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2263 ASM_COMMENT_START
, expanded
.line
, expanded
.file
);
2264 output_asm_insn (string
, ops
);
2265 #if HAVE_AS_LINE_ZERO
2266 if (expanded
.file
&& expanded
.line
)
2267 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2271 if (targetm
.asm_out
.final_postscan_insn
)
2272 targetm
.asm_out
.final_postscan_insn (file
, insn
, ops
,
2275 this_is_asm_operands
= 0;
2281 if (GET_CODE (body
) == SEQUENCE
)
2283 /* A delayed-branch sequence */
2286 final_sequence
= body
;
2288 /* Record the delay slots' frame information before the branch.
2289 This is needed for delayed calls: see execute_cfa_program(). */
2290 if (dwarf2out_do_frame ())
2291 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2292 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2294 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2295 force the restoration of a comparison that was previously
2296 thought unnecessary. If that happens, cancel this sequence
2297 and cause that insn to be restored. */
2299 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2300 if (next
!= XVECEXP (body
, 0, 1))
2306 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2308 rtx insn
= XVECEXP (body
, 0, i
);
2309 rtx next
= NEXT_INSN (insn
);
2310 /* We loop in case any instruction in a delay slot gets
2313 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2314 while (insn
!= next
);
2316 #ifdef DBR_OUTPUT_SEQEND
2317 DBR_OUTPUT_SEQEND (file
);
2321 /* If the insn requiring the delay slot was a CALL_INSN, the
2322 insns in the delay slot are actually executed before the
2323 called function. Hence we don't preserve any CC-setting
2324 actions in these insns and the CC must be marked as being
2325 clobbered by the function. */
2326 if (CALL_P (XVECEXP (body
, 0, 0)))
2333 /* We have a real machine instruction as rtl. */
2335 body
= PATTERN (insn
);
2338 set
= single_set (insn
);
2340 /* Check for redundant test and compare instructions
2341 (when the condition codes are already set up as desired).
2342 This is done only when optimizing; if not optimizing,
2343 it should be possible for the user to alter a variable
2344 with the debugger in between statements
2345 and the next statement should reexamine the variable
2346 to compute the condition codes. */
2351 && GET_CODE (SET_DEST (set
)) == CC0
2352 && insn
!= last_ignored_compare
)
2355 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2356 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2358 src1
= SET_SRC (set
);
2360 if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2362 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2363 XEXP (SET_SRC (set
), 0)
2364 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2365 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2366 XEXP (SET_SRC (set
), 1)
2367 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2368 if (XEXP (SET_SRC (set
), 1)
2369 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set
), 0))))
2370 src2
= XEXP (SET_SRC (set
), 0);
2372 if ((cc_status
.value1
!= 0
2373 && rtx_equal_p (src1
, cc_status
.value1
))
2374 || (cc_status
.value2
!= 0
2375 && rtx_equal_p (src1
, cc_status
.value2
))
2376 || (src2
!= 0 && cc_status
.value1
!= 0
2377 && rtx_equal_p (src2
, cc_status
.value1
))
2378 || (src2
!= 0 && cc_status
.value2
!= 0
2379 && rtx_equal_p (src2
, cc_status
.value2
)))
2381 /* Don't delete insn if it has an addressing side-effect. */
2382 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2383 /* or if anything in it is volatile. */
2384 && ! volatile_refs_p (PATTERN (insn
)))
2386 /* We don't really delete the insn; just ignore it. */
2387 last_ignored_compare
= insn
;
2394 /* If this is a conditional branch, maybe modify it
2395 if the cc's are in a nonstandard state
2396 so that it accomplishes the same thing that it would
2397 do straightforwardly if the cc's were set up normally. */
2399 if (cc_status
.flags
!= 0
2401 && GET_CODE (body
) == SET
2402 && SET_DEST (body
) == pc_rtx
2403 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2404 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2405 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2407 /* This function may alter the contents of its argument
2408 and clear some of the cc_status.flags bits.
2409 It may also return 1 meaning condition now always true
2410 or -1 meaning condition now always false
2411 or 2 meaning condition nontrivial but altered. */
2412 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2413 /* If condition now has fixed value, replace the IF_THEN_ELSE
2414 with its then-operand or its else-operand. */
2416 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2418 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2420 /* The jump is now either unconditional or a no-op.
2421 If it has become a no-op, don't try to output it.
2422 (It would not be recognized.) */
2423 if (SET_SRC (body
) == pc_rtx
)
2428 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2429 /* Replace (set (pc) (return)) with (return). */
2430 PATTERN (insn
) = body
= SET_SRC (body
);
2432 /* Rerecognize the instruction if it has changed. */
2434 INSN_CODE (insn
) = -1;
2437 /* If this is a conditional trap, maybe modify it if the cc's
2438 are in a nonstandard state so that it accomplishes the same
2439 thing that it would do straightforwardly if the cc's were
2441 if (cc_status
.flags
!= 0
2442 && NONJUMP_INSN_P (insn
)
2443 && GET_CODE (body
) == TRAP_IF
2444 && COMPARISON_P (TRAP_CONDITION (body
))
2445 && XEXP (TRAP_CONDITION (body
), 0) == cc0_rtx
)
2447 /* This function may alter the contents of its argument
2448 and clear some of the cc_status.flags bits.
2449 It may also return 1 meaning condition now always true
2450 or -1 meaning condition now always false
2451 or 2 meaning condition nontrivial but altered. */
2452 int result
= alter_cond (TRAP_CONDITION (body
));
2454 /* If TRAP_CONDITION has become always false, delete the
2462 /* If TRAP_CONDITION has become always true, replace
2463 TRAP_CONDITION with const_true_rtx. */
2465 TRAP_CONDITION (body
) = const_true_rtx
;
2467 /* Rerecognize the instruction if it has changed. */
2469 INSN_CODE (insn
) = -1;
2472 /* Make same adjustments to instructions that examine the
2473 condition codes without jumping and instructions that
2474 handle conditional moves (if this machine has either one). */
2476 if (cc_status
.flags
!= 0
2479 rtx cond_rtx
, then_rtx
, else_rtx
;
2482 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2484 cond_rtx
= XEXP (SET_SRC (set
), 0);
2485 then_rtx
= XEXP (SET_SRC (set
), 1);
2486 else_rtx
= XEXP (SET_SRC (set
), 2);
2490 cond_rtx
= SET_SRC (set
);
2491 then_rtx
= const_true_rtx
;
2492 else_rtx
= const0_rtx
;
2495 switch (GET_CODE (cond_rtx
))
2509 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2511 result
= alter_cond (cond_rtx
);
2513 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2514 else if (result
== -1)
2515 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2516 else if (result
== 2)
2517 INSN_CODE (insn
) = -1;
2518 if (SET_DEST (set
) == SET_SRC (set
))
2530 #ifdef HAVE_peephole
2531 /* Do machine-specific peephole optimizations if desired. */
2533 if (optimize_p
&& !flag_no_peephole
&& !nopeepholes
)
2535 rtx next
= peephole (insn
);
2536 /* When peepholing, if there were notes within the peephole,
2537 emit them before the peephole. */
2538 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2540 rtx note
, prev
= PREV_INSN (insn
);
2542 for (note
= NEXT_INSN (insn
); note
!= next
;
2543 note
= NEXT_INSN (note
))
2544 final_scan_insn (note
, file
, optimize_p
, nopeepholes
, seen
);
2546 /* Put the notes in the proper position for a later
2547 rescan. For example, the SH target can do this
2548 when generating a far jump in a delayed branch
2550 note
= NEXT_INSN (insn
);
2551 PREV_INSN (note
) = prev
;
2552 NEXT_INSN (prev
) = note
;
2553 NEXT_INSN (PREV_INSN (next
)) = insn
;
2554 PREV_INSN (insn
) = PREV_INSN (next
);
2555 NEXT_INSN (insn
) = next
;
2556 PREV_INSN (next
) = insn
;
2559 /* PEEPHOLE might have changed this. */
2560 body
= PATTERN (insn
);
2564 /* Try to recognize the instruction.
2565 If successful, verify that the operands satisfy the
2566 constraints for the instruction. Crash if they don't,
2567 since `reload' should have changed them so that they do. */
2569 insn_code_number
= recog_memoized (insn
);
2570 cleanup_subreg_operands (insn
);
2572 /* Dump the insn in the assembly for debugging. */
2573 if (flag_dump_rtl_in_asm
)
2575 print_rtx_head
= ASM_COMMENT_START
;
2576 print_rtl_single (asm_out_file
, insn
);
2577 print_rtx_head
= "";
2580 if (! constrain_operands_cached (1))
2581 fatal_insn_not_found (insn
);
2583 /* Some target machines need to prescan each insn before
2586 #ifdef FINAL_PRESCAN_INSN
2587 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2590 if (targetm
.have_conditional_execution ()
2591 && GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2592 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2595 cc_prev_status
= cc_status
;
2597 /* Update `cc_status' for this instruction.
2598 The instruction's output routine may change it further.
2599 If the output routine for a jump insn needs to depend
2600 on the cc status, it should look at cc_prev_status. */
2602 NOTICE_UPDATE_CC (body
, insn
);
2605 current_output_insn
= debug_insn
= insn
;
2607 if (CALL_P (insn
) && dwarf2out_do_frame ())
2608 dwarf2out_frame_debug (insn
, false);
2610 /* Find the proper template for this insn. */
2611 templ
= get_insn_template (insn_code_number
, insn
);
2613 /* If the C code returns 0, it means that it is a jump insn
2614 which follows a deleted test insn, and that test insn
2615 needs to be reinserted. */
2620 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2622 /* We have already processed the notes between the setter and
2623 the user. Make sure we don't process them again, this is
2624 particularly important if one of the notes is a block
2625 scope note or an EH note. */
2627 prev
!= last_ignored_compare
;
2628 prev
= PREV_INSN (prev
))
2631 delete_insn (prev
); /* Use delete_note. */
2637 /* If the template is the string "#", it means that this insn must
2639 if (templ
[0] == '#' && templ
[1] == '\0')
2641 rtx new_rtx
= try_split (body
, insn
, 0);
2643 /* If we didn't split the insn, go away. */
2644 if (new_rtx
== insn
&& PATTERN (new_rtx
) == body
)
2645 fatal_insn ("could not split insn", insn
);
2647 #ifdef HAVE_ATTR_length
2648 /* This instruction should have been split in shorten_branches,
2649 to ensure that we would have valid length info for the
2657 /* ??? This will put the directives in the wrong place if
2658 get_insn_template outputs assembly directly. However calling it
2659 before get_insn_template breaks if the insns is split. */
2660 if (targetm
.asm_out
.unwind_emit_before_insn
2661 && targetm
.asm_out
.unwind_emit
)
2662 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2666 rtx x
= call_from_call_insn (insn
);
2668 if (x
&& MEM_P (x
) && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
2672 t
= SYMBOL_REF_DECL (x
);
2674 assemble_external (t
);
2676 if (!DECL_IGNORED_P (current_function_decl
))
2677 debug_hooks
->var_location (insn
);
2680 /* Output assembler code from the template. */
2681 output_asm_insn (templ
, recog_data
.operand
);
2683 /* Some target machines need to postscan each insn after
2685 if (targetm
.asm_out
.final_postscan_insn
)
2686 targetm
.asm_out
.final_postscan_insn (file
, insn
, recog_data
.operand
,
2687 recog_data
.n_operands
);
2689 /* If necessary, report the effect that the instruction has on
2690 the unwind info. We've already done this for delay slots
2691 and call instructions. */
2692 if (final_sequence
== 0
2693 #if !defined (HAVE_prologue)
2694 && !ACCUMULATE_OUTGOING_ARGS
2696 && dwarf2out_do_frame ())
2697 dwarf2out_frame_debug (insn
, true);
2699 if (!targetm
.asm_out
.unwind_emit_before_insn
2700 && targetm
.asm_out
.unwind_emit
)
2701 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2703 current_output_insn
= debug_insn
= 0;
2706 return NEXT_INSN (insn
);
2709 /* Return whether a source line note needs to be emitted before INSN.
2710 Sets IS_STMT to TRUE if the line should be marked as a possible
2711 breakpoint location. */
2714 notice_source_line (rtx insn
, bool *is_stmt
)
2716 const char *filename
;
2719 if (override_filename
)
2721 filename
= override_filename
;
2722 linenum
= override_linenum
;
2726 filename
= insn_file (insn
);
2727 linenum
= insn_line (insn
);
2730 if (filename
== NULL
)
2733 if (force_source_line
2734 || filename
!= last_filename
2735 || last_linenum
!= linenum
)
2737 force_source_line
= false;
2738 last_filename
= filename
;
2739 last_linenum
= linenum
;
2740 last_discriminator
= discriminator
;
2742 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2743 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2747 if (SUPPORTS_DISCRIMINATOR
&& last_discriminator
!= discriminator
)
2749 /* If the discriminator changed, but the line number did not,
2750 output the line table entry with is_stmt false so the
2751 debugger does not treat this as a breakpoint location. */
2752 last_discriminator
= discriminator
;
2760 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2761 directly to the desired hard register. */
2764 cleanup_subreg_operands (rtx insn
)
2767 bool changed
= false;
2768 extract_insn_cached (insn
);
2769 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2771 /* The following test cannot use recog_data.operand when testing
2772 for a SUBREG: the underlying object might have been changed
2773 already if we are inside a match_operator expression that
2774 matches the else clause. Instead we test the underlying
2775 expression directly. */
2776 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2778 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2781 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2782 || GET_CODE (recog_data
.operand
[i
]) == MULT
2783 || MEM_P (recog_data
.operand
[i
]))
2784 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
], &changed
);
2787 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2789 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2791 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2794 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2795 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2796 || MEM_P (*recog_data
.dup_loc
[i
]))
2797 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
], &changed
);
2800 df_insn_rescan (insn
);
2803 /* If X is a SUBREG, replace it with a REG or a MEM,
2804 based on the thing it is a subreg of. */
2807 alter_subreg (rtx
*xp
)
2810 rtx y
= SUBREG_REG (x
);
2812 /* simplify_subreg does not remove subreg from volatile references.
2813 We are required to. */
2816 int offset
= SUBREG_BYTE (x
);
2818 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2819 contains 0 instead of the proper offset. See simplify_subreg. */
2821 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2823 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2824 - GET_MODE_SIZE (GET_MODE (x
));
2825 if (WORDS_BIG_ENDIAN
)
2826 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2827 if (BYTES_BIG_ENDIAN
)
2828 offset
+= difference
% UNITS_PER_WORD
;
2831 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2835 rtx new_rtx
= simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2842 /* Simplify_subreg can't handle some REG cases, but we have to. */
2844 HOST_WIDE_INT offset
;
2846 regno
= subreg_regno (x
);
2847 if (subreg_lowpart_p (x
))
2848 offset
= byte_lowpart_offset (GET_MODE (x
), GET_MODE (y
));
2850 offset
= SUBREG_BYTE (x
);
2851 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, offset
);
2858 /* Do alter_subreg on all the SUBREGs contained in X. */
2861 walk_alter_subreg (rtx
*xp
, bool *changed
)
2864 switch (GET_CODE (x
))
2869 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2870 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1), changed
);
2875 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2880 return alter_subreg (xp
);
2891 /* Given BODY, the body of a jump instruction, alter the jump condition
2892 as required by the bits that are set in cc_status.flags.
2893 Not all of the bits there can be handled at this level in all cases.
2895 The value is normally 0.
2896 1 means that the condition has become always true.
2897 -1 means that the condition has become always false.
2898 2 means that COND has been altered. */
2901 alter_cond (rtx cond
)
2905 if (cc_status
.flags
& CC_REVERSED
)
2908 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2911 if (cc_status
.flags
& CC_INVERTED
)
2914 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2917 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2918 switch (GET_CODE (cond
))
2923 /* Jump becomes unconditional. */
2929 /* Jump becomes no-op. */
2933 PUT_CODE (cond
, EQ
);
2938 PUT_CODE (cond
, NE
);
2946 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2947 switch (GET_CODE (cond
))
2951 /* Jump becomes unconditional. */
2956 /* Jump becomes no-op. */
2961 PUT_CODE (cond
, EQ
);
2967 PUT_CODE (cond
, NE
);
2975 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2976 switch (GET_CODE (cond
))
2979 /* Jump becomes unconditional. */
2983 PUT_CODE (cond
, EQ
);
2988 PUT_CODE (cond
, NE
);
2993 /* Jump becomes no-op. */
3000 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3001 switch (GET_CODE (cond
))
3007 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3012 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3017 if (cc_status
.flags
& CC_NOT_SIGNED
)
3018 /* The flags are valid if signed condition operators are converted
3020 switch (GET_CODE (cond
))
3023 PUT_CODE (cond
, LEU
);
3028 PUT_CODE (cond
, LTU
);
3033 PUT_CODE (cond
, GTU
);
3038 PUT_CODE (cond
, GEU
);
3050 /* Report inconsistency between the assembler template and the operands.
3051 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3054 output_operand_lossage (const char *cmsgid
, ...)
3058 const char *pfx_str
;
3061 va_start (ap
, cmsgid
);
3063 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
3064 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
3065 vasprintf (&new_message
, fmt_string
, ap
);
3067 if (this_is_asm_operands
)
3068 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3070 internal_error ("%s", new_message
);
3077 /* Output of assembler code from a template, and its subroutines. */
3079 /* Annotate the assembly with a comment describing the pattern and
3080 alternative used. */
3083 output_asm_name (void)
3087 int num
= INSN_CODE (debug_insn
);
3088 fprintf (asm_out_file
, "\t%s %d\t%s",
3089 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3090 insn_data
[num
].name
);
3091 if (insn_data
[num
].n_alternatives
> 1)
3092 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3093 #ifdef HAVE_ATTR_length
3094 fprintf (asm_out_file
, "\t[length = %d]",
3095 get_attr_length (debug_insn
));
3097 /* Clear this so only the first assembler insn
3098 of any rtl insn will get the special comment for -dp. */
3103 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3104 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3105 corresponds to the address of the object and 0 if to the object. */
3108 get_mem_expr_from_op (rtx op
, int *paddressp
)
3116 return REG_EXPR (op
);
3117 else if (!MEM_P (op
))
3120 if (MEM_EXPR (op
) != 0)
3121 return MEM_EXPR (op
);
3123 /* Otherwise we have an address, so indicate it and look at the address. */
3127 /* First check if we have a decl for the address, then look at the right side
3128 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3129 But don't allow the address to itself be indirect. */
3130 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3132 else if (GET_CODE (op
) == PLUS
3133 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3137 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
3140 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3141 return inner_addressp
? 0 : expr
;
3144 /* Output operand names for assembler instructions. OPERANDS is the
3145 operand vector, OPORDER is the order to write the operands, and NOPS
3146 is the number of operands to write. */
3149 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
3154 for (i
= 0; i
< nops
; i
++)
3157 rtx op
= operands
[oporder
[i
]];
3158 tree expr
= get_mem_expr_from_op (op
, &addressp
);
3160 fprintf (asm_out_file
, "%c%s",
3161 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
3165 fprintf (asm_out_file
, "%s",
3166 addressp
? "*" : "");
3167 print_mem_expr (asm_out_file
, expr
);
3170 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
3171 && ORIGINAL_REGNO (op
) != REGNO (op
))
3172 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
3176 /* Output text from TEMPLATE to the assembler output file,
3177 obeying %-directions to substitute operands taken from
3178 the vector OPERANDS.
3180 %N (for N a digit) means print operand N in usual manner.
3181 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3182 and print the label name with no punctuation.
3183 %cN means require operand N to be a constant
3184 and print the constant expression with no punctuation.
3185 %aN means expect operand N to be a memory address
3186 (not a memory reference!) and print a reference
3188 %nN means expect operand N to be a constant
3189 and print a constant expression for minus the value
3190 of the operand, with no other punctuation. */
3193 output_asm_insn (const char *templ
, rtx
*operands
)
3197 #ifdef ASSEMBLER_DIALECT
3200 int oporder
[MAX_RECOG_OPERANDS
];
3201 char opoutput
[MAX_RECOG_OPERANDS
];
3204 /* An insn may return a null string template
3205 in a case where no assembler code is needed. */
3209 memset (opoutput
, 0, sizeof opoutput
);
3211 putc ('\t', asm_out_file
);
3213 #ifdef ASM_OUTPUT_OPCODE
3214 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3221 if (flag_verbose_asm
)
3222 output_asm_operand_names (operands
, oporder
, ops
);
3223 if (flag_print_asm_name
)
3227 memset (opoutput
, 0, sizeof opoutput
);
3229 putc (c
, asm_out_file
);
3230 #ifdef ASM_OUTPUT_OPCODE
3231 while ((c
= *p
) == '\t')
3233 putc (c
, asm_out_file
);
3236 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3240 #ifdef ASSEMBLER_DIALECT
3246 output_operand_lossage ("nested assembly dialect alternatives");
3250 /* If we want the first dialect, do nothing. Otherwise, skip
3251 DIALECT_NUMBER of strings ending with '|'. */
3252 for (i
= 0; i
< dialect_number
; i
++)
3254 while (*p
&& *p
!= '}' && *p
++ != '|')
3263 output_operand_lossage ("unterminated assembly dialect alternative");
3270 /* Skip to close brace. */
3275 output_operand_lossage ("unterminated assembly dialect alternative");
3279 while (*p
++ != '}');
3283 putc (c
, asm_out_file
);
3288 putc (c
, asm_out_file
);
3294 /* %% outputs a single %. */
3298 putc (c
, asm_out_file
);
3300 /* %= outputs a number which is unique to each insn in the entire
3301 compilation. This is useful for making local labels that are
3302 referred to more than once in a given insn. */
3306 fprintf (asm_out_file
, "%d", insn_counter
);
3308 /* % followed by a letter and some digits
3309 outputs an operand in a special way depending on the letter.
3310 Letters `acln' are implemented directly.
3311 Other letters are passed to `output_operand' so that
3312 the TARGET_PRINT_OPERAND hook can define them. */
3313 else if (ISALPHA (*p
))
3316 unsigned long opnum
;
3319 opnum
= strtoul (p
, &endptr
, 10);
3322 output_operand_lossage ("operand number missing "
3324 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3325 output_operand_lossage ("operand number out of range");
3326 else if (letter
== 'l')
3327 output_asm_label (operands
[opnum
]);
3328 else if (letter
== 'a')
3329 output_address (operands
[opnum
]);
3330 else if (letter
== 'c')
3332 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3333 output_addr_const (asm_out_file
, operands
[opnum
]);
3335 output_operand (operands
[opnum
], 'c');
3337 else if (letter
== 'n')
3339 if (CONST_INT_P (operands
[opnum
]))
3340 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3341 - INTVAL (operands
[opnum
]));
3344 putc ('-', asm_out_file
);
3345 output_addr_const (asm_out_file
, operands
[opnum
]);
3349 output_operand (operands
[opnum
], letter
);
3351 if (!opoutput
[opnum
])
3352 oporder
[ops
++] = opnum
;
3353 opoutput
[opnum
] = 1;
3358 /* % followed by a digit outputs an operand the default way. */
3359 else if (ISDIGIT (*p
))
3361 unsigned long opnum
;
3364 opnum
= strtoul (p
, &endptr
, 10);
3365 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3366 output_operand_lossage ("operand number out of range");
3368 output_operand (operands
[opnum
], 0);
3370 if (!opoutput
[opnum
])
3371 oporder
[ops
++] = opnum
;
3372 opoutput
[opnum
] = 1;
3377 /* % followed by punctuation: output something for that
3378 punctuation character alone, with no operand. The
3379 TARGET_PRINT_OPERAND hook decides what is actually done. */
3380 else if (targetm
.asm_out
.print_operand_punct_valid_p ((unsigned char) *p
))
3381 output_operand (NULL_RTX
, *p
++);
3383 output_operand_lossage ("invalid %%-code");
3387 putc (c
, asm_out_file
);
3390 /* Write out the variable names for operands, if we know them. */
3391 if (flag_verbose_asm
)
3392 output_asm_operand_names (operands
, oporder
, ops
);
3393 if (flag_print_asm_name
)
3396 putc ('\n', asm_out_file
);
3399 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3402 output_asm_label (rtx x
)
3406 if (GET_CODE (x
) == LABEL_REF
)
3410 && NOTE_KIND (x
) == NOTE_INSN_DELETED_LABEL
))
3411 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3413 output_operand_lossage ("'%%l' operand isn't a label");
3415 assemble_name (asm_out_file
, buf
);
3418 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3419 output_operand. Marks SYMBOL_REFs as referenced through use of
3420 assemble_external. */
3423 mark_symbol_ref_as_used (rtx
*xp
, void *dummy ATTRIBUTE_UNUSED
)
3427 /* If we have a used symbol, we may have to emit assembly
3428 annotations corresponding to whether the symbol is external, weak
3429 or has non-default visibility. */
3430 if (GET_CODE (x
) == SYMBOL_REF
)
3434 t
= SYMBOL_REF_DECL (x
);
3436 assemble_external (t
);
3444 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3447 mark_symbol_refs_as_used (rtx x
)
3449 for_each_rtx (&x
, mark_symbol_ref_as_used
, NULL
);
3452 /* Print operand X using machine-dependent assembler syntax.
3453 CODE is a non-digit that preceded the operand-number in the % spec,
3454 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3455 between the % and the digits.
3456 When CODE is a non-letter, X is 0.
3458 The meanings of the letters are machine-dependent and controlled
3459 by TARGET_PRINT_OPERAND. */
3462 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3464 if (x
&& GET_CODE (x
) == SUBREG
)
3465 x
= alter_subreg (&x
);
3467 /* X must not be a pseudo reg. */
3468 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3470 targetm
.asm_out
.print_operand (asm_out_file
, x
, code
);
3475 for_each_rtx (&x
, mark_symbol_ref_as_used
, NULL
);
3478 /* Print a memory reference operand for address X using
3479 machine-dependent assembler syntax. */
3482 output_address (rtx x
)
3484 bool changed
= false;
3485 walk_alter_subreg (&x
, &changed
);
3486 targetm
.asm_out
.print_operand_address (asm_out_file
, x
);
3489 /* Print an integer constant expression in assembler syntax.
3490 Addition and subtraction are the only arithmetic
3491 that may appear in these expressions. */
3494 output_addr_const (FILE *file
, rtx x
)
3499 switch (GET_CODE (x
))
3506 if (SYMBOL_REF_DECL (x
))
3507 assemble_external (SYMBOL_REF_DECL (x
));
3508 #ifdef ASM_OUTPUT_SYMBOL_REF
3509 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3511 assemble_name (file
, XSTR (x
, 0));
3519 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3520 #ifdef ASM_OUTPUT_LABEL_REF
3521 ASM_OUTPUT_LABEL_REF (file
, buf
);
3523 assemble_name (file
, buf
);
3528 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3532 /* This used to output parentheses around the expression,
3533 but that does not work on the 386 (either ATT or BSD assembler). */
3534 output_addr_const (file
, XEXP (x
, 0));
3538 if (GET_MODE (x
) == VOIDmode
)
3540 /* We can use %d if the number is one word and positive. */
3541 if (CONST_DOUBLE_HIGH (x
))
3542 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3543 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_HIGH (x
),
3544 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (x
));
3545 else if (CONST_DOUBLE_LOW (x
) < 0)
3546 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3547 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (x
));
3549 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3552 /* We can't handle floating point constants;
3553 PRINT_OPERAND must handle them. */
3554 output_operand_lossage ("floating constant misused");
3558 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3559 (unsigned HOST_WIDE_INT
) CONST_FIXED_VALUE_LOW (x
));
3563 /* Some assemblers need integer constants to appear last (eg masm). */
3564 if (CONST_INT_P (XEXP (x
, 0)))
3566 output_addr_const (file
, XEXP (x
, 1));
3567 if (INTVAL (XEXP (x
, 0)) >= 0)
3568 fprintf (file
, "+");
3569 output_addr_const (file
, XEXP (x
, 0));
3573 output_addr_const (file
, XEXP (x
, 0));
3574 if (!CONST_INT_P (XEXP (x
, 1))
3575 || INTVAL (XEXP (x
, 1)) >= 0)
3576 fprintf (file
, "+");
3577 output_addr_const (file
, XEXP (x
, 1));
3582 /* Avoid outputting things like x-x or x+5-x,
3583 since some assemblers can't handle that. */
3584 x
= simplify_subtraction (x
);
3585 if (GET_CODE (x
) != MINUS
)
3588 output_addr_const (file
, XEXP (x
, 0));
3589 fprintf (file
, "-");
3590 if ((CONST_INT_P (XEXP (x
, 1)) && INTVAL (XEXP (x
, 1)) >= 0)
3591 || GET_CODE (XEXP (x
, 1)) == PC
3592 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3593 output_addr_const (file
, XEXP (x
, 1));
3596 fputs (targetm
.asm_out
.open_paren
, file
);
3597 output_addr_const (file
, XEXP (x
, 1));
3598 fputs (targetm
.asm_out
.close_paren
, file
);
3606 output_addr_const (file
, XEXP (x
, 0));
3610 if (targetm
.asm_out
.output_addr_const_extra (file
, x
))
3613 output_operand_lossage ("invalid expression as operand");
3617 /* Output a quoted string. */
3620 output_quoted_string (FILE *asm_file
, const char *string
)
3622 #ifdef OUTPUT_QUOTED_STRING
3623 OUTPUT_QUOTED_STRING (asm_file
, string
);
3627 putc ('\"', asm_file
);
3628 while ((c
= *string
++) != 0)
3632 if (c
== '\"' || c
== '\\')
3633 putc ('\\', asm_file
);
3637 fprintf (asm_file
, "\\%03o", (unsigned char) c
);
3639 putc ('\"', asm_file
);
3643 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3644 %R prints the value of REGISTER_PREFIX.
3645 %L prints the value of LOCAL_LABEL_PREFIX.
3646 %U prints the value of USER_LABEL_PREFIX.
3647 %I prints the value of IMMEDIATE_PREFIX.
3648 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3649 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3651 We handle alternate assembler dialects here, just like output_asm_insn. */
3654 asm_fprintf (FILE *file
, const char *p
, ...)
3660 va_start (argptr
, p
);
3667 #ifdef ASSEMBLER_DIALECT
3672 /* If we want the first dialect, do nothing. Otherwise, skip
3673 DIALECT_NUMBER of strings ending with '|'. */
3674 for (i
= 0; i
< dialect_number
; i
++)
3676 while (*p
&& *p
++ != '|')
3686 /* Skip to close brace. */
3687 while (*p
&& *p
++ != '}')
3698 while (strchr ("-+ #0", c
))
3703 while (ISDIGIT (c
) || c
== '.')
3714 case 'd': case 'i': case 'u':
3715 case 'x': case 'X': case 'o':
3719 fprintf (file
, buf
, va_arg (argptr
, int));
3723 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3724 'o' cases, but we do not check for those cases. It
3725 means that the value is a HOST_WIDE_INT, which may be
3726 either `long' or `long long'. */
3727 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3728 q
+= strlen (HOST_WIDE_INT_PRINT
);
3731 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3736 #ifdef HAVE_LONG_LONG
3742 fprintf (file
, buf
, va_arg (argptr
, long long));
3749 fprintf (file
, buf
, va_arg (argptr
, long));
3757 fprintf (file
, buf
, va_arg (argptr
, char *));
3761 #ifdef ASM_OUTPUT_OPCODE
3762 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3767 #ifdef REGISTER_PREFIX
3768 fprintf (file
, "%s", REGISTER_PREFIX
);
3773 #ifdef IMMEDIATE_PREFIX
3774 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3779 #ifdef LOCAL_LABEL_PREFIX
3780 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3785 fputs (user_label_prefix
, file
);
3788 #ifdef ASM_FPRINTF_EXTENSIONS
3789 /* Uppercase letters are reserved for general use by asm_fprintf
3790 and so are not available to target specific code. In order to
3791 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3792 they are defined here. As they get turned into real extensions
3793 to asm_fprintf they should be removed from this list. */
3794 case 'A': case 'B': case 'C': case 'D': case 'E':
3795 case 'F': case 'G': case 'H': case 'J': case 'K':
3796 case 'M': case 'N': case 'P': case 'Q': case 'S':
3797 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3800 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3813 /* Split up a CONST_DOUBLE or integer constant rtx
3814 into two rtx's for single words,
3815 storing in *FIRST the word that comes first in memory in the target
3816 and in *SECOND the other. */
3819 split_double (rtx value
, rtx
*first
, rtx
*second
)
3821 if (CONST_INT_P (value
))
3823 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3825 /* In this case the CONST_INT holds both target words.
3826 Extract the bits from it into two word-sized pieces.
3827 Sign extend each half to HOST_WIDE_INT. */
3828 unsigned HOST_WIDE_INT low
, high
;
3829 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3830 unsigned bits_per_word
= BITS_PER_WORD
;
3832 /* Set sign_bit to the most significant bit of a word. */
3834 sign_bit
<<= bits_per_word
- 1;
3836 /* Set mask so that all bits of the word are set. We could
3837 have used 1 << BITS_PER_WORD instead of basing the
3838 calculation on sign_bit. However, on machines where
3839 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3840 compiler warning, even though the code would never be
3842 mask
= sign_bit
<< 1;
3845 /* Set sign_extend as any remaining bits. */
3846 sign_extend
= ~mask
;
3848 /* Pick the lower word and sign-extend it. */
3849 low
= INTVAL (value
);
3854 /* Pick the higher word, shifted to the least significant
3855 bits, and sign-extend it. */
3856 high
= INTVAL (value
);
3857 high
>>= bits_per_word
- 1;
3860 if (high
& sign_bit
)
3861 high
|= sign_extend
;
3863 /* Store the words in the target machine order. */
3864 if (WORDS_BIG_ENDIAN
)
3866 *first
= GEN_INT (high
);
3867 *second
= GEN_INT (low
);
3871 *first
= GEN_INT (low
);
3872 *second
= GEN_INT (high
);
3877 /* The rule for using CONST_INT for a wider mode
3878 is that we regard the value as signed.
3879 So sign-extend it. */
3880 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3881 if (WORDS_BIG_ENDIAN
)
3893 else if (GET_CODE (value
) != CONST_DOUBLE
)
3895 if (WORDS_BIG_ENDIAN
)
3897 *first
= const0_rtx
;
3903 *second
= const0_rtx
;
3906 else if (GET_MODE (value
) == VOIDmode
3907 /* This is the old way we did CONST_DOUBLE integers. */
3908 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3910 /* In an integer, the words are defined as most and least significant.
3911 So order them by the target's convention. */
3912 if (WORDS_BIG_ENDIAN
)
3914 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3915 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3919 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3920 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3927 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3929 /* Note, this converts the REAL_VALUE_TYPE to the target's
3930 format, splits up the floating point double and outputs
3931 exactly 32 bits of it into each of l[0] and l[1] --
3932 not necessarily BITS_PER_WORD bits. */
3933 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3935 /* If 32 bits is an entire word for the target, but not for the host,
3936 then sign-extend on the host so that the number will look the same
3937 way on the host that it would on the target. See for instance
3938 simplify_unary_operation. The #if is needed to avoid compiler
3941 #if HOST_BITS_PER_LONG > 32
3942 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3944 if (l
[0] & ((long) 1 << 31))
3945 l
[0] |= ((long) (-1) << 32);
3946 if (l
[1] & ((long) 1 << 31))
3947 l
[1] |= ((long) (-1) << 32);
3951 *first
= GEN_INT (l
[0]);
3952 *second
= GEN_INT (l
[1]);
3956 /* Return nonzero if this function has no function calls. */
3959 leaf_function_p (void)
3964 if (crtl
->profile
|| profile_arc_flag
)
3967 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3970 && ! SIBLING_CALL_P (insn
))
3972 if (NONJUMP_INSN_P (insn
)
3973 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3974 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3975 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3978 for (link
= crtl
->epilogue_delay_list
;
3980 link
= XEXP (link
, 1))
3982 insn
= XEXP (link
, 0);
3985 && ! SIBLING_CALL_P (insn
))
3987 if (NONJUMP_INSN_P (insn
)
3988 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3989 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3990 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3997 /* Return 1 if branch is a forward branch.
3998 Uses insn_shuid array, so it works only in the final pass. May be used by
3999 output templates to customary add branch prediction hints.
4002 final_forward_branch_p (rtx insn
)
4004 int insn_id
, label_id
;
4006 gcc_assert (uid_shuid
);
4007 insn_id
= INSN_SHUID (insn
);
4008 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4009 /* We've hit some insns that does not have id information available. */
4010 gcc_assert (insn_id
&& label_id
);
4011 return insn_id
< label_id
;
4014 /* On some machines, a function with no call insns
4015 can run faster if it doesn't create its own register window.
4016 When output, the leaf function should use only the "output"
4017 registers. Ordinarily, the function would be compiled to use
4018 the "input" registers to find its arguments; it is a candidate
4019 for leaf treatment if it uses only the "input" registers.
4020 Leaf function treatment means renumbering so the function
4021 uses the "output" registers instead. */
4023 #ifdef LEAF_REGISTERS
4025 /* Return 1 if this function uses only the registers that can be
4026 safely renumbered. */
4029 only_leaf_regs_used (void)
4032 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4034 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4035 if ((df_regs_ever_live_p (i
) || global_regs
[i
])
4036 && ! permitted_reg_in_leaf_functions
[i
])
4039 if (crtl
->uses_pic_offset_table
4040 && pic_offset_table_rtx
!= 0
4041 && REG_P (pic_offset_table_rtx
)
4042 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4048 /* Scan all instructions and renumber all registers into those
4049 available in leaf functions. */
4052 leaf_renumber_regs (rtx first
)
4056 /* Renumber only the actual patterns.
4057 The reg-notes can contain frame pointer refs,
4058 and renumbering them could crash, and should not be needed. */
4059 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4061 leaf_renumber_regs_insn (PATTERN (insn
));
4062 for (insn
= crtl
->epilogue_delay_list
;
4064 insn
= XEXP (insn
, 1))
4065 if (INSN_P (XEXP (insn
, 0)))
4066 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4069 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4070 available in leaf functions. */
4073 leaf_renumber_regs_insn (rtx in_rtx
)
4076 const char *format_ptr
;
4081 /* Renumber all input-registers into output-registers.
4082 renumbered_regs would be 1 for an output-register;
4089 /* Don't renumber the same reg twice. */
4093 newreg
= REGNO (in_rtx
);
4094 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4095 to reach here as part of a REG_NOTE. */
4096 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4101 newreg
= LEAF_REG_REMAP (newreg
);
4102 gcc_assert (newreg
>= 0);
4103 df_set_regs_ever_live (REGNO (in_rtx
), false);
4104 df_set_regs_ever_live (newreg
, true);
4105 SET_REGNO (in_rtx
, newreg
);
4109 if (INSN_P (in_rtx
))
4111 /* Inside a SEQUENCE, we find insns.
4112 Renumber just the patterns of these insns,
4113 just as we do for the top-level insns. */
4114 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4118 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4120 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4121 switch (*format_ptr
++)
4124 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4128 if (NULL
!= XVEC (in_rtx
, i
))
4130 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4131 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
4150 /* Turn the RTL into assembly. */
4152 rest_of_handle_final (void)
4157 /* Get the function's name, as described by its RTL. This may be
4158 different from the DECL_NAME name used in the source file. */
4160 x
= DECL_RTL (current_function_decl
);
4161 gcc_assert (MEM_P (x
));
4163 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
4164 fnname
= XSTR (x
, 0);
4166 assemble_start_function (current_function_decl
, fnname
);
4167 final_start_function (get_insns (), asm_out_file
, optimize
);
4168 final (get_insns (), asm_out_file
, optimize
);
4169 final_end_function ();
4171 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4172 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4173 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4174 output_function_exception_table (fnname
);
4176 assemble_end_function (current_function_decl
, fnname
);
4178 user_defined_section_attribute
= false;
4180 /* Free up reg info memory. */
4184 fflush (asm_out_file
);
4186 /* Write DBX symbols if requested. */
4188 /* Note that for those inline functions where we don't initially
4189 know for certain that we will be generating an out-of-line copy,
4190 the first invocation of this routine (rest_of_compilation) will
4191 skip over this code by doing a `goto exit_rest_of_compilation;'.
4192 Later on, wrapup_global_declarations will (indirectly) call
4193 rest_of_compilation again for those inline functions that need
4194 to have out-of-line copies generated. During that call, we
4195 *will* be routed past here. */
4197 timevar_push (TV_SYMOUT
);
4198 if (!DECL_IGNORED_P (current_function_decl
))
4199 debug_hooks
->function_decl (current_function_decl
);
4200 timevar_pop (TV_SYMOUT
);
4202 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4203 DECL_INITIAL (current_function_decl
) = error_mark_node
;
4205 if (DECL_STATIC_CONSTRUCTOR (current_function_decl
)
4206 && targetm
.have_ctors_dtors
)
4207 targetm
.asm_out
.constructor (XEXP (DECL_RTL (current_function_decl
), 0),
4208 decl_init_priority_lookup
4209 (current_function_decl
));
4210 if (DECL_STATIC_DESTRUCTOR (current_function_decl
)
4211 && targetm
.have_ctors_dtors
)
4212 targetm
.asm_out
.destructor (XEXP (DECL_RTL (current_function_decl
), 0),
4213 decl_fini_priority_lookup
4214 (current_function_decl
));
4218 struct rtl_opt_pass pass_final
=
4224 rest_of_handle_final
, /* execute */
4227 0, /* static_pass_number */
4228 TV_FINAL
, /* tv_id */
4229 0, /* properties_required */
4230 0, /* properties_provided */
4231 0, /* properties_destroyed */
4232 0, /* todo_flags_start */
4233 TODO_ggc_collect
/* todo_flags_finish */
4239 rest_of_handle_shorten_branches (void)
4241 /* Shorten branches. */
4242 shorten_branches (get_insns ());
4246 struct rtl_opt_pass pass_shorten_branches
=
4250 "shorten", /* name */
4252 rest_of_handle_shorten_branches
, /* execute */
4255 0, /* static_pass_number */
4256 TV_FINAL
, /* tv_id */
4257 0, /* properties_required */
4258 0, /* properties_provided */
4259 0, /* properties_destroyed */
4260 0, /* todo_flags_start */
4261 TODO_dump_func
/* todo_flags_finish */
4267 rest_of_clean_state (void)
4270 FILE *final_output
= NULL
;
4271 int save_unnumbered
= flag_dump_unnumbered
;
4272 int save_noaddr
= flag_dump_noaddr
;
4274 if (flag_dump_final_insns
)
4276 final_output
= fopen (flag_dump_final_insns
, "a");
4279 error ("could not open final insn dump file %qs: %m",
4280 flag_dump_final_insns
);
4281 flag_dump_final_insns
= NULL
;
4286 struct cgraph_node
*node
= cgraph_node (current_function_decl
);
4288 aname
= (IDENTIFIER_POINTER
4289 (DECL_ASSEMBLER_NAME (current_function_decl
)));
4290 fprintf (final_output
, "\n;; Function (%s) %s\n\n", aname
,
4291 node
->frequency
== NODE_FREQUENCY_HOT
4293 : node
->frequency
== NODE_FREQUENCY_UNLIKELY_EXECUTED
4294 ? " (unlikely executed)"
4295 : node
->frequency
== NODE_FREQUENCY_EXECUTED_ONCE
4296 ? " (executed once)"
4299 flag_dump_noaddr
= flag_dump_unnumbered
= 1;
4300 if (flag_compare_debug_opt
|| flag_compare_debug
)
4301 dump_flags
|= TDF_NOUID
;
4302 final_insns_dump_p
= true;
4304 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
4306 INSN_UID (insn
) = CODE_LABEL_NUMBER (insn
);
4310 set_block_for_insn (insn
, NULL
);
4311 INSN_UID (insn
) = 0;
4316 /* It is very important to decompose the RTL instruction chain here:
4317 debug information keeps pointing into CODE_LABEL insns inside the function
4318 body. If these remain pointing to the other insns, we end up preserving
4319 whole RTL chain and attached detailed debug info in memory. */
4320 for (insn
= get_insns (); insn
; insn
= next
)
4322 next
= NEXT_INSN (insn
);
4323 NEXT_INSN (insn
) = NULL
;
4324 PREV_INSN (insn
) = NULL
;
4327 && (!NOTE_P (insn
) ||
4328 (NOTE_KIND (insn
) != NOTE_INSN_VAR_LOCATION
4329 && NOTE_KIND (insn
) != NOTE_INSN_CALL_ARG_LOCATION
4330 && NOTE_KIND (insn
) != NOTE_INSN_BLOCK_BEG
4331 && NOTE_KIND (insn
) != NOTE_INSN_BLOCK_END
4332 && NOTE_KIND (insn
) != NOTE_INSN_CFA_RESTORE_STATE
)))
4333 print_rtl_single (final_output
, insn
);
4338 flag_dump_noaddr
= save_noaddr
;
4339 flag_dump_unnumbered
= save_unnumbered
;
4340 final_insns_dump_p
= false;
4342 if (fclose (final_output
))
4344 error ("could not close final insn dump file %qs: %m",
4345 flag_dump_final_insns
);
4346 flag_dump_final_insns
= NULL
;
4350 /* In case the function was not output,
4351 don't leave any temporary anonymous types
4352 queued up for sdb output. */
4353 #ifdef SDB_DEBUGGING_INFO
4354 if (write_symbols
== SDB_DEBUG
)
4355 sdbout_types (NULL_TREE
);
4358 flag_rerun_cse_after_global_opts
= 0;
4359 reload_completed
= 0;
4360 epilogue_completed
= 0;
4362 regstack_completed
= 0;
4365 /* Clear out the insn_length contents now that they are no
4367 init_insn_lengths ();
4369 /* Show no temporary slots allocated. */
4372 free_bb_for_insn ();
4376 /* We can reduce stack alignment on call site only when we are sure that
4377 the function body just produced will be actually used in the final
4379 if (decl_binds_to_current_def_p (current_function_decl
))
4381 unsigned int pref
= crtl
->preferred_stack_boundary
;
4382 if (crtl
->stack_alignment_needed
> crtl
->preferred_stack_boundary
)
4383 pref
= crtl
->stack_alignment_needed
;
4384 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4388 /* Make sure volatile mem refs aren't considered valid operands for
4389 arithmetic insns. We must call this here if this is a nested inline
4390 function, since the above code leaves us in the init_recog state,
4391 and the function context push/pop code does not save/restore volatile_ok.
4393 ??? Maybe it isn't necessary for expand_start_function to call this
4394 anymore if we do it here? */
4396 init_recog_no_volatile ();
4398 /* We're done with this function. Free up memory if we can. */
4399 free_after_parsing (cfun
);
4400 free_after_compilation (cfun
);
4404 struct rtl_opt_pass pass_clean_state
=
4408 "*clean_state", /* name */
4410 rest_of_clean_state
, /* execute */
4413 0, /* static_pass_number */
4414 TV_FINAL
, /* tv_id */
4415 0, /* properties_required */
4416 0, /* properties_provided */
4417 PROP_rtl
, /* properties_destroyed */
4418 0, /* todo_flags_start */
4419 0 /* todo_flags_finish */