1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
44 #include "stringpool.h"
45 #include "insn-config.h"
49 #include "diagnostic-core.h"
51 #include "fold-const.h"
60 #include "stor-layout.h"
63 struct target_rtl default_target_rtl
;
65 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
68 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
70 /* Commonly used modes. */
72 machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
73 machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
74 machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
75 machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
77 /* Datastructures maintained for currently processed function in RTL form. */
79 struct rtl_data x_rtl
;
81 /* Indexed by pseudo register number, gives the rtx for that pseudo.
82 Allocated in parallel with regno_pointer_align.
83 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
84 with length attribute nested in top level structures. */
88 /* This is *not* reset after each function. It gives each CODE_LABEL
89 in the entire compilation a unique label number. */
91 static GTY(()) int label_num
= 1;
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
96 is set only for MODE_INT and MODE_VECTOR_INT modes. */
98 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
102 REAL_VALUE_TYPE dconst0
;
103 REAL_VALUE_TYPE dconst1
;
104 REAL_VALUE_TYPE dconst2
;
105 REAL_VALUE_TYPE dconstm1
;
106 REAL_VALUE_TYPE dconsthalf
;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
110 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
119 /* Standard pieces of rtx, to be substituted directly into things. */
122 rtx simple_return_rtx
;
125 /* Marker used for denoting an INSN, which should never be accessed (i.e.,
126 this pointer should normally never be dereferenced), but is required to be
127 distinct from NULL_RTX. Currently used by peephole2 pass. */
128 rtx_insn
*invalid_insn_rtx
;
130 /* A hash table storing CONST_INTs whose absolute value is greater
131 than MAX_SAVED_CONST_INT. */
133 struct const_int_hasher
: ggc_cache_ptr_hash
<rtx_def
>
135 typedef HOST_WIDE_INT compare_type
;
137 static hashval_t
hash (rtx i
);
138 static bool equal (rtx i
, HOST_WIDE_INT h
);
141 static GTY ((cache
)) hash_table
<const_int_hasher
> *const_int_htab
;
143 struct const_wide_int_hasher
: ggc_cache_ptr_hash
<rtx_def
>
145 static hashval_t
hash (rtx x
);
146 static bool equal (rtx x
, rtx y
);
149 static GTY ((cache
)) hash_table
<const_wide_int_hasher
> *const_wide_int_htab
;
151 /* A hash table storing register attribute structures. */
152 struct reg_attr_hasher
: ggc_cache_ptr_hash
<reg_attrs
>
154 static hashval_t
hash (reg_attrs
*x
);
155 static bool equal (reg_attrs
*a
, reg_attrs
*b
);
158 static GTY ((cache
)) hash_table
<reg_attr_hasher
> *reg_attrs_htab
;
160 /* A hash table storing all CONST_DOUBLEs. */
161 struct const_double_hasher
: ggc_cache_ptr_hash
<rtx_def
>
163 static hashval_t
hash (rtx x
);
164 static bool equal (rtx x
, rtx y
);
167 static GTY ((cache
)) hash_table
<const_double_hasher
> *const_double_htab
;
169 /* A hash table storing all CONST_FIXEDs. */
170 struct const_fixed_hasher
: ggc_cache_ptr_hash
<rtx_def
>
172 static hashval_t
hash (rtx x
);
173 static bool equal (rtx x
, rtx y
);
176 static GTY ((cache
)) hash_table
<const_fixed_hasher
> *const_fixed_htab
;
178 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
179 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
180 #define first_label_num (crtl->emit.x_first_label_num)
182 static void set_used_decls (tree
);
183 static void mark_label_nuses (rtx
);
184 #if TARGET_SUPPORTS_WIDE_INT
185 static rtx
lookup_const_wide_int (rtx
);
187 static rtx
lookup_const_double (rtx
);
188 static rtx
lookup_const_fixed (rtx
);
189 static reg_attrs
*get_reg_attrs (tree
, int);
190 static rtx
gen_const_vector (machine_mode
, int);
191 static void copy_rtx_if_shared_1 (rtx
*orig
);
193 /* Probability of the conditional branch currently proceeded by try_split.
194 Set to -1 otherwise. */
195 int split_branch_probability
= -1;
197 /* Returns a hash code for X (which is a really a CONST_INT). */
200 const_int_hasher::hash (rtx x
)
202 return (hashval_t
) INTVAL (x
);
205 /* Returns nonzero if the value represented by X (which is really a
206 CONST_INT) is the same as that given by Y (which is really a
210 const_int_hasher::equal (rtx x
, HOST_WIDE_INT y
)
212 return (INTVAL (x
) == y
);
215 #if TARGET_SUPPORTS_WIDE_INT
216 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
219 const_wide_int_hasher::hash (rtx x
)
222 unsigned HOST_WIDE_INT hash
= 0;
225 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
226 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
228 return (hashval_t
) hash
;
231 /* Returns nonzero if the value represented by X (which is really a
232 CONST_WIDE_INT) is the same as that given by Y (which is really a
236 const_wide_int_hasher::equal (rtx x
, rtx y
)
241 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
244 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
245 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
252 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
254 const_double_hasher::hash (rtx x
)
256 const_rtx
const value
= x
;
259 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
260 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
263 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
264 /* MODE is used in the comparison, so it should be in the hash. */
265 h
^= GET_MODE (value
);
270 /* Returns nonzero if the value represented by X (really a ...)
271 is the same as that represented by Y (really a ...) */
273 const_double_hasher::equal (rtx x
, rtx y
)
275 const_rtx
const a
= x
, b
= y
;
277 if (GET_MODE (a
) != GET_MODE (b
))
279 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
280 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
281 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
283 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
284 CONST_DOUBLE_REAL_VALUE (b
));
287 /* Returns a hash code for X (which is really a CONST_FIXED). */
290 const_fixed_hasher::hash (rtx x
)
292 const_rtx
const value
= x
;
295 h
= fixed_hash (CONST_FIXED_VALUE (value
));
296 /* MODE is used in the comparison, so it should be in the hash. */
297 h
^= GET_MODE (value
);
301 /* Returns nonzero if the value represented by X is the same as that
305 const_fixed_hasher::equal (rtx x
, rtx y
)
307 const_rtx
const a
= x
, b
= y
;
309 if (GET_MODE (a
) != GET_MODE (b
))
311 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
314 /* Return true if the given memory attributes are equal. */
317 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
323 return (p
->alias
== q
->alias
324 && p
->offset_known_p
== q
->offset_known_p
325 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
326 && p
->size_known_p
== q
->size_known_p
327 && (!p
->size_known_p
|| p
->size
== q
->size
)
328 && p
->align
== q
->align
329 && p
->addrspace
== q
->addrspace
330 && (p
->expr
== q
->expr
331 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
332 && operand_equal_p (p
->expr
, q
->expr
, 0))));
335 /* Set MEM's memory attributes so that they are the same as ATTRS. */
338 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
340 /* If everything is the default, we can just clear the attributes. */
341 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
348 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
350 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
351 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attr_hasher::hash (reg_attrs
*x
)
360 const reg_attrs
*const p
= x
;
362 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
365 /* Returns nonzero if the value represented by X is the same as that given by
369 reg_attr_hasher::equal (reg_attrs
*x
, reg_attrs
*y
)
371 const reg_attrs
*const p
= x
;
372 const reg_attrs
*const q
= y
;
374 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
376 /* Allocate a new reg_attrs structure and insert it into the hash table if
377 one identical to it is not already in the table. We are doing this for
381 get_reg_attrs (tree decl
, int offset
)
385 /* If everything is the default, we can just return zero. */
386 if (decl
== 0 && offset
== 0)
390 attrs
.offset
= offset
;
392 reg_attrs
**slot
= reg_attrs_htab
->find_slot (&attrs
, INSERT
);
395 *slot
= ggc_alloc
<reg_attrs
> ();
396 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
404 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
405 and to block register equivalences to be seen across this insn. */
410 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
411 MEM_VOLATILE_P (x
) = true;
417 /* Set the mode and register number of X to MODE and REGNO. */
420 set_mode_and_regno (rtx x
, machine_mode mode
, unsigned int regno
)
422 unsigned int nregs
= (HARD_REGISTER_NUM_P (regno
)
423 ? hard_regno_nregs
[regno
][mode
]
425 PUT_MODE_RAW (x
, mode
);
426 set_regno_raw (x
, regno
, nregs
);
429 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
430 don't attempt to share with the various global pieces of rtl (such as
431 frame_pointer_rtx). */
434 gen_raw_REG (machine_mode mode
, unsigned int regno
)
436 rtx x
= rtx_alloc_stat (REG MEM_STAT_INFO
);
437 set_mode_and_regno (x
, mode
, regno
);
438 REG_ATTRS (x
) = NULL
;
439 ORIGINAL_REGNO (x
) = regno
;
443 /* There are some RTL codes that require special attention; the generation
444 functions do the raw handling. If you add to this list, modify
445 special_rtx in gengenrtl.c as well. */
448 gen_rtx_EXPR_LIST (machine_mode mode
, rtx expr
, rtx expr_list
)
450 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
455 gen_rtx_INSN_LIST (machine_mode mode
, rtx insn
, rtx insn_list
)
457 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
462 gen_rtx_INSN (machine_mode mode
, rtx_insn
*prev_insn
, rtx_insn
*next_insn
,
463 basic_block bb
, rtx pattern
, int location
, int code
,
466 return as_a
<rtx_insn
*> (gen_rtx_fmt_uuBeiie (INSN
, mode
,
467 prev_insn
, next_insn
,
468 bb
, pattern
, location
, code
,
473 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
475 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
476 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
478 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
479 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
480 return const_true_rtx
;
483 /* Look up the CONST_INT in the hash table. */
484 rtx
*slot
= const_int_htab
->find_slot_with_hash (arg
, (hashval_t
) arg
,
487 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
493 gen_int_mode (HOST_WIDE_INT c
, machine_mode mode
)
495 return GEN_INT (trunc_int_for_mode (c
, mode
));
498 /* CONST_DOUBLEs might be created from pairs of integers, or from
499 REAL_VALUE_TYPEs. Also, their length is known only at run time,
500 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
502 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
503 hash table. If so, return its counterpart; otherwise add it
504 to the hash table and return it. */
506 lookup_const_double (rtx real
)
508 rtx
*slot
= const_double_htab
->find_slot (real
, INSERT
);
515 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
516 VALUE in mode MODE. */
518 const_double_from_real_value (REAL_VALUE_TYPE value
, machine_mode mode
)
520 rtx real
= rtx_alloc (CONST_DOUBLE
);
521 PUT_MODE (real
, mode
);
525 return lookup_const_double (real
);
528 /* Determine whether FIXED, a CONST_FIXED, already exists in the
529 hash table. If so, return its counterpart; otherwise add it
530 to the hash table and return it. */
533 lookup_const_fixed (rtx fixed
)
535 rtx
*slot
= const_fixed_htab
->find_slot (fixed
, INSERT
);
542 /* Return a CONST_FIXED rtx for a fixed-point value specified by
543 VALUE in mode MODE. */
546 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, machine_mode mode
)
548 rtx fixed
= rtx_alloc (CONST_FIXED
);
549 PUT_MODE (fixed
, mode
);
553 return lookup_const_fixed (fixed
);
556 #if TARGET_SUPPORTS_WIDE_INT == 0
557 /* Constructs double_int from rtx CST. */
560 rtx_to_double_int (const_rtx cst
)
564 if (CONST_INT_P (cst
))
565 r
= double_int::from_shwi (INTVAL (cst
));
566 else if (CONST_DOUBLE_AS_INT_P (cst
))
568 r
.low
= CONST_DOUBLE_LOW (cst
);
569 r
.high
= CONST_DOUBLE_HIGH (cst
);
578 #if TARGET_SUPPORTS_WIDE_INT
579 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
580 If so, return its counterpart; otherwise add it to the hash table and
584 lookup_const_wide_int (rtx wint
)
586 rtx
*slot
= const_wide_int_htab
->find_slot (wint
, INSERT
);
594 /* Return an rtx constant for V, given that the constant has mode MODE.
595 The returned rtx will be a CONST_INT if V fits, otherwise it will be
596 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
597 (if TARGET_SUPPORTS_WIDE_INT). */
600 immed_wide_int_const (const wide_int_ref
&v
, machine_mode mode
)
602 unsigned int len
= v
.get_len ();
603 unsigned int prec
= GET_MODE_PRECISION (mode
);
605 /* Allow truncation but not extension since we do not know if the
606 number is signed or unsigned. */
607 gcc_assert (prec
<= v
.get_precision ());
609 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
610 return gen_int_mode (v
.elt (0), mode
);
612 #if TARGET_SUPPORTS_WIDE_INT
616 unsigned int blocks_needed
617 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
619 if (len
> blocks_needed
)
622 value
= const_wide_int_alloc (len
);
624 /* It is so tempting to just put the mode in here. Must control
626 PUT_MODE (value
, VOIDmode
);
627 CWI_PUT_NUM_ELEM (value
, len
);
629 for (i
= 0; i
< len
; i
++)
630 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
632 return lookup_const_wide_int (value
);
635 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
639 #if TARGET_SUPPORTS_WIDE_INT == 0
640 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
641 of ints: I0 is the low-order word and I1 is the high-order word.
642 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
643 implied upper bits are copies of the high bit of i1. The value
644 itself is neither signed nor unsigned. Do not use this routine for
645 non-integer modes; convert to REAL_VALUE_TYPE and use
646 const_double_from_real_value. */
649 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, machine_mode mode
)
654 /* There are the following cases (note that there are no modes with
655 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
657 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
659 2) If the value of the integer fits into HOST_WIDE_INT anyway
660 (i.e., i1 consists only from copies of the sign bit, and sign
661 of i0 and i1 are the same), then we return a CONST_INT for i0.
662 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
663 if (mode
!= VOIDmode
)
665 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
666 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
667 /* We can get a 0 for an error mark. */
668 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
669 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
670 || GET_MODE_CLASS (mode
) == MODE_POINTER_BOUNDS
);
672 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
673 return gen_int_mode (i0
, mode
);
676 /* If this integer fits in one word, return a CONST_INT. */
677 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
680 /* We use VOIDmode for integers. */
681 value
= rtx_alloc (CONST_DOUBLE
);
682 PUT_MODE (value
, VOIDmode
);
684 CONST_DOUBLE_LOW (value
) = i0
;
685 CONST_DOUBLE_HIGH (value
) = i1
;
687 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
688 XWINT (value
, i
) = 0;
690 return lookup_const_double (value
);
695 gen_rtx_REG (machine_mode mode
, unsigned int regno
)
697 /* In case the MD file explicitly references the frame pointer, have
698 all such references point to the same frame pointer. This is
699 used during frame pointer elimination to distinguish the explicit
700 references to these registers from pseudos that happened to be
703 If we have eliminated the frame pointer or arg pointer, we will
704 be using it as a normal register, for example as a spill
705 register. In such cases, we might be accessing it in a mode that
706 is not Pmode and therefore cannot use the pre-allocated rtx.
708 Also don't do this when we are making new REGs in reload, since
709 we don't want to get confused with the real pointers. */
711 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
713 if (regno
== FRAME_POINTER_REGNUM
714 && (!reload_completed
|| frame_pointer_needed
))
715 return frame_pointer_rtx
;
717 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
718 && regno
== HARD_FRAME_POINTER_REGNUM
719 && (!reload_completed
|| frame_pointer_needed
))
720 return hard_frame_pointer_rtx
;
721 #if !HARD_FRAME_POINTER_IS_ARG_POINTER
722 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
723 && regno
== ARG_POINTER_REGNUM
)
724 return arg_pointer_rtx
;
726 #ifdef RETURN_ADDRESS_POINTER_REGNUM
727 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
728 return return_address_pointer_rtx
;
730 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
731 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
732 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
733 return pic_offset_table_rtx
;
734 if (regno
== STACK_POINTER_REGNUM
)
735 return stack_pointer_rtx
;
739 /* If the per-function register table has been set up, try to re-use
740 an existing entry in that table to avoid useless generation of RTL.
742 This code is disabled for now until we can fix the various backends
743 which depend on having non-shared hard registers in some cases. Long
744 term we want to re-enable this code as it can significantly cut down
745 on the amount of useless RTL that gets generated.
747 We'll also need to fix some code that runs after reload that wants to
748 set ORIGINAL_REGNO. */
753 && regno
< FIRST_PSEUDO_REGISTER
754 && reg_raw_mode
[regno
] == mode
)
755 return regno_reg_rtx
[regno
];
758 return gen_raw_REG (mode
, regno
);
762 gen_rtx_MEM (machine_mode mode
, rtx addr
)
764 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
766 /* This field is not cleared by the mere allocation of the rtx, so
773 /* Generate a memory referring to non-trapping constant memory. */
776 gen_const_mem (machine_mode mode
, rtx addr
)
778 rtx mem
= gen_rtx_MEM (mode
, addr
);
779 MEM_READONLY_P (mem
) = 1;
780 MEM_NOTRAP_P (mem
) = 1;
784 /* Generate a MEM referring to fixed portions of the frame, e.g., register
788 gen_frame_mem (machine_mode mode
, rtx addr
)
790 rtx mem
= gen_rtx_MEM (mode
, addr
);
791 MEM_NOTRAP_P (mem
) = 1;
792 set_mem_alias_set (mem
, get_frame_alias_set ());
796 /* Generate a MEM referring to a temporary use of the stack, not part
797 of the fixed stack frame. For example, something which is pushed
798 by a target splitter. */
800 gen_tmp_stack_mem (machine_mode mode
, rtx addr
)
802 rtx mem
= gen_rtx_MEM (mode
, addr
);
803 MEM_NOTRAP_P (mem
) = 1;
804 if (!cfun
->calls_alloca
)
805 set_mem_alias_set (mem
, get_frame_alias_set ());
809 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
810 this construct would be valid, and false otherwise. */
813 validate_subreg (machine_mode omode
, machine_mode imode
,
814 const_rtx reg
, unsigned int offset
)
816 unsigned int isize
= GET_MODE_SIZE (imode
);
817 unsigned int osize
= GET_MODE_SIZE (omode
);
819 /* All subregs must be aligned. */
820 if (offset
% osize
!= 0)
823 /* The subreg offset cannot be outside the inner object. */
827 /* ??? This should not be here. Temporarily continue to allow word_mode
828 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
829 Generally, backends are doing something sketchy but it'll take time to
831 if (omode
== word_mode
)
833 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
834 is the culprit here, and not the backends. */
835 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
837 /* Allow component subregs of complex and vector. Though given the below
838 extraction rules, it's not always clear what that means. */
839 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
840 && GET_MODE_INNER (imode
) == omode
)
842 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
843 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
844 represent this. It's questionable if this ought to be represented at
845 all -- why can't this all be hidden in post-reload splitters that make
846 arbitrarily mode changes to the registers themselves. */
847 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
849 /* Subregs involving floating point modes are not allowed to
850 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
851 (subreg:SI (reg:DF) 0) isn't. */
852 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
854 if (! (isize
== osize
855 /* LRA can use subreg to store a floating point value in
856 an integer mode. Although the floating point and the
857 integer modes need the same number of hard registers,
858 the size of floating point mode can be less than the
859 integer mode. LRA also uses subregs for a register
860 should be used in different mode in on insn. */
865 /* Paradoxical subregs must have offset zero. */
869 /* This is a normal subreg. Verify that the offset is representable. */
871 /* For hard registers, we already have most of these rules collected in
872 subreg_offset_representable_p. */
873 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
875 unsigned int regno
= REGNO (reg
);
877 #ifdef CANNOT_CHANGE_MODE_CLASS
878 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
879 && GET_MODE_INNER (imode
) == omode
)
881 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
885 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
888 /* For pseudo registers, we want most of the same checks. Namely:
889 If the register no larger than a word, the subreg must be lowpart.
890 If the register is larger than a word, the subreg must be the lowpart
891 of a subword. A subreg does *not* perform arbitrary bit extraction.
892 Given that we've already checked mode/offset alignment, we only have
893 to check subword subregs here. */
894 if (osize
< UNITS_PER_WORD
895 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
897 machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
898 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
899 if (offset
% UNITS_PER_WORD
!= low_off
)
906 gen_rtx_SUBREG (machine_mode mode
, rtx reg
, int offset
)
908 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
909 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
912 /* Generate a SUBREG representing the least-significant part of REG if MODE
913 is smaller than mode of REG, otherwise paradoxical SUBREG. */
916 gen_lowpart_SUBREG (machine_mode mode
, rtx reg
)
920 inmode
= GET_MODE (reg
);
921 if (inmode
== VOIDmode
)
923 return gen_rtx_SUBREG (mode
, reg
,
924 subreg_lowpart_offset (mode
, inmode
));
928 gen_rtx_VAR_LOCATION (machine_mode mode
, tree decl
, rtx loc
,
929 enum var_init_status status
)
931 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
932 PAT_VAR_LOCATION_STATUS (x
) = status
;
937 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
940 gen_rtvec (int n
, ...)
948 /* Don't allocate an empty rtvec... */
955 rt_val
= rtvec_alloc (n
);
957 for (i
= 0; i
< n
; i
++)
958 rt_val
->elem
[i
] = va_arg (p
, rtx
);
965 gen_rtvec_v (int n
, rtx
*argp
)
970 /* Don't allocate an empty rtvec... */
974 rt_val
= rtvec_alloc (n
);
976 for (i
= 0; i
< n
; i
++)
977 rt_val
->elem
[i
] = *argp
++;
983 gen_rtvec_v (int n
, rtx_insn
**argp
)
988 /* Don't allocate an empty rtvec... */
992 rt_val
= rtvec_alloc (n
);
994 for (i
= 0; i
< n
; i
++)
995 rt_val
->elem
[i
] = *argp
++;
1001 /* Return the number of bytes between the start of an OUTER_MODE
1002 in-memory value and the start of an INNER_MODE in-memory value,
1003 given that the former is a lowpart of the latter. It may be a
1004 paradoxical lowpart, in which case the offset will be negative
1005 on big-endian targets. */
1008 byte_lowpart_offset (machine_mode outer_mode
,
1009 machine_mode inner_mode
)
1011 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
1012 return subreg_lowpart_offset (outer_mode
, inner_mode
);
1014 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
1017 /* Generate a REG rtx for a new pseudo register of mode MODE.
1018 This pseudo is assigned the next sequential register number. */
1021 gen_reg_rtx (machine_mode mode
)
1024 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
1026 gcc_assert (can_create_pseudo_p ());
1028 /* If a virtual register with bigger mode alignment is generated,
1029 increase stack alignment estimation because it might be spilled
1031 if (SUPPORTS_STACK_ALIGNMENT
1032 && crtl
->stack_alignment_estimated
< align
1033 && !crtl
->stack_realign_processed
)
1035 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
1036 if (crtl
->stack_alignment_estimated
< min_align
)
1037 crtl
->stack_alignment_estimated
= min_align
;
1040 if (generating_concat_p
1041 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
1042 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
1044 /* For complex modes, don't make a single pseudo.
1045 Instead, make a CONCAT of two pseudos.
1046 This allows noncontiguous allocation of the real and imaginary parts,
1047 which makes much better code. Besides, allocating DCmode
1048 pseudos overstrains reload on some machines like the 386. */
1049 rtx realpart
, imagpart
;
1050 machine_mode partmode
= GET_MODE_INNER (mode
);
1052 realpart
= gen_reg_rtx (partmode
);
1053 imagpart
= gen_reg_rtx (partmode
);
1054 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
1057 /* Do not call gen_reg_rtx with uninitialized crtl. */
1058 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
1060 /* Make sure regno_pointer_align, and regno_reg_rtx are large
1061 enough to have an element for this pseudo reg number. */
1063 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1065 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1069 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1070 memset (tmp
+ old_size
, 0, old_size
);
1071 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1073 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1074 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1075 regno_reg_rtx
= new1
;
1077 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1080 val
= gen_raw_REG (mode
, reg_rtx_no
);
1081 regno_reg_rtx
[reg_rtx_no
++] = val
;
1085 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1088 reg_is_parm_p (rtx reg
)
1092 gcc_assert (REG_P (reg
));
1093 decl
= REG_EXPR (reg
);
1094 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1097 /* Update NEW with the same attributes as REG, but with OFFSET added
1098 to the REG_OFFSET. */
1101 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1103 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1104 REG_OFFSET (reg
) + offset
);
1107 /* Generate a register with same attributes as REG, but with OFFSET
1108 added to the REG_OFFSET. */
1111 gen_rtx_REG_offset (rtx reg
, machine_mode mode
, unsigned int regno
,
1114 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1116 update_reg_offset (new_rtx
, reg
, offset
);
1120 /* Generate a new pseudo-register with the same attributes as REG, but
1121 with OFFSET added to the REG_OFFSET. */
1124 gen_reg_rtx_offset (rtx reg
, machine_mode mode
, int offset
)
1126 rtx new_rtx
= gen_reg_rtx (mode
);
1128 update_reg_offset (new_rtx
, reg
, offset
);
1132 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1133 new register is a (possibly paradoxical) lowpart of the old one. */
1136 adjust_reg_mode (rtx reg
, machine_mode mode
)
1138 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1139 PUT_MODE (reg
, mode
);
1142 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1143 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1146 set_reg_attrs_from_value (rtx reg
, rtx x
)
1149 bool can_be_reg_pointer
= true;
1151 /* Don't call mark_reg_pointer for incompatible pointer sign
1153 while (GET_CODE (x
) == SIGN_EXTEND
1154 || GET_CODE (x
) == ZERO_EXTEND
1155 || GET_CODE (x
) == TRUNCATE
1156 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1158 #if defined(POINTERS_EXTEND_UNSIGNED)
1159 if (((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1160 || (GET_CODE (x
) == ZERO_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
)
1161 || (paradoxical_subreg_p (x
)
1162 && ! (SUBREG_PROMOTED_VAR_P (x
)
1163 && SUBREG_CHECK_PROMOTED_SIGN (x
,
1164 POINTERS_EXTEND_UNSIGNED
))))
1165 && !targetm
.have_ptr_extend ())
1166 can_be_reg_pointer
= false;
1171 /* Hard registers can be reused for multiple purposes within the same
1172 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1173 on them is wrong. */
1174 if (HARD_REGISTER_P (reg
))
1177 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1180 if (MEM_OFFSET_KNOWN_P (x
))
1181 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1182 MEM_OFFSET (x
) + offset
);
1183 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1184 mark_reg_pointer (reg
, 0);
1189 update_reg_offset (reg
, x
, offset
);
1190 if (can_be_reg_pointer
&& REG_POINTER (x
))
1191 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1195 /* Generate a REG rtx for a new pseudo register, copying the mode
1196 and attributes from X. */
1199 gen_reg_rtx_and_attrs (rtx x
)
1201 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1202 set_reg_attrs_from_value (reg
, x
);
1206 /* Set the register attributes for registers contained in PARM_RTX.
1207 Use needed values from memory attributes of MEM. */
1210 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1212 if (REG_P (parm_rtx
))
1213 set_reg_attrs_from_value (parm_rtx
, mem
);
1214 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1216 /* Check for a NULL entry in the first slot, used to indicate that the
1217 parameter goes both on the stack and in registers. */
1218 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1219 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1221 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1222 if (REG_P (XEXP (x
, 0)))
1223 REG_ATTRS (XEXP (x
, 0))
1224 = get_reg_attrs (MEM_EXPR (mem
),
1225 INTVAL (XEXP (x
, 1)));
1230 /* Set the REG_ATTRS for registers in value X, given that X represents
1234 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1239 if (GET_CODE (x
) == SUBREG
)
1241 gcc_assert (subreg_lowpart_p (x
));
1246 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1249 : TYPE_MODE (TREE_TYPE (tdecl
))));
1250 if (GET_CODE (x
) == CONCAT
)
1252 if (REG_P (XEXP (x
, 0)))
1253 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1254 if (REG_P (XEXP (x
, 1)))
1255 REG_ATTRS (XEXP (x
, 1))
1256 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1258 if (GET_CODE (x
) == PARALLEL
)
1262 /* Check for a NULL entry, used to indicate that the parameter goes
1263 both on the stack and in registers. */
1264 if (XEXP (XVECEXP (x
, 0, 0), 0))
1269 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1271 rtx y
= XVECEXP (x
, 0, i
);
1272 if (REG_P (XEXP (y
, 0)))
1273 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1278 /* Assign the RTX X to declaration T. */
1281 set_decl_rtl (tree t
, rtx x
)
1283 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1285 set_reg_attrs_for_decl_rtl (t
, x
);
1288 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1289 if the ABI requires the parameter to be passed by reference. */
1292 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1294 DECL_INCOMING_RTL (t
) = x
;
1295 if (x
&& !by_reference_p
)
1296 set_reg_attrs_for_decl_rtl (t
, x
);
1299 /* Identify REG (which may be a CONCAT) as a user register. */
1302 mark_user_reg (rtx reg
)
1304 if (GET_CODE (reg
) == CONCAT
)
1306 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1307 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1311 gcc_assert (REG_P (reg
));
1312 REG_USERVAR_P (reg
) = 1;
1316 /* Identify REG as a probable pointer register and show its alignment
1317 as ALIGN, if nonzero. */
1320 mark_reg_pointer (rtx reg
, int align
)
1322 if (! REG_POINTER (reg
))
1324 REG_POINTER (reg
) = 1;
1327 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1329 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1330 /* We can no-longer be sure just how aligned this pointer is. */
1331 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1334 /* Return 1 plus largest pseudo reg number used in the current function. */
1342 /* Return 1 + the largest label number used so far in the current function. */
1345 max_label_num (void)
1350 /* Return first label number used in this function (if any were used). */
1353 get_first_label_num (void)
1355 return first_label_num
;
1358 /* If the rtx for label was created during the expansion of a nested
1359 function, then first_label_num won't include this label number.
1360 Fix this now so that array indices work later. */
1363 maybe_set_first_label_num (rtx_code_label
*x
)
1365 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1366 first_label_num
= CODE_LABEL_NUMBER (x
);
1369 /* Return a value representing some low-order bits of X, where the number
1370 of low-order bits is given by MODE. Note that no conversion is done
1371 between floating-point and fixed-point values, rather, the bit
1372 representation is returned.
1374 This function handles the cases in common between gen_lowpart, below,
1375 and two variants in cse.c and combine.c. These are the cases that can
1376 be safely handled at all points in the compilation.
1378 If this is not a case we can handle, return 0. */
1381 gen_lowpart_common (machine_mode mode
, rtx x
)
1383 int msize
= GET_MODE_SIZE (mode
);
1385 machine_mode innermode
;
1387 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1388 so we have to make one up. Yuk. */
1389 innermode
= GET_MODE (x
);
1391 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1392 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1393 else if (innermode
== VOIDmode
)
1394 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1396 xsize
= GET_MODE_SIZE (innermode
);
1398 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1400 if (innermode
== mode
)
1403 /* MODE must occupy no more words than the mode of X. */
1404 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1405 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1408 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1409 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1412 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1413 && (GET_MODE_CLASS (mode
) == MODE_INT
1414 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1416 /* If we are getting the low-order part of something that has been
1417 sign- or zero-extended, we can either just use the object being
1418 extended or make a narrower extension. If we want an even smaller
1419 piece than the size of the object being extended, call ourselves
1422 This case is used mostly by combine and cse. */
1424 if (GET_MODE (XEXP (x
, 0)) == mode
)
1426 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1427 return gen_lowpart_common (mode
, XEXP (x
, 0));
1428 else if (msize
< xsize
)
1429 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1431 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1432 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1433 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1434 return lowpart_subreg (mode
, x
, innermode
);
1436 /* Otherwise, we can't do this. */
1441 gen_highpart (machine_mode mode
, rtx x
)
1443 unsigned int msize
= GET_MODE_SIZE (mode
);
1446 /* This case loses if X is a subreg. To catch bugs early,
1447 complain if an invalid MODE is used even in other cases. */
1448 gcc_assert (msize
<= UNITS_PER_WORD
1449 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1451 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1452 subreg_highpart_offset (mode
, GET_MODE (x
)));
1453 gcc_assert (result
);
1455 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1456 the target if we have a MEM. gen_highpart must return a valid operand,
1457 emitting code if necessary to do so. */
1460 result
= validize_mem (result
);
1461 gcc_assert (result
);
1467 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1468 be VOIDmode constant. */
1470 gen_highpart_mode (machine_mode outermode
, machine_mode innermode
, rtx exp
)
1472 if (GET_MODE (exp
) != VOIDmode
)
1474 gcc_assert (GET_MODE (exp
) == innermode
);
1475 return gen_highpart (outermode
, exp
);
1477 return simplify_gen_subreg (outermode
, exp
, innermode
,
1478 subreg_highpart_offset (outermode
, innermode
));
1481 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1484 subreg_lowpart_offset (machine_mode outermode
, machine_mode innermode
)
1486 unsigned int offset
= 0;
1487 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1491 if (WORDS_BIG_ENDIAN
)
1492 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1493 if (BYTES_BIG_ENDIAN
)
1494 offset
+= difference
% UNITS_PER_WORD
;
1500 /* Return offset in bytes to get OUTERMODE high part
1501 of the value in mode INNERMODE stored in memory in target format. */
1503 subreg_highpart_offset (machine_mode outermode
, machine_mode innermode
)
1505 unsigned int offset
= 0;
1506 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1508 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1512 if (! WORDS_BIG_ENDIAN
)
1513 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1514 if (! BYTES_BIG_ENDIAN
)
1515 offset
+= difference
% UNITS_PER_WORD
;
1521 /* Return 1 iff X, assumed to be a SUBREG,
1522 refers to the least significant part of its containing reg.
1523 If X is not a SUBREG, always return 1 (it is its own low part!). */
1526 subreg_lowpart_p (const_rtx x
)
1528 if (GET_CODE (x
) != SUBREG
)
1530 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1533 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1534 == SUBREG_BYTE (x
));
1537 /* Return true if X is a paradoxical subreg, false otherwise. */
1539 paradoxical_subreg_p (const_rtx x
)
1541 if (GET_CODE (x
) != SUBREG
)
1543 return (GET_MODE_PRECISION (GET_MODE (x
))
1544 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1547 /* Return subword OFFSET of operand OP.
1548 The word number, OFFSET, is interpreted as the word number starting
1549 at the low-order address. OFFSET 0 is the low-order word if not
1550 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1552 If we cannot extract the required word, we return zero. Otherwise,
1553 an rtx corresponding to the requested word will be returned.
1555 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1556 reload has completed, a valid address will always be returned. After
1557 reload, if a valid address cannot be returned, we return zero.
1559 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1560 it is the responsibility of the caller.
1562 MODE is the mode of OP in case it is a CONST_INT.
1564 ??? This is still rather broken for some cases. The problem for the
1565 moment is that all callers of this thing provide no 'goal mode' to
1566 tell us to work with. This exists because all callers were written
1567 in a word based SUBREG world.
1568 Now use of this function can be deprecated by simplify_subreg in most
1573 operand_subword (rtx op
, unsigned int offset
, int validate_address
, machine_mode mode
)
1575 if (mode
== VOIDmode
)
1576 mode
= GET_MODE (op
);
1578 gcc_assert (mode
!= VOIDmode
);
1580 /* If OP is narrower than a word, fail. */
1582 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1585 /* If we want a word outside OP, return zero. */
1587 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1590 /* Form a new MEM at the requested address. */
1593 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1595 if (! validate_address
)
1598 else if (reload_completed
)
1600 if (! strict_memory_address_addr_space_p (word_mode
,
1602 MEM_ADDR_SPACE (op
)))
1606 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1609 /* Rest can be handled by simplify_subreg. */
1610 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1613 /* Similar to `operand_subword', but never return 0. If we can't
1614 extract the required subword, put OP into a register and try again.
1615 The second attempt must succeed. We always validate the address in
1618 MODE is the mode of OP, in case it is CONST_INT. */
1621 operand_subword_force (rtx op
, unsigned int offset
, machine_mode mode
)
1623 rtx result
= operand_subword (op
, offset
, 1, mode
);
1628 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1630 /* If this is a register which can not be accessed by words, copy it
1631 to a pseudo register. */
1633 op
= copy_to_reg (op
);
1635 op
= force_reg (mode
, op
);
1638 result
= operand_subword (op
, offset
, 1, mode
);
1639 gcc_assert (result
);
1644 /* Returns 1 if both MEM_EXPR can be considered equal
1648 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1653 if (! expr1
|| ! expr2
)
1656 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1659 return operand_equal_p (expr1
, expr2
, 0);
1662 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1663 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1667 get_mem_align_offset (rtx mem
, unsigned int align
)
1670 unsigned HOST_WIDE_INT offset
;
1672 /* This function can't use
1673 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1674 || (MAX (MEM_ALIGN (mem),
1675 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1679 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1681 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1682 for <variable>. get_inner_reference doesn't handle it and
1683 even if it did, the alignment in that case needs to be determined
1684 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1685 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1686 isn't sufficiently aligned, the object it is in might be. */
1687 gcc_assert (MEM_P (mem
));
1688 expr
= MEM_EXPR (mem
);
1689 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1692 offset
= MEM_OFFSET (mem
);
1695 if (DECL_ALIGN (expr
) < align
)
1698 else if (INDIRECT_REF_P (expr
))
1700 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1703 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1707 tree inner
= TREE_OPERAND (expr
, 0);
1708 tree field
= TREE_OPERAND (expr
, 1);
1709 tree byte_offset
= component_ref_field_offset (expr
);
1710 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1713 || !tree_fits_uhwi_p (byte_offset
)
1714 || !tree_fits_uhwi_p (bit_offset
))
1717 offset
+= tree_to_uhwi (byte_offset
);
1718 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1720 if (inner
== NULL_TREE
)
1722 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1723 < (unsigned int) align
)
1727 else if (DECL_P (inner
))
1729 if (DECL_ALIGN (inner
) < align
)
1733 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1741 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1744 /* Given REF (a MEM) and T, either the type of X or the expression
1745 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1746 if we are making a new object of this type. BITPOS is nonzero if
1747 there is an offset outstanding on T that will be applied later. */
1750 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1751 HOST_WIDE_INT bitpos
)
1753 HOST_WIDE_INT apply_bitpos
= 0;
1755 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1758 /* It can happen that type_for_mode was given a mode for which there
1759 is no language-level type. In which case it returns NULL, which
1764 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1765 if (type
== error_mark_node
)
1768 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1769 wrong answer, as it assumes that DECL_RTL already has the right alias
1770 info. Callers should not set DECL_RTL until after the call to
1771 set_mem_attributes. */
1772 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1774 memset (&attrs
, 0, sizeof (attrs
));
1776 /* Get the alias set from the expression or type (perhaps using a
1777 front-end routine) and use it. */
1778 attrs
.alias
= get_alias_set (t
);
1780 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1781 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1783 /* Default values from pre-existing memory attributes if present. */
1784 refattrs
= MEM_ATTRS (ref
);
1787 /* ??? Can this ever happen? Calling this routine on a MEM that
1788 already carries memory attributes should probably be invalid. */
1789 attrs
.expr
= refattrs
->expr
;
1790 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1791 attrs
.offset
= refattrs
->offset
;
1792 attrs
.size_known_p
= refattrs
->size_known_p
;
1793 attrs
.size
= refattrs
->size
;
1794 attrs
.align
= refattrs
->align
;
1797 /* Otherwise, default values from the mode of the MEM reference. */
1800 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1801 gcc_assert (!defattrs
->expr
);
1802 gcc_assert (!defattrs
->offset_known_p
);
1804 /* Respect mode size. */
1805 attrs
.size_known_p
= defattrs
->size_known_p
;
1806 attrs
.size
= defattrs
->size
;
1807 /* ??? Is this really necessary? We probably should always get
1808 the size from the type below. */
1810 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1811 if T is an object, always compute the object alignment below. */
1813 attrs
.align
= defattrs
->align
;
1815 attrs
.align
= BITS_PER_UNIT
;
1816 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1817 e.g. if the type carries an alignment attribute. Should we be
1818 able to simply always use TYPE_ALIGN? */
1821 /* We can set the alignment from the type if we are making an object or if
1822 this is an INDIRECT_REF. */
1823 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
)
1824 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1826 /* If the size is known, we can set that. */
1827 tree new_size
= TYPE_SIZE_UNIT (type
);
1829 /* The address-space is that of the type. */
1830 as
= TYPE_ADDR_SPACE (type
);
1832 /* If T is not a type, we may be able to deduce some more information about
1838 if (TREE_THIS_VOLATILE (t
))
1839 MEM_VOLATILE_P (ref
) = 1;
1841 /* Now remove any conversions: they don't change what the underlying
1842 object is. Likewise for SAVE_EXPR. */
1843 while (CONVERT_EXPR_P (t
)
1844 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1845 || TREE_CODE (t
) == SAVE_EXPR
)
1846 t
= TREE_OPERAND (t
, 0);
1848 /* Note whether this expression can trap. */
1849 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1851 base
= get_base_address (t
);
1855 && TREE_READONLY (base
)
1856 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1857 && !TREE_THIS_VOLATILE (base
))
1858 MEM_READONLY_P (ref
) = 1;
1860 /* Mark static const strings readonly as well. */
1861 if (TREE_CODE (base
) == STRING_CST
1862 && TREE_READONLY (base
)
1863 && TREE_STATIC (base
))
1864 MEM_READONLY_P (ref
) = 1;
1866 /* Address-space information is on the base object. */
1867 if (TREE_CODE (base
) == MEM_REF
1868 || TREE_CODE (base
) == TARGET_MEM_REF
)
1869 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1872 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1875 /* If this expression uses it's parent's alias set, mark it such
1876 that we won't change it. */
1877 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1878 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1880 /* If this is a decl, set the attributes of the MEM from it. */
1884 attrs
.offset_known_p
= true;
1886 apply_bitpos
= bitpos
;
1887 new_size
= DECL_SIZE_UNIT (t
);
1890 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1891 else if (CONSTANT_CLASS_P (t
))
1894 /* If this is a field reference, record it. */
1895 else if (TREE_CODE (t
) == COMPONENT_REF
)
1898 attrs
.offset_known_p
= true;
1900 apply_bitpos
= bitpos
;
1901 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1902 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1905 /* If this is an array reference, look for an outer field reference. */
1906 else if (TREE_CODE (t
) == ARRAY_REF
)
1908 tree off_tree
= size_zero_node
;
1909 /* We can't modify t, because we use it at the end of the
1915 tree index
= TREE_OPERAND (t2
, 1);
1916 tree low_bound
= array_ref_low_bound (t2
);
1917 tree unit_size
= array_ref_element_size (t2
);
1919 /* We assume all arrays have sizes that are a multiple of a byte.
1920 First subtract the lower bound, if any, in the type of the
1921 index, then convert to sizetype and multiply by the size of
1922 the array element. */
1923 if (! integer_zerop (low_bound
))
1924 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1927 off_tree
= size_binop (PLUS_EXPR
,
1928 size_binop (MULT_EXPR
,
1929 fold_convert (sizetype
,
1933 t2
= TREE_OPERAND (t2
, 0);
1935 while (TREE_CODE (t2
) == ARRAY_REF
);
1938 || TREE_CODE (t2
) == COMPONENT_REF
)
1941 attrs
.offset_known_p
= false;
1942 if (tree_fits_uhwi_p (off_tree
))
1944 attrs
.offset_known_p
= true;
1945 attrs
.offset
= tree_to_uhwi (off_tree
);
1946 apply_bitpos
= bitpos
;
1949 /* Else do not record a MEM_EXPR. */
1952 /* If this is an indirect reference, record it. */
1953 else if (TREE_CODE (t
) == MEM_REF
1954 || TREE_CODE (t
) == TARGET_MEM_REF
)
1957 attrs
.offset_known_p
= true;
1959 apply_bitpos
= bitpos
;
1962 /* Compute the alignment. */
1963 unsigned int obj_align
;
1964 unsigned HOST_WIDE_INT obj_bitpos
;
1965 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1966 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1967 if (obj_bitpos
!= 0)
1968 obj_align
= least_bit_hwi (obj_bitpos
);
1969 attrs
.align
= MAX (attrs
.align
, obj_align
);
1972 if (tree_fits_uhwi_p (new_size
))
1974 attrs
.size_known_p
= true;
1975 attrs
.size
= tree_to_uhwi (new_size
);
1978 /* If we modified OFFSET based on T, then subtract the outstanding
1979 bit position offset. Similarly, increase the size of the accessed
1980 object to contain the negative offset. */
1983 gcc_assert (attrs
.offset_known_p
);
1984 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1985 if (attrs
.size_known_p
)
1986 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1989 /* Now set the attributes we computed above. */
1990 attrs
.addrspace
= as
;
1991 set_mem_attrs (ref
, &attrs
);
1995 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1997 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2000 /* Set the alias set of MEM to SET. */
2003 set_mem_alias_set (rtx mem
, alias_set_type set
)
2005 struct mem_attrs attrs
;
2007 /* If the new and old alias sets don't conflict, something is wrong. */
2008 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
2009 attrs
= *get_mem_attrs (mem
);
2011 set_mem_attrs (mem
, &attrs
);
2014 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2017 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
2019 struct mem_attrs attrs
;
2021 attrs
= *get_mem_attrs (mem
);
2022 attrs
.addrspace
= addrspace
;
2023 set_mem_attrs (mem
, &attrs
);
2026 /* Set the alignment of MEM to ALIGN bits. */
2029 set_mem_align (rtx mem
, unsigned int align
)
2031 struct mem_attrs attrs
;
2033 attrs
= *get_mem_attrs (mem
);
2034 attrs
.align
= align
;
2035 set_mem_attrs (mem
, &attrs
);
2038 /* Set the expr for MEM to EXPR. */
2041 set_mem_expr (rtx mem
, tree expr
)
2043 struct mem_attrs attrs
;
2045 attrs
= *get_mem_attrs (mem
);
2047 set_mem_attrs (mem
, &attrs
);
2050 /* Set the offset of MEM to OFFSET. */
2053 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
2055 struct mem_attrs attrs
;
2057 attrs
= *get_mem_attrs (mem
);
2058 attrs
.offset_known_p
= true;
2059 attrs
.offset
= offset
;
2060 set_mem_attrs (mem
, &attrs
);
2063 /* Clear the offset of MEM. */
2066 clear_mem_offset (rtx mem
)
2068 struct mem_attrs attrs
;
2070 attrs
= *get_mem_attrs (mem
);
2071 attrs
.offset_known_p
= false;
2072 set_mem_attrs (mem
, &attrs
);
2075 /* Set the size of MEM to SIZE. */
2078 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2080 struct mem_attrs attrs
;
2082 attrs
= *get_mem_attrs (mem
);
2083 attrs
.size_known_p
= true;
2085 set_mem_attrs (mem
, &attrs
);
2088 /* Clear the size of MEM. */
2091 clear_mem_size (rtx mem
)
2093 struct mem_attrs attrs
;
2095 attrs
= *get_mem_attrs (mem
);
2096 attrs
.size_known_p
= false;
2097 set_mem_attrs (mem
, &attrs
);
2100 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2101 and its address changed to ADDR. (VOIDmode means don't change the mode.
2102 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2103 returned memory location is required to be valid. INPLACE is true if any
2104 changes can be made directly to MEMREF or false if MEMREF must be treated
2107 The memory attributes are not changed. */
2110 change_address_1 (rtx memref
, machine_mode mode
, rtx addr
, int validate
,
2116 gcc_assert (MEM_P (memref
));
2117 as
= MEM_ADDR_SPACE (memref
);
2118 if (mode
== VOIDmode
)
2119 mode
= GET_MODE (memref
);
2121 addr
= XEXP (memref
, 0);
2122 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2123 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2126 /* Don't validate address for LRA. LRA can make the address valid
2127 by itself in most efficient way. */
2128 if (validate
&& !lra_in_progress
)
2130 if (reload_in_progress
|| reload_completed
)
2131 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2133 addr
= memory_address_addr_space (mode
, addr
, as
);
2136 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2141 XEXP (memref
, 0) = addr
;
2145 new_rtx
= gen_rtx_MEM (mode
, addr
);
2146 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2150 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2151 way we are changing MEMREF, so we only preserve the alias set. */
2154 change_address (rtx memref
, machine_mode mode
, rtx addr
)
2156 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2157 machine_mode mmode
= GET_MODE (new_rtx
);
2158 struct mem_attrs attrs
, *defattrs
;
2160 attrs
= *get_mem_attrs (memref
);
2161 defattrs
= mode_mem_attrs
[(int) mmode
];
2162 attrs
.expr
= NULL_TREE
;
2163 attrs
.offset_known_p
= false;
2164 attrs
.size_known_p
= defattrs
->size_known_p
;
2165 attrs
.size
= defattrs
->size
;
2166 attrs
.align
= defattrs
->align
;
2168 /* If there are no changes, just return the original memory reference. */
2169 if (new_rtx
== memref
)
2171 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2174 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2175 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2178 set_mem_attrs (new_rtx
, &attrs
);
2182 /* Return a memory reference like MEMREF, but with its mode changed
2183 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2184 nonzero, the memory address is forced to be valid.
2185 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2186 and the caller is responsible for adjusting MEMREF base register.
2187 If ADJUST_OBJECT is zero, the underlying object associated with the
2188 memory reference is left unchanged and the caller is responsible for
2189 dealing with it. Otherwise, if the new memory reference is outside
2190 the underlying object, even partially, then the object is dropped.
2191 SIZE, if nonzero, is the size of an access in cases where MODE
2192 has no inherent size. */
2195 adjust_address_1 (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
,
2196 int validate
, int adjust_address
, int adjust_object
,
2199 rtx addr
= XEXP (memref
, 0);
2201 machine_mode address_mode
;
2203 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2204 unsigned HOST_WIDE_INT max_align
;
2205 #ifdef POINTERS_EXTEND_UNSIGNED
2206 machine_mode pointer_mode
2207 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2210 /* VOIDmode means no mode change for change_address_1. */
2211 if (mode
== VOIDmode
)
2212 mode
= GET_MODE (memref
);
2214 /* Take the size of non-BLKmode accesses from the mode. */
2215 defattrs
= mode_mem_attrs
[(int) mode
];
2216 if (defattrs
->size_known_p
)
2217 size
= defattrs
->size
;
2219 /* If there are no changes, just return the original memory reference. */
2220 if (mode
== GET_MODE (memref
) && !offset
2221 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2222 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2226 /* ??? Prefer to create garbage instead of creating shared rtl.
2227 This may happen even if offset is nonzero -- consider
2228 (plus (plus reg reg) const_int) -- so do this always. */
2229 addr
= copy_rtx (addr
);
2231 /* Convert a possibly large offset to a signed value within the
2232 range of the target address space. */
2233 address_mode
= get_address_mode (memref
);
2234 pbits
= GET_MODE_BITSIZE (address_mode
);
2235 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2237 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2238 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2244 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2245 object, we can merge it into the LO_SUM. */
2246 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2248 && (unsigned HOST_WIDE_INT
) offset
2249 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2250 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2251 plus_constant (address_mode
,
2252 XEXP (addr
, 1), offset
));
2253 #ifdef POINTERS_EXTEND_UNSIGNED
2254 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2255 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2256 the fact that pointers are not allowed to overflow. */
2257 else if (POINTERS_EXTEND_UNSIGNED
> 0
2258 && GET_CODE (addr
) == ZERO_EXTEND
2259 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2260 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2261 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2262 plus_constant (pointer_mode
,
2263 XEXP (addr
, 0), offset
));
2266 addr
= plus_constant (address_mode
, addr
, offset
);
2269 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2271 /* If the address is a REG, change_address_1 rightfully returns memref,
2272 but this would destroy memref's MEM_ATTRS. */
2273 if (new_rtx
== memref
&& offset
!= 0)
2274 new_rtx
= copy_rtx (new_rtx
);
2276 /* Conservatively drop the object if we don't know where we start from. */
2277 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2279 attrs
.expr
= NULL_TREE
;
2283 /* Compute the new values of the memory attributes due to this adjustment.
2284 We add the offsets and update the alignment. */
2285 if (attrs
.offset_known_p
)
2287 attrs
.offset
+= offset
;
2289 /* Drop the object if the new left end is not within its bounds. */
2290 if (adjust_object
&& attrs
.offset
< 0)
2292 attrs
.expr
= NULL_TREE
;
2297 /* Compute the new alignment by taking the MIN of the alignment and the
2298 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2302 max_align
= least_bit_hwi (offset
) * BITS_PER_UNIT
;
2303 attrs
.align
= MIN (attrs
.align
, max_align
);
2308 /* Drop the object if the new right end is not within its bounds. */
2309 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2311 attrs
.expr
= NULL_TREE
;
2314 attrs
.size_known_p
= true;
2317 else if (attrs
.size_known_p
)
2319 gcc_assert (!adjust_object
);
2320 attrs
.size
-= offset
;
2321 /* ??? The store_by_pieces machinery generates negative sizes,
2322 so don't assert for that here. */
2325 set_mem_attrs (new_rtx
, &attrs
);
2330 /* Return a memory reference like MEMREF, but with its mode changed
2331 to MODE and its address changed to ADDR, which is assumed to be
2332 MEMREF offset by OFFSET bytes. If VALIDATE is
2333 nonzero, the memory address is forced to be valid. */
2336 adjust_automodify_address_1 (rtx memref
, machine_mode mode
, rtx addr
,
2337 HOST_WIDE_INT offset
, int validate
)
2339 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2340 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2343 /* Return a memory reference like MEMREF, but whose address is changed by
2344 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2345 known to be in OFFSET (possibly 1). */
2348 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2350 rtx new_rtx
, addr
= XEXP (memref
, 0);
2351 machine_mode address_mode
;
2352 struct mem_attrs attrs
, *defattrs
;
2354 attrs
= *get_mem_attrs (memref
);
2355 address_mode
= get_address_mode (memref
);
2356 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2358 /* At this point we don't know _why_ the address is invalid. It
2359 could have secondary memory references, multiplies or anything.
2361 However, if we did go and rearrange things, we can wind up not
2362 being able to recognize the magic around pic_offset_table_rtx.
2363 This stuff is fragile, and is yet another example of why it is
2364 bad to expose PIC machinery too early. */
2365 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2367 && GET_CODE (addr
) == PLUS
2368 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2370 addr
= force_reg (GET_MODE (addr
), addr
);
2371 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2374 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2375 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2377 /* If there are no changes, just return the original memory reference. */
2378 if (new_rtx
== memref
)
2381 /* Update the alignment to reflect the offset. Reset the offset, which
2383 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2384 attrs
.offset_known_p
= false;
2385 attrs
.size_known_p
= defattrs
->size_known_p
;
2386 attrs
.size
= defattrs
->size
;
2387 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2388 set_mem_attrs (new_rtx
, &attrs
);
2392 /* Return a memory reference like MEMREF, but with its address changed to
2393 ADDR. The caller is asserting that the actual piece of memory pointed
2394 to is the same, just the form of the address is being changed, such as
2395 by putting something into a register. INPLACE is true if any changes
2396 can be made directly to MEMREF or false if MEMREF must be treated as
2400 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2402 /* change_address_1 copies the memory attribute structure without change
2403 and that's exactly what we want here. */
2404 update_temp_slot_address (XEXP (memref
, 0), addr
);
2405 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2408 /* Likewise, but the reference is not required to be valid. */
2411 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2413 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2416 /* Return a memory reference like MEMREF, but with its mode widened to
2417 MODE and offset by OFFSET. This would be used by targets that e.g.
2418 cannot issue QImode memory operations and have to use SImode memory
2419 operations plus masking logic. */
2422 widen_memory_access (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
)
2424 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2425 struct mem_attrs attrs
;
2426 unsigned int size
= GET_MODE_SIZE (mode
);
2428 /* If there are no changes, just return the original memory reference. */
2429 if (new_rtx
== memref
)
2432 attrs
= *get_mem_attrs (new_rtx
);
2434 /* If we don't know what offset we were at within the expression, then
2435 we can't know if we've overstepped the bounds. */
2436 if (! attrs
.offset_known_p
)
2437 attrs
.expr
= NULL_TREE
;
2441 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2443 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2444 tree offset
= component_ref_field_offset (attrs
.expr
);
2446 if (! DECL_SIZE_UNIT (field
))
2448 attrs
.expr
= NULL_TREE
;
2452 /* Is the field at least as large as the access? If so, ok,
2453 otherwise strip back to the containing structure. */
2454 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2455 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2456 && attrs
.offset
>= 0)
2459 if (! tree_fits_uhwi_p (offset
))
2461 attrs
.expr
= NULL_TREE
;
2465 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2466 attrs
.offset
+= tree_to_uhwi (offset
);
2467 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2470 /* Similarly for the decl. */
2471 else if (DECL_P (attrs
.expr
)
2472 && DECL_SIZE_UNIT (attrs
.expr
)
2473 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2474 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2475 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2479 /* The widened memory access overflows the expression, which means
2480 that it could alias another expression. Zap it. */
2481 attrs
.expr
= NULL_TREE
;
2487 attrs
.offset_known_p
= false;
2489 /* The widened memory may alias other stuff, so zap the alias set. */
2490 /* ??? Maybe use get_alias_set on any remaining expression. */
2492 attrs
.size_known_p
= true;
2494 set_mem_attrs (new_rtx
, &attrs
);
2498 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2499 static GTY(()) tree spill_slot_decl
;
2502 get_spill_slot_decl (bool force_build_p
)
2504 tree d
= spill_slot_decl
;
2506 struct mem_attrs attrs
;
2508 if (d
|| !force_build_p
)
2511 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2512 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2513 DECL_ARTIFICIAL (d
) = 1;
2514 DECL_IGNORED_P (d
) = 1;
2516 spill_slot_decl
= d
;
2518 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2519 MEM_NOTRAP_P (rd
) = 1;
2520 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2521 attrs
.alias
= new_alias_set ();
2523 set_mem_attrs (rd
, &attrs
);
2524 SET_DECL_RTL (d
, rd
);
2529 /* Given MEM, a result from assign_stack_local, fill in the memory
2530 attributes as appropriate for a register allocator spill slot.
2531 These slots are not aliasable by other memory. We arrange for
2532 them all to use a single MEM_EXPR, so that the aliasing code can
2533 work properly in the case of shared spill slots. */
2536 set_mem_attrs_for_spill (rtx mem
)
2538 struct mem_attrs attrs
;
2541 attrs
= *get_mem_attrs (mem
);
2542 attrs
.expr
= get_spill_slot_decl (true);
2543 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2544 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2546 /* We expect the incoming memory to be of the form:
2547 (mem:MODE (plus (reg sfp) (const_int offset)))
2548 with perhaps the plus missing for offset = 0. */
2549 addr
= XEXP (mem
, 0);
2550 attrs
.offset_known_p
= true;
2552 if (GET_CODE (addr
) == PLUS
2553 && CONST_INT_P (XEXP (addr
, 1)))
2554 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2556 set_mem_attrs (mem
, &attrs
);
2557 MEM_NOTRAP_P (mem
) = 1;
2560 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2563 gen_label_rtx (void)
2565 return as_a
<rtx_code_label
*> (
2566 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2567 NULL
, label_num
++, NULL
));
2570 /* For procedure integration. */
2572 /* Install new pointers to the first and last insns in the chain.
2573 Also, set cur_insn_uid to one higher than the last in use.
2574 Used for an inline-procedure after copying the insn chain. */
2577 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2581 set_first_insn (first
);
2582 set_last_insn (last
);
2585 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2587 int debug_count
= 0;
2589 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2590 cur_debug_insn_uid
= 0;
2592 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2593 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2594 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2597 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2598 if (DEBUG_INSN_P (insn
))
2603 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2605 cur_debug_insn_uid
++;
2608 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2609 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2614 /* Go through all the RTL insn bodies and copy any invalid shared
2615 structure. This routine should only be called once. */
2618 unshare_all_rtl_1 (rtx_insn
*insn
)
2620 /* Unshare just about everything else. */
2621 unshare_all_rtl_in_chain (insn
);
2623 /* Make sure the addresses of stack slots found outside the insn chain
2624 (such as, in DECL_RTL of a variable) are not shared
2625 with the insn chain.
2627 This special care is necessary when the stack slot MEM does not
2628 actually appear in the insn chain. If it does appear, its address
2629 is unshared from all else at that point. */
2632 FOR_EACH_VEC_SAFE_ELT (stack_slot_list
, i
, temp
)
2633 (*stack_slot_list
)[i
] = copy_rtx_if_shared (temp
);
2636 /* Go through all the RTL insn bodies and copy any invalid shared
2637 structure, again. This is a fairly expensive thing to do so it
2638 should be done sparingly. */
2641 unshare_all_rtl_again (rtx_insn
*insn
)
2646 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2649 reset_used_flags (PATTERN (p
));
2650 reset_used_flags (REG_NOTES (p
));
2652 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2655 /* Make sure that virtual stack slots are not shared. */
2656 set_used_decls (DECL_INITIAL (cfun
->decl
));
2658 /* Make sure that virtual parameters are not shared. */
2659 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2660 set_used_flags (DECL_RTL (decl
));
2664 FOR_EACH_VEC_SAFE_ELT (stack_slot_list
, i
, temp
)
2665 reset_used_flags (temp
);
2667 unshare_all_rtl_1 (insn
);
2671 unshare_all_rtl (void)
2673 unshare_all_rtl_1 (get_insns ());
2678 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2679 Recursively does the same for subexpressions. */
2682 verify_rtx_sharing (rtx orig
, rtx insn
)
2687 const char *format_ptr
;
2692 code
= GET_CODE (x
);
2694 /* These types may be freely shared. */
2710 /* SCRATCH must be shared because they represent distinct values. */
2713 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2714 clobbers or clobbers of hard registers that originated as pseudos.
2715 This is needed to allow safe register renaming. */
2716 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2717 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2722 if (shared_const_p (orig
))
2727 /* A MEM is allowed to be shared if its address is constant. */
2728 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2729 || reload_completed
|| reload_in_progress
)
2738 /* This rtx may not be shared. If it has already been seen,
2739 replace it with a copy of itself. */
2740 if (flag_checking
&& RTX_FLAG (x
, used
))
2742 error ("invalid rtl sharing found in the insn");
2744 error ("shared rtx");
2746 internal_error ("internal consistency failure");
2748 gcc_assert (!RTX_FLAG (x
, used
));
2750 RTX_FLAG (x
, used
) = 1;
2752 /* Now scan the subexpressions recursively. */
2754 format_ptr
= GET_RTX_FORMAT (code
);
2756 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2758 switch (*format_ptr
++)
2761 verify_rtx_sharing (XEXP (x
, i
), insn
);
2765 if (XVEC (x
, i
) != NULL
)
2768 int len
= XVECLEN (x
, i
);
2770 for (j
= 0; j
< len
; j
++)
2772 /* We allow sharing of ASM_OPERANDS inside single
2774 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2775 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2777 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2779 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2788 /* Reset used-flags for INSN. */
2791 reset_insn_used_flags (rtx insn
)
2793 gcc_assert (INSN_P (insn
));
2794 reset_used_flags (PATTERN (insn
));
2795 reset_used_flags (REG_NOTES (insn
));
2797 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2800 /* Go through all the RTL insn bodies and clear all the USED bits. */
2803 reset_all_used_flags (void)
2807 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2810 rtx pat
= PATTERN (p
);
2811 if (GET_CODE (pat
) != SEQUENCE
)
2812 reset_insn_used_flags (p
);
2815 gcc_assert (REG_NOTES (p
) == NULL
);
2816 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2818 rtx insn
= XVECEXP (pat
, 0, i
);
2820 reset_insn_used_flags (insn
);
2826 /* Verify sharing in INSN. */
2829 verify_insn_sharing (rtx insn
)
2831 gcc_assert (INSN_P (insn
));
2832 reset_used_flags (PATTERN (insn
));
2833 reset_used_flags (REG_NOTES (insn
));
2835 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2838 /* Go through all the RTL insn bodies and check that there is no unexpected
2839 sharing in between the subexpressions. */
2842 verify_rtl_sharing (void)
2846 timevar_push (TV_VERIFY_RTL_SHARING
);
2848 reset_all_used_flags ();
2850 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2853 rtx pat
= PATTERN (p
);
2854 if (GET_CODE (pat
) != SEQUENCE
)
2855 verify_insn_sharing (p
);
2857 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2859 rtx insn
= XVECEXP (pat
, 0, i
);
2861 verify_insn_sharing (insn
);
2865 reset_all_used_flags ();
2867 timevar_pop (TV_VERIFY_RTL_SHARING
);
2870 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2871 Assumes the mark bits are cleared at entry. */
2874 unshare_all_rtl_in_chain (rtx_insn
*insn
)
2876 for (; insn
; insn
= NEXT_INSN (insn
))
2879 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2880 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2882 CALL_INSN_FUNCTION_USAGE (insn
)
2883 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2887 /* Go through all virtual stack slots of a function and mark them as
2888 shared. We never replace the DECL_RTLs themselves with a copy,
2889 but expressions mentioned into a DECL_RTL cannot be shared with
2890 expressions in the instruction stream.
2892 Note that reload may convert pseudo registers into memories in-place.
2893 Pseudo registers are always shared, but MEMs never are. Thus if we
2894 reset the used flags on MEMs in the instruction stream, we must set
2895 them again on MEMs that appear in DECL_RTLs. */
2898 set_used_decls (tree blk
)
2903 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2904 if (DECL_RTL_SET_P (t
))
2905 set_used_flags (DECL_RTL (t
));
2907 /* Now process sub-blocks. */
2908 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2912 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2913 Recursively does the same for subexpressions. Uses
2914 copy_rtx_if_shared_1 to reduce stack space. */
2917 copy_rtx_if_shared (rtx orig
)
2919 copy_rtx_if_shared_1 (&orig
);
2923 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2924 use. Recursively does the same for subexpressions. */
2927 copy_rtx_if_shared_1 (rtx
*orig1
)
2933 const char *format_ptr
;
2937 /* Repeat is used to turn tail-recursion into iteration. */
2944 code
= GET_CODE (x
);
2946 /* These types may be freely shared. */
2962 /* SCRATCH must be shared because they represent distinct values. */
2965 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2966 clobbers or clobbers of hard registers that originated as pseudos.
2967 This is needed to allow safe register renaming. */
2968 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2969 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2974 if (shared_const_p (x
))
2984 /* The chain of insns is not being copied. */
2991 /* This rtx may not be shared. If it has already been seen,
2992 replace it with a copy of itself. */
2994 if (RTX_FLAG (x
, used
))
2996 x
= shallow_copy_rtx (x
);
2999 RTX_FLAG (x
, used
) = 1;
3001 /* Now scan the subexpressions recursively.
3002 We can store any replaced subexpressions directly into X
3003 since we know X is not shared! Any vectors in X
3004 must be copied if X was copied. */
3006 format_ptr
= GET_RTX_FORMAT (code
);
3007 length
= GET_RTX_LENGTH (code
);
3010 for (i
= 0; i
< length
; i
++)
3012 switch (*format_ptr
++)
3016 copy_rtx_if_shared_1 (last_ptr
);
3017 last_ptr
= &XEXP (x
, i
);
3021 if (XVEC (x
, i
) != NULL
)
3024 int len
= XVECLEN (x
, i
);
3026 /* Copy the vector iff I copied the rtx and the length
3028 if (copied
&& len
> 0)
3029 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
3031 /* Call recursively on all inside the vector. */
3032 for (j
= 0; j
< len
; j
++)
3035 copy_rtx_if_shared_1 (last_ptr
);
3036 last_ptr
= &XVECEXP (x
, i
, j
);
3051 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3054 mark_used_flags (rtx x
, int flag
)
3058 const char *format_ptr
;
3061 /* Repeat is used to turn tail-recursion into iteration. */
3066 code
= GET_CODE (x
);
3068 /* These types may be freely shared so we needn't do any resetting
3092 /* The chain of insns is not being copied. */
3099 RTX_FLAG (x
, used
) = flag
;
3101 format_ptr
= GET_RTX_FORMAT (code
);
3102 length
= GET_RTX_LENGTH (code
);
3104 for (i
= 0; i
< length
; i
++)
3106 switch (*format_ptr
++)
3114 mark_used_flags (XEXP (x
, i
), flag
);
3118 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3119 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3125 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3126 to look for shared sub-parts. */
3129 reset_used_flags (rtx x
)
3131 mark_used_flags (x
, 0);
3134 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3135 to look for shared sub-parts. */
3138 set_used_flags (rtx x
)
3140 mark_used_flags (x
, 1);
3143 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3144 Return X or the rtx for the pseudo reg the value of X was copied into.
3145 OTHER must be valid as a SET_DEST. */
3148 make_safe_from (rtx x
, rtx other
)
3151 switch (GET_CODE (other
))
3154 other
= SUBREG_REG (other
);
3156 case STRICT_LOW_PART
:
3159 other
= XEXP (other
, 0);
3168 && GET_CODE (x
) != SUBREG
)
3170 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3171 || reg_mentioned_p (other
, x
))))
3173 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3174 emit_move_insn (temp
, x
);
3180 /* Emission of insns (adding them to the doubly-linked list). */
3182 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3185 get_last_insn_anywhere (void)
3187 struct sequence_stack
*seq
;
3188 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
3194 /* Return the first nonnote insn emitted in current sequence or current
3195 function. This routine looks inside SEQUENCEs. */
3198 get_first_nonnote_insn (void)
3200 rtx_insn
*insn
= get_insns ();
3205 for (insn
= next_insn (insn
);
3206 insn
&& NOTE_P (insn
);
3207 insn
= next_insn (insn
))
3211 if (NONJUMP_INSN_P (insn
)
3212 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3213 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3220 /* Return the last nonnote insn emitted in current sequence or current
3221 function. This routine looks inside SEQUENCEs. */
3224 get_last_nonnote_insn (void)
3226 rtx_insn
*insn
= get_last_insn ();
3231 for (insn
= previous_insn (insn
);
3232 insn
&& NOTE_P (insn
);
3233 insn
= previous_insn (insn
))
3237 if (NONJUMP_INSN_P (insn
))
3238 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3239 insn
= seq
->insn (seq
->len () - 1);
3246 /* Return the number of actual (non-debug) insns emitted in this
3250 get_max_insn_count (void)
3252 int n
= cur_insn_uid
;
3254 /* The table size must be stable across -g, to avoid codegen
3255 differences due to debug insns, and not be affected by
3256 -fmin-insn-uid, to avoid excessive table size and to simplify
3257 debugging of -fcompare-debug failures. */
3258 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3259 n
-= cur_debug_insn_uid
;
3261 n
-= MIN_NONDEBUG_INSN_UID
;
3267 /* Return the next insn. If it is a SEQUENCE, return the first insn
3271 next_insn (rtx_insn
*insn
)
3275 insn
= NEXT_INSN (insn
);
3276 if (insn
&& NONJUMP_INSN_P (insn
)
3277 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3278 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3284 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3288 previous_insn (rtx_insn
*insn
)
3292 insn
= PREV_INSN (insn
);
3293 if (insn
&& NONJUMP_INSN_P (insn
))
3294 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3295 insn
= seq
->insn (seq
->len () - 1);
3301 /* Return the next insn after INSN that is not a NOTE. This routine does not
3302 look inside SEQUENCEs. */
3305 next_nonnote_insn (rtx_insn
*insn
)
3309 insn
= NEXT_INSN (insn
);
3310 if (insn
== 0 || !NOTE_P (insn
))
3317 /* Return the next insn after INSN that is not a NOTE, but stop the
3318 search before we enter another basic block. This routine does not
3319 look inside SEQUENCEs. */
3322 next_nonnote_insn_bb (rtx_insn
*insn
)
3326 insn
= NEXT_INSN (insn
);
3327 if (insn
== 0 || !NOTE_P (insn
))
3329 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3336 /* Return the previous insn before INSN that is not a NOTE. This routine does
3337 not look inside SEQUENCEs. */
3340 prev_nonnote_insn (rtx_insn
*insn
)
3344 insn
= PREV_INSN (insn
);
3345 if (insn
== 0 || !NOTE_P (insn
))
3352 /* Return the previous insn before INSN that is not a NOTE, but stop
3353 the search before we enter another basic block. This routine does
3354 not look inside SEQUENCEs. */
3357 prev_nonnote_insn_bb (rtx uncast_insn
)
3359 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3363 insn
= PREV_INSN (insn
);
3364 if (insn
== 0 || !NOTE_P (insn
))
3366 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3373 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3374 routine does not look inside SEQUENCEs. */
3377 next_nondebug_insn (rtx_insn
*insn
)
3381 insn
= NEXT_INSN (insn
);
3382 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3389 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3390 This routine does not look inside SEQUENCEs. */
3393 prev_nondebug_insn (rtx_insn
*insn
)
3397 insn
= PREV_INSN (insn
);
3398 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3405 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3406 This routine does not look inside SEQUENCEs. */
3409 next_nonnote_nondebug_insn (rtx_insn
*insn
)
3413 insn
= NEXT_INSN (insn
);
3414 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3421 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3422 This routine does not look inside SEQUENCEs. */
3425 prev_nonnote_nondebug_insn (rtx_insn
*insn
)
3429 insn
= PREV_INSN (insn
);
3430 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3437 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3438 or 0, if there is none. This routine does not look inside
3442 next_real_insn (rtx uncast_insn
)
3444 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3448 insn
= NEXT_INSN (insn
);
3449 if (insn
== 0 || INSN_P (insn
))
3456 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3457 or 0, if there is none. This routine does not look inside
3461 prev_real_insn (rtx_insn
*insn
)
3465 insn
= PREV_INSN (insn
);
3466 if (insn
== 0 || INSN_P (insn
))
3473 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3474 This routine does not look inside SEQUENCEs. */
3477 last_call_insn (void)
3481 for (insn
= get_last_insn ();
3482 insn
&& !CALL_P (insn
);
3483 insn
= PREV_INSN (insn
))
3486 return safe_as_a
<rtx_call_insn
*> (insn
);
3489 /* Find the next insn after INSN that really does something. This routine
3490 does not look inside SEQUENCEs. After reload this also skips over
3491 standalone USE and CLOBBER insn. */
3494 active_insn_p (const rtx_insn
*insn
)
3496 return (CALL_P (insn
) || JUMP_P (insn
)
3497 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3498 || (NONJUMP_INSN_P (insn
)
3499 && (! reload_completed
3500 || (GET_CODE (PATTERN (insn
)) != USE
3501 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3505 next_active_insn (rtx_insn
*insn
)
3509 insn
= NEXT_INSN (insn
);
3510 if (insn
== 0 || active_insn_p (insn
))
3517 /* Find the last insn before INSN that really does something. This routine
3518 does not look inside SEQUENCEs. After reload this also skips over
3519 standalone USE and CLOBBER insn. */
3522 prev_active_insn (rtx_insn
*insn
)
3526 insn
= PREV_INSN (insn
);
3527 if (insn
== 0 || active_insn_p (insn
))
3534 /* Return the next insn that uses CC0 after INSN, which is assumed to
3535 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3536 applied to the result of this function should yield INSN).
3538 Normally, this is simply the next insn. However, if a REG_CC_USER note
3539 is present, it contains the insn that uses CC0.
3541 Return 0 if we can't find the insn. */
3544 next_cc0_user (rtx_insn
*insn
)
3546 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3549 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3551 insn
= next_nonnote_insn (insn
);
3552 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3553 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3555 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3561 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3562 note, it is the previous insn. */
3565 prev_cc0_setter (rtx_insn
*insn
)
3567 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3570 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3572 insn
= prev_nonnote_insn (insn
);
3573 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3578 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3581 find_auto_inc (const_rtx x
, const_rtx reg
)
3583 subrtx_iterator::array_type array
;
3584 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
3586 const_rtx x
= *iter
;
3587 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
3588 && rtx_equal_p (reg
, XEXP (x
, 0)))
3594 /* Increment the label uses for all labels present in rtx. */
3597 mark_label_nuses (rtx x
)
3603 code
= GET_CODE (x
);
3604 if (code
== LABEL_REF
&& LABEL_P (label_ref_label (x
)))
3605 LABEL_NUSES (label_ref_label (x
))++;
3607 fmt
= GET_RTX_FORMAT (code
);
3608 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3611 mark_label_nuses (XEXP (x
, i
));
3612 else if (fmt
[i
] == 'E')
3613 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3614 mark_label_nuses (XVECEXP (x
, i
, j
));
3619 /* Try splitting insns that can be split for better scheduling.
3620 PAT is the pattern which might split.
3621 TRIAL is the insn providing PAT.
3622 LAST is nonzero if we should return the last insn of the sequence produced.
3624 If this routine succeeds in splitting, it returns the first or last
3625 replacement insn depending on the value of LAST. Otherwise, it
3626 returns TRIAL. If the insn to be returned can be split, it will be. */
3629 try_split (rtx pat
, rtx_insn
*trial
, int last
)
3631 rtx_insn
*before
= PREV_INSN (trial
);
3632 rtx_insn
*after
= NEXT_INSN (trial
);
3634 rtx_insn
*seq
, *tem
;
3636 rtx_insn
*insn_last
, *insn
;
3638 rtx_insn
*call_insn
= NULL
;
3640 /* We're not good at redistributing frame information. */
3641 if (RTX_FRAME_RELATED_P (trial
))
3644 if (any_condjump_p (trial
)
3645 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3646 split_branch_probability
= XINT (note
, 0);
3647 probability
= split_branch_probability
;
3649 seq
= split_insns (pat
, trial
);
3651 split_branch_probability
= -1;
3656 /* Avoid infinite loop if any insn of the result matches
3657 the original pattern. */
3661 if (INSN_P (insn_last
)
3662 && rtx_equal_p (PATTERN (insn_last
), pat
))
3664 if (!NEXT_INSN (insn_last
))
3666 insn_last
= NEXT_INSN (insn_last
);
3669 /* We will be adding the new sequence to the function. The splitters
3670 may have introduced invalid RTL sharing, so unshare the sequence now. */
3671 unshare_all_rtl_in_chain (seq
);
3673 /* Mark labels and copy flags. */
3674 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3679 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3680 mark_jump_label (PATTERN (insn
), insn
, 0);
3682 if (probability
!= -1
3683 && any_condjump_p (insn
)
3684 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3686 /* We can preserve the REG_BR_PROB notes only if exactly
3687 one jump is created, otherwise the machine description
3688 is responsible for this step using
3689 split_branch_probability variable. */
3690 gcc_assert (njumps
== 1);
3691 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3696 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3697 in SEQ and copy any additional information across. */
3700 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3706 gcc_assert (call_insn
== NULL_RTX
);
3709 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3710 target may have explicitly specified. */
3711 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3714 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3716 /* If the old call was a sibling call, the new one must
3718 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3720 /* If the new call is the last instruction in the sequence,
3721 it will effectively replace the old call in-situ. Otherwise
3722 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3723 so that it comes immediately after the new call. */
3724 if (NEXT_INSN (insn
))
3725 for (next
= NEXT_INSN (trial
);
3726 next
&& NOTE_P (next
);
3727 next
= NEXT_INSN (next
))
3728 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3731 add_insn_after (next
, insn
, NULL
);
3737 /* Copy notes, particularly those related to the CFG. */
3738 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3740 switch (REG_NOTE_KIND (note
))
3743 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3749 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3752 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3756 case REG_NON_LOCAL_GOTO
:
3757 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3760 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3768 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3770 rtx reg
= XEXP (note
, 0);
3771 if (!FIND_REG_INC_NOTE (insn
, reg
)
3772 && find_auto_inc (PATTERN (insn
), reg
))
3773 add_reg_note (insn
, REG_INC
, reg
);
3778 fixup_args_size_notes (NULL
, insn_last
, INTVAL (XEXP (note
, 0)));
3782 gcc_assert (call_insn
!= NULL_RTX
);
3783 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3791 /* If there are LABELS inside the split insns increment the
3792 usage count so we don't delete the label. */
3796 while (insn
!= NULL_RTX
)
3798 /* JUMP_P insns have already been "marked" above. */
3799 if (NONJUMP_INSN_P (insn
))
3800 mark_label_nuses (PATTERN (insn
));
3802 insn
= PREV_INSN (insn
);
3806 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3808 delete_insn (trial
);
3810 /* Recursively call try_split for each new insn created; by the
3811 time control returns here that insn will be fully split, so
3812 set LAST and continue from the insn after the one returned.
3813 We can't use next_active_insn here since AFTER may be a note.
3814 Ignore deleted insns, which can be occur if not optimizing. */
3815 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3816 if (! tem
->deleted () && INSN_P (tem
))
3817 tem
= try_split (PATTERN (tem
), tem
, 1);
3819 /* Return either the first or the last insn, depending on which was
3822 ? (after
? PREV_INSN (after
) : get_last_insn ())
3823 : NEXT_INSN (before
);
3826 /* Make and return an INSN rtx, initializing all its slots.
3827 Store PATTERN in the pattern slots. */
3830 make_insn_raw (rtx pattern
)
3834 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3836 INSN_UID (insn
) = cur_insn_uid
++;
3837 PATTERN (insn
) = pattern
;
3838 INSN_CODE (insn
) = -1;
3839 REG_NOTES (insn
) = NULL
;
3840 INSN_LOCATION (insn
) = curr_insn_location ();
3841 BLOCK_FOR_INSN (insn
) = NULL
;
3843 #ifdef ENABLE_RTL_CHECKING
3846 && (returnjump_p (insn
)
3847 || (GET_CODE (insn
) == SET
3848 && SET_DEST (insn
) == pc_rtx
)))
3850 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3858 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3861 make_debug_insn_raw (rtx pattern
)
3863 rtx_debug_insn
*insn
;
3865 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3866 INSN_UID (insn
) = cur_debug_insn_uid
++;
3867 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3868 INSN_UID (insn
) = cur_insn_uid
++;
3870 PATTERN (insn
) = pattern
;
3871 INSN_CODE (insn
) = -1;
3872 REG_NOTES (insn
) = NULL
;
3873 INSN_LOCATION (insn
) = curr_insn_location ();
3874 BLOCK_FOR_INSN (insn
) = NULL
;
3879 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3882 make_jump_insn_raw (rtx pattern
)
3884 rtx_jump_insn
*insn
;
3886 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3887 INSN_UID (insn
) = cur_insn_uid
++;
3889 PATTERN (insn
) = pattern
;
3890 INSN_CODE (insn
) = -1;
3891 REG_NOTES (insn
) = NULL
;
3892 JUMP_LABEL (insn
) = NULL
;
3893 INSN_LOCATION (insn
) = curr_insn_location ();
3894 BLOCK_FOR_INSN (insn
) = NULL
;
3899 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3902 make_call_insn_raw (rtx pattern
)
3904 rtx_call_insn
*insn
;
3906 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3907 INSN_UID (insn
) = cur_insn_uid
++;
3909 PATTERN (insn
) = pattern
;
3910 INSN_CODE (insn
) = -1;
3911 REG_NOTES (insn
) = NULL
;
3912 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3913 INSN_LOCATION (insn
) = curr_insn_location ();
3914 BLOCK_FOR_INSN (insn
) = NULL
;
3919 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3922 make_note_raw (enum insn_note subtype
)
3924 /* Some notes are never created this way at all. These notes are
3925 only created by patching out insns. */
3926 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3927 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3929 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3930 INSN_UID (note
) = cur_insn_uid
++;
3931 NOTE_KIND (note
) = subtype
;
3932 BLOCK_FOR_INSN (note
) = NULL
;
3933 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3937 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3938 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3939 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3942 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3944 SET_PREV_INSN (insn
) = prev
;
3945 SET_NEXT_INSN (insn
) = next
;
3948 SET_NEXT_INSN (prev
) = insn
;
3949 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3951 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
3952 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = insn
;
3957 SET_PREV_INSN (next
) = insn
;
3958 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3960 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
3961 SET_PREV_INSN (sequence
->insn (0)) = insn
;
3965 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3967 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3968 SET_PREV_INSN (sequence
->insn (0)) = prev
;
3969 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
3973 /* Add INSN to the end of the doubly-linked list.
3974 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3977 add_insn (rtx_insn
*insn
)
3979 rtx_insn
*prev
= get_last_insn ();
3980 link_insn_into_chain (insn
, prev
, NULL
);
3981 if (NULL
== get_insns ())
3982 set_first_insn (insn
);
3983 set_last_insn (insn
);
3986 /* Add INSN into the doubly-linked list after insn AFTER. */
3989 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
3991 rtx_insn
*next
= NEXT_INSN (after
);
3993 gcc_assert (!optimize
|| !after
->deleted ());
3995 link_insn_into_chain (insn
, after
, next
);
3999 struct sequence_stack
*seq
;
4001 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4002 if (after
== seq
->last
)
4010 /* Add INSN into the doubly-linked list before insn BEFORE. */
4013 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
4015 rtx_insn
*prev
= PREV_INSN (before
);
4017 gcc_assert (!optimize
|| !before
->deleted ());
4019 link_insn_into_chain (insn
, prev
, before
);
4023 struct sequence_stack
*seq
;
4025 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4026 if (before
== seq
->first
)
4036 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4037 If BB is NULL, an attempt is made to infer the bb from before.
4039 This and the next function should be the only functions called
4040 to insert an insn once delay slots have been filled since only
4041 they know how to update a SEQUENCE. */
4044 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4046 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4047 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4048 add_insn_after_nobb (insn
, after
);
4049 if (!BARRIER_P (after
)
4050 && !BARRIER_P (insn
)
4051 && (bb
= BLOCK_FOR_INSN (after
)))
4053 set_block_for_insn (insn
, bb
);
4055 df_insn_rescan (insn
);
4056 /* Should not happen as first in the BB is always
4057 either NOTE or LABEL. */
4058 if (BB_END (bb
) == after
4059 /* Avoid clobbering of structure when creating new BB. */
4060 && !BARRIER_P (insn
)
4061 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4066 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4067 If BB is NULL, an attempt is made to infer the bb from before.
4069 This and the previous function should be the only functions called
4070 to insert an insn once delay slots have been filled since only
4071 they know how to update a SEQUENCE. */
4074 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4076 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4077 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4078 add_insn_before_nobb (insn
, before
);
4081 && !BARRIER_P (before
)
4082 && !BARRIER_P (insn
))
4083 bb
= BLOCK_FOR_INSN (before
);
4087 set_block_for_insn (insn
, bb
);
4089 df_insn_rescan (insn
);
4090 /* Should not happen as first in the BB is always either NOTE or
4092 gcc_assert (BB_HEAD (bb
) != insn
4093 /* Avoid clobbering of structure when creating new BB. */
4095 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4099 /* Replace insn with an deleted instruction note. */
4102 set_insn_deleted (rtx insn
)
4105 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4106 PUT_CODE (insn
, NOTE
);
4107 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4111 /* Unlink INSN from the insn chain.
4113 This function knows how to handle sequences.
4115 This function does not invalidate data flow information associated with
4116 INSN (i.e. does not call df_insn_delete). That makes this function
4117 usable for only disconnecting an insn from the chain, and re-emit it
4120 To later insert INSN elsewhere in the insn chain via add_insn and
4121 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4122 the caller. Nullifying them here breaks many insn chain walks.
4124 To really delete an insn and related DF information, use delete_insn. */
4127 remove_insn (rtx uncast_insn
)
4129 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4130 rtx_insn
*next
= NEXT_INSN (insn
);
4131 rtx_insn
*prev
= PREV_INSN (insn
);
4136 SET_NEXT_INSN (prev
) = next
;
4137 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4139 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
4140 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4145 struct sequence_stack
*seq
;
4147 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4148 if (insn
== seq
->first
)
4159 SET_PREV_INSN (next
) = prev
;
4160 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4162 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4163 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4168 struct sequence_stack
*seq
;
4170 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4171 if (insn
== seq
->last
)
4180 /* Fix up basic block boundaries, if necessary. */
4181 if (!BARRIER_P (insn
)
4182 && (bb
= BLOCK_FOR_INSN (insn
)))
4184 if (BB_HEAD (bb
) == insn
)
4186 /* Never ever delete the basic block note without deleting whole
4188 gcc_assert (!NOTE_P (insn
));
4189 BB_HEAD (bb
) = next
;
4191 if (BB_END (bb
) == insn
)
4196 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4199 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4201 gcc_assert (call_insn
&& CALL_P (call_insn
));
4203 /* Put the register usage information on the CALL. If there is already
4204 some usage information, put ours at the end. */
4205 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4209 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4210 link
= XEXP (link
, 1))
4213 XEXP (link
, 1) = call_fusage
;
4216 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4219 /* Delete all insns made since FROM.
4220 FROM becomes the new last instruction. */
4223 delete_insns_since (rtx_insn
*from
)
4228 SET_NEXT_INSN (from
) = 0;
4229 set_last_insn (from
);
4232 /* This function is deprecated, please use sequences instead.
4234 Move a consecutive bunch of insns to a different place in the chain.
4235 The insns to be moved are those between FROM and TO.
4236 They are moved to a new position after the insn AFTER.
4237 AFTER must not be FROM or TO or any insn in between.
4239 This function does not know about SEQUENCEs and hence should not be
4240 called after delay-slot filling has been done. */
4243 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4247 for (rtx_insn
*x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4248 gcc_assert (after
!= x
);
4249 gcc_assert (after
!= to
);
4252 /* Splice this bunch out of where it is now. */
4253 if (PREV_INSN (from
))
4254 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4256 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4257 if (get_last_insn () == to
)
4258 set_last_insn (PREV_INSN (from
));
4259 if (get_insns () == from
)
4260 set_first_insn (NEXT_INSN (to
));
4262 /* Make the new neighbors point to it and it to them. */
4263 if (NEXT_INSN (after
))
4264 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4266 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4267 SET_PREV_INSN (from
) = after
;
4268 SET_NEXT_INSN (after
) = from
;
4269 if (after
== get_last_insn ())
4273 /* Same as function above, but take care to update BB boundaries. */
4275 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4277 rtx_insn
*prev
= PREV_INSN (from
);
4278 basic_block bb
, bb2
;
4280 reorder_insns_nobb (from
, to
, after
);
4282 if (!BARRIER_P (after
)
4283 && (bb
= BLOCK_FOR_INSN (after
)))
4286 df_set_bb_dirty (bb
);
4288 if (!BARRIER_P (from
)
4289 && (bb2
= BLOCK_FOR_INSN (from
)))
4291 if (BB_END (bb2
) == to
)
4292 BB_END (bb2
) = prev
;
4293 df_set_bb_dirty (bb2
);
4296 if (BB_END (bb
) == after
)
4299 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4301 df_insn_change_bb (x
, bb
);
4306 /* Emit insn(s) of given code and pattern
4307 at a specified place within the doubly-linked list.
4309 All of the emit_foo global entry points accept an object
4310 X which is either an insn list or a PATTERN of a single
4313 There are thus a few canonical ways to generate code and
4314 emit it at a specific place in the instruction stream. For
4315 example, consider the instruction named SPOT and the fact that
4316 we would like to emit some instructions before SPOT. We might
4320 ... emit the new instructions ...
4321 insns_head = get_insns ();
4324 emit_insn_before (insns_head, SPOT);
4326 It used to be common to generate SEQUENCE rtl instead, but that
4327 is a relic of the past which no longer occurs. The reason is that
4328 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4329 generated would almost certainly die right after it was created. */
4332 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4333 rtx_insn
*(*make_raw
) (rtx
))
4337 gcc_assert (before
);
4340 return safe_as_a
<rtx_insn
*> (last
);
4342 switch (GET_CODE (x
))
4351 insn
= as_a
<rtx_insn
*> (x
);
4354 rtx_insn
*next
= NEXT_INSN (insn
);
4355 add_insn_before (insn
, before
, bb
);
4361 #ifdef ENABLE_RTL_CHECKING
4368 last
= (*make_raw
) (x
);
4369 add_insn_before (last
, before
, bb
);
4373 return safe_as_a
<rtx_insn
*> (last
);
4376 /* Make X be output before the instruction BEFORE. */
4379 emit_insn_before_noloc (rtx x
, rtx_insn
*before
, basic_block bb
)
4381 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4384 /* Make an instruction with body X and code JUMP_INSN
4385 and output it before the instruction BEFORE. */
4388 emit_jump_insn_before_noloc (rtx x
, rtx_insn
*before
)
4390 return as_a
<rtx_jump_insn
*> (
4391 emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4392 make_jump_insn_raw
));
4395 /* Make an instruction with body X and code CALL_INSN
4396 and output it before the instruction BEFORE. */
4399 emit_call_insn_before_noloc (rtx x
, rtx_insn
*before
)
4401 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4402 make_call_insn_raw
);
4405 /* Make an instruction with body X and code DEBUG_INSN
4406 and output it before the instruction BEFORE. */
4409 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4411 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4412 make_debug_insn_raw
);
4415 /* Make an insn of code BARRIER
4416 and output it before the insn BEFORE. */
4419 emit_barrier_before (rtx before
)
4421 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4423 INSN_UID (insn
) = cur_insn_uid
++;
4425 add_insn_before (insn
, before
, NULL
);
4429 /* Emit the label LABEL before the insn BEFORE. */
4432 emit_label_before (rtx label
, rtx_insn
*before
)
4434 gcc_checking_assert (INSN_UID (label
) == 0);
4435 INSN_UID (label
) = cur_insn_uid
++;
4436 add_insn_before (label
, before
, NULL
);
4437 return as_a
<rtx_code_label
*> (label
);
4440 /* Helper for emit_insn_after, handles lists of instructions
4444 emit_insn_after_1 (rtx_insn
*first
, rtx uncast_after
, basic_block bb
)
4446 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4448 rtx_insn
*after_after
;
4449 if (!bb
&& !BARRIER_P (after
))
4450 bb
= BLOCK_FOR_INSN (after
);
4454 df_set_bb_dirty (bb
);
4455 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4456 if (!BARRIER_P (last
))
4458 set_block_for_insn (last
, bb
);
4459 df_insn_rescan (last
);
4461 if (!BARRIER_P (last
))
4463 set_block_for_insn (last
, bb
);
4464 df_insn_rescan (last
);
4466 if (BB_END (bb
) == after
)
4470 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4473 after_after
= NEXT_INSN (after
);
4475 SET_NEXT_INSN (after
) = first
;
4476 SET_PREV_INSN (first
) = after
;
4477 SET_NEXT_INSN (last
) = after_after
;
4479 SET_PREV_INSN (after_after
) = last
;
4481 if (after
== get_last_insn ())
4482 set_last_insn (last
);
4488 emit_pattern_after_noloc (rtx x
, rtx uncast_after
, basic_block bb
,
4489 rtx_insn
*(*make_raw
)(rtx
))
4491 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4492 rtx_insn
*last
= after
;
4499 switch (GET_CODE (x
))
4508 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4511 #ifdef ENABLE_RTL_CHECKING
4518 last
= (*make_raw
) (x
);
4519 add_insn_after (last
, after
, bb
);
4526 /* Make X be output after the insn AFTER and set the BB of insn. If
4527 BB is NULL, an attempt is made to infer the BB from AFTER. */
4530 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4532 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4536 /* Make an insn of code JUMP_INSN with body X
4537 and output it after the insn AFTER. */
4540 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4542 return as_a
<rtx_jump_insn
*> (
4543 emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
));
4546 /* Make an instruction with body X and code CALL_INSN
4547 and output it after the instruction AFTER. */
4550 emit_call_insn_after_noloc (rtx x
, rtx after
)
4552 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4555 /* Make an instruction with body X and code CALL_INSN
4556 and output it after the instruction AFTER. */
4559 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4561 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4564 /* Make an insn of code BARRIER
4565 and output it after the insn AFTER. */
4568 emit_barrier_after (rtx after
)
4570 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4572 INSN_UID (insn
) = cur_insn_uid
++;
4574 add_insn_after (insn
, after
, NULL
);
4578 /* Emit the label LABEL after the insn AFTER. */
4581 emit_label_after (rtx label
, rtx_insn
*after
)
4583 gcc_checking_assert (INSN_UID (label
) == 0);
4584 INSN_UID (label
) = cur_insn_uid
++;
4585 add_insn_after (label
, after
, NULL
);
4586 return as_a
<rtx_insn
*> (label
);
4589 /* Notes require a bit of special handling: Some notes need to have their
4590 BLOCK_FOR_INSN set, others should never have it set, and some should
4591 have it set or clear depending on the context. */
4593 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4594 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4595 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4598 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4602 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4603 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4606 /* Notes for var tracking and EH region markers can appear between or
4607 inside basic blocks. If the caller is emitting on the basic block
4608 boundary, do not set BLOCK_FOR_INSN on the new note. */
4609 case NOTE_INSN_VAR_LOCATION
:
4610 case NOTE_INSN_CALL_ARG_LOCATION
:
4611 case NOTE_INSN_EH_REGION_BEG
:
4612 case NOTE_INSN_EH_REGION_END
:
4613 return on_bb_boundary_p
;
4615 /* Otherwise, BLOCK_FOR_INSN must be set. */
4621 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4624 emit_note_after (enum insn_note subtype
, rtx_insn
*after
)
4626 rtx_note
*note
= make_note_raw (subtype
);
4627 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4628 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4630 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4631 add_insn_after_nobb (note
, after
);
4633 add_insn_after (note
, after
, bb
);
4637 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4640 emit_note_before (enum insn_note subtype
, rtx_insn
*before
)
4642 rtx_note
*note
= make_note_raw (subtype
);
4643 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4644 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4646 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4647 add_insn_before_nobb (note
, before
);
4649 add_insn_before (note
, before
, bb
);
4653 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4654 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4657 emit_pattern_after_setloc (rtx pattern
, rtx uncast_after
, int loc
,
4658 rtx_insn
*(*make_raw
) (rtx
))
4660 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4661 rtx_insn
*last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4663 if (pattern
== NULL_RTX
|| !loc
)
4666 after
= NEXT_INSN (after
);
4669 if (active_insn_p (after
)
4670 && !JUMP_TABLE_DATA_P (after
) /* FIXME */
4671 && !INSN_LOCATION (after
))
4672 INSN_LOCATION (after
) = loc
;
4675 after
= NEXT_INSN (after
);
4680 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4681 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4685 emit_pattern_after (rtx pattern
, rtx uncast_after
, bool skip_debug_insns
,
4686 rtx_insn
*(*make_raw
) (rtx
))
4688 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4689 rtx_insn
*prev
= after
;
4691 if (skip_debug_insns
)
4692 while (DEBUG_INSN_P (prev
))
4693 prev
= PREV_INSN (prev
);
4696 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4699 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4702 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4704 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4706 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4709 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4711 emit_insn_after (rtx pattern
, rtx after
)
4713 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4716 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4718 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4720 return as_a
<rtx_jump_insn
*> (
4721 emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
));
4724 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4726 emit_jump_insn_after (rtx pattern
, rtx after
)
4728 return as_a
<rtx_jump_insn
*> (
4729 emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
));
4732 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4734 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4736 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4739 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4741 emit_call_insn_after (rtx pattern
, rtx after
)
4743 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4746 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4748 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4750 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4753 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4755 emit_debug_insn_after (rtx pattern
, rtx after
)
4757 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4760 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4761 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4762 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4766 emit_pattern_before_setloc (rtx pattern
, rtx uncast_before
, int loc
, bool insnp
,
4767 rtx_insn
*(*make_raw
) (rtx
))
4769 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4770 rtx_insn
*first
= PREV_INSN (before
);
4771 rtx_insn
*last
= emit_pattern_before_noloc (pattern
, before
,
4772 insnp
? before
: NULL_RTX
,
4775 if (pattern
== NULL_RTX
|| !loc
)
4779 first
= get_insns ();
4781 first
= NEXT_INSN (first
);
4784 if (active_insn_p (first
)
4785 && !JUMP_TABLE_DATA_P (first
) /* FIXME */
4786 && !INSN_LOCATION (first
))
4787 INSN_LOCATION (first
) = loc
;
4790 first
= NEXT_INSN (first
);
4795 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4796 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4797 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4798 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4801 emit_pattern_before (rtx pattern
, rtx uncast_before
, bool skip_debug_insns
,
4802 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4804 rtx_insn
*before
= safe_as_a
<rtx_insn
*> (uncast_before
);
4805 rtx_insn
*next
= before
;
4807 if (skip_debug_insns
)
4808 while (DEBUG_INSN_P (next
))
4809 next
= PREV_INSN (next
);
4812 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4815 return emit_pattern_before_noloc (pattern
, before
,
4816 insnp
? before
: NULL_RTX
,
4820 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4822 emit_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4824 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4828 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4830 emit_insn_before (rtx pattern
, rtx before
)
4832 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4835 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4837 emit_jump_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4839 return as_a
<rtx_jump_insn
*> (
4840 emit_pattern_before_setloc (pattern
, before
, loc
, false,
4841 make_jump_insn_raw
));
4844 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4846 emit_jump_insn_before (rtx pattern
, rtx before
)
4848 return as_a
<rtx_jump_insn
*> (
4849 emit_pattern_before (pattern
, before
, true, false,
4850 make_jump_insn_raw
));
4853 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4855 emit_call_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4857 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4858 make_call_insn_raw
);
4861 /* Like emit_call_insn_before_noloc,
4862 but set insn_location according to BEFORE. */
4864 emit_call_insn_before (rtx pattern
, rtx_insn
*before
)
4866 return emit_pattern_before (pattern
, before
, true, false,
4867 make_call_insn_raw
);
4870 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4872 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4874 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4875 make_debug_insn_raw
);
4878 /* Like emit_debug_insn_before_noloc,
4879 but set insn_location according to BEFORE. */
4881 emit_debug_insn_before (rtx pattern
, rtx_insn
*before
)
4883 return emit_pattern_before (pattern
, before
, false, false,
4884 make_debug_insn_raw
);
4887 /* Take X and emit it at the end of the doubly-linked
4890 Returns the last insn emitted. */
4895 rtx_insn
*last
= get_last_insn ();
4901 switch (GET_CODE (x
))
4910 insn
= as_a
<rtx_insn
*> (x
);
4913 rtx_insn
*next
= NEXT_INSN (insn
);
4920 #ifdef ENABLE_RTL_CHECKING
4921 case JUMP_TABLE_DATA
:
4928 last
= make_insn_raw (x
);
4936 /* Make an insn of code DEBUG_INSN with pattern X
4937 and add it to the end of the doubly-linked list. */
4940 emit_debug_insn (rtx x
)
4942 rtx_insn
*last
= get_last_insn ();
4948 switch (GET_CODE (x
))
4957 insn
= as_a
<rtx_insn
*> (x
);
4960 rtx_insn
*next
= NEXT_INSN (insn
);
4967 #ifdef ENABLE_RTL_CHECKING
4968 case JUMP_TABLE_DATA
:
4975 last
= make_debug_insn_raw (x
);
4983 /* Make an insn of code JUMP_INSN with pattern X
4984 and add it to the end of the doubly-linked list. */
4987 emit_jump_insn (rtx x
)
4989 rtx_insn
*last
= NULL
;
4992 switch (GET_CODE (x
))
5001 insn
= as_a
<rtx_insn
*> (x
);
5004 rtx_insn
*next
= NEXT_INSN (insn
);
5011 #ifdef ENABLE_RTL_CHECKING
5012 case JUMP_TABLE_DATA
:
5019 last
= make_jump_insn_raw (x
);
5027 /* Make an insn of code CALL_INSN with pattern X
5028 and add it to the end of the doubly-linked list. */
5031 emit_call_insn (rtx x
)
5035 switch (GET_CODE (x
))
5044 insn
= emit_insn (x
);
5047 #ifdef ENABLE_RTL_CHECKING
5049 case JUMP_TABLE_DATA
:
5055 insn
= make_call_insn_raw (x
);
5063 /* Add the label LABEL to the end of the doubly-linked list. */
5066 emit_label (rtx uncast_label
)
5068 rtx_code_label
*label
= as_a
<rtx_code_label
*> (uncast_label
);
5070 gcc_checking_assert (INSN_UID (label
) == 0);
5071 INSN_UID (label
) = cur_insn_uid
++;
5076 /* Make an insn of code JUMP_TABLE_DATA
5077 and add it to the end of the doubly-linked list. */
5079 rtx_jump_table_data
*
5080 emit_jump_table_data (rtx table
)
5082 rtx_jump_table_data
*jump_table_data
=
5083 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5084 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5085 PATTERN (jump_table_data
) = table
;
5086 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5087 add_insn (jump_table_data
);
5088 return jump_table_data
;
5091 /* Make an insn of code BARRIER
5092 and add it to the end of the doubly-linked list. */
5097 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5098 INSN_UID (barrier
) = cur_insn_uid
++;
5103 /* Emit a copy of note ORIG. */
5106 emit_note_copy (rtx_note
*orig
)
5108 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5109 rtx_note
*note
= make_note_raw (kind
);
5110 NOTE_DATA (note
) = NOTE_DATA (orig
);
5115 /* Make an insn of code NOTE or type NOTE_NO
5116 and add it to the end of the doubly-linked list. */
5119 emit_note (enum insn_note kind
)
5121 rtx_note
*note
= make_note_raw (kind
);
5126 /* Emit a clobber of lvalue X. */
5129 emit_clobber (rtx x
)
5131 /* CONCATs should not appear in the insn stream. */
5132 if (GET_CODE (x
) == CONCAT
)
5134 emit_clobber (XEXP (x
, 0));
5135 return emit_clobber (XEXP (x
, 1));
5137 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5140 /* Return a sequence of insns to clobber lvalue X. */
5154 /* Emit a use of rvalue X. */
5159 /* CONCATs should not appear in the insn stream. */
5160 if (GET_CODE (x
) == CONCAT
)
5162 emit_use (XEXP (x
, 0));
5163 return emit_use (XEXP (x
, 1));
5165 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5168 /* Return a sequence of insns to use rvalue X. */
5182 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5183 Return the set in INSN that such notes describe, or NULL if the notes
5184 have no meaning for INSN. */
5187 set_for_reg_notes (rtx insn
)
5194 pat
= PATTERN (insn
);
5195 if (GET_CODE (pat
) == PARALLEL
)
5197 /* We do not use single_set because that ignores SETs of unused
5198 registers. REG_EQUAL and REG_EQUIV notes really do require the
5199 PARALLEL to have a single SET. */
5200 if (multiple_sets (insn
))
5202 pat
= XVECEXP (pat
, 0, 0);
5205 if (GET_CODE (pat
) != SET
)
5208 reg
= SET_DEST (pat
);
5210 /* Notes apply to the contents of a STRICT_LOW_PART. */
5211 if (GET_CODE (reg
) == STRICT_LOW_PART
5212 || GET_CODE (reg
) == ZERO_EXTRACT
)
5213 reg
= XEXP (reg
, 0);
5215 /* Check that we have a register. */
5216 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5222 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5223 note of this type already exists, remove it first. */
5226 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5228 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5234 /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5235 if (!set_for_reg_notes (insn
) && GET_CODE (PATTERN (insn
)) != USE
)
5238 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5239 It serves no useful purpose and breaks eliminate_regs. */
5240 if (GET_CODE (datum
) == ASM_OPERANDS
)
5243 /* Notes with side effects are dangerous. Even if the side-effect
5244 initially mirrors one in PATTERN (INSN), later optimizations
5245 might alter the way that the final register value is calculated
5246 and so move or alter the side-effect in some way. The note would
5247 then no longer be a valid substitution for SET_SRC. */
5248 if (side_effects_p (datum
))
5257 XEXP (note
, 0) = datum
;
5260 add_reg_note (insn
, kind
, datum
);
5261 note
= REG_NOTES (insn
);
5268 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5277 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5279 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5281 rtx set
= set_for_reg_notes (insn
);
5283 if (set
&& SET_DEST (set
) == dst
)
5284 return set_unique_reg_note (insn
, kind
, datum
);
5288 /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5289 following barrier if the instruction needs one and if ALLOW_BARRIER_P
5292 If X is a label, it is simply added into the insn chain. */
5295 emit (rtx x
, bool allow_barrier_p
)
5297 enum rtx_code code
= classify_insn (x
);
5302 return emit_label (x
);
5304 return emit_insn (x
);
5307 rtx_insn
*insn
= emit_jump_insn (x
);
5309 && (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
))
5310 return emit_barrier ();
5314 return emit_call_insn (x
);
5316 return emit_debug_insn (x
);
5322 /* Space for free sequence stack entries. */
5323 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5325 /* Begin emitting insns to a sequence. If this sequence will contain
5326 something that might cause the compiler to pop arguments to function
5327 calls (because those pops have previously been deferred; see
5328 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5329 before calling this function. That will ensure that the deferred
5330 pops are not accidentally emitted in the middle of this sequence. */
5333 start_sequence (void)
5335 struct sequence_stack
*tem
;
5337 if (free_sequence_stack
!= NULL
)
5339 tem
= free_sequence_stack
;
5340 free_sequence_stack
= tem
->next
;
5343 tem
= ggc_alloc
<sequence_stack
> ();
5345 tem
->next
= get_current_sequence ()->next
;
5346 tem
->first
= get_insns ();
5347 tem
->last
= get_last_insn ();
5348 get_current_sequence ()->next
= tem
;
5354 /* Set up the insn chain starting with FIRST as the current sequence,
5355 saving the previously current one. See the documentation for
5356 start_sequence for more information about how to use this function. */
5359 push_to_sequence (rtx_insn
*first
)
5365 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5368 set_first_insn (first
);
5369 set_last_insn (last
);
5372 /* Like push_to_sequence, but take the last insn as an argument to avoid
5373 looping through the list. */
5376 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5380 set_first_insn (first
);
5381 set_last_insn (last
);
5384 /* Set up the outer-level insn chain
5385 as the current sequence, saving the previously current one. */
5388 push_topmost_sequence (void)
5390 struct sequence_stack
*top
;
5394 top
= get_topmost_sequence ();
5395 set_first_insn (top
->first
);
5396 set_last_insn (top
->last
);
5399 /* After emitting to the outer-level insn chain, update the outer-level
5400 insn chain, and restore the previous saved state. */
5403 pop_topmost_sequence (void)
5405 struct sequence_stack
*top
;
5407 top
= get_topmost_sequence ();
5408 top
->first
= get_insns ();
5409 top
->last
= get_last_insn ();
5414 /* After emitting to a sequence, restore previous saved state.
5416 To get the contents of the sequence just made, you must call
5417 `get_insns' *before* calling here.
5419 If the compiler might have deferred popping arguments while
5420 generating this sequence, and this sequence will not be immediately
5421 inserted into the instruction stream, use do_pending_stack_adjust
5422 before calling get_insns. That will ensure that the deferred
5423 pops are inserted into this sequence, and not into some random
5424 location in the instruction stream. See INHIBIT_DEFER_POP for more
5425 information about deferred popping of arguments. */
5430 struct sequence_stack
*tem
= get_current_sequence ()->next
;
5432 set_first_insn (tem
->first
);
5433 set_last_insn (tem
->last
);
5434 get_current_sequence ()->next
= tem
->next
;
5436 memset (tem
, 0, sizeof (*tem
));
5437 tem
->next
= free_sequence_stack
;
5438 free_sequence_stack
= tem
;
5441 /* Return 1 if currently emitting into a sequence. */
5444 in_sequence_p (void)
5446 return get_current_sequence ()->next
!= 0;
5449 /* Put the various virtual registers into REGNO_REG_RTX. */
5452 init_virtual_regs (void)
5454 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5455 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5456 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5457 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5458 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5459 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5460 = virtual_preferred_stack_boundary_rtx
;
5464 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5465 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5466 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5467 static int copy_insn_n_scratches
;
5469 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5470 copied an ASM_OPERANDS.
5471 In that case, it is the original input-operand vector. */
5472 static rtvec orig_asm_operands_vector
;
5474 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5475 copied an ASM_OPERANDS.
5476 In that case, it is the copied input-operand vector. */
5477 static rtvec copy_asm_operands_vector
;
5479 /* Likewise for the constraints vector. */
5480 static rtvec orig_asm_constraints_vector
;
5481 static rtvec copy_asm_constraints_vector
;
5483 /* Recursively create a new copy of an rtx for copy_insn.
5484 This function differs from copy_rtx in that it handles SCRATCHes and
5485 ASM_OPERANDs properly.
5486 Normally, this function is not used directly; use copy_insn as front end.
5487 However, you could first copy an insn pattern with copy_insn and then use
5488 this function afterwards to properly copy any REG_NOTEs containing
5492 copy_insn_1 (rtx orig
)
5497 const char *format_ptr
;
5502 code
= GET_CODE (orig
);
5517 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5518 clobbers or clobbers of hard registers that originated as pseudos.
5519 This is needed to allow safe register renaming. */
5520 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5521 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5526 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5527 if (copy_insn_scratch_in
[i
] == orig
)
5528 return copy_insn_scratch_out
[i
];
5532 if (shared_const_p (orig
))
5536 /* A MEM with a constant address is not sharable. The problem is that
5537 the constant address may need to be reloaded. If the mem is shared,
5538 then reloading one copy of this mem will cause all copies to appear
5539 to have been reloaded. */
5545 /* Copy the various flags, fields, and other information. We assume
5546 that all fields need copying, and then clear the fields that should
5547 not be copied. That is the sensible default behavior, and forces
5548 us to explicitly document why we are *not* copying a flag. */
5549 copy
= shallow_copy_rtx (orig
);
5551 /* We do not copy the USED flag, which is used as a mark bit during
5552 walks over the RTL. */
5553 RTX_FLAG (copy
, used
) = 0;
5555 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5558 RTX_FLAG (copy
, jump
) = 0;
5559 RTX_FLAG (copy
, call
) = 0;
5560 RTX_FLAG (copy
, frame_related
) = 0;
5563 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5565 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5566 switch (*format_ptr
++)
5569 if (XEXP (orig
, i
) != NULL
)
5570 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5575 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5576 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5577 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5578 XVEC (copy
, i
) = copy_asm_operands_vector
;
5579 else if (XVEC (orig
, i
) != NULL
)
5581 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5582 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5583 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5594 /* These are left unchanged. */
5601 if (code
== SCRATCH
)
5603 i
= copy_insn_n_scratches
++;
5604 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5605 copy_insn_scratch_in
[i
] = orig
;
5606 copy_insn_scratch_out
[i
] = copy
;
5608 else if (code
== ASM_OPERANDS
)
5610 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5611 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5612 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5613 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5619 /* Create a new copy of an rtx.
5620 This function differs from copy_rtx in that it handles SCRATCHes and
5621 ASM_OPERANDs properly.
5622 INSN doesn't really have to be a full INSN; it could be just the
5625 copy_insn (rtx insn
)
5627 copy_insn_n_scratches
= 0;
5628 orig_asm_operands_vector
= 0;
5629 orig_asm_constraints_vector
= 0;
5630 copy_asm_operands_vector
= 0;
5631 copy_asm_constraints_vector
= 0;
5632 return copy_insn_1 (insn
);
5635 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5636 on that assumption that INSN itself remains in its original place. */
5639 copy_delay_slot_insn (rtx_insn
*insn
)
5641 /* Copy INSN with its rtx_code, all its notes, location etc. */
5642 insn
= as_a
<rtx_insn
*> (copy_rtx (insn
));
5643 INSN_UID (insn
) = cur_insn_uid
++;
5647 /* Initialize data structures and variables in this file
5648 before generating rtl for each function. */
5653 set_first_insn (NULL
);
5654 set_last_insn (NULL
);
5655 if (MIN_NONDEBUG_INSN_UID
)
5656 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5659 cur_debug_insn_uid
= 1;
5660 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5661 first_label_num
= label_num
;
5662 get_current_sequence ()->next
= NULL
;
5664 /* Init the tables that describe all the pseudo regs. */
5666 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5668 crtl
->emit
.regno_pointer_align
5669 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5671 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5673 /* Put copies of all the hard registers into regno_reg_rtx. */
5674 memcpy (regno_reg_rtx
,
5675 initial_regno_reg_rtx
,
5676 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5678 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5679 init_virtual_regs ();
5681 /* Indicate that the virtual registers and stack locations are
5683 REG_POINTER (stack_pointer_rtx
) = 1;
5684 REG_POINTER (frame_pointer_rtx
) = 1;
5685 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5686 REG_POINTER (arg_pointer_rtx
) = 1;
5688 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5689 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5690 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5691 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5692 REG_POINTER (virtual_cfa_rtx
) = 1;
5694 #ifdef STACK_BOUNDARY
5695 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5696 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5697 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5698 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5700 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5701 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5702 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5703 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5704 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5707 #ifdef INIT_EXPANDERS
5712 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5715 gen_const_vector (machine_mode mode
, int constant
)
5722 units
= GET_MODE_NUNITS (mode
);
5723 inner
= GET_MODE_INNER (mode
);
5725 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5727 v
= rtvec_alloc (units
);
5729 /* We need to call this function after we set the scalar const_tiny_rtx
5731 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5733 for (i
= 0; i
< units
; ++i
)
5734 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5736 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5740 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5741 all elements are zero, and the one vector when all elements are one. */
5743 gen_rtx_CONST_VECTOR (machine_mode mode
, rtvec v
)
5745 machine_mode inner
= GET_MODE_INNER (mode
);
5746 int nunits
= GET_MODE_NUNITS (mode
);
5750 /* Check to see if all of the elements have the same value. */
5751 x
= RTVEC_ELT (v
, nunits
- 1);
5752 for (i
= nunits
- 2; i
>= 0; i
--)
5753 if (RTVEC_ELT (v
, i
) != x
)
5756 /* If the values are all the same, check to see if we can use one of the
5757 standard constant vectors. */
5760 if (x
== CONST0_RTX (inner
))
5761 return CONST0_RTX (mode
);
5762 else if (x
== CONST1_RTX (inner
))
5763 return CONST1_RTX (mode
);
5764 else if (x
== CONSTM1_RTX (inner
))
5765 return CONSTM1_RTX (mode
);
5768 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5771 /* Initialise global register information required by all functions. */
5774 init_emit_regs (void)
5780 /* Reset register attributes */
5781 reg_attrs_htab
->empty ();
5783 /* We need reg_raw_mode, so initialize the modes now. */
5784 init_reg_modes_target ();
5786 /* Assign register numbers to the globally defined register rtx. */
5787 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5788 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5789 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5790 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5791 virtual_incoming_args_rtx
=
5792 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5793 virtual_stack_vars_rtx
=
5794 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5795 virtual_stack_dynamic_rtx
=
5796 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5797 virtual_outgoing_args_rtx
=
5798 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5799 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5800 virtual_preferred_stack_boundary_rtx
=
5801 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5803 /* Initialize RTL for commonly used hard registers. These are
5804 copied into regno_reg_rtx as we begin to compile each function. */
5805 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5806 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5808 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5809 return_address_pointer_rtx
5810 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5813 pic_offset_table_rtx
= NULL_RTX
;
5814 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5815 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5817 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5819 mode
= (machine_mode
) i
;
5820 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5821 attrs
->align
= BITS_PER_UNIT
;
5822 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5823 if (mode
!= BLKmode
)
5825 attrs
->size_known_p
= true;
5826 attrs
->size
= GET_MODE_SIZE (mode
);
5827 if (STRICT_ALIGNMENT
)
5828 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5830 mode_mem_attrs
[i
] = attrs
;
5834 /* Initialize global machine_mode variables. */
5837 init_derived_machine_modes (void)
5839 byte_mode
= VOIDmode
;
5840 word_mode
= VOIDmode
;
5842 for (machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5844 mode
= GET_MODE_WIDER_MODE (mode
))
5846 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5847 && byte_mode
== VOIDmode
)
5850 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5851 && word_mode
== VOIDmode
)
5855 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5858 /* Create some permanent unique rtl objects shared between all functions. */
5861 init_emit_once (void)
5865 machine_mode double_mode
;
5867 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5868 CONST_FIXED, and memory attribute hash tables. */
5869 const_int_htab
= hash_table
<const_int_hasher
>::create_ggc (37);
5871 #if TARGET_SUPPORTS_WIDE_INT
5872 const_wide_int_htab
= hash_table
<const_wide_int_hasher
>::create_ggc (37);
5874 const_double_htab
= hash_table
<const_double_hasher
>::create_ggc (37);
5876 const_fixed_htab
= hash_table
<const_fixed_hasher
>::create_ggc (37);
5878 reg_attrs_htab
= hash_table
<reg_attr_hasher
>::create_ggc (37);
5880 #ifdef INIT_EXPANDERS
5881 /* This is to initialize {init|mark|free}_machine_status before the first
5882 call to push_function_context_to. This is needed by the Chill front
5883 end which calls push_function_context_to before the first call to
5884 init_function_start. */
5888 /* Create the unique rtx's for certain rtx codes and operand values. */
5890 /* Process stack-limiting command-line options. */
5891 if (opt_fstack_limit_symbol_arg
!= NULL
)
5893 = gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (opt_fstack_limit_symbol_arg
));
5894 if (opt_fstack_limit_register_no
>= 0)
5895 stack_limit_rtx
= gen_rtx_REG (Pmode
, opt_fstack_limit_register_no
);
5897 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5898 tries to use these variables. */
5899 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5900 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5901 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5903 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5904 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5905 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5907 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5909 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5911 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5912 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5913 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5918 dconsthalf
= dconst1
;
5919 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5921 for (i
= 0; i
< 3; i
++)
5923 const REAL_VALUE_TYPE
*const r
=
5924 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5926 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5928 mode
= GET_MODE_WIDER_MODE (mode
))
5929 const_tiny_rtx
[i
][(int) mode
] =
5930 const_double_from_real_value (*r
, mode
);
5932 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5934 mode
= GET_MODE_WIDER_MODE (mode
))
5935 const_tiny_rtx
[i
][(int) mode
] =
5936 const_double_from_real_value (*r
, mode
);
5938 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5940 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5942 mode
= GET_MODE_WIDER_MODE (mode
))
5943 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5945 for (mode
= MIN_MODE_PARTIAL_INT
;
5946 mode
<= MAX_MODE_PARTIAL_INT
;
5947 mode
= (machine_mode
)((int)(mode
) + 1))
5948 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5951 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5953 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5955 mode
= GET_MODE_WIDER_MODE (mode
))
5956 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5958 for (mode
= MIN_MODE_PARTIAL_INT
;
5959 mode
<= MAX_MODE_PARTIAL_INT
;
5960 mode
= (machine_mode
)((int)(mode
) + 1))
5961 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5963 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5965 mode
= GET_MODE_WIDER_MODE (mode
))
5967 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5968 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5971 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5973 mode
= GET_MODE_WIDER_MODE (mode
))
5975 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5976 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5979 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5981 mode
= GET_MODE_WIDER_MODE (mode
))
5983 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5984 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5985 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5988 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5990 mode
= GET_MODE_WIDER_MODE (mode
))
5992 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5993 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5996 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5998 mode
= GET_MODE_WIDER_MODE (mode
))
6000 FCONST0 (mode
).data
.high
= 0;
6001 FCONST0 (mode
).data
.low
= 0;
6002 FCONST0 (mode
).mode
= mode
;
6003 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6004 FCONST0 (mode
), mode
);
6007 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
6009 mode
= GET_MODE_WIDER_MODE (mode
))
6011 FCONST0 (mode
).data
.high
= 0;
6012 FCONST0 (mode
).data
.low
= 0;
6013 FCONST0 (mode
).mode
= mode
;
6014 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6015 FCONST0 (mode
), mode
);
6018 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
6020 mode
= GET_MODE_WIDER_MODE (mode
))
6022 FCONST0 (mode
).data
.high
= 0;
6023 FCONST0 (mode
).data
.low
= 0;
6024 FCONST0 (mode
).mode
= mode
;
6025 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6026 FCONST0 (mode
), mode
);
6028 /* We store the value 1. */
6029 FCONST1 (mode
).data
.high
= 0;
6030 FCONST1 (mode
).data
.low
= 0;
6031 FCONST1 (mode
).mode
= mode
;
6033 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6034 HOST_BITS_PER_DOUBLE_INT
,
6035 SIGNED_FIXED_POINT_MODE_P (mode
));
6036 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6037 FCONST1 (mode
), mode
);
6040 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6042 mode
= GET_MODE_WIDER_MODE (mode
))
6044 FCONST0 (mode
).data
.high
= 0;
6045 FCONST0 (mode
).data
.low
= 0;
6046 FCONST0 (mode
).mode
= mode
;
6047 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6048 FCONST0 (mode
), mode
);
6050 /* We store the value 1. */
6051 FCONST1 (mode
).data
.high
= 0;
6052 FCONST1 (mode
).data
.low
= 0;
6053 FCONST1 (mode
).mode
= mode
;
6055 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6056 HOST_BITS_PER_DOUBLE_INT
,
6057 SIGNED_FIXED_POINT_MODE_P (mode
));
6058 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6059 FCONST1 (mode
), mode
);
6062 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6064 mode
= GET_MODE_WIDER_MODE (mode
))
6066 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6069 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6071 mode
= GET_MODE_WIDER_MODE (mode
))
6073 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6076 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6078 mode
= GET_MODE_WIDER_MODE (mode
))
6080 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6081 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6084 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6086 mode
= GET_MODE_WIDER_MODE (mode
))
6088 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6089 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6092 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6093 if (GET_MODE_CLASS ((machine_mode
) i
) == MODE_CC
)
6094 const_tiny_rtx
[0][i
] = const0_rtx
;
6096 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6097 if (STORE_FLAG_VALUE
== 1)
6098 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6100 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_POINTER_BOUNDS
);
6102 mode
= GET_MODE_WIDER_MODE (mode
))
6104 wide_int wi_zero
= wi::zero (GET_MODE_PRECISION (mode
));
6105 const_tiny_rtx
[0][mode
] = immed_wide_int_const (wi_zero
, mode
);
6108 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6109 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6110 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6111 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6112 invalid_insn_rtx
= gen_rtx_INSN (VOIDmode
,
6116 /*pattern=*/NULL_RTX
,
6119 /*reg_notes=*/NULL_RTX
);
6122 /* Produce exact duplicate of insn INSN after AFTER.
6123 Care updating of libcall regions if present. */
6126 emit_copy_of_insn_after (rtx_insn
*insn
, rtx_insn
*after
)
6131 switch (GET_CODE (insn
))
6134 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6138 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6139 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6143 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6147 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6148 if (CALL_INSN_FUNCTION_USAGE (insn
))
6149 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6150 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6151 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6152 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6153 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6154 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6155 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6162 /* Update LABEL_NUSES. */
6163 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6165 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6167 /* If the old insn is frame related, then so is the new one. This is
6168 primarily needed for IA-64 unwind info which marks epilogue insns,
6169 which may be duplicated by the basic block reordering code. */
6170 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6172 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6173 will make them. REG_LABEL_TARGETs are created there too, but are
6174 supposed to be sticky, so we copy them. */
6175 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6176 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6178 if (GET_CODE (link
) == EXPR_LIST
)
6179 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6180 copy_insn_1 (XEXP (link
, 0)));
6182 add_shallow_copy_of_reg_note (new_rtx
, link
);
6185 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6189 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6191 gen_hard_reg_clobber (machine_mode mode
, unsigned int regno
)
6193 if (hard_reg_clobbers
[mode
][regno
])
6194 return hard_reg_clobbers
[mode
][regno
];
6196 return (hard_reg_clobbers
[mode
][regno
] =
6197 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6200 location_t prologue_location
;
6201 location_t epilogue_location
;
6203 /* Hold current location information and last location information, so the
6204 datastructures are built lazily only when some instructions in given
6205 place are needed. */
6206 static location_t curr_location
;
6208 /* Allocate insn location datastructure. */
6210 insn_locations_init (void)
6212 prologue_location
= epilogue_location
= 0;
6213 curr_location
= UNKNOWN_LOCATION
;
6216 /* At the end of emit stage, clear current location. */
6218 insn_locations_finalize (void)
6220 epilogue_location
= curr_location
;
6221 curr_location
= UNKNOWN_LOCATION
;
6224 /* Set current location. */
6226 set_curr_insn_location (location_t location
)
6228 curr_location
= location
;
6231 /* Get current location. */
6233 curr_insn_location (void)
6235 return curr_location
;
6238 /* Return lexical scope block insn belongs to. */
6240 insn_scope (const rtx_insn
*insn
)
6242 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6245 /* Return line number of the statement that produced this insn. */
6247 insn_line (const rtx_insn
*insn
)
6249 return LOCATION_LINE (INSN_LOCATION (insn
));
6252 /* Return source file of the statement that produced this insn. */
6254 insn_file (const rtx_insn
*insn
)
6256 return LOCATION_FILE (INSN_LOCATION (insn
));
6259 /* Return expanded location of the statement that produced this insn. */
6261 insn_location (const rtx_insn
*insn
)
6263 return expand_location (INSN_LOCATION (insn
));
6266 /* Return true if memory model MODEL requires a pre-operation (release-style)
6267 barrier or a post-operation (acquire-style) barrier. While not universal,
6268 this function matches behavior of several targets. */
6271 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6273 switch (model
& MEMMODEL_BASE_MASK
)
6275 case MEMMODEL_RELAXED
:
6276 case MEMMODEL_CONSUME
:
6278 case MEMMODEL_RELEASE
:
6280 case MEMMODEL_ACQUIRE
:
6282 case MEMMODEL_ACQ_REL
:
6283 case MEMMODEL_SEQ_CST
:
6290 #include "gt-emit-rtl.h"