1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
104 #ifndef REGISTER_MOVE_COST
105 #define REGISTER_MOVE_COST(x, y) 2
108 #ifndef REGNO_MODE_OK_FOR_BASE_P
109 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
112 #ifndef REG_MODE_OK_FOR_BASE_P
113 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
116 /* The variables set up by `find_reloads' are:
118 n_reloads number of distinct reloads needed; max reload # + 1
119 tables indexed by reload number
120 reload_in rtx for value to reload from
121 reload_out rtx for where to store reload-reg afterward if nec
122 (often the same as reload_in)
123 reload_reg_class enum reg_class, saying what regs to reload into
124 reload_inmode enum machine_mode; mode this operand should have
125 when reloaded, on input.
126 reload_outmode enum machine_mode; mode this operand should have
127 when reloaded, on output.
128 reload_optional char, nonzero for an optional reload.
129 Optional reloads are ignored unless the
130 value is already sitting in a register.
131 reload_nongroup char, nonzero when a reload must use a register
132 not already allocated to a group.
133 reload_inc int, positive amount to increment or decrement by if
134 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
135 Ignored otherwise (don't assume it is zero).
136 reload_in_reg rtx. A reg for which reload_in is the equivalent.
137 If reload_in is a symbol_ref which came from
138 reg_equiv_constant, then this is the pseudo
139 which has that symbol_ref as equivalent.
140 reload_reg_rtx rtx. This is the register to reload into.
141 If it is zero when `find_reloads' returns,
142 you must find a suitable register in the class
143 specified by reload_reg_class, and store here
144 an rtx for that register with mode from
145 reload_inmode or reload_outmode.
146 reload_nocombine char, nonzero if this reload shouldn't be
147 combined with another reload.
148 reload_opnum int, operand number being reloaded. This is
149 used to group related reloads and need not always
150 be equal to the actual operand number in the insn,
151 though it current will be; for in-out operands, it
152 is one of the two operand numbers.
153 reload_when_needed enum, classifies reload as needed either for
154 addressing an input reload, addressing an output,
155 for addressing a non-reloaded mem ref,
156 or for unspecified purposes (i.e., more than one
158 reload_secondary_p int, 1 if this is a secondary register for one
160 reload_secondary_in_reload
161 reload_secondary_out_reload
162 int, gives the reload number of a secondary
163 reload, when needed; otherwise -1
164 reload_secondary_in_icode
165 reload_secondary_out_icode
166 enum insn_code, if a secondary reload is required,
167 gives the INSN_CODE that uses the secondary
168 reload as a scratch register, or CODE_FOR_nothing
169 if the secondary reload register is to be an
170 intermediate register. */
173 rtx reload_in
[MAX_RELOADS
];
174 rtx reload_out
[MAX_RELOADS
];
175 enum reg_class reload_reg_class
[MAX_RELOADS
];
176 enum machine_mode reload_inmode
[MAX_RELOADS
];
177 enum machine_mode reload_outmode
[MAX_RELOADS
];
178 rtx reload_reg_rtx
[MAX_RELOADS
];
179 char reload_optional
[MAX_RELOADS
];
180 char reload_nongroup
[MAX_RELOADS
];
181 int reload_inc
[MAX_RELOADS
];
182 rtx reload_in_reg
[MAX_RELOADS
];
183 char reload_nocombine
[MAX_RELOADS
];
184 int reload_opnum
[MAX_RELOADS
];
185 enum reload_type reload_when_needed
[MAX_RELOADS
];
186 int reload_secondary_p
[MAX_RELOADS
];
187 int reload_secondary_in_reload
[MAX_RELOADS
];
188 int reload_secondary_out_reload
[MAX_RELOADS
];
189 enum insn_code reload_secondary_in_icode
[MAX_RELOADS
];
190 enum insn_code reload_secondary_out_icode
[MAX_RELOADS
];
192 /* All the "earlyclobber" operands of the current insn
193 are recorded here. */
195 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
197 int reload_n_operands
;
199 /* Replacing reloads.
201 If `replace_reloads' is nonzero, then as each reload is recorded
202 an entry is made for it in the table `replacements'.
203 Then later `subst_reloads' can look through that table and
204 perform all the replacements needed. */
206 /* Nonzero means record the places to replace. */
207 static int replace_reloads
;
209 /* Each replacement is recorded with a structure like this. */
212 rtx
*where
; /* Location to store in */
213 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
214 a SUBREG; 0 otherwise. */
215 int what
; /* which reload this is for */
216 enum machine_mode mode
; /* mode it must have */
219 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
221 /* Number of replacements currently recorded. */
222 static int n_replacements
;
224 /* Used to track what is modified by an operand. */
227 int reg_flag
; /* Nonzero if referencing a register. */
228 int safe
; /* Nonzero if this can't conflict with anything. */
229 rtx base
; /* Base address for MEM. */
230 HOST_WIDE_INT start
; /* Starting offset or register number. */
231 HOST_WIDE_INT end
; /* Ending offset or register number. */
234 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
235 (see reg_equiv_address). */
236 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
237 static int n_memlocs
;
239 #ifdef SECONDARY_MEMORY_NEEDED
241 /* Save MEMs needed to copy from one class of registers to another. One MEM
242 is used per mode, but normally only one or two modes are ever used.
244 We keep two versions, before and after register elimination. The one
245 after register elimination is record separately for each operand. This
246 is done in case the address is not valid to be sure that we separately
249 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
250 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
253 /* The instruction we are doing reloads for;
254 so we can test whether a register dies in it. */
255 static rtx this_insn
;
257 /* Nonzero if this instruction is a user-specified asm with operands. */
258 static int this_insn_is_asm
;
260 /* If hard_regs_live_known is nonzero,
261 we can tell which hard regs are currently live,
262 at least enough to succeed in choosing dummy reloads. */
263 static int hard_regs_live_known
;
265 /* Indexed by hard reg number,
266 element is nonnegative if hard reg has been spilled.
267 This vector is passed to `find_reloads' as an argument
268 and is not changed here. */
269 static short *static_reload_reg_p
;
271 /* Set to 1 in subst_reg_equivs if it changes anything. */
272 static int subst_reg_equivs_changed
;
274 /* On return from push_reload, holds the reload-number for the OUT
275 operand, which can be different for that from the input operand. */
276 static int output_reloadnum
;
278 /* Compare two RTX's. */
279 #define MATCHES(x, y) \
280 (x == y || (x != 0 && (GET_CODE (x) == REG \
281 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
282 : rtx_equal_p (x, y) && ! side_effects_p (x))))
284 /* Indicates if two reloads purposes are for similar enough things that we
285 can merge their reloads. */
286 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
287 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
288 || ((when1) == (when2) && (op1) == (op2)) \
289 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
290 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
291 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
292 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
293 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
295 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
296 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
297 ((when1) != (when2) \
298 || ! ((op1) == (op2) \
299 || (when1) == RELOAD_FOR_INPUT \
300 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
301 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
303 /* If we are going to reload an address, compute the reload type to
305 #define ADDR_TYPE(type) \
306 ((type) == RELOAD_FOR_INPUT_ADDRESS \
307 ? RELOAD_FOR_INPADDR_ADDRESS \
308 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
309 ? RELOAD_FOR_OUTADDR_ADDRESS \
312 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
313 enum machine_mode
, enum reload_type
,
315 static enum reg_class find_valid_class
PROTO((enum machine_mode
, int));
316 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
317 enum machine_mode
, enum machine_mode
,
318 int, int, int, enum reload_type
));
319 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
320 static void combine_reloads
PROTO((void));
321 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
322 enum machine_mode
, enum machine_mode
,
323 enum reg_class
, int, int));
324 static int earlyclobber_operand_p
PROTO((rtx
));
325 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
326 static struct decomposition decompose
PROTO((rtx
));
327 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
328 static int alternative_allows_memconst
PROTO((char *, int));
329 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
330 static rtx make_memloc
PROTO((rtx
, int));
331 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
332 int, enum reload_type
, int, rtx
));
333 static rtx subst_reg_equivs
PROTO((rtx
));
334 static rtx subst_indexed_address
PROTO((rtx
));
335 static int find_reloads_address_1
PROTO((enum machine_mode
, rtx
, int, rtx
*,
336 int, enum reload_type
,int, rtx
));
337 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
338 enum machine_mode
, int,
339 enum reload_type
, int));
340 static int find_inc_amount
PROTO((rtx
, rtx
));
342 #ifdef HAVE_SECONDARY_RELOADS
344 /* Determine if any secondary reloads are needed for loading (if IN_P is
345 non-zero) or storing (if IN_P is zero) X to or from a reload register of
346 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
347 are needed, push them.
349 Return the reload number of the secondary reload we made, or -1 if
350 we didn't need one. *PICODE is set to the insn_code to use if we do
351 need a secondary reload. */
354 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
360 enum reg_class reload_class
;
361 enum machine_mode reload_mode
;
362 enum reload_type type
;
363 enum insn_code
*picode
;
365 enum reg_class
class = NO_REGS
;
366 enum machine_mode mode
= reload_mode
;
367 enum insn_code icode
= CODE_FOR_nothing
;
368 enum reg_class t_class
= NO_REGS
;
369 enum machine_mode t_mode
= VOIDmode
;
370 enum insn_code t_icode
= CODE_FOR_nothing
;
371 enum reload_type secondary_type
;
373 int s_reload
, t_reload
= -1;
375 if (type
== RELOAD_FOR_INPUT_ADDRESS
376 || type
== RELOAD_FOR_OUTPUT_ADDRESS
377 || type
== RELOAD_FOR_INPADDR_ADDRESS
378 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
379 secondary_type
= type
;
381 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
383 *picode
= CODE_FOR_nothing
;
385 /* If X is a paradoxical SUBREG, use the inner value to determine both the
386 mode and object being reloaded. */
387 if (GET_CODE (x
) == SUBREG
388 && (GET_MODE_SIZE (GET_MODE (x
))
389 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
392 reload_mode
= GET_MODE (x
);
395 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
396 is still a pseudo-register by now, it *must* have an equivalent MEM
397 but we don't want to assume that), use that equivalent when seeing if
398 a secondary reload is needed since whether or not a reload is needed
399 might be sensitive to the form of the MEM. */
401 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
402 && reg_equiv_mem
[REGNO (x
)] != 0)
403 x
= reg_equiv_mem
[REGNO (x
)];
405 #ifdef SECONDARY_INPUT_RELOAD_CLASS
407 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
410 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
412 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
415 /* If we don't need any secondary registers, done. */
416 if (class == NO_REGS
)
419 /* Get a possible insn to use. If the predicate doesn't accept X, don't
422 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
423 : reload_out_optab
[(int) reload_mode
]);
425 if (icode
!= CODE_FOR_nothing
426 && insn_operand_predicate
[(int) icode
][in_p
]
427 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
428 icode
= CODE_FOR_nothing
;
430 /* If we will be using an insn, see if it can directly handle the reload
431 register we will be using. If it can, the secondary reload is for a
432 scratch register. If it can't, we will use the secondary reload for
433 an intermediate register and require a tertiary reload for the scratch
436 if (icode
!= CODE_FOR_nothing
)
438 /* If IN_P is non-zero, the reload register will be the output in
439 operand 0. If IN_P is zero, the reload register will be the input
440 in operand 1. Outputs should have an initial "=", which we must
443 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
444 enum reg_class insn_class
445 = (insn_letter
== 'r' ? GENERAL_REGS
446 : REG_CLASS_FROM_LETTER (insn_letter
));
448 if (insn_class
== NO_REGS
449 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
450 /* The scratch register's constraint must start with "=&". */
451 || insn_operand_constraint
[(int) icode
][2][0] != '='
452 || insn_operand_constraint
[(int) icode
][2][1] != '&')
455 if (reg_class_subset_p (reload_class
, insn_class
))
456 mode
= insn_operand_mode
[(int) icode
][2];
459 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
461 t_mode
= insn_operand_mode
[(int) icode
][2];
462 t_class
= (t_letter
== 'r' ? GENERAL_REGS
463 : REG_CLASS_FROM_LETTER (t_letter
));
465 icode
= CODE_FOR_nothing
;
469 /* This case isn't valid, so fail. Reload is allowed to use the same
470 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
471 in the case of a secondary register, we actually need two different
472 registers for correct code. We fail here to prevent the possibility of
473 silently generating incorrect code later.
475 The convention is that secondary input reloads are valid only if the
476 secondary_class is different from class. If you have such a case, you
477 can not use secondary reloads, you must work around the problem some
480 Allow this when MODE is not reload_mode and assume that the generated
481 code handles this case (it does on the Alpha, which is the only place
482 this currently happens). */
484 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
487 /* If we need a tertiary reload, see if we have one we can reuse or else
490 if (t_class
!= NO_REGS
)
492 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
493 if (reload_secondary_p
[t_reload
]
494 && (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
])
495 || reg_class_subset_p (reload_reg_class
[t_reload
], t_class
))
496 && ((in_p
&& reload_inmode
[t_reload
] == t_mode
)
497 || (! in_p
&& reload_outmode
[t_reload
] == t_mode
))
498 && ((in_p
&& (reload_secondary_in_icode
[t_reload
]
499 == CODE_FOR_nothing
))
500 || (! in_p
&&(reload_secondary_out_icode
[t_reload
]
501 == CODE_FOR_nothing
)))
502 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
503 && MERGABLE_RELOADS (secondary_type
,
504 reload_when_needed
[t_reload
],
505 opnum
, reload_opnum
[t_reload
]))
508 reload_inmode
[t_reload
] = t_mode
;
510 reload_outmode
[t_reload
] = t_mode
;
512 if (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
]))
513 reload_reg_class
[t_reload
] = t_class
;
515 reload_opnum
[t_reload
] = MIN (reload_opnum
[t_reload
], opnum
);
516 reload_optional
[t_reload
] &= optional
;
517 reload_secondary_p
[t_reload
] = 1;
518 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[t_reload
],
519 opnum
, reload_opnum
[t_reload
]))
520 reload_when_needed
[t_reload
] = RELOAD_OTHER
;
523 if (t_reload
== n_reloads
)
525 /* We need to make a new tertiary reload for this register class. */
526 reload_in
[t_reload
] = reload_out
[t_reload
] = 0;
527 reload_reg_class
[t_reload
] = t_class
;
528 reload_inmode
[t_reload
] = in_p
? t_mode
: VOIDmode
;
529 reload_outmode
[t_reload
] = ! in_p
? t_mode
: VOIDmode
;
530 reload_reg_rtx
[t_reload
] = 0;
531 reload_optional
[t_reload
] = optional
;
532 reload_nongroup
[t_reload
] = 0;
533 reload_inc
[t_reload
] = 0;
534 /* Maybe we could combine these, but it seems too tricky. */
535 reload_nocombine
[t_reload
] = 1;
536 reload_in_reg
[t_reload
] = 0;
537 reload_opnum
[t_reload
] = opnum
;
538 reload_when_needed
[t_reload
] = secondary_type
;
539 reload_secondary_in_reload
[t_reload
] = -1;
540 reload_secondary_out_reload
[t_reload
] = -1;
541 reload_secondary_in_icode
[t_reload
] = CODE_FOR_nothing
;
542 reload_secondary_out_icode
[t_reload
] = CODE_FOR_nothing
;
543 reload_secondary_p
[t_reload
] = 1;
549 /* See if we can reuse an existing secondary reload. */
550 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
551 if (reload_secondary_p
[s_reload
]
552 && (reg_class_subset_p (class, reload_reg_class
[s_reload
])
553 || reg_class_subset_p (reload_reg_class
[s_reload
], class))
554 && ((in_p
&& reload_inmode
[s_reload
] == mode
)
555 || (! in_p
&& reload_outmode
[s_reload
] == mode
))
556 && ((in_p
&& reload_secondary_in_reload
[s_reload
] == t_reload
)
557 || (! in_p
&& reload_secondary_out_reload
[s_reload
] == t_reload
))
558 && ((in_p
&& reload_secondary_in_icode
[s_reload
] == t_icode
)
559 || (! in_p
&& reload_secondary_out_icode
[s_reload
] == t_icode
))
560 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
561 && MERGABLE_RELOADS (secondary_type
, reload_when_needed
[s_reload
],
562 opnum
, reload_opnum
[s_reload
]))
565 reload_inmode
[s_reload
] = mode
;
567 reload_outmode
[s_reload
] = mode
;
569 if (reg_class_subset_p (class, reload_reg_class
[s_reload
]))
570 reload_reg_class
[s_reload
] = class;
572 reload_opnum
[s_reload
] = MIN (reload_opnum
[s_reload
], opnum
);
573 reload_optional
[s_reload
] &= optional
;
574 reload_secondary_p
[s_reload
] = 1;
575 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[s_reload
],
576 opnum
, reload_opnum
[s_reload
]))
577 reload_when_needed
[s_reload
] = RELOAD_OTHER
;
580 if (s_reload
== n_reloads
)
582 #ifdef SECONDARY_MEMORY_NEEDED
583 /* If we need a memory location to copy between the two reload regs,
584 set it up now. Note that we do the input case before making
585 the reload and the output case after. This is due to the
586 way reloads are output. */
588 if (in_p
&& icode
== CODE_FOR_nothing
589 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
590 get_secondary_mem (x
, reload_mode
, opnum
, type
);
593 /* We need to make a new secondary reload for this register class. */
594 reload_in
[s_reload
] = reload_out
[s_reload
] = 0;
595 reload_reg_class
[s_reload
] = class;
597 reload_inmode
[s_reload
] = in_p
? mode
: VOIDmode
;
598 reload_outmode
[s_reload
] = ! in_p
? mode
: VOIDmode
;
599 reload_reg_rtx
[s_reload
] = 0;
600 reload_optional
[s_reload
] = optional
;
601 reload_nongroup
[s_reload
] = 0;
602 reload_inc
[s_reload
] = 0;
603 /* Maybe we could combine these, but it seems too tricky. */
604 reload_nocombine
[s_reload
] = 1;
605 reload_in_reg
[s_reload
] = 0;
606 reload_opnum
[s_reload
] = opnum
;
607 reload_when_needed
[s_reload
] = secondary_type
;
608 reload_secondary_in_reload
[s_reload
] = in_p
? t_reload
: -1;
609 reload_secondary_out_reload
[s_reload
] = ! in_p
? t_reload
: -1;
610 reload_secondary_in_icode
[s_reload
] = in_p
? t_icode
: CODE_FOR_nothing
;
611 reload_secondary_out_icode
[s_reload
]
612 = ! in_p
? t_icode
: CODE_FOR_nothing
;
613 reload_secondary_p
[s_reload
] = 1;
617 #ifdef SECONDARY_MEMORY_NEEDED
618 if (! in_p
&& icode
== CODE_FOR_nothing
619 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
620 get_secondary_mem (x
, mode
, opnum
, type
);
627 #endif /* HAVE_SECONDARY_RELOADS */
629 #ifdef SECONDARY_MEMORY_NEEDED
631 /* Return a memory location that will be used to copy X in mode MODE.
632 If we haven't already made a location for this mode in this insn,
633 call find_reloads_address on the location being returned. */
636 get_secondary_mem (x
, mode
, opnum
, type
)
638 enum machine_mode mode
;
640 enum reload_type type
;
645 /* By default, if MODE is narrower than a word, widen it to a word.
646 This is required because most machines that require these memory
647 locations do not support short load and stores from all registers
648 (e.g., FP registers). */
650 #ifdef SECONDARY_MEMORY_NEEDED_MODE
651 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
653 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
654 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
657 /* If we already have made a MEM for this operand in MODE, return it. */
658 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
659 return secondary_memlocs_elim
[(int) mode
][opnum
];
661 /* If this is the first time we've tried to get a MEM for this mode,
662 allocate a new one. `something_changed' in reload will get set
663 by noticing that the frame size has changed. */
665 if (secondary_memlocs
[(int) mode
] == 0)
667 #ifdef SECONDARY_MEMORY_NEEDED_RTX
668 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
670 secondary_memlocs
[(int) mode
]
671 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
675 /* Get a version of the address doing any eliminations needed. If that
676 didn't give us a new MEM, make a new one if it isn't valid. */
678 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
, 0);
679 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
681 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
682 loc
= copy_rtx (loc
);
684 /* The only time the call below will do anything is if the stack
685 offset is too large. In that case IND_LEVELS doesn't matter, so we
686 can just pass a zero. Adjust the type to be the address of the
687 corresponding object. If the address was valid, save the eliminated
688 address. If it wasn't valid, we need to make a reload each time, so
693 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
694 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
697 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
701 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
705 /* Clear any secondary memory locations we've made. */
708 clear_secondary_mem ()
710 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
712 #endif /* SECONDARY_MEMORY_NEEDED */
714 /* Find the largest class for which every register number plus N is valid in
715 M1 (if in range). Abort if no such class exists. */
717 static enum reg_class
718 find_valid_class (m1
, n
)
719 enum machine_mode m1
;
724 enum reg_class best_class
;
727 for (class = 1; class < N_REG_CLASSES
; class++)
730 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
731 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
732 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
733 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
736 if (! bad
&& reg_class_size
[class] > best_size
)
737 best_class
= class, best_size
= reg_class_size
[class];
746 /* Record one reload that needs to be performed.
747 IN is an rtx saying where the data are to be found before this instruction.
748 OUT says where they must be stored after the instruction.
749 (IN is zero for data not read, and OUT is zero for data not written.)
750 INLOC and OUTLOC point to the places in the instructions where
751 IN and OUT were found.
752 If IN and OUT are both non-zero, it means the same register must be used
753 to reload both IN and OUT.
755 CLASS is a register class required for the reloaded data.
756 INMODE is the machine mode that the instruction requires
757 for the reg that replaces IN and OUTMODE is likewise for OUT.
759 If IN is zero, then OUT's location and mode should be passed as
762 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
764 OPTIONAL nonzero means this reload does not need to be performed:
765 it can be discarded if that is more convenient.
767 OPNUM and TYPE say what the purpose of this reload is.
769 The return value is the reload-number for this reload.
771 If both IN and OUT are nonzero, in some rare cases we might
772 want to make two separate reloads. (Actually we never do this now.)
773 Therefore, the reload-number for OUT is stored in
774 output_reloadnum when we return; the return value applies to IN.
775 Usually (presently always), when IN and OUT are nonzero,
776 the two reload-numbers are equal, but the caller should be careful to
780 push_reload (in
, out
, inloc
, outloc
, class,
781 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
782 register rtx in
, out
;
784 enum reg_class
class;
785 enum machine_mode inmode
, outmode
;
789 enum reload_type type
;
793 int dont_remove_subreg
= 0;
794 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
795 int secondary_in_reload
= -1, secondary_out_reload
= -1;
796 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
797 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
799 /* INMODE and/or OUTMODE could be VOIDmode if no mode
800 has been specified for the operand. In that case,
801 use the operand's mode as the mode to reload. */
802 if (inmode
== VOIDmode
&& in
!= 0)
803 inmode
= GET_MODE (in
);
804 if (outmode
== VOIDmode
&& out
!= 0)
805 outmode
= GET_MODE (out
);
807 /* If IN is a pseudo register everywhere-equivalent to a constant, and
808 it is not in a hard register, reload straight from the constant,
809 since we want to get rid of such pseudo registers.
810 Often this is done earlier, but not always in find_reloads_address. */
811 if (in
!= 0 && GET_CODE (in
) == REG
)
813 register int regno
= REGNO (in
);
815 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
816 && reg_equiv_constant
[regno
] != 0)
817 in
= reg_equiv_constant
[regno
];
820 /* Likewise for OUT. Of course, OUT will never be equivalent to
821 an actual constant, but it might be equivalent to a memory location
822 (in the case of a parameter). */
823 if (out
!= 0 && GET_CODE (out
) == REG
)
825 register int regno
= REGNO (out
);
827 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
828 && reg_equiv_constant
[regno
] != 0)
829 out
= reg_equiv_constant
[regno
];
832 /* If we have a read-write operand with an address side-effect,
833 change either IN or OUT so the side-effect happens only once. */
834 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
836 if (GET_CODE (XEXP (in
, 0)) == POST_INC
837 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
838 in
= gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
839 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
840 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
841 out
= gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
844 /* If we are reloading a (SUBREG constant ...), really reload just the
845 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
846 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
847 a pseudo and hence will become a MEM) with M1 wider than M2 and the
848 register is a pseudo, also reload the inside expression.
849 For machines that extend byte loads, do this for any SUBREG of a pseudo
850 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
851 M2 is an integral mode that gets extended when loaded.
852 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
853 either M1 is not valid for R or M2 is wider than a word but we only
854 need one word to store an M2-sized quantity in R.
855 (However, if OUT is nonzero, we need to reload the reg *and*
856 the subreg, so do nothing here, and let following statement handle it.)
858 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
859 we can't handle it here because CONST_INT does not indicate a mode.
861 Similarly, we must reload the inside expression if we have a
862 STRICT_LOW_PART (presumably, in == out in the cas).
864 Also reload the inner expression if it does not require a secondary
865 reload but the SUBREG does.
867 Finally, reload the inner expression if it is a register that is in
868 the class whose registers cannot be referenced in a different size
869 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
870 cannot reload just the inside since we might end up with the wrong
871 register class. But if it is inside a STRICT_LOW_PART, we have
872 no choice, so we hope we do get the right register class there. */
874 if (in
!= 0 && GET_CODE (in
) == SUBREG
875 && (SUBREG_WORD (in
) == 0 || strict_low
)
876 #ifdef CLASS_CANNOT_CHANGE_SIZE
877 && class != CLASS_CANNOT_CHANGE_SIZE
879 && (CONSTANT_P (SUBREG_REG (in
))
880 || GET_CODE (SUBREG_REG (in
)) == PLUS
882 || (((GET_CODE (SUBREG_REG (in
)) == REG
883 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
884 || GET_CODE (SUBREG_REG (in
)) == MEM
)
885 && ((GET_MODE_SIZE (inmode
)
886 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
887 #ifdef LOAD_EXTEND_OP
888 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
889 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
891 && (GET_MODE_SIZE (inmode
)
892 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
893 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
894 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
897 || (GET_CODE (SUBREG_REG (in
)) == REG
898 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
899 /* The case where out is nonzero
900 is handled differently in the following statement. */
901 && (out
== 0 || SUBREG_WORD (in
) == 0)
902 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
903 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
905 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
907 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
908 GET_MODE (SUBREG_REG (in
)))))
909 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
912 #ifdef SECONDARY_INPUT_RELOAD_CLASS
913 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
914 && (SECONDARY_INPUT_RELOAD_CLASS (class,
915 GET_MODE (SUBREG_REG (in
)),
919 #ifdef CLASS_CANNOT_CHANGE_SIZE
920 || (GET_CODE (SUBREG_REG (in
)) == REG
921 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
922 && (TEST_HARD_REG_BIT
923 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
924 REGNO (SUBREG_REG (in
))))
925 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
926 != GET_MODE_SIZE (inmode
)))
930 in_subreg_loc
= inloc
;
931 inloc
= &SUBREG_REG (in
);
933 #ifndef LOAD_EXTEND_OP
934 if (GET_CODE (in
) == MEM
)
935 /* This is supposed to happen only for paradoxical subregs made by
936 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
937 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
940 inmode
= GET_MODE (in
);
943 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
944 either M1 is not valid for R or M2 is wider than a word but we only
945 need one word to store an M2-sized quantity in R.
947 However, we must reload the inner reg *as well as* the subreg in
950 /* Similar issue for (SUBREG constant ...) if it was not handled by the
951 code above. This can happen if SUBREG_WORD != 0. */
953 if (in
!= 0 && GET_CODE (in
) == SUBREG
954 && (CONSTANT_P (SUBREG_REG (in
))
955 || (GET_CODE (SUBREG_REG (in
)) == REG
956 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
957 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
))
960 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
961 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
963 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
965 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
966 GET_MODE (SUBREG_REG (in
)))))))))
968 /* This relies on the fact that emit_reload_insns outputs the
969 instructions for input reloads of type RELOAD_OTHER in the same
970 order as the reloads. Thus if the outer reload is also of type
971 RELOAD_OTHER, we are guaranteed that this inner reload will be
972 output before the outer reload. */
973 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
974 find_valid_class (inmode
, SUBREG_WORD (in
)),
975 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
976 dont_remove_subreg
= 1;
979 /* Similarly for paradoxical and problematical SUBREGs on the output.
980 Note that there is no reason we need worry about the previous value
981 of SUBREG_REG (out); even if wider than out,
982 storing in a subreg is entitled to clobber it all
983 (except in the case of STRICT_LOW_PART,
984 and in that case the constraint should label it input-output.) */
985 if (out
!= 0 && GET_CODE (out
) == SUBREG
986 && (SUBREG_WORD (out
) == 0 || strict_low
)
987 #ifdef CLASS_CANNOT_CHANGE_SIZE
988 && class != CLASS_CANNOT_CHANGE_SIZE
990 && (CONSTANT_P (SUBREG_REG (out
))
992 || (((GET_CODE (SUBREG_REG (out
)) == REG
993 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
994 || GET_CODE (SUBREG_REG (out
)) == MEM
)
995 && ((GET_MODE_SIZE (outmode
)
996 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))))
997 || (GET_CODE (SUBREG_REG (out
)) == REG
998 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
999 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1000 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1002 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1004 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1005 GET_MODE (SUBREG_REG (out
)))))
1006 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1007 + SUBREG_WORD (out
)),
1009 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1010 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1011 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1012 GET_MODE (SUBREG_REG (out
)),
1016 #ifdef CLASS_CANNOT_CHANGE_SIZE
1017 || (GET_CODE (SUBREG_REG (out
)) == REG
1018 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1019 && (TEST_HARD_REG_BIT
1020 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
1021 REGNO (SUBREG_REG (out
))))
1022 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1023 != GET_MODE_SIZE (outmode
)))
1027 out_subreg_loc
= outloc
;
1028 outloc
= &SUBREG_REG (out
);
1030 #ifndef LOAD_EXTEND_OP
1031 if (GET_CODE (out
) == MEM
1032 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1035 outmode
= GET_MODE (out
);
1038 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1039 either M1 is not valid for R or M2 is wider than a word but we only
1040 need one word to store an M2-sized quantity in R.
1042 However, we must reload the inner reg *as well as* the subreg in
1043 that case. In this case, the inner reg is an in-out reload. */
1045 if (out
!= 0 && GET_CODE (out
) == SUBREG
1046 && GET_CODE (SUBREG_REG (out
)) == REG
1047 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1048 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1050 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1051 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1053 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1055 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1056 GET_MODE (SUBREG_REG (out
)))))))
1058 /* This relies on the fact that emit_reload_insns outputs the
1059 instructions for output reloads of type RELOAD_OTHER in reverse
1060 order of the reloads. Thus if the outer reload is also of type
1061 RELOAD_OTHER, we are guaranteed that this inner reload will be
1062 output after the outer reload. */
1063 dont_remove_subreg
= 1;
1064 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1066 find_valid_class (outmode
, SUBREG_WORD (out
)),
1067 VOIDmode
, VOIDmode
, 0, 0,
1068 opnum
, RELOAD_OTHER
);
1071 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1072 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1073 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1074 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1077 /* If IN is a SUBREG of a hard register, make a new REG. This
1078 simplifies some of the cases below. */
1080 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1081 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1082 && ! dont_remove_subreg
)
1083 in
= gen_rtx_REG (GET_MODE (in
),
1084 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1086 /* Similarly for OUT. */
1087 if (out
!= 0 && GET_CODE (out
) == SUBREG
1088 && GET_CODE (SUBREG_REG (out
)) == REG
1089 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1090 && ! dont_remove_subreg
)
1091 out
= gen_rtx_REG (GET_MODE (out
),
1092 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1094 /* Narrow down the class of register wanted if that is
1095 desirable on this machine for efficiency. */
1097 class = PREFERRED_RELOAD_CLASS (in
, class);
1099 /* Output reloads may need analogous treatment, different in detail. */
1100 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1102 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1105 /* Make sure we use a class that can handle the actual pseudo
1106 inside any subreg. For example, on the 386, QImode regs
1107 can appear within SImode subregs. Although GENERAL_REGS
1108 can handle SImode, QImode needs a smaller class. */
1109 #ifdef LIMIT_RELOAD_CLASS
1111 class = LIMIT_RELOAD_CLASS (inmode
, class);
1112 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1113 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1116 class = LIMIT_RELOAD_CLASS (outmode
, class);
1117 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1118 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1121 /* Verify that this class is at least possible for the mode that
1123 if (this_insn_is_asm
)
1125 enum machine_mode mode
;
1126 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1130 if (mode
== VOIDmode
)
1132 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1137 outmode
= word_mode
;
1139 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1140 if (HARD_REGNO_MODE_OK (i
, mode
)
1141 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1143 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1146 for (j
= 1; j
< nregs
; j
++)
1147 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1152 if (i
== FIRST_PSEUDO_REGISTER
)
1154 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1159 if (class == NO_REGS
)
1162 /* We can use an existing reload if the class is right
1163 and at least one of IN and OUT is a match
1164 and the other is at worst neutral.
1165 (A zero compared against anything is neutral.)
1167 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1168 for the same thing since that can cause us to need more reload registers
1169 than we otherwise would. */
1171 for (i
= 0; i
< n_reloads
; i
++)
1172 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1173 || reg_class_subset_p (reload_reg_class
[i
], class))
1174 /* If the existing reload has a register, it must fit our class. */
1175 && (reload_reg_rtx
[i
] == 0
1176 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1177 true_regnum (reload_reg_rtx
[i
])))
1178 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
1179 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
1181 (out
!= 0 && MATCHES (reload_out
[i
], out
)
1182 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
1183 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
1184 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1185 opnum
, reload_opnum
[i
]))
1188 /* Reloading a plain reg for input can match a reload to postincrement
1189 that reg, since the postincrement's value is the right value.
1190 Likewise, it can match a preincrement reload, since we regard
1191 the preincrementation as happening before any ref in this insn
1192 to that register. */
1194 for (i
= 0; i
< n_reloads
; i
++)
1195 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1196 || reg_class_subset_p (reload_reg_class
[i
], class))
1197 /* If the existing reload has a register, it must fit our class. */
1198 && (reload_reg_rtx
[i
] == 0
1199 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1200 true_regnum (reload_reg_rtx
[i
])))
1201 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
1202 && ((GET_CODE (in
) == REG
1203 && (GET_CODE (reload_in
[i
]) == POST_INC
1204 || GET_CODE (reload_in
[i
]) == POST_DEC
1205 || GET_CODE (reload_in
[i
]) == PRE_INC
1206 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
1207 && MATCHES (XEXP (reload_in
[i
], 0), in
))
1209 (GET_CODE (reload_in
[i
]) == REG
1210 && (GET_CODE (in
) == POST_INC
1211 || GET_CODE (in
) == POST_DEC
1212 || GET_CODE (in
) == PRE_INC
1213 || GET_CODE (in
) == PRE_DEC
)
1214 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
1215 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
1216 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1217 opnum
, reload_opnum
[i
]))
1219 /* Make sure reload_in ultimately has the increment,
1220 not the plain register. */
1221 if (GET_CODE (in
) == REG
)
1228 /* See if we need a secondary reload register to move between CLASS
1229 and IN or CLASS and OUT. Get the icode and push any required reloads
1230 needed for each of them if so. */
1232 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1235 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1236 &secondary_in_icode
);
1239 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1240 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1241 secondary_out_reload
1242 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1243 type
, &secondary_out_icode
);
1246 /* We found no existing reload suitable for re-use.
1247 So add an additional reload. */
1249 #ifdef SECONDARY_MEMORY_NEEDED
1250 /* If a memory location is needed for the copy, make one. */
1251 if (in
!= 0 && GET_CODE (in
) == REG
1252 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1253 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1255 get_secondary_mem (in
, inmode
, opnum
, type
);
1260 reload_out
[i
] = out
;
1261 reload_reg_class
[i
] = class;
1262 reload_inmode
[i
] = inmode
;
1263 reload_outmode
[i
] = outmode
;
1264 reload_reg_rtx
[i
] = 0;
1265 reload_optional
[i
] = optional
;
1266 reload_nongroup
[i
] = 0;
1268 reload_nocombine
[i
] = 0;
1269 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1270 reload_opnum
[i
] = opnum
;
1271 reload_when_needed
[i
] = type
;
1272 reload_secondary_in_reload
[i
] = secondary_in_reload
;
1273 reload_secondary_out_reload
[i
] = secondary_out_reload
;
1274 reload_secondary_in_icode
[i
] = secondary_in_icode
;
1275 reload_secondary_out_icode
[i
] = secondary_out_icode
;
1276 reload_secondary_p
[i
] = 0;
1280 #ifdef SECONDARY_MEMORY_NEEDED
1281 if (out
!= 0 && GET_CODE (out
) == REG
1282 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1283 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1285 get_secondary_mem (out
, outmode
, opnum
, type
);
1290 /* We are reusing an existing reload,
1291 but we may have additional information for it.
1292 For example, we may now have both IN and OUT
1293 while the old one may have just one of them. */
1295 /* The modes can be different. If they are, we want to reload in
1296 the larger mode, so that the value is valid for both modes. */
1297 if (inmode
!= VOIDmode
1298 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (reload_inmode
[i
]))
1299 reload_inmode
[i
] = inmode
;
1300 if (outmode
!= VOIDmode
1301 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (reload_outmode
[i
]))
1302 reload_outmode
[i
] = outmode
;
1306 reload_out
[i
] = out
;
1307 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1308 reload_reg_class
[i
] = class;
1309 reload_optional
[i
] &= optional
;
1310 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1311 opnum
, reload_opnum
[i
]))
1312 reload_when_needed
[i
] = RELOAD_OTHER
;
1313 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1316 /* If the ostensible rtx being reload differs from the rtx found
1317 in the location to substitute, this reload is not safe to combine
1318 because we cannot reliably tell whether it appears in the insn. */
1320 if (in
!= 0 && in
!= *inloc
)
1321 reload_nocombine
[i
] = 1;
1324 /* This was replaced by changes in find_reloads_address_1 and the new
1325 function inc_for_reload, which go with a new meaning of reload_inc. */
1327 /* If this is an IN/OUT reload in an insn that sets the CC,
1328 it must be for an autoincrement. It doesn't work to store
1329 the incremented value after the insn because that would clobber the CC.
1330 So we must do the increment of the value reloaded from,
1331 increment it, store it back, then decrement again. */
1332 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1336 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1337 /* If we did not find a nonzero amount-to-increment-by,
1338 that contradicts the belief that IN is being incremented
1339 in an address in this insn. */
1340 if (reload_inc
[i
] == 0)
1345 /* If we will replace IN and OUT with the reload-reg,
1346 record where they are located so that substitution need
1347 not do a tree walk. */
1349 if (replace_reloads
)
1353 register struct replacement
*r
= &replacements
[n_replacements
++];
1355 r
->subreg_loc
= in_subreg_loc
;
1359 if (outloc
!= 0 && outloc
!= inloc
)
1361 register struct replacement
*r
= &replacements
[n_replacements
++];
1364 r
->subreg_loc
= out_subreg_loc
;
1369 /* If this reload is just being introduced and it has both
1370 an incoming quantity and an outgoing quantity that are
1371 supposed to be made to match, see if either one of the two
1372 can serve as the place to reload into.
1374 If one of them is acceptable, set reload_reg_rtx[i]
1377 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1379 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1381 reload_reg_class
[i
], i
,
1382 earlyclobber_operand_p (out
));
1384 /* If the outgoing register already contains the same value
1385 as the incoming one, we can dispense with loading it.
1386 The easiest way to tell the caller that is to give a phony
1387 value for the incoming operand (same as outgoing one). */
1388 if (reload_reg_rtx
[i
] == out
1389 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1390 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1391 static_reload_reg_p
, i
, inmode
))
1395 /* If this is an input reload and the operand contains a register that
1396 dies in this insn and is used nowhere else, see if it is the right class
1397 to be used for this reload. Use it if so. (This occurs most commonly
1398 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1399 this if it is also an output reload that mentions the register unless
1400 the output is a SUBREG that clobbers an entire register.
1402 Note that the operand might be one of the spill regs, if it is a
1403 pseudo reg and we are in a block where spilling has not taken place.
1404 But if there is no spilling in this block, that is OK.
1405 An explicitly used hard reg cannot be a spill reg. */
1407 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1412 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1413 if (REG_NOTE_KIND (note
) == REG_DEAD
1414 && GET_CODE (XEXP (note
, 0)) == REG
1415 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1416 && reg_mentioned_p (XEXP (note
, 0), in
)
1417 && ! refers_to_regno_for_reload_p (regno
,
1419 + HARD_REGNO_NREGS (regno
,
1421 PATTERN (this_insn
), inloc
)
1422 /* If this is also an output reload, IN cannot be used as
1423 the reload register if it is set in this insn unless IN
1425 && (out
== 0 || in
== out
1426 || ! hard_reg_set_here_p (regno
,
1428 + HARD_REGNO_NREGS (regno
,
1430 PATTERN (this_insn
)))
1431 /* ??? Why is this code so different from the previous?
1432 Is there any simple coherent way to describe the two together?
1433 What's going on here. */
1435 || (GET_CODE (in
) == SUBREG
1436 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1438 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1439 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1440 /* Make sure the operand fits in the reg that dies. */
1441 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1442 && HARD_REGNO_MODE_OK (regno
, inmode
)
1443 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1444 && HARD_REGNO_MODE_OK (regno
, outmode
)
1445 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1446 && !fixed_regs
[regno
])
1448 reload_reg_rtx
[i
] = gen_rtx_REG (inmode
, regno
);
1454 output_reloadnum
= i
;
1459 /* Record an additional place we must replace a value
1460 for which we have already recorded a reload.
1461 RELOADNUM is the value returned by push_reload
1462 when the reload was recorded.
1463 This is used in insn patterns that use match_dup. */
1466 push_replacement (loc
, reloadnum
, mode
)
1469 enum machine_mode mode
;
1471 if (replace_reloads
)
1473 register struct replacement
*r
= &replacements
[n_replacements
++];
1474 r
->what
= reloadnum
;
1481 /* Transfer all replacements that used to be in reload FROM to be in
1485 transfer_replacements (to
, from
)
1490 for (i
= 0; i
< n_replacements
; i
++)
1491 if (replacements
[i
].what
== from
)
1492 replacements
[i
].what
= to
;
1495 /* If there is only one output reload, and it is not for an earlyclobber
1496 operand, try to combine it with a (logically unrelated) input reload
1497 to reduce the number of reload registers needed.
1499 This is safe if the input reload does not appear in
1500 the value being output-reloaded, because this implies
1501 it is not needed any more once the original insn completes.
1503 If that doesn't work, see we can use any of the registers that
1504 die in this insn as a reload register. We can if it is of the right
1505 class and does not appear in the value being output-reloaded. */
1511 int output_reload
= -1;
1512 int secondary_out
= -1;
1515 /* Find the output reload; return unless there is exactly one
1516 and that one is mandatory. */
1518 for (i
= 0; i
< n_reloads
; i
++)
1519 if (reload_out
[i
] != 0)
1521 if (output_reload
>= 0)
1526 if (output_reload
< 0 || reload_optional
[output_reload
])
1529 /* An input-output reload isn't combinable. */
1531 if (reload_in
[output_reload
] != 0)
1534 /* If this reload is for an earlyclobber operand, we can't do anything. */
1535 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1538 /* Check each input reload; can we combine it? */
1540 for (i
= 0; i
< n_reloads
; i
++)
1541 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1542 /* Life span of this reload must not extend past main insn. */
1543 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1544 && reload_when_needed
[i
] != RELOAD_FOR_OUTADDR_ADDRESS
1545 && reload_when_needed
[i
] != RELOAD_OTHER
1546 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1547 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1548 reload_outmode
[output_reload
]))
1549 && reload_inc
[i
] == 0
1550 && reload_reg_rtx
[i
] == 0
1551 #ifdef SECONDARY_MEMORY_NEEDED
1552 /* Don't combine two reloads with different secondary
1553 memory locations. */
1554 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1555 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1556 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1557 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1559 && (SMALL_REGISTER_CLASSES
1560 ? (reload_reg_class
[i
] == reload_reg_class
[output_reload
])
1561 : (reg_class_subset_p (reload_reg_class
[i
],
1562 reload_reg_class
[output_reload
])
1563 || reg_class_subset_p (reload_reg_class
[output_reload
],
1564 reload_reg_class
[i
])))
1565 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1566 /* Args reversed because the first arg seems to be
1567 the one that we imagine being modified
1568 while the second is the one that might be affected. */
1569 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1571 /* However, if the input is a register that appears inside
1572 the output, then we also can't share.
1573 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1574 If the same reload reg is used for both reg 69 and the
1575 result to be stored in memory, then that result
1576 will clobber the address of the memory ref. */
1577 && ! (GET_CODE (reload_in
[i
]) == REG
1578 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1579 reload_out
[output_reload
]))))
1580 && (reg_class_size
[(int) reload_reg_class
[i
]]
1581 || SMALL_REGISTER_CLASSES
)
1582 /* We will allow making things slightly worse by combining an
1583 input and an output, but no worse than that. */
1584 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1585 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1589 /* We have found a reload to combine with! */
1590 reload_out
[i
] = reload_out
[output_reload
];
1591 reload_outmode
[i
] = reload_outmode
[output_reload
];
1592 /* Mark the old output reload as inoperative. */
1593 reload_out
[output_reload
] = 0;
1594 /* The combined reload is needed for the entire insn. */
1595 reload_when_needed
[i
] = RELOAD_OTHER
;
1596 /* If the output reload had a secondary reload, copy it. */
1597 if (reload_secondary_out_reload
[output_reload
] != -1)
1599 reload_secondary_out_reload
[i
]
1600 = reload_secondary_out_reload
[output_reload
];
1601 reload_secondary_out_icode
[i
]
1602 = reload_secondary_out_icode
[output_reload
];
1605 #ifdef SECONDARY_MEMORY_NEEDED
1606 /* Copy any secondary MEM. */
1607 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1608 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1609 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1611 /* If required, minimize the register class. */
1612 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1613 reload_reg_class
[i
]))
1614 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1616 /* Transfer all replacements from the old reload to the combined. */
1617 for (j
= 0; j
< n_replacements
; j
++)
1618 if (replacements
[j
].what
== output_reload
)
1619 replacements
[j
].what
= i
;
1624 /* If this insn has only one operand that is modified or written (assumed
1625 to be the first), it must be the one corresponding to this reload. It
1626 is safe to use anything that dies in this insn for that output provided
1627 that it does not occur in the output (we already know it isn't an
1628 earlyclobber. If this is an asm insn, give up. */
1630 if (INSN_CODE (this_insn
) == -1)
1633 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1634 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1635 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1638 /* See if some hard register that dies in this insn and is not used in
1639 the output is the right class. Only works if the register we pick
1640 up can fully hold our output reload. */
1641 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1642 if (REG_NOTE_KIND (note
) == REG_DEAD
1643 && GET_CODE (XEXP (note
, 0)) == REG
1644 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1645 reload_out
[output_reload
])
1646 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1647 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1648 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1649 REGNO (XEXP (note
, 0)))
1650 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1651 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1652 /* Ensure that a secondary or tertiary reload for this output
1653 won't want this register. */
1654 && ((secondary_out
= reload_secondary_out_reload
[output_reload
]) == -1
1655 || (! (TEST_HARD_REG_BIT
1656 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1657 REGNO (XEXP (note
, 0))))
1658 && ((secondary_out
= reload_secondary_out_reload
[secondary_out
]) == -1
1659 || ! (TEST_HARD_REG_BIT
1660 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1661 REGNO (XEXP (note
, 0)))))))
1662 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1664 reload_reg_rtx
[output_reload
]
1665 = gen_rtx_REG (reload_outmode
[output_reload
],
1666 REGNO (XEXP (note
, 0)));
1671 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1672 See if one of IN and OUT is a register that may be used;
1673 this is desirable since a spill-register won't be needed.
1674 If so, return the register rtx that proves acceptable.
1676 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1677 CLASS is the register class required for the reload.
1679 If FOR_REAL is >= 0, it is the number of the reload,
1680 and in some cases when it can be discovered that OUT doesn't need
1681 to be computed, clear out reload_out[FOR_REAL].
1683 If FOR_REAL is -1, this should not be done, because this call
1684 is just to see if a register can be found, not to find and install it.
1686 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1687 puts an additional constraint on being able to use IN for OUT since
1688 IN must not appear elsewhere in the insn (it is assumed that IN itself
1689 is safe from the earlyclobber). */
1692 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1693 inmode
, outmode
, class, for_real
, earlyclobber
)
1694 rtx real_in
, real_out
;
1695 rtx
*inloc
, *outloc
;
1696 enum machine_mode inmode
, outmode
;
1697 enum reg_class
class;
1707 /* If operands exceed a word, we can't use either of them
1708 unless they have the same size. */
1709 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1710 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1711 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1714 /* Find the inside of any subregs. */
1715 while (GET_CODE (out
) == SUBREG
)
1717 out_offset
= SUBREG_WORD (out
);
1718 out
= SUBREG_REG (out
);
1720 while (GET_CODE (in
) == SUBREG
)
1722 in_offset
= SUBREG_WORD (in
);
1723 in
= SUBREG_REG (in
);
1726 /* Narrow down the reg class, the same way push_reload will;
1727 otherwise we might find a dummy now, but push_reload won't. */
1728 class = PREFERRED_RELOAD_CLASS (in
, class);
1730 /* See if OUT will do. */
1731 if (GET_CODE (out
) == REG
1732 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1734 register int regno
= REGNO (out
) + out_offset
;
1735 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1738 /* When we consider whether the insn uses OUT,
1739 ignore references within IN. They don't prevent us
1740 from copying IN into OUT, because those refs would
1741 move into the insn that reloads IN.
1743 However, we only ignore IN in its role as this reload.
1744 If the insn uses IN elsewhere and it contains OUT,
1745 that counts. We can't be sure it's the "same" operand
1746 so it might not go through this reload. */
1748 *inloc
= const0_rtx
;
1750 if (regno
< FIRST_PSEUDO_REGISTER
1751 /* A fixed reg that can overlap other regs better not be used
1752 for reloading in any way. */
1753 #ifdef OVERLAPPING_REGNO_P
1754 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1756 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1757 PATTERN (this_insn
), outloc
))
1760 for (i
= 0; i
< nwords
; i
++)
1761 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1767 if (GET_CODE (real_out
) == REG
)
1770 value
= gen_rtx_REG (outmode
, regno
);
1777 /* Consider using IN if OUT was not acceptable
1778 or if OUT dies in this insn (like the quotient in a divmod insn).
1779 We can't use IN unless it is dies in this insn,
1780 which means we must know accurately which hard regs are live.
1781 Also, the result can't go in IN if IN is used within OUT,
1782 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1783 if (hard_regs_live_known
1784 && GET_CODE (in
) == REG
1785 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1787 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1788 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1789 && !fixed_regs
[REGNO (in
)]
1790 && HARD_REGNO_MODE_OK (REGNO (in
),
1791 /* The only case where out and real_out might
1792 have different modes is where real_out
1793 is a subreg, and in that case, out
1795 (GET_MODE (out
) != VOIDmode
1796 ? GET_MODE (out
) : outmode
)))
1798 register int regno
= REGNO (in
) + in_offset
;
1799 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1801 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1802 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1803 PATTERN (this_insn
))
1805 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1806 PATTERN (this_insn
), inloc
)))
1809 for (i
= 0; i
< nwords
; i
++)
1810 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1816 /* If we were going to use OUT as the reload reg
1817 and changed our mind, it means OUT is a dummy that
1818 dies here. So don't bother copying value to it. */
1819 if (for_real
>= 0 && value
== real_out
)
1820 reload_out
[for_real
] = 0;
1821 if (GET_CODE (real_in
) == REG
)
1824 value
= gen_rtx_REG (inmode
, regno
);
1832 /* This page contains subroutines used mainly for determining
1833 whether the IN or an OUT of a reload can serve as the
1836 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1839 earlyclobber_operand_p (x
)
1844 for (i
= 0; i
< n_earlyclobbers
; i
++)
1845 if (reload_earlyclobbers
[i
] == x
)
1851 /* Return 1 if expression X alters a hard reg in the range
1852 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1853 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1854 X should be the body of an instruction. */
1857 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1858 register int beg_regno
, end_regno
;
1861 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1863 register rtx op0
= SET_DEST (x
);
1864 while (GET_CODE (op0
) == SUBREG
)
1865 op0
= SUBREG_REG (op0
);
1866 if (GET_CODE (op0
) == REG
)
1868 register int r
= REGNO (op0
);
1869 /* See if this reg overlaps range under consideration. */
1871 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1875 else if (GET_CODE (x
) == PARALLEL
)
1877 register int i
= XVECLEN (x
, 0) - 1;
1879 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1886 /* Return 1 if ADDR is a valid memory address for mode MODE,
1887 and check that each pseudo reg has the proper kind of
1891 strict_memory_address_p (mode
, addr
)
1892 enum machine_mode mode
;
1895 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1902 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1903 if they are the same hard reg, and has special hacks for
1904 autoincrement and autodecrement.
1905 This is specifically intended for find_reloads to use
1906 in determining whether two operands match.
1907 X is the operand whose number is the lower of the two.
1909 The value is 2 if Y contains a pre-increment that matches
1910 a non-incrementing address in X. */
1912 /* ??? To be completely correct, we should arrange to pass
1913 for X the output operand and for Y the input operand.
1914 For now, we assume that the output operand has the lower number
1915 because that is natural in (SET output (... input ...)). */
1918 operands_match_p (x
, y
)
1922 register RTX_CODE code
= GET_CODE (x
);
1928 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1929 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1930 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1936 i
= REGNO (SUBREG_REG (x
));
1937 if (i
>= FIRST_PSEUDO_REGISTER
)
1939 i
+= SUBREG_WORD (x
);
1944 if (GET_CODE (y
) == SUBREG
)
1946 j
= REGNO (SUBREG_REG (y
));
1947 if (j
>= FIRST_PSEUDO_REGISTER
)
1949 j
+= SUBREG_WORD (y
);
1954 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1955 multiple hard register group, so that for example (reg:DI 0) and
1956 (reg:SI 1) will be considered the same register. */
1957 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1958 && i
< FIRST_PSEUDO_REGISTER
)
1959 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1960 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1961 && j
< FIRST_PSEUDO_REGISTER
)
1962 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1966 /* If two operands must match, because they are really a single
1967 operand of an assembler insn, then two postincrements are invalid
1968 because the assembler insn would increment only once.
1969 On the other hand, an postincrement matches ordinary indexing
1970 if the postincrement is the output operand. */
1971 if (code
== POST_DEC
|| code
== POST_INC
)
1972 return operands_match_p (XEXP (x
, 0), y
);
1973 /* Two preincrements are invalid
1974 because the assembler insn would increment only once.
1975 On the other hand, an preincrement matches ordinary indexing
1976 if the preincrement is the input operand.
1977 In this case, return 2, since some callers need to do special
1978 things when this happens. */
1979 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1980 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1984 /* Now we have disposed of all the cases
1985 in which different rtx codes can match. */
1986 if (code
!= GET_CODE (y
))
1988 if (code
== LABEL_REF
)
1989 return XEXP (x
, 0) == XEXP (y
, 0);
1990 if (code
== SYMBOL_REF
)
1991 return XSTR (x
, 0) == XSTR (y
, 0);
1993 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1995 if (GET_MODE (x
) != GET_MODE (y
))
1998 /* Compare the elements. If any pair of corresponding elements
1999 fail to match, return 0 for the whole things. */
2002 fmt
= GET_RTX_FORMAT (code
);
2003 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2009 if (XWINT (x
, i
) != XWINT (y
, i
))
2014 if (XINT (x
, i
) != XINT (y
, i
))
2019 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2022 /* If any subexpression returns 2,
2023 we should return 2 if we are successful. */
2031 /* It is believed that rtx's at this level will never
2032 contain anything but integers and other rtx's,
2033 except for within LABEL_REFs and SYMBOL_REFs. */
2038 return 1 + success_2
;
2041 /* Return the number of times character C occurs in string S. */
2044 n_occurrences (c
, s
)
2054 /* Describe the range of registers or memory referenced by X.
2055 If X is a register, set REG_FLAG and put the first register
2056 number into START and the last plus one into END.
2057 If X is a memory reference, put a base address into BASE
2058 and a range of integer offsets into START and END.
2059 If X is pushing on the stack, we can assume it causes no trouble,
2060 so we set the SAFE field. */
2062 static struct decomposition
2066 struct decomposition val
;
2071 if (GET_CODE (x
) == MEM
)
2073 rtx base
, offset
= 0;
2074 rtx addr
= XEXP (x
, 0);
2076 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2077 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2079 val
.base
= XEXP (addr
, 0);
2080 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2081 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2082 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2086 if (GET_CODE (addr
) == CONST
)
2088 addr
= XEXP (addr
, 0);
2091 if (GET_CODE (addr
) == PLUS
)
2093 if (CONSTANT_P (XEXP (addr
, 0)))
2095 base
= XEXP (addr
, 1);
2096 offset
= XEXP (addr
, 0);
2098 else if (CONSTANT_P (XEXP (addr
, 1)))
2100 base
= XEXP (addr
, 0);
2101 offset
= XEXP (addr
, 1);
2108 offset
= const0_rtx
;
2110 if (GET_CODE (offset
) == CONST
)
2111 offset
= XEXP (offset
, 0);
2112 if (GET_CODE (offset
) == PLUS
)
2114 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2116 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2117 offset
= XEXP (offset
, 0);
2119 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2121 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2122 offset
= XEXP (offset
, 1);
2126 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2127 offset
= const0_rtx
;
2130 else if (GET_CODE (offset
) != CONST_INT
)
2132 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2133 offset
= const0_rtx
;
2136 if (all_const
&& GET_CODE (base
) == PLUS
)
2137 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2139 if (GET_CODE (offset
) != CONST_INT
)
2142 val
.start
= INTVAL (offset
);
2143 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2147 else if (GET_CODE (x
) == REG
)
2150 val
.start
= true_regnum (x
);
2153 /* A pseudo with no hard reg. */
2154 val
.start
= REGNO (x
);
2155 val
.end
= val
.start
+ 1;
2159 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2161 else if (GET_CODE (x
) == SUBREG
)
2163 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2164 /* This could be more precise, but it's good enough. */
2165 return decompose (SUBREG_REG (x
));
2167 val
.start
= true_regnum (x
);
2169 return decompose (SUBREG_REG (x
));
2172 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2174 else if (CONSTANT_P (x
)
2175 /* This hasn't been assigned yet, so it can't conflict yet. */
2176 || GET_CODE (x
) == SCRATCH
)
2183 /* Return 1 if altering Y will not modify the value of X.
2184 Y is also described by YDATA, which should be decompose (Y). */
2187 immune_p (x
, y
, ydata
)
2189 struct decomposition ydata
;
2191 struct decomposition xdata
;
2194 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2198 if (GET_CODE (y
) != MEM
)
2200 /* If Y is memory and X is not, Y can't affect X. */
2201 if (GET_CODE (x
) != MEM
)
2204 xdata
= decompose (x
);
2206 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2208 /* If bases are distinct symbolic constants, there is no overlap. */
2209 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2211 /* Constants and stack slots never overlap. */
2212 if (CONSTANT_P (xdata
.base
)
2213 && (ydata
.base
== frame_pointer_rtx
2214 || ydata
.base
== hard_frame_pointer_rtx
2215 || ydata
.base
== stack_pointer_rtx
))
2217 if (CONSTANT_P (ydata
.base
)
2218 && (xdata
.base
== frame_pointer_rtx
2219 || xdata
.base
== hard_frame_pointer_rtx
2220 || xdata
.base
== stack_pointer_rtx
))
2222 /* If either base is variable, we don't know anything. */
2227 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2230 /* Similar, but calls decompose. */
2233 safe_from_earlyclobber (op
, clobber
)
2236 struct decomposition early_data
;
2238 early_data
= decompose (clobber
);
2239 return immune_p (op
, clobber
, early_data
);
2242 /* Main entry point of this file: search the body of INSN
2243 for values that need reloading and record them with push_reload.
2244 REPLACE nonzero means record also where the values occur
2245 so that subst_reloads can be used.
2247 IND_LEVELS says how many levels of indirection are supported by this
2248 machine; a value of zero means that a memory reference is not a valid
2251 LIVE_KNOWN says we have valid information about which hard
2252 regs are live at each point in the program; this is true when
2253 we are called from global_alloc but false when stupid register
2254 allocation has been done.
2256 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2257 which is nonnegative if the reg has been commandeered for reloading into.
2258 It is copied into STATIC_RELOAD_REG_P and referenced from there
2259 by various subroutines. */
2262 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2264 int replace
, ind_levels
;
2266 short *reload_reg_p
;
2268 #ifdef REGISTER_CONSTRAINTS
2270 register int insn_code_number
;
2273 /* These are the constraints for the insn. We don't change them. */
2274 char *constraints1
[MAX_RECOG_OPERANDS
];
2275 /* These start out as the constraints for the insn
2276 and they are chewed up as we consider alternatives. */
2277 char *constraints
[MAX_RECOG_OPERANDS
];
2278 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2280 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2281 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2282 /* Nonzero for a MEM operand whose entire address needs a reload. */
2283 int address_reloaded
[MAX_RECOG_OPERANDS
];
2284 /* Value of enum reload_type to use for operand. */
2285 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2286 /* Value of enum reload_type to use within address of operand. */
2287 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2288 /* Save the usage of each operand. */
2289 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2290 int no_input_reloads
= 0, no_output_reloads
= 0;
2292 int this_alternative
[MAX_RECOG_OPERANDS
];
2293 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2294 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2295 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2296 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2298 int goal_alternative
[MAX_RECOG_OPERANDS
];
2299 int this_alternative_number
;
2300 int goal_alternative_number
;
2301 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2302 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2303 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2304 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2305 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2306 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2307 int goal_alternative_swapped
;
2311 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2312 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2313 rtx body
= PATTERN (insn
);
2314 rtx set
= single_set (insn
);
2315 int goal_earlyclobber
, this_earlyclobber
;
2316 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2317 /* Cache the last regno for the last pseudo we did an output reload
2318 for in case the next insn uses it. */
2319 int previous_last_output_reload_regno
= last_output_reload_regno
;
2322 this_insn_is_asm
= 0; /* Tentative. */
2326 n_earlyclobbers
= 0;
2327 replace_reloads
= replace
;
2328 hard_regs_live_known
= live_known
;
2329 static_reload_reg_p
= reload_reg_p
;
2330 last_output_reload_regno
= -1;
2332 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2333 neither are insns that SET cc0. Insns that use CC0 are not allowed
2334 to have any input reloads. */
2335 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2336 no_output_reloads
= 1;
2339 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2340 no_input_reloads
= 1;
2341 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2342 no_output_reloads
= 1;
2345 #ifdef SECONDARY_MEMORY_NEEDED
2346 /* The eliminated forms of any secondary memory locations are per-insn, so
2347 clear them out here. */
2349 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2352 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2353 Make OPERANDS point to a vector of operand values.
2354 Make OPERAND_LOCS point to a vector of pointers to
2355 where the operands were found.
2356 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2357 constraint-strings for this insn.
2358 Return if the insn needs no reload processing. */
2360 switch (GET_CODE (body
))
2370 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2371 is cheap to move between them. If it is not, there may not be an insn
2372 to do the copy, so we may need a reload. */
2373 if (GET_CODE (SET_DEST (body
)) == REG
2374 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2375 && GET_CODE (SET_SRC (body
)) == REG
2376 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2377 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2378 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2382 reload_n_operands
= noperands
= asm_noperands (body
);
2385 /* This insn is an `asm' with operands. */
2387 insn_code_number
= -1;
2388 this_insn_is_asm
= 1;
2390 /* expand_asm_operands makes sure there aren't too many operands. */
2391 if (noperands
> MAX_RECOG_OPERANDS
)
2394 /* Now get the operand values and constraints out of the insn. */
2396 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2397 constraints
, operand_mode
);
2400 bcopy ((char *) constraints
, (char *) constraints1
,
2401 noperands
* sizeof (char *));
2402 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2403 for (i
= 1; i
< noperands
; i
++)
2404 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2406 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2407 /* Avoid further trouble with this insn. */
2408 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
2417 /* Ordinary insn: recognize it, get the operands via insn_extract
2418 and get the constraints. */
2420 insn_code_number
= recog_memoized (insn
);
2421 if (insn_code_number
< 0)
2422 fatal_insn_not_found (insn
);
2424 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2425 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2426 /* Just return "no reloads" if insn has no operands with constraints. */
2427 if (n_alternatives
== 0)
2429 insn_extract (insn
);
2430 for (i
= 0; i
< noperands
; i
++)
2432 constraints
[i
] = constraints1
[i
]
2433 = insn_operand_constraint
[insn_code_number
][i
];
2434 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2443 /* If we will need to know, later, whether some pair of operands
2444 are the same, we must compare them now and save the result.
2445 Reloading the base and index registers will clobber them
2446 and afterward they will fail to match. */
2448 for (i
= 0; i
< noperands
; i
++)
2453 substed_operand
[i
] = recog_operand
[i
];
2456 modified
[i
] = RELOAD_READ
;
2458 /* Scan this operand's constraint to see if it is an output operand,
2459 an in-out operand, is commutative, or should match another. */
2464 modified
[i
] = RELOAD_WRITE
;
2466 modified
[i
] = RELOAD_READ_WRITE
;
2469 /* The last operand should not be marked commutative. */
2470 if (i
== noperands
- 1)
2472 if (this_insn_is_asm
)
2473 warning_for_asm (this_insn
,
2474 "`%%' constraint used with last operand");
2481 else if (c
>= '0' && c
<= '9')
2484 operands_match
[c
][i
]
2485 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2487 /* An operand may not match itself. */
2490 if (this_insn_is_asm
)
2491 warning_for_asm (this_insn
,
2492 "operand %d has constraint %d", i
, c
);
2497 /* If C can be commuted with C+1, and C might need to match I,
2498 then C+1 might also need to match I. */
2499 if (commutative
>= 0)
2501 if (c
== commutative
|| c
== commutative
+ 1)
2503 int other
= c
+ (c
== commutative
? 1 : -1);
2504 operands_match
[other
][i
]
2505 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2507 if (i
== commutative
|| i
== commutative
+ 1)
2509 int other
= i
+ (i
== commutative
? 1 : -1);
2510 operands_match
[c
][other
]
2511 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2513 /* Note that C is supposed to be less than I.
2514 No need to consider altering both C and I because in
2515 that case we would alter one into the other. */
2521 /* Examine each operand that is a memory reference or memory address
2522 and reload parts of the addresses into index registers.
2523 Also here any references to pseudo regs that didn't get hard regs
2524 but are equivalent to constants get replaced in the insn itself
2525 with those constants. Nobody will ever see them again.
2527 Finally, set up the preferred classes of each operand. */
2529 for (i
= 0; i
< noperands
; i
++)
2531 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2533 address_reloaded
[i
] = 0;
2534 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2535 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2538 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2539 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2542 if (*constraints
[i
] == 0)
2543 /* Ignore things like match_operator operands. */
2545 else if (constraints
[i
][0] == 'p')
2547 find_reloads_address (VOIDmode
, NULL_PTR
,
2548 recog_operand
[i
], recog_operand_loc
[i
],
2549 i
, operand_type
[i
], ind_levels
, insn
);
2551 /* If we now have a simple operand where we used to have a
2552 PLUS or MULT, re-recognize and try again. */
2553 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc
[i
])) == 'o'
2554 || GET_CODE (*recog_operand_loc
[i
]) == SUBREG
)
2555 && (GET_CODE (recog_operand
[i
]) == MULT
2556 || GET_CODE (recog_operand
[i
]) == PLUS
))
2558 INSN_CODE (insn
) = -1;
2559 find_reloads (insn
, replace
, ind_levels
, live_known
,
2564 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2566 else if (code
== MEM
)
2569 = find_reloads_address (GET_MODE (recog_operand
[i
]),
2570 recog_operand_loc
[i
],
2571 XEXP (recog_operand
[i
], 0),
2572 &XEXP (recog_operand
[i
], 0),
2573 i
, address_type
[i
], ind_levels
, insn
);
2574 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2576 else if (code
== SUBREG
)
2577 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2578 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2581 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2582 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2583 /* We can get a PLUS as an "operand" as a result of register
2584 elimination. See eliminate_regs and gen_reload. We handle
2585 a unary operator by reloading the operand. */
2586 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2587 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2589 else if (code
== REG
)
2591 /* This is equivalent to calling find_reloads_toplev.
2592 The code is duplicated for speed.
2593 When we find a pseudo always equivalent to a constant,
2594 we replace it by the constant. We must be sure, however,
2595 that we don't try to replace it in the insn in which it
2597 register int regno
= REGNO (recog_operand
[i
]);
2598 if (reg_equiv_constant
[regno
] != 0
2599 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2600 substed_operand
[i
] = recog_operand
[i
]
2601 = reg_equiv_constant
[regno
];
2602 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2603 that feeds this insn. */
2604 if (reg_equiv_mem
[regno
] != 0)
2605 substed_operand
[i
] = recog_operand
[i
]
2606 = reg_equiv_mem
[regno
];
2608 if (reg_equiv_address
[regno
] != 0)
2610 /* If reg_equiv_address is not a constant address, copy it,
2611 since it may be shared. */
2612 /* We must rerun eliminate_regs, in case the elimination
2613 offsets have changed. */
2614 rtx address
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
],
2618 if (rtx_varies_p (address
))
2619 address
= copy_rtx (address
);
2621 /* If this is an output operand, we must output a CLOBBER
2622 after INSN so find_equiv_reg knows REGNO is being written.
2623 Mark this insn specially, do we can put our output reloads
2626 if (modified
[i
] != RELOAD_READ
)
2627 PUT_MODE (emit_insn_after (gen_rtx_CLOBBER (VOIDmode
,
2632 *recog_operand_loc
[i
] = recog_operand
[i
]
2633 = gen_rtx_MEM (GET_MODE (recog_operand
[i
]), address
);
2634 RTX_UNCHANGING_P (recog_operand
[i
])
2635 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2636 find_reloads_address (GET_MODE (recog_operand
[i
]),
2637 recog_operand_loc
[i
],
2638 XEXP (recog_operand
[i
], 0),
2639 &XEXP (recog_operand
[i
], 0),
2640 i
, address_type
[i
], ind_levels
, insn
);
2641 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2644 /* If the operand is still a register (we didn't replace it with an
2645 equivalent), get the preferred class to reload it into. */
2646 code
= GET_CODE (recog_operand
[i
]);
2648 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2649 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2651 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2652 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2656 /* If we made any reloads for addresses, see if they violate a
2657 "no input reloads" requirement for this insn. */
2658 if (no_input_reloads
)
2659 for (i
= 0; i
< n_reloads
; i
++)
2660 if (reload_in
[i
] != 0)
2664 /* If this is simply a copy from operand 1 to operand 0, merge the
2665 preferred classes for the operands. */
2666 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2667 && recog_operand
[1] == SET_SRC (set
))
2669 preferred_class
[0] = preferred_class
[1]
2670 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2671 pref_or_nothing
[0] |= pref_or_nothing
[1];
2672 pref_or_nothing
[1] |= pref_or_nothing
[0];
2675 /* Now see what we need for pseudo-regs that didn't get hard regs
2676 or got the wrong kind of hard reg. For this, we must consider
2677 all the operands together against the register constraints. */
2679 best
= MAX_RECOG_OPERANDS
+ 300;
2682 goal_alternative_swapped
= 0;
2685 /* The constraints are made of several alternatives.
2686 Each operand's constraint looks like foo,bar,... with commas
2687 separating the alternatives. The first alternatives for all
2688 operands go together, the second alternatives go together, etc.
2690 First loop over alternatives. */
2692 for (this_alternative_number
= 0;
2693 this_alternative_number
< n_alternatives
;
2694 this_alternative_number
++)
2696 /* Loop over operands for one constraint alternative. */
2697 /* LOSERS counts those that don't fit this alternative
2698 and would require loading. */
2700 /* BAD is set to 1 if it some operand can't fit this alternative
2701 even after reloading. */
2703 /* REJECT is a count of how undesirable this alternative says it is
2704 if any reloading is required. If the alternative matches exactly
2705 then REJECT is ignored, but otherwise it gets this much
2706 counted against it in addition to the reloading needed. Each
2707 ? counts three times here since we want the disparaging caused by
2708 a bad register class to only count 1/3 as much. */
2711 this_earlyclobber
= 0;
2713 for (i
= 0; i
< noperands
; i
++)
2715 register char *p
= constraints
[i
];
2716 register int win
= 0;
2717 /* 0 => this operand can be reloaded somehow for this alternative */
2719 /* 0 => this operand can be reloaded if the alternative allows regs. */
2722 register rtx operand
= recog_operand
[i
];
2724 /* Nonzero means this is a MEM that must be reloaded into a reg
2725 regardless of what the constraint says. */
2726 int force_reload
= 0;
2728 /* Nonzero if a constant forced into memory would be OK for this
2731 int earlyclobber
= 0;
2733 /* If the predicate accepts a unary operator, it means that
2734 we need to reload the operand. */
2735 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1')
2736 operand
= XEXP (operand
, 0);
2738 /* If the operand is a SUBREG, extract
2739 the REG or MEM (or maybe even a constant) within.
2740 (Constants can occur as a result of reg_equiv_constant.) */
2742 while (GET_CODE (operand
) == SUBREG
)
2744 offset
+= SUBREG_WORD (operand
);
2745 operand
= SUBREG_REG (operand
);
2746 /* Force reload if this is a constant or PLUS or if there may may
2747 be a problem accessing OPERAND in the outer mode. */
2748 if (CONSTANT_P (operand
)
2749 || GET_CODE (operand
) == PLUS
2750 /* We must force a reload of paradoxical SUBREGs
2751 of a MEM because the alignment of the inner value
2752 may not be enough to do the outer reference. On
2753 big-endian machines, it may also reference outside
2756 On machines that extend byte operations and we have a
2757 SUBREG where both the inner and outer modes are no wider
2758 than a word and the inner mode is narrower, is integral,
2759 and gets extended when loaded from memory, combine.c has
2760 made assumptions about the behavior of the machine in such
2761 register access. If the data is, in fact, in memory we
2762 must always load using the size assumed to be in the
2763 register and let the insn do the different-sized
2765 || ((GET_CODE (operand
) == MEM
2766 || (GET_CODE (operand
)== REG
2767 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2768 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2769 < BIGGEST_ALIGNMENT
)
2770 && (GET_MODE_SIZE (operand_mode
[i
])
2771 > GET_MODE_SIZE (GET_MODE (operand
))))
2772 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2773 #ifdef LOAD_EXTEND_OP
2774 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2775 && (GET_MODE_SIZE (GET_MODE (operand
))
2777 && (GET_MODE_SIZE (operand_mode
[i
])
2778 > GET_MODE_SIZE (GET_MODE (operand
)))
2779 && INTEGRAL_MODE_P (GET_MODE (operand
))
2780 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2783 /* Subreg of a hard reg which can't handle the subreg's mode
2784 or which would handle that mode in the wrong number of
2785 registers for subregging to work. */
2786 || (GET_CODE (operand
) == REG
2787 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2788 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2789 && (GET_MODE_SIZE (GET_MODE (operand
))
2791 && ((GET_MODE_SIZE (GET_MODE (operand
))
2793 != HARD_REGNO_NREGS (REGNO (operand
),
2794 GET_MODE (operand
))))
2795 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2800 this_alternative
[i
] = (int) NO_REGS
;
2801 this_alternative_win
[i
] = 0;
2802 this_alternative_offmemok
[i
] = 0;
2803 this_alternative_earlyclobber
[i
] = 0;
2804 this_alternative_matches
[i
] = -1;
2806 /* An empty constraint or empty alternative
2807 allows anything which matched the pattern. */
2808 if (*p
== 0 || *p
== ',')
2811 /* Scan this alternative's specs for this operand;
2812 set WIN if the operand fits any letter in this alternative.
2813 Otherwise, clear BADOP if this operand could
2814 fit some letter after reloads,
2815 or set WINREG if this operand could fit after reloads
2816 provided the constraint allows some registers. */
2818 while (*p
&& (c
= *p
++) != ',')
2821 case '=': case '+': case '*':
2825 /* The last operand should not be marked commutative. */
2826 if (i
!= noperands
- 1)
2839 /* Ignore rest of this alternative as far as
2840 reloading is concerned. */
2841 while (*p
&& *p
!= ',') p
++;
2844 case '0': case '1': case '2': case '3': case '4':
2845 case '5': case '6': case '7': case '8': case '9':
2848 this_alternative_matches
[i
] = c
;
2849 /* We are supposed to match a previous operand.
2850 If we do, we win if that one did.
2851 If we do not, count both of the operands as losers.
2852 (This is too conservative, since most of the time
2853 only a single reload insn will be needed to make
2854 the two operands win. As a result, this alternative
2855 may be rejected when it is actually desirable.) */
2856 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2857 /* If we are matching as if two operands were swapped,
2858 also pretend that operands_match had been computed
2860 But if I is the second of those and C is the first,
2861 don't exchange them, because operands_match is valid
2862 only on one side of its diagonal. */
2864 [(c
== commutative
|| c
== commutative
+ 1)
2865 ? 2*commutative
+ 1 - c
: c
]
2866 [(i
== commutative
|| i
== commutative
+ 1)
2867 ? 2*commutative
+ 1 - i
: i
])
2868 : operands_match
[c
][i
])
2870 /* If we are matching a non-offsettable address where an
2871 offsettable address was expected, then we must reject
2872 this combination, because we can't reload it. */
2873 if (this_alternative_offmemok
[c
]
2874 && GET_CODE (recog_operand
[c
]) == MEM
2875 && this_alternative
[c
] == (int) NO_REGS
2876 && ! this_alternative_win
[c
])
2879 win
= this_alternative_win
[c
];
2883 /* Operands don't match. */
2885 /* Retroactively mark the operand we had to match
2886 as a loser, if it wasn't already. */
2887 if (this_alternative_win
[c
])
2889 this_alternative_win
[c
] = 0;
2890 if (this_alternative
[c
] == (int) NO_REGS
)
2892 /* But count the pair only once in the total badness of
2893 this alternative, if the pair can be a dummy reload. */
2895 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2896 recog_operand_loc
[i
], recog_operand_loc
[c
],
2897 operand_mode
[i
], operand_mode
[c
],
2898 this_alternative
[c
], -1,
2899 this_alternative_earlyclobber
[c
]);
2904 /* This can be fixed with reloads if the operand
2905 we are supposed to match can be fixed with reloads. */
2907 this_alternative
[i
] = this_alternative
[c
];
2909 /* If we have to reload this operand and some previous
2910 operand also had to match the same thing as this
2911 operand, we don't know how to do that. So reject this
2913 if (! win
|| force_reload
)
2914 for (j
= 0; j
< i
; j
++)
2915 if (this_alternative_matches
[j
]
2916 == this_alternative_matches
[i
])
2922 /* All necessary reloads for an address_operand
2923 were handled in find_reloads_address. */
2924 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2931 if (GET_CODE (operand
) == MEM
2932 || (GET_CODE (operand
) == REG
2933 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2934 && reg_renumber
[REGNO (operand
)] < 0))
2936 if (CONSTANT_P (operand
))
2942 if (GET_CODE (operand
) == MEM
2943 && ! address_reloaded
[i
]
2944 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2945 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2950 if (GET_CODE (operand
) == MEM
2951 && ! address_reloaded
[i
]
2952 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2953 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2957 /* Memory operand whose address is not offsettable. */
2961 if (GET_CODE (operand
) == MEM
2962 && ! (ind_levels
? offsettable_memref_p (operand
)
2963 : offsettable_nonstrict_memref_p (operand
))
2964 /* Certain mem addresses will become offsettable
2965 after they themselves are reloaded. This is important;
2966 we don't want our own handling of unoffsettables
2967 to override the handling of reg_equiv_address. */
2968 && !(GET_CODE (XEXP (operand
, 0)) == REG
2970 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2974 /* Memory operand whose address is offsettable. */
2978 if ((GET_CODE (operand
) == MEM
2979 /* If IND_LEVELS, find_reloads_address won't reload a
2980 pseudo that didn't get a hard reg, so we have to
2981 reject that case. */
2982 && ((ind_levels
? offsettable_memref_p (operand
)
2983 : offsettable_nonstrict_memref_p (operand
))
2984 /* A reloaded address is offsettable because it is now
2985 just a simple register indirect. */
2986 || address_reloaded
[i
]))
2987 || (GET_CODE (operand
) == REG
2988 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2989 && reg_renumber
[REGNO (operand
)] < 0
2990 /* If reg_equiv_address is nonzero, we will be
2991 loading it into a register; hence it will be
2992 offsettable, but we cannot say that reg_equiv_mem
2993 is offsettable without checking. */
2994 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2995 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2996 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2998 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
3005 /* Output operand that is stored before the need for the
3006 input operands (and their index registers) is over. */
3007 earlyclobber
= 1, this_earlyclobber
= 1;
3011 #ifndef REAL_ARITHMETIC
3012 /* Match any floating double constant, but only if
3013 we can examine the bits of it reliably. */
3014 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3015 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3016 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3019 if (GET_CODE (operand
) == CONST_DOUBLE
)
3024 if (GET_CODE (operand
) == CONST_DOUBLE
)
3030 if (GET_CODE (operand
) == CONST_DOUBLE
3031 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3036 if (GET_CODE (operand
) == CONST_INT
3037 || (GET_CODE (operand
) == CONST_DOUBLE
3038 && GET_MODE (operand
) == VOIDmode
))
3041 if (CONSTANT_P (operand
)
3042 #ifdef LEGITIMATE_PIC_OPERAND_P
3043 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3050 if (GET_CODE (operand
) == CONST_INT
3051 || (GET_CODE (operand
) == CONST_DOUBLE
3052 && GET_MODE (operand
) == VOIDmode
))
3064 if (GET_CODE (operand
) == CONST_INT
3065 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3075 /* A PLUS is never a valid operand, but reload can make
3076 it from a register when eliminating registers. */
3077 && GET_CODE (operand
) != PLUS
3078 /* A SCRATCH is not a valid operand. */
3079 && GET_CODE (operand
) != SCRATCH
3080 #ifdef LEGITIMATE_PIC_OPERAND_P
3081 && (! CONSTANT_P (operand
)
3083 || LEGITIMATE_PIC_OPERAND_P (operand
))
3085 && (GENERAL_REGS
== ALL_REGS
3086 || GET_CODE (operand
) != REG
3087 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3088 && reg_renumber
[REGNO (operand
)] < 0)))
3090 /* Drop through into 'r' case */
3094 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3097 #ifdef EXTRA_CONSTRAINT
3103 if (EXTRA_CONSTRAINT (operand
, c
))
3110 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3113 if (GET_MODE (operand
) == BLKmode
)
3116 if (GET_CODE (operand
) == REG
3117 && reg_fits_class_p (operand
, this_alternative
[i
],
3118 offset
, GET_MODE (recog_operand
[i
])))
3125 /* If this operand could be handled with a reg,
3126 and some reg is allowed, then this operand can be handled. */
3127 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3130 /* Record which operands fit this alternative. */
3131 this_alternative_earlyclobber
[i
] = earlyclobber
;
3132 if (win
&& ! force_reload
)
3133 this_alternative_win
[i
] = 1;
3136 int const_to_mem
= 0;
3138 this_alternative_offmemok
[i
] = offmemok
;
3142 /* Alternative loses if it has no regs for a reg operand. */
3143 if (GET_CODE (operand
) == REG
3144 && this_alternative
[i
] == (int) NO_REGS
3145 && this_alternative_matches
[i
] < 0)
3148 /* If this is a pseudo-register that is set in the previous
3149 insns, there's a good chance that it will already be in a
3150 spill register and we can use that spill register. So
3151 make this case cheaper. */
3152 if (GET_CODE (operand
) == REG
3153 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3154 && REGNO (operand
) == previous_last_output_reload_regno
)
3157 /* If this is a constant that is reloaded into the desired
3158 class by copying it to memory first, count that as another
3159 reload. This is consistent with other code and is
3160 required to avoid choosing another alternative when
3161 the constant is moved into memory by this function on
3162 an early reload pass. Note that the test here is
3163 precisely the same as in the code below that calls
3165 if (CONSTANT_P (operand
)
3166 /* force_const_mem does not accept HIGH. */
3167 && GET_CODE (operand
) != HIGH
3168 && ((PREFERRED_RELOAD_CLASS (operand
,
3169 (enum reg_class
) this_alternative
[i
])
3171 || no_input_reloads
)
3172 && operand_mode
[i
] != VOIDmode
)
3175 if (this_alternative
[i
] != (int) NO_REGS
)
3179 /* If we can't reload this value at all, reject this
3180 alternative. Note that we could also lose due to
3181 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3184 if (! CONSTANT_P (operand
)
3185 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3186 && (PREFERRED_RELOAD_CLASS (operand
,
3187 (enum reg_class
) this_alternative
[i
])
3191 /* Alternative loses if it requires a type of reload not
3192 permitted for this insn. We can always reload SCRATCH
3193 and objects with a REG_UNUSED note. */
3194 else if (GET_CODE (operand
) != SCRATCH
3195 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3196 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3198 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3203 /* We prefer to reload pseudos over reloading other things,
3204 since such reloads may be able to be eliminated later.
3205 If we are reloading a SCRATCH, we won't be generating any
3206 insns, just using a register, so it is also preferred.
3207 So bump REJECT in other cases. Don't do this in the
3208 case where we are forcing a constant into memory and
3209 it will then win since we don't want to have a different
3210 alternative match then. */
3211 if (! (GET_CODE (operand
) == REG
3212 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3213 && GET_CODE (operand
) != SCRATCH
3214 && ! (const_to_mem
&& constmemok
))
3218 /* If this operand is a pseudo register that didn't get a hard
3219 reg and this alternative accepts some register, see if the
3220 class that we want is a subset of the preferred class for this
3221 register. If not, but it intersects that class, use the
3222 preferred class instead. If it does not intersect the preferred
3223 class, show that usage of this alternative should be discouraged;
3224 it will be discouraged more still if the register is `preferred
3225 or nothing'. We do this because it increases the chance of
3226 reusing our spill register in a later insn and avoiding a pair
3227 of memory stores and loads.
3229 Don't bother with this if this alternative will accept this
3232 Don't do this for a multiword operand, since it is only a
3233 small win and has the risk of requiring more spill registers,
3234 which could cause a large loss.
3236 Don't do this if the preferred class has only one register
3237 because we might otherwise exhaust the class. */
3240 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3241 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3242 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3244 if (! reg_class_subset_p (this_alternative
[i
],
3245 preferred_class
[i
]))
3247 /* Since we don't have a way of forming the intersection,
3248 we just do something special if the preferred class
3249 is a subset of the class we have; that's the most
3250 common case anyway. */
3251 if (reg_class_subset_p (preferred_class
[i
],
3252 this_alternative
[i
]))
3253 this_alternative
[i
] = (int) preferred_class
[i
];
3255 reject
+= (1 + pref_or_nothing
[i
]);
3260 /* Now see if any output operands that are marked "earlyclobber"
3261 in this alternative conflict with any input operands
3262 or any memory addresses. */
3264 for (i
= 0; i
< noperands
; i
++)
3265 if (this_alternative_earlyclobber
[i
]
3266 && this_alternative_win
[i
])
3268 struct decomposition early_data
;
3270 early_data
= decompose (recog_operand
[i
]);
3272 if (modified
[i
] == RELOAD_READ
)
3274 if (this_insn_is_asm
)
3275 warning_for_asm (this_insn
,
3276 "`&' constraint used with input operand");
3282 if (this_alternative
[i
] == NO_REGS
)
3284 this_alternative_earlyclobber
[i
] = 0;
3285 if (this_insn_is_asm
)
3286 error_for_asm (this_insn
,
3287 "`&' constraint used with no register class");
3292 for (j
= 0; j
< noperands
; j
++)
3293 /* Is this an input operand or a memory ref? */
3294 if ((GET_CODE (recog_operand
[j
]) == MEM
3295 || modified
[j
] != RELOAD_WRITE
)
3297 /* Ignore things like match_operator operands. */
3298 && *constraints1
[j
] != 0
3299 /* Don't count an input operand that is constrained to match
3300 the early clobber operand. */
3301 && ! (this_alternative_matches
[j
] == i
3302 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3303 /* Is it altered by storing the earlyclobber operand? */
3304 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3306 /* If the output is in a single-reg class,
3307 it's costly to reload it, so reload the input instead. */
3308 if (reg_class_size
[this_alternative
[i
]] == 1
3309 && (GET_CODE (recog_operand
[j
]) == REG
3310 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3313 this_alternative_win
[j
] = 0;
3318 /* If an earlyclobber operand conflicts with something,
3319 it must be reloaded, so request this and count the cost. */
3323 this_alternative_win
[i
] = 0;
3324 for (j
= 0; j
< noperands
; j
++)
3325 if (this_alternative_matches
[j
] == i
3326 && this_alternative_win
[j
])
3328 this_alternative_win
[j
] = 0;
3334 /* If one alternative accepts all the operands, no reload required,
3335 choose that alternative; don't consider the remaining ones. */
3338 /* Unswap these so that they are never swapped at `finish'. */
3339 if (commutative
>= 0)
3341 recog_operand
[commutative
] = substed_operand
[commutative
];
3342 recog_operand
[commutative
+ 1]
3343 = substed_operand
[commutative
+ 1];
3345 for (i
= 0; i
< noperands
; i
++)
3347 goal_alternative_win
[i
] = 1;
3348 goal_alternative
[i
] = this_alternative
[i
];
3349 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3350 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3351 goal_alternative_earlyclobber
[i
]
3352 = this_alternative_earlyclobber
[i
];
3354 goal_alternative_number
= this_alternative_number
;
3355 goal_alternative_swapped
= swapped
;
3356 goal_earlyclobber
= this_earlyclobber
;
3360 /* REJECT, set by the ! and ? constraint characters and when a register
3361 would be reloaded into a non-preferred class, discourages the use of
3362 this alternative for a reload goal. REJECT is incremented by three
3363 for each ? and one for each non-preferred class. */
3364 losers
= losers
* 3 + reject
;
3366 /* If this alternative can be made to work by reloading,
3367 and it needs less reloading than the others checked so far,
3368 record it as the chosen goal for reloading. */
3369 if (! bad
&& best
> losers
)
3371 for (i
= 0; i
< noperands
; i
++)
3373 goal_alternative
[i
] = this_alternative
[i
];
3374 goal_alternative_win
[i
] = this_alternative_win
[i
];
3375 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3376 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3377 goal_alternative_earlyclobber
[i
]
3378 = this_alternative_earlyclobber
[i
];
3380 goal_alternative_swapped
= swapped
;
3382 goal_alternative_number
= this_alternative_number
;
3383 goal_earlyclobber
= this_earlyclobber
;
3387 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3388 then we need to try each alternative twice,
3389 the second time matching those two operands
3390 as if we had exchanged them.
3391 To do this, really exchange them in operands.
3393 If we have just tried the alternatives the second time,
3394 return operands to normal and drop through. */
3396 if (commutative
>= 0)
3401 register enum reg_class tclass
;
3404 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3405 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3407 tclass
= preferred_class
[commutative
];
3408 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3409 preferred_class
[commutative
+ 1] = tclass
;
3411 t
= pref_or_nothing
[commutative
];
3412 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3413 pref_or_nothing
[commutative
+ 1] = t
;
3415 bcopy ((char *) constraints1
, (char *) constraints
,
3416 noperands
* sizeof (char *));
3421 recog_operand
[commutative
] = substed_operand
[commutative
];
3422 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3426 /* The operands don't meet the constraints.
3427 goal_alternative describes the alternative
3428 that we could reach by reloading the fewest operands.
3429 Reload so as to fit it. */
3431 if (best
== MAX_RECOG_OPERANDS
+ 300)
3433 /* No alternative works with reloads?? */
3434 if (insn_code_number
>= 0)
3436 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3437 /* Avoid further trouble with this insn. */
3438 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3443 /* Jump to `finish' from above if all operands are valid already.
3444 In that case, goal_alternative_win is all 1. */
3447 /* Right now, for any pair of operands I and J that are required to match,
3449 goal_alternative_matches[J] is I.
3450 Set up goal_alternative_matched as the inverse function:
3451 goal_alternative_matched[I] = J. */
3453 for (i
= 0; i
< noperands
; i
++)
3454 goal_alternative_matched
[i
] = -1;
3456 for (i
= 0; i
< noperands
; i
++)
3457 if (! goal_alternative_win
[i
]
3458 && goal_alternative_matches
[i
] >= 0)
3459 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3461 /* If the best alternative is with operands 1 and 2 swapped,
3462 consider them swapped before reporting the reloads. Update the
3463 operand numbers of any reloads already pushed. */
3465 if (goal_alternative_swapped
)
3469 tem
= substed_operand
[commutative
];
3470 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3471 substed_operand
[commutative
+ 1] = tem
;
3472 tem
= recog_operand
[commutative
];
3473 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3474 recog_operand
[commutative
+ 1] = tem
;
3476 for (i
= 0; i
< n_reloads
; i
++)
3478 if (reload_opnum
[i
] == commutative
)
3479 reload_opnum
[i
] = commutative
+ 1;
3480 else if (reload_opnum
[i
] == commutative
+ 1)
3481 reload_opnum
[i
] = commutative
;
3485 /* Perform whatever substitutions on the operands we are supposed
3486 to make due to commutativity or replacement of registers
3487 with equivalent constants or memory slots. */
3489 for (i
= 0; i
< noperands
; i
++)
3491 *recog_operand_loc
[i
] = substed_operand
[i
];
3492 /* While we are looping on operands, initialize this. */
3493 operand_reloadnum
[i
] = -1;
3495 /* If this is an earlyclobber operand, we need to widen the scope.
3496 The reload must remain valid from the start of the insn being
3497 reloaded until after the operand is stored into its destination.
3498 We approximate this with RELOAD_OTHER even though we know that we
3499 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3501 One special case that is worth checking is when we have an
3502 output that is earlyclobber but isn't used past the insn (typically
3503 a SCRATCH). In this case, we only need have the reload live
3504 through the insn itself, but not for any of our input or output
3507 In any case, anything needed to address this operand can remain
3508 however they were previously categorized. */
3510 if (goal_alternative_earlyclobber
[i
])
3512 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3513 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3516 /* Any constants that aren't allowed and can't be reloaded
3517 into registers are here changed into memory references. */
3518 for (i
= 0; i
< noperands
; i
++)
3519 if (! goal_alternative_win
[i
]
3520 && CONSTANT_P (recog_operand
[i
])
3521 /* force_const_mem does not accept HIGH. */
3522 && GET_CODE (recog_operand
[i
]) != HIGH
3523 && ((PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3524 (enum reg_class
) goal_alternative
[i
])
3526 || no_input_reloads
)
3527 && operand_mode
[i
] != VOIDmode
)
3529 *recog_operand_loc
[i
] = recog_operand
[i
]
3530 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3532 i
, address_type
[i
], ind_levels
, 0);
3533 if (alternative_allows_memconst (constraints1
[i
],
3534 goal_alternative_number
))
3535 goal_alternative_win
[i
] = 1;
3538 /* Record the values of the earlyclobber operands for the caller. */
3539 if (goal_earlyclobber
)
3540 for (i
= 0; i
< noperands
; i
++)
3541 if (goal_alternative_earlyclobber
[i
])
3542 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3544 /* Now record reloads for all the operands that need them. */
3545 for (i
= 0; i
< noperands
; i
++)
3546 if (! goal_alternative_win
[i
])
3548 /* Operands that match previous ones have already been handled. */
3549 if (goal_alternative_matches
[i
] >= 0)
3551 /* Handle an operand with a nonoffsettable address
3552 appearing where an offsettable address will do
3553 by reloading the address into a base register.
3555 ??? We can also do this when the operand is a register and
3556 reg_equiv_mem is not offsettable, but this is a bit tricky,
3557 so we don't bother with it. It may not be worth doing. */
3558 else if (goal_alternative_matched
[i
] == -1
3559 && goal_alternative_offmemok
[i
]
3560 && GET_CODE (recog_operand
[i
]) == MEM
)
3562 operand_reloadnum
[i
]
3563 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3564 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3565 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3566 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3567 reload_inc
[operand_reloadnum
[i
]]
3568 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3570 /* If this operand is an output, we will have made any
3571 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3572 now we are treating part of the operand as an input, so
3573 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3575 if (modified
[i
] == RELOAD_WRITE
)
3577 for (j
= 0; j
< n_reloads
; j
++)
3579 if (reload_opnum
[j
] == i
)
3581 if (reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3582 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3583 else if (reload_when_needed
[j
]
3584 == RELOAD_FOR_OUTADDR_ADDRESS
)
3585 reload_when_needed
[j
] = RELOAD_FOR_INPADDR_ADDRESS
;
3590 else if (goal_alternative_matched
[i
] == -1)
3592 operand_reloadnum
[i
]
3593 = push_reload ((modified
[i
] != RELOAD_WRITE
3594 ? recog_operand
[i
] : 0),
3595 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3596 (modified
[i
] != RELOAD_WRITE
3597 ? recog_operand_loc
[i
] : 0),
3598 (modified
[i
] != RELOAD_READ
3599 ? recog_operand_loc
[i
] : 0),
3600 (enum reg_class
) goal_alternative
[i
],
3601 (modified
[i
] == RELOAD_WRITE
3602 ? VOIDmode
: operand_mode
[i
]),
3603 (modified
[i
] == RELOAD_READ
3604 ? VOIDmode
: operand_mode
[i
]),
3605 (insn_code_number
< 0 ? 0
3606 : insn_operand_strict_low
[insn_code_number
][i
]),
3607 0, i
, operand_type
[i
]);
3608 if (modified
[i
] != RELOAD_READ
3609 && GET_CODE (recog_operand
[i
]) == REG
)
3610 previous_last_output_reload_regno
= REGNO (recog_operand
[i
]);
3612 /* In a matching pair of operands, one must be input only
3613 and the other must be output only.
3614 Pass the input operand as IN and the other as OUT. */
3615 else if (modified
[i
] == RELOAD_READ
3616 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3618 operand_reloadnum
[i
]
3619 = push_reload (recog_operand
[i
],
3620 recog_operand
[goal_alternative_matched
[i
]],
3621 recog_operand_loc
[i
],
3622 recog_operand_loc
[goal_alternative_matched
[i
]],
3623 (enum reg_class
) goal_alternative
[i
],
3625 operand_mode
[goal_alternative_matched
[i
]],
3626 0, 0, i
, RELOAD_OTHER
);
3627 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3628 if (GET_CODE (recog_operand
[goal_alternative_matched
[i
]]) == REG
)
3629 previous_last_output_reload_regno
3630 = REGNO (recog_operand
[goal_alternative_matched
[i
]]);
3632 else if (modified
[i
] == RELOAD_WRITE
3633 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3635 operand_reloadnum
[goal_alternative_matched
[i
]]
3636 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3638 recog_operand_loc
[goal_alternative_matched
[i
]],
3639 recog_operand_loc
[i
],
3640 (enum reg_class
) goal_alternative
[i
],
3641 operand_mode
[goal_alternative_matched
[i
]],
3643 0, 0, i
, RELOAD_OTHER
);
3644 operand_reloadnum
[i
] = output_reloadnum
;
3645 if (GET_CODE (recog_operand
[i
]) == REG
)
3646 previous_last_output_reload_regno
= REGNO (recog_operand
[i
]);
3648 else if (insn_code_number
>= 0)
3652 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3653 /* Avoid further trouble with this insn. */
3654 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3659 else if (goal_alternative_matched
[i
] < 0
3660 && goal_alternative_matches
[i
] < 0
3663 /* For each non-matching operand that's a MEM or a pseudo-register
3664 that didn't get a hard register, make an optional reload.
3665 This may get done even if the insn needs no reloads otherwise. */
3667 rtx operand
= recog_operand
[i
];
3669 while (GET_CODE (operand
) == SUBREG
)
3670 operand
= XEXP (operand
, 0);
3671 if ((GET_CODE (operand
) == MEM
3672 || (GET_CODE (operand
) == REG
3673 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3674 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3675 && ! no_input_reloads
3676 /* Optional output reloads don't do anything and we mustn't
3677 make in-out reloads on insns that are not permitted output
3679 && (modified
[i
] == RELOAD_READ
3680 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3681 operand_reloadnum
[i
]
3682 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3683 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3684 (modified
[i
] != RELOAD_WRITE
3685 ? recog_operand_loc
[i
] : 0),
3686 (modified
[i
] != RELOAD_READ
3687 ? recog_operand_loc
[i
] : 0),
3688 (enum reg_class
) goal_alternative
[i
],
3689 (modified
[i
] == RELOAD_WRITE
3690 ? VOIDmode
: operand_mode
[i
]),
3691 (modified
[i
] == RELOAD_READ
3692 ? VOIDmode
: operand_mode
[i
]),
3693 (insn_code_number
< 0 ? 0
3694 : insn_operand_strict_low
[insn_code_number
][i
]),
3695 1, i
, operand_type
[i
]);
3697 else if (goal_alternative_matches
[i
] >= 0
3698 && goal_alternative_win
[goal_alternative_matches
[i
]]
3699 && modified
[i
] == RELOAD_READ
3700 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3701 && ! no_input_reloads
&& ! no_output_reloads
3704 /* Similarly, make an optional reload for a pair of matching
3705 objects that are in MEM or a pseudo that didn't get a hard reg. */
3707 rtx operand
= recog_operand
[i
];
3709 while (GET_CODE (operand
) == SUBREG
)
3710 operand
= XEXP (operand
, 0);
3711 if ((GET_CODE (operand
) == MEM
3712 || (GET_CODE (operand
) == REG
3713 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3714 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3716 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3717 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3719 recog_operand_loc
[goal_alternative_matches
[i
]],
3720 recog_operand_loc
[i
],
3721 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3722 operand_mode
[goal_alternative_matches
[i
]],
3724 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3727 /* If this insn pattern contains any MATCH_DUP's, make sure that
3728 they will be substituted if the operands they match are substituted.
3729 Also do now any substitutions we already did on the operands.
3731 Don't do this if we aren't making replacements because we might be
3732 propagating things allocated by frame pointer elimination into places
3733 it doesn't expect. */
3735 if (insn_code_number
>= 0 && replace
)
3736 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3738 int opno
= recog_dup_num
[i
];
3739 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3740 if (operand_reloadnum
[opno
] >= 0)
3741 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3742 insn_operand_mode
[insn_code_number
][opno
]);
3746 /* This loses because reloading of prior insns can invalidate the equivalence
3747 (or at least find_equiv_reg isn't smart enough to find it any more),
3748 causing this insn to need more reload regs than it needed before.
3749 It may be too late to make the reload regs available.
3750 Now this optimization is done safely in choose_reload_regs. */
3752 /* For each reload of a reg into some other class of reg,
3753 search for an existing equivalent reg (same value now) in the right class.
3754 We can use it as long as we don't need to change its contents. */
3755 for (i
= 0; i
< n_reloads
; i
++)
3756 if (reload_reg_rtx
[i
] == 0
3757 && reload_in
[i
] != 0
3758 && GET_CODE (reload_in
[i
]) == REG
3759 && reload_out
[i
] == 0)
3762 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3763 static_reload_reg_p
, 0, reload_inmode
[i
]);
3764 /* Prevent generation of insn to load the value
3765 because the one we found already has the value. */
3766 if (reload_reg_rtx
[i
])
3767 reload_in
[i
] = reload_reg_rtx
[i
];
3771 /* Perhaps an output reload can be combined with another
3772 to reduce needs by one. */
3773 if (!goal_earlyclobber
)
3776 /* If we have a pair of reloads for parts of an address, they are reloading
3777 the same object, the operands themselves were not reloaded, and they
3778 are for two operands that are supposed to match, merge the reloads and
3779 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3781 for (i
= 0; i
< n_reloads
; i
++)
3785 for (j
= i
+ 1; j
< n_reloads
; j
++)
3786 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3787 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3788 || reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
3789 || reload_when_needed
[i
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3790 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3791 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
3792 || reload_when_needed
[j
] == RELOAD_FOR_INPADDR_ADDRESS
3793 || reload_when_needed
[j
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3794 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3795 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3796 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3797 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3798 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3799 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3800 || (goal_alternative_matches
[reload_opnum
[j
]]
3801 == reload_opnum
[i
])))
3803 for (k
= 0; k
< n_replacements
; k
++)
3804 if (replacements
[k
].what
== j
)
3805 replacements
[k
].what
= i
;
3807 if (reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
3808 || reload_when_needed
[i
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3809 reload_when_needed
[i
] = RELOAD_FOR_OPADDR_ADDR
;
3811 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3816 /* Scan all the reloads and update their type.
3817 If a reload is for the address of an operand and we didn't reload
3818 that operand, change the type. Similarly, change the operand number
3819 of a reload when two operands match. If a reload is optional, treat it
3820 as though the operand isn't reloaded.
3822 ??? This latter case is somewhat odd because if we do the optional
3823 reload, it means the object is hanging around. Thus we need only
3824 do the address reload if the optional reload was NOT done.
3826 Change secondary reloads to be the address type of their operand, not
3829 If an operand's reload is now RELOAD_OTHER, change any
3830 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3831 RELOAD_FOR_OTHER_ADDRESS. */
3833 for (i
= 0; i
< n_reloads
; i
++)
3835 if (reload_secondary_p
[i
]
3836 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3837 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3839 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3840 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3841 || reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
3842 || reload_when_needed
[i
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3843 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3844 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3846 /* If we have a secondary reload to go along with this reload,
3847 change its type to RELOAD_FOR_OPADDR_ADDR. */
3849 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3850 || reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
)
3851 && reload_secondary_in_reload
[i
] != -1)
3853 int secondary_in_reload
= reload_secondary_in_reload
[i
];
3855 reload_when_needed
[secondary_in_reload
]
3856 = RELOAD_FOR_OPADDR_ADDR
;
3858 /* If there's a tertiary reload we have to change it also. */
3859 if (secondary_in_reload
> 0
3860 && reload_secondary_in_reload
[secondary_in_reload
] != -1)
3861 reload_when_needed
[reload_secondary_in_reload
[secondary_in_reload
]]
3862 = RELOAD_FOR_OPADDR_ADDR
;
3865 if ((reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3866 || reload_when_needed
[i
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3867 && reload_secondary_out_reload
[i
] != -1)
3869 int secondary_out_reload
= reload_secondary_out_reload
[i
];
3871 reload_when_needed
[secondary_out_reload
]
3872 = RELOAD_FOR_OPADDR_ADDR
;
3874 /* If there's a tertiary reload we have to change it also. */
3875 if (secondary_out_reload
3876 && reload_secondary_out_reload
[secondary_out_reload
] != -1)
3877 reload_when_needed
[reload_secondary_out_reload
[secondary_out_reload
]]
3878 = RELOAD_FOR_OPADDR_ADDR
;
3881 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3884 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3885 || reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
)
3886 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3887 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3889 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3891 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3892 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3895 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3896 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3897 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3899 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3900 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3901 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3902 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3903 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3904 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3905 This is complicated by the fact that a single operand can have more
3906 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3907 choose_reload_regs without affecting code quality, and cases that
3908 actually fail are extremely rare, so it turns out to be better to fix
3909 the problem here by not generating cases that choose_reload_regs will
3913 int op_addr_reloads
= 0;
3914 for (i
= 0; i
< n_reloads
; i
++)
3915 if (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
)
3918 if (op_addr_reloads
> 1)
3919 for (i
= 0; i
< n_reloads
; i
++)
3920 if (reload_when_needed
[i
] == RELOAD_FOR_OPADDR_ADDR
)
3921 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3924 /* See if we have any reloads that are now allowed to be merged
3925 because we've changed when the reload is needed to
3926 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3927 check for the most common cases. */
3929 for (i
= 0; i
< n_reloads
; i
++)
3930 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3931 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3932 || reload_when_needed
[i
] == RELOAD_FOR_OPADDR_ADDR
3933 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3934 for (j
= 0; j
< n_reloads
; j
++)
3935 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3936 && reload_when_needed
[j
] == reload_when_needed
[i
]
3937 && MATCHES (reload_in
[i
], reload_in
[j
])
3938 && reload_reg_class
[i
] == reload_reg_class
[j
]
3939 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3940 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3942 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3943 transfer_replacements (i
, j
);
3947 /* Set which reloads must use registers not used in any group. Start
3948 with those that conflict with a group and then include ones that
3949 conflict with ones that are already known to conflict with a group. */
3952 for (i
= 0; i
< n_reloads
; i
++)
3954 enum machine_mode mode
= reload_inmode
[i
];
3955 enum reg_class
class = reload_reg_class
[i
];
3958 if (GET_MODE_SIZE (reload_outmode
[i
]) > GET_MODE_SIZE (mode
))
3959 mode
= reload_outmode
[i
];
3960 size
= CLASS_MAX_NREGS (class, mode
);
3963 for (j
= 0; j
< n_reloads
; j
++)
3964 if ((CLASS_MAX_NREGS (reload_reg_class
[j
],
3965 (GET_MODE_SIZE (reload_outmode
[j
])
3966 > GET_MODE_SIZE (reload_inmode
[j
]))
3967 ? reload_outmode
[j
] : reload_inmode
[j
])
3969 && !reload_optional
[j
]
3970 && (reload_in
[j
] != 0 || reload_out
[j
] != 0
3971 || reload_secondary_p
[j
])
3972 && reloads_conflict (i
, j
)
3973 && reg_classes_intersect_p (class, reload_reg_class
[j
]))
3975 reload_nongroup
[i
] = 1;
3985 for (i
= 0; i
< n_reloads
; i
++)
3987 enum machine_mode mode
= reload_inmode
[i
];
3988 enum reg_class
class = reload_reg_class
[i
];
3991 if (GET_MODE_SIZE (reload_outmode
[i
]) > GET_MODE_SIZE (mode
))
3992 mode
= reload_outmode
[i
];
3993 size
= CLASS_MAX_NREGS (class, mode
);
3995 if (! reload_nongroup
[i
] && size
== 1)
3996 for (j
= 0; j
< n_reloads
; j
++)
3997 if (reload_nongroup
[j
]
3998 && reloads_conflict (i
, j
)
3999 && reg_classes_intersect_p (class, reload_reg_class
[j
]))
4001 reload_nongroup
[i
] = 1;
4008 #else /* no REGISTER_CONSTRAINTS */
4010 int insn_code_number
;
4011 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
4013 rtx body
= PATTERN (insn
);
4017 n_earlyclobbers
= 0;
4018 replace_reloads
= replace
;
4021 /* Find what kind of insn this is. NOPERANDS gets number of operands.
4022 Store the operand values in RECOG_OPERAND and the locations
4023 of the words in the insn that point to them in RECOG_OPERAND_LOC.
4024 Return if the insn needs no reload processing. */
4026 switch (GET_CODE (body
))
4037 noperands
= asm_noperands (body
);
4040 /* This insn is an `asm' with operands.
4041 First, find out how many operands, and allocate space. */
4043 insn_code_number
= -1;
4044 /* ??? This is a bug! ???
4045 Give up and delete this insn if it has too many operands. */
4046 if (noperands
> MAX_RECOG_OPERANDS
)
4049 /* Now get the operand values out of the insn. */
4051 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
4052 NULL_PTR
, NULL_PTR
);
4057 /* Ordinary insn: recognize it, allocate space for operands and
4058 constraints, and get them out via insn_extract. */
4060 insn_code_number
= recog_memoized (insn
);
4061 noperands
= insn_n_operands
[insn_code_number
];
4062 insn_extract (insn
);
4068 for (i
= 0; i
< noperands
; i
++)
4070 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
4071 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
4073 if (insn_code_number
>= 0)
4074 if (insn_operand_address_p
[insn_code_number
][i
])
4075 find_reloads_address (VOIDmode
, NULL_PTR
,
4076 recog_operand
[i
], recog_operand_loc
[i
],
4077 i
, RELOAD_FOR_INPUT
, ind_levels
, insn
);
4079 /* In these cases, we can't tell if the operand is an input
4080 or an output, so be conservative. In practice it won't be
4084 find_reloads_address (GET_MODE (recog_operand
[i
]),
4085 recog_operand_loc
[i
],
4086 XEXP (recog_operand
[i
], 0),
4087 &XEXP (recog_operand
[i
], 0),
4088 i
, RELOAD_OTHER
, ind_levels
, insn
);
4090 recog_operand
[i
] = *recog_operand_loc
[i
]
4091 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
4092 ind_levels
, is_set_dest
);
4095 register int regno
= REGNO (recog_operand
[i
]);
4096 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4097 recog_operand
[i
] = *recog_operand_loc
[i
]
4098 = reg_equiv_constant
[regno
];
4099 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4100 that feeds this insn. */
4101 if (reg_equiv_mem
[regno
] != 0)
4102 recog_operand
[i
] = *recog_operand_loc
[i
]
4103 = reg_equiv_mem
[regno
];
4108 /* Perhaps an output reload can be combined with another
4109 to reduce needs by one. */
4110 if (!goal_earlyclobber
)
4112 #endif /* no REGISTER_CONSTRAINTS */
4115 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4116 accepts a memory operand with constant address. */
4119 alternative_allows_memconst (constraint
, altnum
)
4124 /* Skip alternatives before the one requested. */
4127 while (*constraint
++ != ',');
4130 /* Scan the requested alternative for 'm' or 'o'.
4131 If one of them is present, this alternative accepts memory constants. */
4132 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4133 if (c
== 'm' || c
== 'o')
4138 /* Scan X for memory references and scan the addresses for reloading.
4139 Also checks for references to "constant" regs that we want to eliminate
4140 and replaces them with the values they stand for.
4141 We may alter X destructively if it contains a reference to such.
4142 If X is just a constant reg, we return the equivalent value
4145 IND_LEVELS says how many levels of indirect addressing this machine
4148 OPNUM and TYPE identify the purpose of the reload.
4150 IS_SET_DEST is true if X is the destination of a SET, which is not
4151 appropriate to be replaced by a constant. */
4154 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
4157 enum reload_type type
;
4161 register RTX_CODE code
= GET_CODE (x
);
4163 register char *fmt
= GET_RTX_FORMAT (code
);
4168 /* This code is duplicated for speed in find_reloads. */
4169 register int regno
= REGNO (x
);
4170 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4171 x
= reg_equiv_constant
[regno
];
4173 /* This creates (subreg (mem...)) which would cause an unnecessary
4174 reload of the mem. */
4175 else if (reg_equiv_mem
[regno
] != 0)
4176 x
= reg_equiv_mem
[regno
];
4178 else if (reg_equiv_address
[regno
] != 0)
4180 /* If reg_equiv_address varies, it may be shared, so copy it. */
4181 /* We must rerun eliminate_regs, in case the elimination
4182 offsets have changed. */
4183 rtx addr
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0,
4187 if (rtx_varies_p (addr
))
4188 addr
= copy_rtx (addr
);
4190 x
= gen_rtx_MEM (GET_MODE (x
), addr
);
4191 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4192 find_reloads_address (GET_MODE (x
), NULL_PTR
,
4194 &XEXP (x
, 0), opnum
, type
, ind_levels
, 0);
4201 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4202 opnum
, type
, ind_levels
, 0);
4206 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4208 /* Check for SUBREG containing a REG that's equivalent to a constant.
4209 If the constant has a known value, truncate it right now.
4210 Similarly if we are extracting a single-word of a multi-word
4211 constant. If the constant is symbolic, allow it to be substituted
4212 normally. push_reload will strip the subreg later. If the
4213 constant is VOIDmode, abort because we will lose the mode of
4214 the register (this should never happen because one of the cases
4215 above should handle it). */
4217 register int regno
= REGNO (SUBREG_REG (x
));
4220 if (subreg_lowpart_p (x
)
4221 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4222 && reg_equiv_constant
[regno
] != 0
4223 && (tem
= gen_lowpart_common (GET_MODE (x
),
4224 reg_equiv_constant
[regno
])) != 0)
4227 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4228 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4229 && reg_equiv_constant
[regno
] != 0
4230 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4232 GET_MODE (SUBREG_REG (x
)))) != 0)
4235 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4236 && reg_equiv_constant
[regno
] != 0
4237 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4240 /* If the subreg contains a reg that will be converted to a mem,
4241 convert the subreg to a narrower memref now.
4242 Otherwise, we would get (subreg (mem ...) ...),
4243 which would force reload of the mem.
4245 We also need to do this if there is an equivalent MEM that is
4246 not offsettable. In that case, alter_subreg would produce an
4247 invalid address on big-endian machines.
4249 For machines that extend byte loads, we must not reload using
4250 a wider mode if we have a paradoxical SUBREG. find_reloads will
4251 force a reload in that case. So we should not do anything here. */
4253 else if (regno
>= FIRST_PSEUDO_REGISTER
4254 #ifdef LOAD_EXTEND_OP
4255 && (GET_MODE_SIZE (GET_MODE (x
))
4256 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4258 && (reg_equiv_address
[regno
] != 0
4259 || (reg_equiv_mem
[regno
] != 0
4260 && (! strict_memory_address_p (GET_MODE (x
),
4261 XEXP (reg_equiv_mem
[regno
], 0))
4262 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
4264 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
4265 /* We must rerun eliminate_regs, in case the elimination
4266 offsets have changed. */
4267 rtx addr
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0,
4270 if (BYTES_BIG_ENDIAN
)
4273 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
4274 offset
+= MIN (size
, UNITS_PER_WORD
);
4275 size
= GET_MODE_SIZE (GET_MODE (x
));
4276 offset
-= MIN (size
, UNITS_PER_WORD
);
4278 addr
= plus_constant (addr
, offset
);
4279 x
= gen_rtx_MEM (GET_MODE (x
), addr
);
4280 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4281 find_reloads_address (GET_MODE (x
), NULL_PTR
,
4283 &XEXP (x
, 0), opnum
, type
, ind_levels
, 0);
4288 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4291 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4292 ind_levels
, is_set_dest
);
4297 /* Return a mem ref for the memory equivalent of reg REGNO.
4298 This mem ref is not shared with anything. */
4301 make_memloc (ad
, regno
)
4306 /* We must rerun eliminate_regs, in case the elimination
4307 offsets have changed. */
4308 rtx tem
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
, 0),
4311 #if 0 /* We cannot safely reuse a memloc made here;
4312 if the pseudo appears twice, and its mem needs a reload,
4313 it gets two separate reloads assigned, but it only
4314 gets substituted with the second of them;
4315 then it can get used before that reload reg gets loaded up. */
4316 for (i
= 0; i
< n_memlocs
; i
++)
4317 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
4321 /* If TEM might contain a pseudo, we must copy it to avoid
4322 modifying it when we do the substitution for the reload. */
4323 if (rtx_varies_p (tem
))
4324 tem
= copy_rtx (tem
);
4326 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4327 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4328 memlocs
[n_memlocs
++] = tem
;
4332 /* Record all reloads needed for handling memory address AD
4333 which appears in *LOC in a memory reference to mode MODE
4334 which itself is found in location *MEMREFLOC.
4335 Note that we take shortcuts assuming that no multi-reg machine mode
4336 occurs as part of an address.
4338 OPNUM and TYPE specify the purpose of this reload.
4340 IND_LEVELS says how many levels of indirect addressing this machine
4343 INSN, if nonzero, is the insn in which we do the reload. It is used
4344 to determine if we may generate output reloads.
4346 Value is nonzero if this address is reloaded or replaced as a whole.
4347 This is interesting to the caller if the address is an autoincrement.
4349 Note that there is no verification that the address will be valid after
4350 this routine does its work. Instead, we rely on the fact that the address
4351 was valid when reload started. So we need only undo things that reload
4352 could have broken. These are wrong register types, pseudos not allocated
4353 to a hard register, and frame pointer elimination. */
4356 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4357 enum machine_mode mode
;
4362 enum reload_type type
;
4367 int removed_and
= 0;
4370 /* If the address is a register, see if it is a legitimate address and
4371 reload if not. We first handle the cases where we need not reload
4372 or where we must reload in a non-standard way. */
4374 if (GET_CODE (ad
) == REG
)
4378 if (reg_equiv_constant
[regno
] != 0
4379 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4381 *loc
= ad
= reg_equiv_constant
[regno
];
4385 else if (reg_equiv_address
[regno
] != 0)
4387 tem
= make_memloc (ad
, regno
);
4388 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4389 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4391 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4392 reload_address_base_reg_class
,
4393 GET_MODE (ad
), VOIDmode
, 0, 0,
4398 /* We can avoid a reload if the register's equivalent memory expression
4399 is valid as an indirect memory address.
4400 But not all addresses are valid in a mem used as an indirect address:
4401 only reg or reg+constant. */
4403 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4404 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4405 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4406 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4407 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4408 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 1)))))
4411 /* The only remaining case where we can avoid a reload is if this is a
4412 hard register that is valid as a base register and which is not the
4413 subject of a CLOBBER in this insn. */
4415 else if (regno
< FIRST_PSEUDO_REGISTER
4416 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4417 && ! regno_clobbered_p (regno
, this_insn
))
4420 /* If we do not have one of the cases above, we must do the reload. */
4421 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, reload_address_base_reg_class
,
4422 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4426 if (strict_memory_address_p (mode
, ad
))
4428 /* The address appears valid, so reloads are not needed.
4429 But the address may contain an eliminable register.
4430 This can happen because a machine with indirect addressing
4431 may consider a pseudo register by itself a valid address even when
4432 it has failed to get a hard reg.
4433 So do a tree-walk to find and eliminate all such regs. */
4435 /* But first quickly dispose of a common case. */
4436 if (GET_CODE (ad
) == PLUS
4437 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4438 && GET_CODE (XEXP (ad
, 0)) == REG
4439 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4442 subst_reg_equivs_changed
= 0;
4443 *loc
= subst_reg_equivs (ad
);
4445 if (! subst_reg_equivs_changed
)
4448 /* Check result for validity after substitution. */
4449 if (strict_memory_address_p (mode
, ad
))
4453 /* The address is not valid. We have to figure out why. First see if
4454 we have an outer AND and remove it if so. Then analyze what's inside. */
4456 if (GET_CODE (ad
) == AND
)
4459 loc
= &XEXP (ad
, 0);
4463 /* One possibility for why the address is invalid is that it is itself
4464 a MEM. This can happen when the frame pointer is being eliminated, a
4465 pseudo is not allocated to a hard register, and the offset between the
4466 frame and stack pointers is not its initial value. In that case the
4467 pseudo will have been replaced by a MEM referring to the
4469 if (GET_CODE (ad
) == MEM
)
4471 /* First ensure that the address in this MEM is valid. Then, unless
4472 indirect addresses are valid, reload the MEM into a register. */
4474 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4475 opnum
, ADDR_TYPE (type
),
4476 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4478 /* If tem was changed, then we must create a new memory reference to
4479 hold it and store it back into memrefloc. */
4480 if (tem
!= ad
&& memrefloc
)
4482 *memrefloc
= copy_rtx (*memrefloc
);
4483 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4484 loc
= &XEXP (*memrefloc
, 0);
4486 loc
= &XEXP (*loc
, 0);
4489 /* Check similar cases as for indirect addresses as above except
4490 that we can allow pseudos and a MEM since they should have been
4491 taken care of above. */
4494 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4495 || GET_CODE (XEXP (tem
, 0)) == MEM
4496 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4497 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4498 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4499 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4501 /* Must use TEM here, not AD, since it is the one that will
4502 have any subexpressions reloaded, if needed. */
4503 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4504 reload_address_base_reg_class
, GET_MODE (tem
),
4507 return ! removed_and
;
4513 /* If we have address of a stack slot but it's not valid because the
4514 displacement is too large, compute the sum in a register.
4515 Handle all base registers here, not just fp/ap/sp, because on some
4516 targets (namely SH) we can also get too large displacements from
4517 big-endian corrections. */
4518 else if (GET_CODE (ad
) == PLUS
4519 && GET_CODE (XEXP (ad
, 0)) == REG
4520 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4521 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4522 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4524 /* Unshare the MEM rtx so we can safely alter it. */
4527 *memrefloc
= copy_rtx (*memrefloc
);
4528 loc
= &XEXP (*memrefloc
, 0);
4530 loc
= &XEXP (*loc
, 0);
4533 if (double_reg_address_ok
)
4535 /* Unshare the sum as well. */
4536 *loc
= ad
= copy_rtx (ad
);
4538 /* Reload the displacement into an index reg.
4539 We assume the frame pointer or arg pointer is a base reg. */
4540 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4541 reload_address_index_reg_class
,
4542 GET_MODE (ad
), opnum
, type
, ind_levels
);
4547 /* If the sum of two regs is not necessarily valid,
4548 reload the sum into a base reg.
4549 That will at least work. */
4550 find_reloads_address_part (ad
, loc
, reload_address_base_reg_class
,
4551 Pmode
, opnum
, type
, ind_levels
);
4552 return ! removed_and
;
4556 /* If we have an indexed stack slot, there are three possible reasons why
4557 it might be invalid: The index might need to be reloaded, the address
4558 might have been made by frame pointer elimination and hence have a
4559 constant out of range, or both reasons might apply.
4561 We can easily check for an index needing reload, but even if that is the
4562 case, we might also have an invalid constant. To avoid making the
4563 conservative assumption and requiring two reloads, we see if this address
4564 is valid when not interpreted strictly. If it is, the only problem is
4565 that the index needs a reload and find_reloads_address_1 will take care
4568 There is still a case when we might generate an extra reload,
4569 however. In certain cases eliminate_regs will return a MEM for a REG
4570 (see the code there for details). In those cases, memory_address_p
4571 applied to our address will return 0 so we will think that our offset
4572 must be too large. But it might indeed be valid and the only problem
4573 is that a MEM is present where a REG should be. This case should be
4574 very rare and there doesn't seem to be any way to avoid it.
4576 If we decide to do something here, it must be that
4577 `double_reg_address_ok' is true and that this address rtl was made by
4578 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4579 rework the sum so that the reload register will be added to the index.
4580 This is safe because we know the address isn't shared.
4582 We check for fp/ap/sp as both the first and second operand of the
4585 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4586 && GET_CODE (XEXP (ad
, 0)) == PLUS
4587 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4588 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4589 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4591 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4592 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4594 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4595 && ! memory_address_p (mode
, ad
))
4597 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4598 plus_constant (XEXP (XEXP (ad
, 0), 0),
4599 INTVAL (XEXP (ad
, 1))),
4600 XEXP (XEXP (ad
, 0), 1));
4601 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4602 reload_address_base_reg_class
,
4603 GET_MODE (ad
), opnum
, type
, ind_levels
);
4604 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4610 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4611 && GET_CODE (XEXP (ad
, 0)) == PLUS
4612 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4613 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4614 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4616 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4617 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4619 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4620 && ! memory_address_p (mode
, ad
))
4622 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4623 XEXP (XEXP (ad
, 0), 0),
4624 plus_constant (XEXP (XEXP (ad
, 0), 1),
4625 INTVAL (XEXP (ad
, 1))));
4626 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4627 reload_address_base_reg_class
,
4628 GET_MODE (ad
), opnum
, type
, ind_levels
);
4629 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4635 /* See if address becomes valid when an eliminable register
4636 in a sum is replaced. */
4639 if (GET_CODE (ad
) == PLUS
)
4640 tem
= subst_indexed_address (ad
);
4641 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4643 /* Ok, we win that way. Replace any additional eliminable
4646 subst_reg_equivs_changed
= 0;
4647 tem
= subst_reg_equivs (tem
);
4649 /* Make sure that didn't make the address invalid again. */
4651 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4658 /* If constants aren't valid addresses, reload the constant address
4660 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4662 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4663 Unshare it so we can safely alter it. */
4664 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4665 && CONSTANT_POOL_ADDRESS_P (ad
))
4667 *memrefloc
= copy_rtx (*memrefloc
);
4668 loc
= &XEXP (*memrefloc
, 0);
4670 loc
= &XEXP (*loc
, 0);
4673 find_reloads_address_part (ad
, loc
, reload_address_base_reg_class
,
4676 return ! removed_and
;
4679 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4683 /* Find all pseudo regs appearing in AD
4684 that are eliminable in favor of equivalent values
4685 and do not have hard regs; replace them by their equivalents. */
4688 subst_reg_equivs (ad
)
4691 register RTX_CODE code
= GET_CODE (ad
);
4709 register int regno
= REGNO (ad
);
4711 if (reg_equiv_constant
[regno
] != 0)
4713 subst_reg_equivs_changed
= 1;
4714 return reg_equiv_constant
[regno
];
4720 /* Quickly dispose of a common case. */
4721 if (XEXP (ad
, 0) == frame_pointer_rtx
4722 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4730 fmt
= GET_RTX_FORMAT (code
);
4731 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4733 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4737 /* Compute the sum of X and Y, making canonicalizations assumed in an
4738 address, namely: sum constant integers, surround the sum of two
4739 constants with a CONST, put the constant as the second operand, and
4740 group the constant on the outermost sum. If DIFF_P is nonzero,
4741 compute the difference instead.
4743 This routine assumes X and Y are already in canonical form. */
4746 form_sum (x
, y
, diff_p
)
4751 enum machine_mode mode
= GET_MODE (x
);
4753 if (mode
== VOIDmode
)
4754 mode
= GET_MODE (y
);
4756 if (mode
== VOIDmode
)
4759 if (! diff_p
&& GET_CODE (x
) == CONST_INT
)
4760 return plus_constant (y
, INTVAL (x
));
4761 else if (GET_CODE (y
) == CONST_INT
)
4762 return plus_constant (x
, diff_p
? - INTVAL (y
) : INTVAL (y
));
4763 else if (! diff_p
&& CONSTANT_P (x
))
4764 tem
= x
, x
= y
, y
= tem
;
4766 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4767 return form_sum (XEXP (x
, 0), form_sum (y
, XEXP (x
, 1), diff_p
), 0);
4769 /* Note that if the operands of Y are specified in the opposite
4770 order in the recursive calls below, infinite recursion will occur. */
4771 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4772 return form_sum (form_sum (x
, XEXP (y
, 0), diff_p
), XEXP (y
, 1), diff_p
);
4774 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4775 constant will have been placed second. */
4776 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4778 if (GET_CODE (x
) == CONST
)
4780 if (GET_CODE (y
) == CONST
)
4783 return gen_rtx_CONST (VOIDmode
,
4784 gen_rtx (diff_p
? MINUS
: PLUS
, mode
, x
, y
));
4787 return gen_rtx (diff_p
? MINUS
: PLUS
, mode
, x
, y
);
4790 /* If ADDR is a sum containing a pseudo register that should be
4791 replaced with a constant (from reg_equiv_constant),
4792 return the result of doing so, and also apply the associative
4793 law so that the result is more likely to be a valid address.
4794 (But it is not guaranteed to be one.)
4796 Note that at most one register is replaced, even if more are
4797 replaceable. Also, we try to put the result into a canonical form
4798 so it is more likely to be a valid address.
4800 In all other cases, return ADDR. */
4803 subst_indexed_address (addr
)
4806 rtx op0
= 0, op1
= 0, op2
= 0;
4810 if (GET_CODE (addr
) == PLUS
)
4812 /* Try to find a register to replace. */
4813 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4814 if (GET_CODE (op0
) == REG
4815 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4816 && reg_renumber
[regno
] < 0
4817 && reg_equiv_constant
[regno
] != 0)
4818 op0
= reg_equiv_constant
[regno
];
4819 else if (GET_CODE (op1
) == REG
4820 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4821 && reg_renumber
[regno
] < 0
4822 && reg_equiv_constant
[regno
] != 0)
4823 op1
= reg_equiv_constant
[regno
];
4824 else if (GET_CODE (op0
) == PLUS
4825 && (tem
= subst_indexed_address (op0
)) != op0
)
4827 else if (GET_CODE (op1
) == PLUS
4828 && (tem
= subst_indexed_address (op1
)) != op1
)
4833 /* Pick out up to three things to add. */
4834 if (GET_CODE (op1
) == PLUS
)
4835 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4836 else if (GET_CODE (op0
) == PLUS
)
4837 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4839 /* Compute the sum. */
4841 op1
= form_sum (op1
, op2
, 0);
4843 op0
= form_sum (op0
, op1
, 0);
4850 /* Record the pseudo registers we must reload into hard registers in a
4851 subexpression of a would-be memory address, X referring to a value
4852 in mode MODE. (This function is not called if the address we find
4855 CONTEXT = 1 means we are considering regs as index regs,
4856 = 0 means we are considering them as base regs.
4858 OPNUM and TYPE specify the purpose of any reloads made.
4860 IND_LEVELS says how many levels of indirect addressing are
4861 supported at this point in the address.
4863 INSN, if nonzero, is the insn in which we do the reload. It is used
4864 to determine if we may generate output reloads.
4866 We return nonzero if X, as a whole, is reloaded or replaced. */
4868 /* Note that we take shortcuts assuming that no multi-reg machine mode
4869 occurs as part of an address.
4870 Also, this is not fully machine-customizable; it works for machines
4871 such as vaxes and 68000's and 32000's, but other possible machines
4872 could have addressing modes that this does not handle right. */
4875 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
4876 enum machine_mode mode
;
4881 enum reload_type type
;
4885 register RTX_CODE code
= GET_CODE (x
);
4891 register rtx orig_op0
= XEXP (x
, 0);
4892 register rtx orig_op1
= XEXP (x
, 1);
4893 register RTX_CODE code0
= GET_CODE (orig_op0
);
4894 register RTX_CODE code1
= GET_CODE (orig_op1
);
4895 register rtx op0
= orig_op0
;
4896 register rtx op1
= orig_op1
;
4898 if (GET_CODE (op0
) == SUBREG
)
4900 op0
= SUBREG_REG (op0
);
4901 code0
= GET_CODE (op0
);
4902 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
4903 op0
= gen_rtx_REG (word_mode
,
4904 REGNO (op0
) + SUBREG_WORD (orig_op0
));
4907 if (GET_CODE (op1
) == SUBREG
)
4909 op1
= SUBREG_REG (op1
);
4910 code1
= GET_CODE (op1
);
4911 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
4912 op1
= gen_rtx_REG (GET_MODE (op1
),
4913 REGNO (op1
) + SUBREG_WORD (orig_op1
));
4916 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
4917 || code0
== ZERO_EXTEND
|| code1
== MEM
)
4919 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4920 type
, ind_levels
, insn
);
4921 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4922 type
, ind_levels
, insn
);
4925 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
4926 || code1
== ZERO_EXTEND
|| code0
== MEM
)
4928 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4929 type
, ind_levels
, insn
);
4930 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
4931 type
, ind_levels
, insn
);
4934 else if (code0
== CONST_INT
|| code0
== CONST
4935 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4936 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4937 type
, ind_levels
, insn
);
4939 else if (code1
== CONST_INT
|| code1
== CONST
4940 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4941 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4942 type
, ind_levels
, insn
);
4944 else if (code0
== REG
&& code1
== REG
)
4946 if (REG_OK_FOR_INDEX_P (op0
)
4947 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
4949 else if (REG_OK_FOR_INDEX_P (op1
)
4950 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
4952 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
4953 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4954 type
, ind_levels
, insn
);
4955 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
4956 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
4957 type
, ind_levels
, insn
);
4958 else if (REG_OK_FOR_INDEX_P (op1
))
4959 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4960 type
, ind_levels
, insn
);
4961 else if (REG_OK_FOR_INDEX_P (op0
))
4962 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4963 type
, ind_levels
, insn
);
4966 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4967 type
, ind_levels
, insn
);
4968 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4969 type
, ind_levels
, insn
);
4973 else if (code0
== REG
)
4975 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4976 type
, ind_levels
, insn
);
4977 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4978 type
, ind_levels
, insn
);
4981 else if (code1
== REG
)
4983 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
4984 type
, ind_levels
, insn
);
4985 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4986 type
, ind_levels
, insn
);
4996 if (GET_CODE (XEXP (x
, 0)) == REG
)
4998 register int regno
= REGNO (XEXP (x
, 0));
5002 /* A register that is incremented cannot be constant! */
5003 if (regno
>= FIRST_PSEUDO_REGISTER
5004 && reg_equiv_constant
[regno
] != 0)
5007 /* Handle a register that is equivalent to a memory location
5008 which cannot be addressed directly. */
5009 if (reg_equiv_address
[regno
] != 0)
5011 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5012 /* First reload the memory location's address.
5013 We can't use ADDR_TYPE (type) here, because we need to
5014 write back the value after reading it, hence we actually
5015 need two registers. */
5016 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5017 &XEXP (tem
, 0), opnum
, type
,
5019 /* Put this inside a new increment-expression. */
5020 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
5021 /* Proceed to reload that, as if it contained a register. */
5024 /* If we have a hard register that is ok as an index,
5025 don't make a reload. If an autoincrement of a nice register
5026 isn't "valid", it must be that no autoincrement is "valid".
5027 If that is true and something made an autoincrement anyway,
5028 this must be a special context where one is allowed.
5029 (For example, a "push" instruction.)
5030 We can't improve this address, so leave it alone. */
5032 /* Otherwise, reload the autoincrement into a suitable hard reg
5033 and record how much to increment by. */
5035 if (reg_renumber
[regno
] >= 0)
5036 regno
= reg_renumber
[regno
];
5037 if ((regno
>= FIRST_PSEUDO_REGISTER
5038 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5039 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5044 /* If we can output the register afterwards, do so, this
5045 saves the extra update.
5046 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5047 CALL_INSN - and it does not set CC0.
5048 But don't do this if we cannot directly address the
5049 memory location, since this will make it harder to
5050 reuse address reloads, and increases register pressure.
5051 Also don't do this if we can probably update x directly. */
5052 rtx equiv
= reg_equiv_mem
[regno
];
5053 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5054 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5056 && ! sets_cc0_p (PATTERN (insn
))
5058 && ! (icode
!= CODE_FOR_nothing
5059 && (*insn_operand_predicate
[icode
][0]) (equiv
, Pmode
)
5060 && (*insn_operand_predicate
[icode
][1]) (equiv
, Pmode
)))
5065 = push_reload (x
, x
, loc
, loc
,
5067 ? reload_address_index_reg_class
5068 : reload_address_base_reg_class
),
5069 GET_MODE (x
), GET_MODE (x
), 0, 0,
5070 opnum
, RELOAD_OTHER
);
5075 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5077 ? reload_address_index_reg_class
5078 : reload_address_base_reg_class
),
5079 GET_MODE (x
), GET_MODE (x
), 0, 0,
5081 reload_inc
[reloadnum
]
5082 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5088 /* Update the REG_INC notes. */
5090 for (link
= REG_NOTES (this_insn
);
5091 link
; link
= XEXP (link
, 1))
5092 if (REG_NOTE_KIND (link
) == REG_INC
5093 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5094 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5100 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5102 /* This is probably the result of a substitution, by eliminate_regs,
5103 of an equivalent address for a pseudo that was not allocated to a
5104 hard register. Verify that the specified address is valid and
5105 reload it into a register. */
5106 rtx tem
= XEXP (x
, 0);
5110 /* Since we know we are going to reload this item, don't decrement
5111 for the indirection level.
5113 Note that this is actually conservative: it would be slightly
5114 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5116 /* We can't use ADDR_TYPE (type) here, because we need to
5117 write back the value after reading it, hence we actually
5118 need two registers. */
5119 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5120 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5121 opnum
, type
, ind_levels
, insn
);
5123 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5125 ? reload_address_index_reg_class
5126 : reload_address_base_reg_class
),
5127 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5128 reload_inc
[reloadnum
]
5129 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5131 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5133 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5140 /* This is probably the result of a substitution, by eliminate_regs, of
5141 an equivalent address for a pseudo that was not allocated to a hard
5142 register. Verify that the specified address is valid and reload it
5145 Since we know we are going to reload this item, don't decrement for
5146 the indirection level.
5148 Note that this is actually conservative: it would be slightly more
5149 efficient to use the value of SPILL_INDIRECT_LEVELS from
5152 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5153 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5154 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5155 (context
? reload_address_index_reg_class
5156 : reload_address_base_reg_class
),
5157 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5162 register int regno
= REGNO (x
);
5164 if (reg_equiv_constant
[regno
] != 0)
5166 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5168 ? reload_address_index_reg_class
5169 : reload_address_base_reg_class
),
5170 GET_MODE (x
), opnum
, type
, ind_levels
);
5174 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5175 that feeds this insn. */
5176 if (reg_equiv_mem
[regno
] != 0)
5178 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5180 ? reload_address_index_reg_class
5181 : reload_address_base_reg_class
),
5182 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5187 if (reg_equiv_address
[regno
] != 0)
5189 x
= make_memloc (x
, regno
);
5190 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
5191 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5194 if (reg_renumber
[regno
] >= 0)
5195 regno
= reg_renumber
[regno
];
5197 if ((regno
>= FIRST_PSEUDO_REGISTER
5198 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5199 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5201 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5203 ? reload_address_index_reg_class
5204 : reload_address_base_reg_class
),
5205 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5209 /* If a register appearing in an address is the subject of a CLOBBER
5210 in this insn, reload it into some other register to be safe.
5211 The CLOBBER is supposed to make the register unavailable
5212 from before this insn to after it. */
5213 if (regno_clobbered_p (regno
, this_insn
))
5215 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5217 ? reload_address_index_reg_class
5218 : reload_address_base_reg_class
),
5219 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5226 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5228 /* If this is a SUBREG of a hard register and the resulting register
5229 is of the wrong class, reload the whole SUBREG. This avoids
5230 needless copies if SUBREG_REG is multi-word. */
5231 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5233 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5235 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5236 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5238 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5240 ? reload_address_index_reg_class
5241 : reload_address_base_reg_class
),
5242 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5246 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5247 is larger than the class size, then reload the whole SUBREG. */
5250 enum reg_class
class = (context
5251 ? reload_address_index_reg_class
5252 : reload_address_base_reg_class
);
5253 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5254 > reg_class_size
[class])
5256 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5257 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5269 register char *fmt
= GET_RTX_FORMAT (code
);
5272 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5275 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5276 opnum
, type
, ind_levels
, insn
);
5283 /* X, which is found at *LOC, is a part of an address that needs to be
5284 reloaded into a register of class CLASS. If X is a constant, or if
5285 X is a PLUS that contains a constant, check that the constant is a
5286 legitimate operand and that we are supposed to be able to load
5287 it into the register.
5289 If not, force the constant into memory and reload the MEM instead.
5291 MODE is the mode to use, in case X is an integer constant.
5293 OPNUM and TYPE describe the purpose of any reloads made.
5295 IND_LEVELS says how many levels of indirect addressing this machine
5299 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5302 enum reg_class
class;
5303 enum machine_mode mode
;
5305 enum reload_type type
;
5309 && (! LEGITIMATE_CONSTANT_P (x
)
5310 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5312 rtx tem
= x
= force_const_mem (mode
, x
);
5313 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5314 opnum
, type
, ind_levels
, 0);
5317 else if (GET_CODE (x
) == PLUS
5318 && CONSTANT_P (XEXP (x
, 1))
5319 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5320 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5322 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5324 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5325 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5326 opnum
, type
, ind_levels
, 0);
5329 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5330 mode
, VOIDmode
, 0, 0, opnum
, type
);
5333 /* Substitute into the current INSN the registers into which we have reloaded
5334 the things that need reloading. The array `replacements'
5335 says contains the locations of all pointers that must be changed
5336 and says what to replace them with.
5338 Return the rtx that X translates into; usually X, but modified. */
5345 for (i
= 0; i
< n_replacements
; i
++)
5347 register struct replacement
*r
= &replacements
[i
];
5348 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
5351 /* Encapsulate RELOADREG so its machine mode matches what
5352 used to be there. Note that gen_lowpart_common will
5353 do the wrong thing if RELOADREG is multi-word. RELOADREG
5354 will always be a REG here. */
5355 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5356 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5358 /* If we are putting this into a SUBREG and RELOADREG is a
5359 SUBREG, we would be making nested SUBREGs, so we have to fix
5360 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5362 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5364 if (GET_MODE (*r
->subreg_loc
)
5365 == GET_MODE (SUBREG_REG (reloadreg
)))
5366 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5369 *r
->where
= SUBREG_REG (reloadreg
);
5370 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5374 *r
->where
= reloadreg
;
5376 /* If reload got no reg and isn't optional, something's wrong. */
5377 else if (! reload_optional
[r
->what
])
5382 /* Make a copy of any replacements being done into X and move those copies
5383 to locations in Y, a copy of X. We only look at the highest level of
5387 copy_replacements (x
, y
)
5392 enum rtx_code code
= GET_CODE (x
);
5393 char *fmt
= GET_RTX_FORMAT (code
);
5394 struct replacement
*r
;
5396 /* We can't support X being a SUBREG because we might then need to know its
5397 location if something inside it was replaced. */
5401 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5403 for (j
= 0; j
< n_replacements
; j
++)
5405 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5407 r
= &replacements
[n_replacements
++];
5408 r
->where
= replacements
[j
].where
;
5409 r
->subreg_loc
= &XEXP (y
, i
);
5410 r
->what
= replacements
[j
].what
;
5411 r
->mode
= replacements
[j
].mode
;
5413 else if (replacements
[j
].where
== &XEXP (x
, i
))
5415 r
= &replacements
[n_replacements
++];
5416 r
->where
= &XEXP (y
, i
);
5418 r
->what
= replacements
[j
].what
;
5419 r
->mode
= replacements
[j
].mode
;
5424 /* If LOC was scheduled to be replaced by something, return the replacement.
5425 Otherwise, return *LOC. */
5428 find_replacement (loc
)
5431 struct replacement
*r
;
5433 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5435 rtx reloadreg
= reload_reg_rtx
[r
->what
];
5437 if (reloadreg
&& r
->where
== loc
)
5439 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5440 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5444 else if (reloadreg
&& r
->subreg_loc
== loc
)
5446 /* RELOADREG must be either a REG or a SUBREG.
5448 ??? Is it actually still ever a SUBREG? If so, why? */
5450 if (GET_CODE (reloadreg
) == REG
)
5451 return gen_rtx_REG (GET_MODE (*loc
),
5452 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5453 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5457 gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5458 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5462 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5463 what's inside and make a new rtl if so. */
5464 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5465 || GET_CODE (*loc
) == MULT
)
5467 rtx x
= find_replacement (&XEXP (*loc
, 0));
5468 rtx y
= find_replacement (&XEXP (*loc
, 1));
5470 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5471 return gen_rtx (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5477 /* Return nonzero if register in range [REGNO, ENDREGNO)
5478 appears either explicitly or implicitly in X
5479 other than being stored into (except for earlyclobber operands).
5481 References contained within the substructure at LOC do not count.
5482 LOC may be zero, meaning don't ignore anything.
5484 This is similar to refers_to_regno_p in rtlanal.c except that we
5485 look at equivalences for pseudos that didn't get hard registers. */
5488 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5489 int regno
, endregno
;
5494 register RTX_CODE code
;
5501 code
= GET_CODE (x
);
5508 /* If this is a pseudo, a hard register must not have been allocated.
5509 X must therefore either be a constant or be in memory. */
5510 if (i
>= FIRST_PSEUDO_REGISTER
)
5512 if (reg_equiv_memory_loc
[i
])
5513 return refers_to_regno_for_reload_p (regno
, endregno
,
5514 reg_equiv_memory_loc
[i
],
5517 if (reg_equiv_constant
[i
])
5523 return (endregno
> i
5524 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5525 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5529 /* If this is a SUBREG of a hard reg, we can see exactly which
5530 registers are being modified. Otherwise, handle normally. */
5531 if (GET_CODE (SUBREG_REG (x
)) == REG
5532 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5534 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5536 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5537 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5539 return endregno
> inner_regno
&& regno
< inner_endregno
;
5545 if (&SET_DEST (x
) != loc
5546 /* Note setting a SUBREG counts as referring to the REG it is in for
5547 a pseudo but not for hard registers since we can
5548 treat each word individually. */
5549 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5550 && loc
!= &SUBREG_REG (SET_DEST (x
))
5551 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5552 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5553 && refers_to_regno_for_reload_p (regno
, endregno
,
5554 SUBREG_REG (SET_DEST (x
)),
5556 /* If the output is an earlyclobber operand, this is
5558 || ((GET_CODE (SET_DEST (x
)) != REG
5559 || earlyclobber_operand_p (SET_DEST (x
)))
5560 && refers_to_regno_for_reload_p (regno
, endregno
,
5561 SET_DEST (x
), loc
))))
5564 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5573 /* X does not match, so try its subexpressions. */
5575 fmt
= GET_RTX_FORMAT (code
);
5576 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5578 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5586 if (refers_to_regno_for_reload_p (regno
, endregno
,
5590 else if (fmt
[i
] == 'E')
5593 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5594 if (loc
!= &XVECEXP (x
, i
, j
)
5595 && refers_to_regno_for_reload_p (regno
, endregno
,
5596 XVECEXP (x
, i
, j
), loc
))
5603 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5604 we check if any register number in X conflicts with the relevant register
5605 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5606 contains a MEM (we don't bother checking for memory addresses that can't
5607 conflict because we expect this to be a rare case.
5609 This function is similar to reg_overlap_mention_p in rtlanal.c except
5610 that we look at equivalences for pseudos that didn't get hard registers. */
5613 reg_overlap_mentioned_for_reload_p (x
, in
)
5616 int regno
, endregno
;
5618 if (GET_CODE (x
) == SUBREG
)
5620 regno
= REGNO (SUBREG_REG (x
));
5621 if (regno
< FIRST_PSEUDO_REGISTER
)
5622 regno
+= SUBREG_WORD (x
);
5624 else if (GET_CODE (x
) == REG
)
5628 /* If this is a pseudo, it must not have been assigned a hard register.
5629 Therefore, it must either be in memory or be a constant. */
5631 if (regno
>= FIRST_PSEUDO_REGISTER
)
5633 if (reg_equiv_memory_loc
[regno
])
5634 return refers_to_mem_for_reload_p (in
);
5635 else if (reg_equiv_constant
[regno
])
5640 else if (CONSTANT_P (x
))
5642 else if (GET_CODE (x
) == MEM
)
5643 return refers_to_mem_for_reload_p (in
);
5644 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5645 || GET_CODE (x
) == CC0
)
5646 return reg_mentioned_p (x
, in
);
5650 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5651 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5653 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5656 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5660 refers_to_mem_for_reload_p (x
)
5666 if (GET_CODE (x
) == MEM
)
5669 if (GET_CODE (x
) == REG
)
5670 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5671 && reg_equiv_memory_loc
[REGNO (x
)]);
5673 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5674 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5676 && (GET_CODE (XEXP (x
, i
)) == MEM
5677 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5683 /* Check the insns before INSN to see if there is a suitable register
5684 containing the same value as GOAL.
5685 If OTHER is -1, look for a register in class CLASS.
5686 Otherwise, just see if register number OTHER shares GOAL's value.
5688 Return an rtx for the register found, or zero if none is found.
5690 If RELOAD_REG_P is (short *)1,
5691 we reject any hard reg that appears in reload_reg_rtx
5692 because such a hard reg is also needed coming into this insn.
5694 If RELOAD_REG_P is any other nonzero value,
5695 it is a vector indexed by hard reg number
5696 and we reject any hard reg whose element in the vector is nonnegative
5697 as well as any that appears in reload_reg_rtx.
5699 If GOAL is zero, then GOALREG is a register number; we look
5700 for an equivalent for that register.
5702 MODE is the machine mode of the value we want an equivalence for.
5703 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5705 This function is used by jump.c as well as in the reload pass.
5707 If GOAL is the sum of the stack pointer and a constant, we treat it
5708 as if it were a constant except that sp is required to be unchanging. */
5711 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5714 enum reg_class
class;
5716 short *reload_reg_p
;
5718 enum machine_mode mode
;
5720 register rtx p
= insn
;
5721 rtx goaltry
, valtry
, value
, where
;
5723 register int regno
= -1;
5727 int goal_mem_addr_varies
= 0;
5728 int need_stable_sp
= 0;
5734 else if (GET_CODE (goal
) == REG
)
5735 regno
= REGNO (goal
);
5736 else if (GET_CODE (goal
) == MEM
)
5738 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5739 if (MEM_VOLATILE_P (goal
))
5741 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5743 /* An address with side effects must be reexecuted. */
5756 else if (CONSTANT_P (goal
))
5758 else if (GET_CODE (goal
) == PLUS
5759 && XEXP (goal
, 0) == stack_pointer_rtx
5760 && CONSTANT_P (XEXP (goal
, 1)))
5761 goal_const
= need_stable_sp
= 1;
5765 /* On some machines, certain regs must always be rejected
5766 because they don't behave the way ordinary registers do. */
5768 #ifdef OVERLAPPING_REGNO_P
5769 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5770 && OVERLAPPING_REGNO_P (regno
))
5774 /* Scan insns back from INSN, looking for one that copies
5775 a value into or out of GOAL.
5776 Stop and give up if we reach a label. */
5781 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5783 if (GET_CODE (p
) == INSN
5784 /* If we don't want spill regs ... */
5785 && (! (reload_reg_p
!= 0
5786 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5787 /* ... then ignore insns introduced by reload; they aren't useful
5788 and can cause results in reload_as_needed to be different
5789 from what they were when calculating the need for spills.
5790 If we notice an input-reload insn here, we will reject it below,
5791 but it might hide a usable equivalent. That makes bad code.
5792 It may even abort: perhaps no reg was spilled for this insn
5793 because it was assumed we would find that equivalent. */
5794 || INSN_UID (p
) < reload_first_uid
))
5797 pat
= single_set (p
);
5798 /* First check for something that sets some reg equal to GOAL. */
5801 && true_regnum (SET_SRC (pat
)) == regno
5802 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5805 && true_regnum (SET_DEST (pat
)) == regno
5806 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5808 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5809 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5811 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5812 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5814 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5815 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5816 /* If we are looking for a constant,
5817 and something equivalent to that constant was copied
5818 into a reg, we can use that reg. */
5819 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5821 && rtx_equal_p (XEXP (tem
, 0), goal
)
5822 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5823 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5825 && GET_CODE (SET_DEST (pat
)) == REG
5826 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5827 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5828 && GET_CODE (goal
) == CONST_INT
5829 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5831 && rtx_equal_p (goal
, goaltry
)
5832 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5834 && (valueno
= true_regnum (valtry
)) >= 0)
5835 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5837 && GET_CODE (SET_DEST (pat
)) == REG
5838 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5839 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5840 && GET_CODE (goal
) == CONST_INT
5841 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5843 && rtx_equal_p (goal
, goaltry
)
5845 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5846 && (valueno
= true_regnum (valtry
)) >= 0)))
5849 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5850 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5860 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5861 (or copying VALUE into GOAL, if GOAL is also a register).
5862 Now verify that VALUE is really valid. */
5864 /* VALUENO is the register number of VALUE; a hard register. */
5866 /* Don't try to re-use something that is killed in this insn. We want
5867 to be able to trust REG_UNUSED notes. */
5868 if (find_reg_note (where
, REG_UNUSED
, value
))
5871 /* If we propose to get the value from the stack pointer or if GOAL is
5872 a MEM based on the stack pointer, we need a stable SP. */
5873 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
5874 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5878 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5879 if (GET_MODE (value
) != mode
)
5882 /* Reject VALUE if it was loaded from GOAL
5883 and is also a register that appears in the address of GOAL. */
5885 if (goal_mem
&& value
== SET_DEST (single_set (where
))
5886 && refers_to_regno_for_reload_p (valueno
,
5888 + HARD_REGNO_NREGS (valueno
, mode
)),
5892 /* Reject registers that overlap GOAL. */
5894 if (!goal_mem
&& !goal_const
5895 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5896 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5899 /* Reject VALUE if it is one of the regs reserved for reloads.
5900 Reload1 knows how to reuse them anyway, and it would get
5901 confused if we allocated one without its knowledge.
5902 (Now that insns introduced by reload are ignored above,
5903 this case shouldn't happen, but I'm not positive.) */
5905 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5906 && reload_reg_p
[valueno
] >= 0)
5909 /* On some machines, certain regs must always be rejected
5910 because they don't behave the way ordinary registers do. */
5912 #ifdef OVERLAPPING_REGNO_P
5913 if (OVERLAPPING_REGNO_P (valueno
))
5917 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5918 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5920 /* Reject VALUE if it is a register being used for an input reload
5921 even if it is not one of those reserved. */
5923 if (reload_reg_p
!= 0)
5926 for (i
= 0; i
< n_reloads
; i
++)
5927 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5929 int regno1
= REGNO (reload_reg_rtx
[i
]);
5930 int nregs1
= HARD_REGNO_NREGS (regno1
,
5931 GET_MODE (reload_reg_rtx
[i
]));
5932 if (regno1
< valueno
+ valuenregs
5933 && regno1
+ nregs1
> valueno
)
5939 /* We must treat frame pointer as varying here,
5940 since it can vary--in a nonlocal goto as generated by expand_goto. */
5941 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5943 /* Now verify that the values of GOAL and VALUE remain unaltered
5944 until INSN is reached. */
5953 /* Don't trust the conversion past a function call
5954 if either of the two is in a call-clobbered register, or memory. */
5955 if (GET_CODE (p
) == CALL_INSN
5956 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5957 && call_used_regs
[regno
])
5959 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5960 && call_used_regs
[valueno
])
5966 #ifdef NON_SAVING_SETJMP
5967 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
5968 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
5972 #ifdef INSN_CLOBBERS_REGNO_P
5973 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5974 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5975 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5976 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5980 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5982 /* If this insn P stores in either GOAL or VALUE, return 0.
5983 If GOAL is a memory ref and this insn writes memory, return 0.
5984 If GOAL is a memory ref and its address is not constant,
5985 and this insn P changes a register used in GOAL, return 0. */
5988 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5990 register rtx dest
= SET_DEST (pat
);
5991 while (GET_CODE (dest
) == SUBREG
5992 || GET_CODE (dest
) == ZERO_EXTRACT
5993 || GET_CODE (dest
) == SIGN_EXTRACT
5994 || GET_CODE (dest
) == STRICT_LOW_PART
)
5995 dest
= XEXP (dest
, 0);
5996 if (GET_CODE (dest
) == REG
)
5998 register int xregno
= REGNO (dest
);
6000 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6001 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6004 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6006 if (xregno
< valueno
+ valuenregs
6007 && xregno
+ xnregs
> valueno
)
6009 if (goal_mem_addr_varies
6010 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6013 else if (goal_mem
&& GET_CODE (dest
) == MEM
6014 && ! push_operand (dest
, GET_MODE (dest
)))
6016 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6017 && reg_equiv_memory_loc
[regno
] != 0)
6019 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6022 else if (GET_CODE (pat
) == PARALLEL
)
6025 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6027 register rtx v1
= XVECEXP (pat
, 0, i
);
6028 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6030 register rtx dest
= SET_DEST (v1
);
6031 while (GET_CODE (dest
) == SUBREG
6032 || GET_CODE (dest
) == ZERO_EXTRACT
6033 || GET_CODE (dest
) == SIGN_EXTRACT
6034 || GET_CODE (dest
) == STRICT_LOW_PART
)
6035 dest
= XEXP (dest
, 0);
6036 if (GET_CODE (dest
) == REG
)
6038 register int xregno
= REGNO (dest
);
6040 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6041 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6044 if (xregno
< regno
+ nregs
6045 && xregno
+ xnregs
> regno
)
6047 if (xregno
< valueno
+ valuenregs
6048 && xregno
+ xnregs
> valueno
)
6050 if (goal_mem_addr_varies
6051 && reg_overlap_mentioned_for_reload_p (dest
,
6055 else if (goal_mem
&& GET_CODE (dest
) == MEM
6056 && ! push_operand (dest
, GET_MODE (dest
)))
6058 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6059 && reg_equiv_memory_loc
[regno
] != 0)
6061 else if (need_stable_sp
6062 && push_operand (dest
, GET_MODE (dest
)))
6068 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6072 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6073 link
= XEXP (link
, 1))
6075 pat
= XEXP (link
, 0);
6076 if (GET_CODE (pat
) == CLOBBER
)
6078 register rtx dest
= SET_DEST (pat
);
6079 while (GET_CODE (dest
) == SUBREG
6080 || GET_CODE (dest
) == ZERO_EXTRACT
6081 || GET_CODE (dest
) == SIGN_EXTRACT
6082 || GET_CODE (dest
) == STRICT_LOW_PART
)
6083 dest
= XEXP (dest
, 0);
6084 if (GET_CODE (dest
) == REG
)
6086 register int xregno
= REGNO (dest
);
6088 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6089 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6092 if (xregno
< regno
+ nregs
6093 && xregno
+ xnregs
> regno
)
6095 if (xregno
< valueno
+ valuenregs
6096 && xregno
+ xnregs
> valueno
)
6098 if (goal_mem_addr_varies
6099 && reg_overlap_mentioned_for_reload_p (dest
,
6103 else if (goal_mem
&& GET_CODE (dest
) == MEM
6104 && ! push_operand (dest
, GET_MODE (dest
)))
6106 else if (need_stable_sp
6107 && push_operand (dest
, GET_MODE (dest
)))
6114 /* If this insn auto-increments or auto-decrements
6115 either regno or valueno, return 0 now.
6116 If GOAL is a memory ref and its address is not constant,
6117 and this insn P increments a register used in GOAL, return 0. */
6121 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6122 if (REG_NOTE_KIND (link
) == REG_INC
6123 && GET_CODE (XEXP (link
, 0)) == REG
)
6125 register int incno
= REGNO (XEXP (link
, 0));
6126 if (incno
< regno
+ nregs
&& incno
>= regno
)
6128 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6130 if (goal_mem_addr_varies
6131 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6141 /* Find a place where INCED appears in an increment or decrement operator
6142 within X, and return the amount INCED is incremented or decremented by.
6143 The value is always positive. */
6146 find_inc_amount (x
, inced
)
6149 register enum rtx_code code
= GET_CODE (x
);
6155 register rtx addr
= XEXP (x
, 0);
6156 if ((GET_CODE (addr
) == PRE_DEC
6157 || GET_CODE (addr
) == POST_DEC
6158 || GET_CODE (addr
) == PRE_INC
6159 || GET_CODE (addr
) == POST_INC
)
6160 && XEXP (addr
, 0) == inced
)
6161 return GET_MODE_SIZE (GET_MODE (x
));
6164 fmt
= GET_RTX_FORMAT (code
);
6165 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6169 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6176 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6178 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6188 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6191 regno_clobbered_p (regno
, insn
)
6195 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6196 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6197 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6199 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6201 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6205 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6206 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6207 && REGNO (XEXP (elt
, 0)) == regno
)
6215 static char *reload_when_needed_name
[] =
6218 "RELOAD_FOR_OUTPUT",
6220 "RELOAD_FOR_INPUT_ADDRESS",
6221 "RELOAD_FOR_INPADDR_ADDRESS",
6222 "RELOAD_FOR_OUTPUT_ADDRESS",
6223 "RELOAD_FOR_OUTADDR_ADDRESS",
6224 "RELOAD_FOR_OPERAND_ADDRESS",
6225 "RELOAD_FOR_OPADDR_ADDR",
6227 "RELOAD_FOR_OTHER_ADDRESS"
6230 static char *reg_class_names
[] = REG_CLASS_NAMES
;
6232 /* This function is used to print the variables set by 'find_reloads' */
6240 for (r
= 0; r
< n_reloads
; r
++)
6242 fprintf (stderr
, "Reload %d: ", r
);
6244 if (reload_in
[r
] != 0)
6246 fprintf (stderr
, "reload_in (%s) = ",
6247 GET_MODE_NAME (reload_inmode
[r
]));
6248 print_inline_rtx (stderr
, reload_in
[r
], 24);
6249 fprintf (stderr
, "\n\t");
6252 if (reload_out
[r
] != 0)
6254 fprintf (stderr
, "reload_out (%s) = ",
6255 GET_MODE_NAME (reload_outmode
[r
]));
6256 print_inline_rtx (stderr
, reload_out
[r
], 24);
6257 fprintf (stderr
, "\n\t");
6260 fprintf (stderr
, "%s, ", reg_class_names
[(int) reload_reg_class
[r
]]);
6262 fprintf (stderr
, "%s (opnum = %d)",
6263 reload_when_needed_name
[(int) reload_when_needed
[r
]],
6266 if (reload_optional
[r
])
6267 fprintf (stderr
, ", optional");
6269 if (reload_nongroup
[r
])
6270 fprintf (stderr
, ", nongroup");
6272 if (reload_inc
[r
] != 0)
6273 fprintf (stderr
, ", inc by %d", reload_inc
[r
]);
6275 if (reload_nocombine
[r
])
6276 fprintf (stderr
, ", can't combine");
6278 if (reload_secondary_p
[r
])
6279 fprintf (stderr
, ", secondary_reload_p");
6281 if (reload_in_reg
[r
] != 0)
6283 fprintf (stderr
, "\n\treload_in_reg: ");
6284 print_inline_rtx (stderr
, reload_in_reg
[r
], 24);
6287 if (reload_reg_rtx
[r
] != 0)
6289 fprintf (stderr
, "\n\treload_reg_rtx: ");
6290 print_inline_rtx (stderr
, reload_reg_rtx
[r
], 24);
6294 if (reload_secondary_in_reload
[r
] != -1)
6296 fprintf (stderr
, "%ssecondary_in_reload = %d",
6297 prefix
, reload_secondary_in_reload
[r
]);
6301 if (reload_secondary_out_reload
[r
] != -1)
6302 fprintf (stderr
, "%ssecondary_out_reload = %d\n",
6303 prefix
, reload_secondary_out_reload
[r
]);
6306 if (reload_secondary_in_icode
[r
] != CODE_FOR_nothing
)
6308 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6309 insn_name
[reload_secondary_in_icode
[r
]]);
6313 if (reload_secondary_out_icode
[r
] != CODE_FOR_nothing
)
6314 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6315 insn_name
[reload_secondary_out_icode
[r
]]);
6317 fprintf (stderr
, "\n");