1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "insn-config.h"
36 #include "cfgcleanup.h"
47 #include "insn-codes.h"
49 #include "diagnostic-core.h"
53 #include "tree-pass.h"
55 #include "shrink-wrap.h"
59 #ifndef MAX_CONDITIONAL_EXECUTE
60 #define MAX_CONDITIONAL_EXECUTE \
61 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
65 #define IFCVT_MULTIPLE_DUMPS 1
67 #define NULL_BLOCK ((basic_block) NULL)
69 /* True if after combine pass. */
70 static bool ifcvt_after_combine
;
72 /* True if the target has the cbranchcc4 optab. */
73 static bool have_cbranchcc4
;
75 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
76 static int num_possible_if_blocks
;
78 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
80 static int num_updated_if_blocks
;
82 /* # of changes made. */
83 static int num_true_changes
;
85 /* Whether conditional execution changes were made. */
86 static int cond_exec_changed_p
;
88 /* Forward references. */
89 static int count_bb_insns (const_basic_block
);
90 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
91 static rtx_insn
*first_active_insn (basic_block
);
92 static rtx_insn
*last_active_insn (basic_block
, int);
93 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
94 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
95 static basic_block
block_fallthru (basic_block
);
96 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
98 static rtx
cond_exec_get_condition (rtx_insn
*);
99 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
100 static int noce_operand_ok (const_rtx
);
101 static void merge_if_block (ce_if_block
*);
102 static int find_cond_trap (basic_block
, edge
, edge
);
103 static basic_block
find_if_header (basic_block
, int);
104 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
105 static int noce_find_if_block (basic_block
, edge
, edge
, int);
106 static int cond_exec_find_if_block (ce_if_block
*);
107 static int find_if_case_1 (basic_block
, edge
, edge
);
108 static int find_if_case_2 (basic_block
, edge
, edge
);
109 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
111 static void noce_emit_move_insn (rtx
, rtx
);
112 static rtx_insn
*block_has_only_trap (basic_block
);
114 /* Count the number of non-jump active insns in BB. */
117 count_bb_insns (const_basic_block bb
)
120 rtx_insn
*insn
= BB_HEAD (bb
);
124 if (active_insn_p (insn
) && !JUMP_P (insn
))
127 if (insn
== BB_END (bb
))
129 insn
= NEXT_INSN (insn
);
135 /* Determine whether the total insn_rtx_cost on non-jump insns in
136 basic block BB is less than MAX_COST. This function returns
137 false if the cost of any instruction could not be estimated.
139 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
140 as those insns are being speculated. MAX_COST is scaled with SCALE
141 plus a small fudge factor. */
144 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
147 rtx_insn
*insn
= BB_HEAD (bb
);
148 bool speed
= optimize_bb_for_speed_p (bb
);
150 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
151 applied to insn_rtx_cost when optimizing for size. Only do
152 this after combine because if-conversion might interfere with
153 passes before combine.
155 Use optimize_function_for_speed_p instead of the pre-defined
156 variable speed to make sure it is set to same value for all
157 basic blocks in one if-conversion transformation. */
158 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
159 scale
= REG_BR_PROB_BASE
;
160 /* Our branch probability/scaling factors are just estimates and don't
161 account for cases where we can get speculation for free and other
162 secondary benefits. So we fudge the scale factor to make speculating
163 appear a little more profitable when optimizing for performance. */
165 scale
+= REG_BR_PROB_BASE
/ 8;
172 if (NONJUMP_INSN_P (insn
))
174 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
178 /* If this instruction is the load or set of a "stack" register,
179 such as a floating point register on x87, then the cost of
180 speculatively executing this insn may need to include
181 the additional cost of popping its result off of the
182 register stack. Unfortunately, correctly recognizing and
183 accounting for this additional overhead is tricky, so for
184 now we simply prohibit such speculative execution. */
187 rtx set
= single_set (insn
);
188 if (set
&& STACK_REG_P (SET_DEST (set
)))
194 if (count
>= max_cost
)
197 else if (CALL_P (insn
))
200 if (insn
== BB_END (bb
))
202 insn
= NEXT_INSN (insn
);
208 /* Return the first non-jump active insn in the basic block. */
211 first_active_insn (basic_block bb
)
213 rtx_insn
*insn
= BB_HEAD (bb
);
217 if (insn
== BB_END (bb
))
219 insn
= NEXT_INSN (insn
);
222 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
224 if (insn
== BB_END (bb
))
226 insn
= NEXT_INSN (insn
);
235 /* Return the last non-jump active (non-jump) insn in the basic block. */
238 last_active_insn (basic_block bb
, int skip_use_p
)
240 rtx_insn
*insn
= BB_END (bb
);
241 rtx_insn
*head
= BB_HEAD (bb
);
245 || DEBUG_INSN_P (insn
)
247 && NONJUMP_INSN_P (insn
)
248 && GET_CODE (PATTERN (insn
)) == USE
))
252 insn
= PREV_INSN (insn
);
261 /* Return the active insn before INSN inside basic block CURR_BB. */
264 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
266 if (!insn
|| insn
== BB_HEAD (curr_bb
))
269 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
271 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
274 /* No other active insn all the way to the start of the basic block. */
275 if (insn
== BB_HEAD (curr_bb
))
282 /* Return the active insn after INSN inside basic block CURR_BB. */
285 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
287 if (!insn
|| insn
== BB_END (curr_bb
))
290 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
292 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
295 /* No other active insn all the way to the end of the basic block. */
296 if (insn
== BB_END (curr_bb
))
303 /* Return the basic block reached by falling though the basic block BB. */
306 block_fallthru (basic_block bb
)
308 edge e
= find_fallthru_edge (bb
->succs
);
310 return (e
) ? e
->dest
: NULL_BLOCK
;
313 /* Return true if RTXs A and B can be safely interchanged. */
316 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
318 if (!rtx_equal_p (a
, b
))
321 if (GET_CODE (a
) != MEM
)
324 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
325 reference is not. Interchanging a dead type-unsafe memory reference with
326 a live type-safe one creates a live type-unsafe memory reference, in other
327 words, it makes the program illegal.
328 We check here conservatively whether the two memory references have equal
329 memory attributes. */
331 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
335 /* Go through a bunch of insns, converting them to conditional
336 execution format if possible. Return TRUE if all of the non-note
337 insns were processed. */
340 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
341 /* if block information */rtx_insn
*start
,
342 /* first insn to look at */rtx end
,
343 /* last insn to look at */rtx test
,
344 /* conditional execution test */int prob_val
,
345 /* probability of branch taken. */int mod_ok
)
347 int must_be_last
= FALSE
;
355 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
357 /* dwarf2out can't cope with conditional prologues. */
358 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
361 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
364 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
366 /* dwarf2out can't cope with conditional unwind info. */
367 if (RTX_FRAME_RELATED_P (insn
))
370 /* Remove USE insns that get in the way. */
371 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
373 /* ??? Ug. Actually unlinking the thing is problematic,
374 given what we'd have to coordinate with our callers. */
375 SET_INSN_DELETED (insn
);
379 /* Last insn wasn't last? */
383 if (modified_in_p (test
, insn
))
390 /* Now build the conditional form of the instruction. */
391 pattern
= PATTERN (insn
);
392 xtest
= copy_rtx (test
);
394 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
396 if (GET_CODE (pattern
) == COND_EXEC
)
398 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
401 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
402 COND_EXEC_TEST (pattern
));
403 pattern
= COND_EXEC_CODE (pattern
);
406 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
408 /* If the machine needs to modify the insn being conditionally executed,
409 say for example to force a constant integer operand into a temp
410 register, do so here. */
411 #ifdef IFCVT_MODIFY_INSN
412 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
417 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
419 if (CALL_P (insn
) && prob_val
>= 0)
420 validate_change (insn
, ®_NOTES (insn
),
421 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
422 prob_val
, REG_NOTES (insn
)), 1);
432 /* Return the condition for a jump. Do not do any special processing. */
435 cond_exec_get_condition (rtx_insn
*jump
)
439 if (any_condjump_p (jump
))
440 test_if
= SET_SRC (pc_set (jump
));
443 cond
= XEXP (test_if
, 0);
445 /* If this branches to JUMP_LABEL when the condition is false,
446 reverse the condition. */
447 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
448 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
450 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
454 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
461 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
462 to conditional execution. Return TRUE if we were successful at
463 converting the block. */
466 cond_exec_process_if_block (ce_if_block
* ce_info
,
467 /* if block information */int do_multiple_p
)
469 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
470 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
471 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
472 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
473 rtx_insn
*then_start
; /* first insn in THEN block */
474 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
475 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
476 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
477 int max
; /* max # of insns to convert. */
478 int then_mod_ok
; /* whether conditional mods are ok in THEN */
479 rtx true_expr
; /* test for else block insns */
480 rtx false_expr
; /* test for then block insns */
481 int true_prob_val
; /* probability of else block */
482 int false_prob_val
; /* probability of then block */
483 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
484 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
485 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
486 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
487 int then_n_insns
, else_n_insns
, n_insns
;
488 enum rtx_code false_code
;
491 /* If test is comprised of && or || elements, and we've failed at handling
492 all of them together, just use the last test if it is the special case of
493 && elements without an ELSE block. */
494 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
496 if (else_bb
|| ! ce_info
->and_and_p
)
499 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
500 ce_info
->num_multiple_test_blocks
= 0;
501 ce_info
->num_and_and_blocks
= 0;
502 ce_info
->num_or_or_blocks
= 0;
505 /* Find the conditional jump to the ELSE or JOIN part, and isolate
507 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
511 /* If the conditional jump is more than just a conditional jump,
512 then we can not do conditional execution conversion on this block. */
513 if (! onlyjump_p (BB_END (test_bb
)))
516 /* Collect the bounds of where we're to search, skipping any labels, jumps
517 and notes at the beginning and end of the block. Then count the total
518 number of insns and see if it is small enough to convert. */
519 then_start
= first_active_insn (then_bb
);
520 then_end
= last_active_insn (then_bb
, TRUE
);
521 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
522 n_insns
= then_n_insns
;
523 max
= MAX_CONDITIONAL_EXECUTE
;
530 else_start
= first_active_insn (else_bb
);
531 else_end
= last_active_insn (else_bb
, TRUE
);
532 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
533 n_insns
+= else_n_insns
;
535 /* Look for matching sequences at the head and tail of the two blocks,
536 and limit the range of insns to be converted if possible. */
537 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
538 &then_first_tail
, &else_first_tail
,
540 if (then_first_tail
== BB_HEAD (then_bb
))
541 then_start
= then_end
= NULL
;
542 if (else_first_tail
== BB_HEAD (else_bb
))
543 else_start
= else_end
= NULL
;
548 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
550 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
551 n_insns
-= 2 * n_matching
;
556 && then_n_insns
> n_matching
557 && else_n_insns
> n_matching
)
559 int longest_match
= MIN (then_n_insns
- n_matching
,
560 else_n_insns
- n_matching
);
562 = flow_find_head_matching_sequence (then_bb
, else_bb
,
571 /* We won't pass the insns in the head sequence to
572 cond_exec_process_insns, so we need to test them here
573 to make sure that they don't clobber the condition. */
574 for (insn
= BB_HEAD (then_bb
);
575 insn
!= NEXT_INSN (then_last_head
);
576 insn
= NEXT_INSN (insn
))
577 if (!LABEL_P (insn
) && !NOTE_P (insn
)
578 && !DEBUG_INSN_P (insn
)
579 && modified_in_p (test_expr
, insn
))
583 if (then_last_head
== then_end
)
584 then_start
= then_end
= NULL
;
585 if (else_last_head
== else_end
)
586 else_start
= else_end
= NULL
;
591 then_start
= find_active_insn_after (then_bb
, then_last_head
);
593 else_start
= find_active_insn_after (else_bb
, else_last_head
);
594 n_insns
-= 2 * n_matching
;
602 /* Map test_expr/test_jump into the appropriate MD tests to use on
603 the conditionally executed code. */
605 true_expr
= test_expr
;
607 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
608 if (false_code
!= UNKNOWN
)
609 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
610 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
612 false_expr
= NULL_RTX
;
614 #ifdef IFCVT_MODIFY_TESTS
615 /* If the machine description needs to modify the tests, such as setting a
616 conditional execution register from a comparison, it can do so here. */
617 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
619 /* See if the conversion failed. */
620 if (!true_expr
|| !false_expr
)
624 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
627 true_prob_val
= XINT (note
, 0);
628 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
636 /* If we have && or || tests, do them here. These tests are in the adjacent
637 blocks after the first block containing the test. */
638 if (ce_info
->num_multiple_test_blocks
> 0)
640 basic_block bb
= test_bb
;
641 basic_block last_test_bb
= ce_info
->last_test_bb
;
648 rtx_insn
*start
, *end
;
650 enum rtx_code f_code
;
652 bb
= block_fallthru (bb
);
653 start
= first_active_insn (bb
);
654 end
= last_active_insn (bb
, TRUE
);
656 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
657 false_prob_val
, FALSE
))
660 /* If the conditional jump is more than just a conditional jump, then
661 we can not do conditional execution conversion on this block. */
662 if (! onlyjump_p (BB_END (bb
)))
665 /* Find the conditional jump and isolate the test. */
666 t
= cond_exec_get_condition (BB_END (bb
));
670 f_code
= reversed_comparison_code (t
, BB_END (bb
));
671 if (f_code
== UNKNOWN
)
674 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
675 if (ce_info
->and_and_p
)
677 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
678 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
682 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
683 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
686 /* If the machine description needs to modify the tests, such as
687 setting a conditional execution register from a comparison, it can
689 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
690 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
692 /* See if the conversion failed. */
700 while (bb
!= last_test_bb
);
703 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
704 on then THEN block. */
705 then_mod_ok
= (else_bb
== NULL_BLOCK
);
707 /* Go through the THEN and ELSE blocks converting the insns if possible
708 to conditional execution. */
712 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
713 false_expr
, false_prob_val
,
717 if (else_bb
&& else_end
718 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
719 true_expr
, true_prob_val
, TRUE
))
722 /* If we cannot apply the changes, fail. Do not go through the normal fail
723 processing, since apply_change_group will call cancel_changes. */
724 if (! apply_change_group ())
726 #ifdef IFCVT_MODIFY_CANCEL
727 /* Cancel any machine dependent changes. */
728 IFCVT_MODIFY_CANCEL (ce_info
);
733 #ifdef IFCVT_MODIFY_FINAL
734 /* Do any machine dependent final modifications. */
735 IFCVT_MODIFY_FINAL (ce_info
);
738 /* Conversion succeeded. */
740 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
741 n_insns
, (n_insns
== 1) ? " was" : "s were");
743 /* Merge the blocks! If we had matching sequences, make sure to delete one
744 copy at the appropriate location first: delete the copy in the THEN branch
745 for a tail sequence so that the remaining one is executed last for both
746 branches, and delete the copy in the ELSE branch for a head sequence so
747 that the remaining one is executed first for both branches. */
750 rtx_insn
*from
= then_first_tail
;
752 from
= find_active_insn_after (then_bb
, from
);
753 delete_insn_chain (from
, BB_END (then_bb
), false);
756 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
758 merge_if_block (ce_info
);
759 cond_exec_changed_p
= TRUE
;
763 #ifdef IFCVT_MODIFY_CANCEL
764 /* Cancel any machine dependent changes. */
765 IFCVT_MODIFY_CANCEL (ce_info
);
772 /* Used by noce_process_if_block to communicate with its subroutines.
774 The subroutines know that A and B may be evaluated freely. They
775 know that X is a register. They should insert new instructions
776 before cond_earliest. */
780 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
781 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
783 /* The jump that ends TEST_BB. */
786 /* The jump condition. */
789 /* New insns should be inserted before this one. */
790 rtx_insn
*cond_earliest
;
792 /* Insns in the THEN and ELSE block. There is always just this
793 one insns in those blocks. The insns are single_set insns.
794 If there was no ELSE block, INSN_B is the last insn before
795 COND_EARLIEST, or NULL_RTX. In the former case, the insn
796 operands are still valid, as if INSN_B was moved down below
798 rtx_insn
*insn_a
, *insn_b
;
800 /* The SET_SRC of INSN_A and INSN_B. */
803 /* The SET_DEST of INSN_A. */
806 /* True if this if block is not canonical. In the canonical form of
807 if blocks, the THEN_BB is the block reached via the fallthru edge
808 from TEST_BB. For the noce transformations, we allow the symmetric
810 bool then_else_reversed
;
812 /* True if the contents of then_bb and else_bb are a
813 simple single set instruction. */
817 /* The total rtx cost of the instructions in then_bb and else_bb. */
818 unsigned int then_cost
;
819 unsigned int else_cost
;
821 /* Estimated cost of the particular branch instruction. */
822 unsigned int branch_cost
;
825 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
826 static int noce_try_move (struct noce_if_info
*);
827 static int noce_try_store_flag (struct noce_if_info
*);
828 static int noce_try_addcc (struct noce_if_info
*);
829 static int noce_try_store_flag_constants (struct noce_if_info
*);
830 static int noce_try_store_flag_mask (struct noce_if_info
*);
831 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
833 static int noce_try_cmove (struct noce_if_info
*);
834 static int noce_try_cmove_arith (struct noce_if_info
*);
835 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
836 static int noce_try_minmax (struct noce_if_info
*);
837 static int noce_try_abs (struct noce_if_info
*);
838 static int noce_try_sign_mask (struct noce_if_info
*);
840 /* Helper function for noce_try_store_flag*. */
843 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
846 rtx cond
= if_info
->cond
;
850 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
851 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
853 /* If earliest == jump, or when the condition is complex, try to
854 build the store_flag insn directly. */
858 rtx set
= pc_set (if_info
->jump
);
859 cond
= XEXP (SET_SRC (set
), 0);
860 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
861 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
862 reversep
= !reversep
;
863 if (if_info
->then_else_reversed
)
864 reversep
= !reversep
;
868 code
= reversed_comparison_code (cond
, if_info
->jump
);
870 code
= GET_CODE (cond
);
872 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
873 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
875 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
877 rtx set
= gen_rtx_SET (x
, src
);
880 rtx_insn
*insn
= emit_insn (set
);
882 if (recog_memoized (insn
) >= 0)
884 rtx_insn
*seq
= get_insns ();
888 if_info
->cond_earliest
= if_info
->jump
;
896 /* Don't even try if the comparison operands or the mode of X are weird. */
897 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
900 return emit_store_flag (x
, code
, XEXP (cond
, 0),
901 XEXP (cond
, 1), VOIDmode
,
902 (code
== LTU
|| code
== LEU
903 || code
== GEU
|| code
== GTU
), normalize
);
906 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
907 X is the destination/target and Y is the value to copy. */
910 noce_emit_move_insn (rtx x
, rtx y
)
912 machine_mode outmode
;
916 if (GET_CODE (x
) != STRICT_LOW_PART
)
918 rtx_insn
*seq
, *insn
;
923 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
924 otherwise construct a suitable SET pattern ourselves. */
925 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
926 ? emit_move_insn (x
, y
)
927 : emit_insn (gen_rtx_SET (x
, y
));
931 if (recog_memoized (insn
) <= 0)
933 if (GET_CODE (x
) == ZERO_EXTRACT
)
935 rtx op
= XEXP (x
, 0);
936 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
937 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
939 /* store_bit_field expects START to be relative to
940 BYTES_BIG_ENDIAN and adjusts this value for machines with
941 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
942 invoke store_bit_field again it is necessary to have the START
943 value from the first call. */
944 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
947 start
= BITS_PER_UNIT
- start
- size
;
950 gcc_assert (REG_P (op
));
951 start
= BITS_PER_WORD
- start
- size
;
955 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
956 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
);
960 switch (GET_RTX_CLASS (GET_CODE (y
)))
963 ot
= code_to_optab (GET_CODE (y
));
967 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
968 if (target
!= NULL_RTX
)
971 emit_move_insn (x
, target
);
980 ot
= code_to_optab (GET_CODE (y
));
984 target
= expand_binop (GET_MODE (y
), ot
,
985 XEXP (y
, 0), XEXP (y
, 1),
987 if (target
!= NULL_RTX
)
990 emit_move_insn (x
, target
);
1006 outer
= XEXP (x
, 0);
1007 inner
= XEXP (outer
, 0);
1008 outmode
= GET_MODE (outer
);
1009 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1010 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1014 /* Return the CC reg if it is used in COND. */
1017 cc_in_cond (rtx cond
)
1019 if (have_cbranchcc4
&& cond
1020 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1021 return XEXP (cond
, 0);
1026 /* Return sequence of instructions generated by if conversion. This
1027 function calls end_sequence() to end the current stream, ensures
1028 that the instructions are unshared, recognizable non-jump insns.
1029 On failure, this function returns a NULL_RTX. */
1032 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1035 rtx_insn
*seq
= get_insns ();
1036 rtx cc
= cc_in_cond (if_info
->cond
);
1038 set_used_flags (if_info
->x
);
1039 set_used_flags (if_info
->cond
);
1040 set_used_flags (if_info
->a
);
1041 set_used_flags (if_info
->b
);
1043 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1044 set_used_flags (insn
);
1046 unshare_all_rtl_in_chain (seq
);
1049 /* Make sure that all of the instructions emitted are recognizable,
1050 and that we haven't introduced a new jump instruction.
1051 As an exercise for the reader, build a general mechanism that
1052 allows proper placement of required clobbers. */
1053 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1055 || recog_memoized (insn
) == -1
1056 /* Make sure new generated code does not clobber CC. */
1057 || (cc
&& set_of (cc
, insn
)))
1063 /* Return true iff the then and else basic block (if it exists)
1064 consist of a single simple set instruction. */
1067 noce_simple_bbs (struct noce_if_info
*if_info
)
1069 if (!if_info
->then_simple
)
1072 if (if_info
->else_bb
)
1073 return if_info
->else_simple
;
1078 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1079 "if (a == b) x = a; else x = b" into "x = b". */
1082 noce_try_move (struct noce_if_info
*if_info
)
1084 rtx cond
= if_info
->cond
;
1085 enum rtx_code code
= GET_CODE (cond
);
1089 if (code
!= NE
&& code
!= EQ
)
1092 if (!noce_simple_bbs (if_info
))
1095 /* This optimization isn't valid if either A or B could be a NaN
1096 or a signed zero. */
1097 if (HONOR_NANS (if_info
->x
)
1098 || HONOR_SIGNED_ZEROS (if_info
->x
))
1101 /* Check whether the operands of the comparison are A and in
1103 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1104 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1105 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1106 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1108 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1111 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1113 /* Avoid generating the move if the source is the destination. */
1114 if (! rtx_equal_p (if_info
->x
, y
))
1117 noce_emit_move_insn (if_info
->x
, y
);
1118 seq
= end_ifcvt_sequence (if_info
);
1122 emit_insn_before_setloc (seq
, if_info
->jump
,
1123 INSN_LOCATION (if_info
->insn_a
));
1130 /* Convert "if (test) x = 1; else x = 0".
1132 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1133 tried in noce_try_store_flag_constants after noce_try_cmove has had
1134 a go at the conversion. */
1137 noce_try_store_flag (struct noce_if_info
*if_info
)
1143 if (!noce_simple_bbs (if_info
))
1146 if (CONST_INT_P (if_info
->b
)
1147 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1148 && if_info
->a
== const0_rtx
)
1150 else if (if_info
->b
== const0_rtx
1151 && CONST_INT_P (if_info
->a
)
1152 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1153 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1161 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1164 if (target
!= if_info
->x
)
1165 noce_emit_move_insn (if_info
->x
, target
);
1167 seq
= end_ifcvt_sequence (if_info
);
1171 emit_insn_before_setloc (seq
, if_info
->jump
,
1172 INSN_LOCATION (if_info
->insn_a
));
1182 /* Convert "if (test) x = a; else x = b", for A and B constant.
1183 Also allow A = y + c1, B = y + c2, with a common y between A
1187 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1192 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1195 machine_mode mode
= GET_MODE (if_info
->x
);;
1196 rtx common
= NULL_RTX
;
1201 /* Handle cases like x := test ? y + 3 : y + 4. */
1202 if (GET_CODE (a
) == PLUS
1203 && GET_CODE (b
) == PLUS
1204 && CONST_INT_P (XEXP (a
, 1))
1205 && CONST_INT_P (XEXP (b
, 1))
1206 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1207 && noce_operand_ok (XEXP (a
, 0))
1208 && if_info
->branch_cost
>= 2)
1210 common
= XEXP (a
, 0);
1215 if (!noce_simple_bbs (if_info
))
1221 ifalse
= INTVAL (a
);
1223 bool subtract_flag_p
= false;
1225 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1226 /* Make sure we can represent the difference between the two values. */
1228 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1231 diff
= trunc_int_for_mode (diff
, mode
);
1233 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1237 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1240 /* We could collapse these cases but it is easier to follow the
1241 diff/STORE_FLAG_VALUE combinations when they are listed
1245 => 4 + (test != 0). */
1246 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1249 => can_reverse | 4 + (test == 0)
1250 !can_reverse | 3 - (test != 0). */
1251 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1253 reversep
= can_reverse
;
1254 subtract_flag_p
= !can_reverse
;
1255 /* If we need to subtract the flag and we have PLUS-immediate
1256 A and B then it is unlikely to be beneficial to play tricks
1258 if (subtract_flag_p
&& common
)
1262 => can_reverse | 3 + (test == 0)
1263 !can_reverse | 4 - (test != 0). */
1264 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1266 reversep
= can_reverse
;
1267 subtract_flag_p
= !can_reverse
;
1268 /* If we need to subtract the flag and we have PLUS-immediate
1269 A and B then it is unlikely to be beneficial to play tricks
1271 if (subtract_flag_p
&& common
)
1275 => 4 + (test != 0). */
1276 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1281 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1282 && (STORE_FLAG_VALUE
== 1
1283 || if_info
->branch_cost
>= 2))
1285 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1286 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1291 else if (itrue
== -1
1292 && (STORE_FLAG_VALUE
== -1
1293 || if_info
->branch_cost
>= 2))
1295 else if (ifalse
== -1 && can_reverse
1296 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1306 std::swap (itrue
, ifalse
);
1307 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1312 /* If we have x := test ? x + 3 : x + 4 then move the original
1313 x out of the way while we store flags. */
1314 if (common
&& rtx_equal_p (common
, if_info
->x
))
1316 common
= gen_reg_rtx (mode
);
1317 noce_emit_move_insn (common
, if_info
->x
);
1320 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1327 /* if (test) x = 3; else x = 4;
1328 => x = 3 + (test == 0); */
1329 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1331 /* Add the common part now. This may allow combine to merge this
1332 with the store flag operation earlier into some sort of conditional
1333 increment/decrement if the target allows it. */
1335 target
= expand_simple_binop (mode
, PLUS
,
1337 target
, 0, OPTAB_WIDEN
);
1339 /* Always use ifalse here. It should have been swapped with itrue
1340 when appropriate when reversep is true. */
1341 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1342 gen_int_mode (ifalse
, mode
), target
,
1343 if_info
->x
, 0, OPTAB_WIDEN
);
1345 /* Other cases are not beneficial when the original A and B are PLUS
1352 /* if (test) x = 8; else x = 0;
1353 => x = (test != 0) << 3; */
1354 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1356 target
= expand_simple_binop (mode
, ASHIFT
,
1357 target
, GEN_INT (tmp
), if_info
->x
, 0,
1361 /* if (test) x = -1; else x = b;
1362 => x = -(test != 0) | b; */
1363 else if (itrue
== -1)
1365 target
= expand_simple_binop (mode
, IOR
,
1366 target
, gen_int_mode (ifalse
, mode
),
1367 if_info
->x
, 0, OPTAB_WIDEN
);
1381 if (target
!= if_info
->x
)
1382 noce_emit_move_insn (if_info
->x
, target
);
1384 seq
= end_ifcvt_sequence (if_info
);
1388 emit_insn_before_setloc (seq
, if_info
->jump
,
1389 INSN_LOCATION (if_info
->insn_a
));
1396 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1397 similarly for "foo--". */
1400 noce_try_addcc (struct noce_if_info
*if_info
)
1404 int subtract
, normalize
;
1406 if (!noce_simple_bbs (if_info
))
1409 if (GET_CODE (if_info
->a
) == PLUS
1410 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1411 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1414 rtx cond
= if_info
->cond
;
1415 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1417 /* First try to use addcc pattern. */
1418 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1419 && general_operand (XEXP (cond
, 1), VOIDmode
))
1422 target
= emit_conditional_add (if_info
->x
, code
,
1427 XEXP (if_info
->a
, 1),
1428 GET_MODE (if_info
->x
),
1429 (code
== LTU
|| code
== GEU
1430 || code
== LEU
|| code
== GTU
));
1433 if (target
!= if_info
->x
)
1434 noce_emit_move_insn (if_info
->x
, target
);
1436 seq
= end_ifcvt_sequence (if_info
);
1440 emit_insn_before_setloc (seq
, if_info
->jump
,
1441 INSN_LOCATION (if_info
->insn_a
));
1447 /* If that fails, construct conditional increment or decrement using
1449 if (if_info
->branch_cost
>= 2
1450 && (XEXP (if_info
->a
, 1) == const1_rtx
1451 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1454 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1455 subtract
= 0, normalize
= 0;
1456 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1457 subtract
= 1, normalize
= 0;
1459 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1462 target
= noce_emit_store_flag (if_info
,
1463 gen_reg_rtx (GET_MODE (if_info
->x
)),
1467 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1468 subtract
? MINUS
: PLUS
,
1469 if_info
->b
, target
, if_info
->x
,
1473 if (target
!= if_info
->x
)
1474 noce_emit_move_insn (if_info
->x
, target
);
1476 seq
= end_ifcvt_sequence (if_info
);
1480 emit_insn_before_setloc (seq
, if_info
->jump
,
1481 INSN_LOCATION (if_info
->insn_a
));
1491 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1494 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1500 if (!noce_simple_bbs (if_info
))
1504 if ((if_info
->branch_cost
>= 2
1505 || STORE_FLAG_VALUE
== -1)
1506 && ((if_info
->a
== const0_rtx
1507 && rtx_equal_p (if_info
->b
, if_info
->x
))
1508 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1511 && if_info
->b
== const0_rtx
1512 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1515 target
= noce_emit_store_flag (if_info
,
1516 gen_reg_rtx (GET_MODE (if_info
->x
)),
1519 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1521 target
, if_info
->x
, 0,
1526 int old_cost
, new_cost
, insn_cost
;
1529 if (target
!= if_info
->x
)
1530 noce_emit_move_insn (if_info
->x
, target
);
1532 seq
= end_ifcvt_sequence (if_info
);
1536 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1537 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1538 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1539 new_cost
= seq_cost (seq
, speed_p
);
1541 if (new_cost
> old_cost
)
1544 emit_insn_before_setloc (seq
, if_info
->jump
,
1545 INSN_LOCATION (if_info
->insn_a
));
1555 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1558 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1559 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1561 rtx target ATTRIBUTE_UNUSED
;
1562 int unsignedp ATTRIBUTE_UNUSED
;
1564 /* If earliest == jump, try to build the cmove insn directly.
1565 This is helpful when combine has created some complex condition
1566 (like for alpha's cmovlbs) that we can't hope to regenerate
1567 through the normal interface. */
1569 if (if_info
->cond_earliest
== if_info
->jump
)
1571 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1572 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1573 cond
, vtrue
, vfalse
);
1574 rtx set
= gen_rtx_SET (x
, if_then_else
);
1577 rtx_insn
*insn
= emit_insn (set
);
1579 if (recog_memoized (insn
) >= 0)
1581 rtx_insn
*seq
= get_insns ();
1591 /* Don't even try if the comparison operands are weird
1592 except that the target supports cbranchcc4. */
1593 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1594 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1596 if (!have_cbranchcc4
1597 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1598 || cmp_b
!= const0_rtx
)
1602 unsignedp
= (code
== LTU
|| code
== GEU
1603 || code
== LEU
|| code
== GTU
);
1605 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1606 vtrue
, vfalse
, GET_MODE (x
),
1611 /* We might be faced with a situation like:
1614 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1615 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1617 We can't do a conditional move in mode M, but it's possible that we
1618 could do a conditional move in mode N instead and take a subreg of
1621 If we can't create new pseudos, though, don't bother. */
1622 if (reload_completed
)
1625 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1627 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1628 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1629 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1630 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1631 rtx promoted_target
;
1633 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1634 || byte_vtrue
!= byte_vfalse
1635 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1636 != SUBREG_PROMOTED_VAR_P (vfalse
))
1637 || (SUBREG_PROMOTED_GET (vtrue
)
1638 != SUBREG_PROMOTED_GET (vfalse
)))
1641 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1643 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1644 VOIDmode
, reg_vtrue
, reg_vfalse
,
1645 GET_MODE (reg_vtrue
), unsignedp
);
1646 /* Nope, couldn't do it in that mode either. */
1650 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1651 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1652 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1653 emit_move_insn (x
, target
);
1660 /* Try only simple constants and registers here. More complex cases
1661 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1662 has had a go at it. */
1665 noce_try_cmove (struct noce_if_info
*if_info
)
1671 if (!noce_simple_bbs (if_info
))
1674 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1675 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1679 code
= GET_CODE (if_info
->cond
);
1680 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1681 XEXP (if_info
->cond
, 0),
1682 XEXP (if_info
->cond
, 1),
1683 if_info
->a
, if_info
->b
);
1687 if (target
!= if_info
->x
)
1688 noce_emit_move_insn (if_info
->x
, target
);
1690 seq
= end_ifcvt_sequence (if_info
);
1694 emit_insn_before_setloc (seq
, if_info
->jump
,
1695 INSN_LOCATION (if_info
->insn_a
));
1698 /* If both a and b are constants try a last-ditch transformation:
1699 if (test) x = a; else x = b;
1700 => x = (-(test != 0) & (b - a)) + a;
1701 Try this only if the target-specific expansion above has failed.
1702 The target-specific expander may want to generate sequences that
1703 we don't know about, so give them a chance before trying this
1705 else if (!targetm
.have_conditional_execution ()
1706 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1707 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1708 || if_info
->branch_cost
>= 3))
1710 machine_mode mode
= GET_MODE (if_info
->x
);
1711 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1712 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1713 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1720 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1721 /* Make sure we can represent the difference
1722 between the two values. */
1724 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1730 diff
= trunc_int_for_mode (diff
, mode
);
1731 target
= expand_simple_binop (mode
, AND
,
1732 target
, gen_int_mode (diff
, mode
),
1733 if_info
->x
, 0, OPTAB_WIDEN
);
1735 target
= expand_simple_binop (mode
, PLUS
,
1736 target
, gen_int_mode (ifalse
, mode
),
1737 if_info
->x
, 0, OPTAB_WIDEN
);
1740 if (target
!= if_info
->x
)
1741 noce_emit_move_insn (if_info
->x
, target
);
1743 seq
= end_ifcvt_sequence (if_info
);
1747 emit_insn_before_setloc (seq
, if_info
->jump
,
1748 INSN_LOCATION (if_info
->insn_a
));
1764 /* Helper for bb_valid_for_noce_process_p. Validate that
1765 the rtx insn INSN is a single set that does not set
1766 the conditional register CC and is in general valid for
1770 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1773 || !NONJUMP_INSN_P (insn
)
1774 || (cc
&& set_of (cc
, insn
)))
1777 rtx sset
= single_set (insn
);
1779 /* Currently support only simple single sets in test_bb. */
1781 || !noce_operand_ok (SET_DEST (sset
))
1782 || !noce_operand_ok (SET_SRC (sset
)))
1789 /* Return true iff the registers that the insns in BB_A set do not
1790 get used in BB_B. */
1793 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
)
1796 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1801 FOR_BB_INSNS (bb_a
, a_insn
)
1803 if (!active_insn_p (a_insn
))
1806 rtx sset_a
= single_set (a_insn
);
1810 BITMAP_FREE (bba_sets
);
1814 /* Record all registers that BB_A sets. */
1815 FOR_EACH_INSN_DEF (def
, a_insn
)
1816 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1821 FOR_BB_INSNS (bb_b
, b_insn
)
1823 if (!active_insn_p (b_insn
))
1826 rtx sset_b
= single_set (b_insn
);
1830 BITMAP_FREE (bba_sets
);
1834 /* Make sure this is a REG and not some instance
1835 of ZERO_EXTRACT or SUBREG or other dangerous stuff. */
1836 if (!REG_P (SET_DEST (sset_b
)))
1838 BITMAP_FREE (bba_sets
);
1842 /* If the insn uses a reg set in BB_A return false. */
1843 FOR_EACH_INSN_USE (use
, b_insn
)
1845 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1847 BITMAP_FREE (bba_sets
);
1854 BITMAP_FREE (bba_sets
);
1858 /* Emit copies of all the active instructions in BB except the last.
1859 This is a helper for noce_try_cmove_arith. */
1862 noce_emit_all_but_last (basic_block bb
)
1864 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1866 FOR_BB_INSNS (bb
, insn
)
1868 if (insn
!= last
&& active_insn_p (insn
))
1870 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1872 emit_insn (PATTERN (to_emit
));
1877 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1878 the resulting insn or NULL if it's not a valid insn. */
1881 noce_emit_insn (rtx to_emit
)
1883 gcc_assert (to_emit
);
1884 rtx_insn
*insn
= emit_insn (to_emit
);
1886 if (recog_memoized (insn
) < 0)
1892 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1893 and including the penultimate one in BB if it is not simple
1894 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1895 insn in the block. The reason for that is that LAST_INSN may
1896 have been modified by the preparation in noce_try_cmove_arith. */
1899 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1902 noce_emit_all_but_last (bb
);
1904 if (last_insn
&& !noce_emit_insn (last_insn
))
1910 /* Try more complex cases involving conditional_move. */
1913 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1919 rtx_insn
*insn_a
, *insn_b
;
1920 bool a_simple
= if_info
->then_simple
;
1921 bool b_simple
= if_info
->else_simple
;
1922 basic_block then_bb
= if_info
->then_bb
;
1923 basic_block else_bb
= if_info
->else_bb
;
1927 rtx_insn
*ifcvt_seq
;
1929 /* A conditional move from two memory sources is equivalent to a
1930 conditional on their addresses followed by a load. Don't do this
1931 early because it'll screw alias analysis. Note that we've
1932 already checked for no side effects. */
1933 /* ??? FIXME: Magic number 5. */
1934 if (cse_not_expected
1935 && MEM_P (a
) && MEM_P (b
)
1936 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1937 && if_info
->branch_cost
>= 5)
1939 machine_mode address_mode
= get_address_mode (a
);
1943 x
= gen_reg_rtx (address_mode
);
1947 /* ??? We could handle this if we knew that a load from A or B could
1948 not trap or fault. This is also true if we've already loaded
1949 from the address along the path from ENTRY. */
1950 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1953 /* if (test) x = a + b; else x = c - d;
1960 code
= GET_CODE (if_info
->cond
);
1961 insn_a
= if_info
->insn_a
;
1962 insn_b
= if_info
->insn_b
;
1964 unsigned int then_cost
;
1965 unsigned int else_cost
;
1967 then_cost
= if_info
->then_cost
;
1972 else_cost
= if_info
->else_cost
;
1976 /* We're going to execute one of the basic blocks anyway, so
1977 bail out if the most expensive of the two blocks is unacceptable. */
1978 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
1981 /* Possibly rearrange operands to make things come out more natural. */
1982 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
1985 if (rtx_equal_p (b
, x
))
1987 else if (general_operand (b
, GET_MODE (b
)))
1992 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
1994 std::swap (insn_a
, insn_b
);
1995 std::swap (a_simple
, b_simple
);
1996 std::swap (then_bb
, else_bb
);
2000 if (!a_simple
&& then_bb
&& !b_simple
&& else_bb
2001 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
)
2002 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
)))
2010 rtx emit_a
= NULL_RTX
;
2011 rtx emit_b
= NULL_RTX
;
2013 /* If either operand is complex, load it into a register first.
2014 The best way to do this is to copy the original insn. In this
2015 way we preserve any clobbers etc that the insn may have had.
2016 This is of course not possible in the IS_MEM case. */
2018 if (! general_operand (a
, GET_MODE (a
)))
2023 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2024 emit_a
= gen_rtx_SET (reg
, a
);
2027 goto end_seq_and_fail
;
2030 a
= gen_reg_rtx (GET_MODE (a
));
2031 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2032 rtx set
= single_set (copy_of_a
);
2035 emit_a
= PATTERN (copy_of_a
);
2039 if (! general_operand (b
, GET_MODE (b
)))
2043 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2044 emit_b
= gen_rtx_SET (reg
, b
);
2047 goto end_seq_and_fail
;
2050 b
= gen_reg_rtx (GET_MODE (b
));
2051 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2052 rtx set
= single_set (copy_of_b
);
2055 emit_b
= PATTERN (copy_of_b
);
2059 /* If insn to set up A clobbers any registers B depends on, try to
2060 swap insn that sets up A with the one that sets up B. If even
2061 that doesn't help, punt. */
2063 if (emit_a
&& modified_in_p (orig_b
, emit_a
))
2065 if (modified_in_p (orig_a
, emit_b
))
2066 goto end_seq_and_fail
;
2068 if (else_bb
&& !b_simple
)
2070 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2071 goto end_seq_and_fail
;
2074 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2075 goto end_seq_and_fail
;
2079 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2080 goto end_seq_and_fail
;
2082 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2083 goto end_seq_and_fail
;
2087 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2088 XEXP (if_info
->cond
, 1), a
, b
);
2091 goto end_seq_and_fail
;
2093 /* If we're handling a memory for above, emit the load now. */
2096 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2098 /* Copy over flags as appropriate. */
2099 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2100 MEM_VOLATILE_P (mem
) = 1;
2101 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2102 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2104 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2106 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2107 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2109 noce_emit_move_insn (if_info
->x
, mem
);
2111 else if (target
!= x
)
2112 noce_emit_move_insn (x
, target
);
2114 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2118 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2119 INSN_LOCATION (if_info
->insn_a
));
2127 /* For most cases, the simplified condition we found is the best
2128 choice, but this is not the case for the min/max/abs transforms.
2129 For these we wish to know that it is A or B in the condition. */
2132 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2133 rtx_insn
**earliest
)
2139 /* If target is already mentioned in the known condition, return it. */
2140 if (reg_mentioned_p (target
, if_info
->cond
))
2142 *earliest
= if_info
->cond_earliest
;
2143 return if_info
->cond
;
2146 set
= pc_set (if_info
->jump
);
2147 cond
= XEXP (SET_SRC (set
), 0);
2149 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2150 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2151 if (if_info
->then_else_reversed
)
2154 /* If we're looking for a constant, try to make the conditional
2155 have that constant in it. There are two reasons why it may
2156 not have the constant we want:
2158 1. GCC may have needed to put the constant in a register, because
2159 the target can't compare directly against that constant. For
2160 this case, we look for a SET immediately before the comparison
2161 that puts a constant in that register.
2163 2. GCC may have canonicalized the conditional, for example
2164 replacing "if x < 4" with "if x <= 3". We can undo that (or
2165 make equivalent types of changes) to get the constants we need
2166 if they're off by one in the right direction. */
2168 if (CONST_INT_P (target
))
2170 enum rtx_code code
= GET_CODE (if_info
->cond
);
2171 rtx op_a
= XEXP (if_info
->cond
, 0);
2172 rtx op_b
= XEXP (if_info
->cond
, 1);
2173 rtx_insn
*prev_insn
;
2175 /* First, look to see if we put a constant in a register. */
2176 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2178 && BLOCK_FOR_INSN (prev_insn
)
2179 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2180 && INSN_P (prev_insn
)
2181 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2183 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2185 src
= SET_SRC (PATTERN (prev_insn
));
2186 if (CONST_INT_P (src
))
2188 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2190 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2193 if (CONST_INT_P (op_a
))
2195 std::swap (op_a
, op_b
);
2196 code
= swap_condition (code
);
2201 /* Now, look to see if we can get the right constant by
2202 adjusting the conditional. */
2203 if (CONST_INT_P (op_b
))
2205 HOST_WIDE_INT desired_val
= INTVAL (target
);
2206 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2211 if (actual_val
== desired_val
+ 1)
2214 op_b
= GEN_INT (desired_val
);
2218 if (actual_val
== desired_val
- 1)
2221 op_b
= GEN_INT (desired_val
);
2225 if (actual_val
== desired_val
- 1)
2228 op_b
= GEN_INT (desired_val
);
2232 if (actual_val
== desired_val
+ 1)
2235 op_b
= GEN_INT (desired_val
);
2243 /* If we made any changes, generate a new conditional that is
2244 equivalent to what we started with, but has the right
2246 if (code
!= GET_CODE (if_info
->cond
)
2247 || op_a
!= XEXP (if_info
->cond
, 0)
2248 || op_b
!= XEXP (if_info
->cond
, 1))
2250 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2251 *earliest
= if_info
->cond_earliest
;
2256 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2257 earliest
, target
, have_cbranchcc4
, true);
2258 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2261 /* We almost certainly searched back to a different place.
2262 Need to re-verify correct lifetimes. */
2264 /* X may not be mentioned in the range (cond_earliest, jump]. */
2265 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2266 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2269 /* A and B may not be modified in the range [cond_earliest, jump). */
2270 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2272 && (modified_in_p (if_info
->a
, insn
)
2273 || modified_in_p (if_info
->b
, insn
)))
2279 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2282 noce_try_minmax (struct noce_if_info
*if_info
)
2285 rtx_insn
*earliest
, *seq
;
2286 enum rtx_code code
, op
;
2289 if (!noce_simple_bbs (if_info
))
2292 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2293 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2294 to get the target to tell us... */
2295 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2296 || HONOR_NANS (if_info
->x
))
2299 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2303 /* Verify the condition is of the form we expect, and canonicalize
2304 the comparison code. */
2305 code
= GET_CODE (cond
);
2306 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2308 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2311 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2313 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2315 code
= swap_condition (code
);
2320 /* Determine what sort of operation this is. Note that the code is for
2321 a taken branch, so the code->operation mapping appears backwards. */
2354 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2355 if_info
->a
, if_info
->b
,
2356 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2362 if (target
!= if_info
->x
)
2363 noce_emit_move_insn (if_info
->x
, target
);
2365 seq
= end_ifcvt_sequence (if_info
);
2369 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2370 if_info
->cond
= cond
;
2371 if_info
->cond_earliest
= earliest
;
2376 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2377 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2381 noce_try_abs (struct noce_if_info
*if_info
)
2383 rtx cond
, target
, a
, b
, c
;
2384 rtx_insn
*earliest
, *seq
;
2386 bool one_cmpl
= false;
2388 if (!noce_simple_bbs (if_info
))
2391 /* Reject modes with signed zeros. */
2392 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2395 /* Recognize A and B as constituting an ABS or NABS. The canonical
2396 form is a branch around the negation, taken when the object is the
2397 first operand of a comparison against 0 that evaluates to true. */
2400 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2402 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2407 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2412 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2421 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2425 /* Verify the condition is of the form we expect. */
2426 if (rtx_equal_p (XEXP (cond
, 0), b
))
2428 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2436 /* Verify that C is zero. Search one step backward for a
2437 REG_EQUAL note or a simple source if necessary. */
2441 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2443 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2444 && (set
= single_set (insn
))
2445 && rtx_equal_p (SET_DEST (set
), c
))
2447 rtx note
= find_reg_equal_equiv_note (insn
);
2457 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2458 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2459 c
= get_pool_constant (XEXP (c
, 0));
2461 /* Work around funny ideas get_condition has wrt canonicalization.
2462 Note that these rtx constants are known to be CONST_INT, and
2463 therefore imply integer comparisons. */
2464 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2466 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2468 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2471 /* Determine what sort of operation this is. */
2472 switch (GET_CODE (cond
))
2491 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2494 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2496 /* ??? It's a quandary whether cmove would be better here, especially
2497 for integers. Perhaps combine will clean things up. */
2498 if (target
&& negate
)
2501 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2504 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2514 if (target
!= if_info
->x
)
2515 noce_emit_move_insn (if_info
->x
, target
);
2517 seq
= end_ifcvt_sequence (if_info
);
2521 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2522 if_info
->cond
= cond
;
2523 if_info
->cond_earliest
= earliest
;
2528 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2531 noce_try_sign_mask (struct noce_if_info
*if_info
)
2537 bool t_unconditional
;
2539 if (!noce_simple_bbs (if_info
))
2542 cond
= if_info
->cond
;
2543 code
= GET_CODE (cond
);
2548 if (if_info
->a
== const0_rtx
)
2550 if ((code
== LT
&& c
== const0_rtx
)
2551 || (code
== LE
&& c
== constm1_rtx
))
2554 else if (if_info
->b
== const0_rtx
)
2556 if ((code
== GE
&& c
== const0_rtx
)
2557 || (code
== GT
&& c
== constm1_rtx
))
2561 if (! t
|| side_effects_p (t
))
2564 /* We currently don't handle different modes. */
2565 mode
= GET_MODE (t
);
2566 if (GET_MODE (m
) != mode
)
2569 /* This is only profitable if T is unconditionally executed/evaluated in the
2570 original insn sequence or T is cheap. The former happens if B is the
2571 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2572 INSN_B which can happen for e.g. conditional stores to memory. For the
2573 cost computation use the block TEST_BB where the evaluation will end up
2574 after the transformation. */
2577 && (if_info
->insn_b
== NULL_RTX
2578 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2579 if (!(t_unconditional
2580 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2581 < COSTS_N_INSNS (2))))
2585 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2586 "(signed) m >> 31" directly. This benefits targets with specialized
2587 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2588 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2589 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2598 noce_emit_move_insn (if_info
->x
, t
);
2600 seq
= end_ifcvt_sequence (if_info
);
2604 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2609 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2613 noce_try_bitop (struct noce_if_info
*if_info
)
2615 rtx cond
, x
, a
, result
;
2622 cond
= if_info
->cond
;
2623 code
= GET_CODE (cond
);
2625 if (!noce_simple_bbs (if_info
))
2628 /* Check for no else condition. */
2629 if (! rtx_equal_p (x
, if_info
->b
))
2632 /* Check for a suitable condition. */
2633 if (code
!= NE
&& code
!= EQ
)
2635 if (XEXP (cond
, 1) != const0_rtx
)
2637 cond
= XEXP (cond
, 0);
2639 /* ??? We could also handle AND here. */
2640 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2642 if (XEXP (cond
, 1) != const1_rtx
2643 || !CONST_INT_P (XEXP (cond
, 2))
2644 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2646 bitnum
= INTVAL (XEXP (cond
, 2));
2647 mode
= GET_MODE (x
);
2648 if (BITS_BIG_ENDIAN
)
2649 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2650 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2657 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2659 /* Check for "if (X & C) x = x op C". */
2660 if (! rtx_equal_p (x
, XEXP (a
, 0))
2661 || !CONST_INT_P (XEXP (a
, 1))
2662 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2663 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2666 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2667 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2668 if (GET_CODE (a
) == IOR
)
2669 result
= (code
== NE
) ? a
: NULL_RTX
;
2670 else if (code
== NE
)
2672 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2673 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2674 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2678 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2679 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2680 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2683 else if (GET_CODE (a
) == AND
)
2685 /* Check for "if (X & C) x &= ~C". */
2686 if (! rtx_equal_p (x
, XEXP (a
, 0))
2687 || !CONST_INT_P (XEXP (a
, 1))
2688 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2689 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2692 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2693 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2694 result
= (code
== EQ
) ? a
: NULL_RTX
;
2702 noce_emit_move_insn (x
, result
);
2703 seq
= end_ifcvt_sequence (if_info
);
2707 emit_insn_before_setloc (seq
, if_info
->jump
,
2708 INSN_LOCATION (if_info
->insn_a
));
2714 /* Similar to get_condition, only the resulting condition must be
2715 valid at JUMP, instead of at EARLIEST.
2717 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2718 THEN block of the caller, and we have to reverse the condition. */
2721 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2726 if (! any_condjump_p (jump
))
2729 set
= pc_set (jump
);
2731 /* If this branches to JUMP_LABEL when the condition is false,
2732 reverse the condition. */
2733 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2734 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2736 /* We may have to reverse because the caller's if block is not canonical,
2737 i.e. the THEN block isn't the fallthrough block for the TEST block
2738 (see find_if_header). */
2739 if (then_else_reversed
)
2742 /* If the condition variable is a register and is MODE_INT, accept it. */
2744 cond
= XEXP (SET_SRC (set
), 0);
2745 tmp
= XEXP (cond
, 0);
2746 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2747 && (GET_MODE (tmp
) != BImode
2748 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2753 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2754 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2758 /* Otherwise, fall back on canonicalize_condition to do the dirty
2759 work of manipulating MODE_CC values and COMPARE rtx codes. */
2760 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2761 NULL_RTX
, have_cbranchcc4
, true);
2763 /* We don't handle side-effects in the condition, like handling
2764 REG_INC notes and making sure no duplicate conditions are emitted. */
2765 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2771 /* Return true if OP is ok for if-then-else processing. */
2774 noce_operand_ok (const_rtx op
)
2776 if (side_effects_p (op
))
2779 /* We special-case memories, so handle any of them with
2780 no address side effects. */
2782 return ! side_effects_p (XEXP (op
, 0));
2784 return ! may_trap_p (op
);
2787 /* Return true if a write into MEM may trap or fault. */
2790 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2794 if (MEM_READONLY_P (mem
))
2797 if (may_trap_or_fault_p (mem
))
2800 addr
= XEXP (mem
, 0);
2802 /* Call target hook to avoid the effects of -fpic etc.... */
2803 addr
= targetm
.delegitimize_address (addr
);
2806 switch (GET_CODE (addr
))
2814 addr
= XEXP (addr
, 0);
2818 addr
= XEXP (addr
, 1);
2821 if (CONST_INT_P (XEXP (addr
, 1)))
2822 addr
= XEXP (addr
, 0);
2829 if (SYMBOL_REF_DECL (addr
)
2830 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2840 /* Return whether we can use store speculation for MEM. TOP_BB is the
2841 basic block above the conditional block where we are considering
2842 doing the speculative store. We look for whether MEM is set
2843 unconditionally later in the function. */
2846 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2848 basic_block dominator
;
2850 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2852 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2856 FOR_BB_INSNS (dominator
, insn
)
2858 /* If we see something that might be a memory barrier, we
2859 have to stop looking. Even if the MEM is set later in
2860 the function, we still don't want to set it
2861 unconditionally before the barrier. */
2863 && (volatile_insn_p (PATTERN (insn
))
2864 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2867 if (memory_must_be_modified_in_insn_p (mem
, insn
))
2869 if (modified_in_p (XEXP (mem
, 0), insn
))
2878 /* Return true if X contains a MEM subrtx. */
2881 contains_mem_rtx_p (rtx x
)
2883 subrtx_iterator::array_type array
;
2884 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
2891 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2892 The condition used in this if-conversion is in COND.
2893 In practice, check that TEST_BB ends with a single set
2894 x := a and all previous computations
2895 in TEST_BB don't produce any values that are live after TEST_BB.
2896 In other words, all the insns in TEST_BB are there only
2897 to compute a value for x. Put the rtx cost of the insns
2898 in TEST_BB into COST. Record whether TEST_BB is a single simple
2899 set instruction in SIMPLE_P. */
2902 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
2903 unsigned int *cost
, bool *simple_p
)
2908 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
2909 rtx last_set
= NULL_RTX
;
2911 rtx cc
= cc_in_cond (cond
);
2913 if (!insn_valid_noce_process_p (last_insn
, cc
))
2915 last_set
= single_set (last_insn
);
2917 rtx x
= SET_DEST (last_set
);
2918 rtx_insn
*first_insn
= first_active_insn (test_bb
);
2919 rtx first_set
= single_set (first_insn
);
2924 /* We have a single simple set, that's okay. */
2925 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
2927 if (first_insn
== last_insn
)
2929 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
2930 *cost
= insn_rtx_cost (first_set
, speed_p
);
2934 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
2935 gcc_assert (prev_last_insn
);
2937 /* For now, disallow setting x multiple times in test_bb. */
2938 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
2941 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
2943 /* The regs that are live out of test_bb. */
2944 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
2946 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
2948 FOR_BB_INSNS (test_bb
, insn
)
2950 if (insn
!= last_insn
)
2952 if (!active_insn_p (insn
))
2955 if (!insn_valid_noce_process_p (insn
, cc
))
2956 goto free_bitmap_and_fail
;
2958 rtx sset
= single_set (insn
);
2961 if (contains_mem_rtx_p (SET_SRC (sset
))
2962 || !REG_P (SET_DEST (sset
)))
2963 goto free_bitmap_and_fail
;
2965 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
2966 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
2970 /* If any of the intermediate results in test_bb are live after test_bb
2972 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
2973 goto free_bitmap_and_fail
;
2975 BITMAP_FREE (test_bb_temps
);
2976 *cost
= potential_cost
;
2980 free_bitmap_and_fail
:
2981 BITMAP_FREE (test_bb_temps
);
2985 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2986 it without using conditional execution. Return TRUE if we were successful
2987 at converting the block. */
2990 noce_process_if_block (struct noce_if_info
*if_info
)
2992 basic_block test_bb
= if_info
->test_bb
; /* test block */
2993 basic_block then_bb
= if_info
->then_bb
; /* THEN */
2994 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
2995 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
2996 rtx_insn
*jump
= if_info
->jump
;
2997 rtx cond
= if_info
->cond
;
2998 rtx_insn
*insn_a
, *insn_b
;
3000 rtx orig_x
, x
, a
, b
;
3002 /* We're looking for patterns of the form
3004 (1) if (...) x = a; else x = b;
3005 (2) x = b; if (...) x = a;
3006 (3) if (...) x = a; // as if with an initial x = x.
3008 The later patterns require jumps to be more expensive.
3009 For the if (...) x = a; else x = b; case we allow multiple insns
3010 inside the then and else blocks as long as their only effect is
3011 to calculate a value for x.
3012 ??? For future expansion, look for multiple X in such patterns. */
3014 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3015 &if_info
->then_simple
))
3019 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3020 &if_info
->else_simple
))
3023 insn_a
= last_active_insn (then_bb
, FALSE
);
3024 set_a
= single_set (insn_a
);
3027 x
= SET_DEST (set_a
);
3028 a
= SET_SRC (set_a
);
3030 /* Look for the other potential set. Make sure we've got equivalent
3032 /* ??? This is overconservative. Storing to two different mems is
3033 as easy as conditionally computing the address. Storing to a
3034 single mem merely requires a scratch memory to use as one of the
3035 destination addresses; often the memory immediately below the
3036 stack pointer is available for this. */
3040 insn_b
= last_active_insn (else_bb
, FALSE
);
3041 set_b
= single_set (insn_b
);
3044 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3049 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3050 /* We're going to be moving the evaluation of B down from above
3051 COND_EARLIEST to JUMP. Make sure the relevant data is still
3054 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3055 || !NONJUMP_INSN_P (insn_b
)
3056 || (set_b
= single_set (insn_b
)) == NULL_RTX
3057 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3058 || ! noce_operand_ok (SET_SRC (set_b
))
3059 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3060 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3061 /* Avoid extending the lifetime of hard registers on small
3062 register class machines. */
3063 || (REG_P (SET_SRC (set_b
))
3064 && HARD_REGISTER_P (SET_SRC (set_b
))
3065 && targetm
.small_register_classes_for_mode_p
3066 (GET_MODE (SET_SRC (set_b
))))
3067 /* Likewise with X. In particular this can happen when
3068 noce_get_condition looks farther back in the instruction
3069 stream than one might expect. */
3070 || reg_overlap_mentioned_p (x
, cond
)
3071 || reg_overlap_mentioned_p (x
, a
)
3072 || modified_between_p (x
, insn_b
, jump
))
3079 /* If x has side effects then only the if-then-else form is safe to
3080 convert. But even in that case we would need to restore any notes
3081 (such as REG_INC) at then end. That can be tricky if
3082 noce_emit_move_insn expands to more than one insn, so disable the
3083 optimization entirely for now if there are side effects. */
3084 if (side_effects_p (x
))
3087 b
= (set_b
? SET_SRC (set_b
) : x
);
3089 /* Only operate on register destinations, and even then avoid extending
3090 the lifetime of hard registers on small register class machines. */
3093 || (HARD_REGISTER_P (x
)
3094 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3096 if (GET_MODE (x
) == BLKmode
)
3099 if (GET_CODE (x
) == ZERO_EXTRACT
3100 && (!CONST_INT_P (XEXP (x
, 1))
3101 || !CONST_INT_P (XEXP (x
, 2))))
3104 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3105 ? XEXP (x
, 0) : x
));
3108 /* Don't operate on sources that may trap or are volatile. */
3109 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3113 /* Set up the info block for our subroutines. */
3114 if_info
->insn_a
= insn_a
;
3115 if_info
->insn_b
= insn_b
;
3120 /* Try optimizations in some approximation of a useful order. */
3121 /* ??? Should first look to see if X is live incoming at all. If it
3122 isn't, we don't need anything but an unconditional set. */
3124 /* Look and see if A and B are really the same. Avoid creating silly
3125 cmove constructs that no one will fix up later. */
3126 if (noce_simple_bbs (if_info
)
3127 && rtx_interchangeable_p (a
, b
))
3129 /* If we have an INSN_B, we don't have to create any new rtl. Just
3130 move the instruction that we already have. If we don't have an
3131 INSN_B, that means that A == X, and we've got a noop move. In
3132 that case don't do anything and let the code below delete INSN_A. */
3133 if (insn_b
&& else_bb
)
3137 if (else_bb
&& insn_b
== BB_END (else_bb
))
3138 BB_END (else_bb
) = PREV_INSN (insn_b
);
3139 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3141 /* If there was a REG_EQUAL note, delete it since it may have been
3142 true due to this insn being after a jump. */
3143 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3144 remove_note (insn_b
, note
);
3148 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3149 x must be executed twice. */
3150 else if (insn_b
&& side_effects_p (orig_x
))
3157 if (!set_b
&& MEM_P (orig_x
))
3159 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
3160 for optimizations if writing to x may trap or fault,
3161 i.e. it's a memory other than a static var or a stack slot,
3162 is misaligned on strict aligned machines or is read-only. If
3163 x is a read-only memory, then the program is valid only if we
3164 avoid the store into it. If there are stores on both the
3165 THEN and ELSE arms, then we can go ahead with the conversion;
3166 either the program is broken, or the condition is always
3167 false such that the other memory is selected. */
3168 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
3171 /* Avoid store speculation: given "if (...) x = a" where x is a
3172 MEM, we only want to do the store if x is always set
3173 somewhere in the function. This avoids cases like
3174 if (pthread_mutex_trylock(mutex))
3176 where we only want global_variable to be changed if the mutex
3177 is held. FIXME: This should ideally be expressed directly in
3179 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
3183 if (noce_try_move (if_info
))
3185 if (noce_try_store_flag (if_info
))
3187 if (noce_try_bitop (if_info
))
3189 if (noce_try_minmax (if_info
))
3191 if (noce_try_abs (if_info
))
3193 if (!targetm
.have_conditional_execution ()
3194 && noce_try_store_flag_constants (if_info
))
3196 if (HAVE_conditional_move
3197 && noce_try_cmove (if_info
))
3199 if (! targetm
.have_conditional_execution ())
3201 if (noce_try_addcc (if_info
))
3203 if (noce_try_store_flag_mask (if_info
))
3205 if (HAVE_conditional_move
3206 && noce_try_cmove_arith (if_info
))
3208 if (noce_try_sign_mask (if_info
))
3212 if (!else_bb
&& set_b
)
3224 /* If we used a temporary, fix it up now. */
3230 noce_emit_move_insn (orig_x
, x
);
3232 set_used_flags (orig_x
);
3233 unshare_all_rtl_in_chain (seq
);
3236 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3239 /* The original THEN and ELSE blocks may now be removed. The test block
3240 must now jump to the join block. If the test block and the join block
3241 can be merged, do so. */
3244 delete_basic_block (else_bb
);
3248 remove_edge (find_edge (test_bb
, join_bb
));
3250 remove_edge (find_edge (then_bb
, join_bb
));
3251 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3252 delete_basic_block (then_bb
);
3255 if (can_merge_blocks_p (test_bb
, join_bb
))
3257 merge_blocks (test_bb
, join_bb
);
3261 num_updated_if_blocks
++;
3265 /* Check whether a block is suitable for conditional move conversion.
3266 Every insn must be a simple set of a register to a constant or a
3267 register. For each assignment, store the value in the pointer map
3268 VALS, keyed indexed by register pointer, then store the register
3269 pointer in REGS. COND is the condition we will test. */
3272 check_cond_move_block (basic_block bb
,
3273 hash_map
<rtx
, rtx
> *vals
,
3278 rtx cc
= cc_in_cond (cond
);
3280 /* We can only handle simple jumps at the end of the basic block.
3281 It is almost impossible to update the CFG otherwise. */
3283 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3286 FOR_BB_INSNS (bb
, insn
)
3290 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3292 set
= single_set (insn
);
3296 dest
= SET_DEST (set
);
3297 src
= SET_SRC (set
);
3299 || (HARD_REGISTER_P (dest
)
3300 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3303 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3306 if (side_effects_p (src
) || side_effects_p (dest
))
3309 if (may_trap_p (src
) || may_trap_p (dest
))
3312 /* Don't try to handle this if the source register was
3313 modified earlier in the block. */
3316 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3317 && vals
->get (SUBREG_REG (src
))))
3320 /* Don't try to handle this if the destination register was
3321 modified earlier in the block. */
3322 if (vals
->get (dest
))
3325 /* Don't try to handle this if the condition uses the
3326 destination register. */
3327 if (reg_overlap_mentioned_p (dest
, cond
))
3330 /* Don't try to handle this if the source register is modified
3331 later in the block. */
3332 if (!CONSTANT_P (src
)
3333 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3336 /* Skip it if the instruction to be moved might clobber CC. */
3337 if (cc
&& set_of (cc
, insn
))
3340 vals
->put (dest
, src
);
3342 regs
->safe_push (dest
);
3348 /* Given a basic block BB suitable for conditional move conversion,
3349 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3350 the register values depending on COND, emit the insns in the block as
3351 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3352 processed. The caller has started a sequence for the conversion.
3353 Return true if successful, false if something goes wrong. */
3356 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3357 basic_block bb
, rtx cond
,
3358 hash_map
<rtx
, rtx
> *then_vals
,
3359 hash_map
<rtx
, rtx
> *else_vals
,
3364 rtx cond_arg0
, cond_arg1
;
3366 code
= GET_CODE (cond
);
3367 cond_arg0
= XEXP (cond
, 0);
3368 cond_arg1
= XEXP (cond
, 1);
3370 FOR_BB_INSNS (bb
, insn
)
3372 rtx set
, target
, dest
, t
, e
;
3374 /* ??? Maybe emit conditional debug insn? */
3375 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3377 set
= single_set (insn
);
3378 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3380 dest
= SET_DEST (set
);
3382 rtx
*then_slot
= then_vals
->get (dest
);
3383 rtx
*else_slot
= else_vals
->get (dest
);
3384 t
= then_slot
? *then_slot
: NULL_RTX
;
3385 e
= else_slot
? *else_slot
: NULL_RTX
;
3389 /* If this register was set in the then block, we already
3390 handled this case there. */
3403 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3409 noce_emit_move_insn (dest
, target
);
3415 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3416 it using only conditional moves. Return TRUE if we were successful at
3417 converting the block. */
3420 cond_move_process_if_block (struct noce_if_info
*if_info
)
3422 basic_block test_bb
= if_info
->test_bb
;
3423 basic_block then_bb
= if_info
->then_bb
;
3424 basic_block else_bb
= if_info
->else_bb
;
3425 basic_block join_bb
= if_info
->join_bb
;
3426 rtx_insn
*jump
= if_info
->jump
;
3427 rtx cond
= if_info
->cond
;
3428 rtx_insn
*seq
, *loc_insn
;
3431 vec
<rtx
> then_regs
= vNULL
;
3432 vec
<rtx
> else_regs
= vNULL
;
3434 int success_p
= FALSE
;
3436 /* Build a mapping for each block to the value used for each
3438 hash_map
<rtx
, rtx
> then_vals
;
3439 hash_map
<rtx
, rtx
> else_vals
;
3441 /* Make sure the blocks are suitable. */
3442 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3444 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3447 /* Make sure the blocks can be used together. If the same register
3448 is set in both blocks, and is not set to a constant in both
3449 cases, then both blocks must set it to the same register. We
3450 have already verified that if it is set to a register, that the
3451 source register does not change after the assignment. Also count
3452 the number of registers set in only one of the blocks. */
3454 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3456 rtx
*then_slot
= then_vals
.get (reg
);
3457 rtx
*else_slot
= else_vals
.get (reg
);
3459 gcc_checking_assert (then_slot
);
3464 rtx then_val
= *then_slot
;
3465 rtx else_val
= *else_slot
;
3466 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3467 && !rtx_equal_p (then_val
, else_val
))
3472 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3473 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3475 gcc_checking_assert (else_vals
.get (reg
));
3476 if (!then_vals
.get (reg
))
3480 /* Make sure it is reasonable to convert this block. What matters
3481 is the number of assignments currently made in only one of the
3482 branches, since if we convert we are going to always execute
3484 if (c
> MAX_CONDITIONAL_EXECUTE
)
3487 /* Try to emit the conditional moves. First do the then block,
3488 then do anything left in the else blocks. */
3490 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3491 &then_vals
, &else_vals
, false)
3493 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3494 &then_vals
, &else_vals
, true)))
3499 seq
= end_ifcvt_sequence (if_info
);
3503 loc_insn
= first_active_insn (then_bb
);
3506 loc_insn
= first_active_insn (else_bb
);
3507 gcc_assert (loc_insn
);
3509 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3513 delete_basic_block (else_bb
);
3517 remove_edge (find_edge (test_bb
, join_bb
));
3519 remove_edge (find_edge (then_bb
, join_bb
));
3520 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3521 delete_basic_block (then_bb
);
3524 if (can_merge_blocks_p (test_bb
, join_bb
))
3526 merge_blocks (test_bb
, join_bb
);
3530 num_updated_if_blocks
++;
3535 then_regs
.release ();
3536 else_regs
.release ();
3541 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3542 IF-THEN-ELSE-JOIN block.
3544 If so, we'll try to convert the insns to not require the branch,
3545 using only transformations that do not require conditional execution.
3547 Return TRUE if we were successful at converting the block. */
3550 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3553 basic_block then_bb
, else_bb
, join_bb
;
3554 bool then_else_reversed
= false;
3557 rtx_insn
*cond_earliest
;
3558 struct noce_if_info if_info
;
3560 /* We only ever should get here before reload. */
3561 gcc_assert (!reload_completed
);
3563 /* Recognize an IF-THEN-ELSE-JOIN block. */
3564 if (single_pred_p (then_edge
->dest
)
3565 && single_succ_p (then_edge
->dest
)
3566 && single_pred_p (else_edge
->dest
)
3567 && single_succ_p (else_edge
->dest
)
3568 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3570 then_bb
= then_edge
->dest
;
3571 else_bb
= else_edge
->dest
;
3572 join_bb
= single_succ (then_bb
);
3574 /* Recognize an IF-THEN-JOIN block. */
3575 else if (single_pred_p (then_edge
->dest
)
3576 && single_succ_p (then_edge
->dest
)
3577 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3579 then_bb
= then_edge
->dest
;
3580 else_bb
= NULL_BLOCK
;
3581 join_bb
= else_edge
->dest
;
3583 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3584 of basic blocks in cfglayout mode does not matter, so the fallthrough
3585 edge can go to any basic block (and not just to bb->next_bb, like in
3587 else if (single_pred_p (else_edge
->dest
)
3588 && single_succ_p (else_edge
->dest
)
3589 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3591 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3592 To make this work, we have to invert the THEN and ELSE blocks
3593 and reverse the jump condition. */
3594 then_bb
= else_edge
->dest
;
3595 else_bb
= NULL_BLOCK
;
3596 join_bb
= single_succ (then_bb
);
3597 then_else_reversed
= true;
3600 /* Not a form we can handle. */
3603 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3604 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3607 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3610 num_possible_if_blocks
++;
3615 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3616 (else_bb
) ? "-ELSE" : "",
3617 pass
, test_bb
->index
, then_bb
->index
);
3620 fprintf (dump_file
, ", else %d", else_bb
->index
);
3622 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3625 /* If the conditional jump is more than just a conditional
3626 jump, then we can not do if-conversion on this block. */
3627 jump
= BB_END (test_bb
);
3628 if (! onlyjump_p (jump
))
3631 /* If this is not a standard conditional jump, we can't parse it. */
3632 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3636 /* We must be comparing objects whose modes imply the size. */
3637 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3640 /* Initialize an IF_INFO struct to pass around. */
3641 memset (&if_info
, 0, sizeof if_info
);
3642 if_info
.test_bb
= test_bb
;
3643 if_info
.then_bb
= then_bb
;
3644 if_info
.else_bb
= else_bb
;
3645 if_info
.join_bb
= join_bb
;
3646 if_info
.cond
= cond
;
3647 if_info
.cond_earliest
= cond_earliest
;
3648 if_info
.jump
= jump
;
3649 if_info
.then_else_reversed
= then_else_reversed
;
3650 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3651 predictable_edge_p (then_edge
));
3653 /* Do the real work. */
3655 if (noce_process_if_block (&if_info
))
3658 if (HAVE_conditional_move
3659 && cond_move_process_if_block (&if_info
))
3666 /* Merge the blocks and mark for local life update. */
3669 merge_if_block (struct ce_if_block
* ce_info
)
3671 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3672 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3673 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3674 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3675 basic_block combo_bb
;
3677 /* All block merging is done into the lower block numbers. */
3680 df_set_bb_dirty (test_bb
);
3682 /* Merge any basic blocks to handle && and || subtests. Each of
3683 the blocks are on the fallthru path from the predecessor block. */
3684 if (ce_info
->num_multiple_test_blocks
> 0)
3686 basic_block bb
= test_bb
;
3687 basic_block last_test_bb
= ce_info
->last_test_bb
;
3688 basic_block fallthru
= block_fallthru (bb
);
3693 fallthru
= block_fallthru (bb
);
3694 merge_blocks (combo_bb
, bb
);
3697 while (bb
!= last_test_bb
);
3700 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3701 label, but it might if there were || tests. That label's count should be
3702 zero, and it normally should be removed. */
3706 /* If THEN_BB has no successors, then there's a BARRIER after it.
3707 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3708 is no longer needed, and in fact it is incorrect to leave it in
3710 if (EDGE_COUNT (then_bb
->succs
) == 0
3711 && EDGE_COUNT (combo_bb
->succs
) > 1)
3713 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
3714 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3715 end
= NEXT_INSN (end
);
3717 if (end
&& BARRIER_P (end
))
3720 merge_blocks (combo_bb
, then_bb
);
3724 /* The ELSE block, if it existed, had a label. That label count
3725 will almost always be zero, but odd things can happen when labels
3726 get their addresses taken. */
3729 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3730 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3731 is no longer needed, and in fact it is incorrect to leave it in
3733 if (EDGE_COUNT (else_bb
->succs
) == 0
3734 && EDGE_COUNT (combo_bb
->succs
) > 1)
3736 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
3737 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3738 end
= NEXT_INSN (end
);
3740 if (end
&& BARRIER_P (end
))
3743 merge_blocks (combo_bb
, else_bb
);
3747 /* If there was no join block reported, that means it was not adjacent
3748 to the others, and so we cannot merge them. */
3752 rtx_insn
*last
= BB_END (combo_bb
);
3754 /* The outgoing edge for the current COMBO block should already
3755 be correct. Verify this. */
3756 if (EDGE_COUNT (combo_bb
->succs
) == 0)
3757 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
3758 || (NONJUMP_INSN_P (last
)
3759 && GET_CODE (PATTERN (last
)) == TRAP_IF
3760 && (TRAP_CONDITION (PATTERN (last
))
3761 == const_true_rtx
)));
3764 /* There should still be something at the end of the THEN or ELSE
3765 blocks taking us to our final destination. */
3766 gcc_assert (JUMP_P (last
)
3767 || (EDGE_SUCC (combo_bb
, 0)->dest
3768 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
3770 && SIBLING_CALL_P (last
))
3771 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
3772 && can_throw_internal (last
)));
3775 /* The JOIN block may have had quite a number of other predecessors too.
3776 Since we've already merged the TEST, THEN and ELSE blocks, we should
3777 have only one remaining edge from our if-then-else diamond. If there
3778 is more than one remaining edge, it must come from elsewhere. There
3779 may be zero incoming edges if the THEN block didn't actually join
3780 back up (as with a call to a non-return function). */
3781 else if (EDGE_COUNT (join_bb
->preds
) < 2
3782 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3784 /* We can merge the JOIN cleanly and update the dataflow try
3785 again on this pass.*/
3786 merge_blocks (combo_bb
, join_bb
);
3791 /* We cannot merge the JOIN. */
3793 /* The outgoing edge for the current COMBO block should already
3794 be correct. Verify this. */
3795 gcc_assert (single_succ_p (combo_bb
)
3796 && single_succ (combo_bb
) == join_bb
);
3798 /* Remove the jump and cruft from the end of the COMBO block. */
3799 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3800 tidy_fallthru_edge (single_succ_edge (combo_bb
));
3803 num_updated_if_blocks
++;
3806 /* Find a block ending in a simple IF condition and try to transform it
3807 in some way. When converting a multi-block condition, put the new code
3808 in the first such block and delete the rest. Return a pointer to this
3809 first block if some transformation was done. Return NULL otherwise. */
3812 find_if_header (basic_block test_bb
, int pass
)
3814 ce_if_block ce_info
;
3818 /* The kind of block we're looking for has exactly two successors. */
3819 if (EDGE_COUNT (test_bb
->succs
) != 2)
3822 then_edge
= EDGE_SUCC (test_bb
, 0);
3823 else_edge
= EDGE_SUCC (test_bb
, 1);
3825 if (df_get_bb_dirty (then_edge
->dest
))
3827 if (df_get_bb_dirty (else_edge
->dest
))
3830 /* Neither edge should be abnormal. */
3831 if ((then_edge
->flags
& EDGE_COMPLEX
)
3832 || (else_edge
->flags
& EDGE_COMPLEX
))
3835 /* Nor exit the loop. */
3836 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
3837 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
3840 /* The THEN edge is canonically the one that falls through. */
3841 if (then_edge
->flags
& EDGE_FALLTHRU
)
3843 else if (else_edge
->flags
& EDGE_FALLTHRU
)
3844 std::swap (then_edge
, else_edge
);
3846 /* Otherwise this must be a multiway branch of some sort. */
3849 memset (&ce_info
, 0, sizeof (ce_info
));
3850 ce_info
.test_bb
= test_bb
;
3851 ce_info
.then_bb
= then_edge
->dest
;
3852 ce_info
.else_bb
= else_edge
->dest
;
3853 ce_info
.pass
= pass
;
3855 #ifdef IFCVT_MACHDEP_INIT
3856 IFCVT_MACHDEP_INIT (&ce_info
);
3859 if (!reload_completed
3860 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
3863 if (reload_completed
3864 && targetm
.have_conditional_execution ()
3865 && cond_exec_find_if_block (&ce_info
))
3868 if (targetm
.have_trap ()
3869 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
3870 && find_cond_trap (test_bb
, then_edge
, else_edge
))
3873 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
3874 && (reload_completed
|| !targetm
.have_conditional_execution ()))
3876 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
3878 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
3886 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
3887 /* Set this so we continue looking. */
3888 cond_exec_changed_p
= TRUE
;
3889 return ce_info
.test_bb
;
3892 /* Return true if a block has two edges, one of which falls through to the next
3893 block, and the other jumps to a specific block, so that we can tell if the
3894 block is part of an && test or an || test. Returns either -1 or the number
3895 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3898 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
3901 int fallthru_p
= FALSE
;
3908 if (!cur_bb
|| !target_bb
)
3911 /* If no edges, obviously it doesn't jump or fallthru. */
3912 if (EDGE_COUNT (cur_bb
->succs
) == 0)
3915 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
3917 if (cur_edge
->flags
& EDGE_COMPLEX
)
3918 /* Anything complex isn't what we want. */
3921 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
3924 else if (cur_edge
->dest
== target_bb
)
3931 if ((jump_p
& fallthru_p
) == 0)
3934 /* Don't allow calls in the block, since this is used to group && and ||
3935 together for conditional execution support. ??? we should support
3936 conditional execution support across calls for IA-64 some day, but
3937 for now it makes the code simpler. */
3938 end
= BB_END (cur_bb
);
3939 insn
= BB_HEAD (cur_bb
);
3941 while (insn
!= NULL_RTX
)
3948 && !DEBUG_INSN_P (insn
)
3949 && GET_CODE (PATTERN (insn
)) != USE
3950 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3956 insn
= NEXT_INSN (insn
);
3962 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3963 block. If so, we'll try to convert the insns to not require the branch.
3964 Return TRUE if we were successful at converting the block. */
3967 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
3969 basic_block test_bb
= ce_info
->test_bb
;
3970 basic_block then_bb
= ce_info
->then_bb
;
3971 basic_block else_bb
= ce_info
->else_bb
;
3972 basic_block join_bb
= NULL_BLOCK
;
3977 ce_info
->last_test_bb
= test_bb
;
3979 /* We only ever should get here after reload,
3980 and if we have conditional execution. */
3981 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
3983 /* Discover if any fall through predecessors of the current test basic block
3984 were && tests (which jump to the else block) or || tests (which jump to
3986 if (single_pred_p (test_bb
)
3987 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
3989 basic_block bb
= single_pred (test_bb
);
3990 basic_block target_bb
;
3991 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
3994 /* Determine if the preceding block is an && or || block. */
3995 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
3997 ce_info
->and_and_p
= TRUE
;
3998 target_bb
= else_bb
;
4000 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4002 ce_info
->and_and_p
= FALSE
;
4003 target_bb
= then_bb
;
4006 target_bb
= NULL_BLOCK
;
4008 if (target_bb
&& n_insns
<= max_insns
)
4010 int total_insns
= 0;
4013 ce_info
->last_test_bb
= test_bb
;
4015 /* Found at least one && or || block, look for more. */
4018 ce_info
->test_bb
= test_bb
= bb
;
4019 total_insns
+= n_insns
;
4022 if (!single_pred_p (bb
))
4025 bb
= single_pred (bb
);
4026 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4028 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4030 ce_info
->num_multiple_test_blocks
= blocks
;
4031 ce_info
->num_multiple_test_insns
= total_insns
;
4033 if (ce_info
->and_and_p
)
4034 ce_info
->num_and_and_blocks
= blocks
;
4036 ce_info
->num_or_or_blocks
= blocks
;
4040 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4041 other than any || blocks which jump to the THEN block. */
4042 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4045 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4046 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4048 if (cur_edge
->flags
& EDGE_COMPLEX
)
4052 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4054 if (cur_edge
->flags
& EDGE_COMPLEX
)
4058 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4059 if (EDGE_COUNT (then_bb
->succs
) > 0
4060 && (!single_succ_p (then_bb
)
4061 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4062 || (epilogue_completed
4063 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4066 /* If the THEN block has no successors, conditional execution can still
4067 make a conditional call. Don't do this unless the ELSE block has
4068 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4069 Check for the last insn of the THEN block being an indirect jump, which
4070 is listed as not having any successors, but confuses the rest of the CE
4071 code processing. ??? we should fix this in the future. */
4072 if (EDGE_COUNT (then_bb
->succs
) == 0)
4074 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4076 rtx_insn
*last_insn
= BB_END (then_bb
);
4079 && NOTE_P (last_insn
)
4080 && last_insn
!= BB_HEAD (then_bb
))
4081 last_insn
= PREV_INSN (last_insn
);
4084 && JUMP_P (last_insn
)
4085 && ! simplejump_p (last_insn
))
4089 else_bb
= NULL_BLOCK
;
4095 /* If the THEN block's successor is the other edge out of the TEST block,
4096 then we have an IF-THEN combo without an ELSE. */
4097 else if (single_succ (then_bb
) == else_bb
)
4100 else_bb
= NULL_BLOCK
;
4103 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4104 has exactly one predecessor and one successor, and the outgoing edge
4105 is not complex, then we have an IF-THEN-ELSE combo. */
4106 else if (single_succ_p (else_bb
)
4107 && single_succ (then_bb
) == single_succ (else_bb
)
4108 && single_pred_p (else_bb
)
4109 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4110 && !(epilogue_completed
4111 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4112 join_bb
= single_succ (else_bb
);
4114 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4118 num_possible_if_blocks
++;
4123 "\nIF-THEN%s block found, pass %d, start block %d "
4124 "[insn %d], then %d [%d]",
4125 (else_bb
) ? "-ELSE" : "",
4128 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4130 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4133 fprintf (dump_file
, ", else %d [%d]",
4135 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4137 fprintf (dump_file
, ", join %d [%d]",
4139 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4141 if (ce_info
->num_multiple_test_blocks
> 0)
4142 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4143 ce_info
->num_multiple_test_blocks
,
4144 (ce_info
->and_and_p
) ? "&&" : "||",
4145 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4146 ce_info
->last_test_bb
->index
,
4147 ((BB_HEAD (ce_info
->last_test_bb
))
4148 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4151 fputc ('\n', dump_file
);
4154 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4155 first condition for free, since we've already asserted that there's a
4156 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4157 we checked the FALLTHRU flag, those are already adjacent to the last IF
4159 /* ??? As an enhancement, move the ELSE block. Have to deal with
4160 BLOCK notes, if by no other means than backing out the merge if they
4161 exist. Sticky enough I don't want to think about it now. */
4163 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4165 if ((next
= next
->next_bb
) != join_bb
4166 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4174 /* Do the real work. */
4176 ce_info
->else_bb
= else_bb
;
4177 ce_info
->join_bb
= join_bb
;
4179 /* If we have && and || tests, try to first handle combining the && and ||
4180 tests into the conditional code, and if that fails, go back and handle
4181 it without the && and ||, which at present handles the && case if there
4182 was no ELSE block. */
4183 if (cond_exec_process_if_block (ce_info
, TRUE
))
4186 if (ce_info
->num_multiple_test_blocks
)
4190 if (cond_exec_process_if_block (ce_info
, FALSE
))
4197 /* Convert a branch over a trap, or a branch
4198 to a trap, into a conditional trap. */
4201 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4203 basic_block then_bb
= then_edge
->dest
;
4204 basic_block else_bb
= else_edge
->dest
;
4205 basic_block other_bb
, trap_bb
;
4206 rtx_insn
*trap
, *jump
;
4208 rtx_insn
*cond_earliest
;
4211 /* Locate the block with the trap instruction. */
4212 /* ??? While we look for no successors, we really ought to allow
4213 EH successors. Need to fix merge_if_block for that to work. */
4214 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4215 trap_bb
= then_bb
, other_bb
= else_bb
;
4216 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4217 trap_bb
= else_bb
, other_bb
= then_bb
;
4223 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4224 test_bb
->index
, trap_bb
->index
);
4227 /* If this is not a standard conditional jump, we can't parse it. */
4228 jump
= BB_END (test_bb
);
4229 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4233 /* If the conditional jump is more than just a conditional jump, then
4234 we can not do if-conversion on this block. */
4235 if (! onlyjump_p (jump
))
4238 /* We must be comparing objects whose modes imply the size. */
4239 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4242 /* Reverse the comparison code, if necessary. */
4243 code
= GET_CODE (cond
);
4244 if (then_bb
== trap_bb
)
4246 code
= reversed_comparison_code (cond
, jump
);
4247 if (code
== UNKNOWN
)
4251 /* Attempt to generate the conditional trap. */
4252 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4253 copy_rtx (XEXP (cond
, 1)),
4254 TRAP_CODE (PATTERN (trap
)));
4258 /* Emit the new insns before cond_earliest. */
4259 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4261 /* Delete the trap block if possible. */
4262 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4263 df_set_bb_dirty (test_bb
);
4264 df_set_bb_dirty (then_bb
);
4265 df_set_bb_dirty (else_bb
);
4267 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4269 delete_basic_block (trap_bb
);
4273 /* Wire together the blocks again. */
4274 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4275 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4276 else if (trap_bb
== then_bb
)
4278 rtx lab
= JUMP_LABEL (jump
);
4279 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4280 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4281 LABEL_NUSES (lab
) += 1;
4282 JUMP_LABEL (newjump
) = lab
;
4283 emit_barrier_after (newjump
);
4287 if (can_merge_blocks_p (test_bb
, other_bb
))
4289 merge_blocks (test_bb
, other_bb
);
4293 num_updated_if_blocks
++;
4297 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4301 block_has_only_trap (basic_block bb
)
4305 /* We're not the exit block. */
4306 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4309 /* The block must have no successors. */
4310 if (EDGE_COUNT (bb
->succs
) > 0)
4313 /* The only instruction in the THEN block must be the trap. */
4314 trap
= first_active_insn (bb
);
4315 if (! (trap
== BB_END (bb
)
4316 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4317 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4323 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4324 transformable, but not necessarily the other. There need be no
4327 Return TRUE if we were successful at converting the block.
4329 Cases we'd like to look at:
4332 if (test) goto over; // x not live
4340 if (! test) goto label;
4343 if (test) goto E; // x not live
4357 (3) // This one's really only interesting for targets that can do
4358 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4359 // it results in multiple branches on a cache line, which often
4360 // does not sit well with predictors.
4362 if (test1) goto E; // predicted not taken
4378 (A) Don't do (2) if the branch is predicted against the block we're
4379 eliminating. Do it anyway if we can eliminate a branch; this requires
4380 that the sole successor of the eliminated block postdominate the other
4383 (B) With CE, on (3) we can steal from both sides of the if, creating
4392 Again, this is most useful if J postdominates.
4394 (C) CE substitutes for helpful life information.
4396 (D) These heuristics need a lot of work. */
4398 /* Tests for case 1 above. */
4401 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4403 basic_block then_bb
= then_edge
->dest
;
4404 basic_block else_bb
= else_edge
->dest
;
4406 int then_bb_index
, then_prob
;
4407 rtx else_target
= NULL_RTX
;
4409 /* If we are partitioning hot/cold basic blocks, we don't want to
4410 mess up unconditional or indirect jumps that cross between hot
4413 Basic block partitioning may result in some jumps that appear to
4414 be optimizable (or blocks that appear to be mergeable), but which really
4415 must be left untouched (they are required to make it safely across
4416 partition boundaries). See the comments at the top of
4417 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4419 if ((BB_END (then_bb
)
4420 && JUMP_P (BB_END (then_bb
))
4421 && CROSSING_JUMP_P (BB_END (then_bb
)))
4422 || (BB_END (test_bb
)
4423 && JUMP_P (BB_END (test_bb
))
4424 && CROSSING_JUMP_P (BB_END (test_bb
)))
4425 || (BB_END (else_bb
)
4426 && JUMP_P (BB_END (else_bb
))
4427 && CROSSING_JUMP_P (BB_END (else_bb
))))
4430 /* THEN has one successor. */
4431 if (!single_succ_p (then_bb
))
4434 /* THEN does not fall through, but is not strange either. */
4435 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4438 /* THEN has one predecessor. */
4439 if (!single_pred_p (then_bb
))
4442 /* THEN must do something. */
4443 if (forwarder_block_p (then_bb
))
4446 num_possible_if_blocks
++;
4449 "\nIF-CASE-1 found, start %d, then %d\n",
4450 test_bb
->index
, then_bb
->index
);
4452 if (then_edge
->probability
)
4453 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4455 then_prob
= REG_BR_PROB_BASE
/ 2;
4457 /* We're speculating from the THEN path, we want to make sure the cost
4458 of speculation is within reason. */
4459 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4460 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4461 predictable_edge_p (then_edge
)))))
4464 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4466 rtx_insn
*jump
= BB_END (else_edge
->src
);
4467 gcc_assert (JUMP_P (jump
));
4468 else_target
= JUMP_LABEL (jump
);
4471 /* Registers set are dead, or are predicable. */
4472 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4473 single_succ_edge (then_bb
), 1))
4476 /* Conversion went ok, including moving the insns and fixing up the
4477 jump. Adjust the CFG to match. */
4479 /* We can avoid creating a new basic block if then_bb is immediately
4480 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4481 through to else_bb. */
4483 if (then_bb
->next_bb
== else_bb
4484 && then_bb
->prev_bb
== test_bb
4485 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4487 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4490 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4491 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4492 else_bb
, else_target
);
4494 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4497 df_set_bb_dirty (test_bb
);
4498 df_set_bb_dirty (else_bb
);
4500 then_bb_index
= then_bb
->index
;
4501 delete_basic_block (then_bb
);
4503 /* Make rest of code believe that the newly created block is the THEN_BB
4504 block we removed. */
4507 df_bb_replace (then_bb_index
, new_bb
);
4508 /* This should have been done above via force_nonfallthru_and_redirect
4509 (possibly called from redirect_edge_and_branch_force). */
4510 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4514 num_updated_if_blocks
++;
4519 /* Test for case 2 above. */
4522 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4524 basic_block then_bb
= then_edge
->dest
;
4525 basic_block else_bb
= else_edge
->dest
;
4527 int then_prob
, else_prob
;
4529 /* We do not want to speculate (empty) loop latches. */
4531 && else_bb
->loop_father
->latch
== else_bb
)
4534 /* If we are partitioning hot/cold basic blocks, we don't want to
4535 mess up unconditional or indirect jumps that cross between hot
4538 Basic block partitioning may result in some jumps that appear to
4539 be optimizable (or blocks that appear to be mergeable), but which really
4540 must be left untouched (they are required to make it safely across
4541 partition boundaries). See the comments at the top of
4542 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4544 if ((BB_END (then_bb
)
4545 && JUMP_P (BB_END (then_bb
))
4546 && CROSSING_JUMP_P (BB_END (then_bb
)))
4547 || (BB_END (test_bb
)
4548 && JUMP_P (BB_END (test_bb
))
4549 && CROSSING_JUMP_P (BB_END (test_bb
)))
4550 || (BB_END (else_bb
)
4551 && JUMP_P (BB_END (else_bb
))
4552 && CROSSING_JUMP_P (BB_END (else_bb
))))
4555 /* ELSE has one successor. */
4556 if (!single_succ_p (else_bb
))
4559 else_succ
= single_succ_edge (else_bb
);
4561 /* ELSE outgoing edge is not complex. */
4562 if (else_succ
->flags
& EDGE_COMPLEX
)
4565 /* ELSE has one predecessor. */
4566 if (!single_pred_p (else_bb
))
4569 /* THEN is not EXIT. */
4570 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4573 if (else_edge
->probability
)
4575 else_prob
= else_edge
->probability
;
4576 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4580 else_prob
= REG_BR_PROB_BASE
/ 2;
4581 then_prob
= REG_BR_PROB_BASE
/ 2;
4584 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4585 if (else_prob
> then_prob
)
4587 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4588 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4594 num_possible_if_blocks
++;
4597 "\nIF-CASE-2 found, start %d, else %d\n",
4598 test_bb
->index
, else_bb
->index
);
4600 /* We're speculating from the ELSE path, we want to make sure the cost
4601 of speculation is within reason. */
4602 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4603 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4604 predictable_edge_p (else_edge
)))))
4607 /* Registers set are dead, or are predicable. */
4608 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4611 /* Conversion went ok, including moving the insns and fixing up the
4612 jump. Adjust the CFG to match. */
4614 df_set_bb_dirty (test_bb
);
4615 df_set_bb_dirty (then_bb
);
4616 delete_basic_block (else_bb
);
4619 num_updated_if_blocks
++;
4621 /* ??? We may now fallthru from one of THEN's successors into a join
4622 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4627 /* Used by the code above to perform the actual rtl transformations.
4628 Return TRUE if successful.
4630 TEST_BB is the block containing the conditional branch. MERGE_BB
4631 is the block containing the code to manipulate. DEST_EDGE is an
4632 edge representing a jump to the join block; after the conversion,
4633 TEST_BB should be branching to its destination.
4634 REVERSEP is true if the sense of the branch should be reversed. */
4637 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4638 basic_block other_bb
, edge dest_edge
, int reversep
)
4640 basic_block new_dest
= dest_edge
->dest
;
4641 rtx_insn
*head
, *end
, *jump
;
4642 rtx_insn
*earliest
= NULL
;
4644 bitmap merge_set
= NULL
;
4645 /* Number of pending changes. */
4646 int n_validated_changes
= 0;
4647 rtx new_dest_label
= NULL_RTX
;
4649 jump
= BB_END (test_bb
);
4651 /* Find the extent of the real code in the merge block. */
4652 head
= BB_HEAD (merge_bb
);
4653 end
= BB_END (merge_bb
);
4655 while (DEBUG_INSN_P (end
) && end
!= head
)
4656 end
= PREV_INSN (end
);
4658 /* If merge_bb ends with a tablejump, predicating/moving insn's
4659 into test_bb and then deleting merge_bb will result in the jumptable
4660 that follows merge_bb being removed along with merge_bb and then we
4661 get an unresolved reference to the jumptable. */
4662 if (tablejump_p (end
, NULL
, NULL
))
4666 head
= NEXT_INSN (head
);
4667 while (DEBUG_INSN_P (head
) && head
!= end
)
4668 head
= NEXT_INSN (head
);
4676 head
= NEXT_INSN (head
);
4677 while (DEBUG_INSN_P (head
) && head
!= end
)
4678 head
= NEXT_INSN (head
);
4683 if (!onlyjump_p (end
))
4690 end
= PREV_INSN (end
);
4691 while (DEBUG_INSN_P (end
) && end
!= head
)
4692 end
= PREV_INSN (end
);
4695 /* Don't move frame-related insn across the conditional branch. This
4696 can lead to one of the paths of the branch having wrong unwind info. */
4697 if (epilogue_completed
)
4699 rtx_insn
*insn
= head
;
4702 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
4706 insn
= NEXT_INSN (insn
);
4710 /* Disable handling dead code by conditional execution if the machine needs
4711 to do anything funny with the tests, etc. */
4712 #ifndef IFCVT_MODIFY_TESTS
4713 if (targetm
.have_conditional_execution ())
4715 /* In the conditional execution case, we have things easy. We know
4716 the condition is reversible. We don't have to check life info
4717 because we're going to conditionally execute the code anyway.
4718 All that's left is making sure the insns involved can actually
4723 cond
= cond_exec_get_condition (jump
);
4727 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
4728 int prob_val
= (note
? XINT (note
, 0) : -1);
4732 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
4735 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
4738 prob_val
= REG_BR_PROB_BASE
- prob_val
;
4741 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
4742 && verify_changes (0))
4743 n_validated_changes
= num_validated_changes ();
4751 /* If we allocated new pseudos (e.g. in the conditional move
4752 expander called from noce_emit_cmove), we must resize the
4754 if (max_regno
< max_reg_num ())
4755 max_regno
= max_reg_num ();
4757 /* Try the NCE path if the CE path did not result in any changes. */
4758 if (n_validated_changes
== 0)
4765 /* In the non-conditional execution case, we have to verify that there
4766 are no trapping operations, no calls, no references to memory, and
4767 that any registers modified are dead at the branch site. */
4769 if (!any_condjump_p (jump
))
4772 /* Find the extent of the conditional. */
4773 cond
= noce_get_condition (jump
, &earliest
, false);
4777 live
= BITMAP_ALLOC (®_obstack
);
4778 simulate_backwards_to_point (merge_bb
, live
, end
);
4779 success
= can_move_insns_across (head
, end
, earliest
, jump
,
4781 df_get_live_in (other_bb
), NULL
);
4786 /* Collect the set of registers set in MERGE_BB. */
4787 merge_set
= BITMAP_ALLOC (®_obstack
);
4789 FOR_BB_INSNS (merge_bb
, insn
)
4790 if (NONDEBUG_INSN_P (insn
))
4791 df_simulate_find_defs (insn
, merge_set
);
4793 /* If shrink-wrapping, disable this optimization when test_bb is
4794 the first basic block and merge_bb exits. The idea is to not
4795 move code setting up a return register as that may clobber a
4796 register used to pass function parameters, which then must be
4797 saved in caller-saved regs. A caller-saved reg requires the
4798 prologue, killing a shrink-wrap opportunity. */
4799 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
4800 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
4801 && single_succ_p (new_dest
)
4802 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4803 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
4808 return_regs
= BITMAP_ALLOC (®_obstack
);
4810 /* Start off with the intersection of regs used to pass
4811 params and regs used to return values. */
4812 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4813 if (FUNCTION_ARG_REGNO_P (i
)
4814 && targetm
.calls
.function_value_regno_p (i
))
4815 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
4817 bitmap_and_into (return_regs
,
4818 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
4819 bitmap_and_into (return_regs
,
4820 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
4821 if (!bitmap_empty_p (return_regs
))
4823 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
4824 if (NONDEBUG_INSN_P (insn
))
4828 /* If this insn sets any reg in return_regs, add all
4829 reg uses to the set of regs we're interested in. */
4830 FOR_EACH_INSN_DEF (def
, insn
)
4831 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
4833 df_simulate_uses (insn
, return_regs
);
4837 if (bitmap_intersect_p (merge_set
, return_regs
))
4839 BITMAP_FREE (return_regs
);
4840 BITMAP_FREE (merge_set
);
4844 BITMAP_FREE (return_regs
);
4849 /* We don't want to use normal invert_jump or redirect_jump because
4850 we don't want to delete_insn called. Also, we want to do our own
4851 change group management. */
4853 old_dest
= JUMP_LABEL (jump
);
4854 if (other_bb
!= new_dest
)
4856 if (!any_condjump_p (jump
))
4859 if (JUMP_P (BB_END (dest_edge
->src
)))
4860 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
4861 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4862 new_dest_label
= ret_rtx
;
4864 new_dest_label
= block_label (new_dest
);
4866 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
4868 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
4869 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
4873 if (verify_changes (n_validated_changes
))
4874 confirm_change_group ();
4878 if (other_bb
!= new_dest
)
4880 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
4883 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
4886 std::swap (BRANCH_EDGE (test_bb
)->count
,
4887 FALLTHRU_EDGE (test_bb
)->count
);
4888 std::swap (BRANCH_EDGE (test_bb
)->probability
,
4889 FALLTHRU_EDGE (test_bb
)->probability
);
4890 update_br_prob_note (test_bb
);
4894 /* Move the insns out of MERGE_BB to before the branch. */
4899 if (end
== BB_END (merge_bb
))
4900 BB_END (merge_bb
) = PREV_INSN (head
);
4902 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4903 notes being moved might become invalid. */
4909 if (! INSN_P (insn
))
4911 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4914 remove_note (insn
, note
);
4915 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
4917 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4918 notes referring to the registers being set might become invalid. */
4924 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
4925 remove_reg_equal_equiv_notes_for_regno (i
);
4927 BITMAP_FREE (merge_set
);
4930 reorder_insns (head
, end
, PREV_INSN (earliest
));
4933 /* Remove the jump and edge if we can. */
4934 if (other_bb
== new_dest
)
4937 remove_edge (BRANCH_EDGE (test_bb
));
4938 /* ??? Can't merge blocks here, as then_bb is still in use.
4939 At minimum, the merge will get done just before bb-reorder. */
4948 BITMAP_FREE (merge_set
);
4953 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4954 we are after combine pass. */
4957 if_convert (bool after_combine
)
4964 df_live_add_problem ();
4965 df_live_set_all_dirty ();
4968 /* Record whether we are after combine pass. */
4969 ifcvt_after_combine
= after_combine
;
4970 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
4971 != CODE_FOR_nothing
);
4972 num_possible_if_blocks
= 0;
4973 num_updated_if_blocks
= 0;
4974 num_true_changes
= 0;
4976 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
4977 mark_loop_exit_edges ();
4978 loop_optimizer_finalize ();
4979 free_dominance_info (CDI_DOMINATORS
);
4981 /* Compute postdominators. */
4982 calculate_dominance_info (CDI_POST_DOMINATORS
);
4984 df_set_flags (DF_LR_RUN_DCE
);
4986 /* Go through each of the basic blocks looking for things to convert. If we
4987 have conditional execution, we make multiple passes to allow us to handle
4988 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
4993 /* Only need to do dce on the first pass. */
4994 df_clear_flags (DF_LR_RUN_DCE
);
4995 cond_exec_changed_p
= FALSE
;
4998 #ifdef IFCVT_MULTIPLE_DUMPS
4999 if (dump_file
&& pass
> 1)
5000 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5003 FOR_EACH_BB_FN (bb
, cfun
)
5006 while (!df_get_bb_dirty (bb
)
5007 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5011 #ifdef IFCVT_MULTIPLE_DUMPS
5012 if (dump_file
&& cond_exec_changed_p
)
5013 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5016 while (cond_exec_changed_p
);
5018 #ifdef IFCVT_MULTIPLE_DUMPS
5020 fprintf (dump_file
, "\n\n========== no more changes\n");
5023 free_dominance_info (CDI_POST_DOMINATORS
);
5028 clear_aux_for_blocks ();
5030 /* If we allocated new pseudos, we must resize the array for sched1. */
5031 if (max_regno
< max_reg_num ())
5032 max_regno
= max_reg_num ();
5034 /* Write the final stats. */
5035 if (dump_file
&& num_possible_if_blocks
> 0)
5038 "\n%d possible IF blocks searched.\n",
5039 num_possible_if_blocks
);
5041 "%d IF blocks converted.\n",
5042 num_updated_if_blocks
);
5044 "%d true changes made.\n\n\n",
5049 df_remove_problem (df_live
);
5051 #ifdef ENABLE_CHECKING
5052 verify_flow_info ();
5056 /* If-conversion and CFG cleanup. */
5058 rest_of_handle_if_conversion (void)
5060 if (flag_if_conversion
)
5064 dump_reg_info (dump_file
);
5065 dump_flow_info (dump_file
, dump_flags
);
5067 cleanup_cfg (CLEANUP_EXPENSIVE
);
5077 const pass_data pass_data_rtl_ifcvt
=
5079 RTL_PASS
, /* type */
5081 OPTGROUP_NONE
, /* optinfo_flags */
5082 TV_IFCVT
, /* tv_id */
5083 0, /* properties_required */
5084 0, /* properties_provided */
5085 0, /* properties_destroyed */
5086 0, /* todo_flags_start */
5087 TODO_df_finish
, /* todo_flags_finish */
5090 class pass_rtl_ifcvt
: public rtl_opt_pass
5093 pass_rtl_ifcvt (gcc::context
*ctxt
)
5094 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5097 /* opt_pass methods: */
5098 virtual bool gate (function
*)
5100 return (optimize
> 0) && dbg_cnt (if_conversion
);
5103 virtual unsigned int execute (function
*)
5105 return rest_of_handle_if_conversion ();
5108 }; // class pass_rtl_ifcvt
5113 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5115 return new pass_rtl_ifcvt (ctxt
);
5119 /* Rerun if-conversion, as combine may have simplified things enough
5120 to now meet sequence length restrictions. */
5124 const pass_data pass_data_if_after_combine
=
5126 RTL_PASS
, /* type */
5128 OPTGROUP_NONE
, /* optinfo_flags */
5129 TV_IFCVT
, /* tv_id */
5130 0, /* properties_required */
5131 0, /* properties_provided */
5132 0, /* properties_destroyed */
5133 0, /* todo_flags_start */
5134 TODO_df_finish
, /* todo_flags_finish */
5137 class pass_if_after_combine
: public rtl_opt_pass
5140 pass_if_after_combine (gcc::context
*ctxt
)
5141 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5144 /* opt_pass methods: */
5145 virtual bool gate (function
*)
5147 return optimize
> 0 && flag_if_conversion
5148 && dbg_cnt (if_after_combine
);
5151 virtual unsigned int execute (function
*)
5157 }; // class pass_if_after_combine
5162 make_pass_if_after_combine (gcc::context
*ctxt
)
5164 return new pass_if_after_combine (ctxt
);
5170 const pass_data pass_data_if_after_reload
=
5172 RTL_PASS
, /* type */
5174 OPTGROUP_NONE
, /* optinfo_flags */
5175 TV_IFCVT2
, /* tv_id */
5176 0, /* properties_required */
5177 0, /* properties_provided */
5178 0, /* properties_destroyed */
5179 0, /* todo_flags_start */
5180 TODO_df_finish
, /* todo_flags_finish */
5183 class pass_if_after_reload
: public rtl_opt_pass
5186 pass_if_after_reload (gcc::context
*ctxt
)
5187 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5190 /* opt_pass methods: */
5191 virtual bool gate (function
*)
5193 return optimize
> 0 && flag_if_conversion2
5194 && dbg_cnt (if_after_reload
);
5197 virtual unsigned int execute (function
*)
5203 }; // class pass_if_after_reload
5208 make_pass_if_after_reload (gcc::context
*ctxt
)
5210 return new pass_if_after_reload (ctxt
);