Merge branch 'master' into python
[official-gcc.git] / gcc / reginfo.c
blob879f50b08257e26519a7b5c6026f01c56d957b16
1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
30 #include "config.h"
31 #include "system.h"
32 #include "coretypes.h"
33 #include "tm.h"
34 #include "hard-reg-set.h"
35 #include "rtl.h"
36 #include "expr.h"
37 #include "tm_p.h"
38 #include "flags.h"
39 #include "basic-block.h"
40 #include "regs.h"
41 #include "addresses.h"
42 #include "function.h"
43 #include "insn-config.h"
44 #include "recog.h"
45 #include "reload.h"
46 #include "toplev.h"
47 #include "diagnostic-core.h"
48 #include "output.h"
49 #include "timevar.h"
50 #include "hashtab.h"
51 #include "target.h"
52 #include "tree-pass.h"
53 #include "df.h"
54 #include "ira.h"
56 /* Maximum register number used in this function, plus one. */
58 int max_regno;
61 struct target_hard_regs default_target_hard_regs;
62 struct target_regs default_target_regs;
63 #if SWITCHABLE_TARGET
64 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
65 struct target_regs *this_target_regs = &default_target_regs;
66 #endif
68 /* Data for initializing fixed_regs. */
69 static const char initial_fixed_regs[] = FIXED_REGISTERS;
71 /* Data for initializing call_used_regs. */
72 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
74 #ifdef CALL_REALLY_USED_REGISTERS
75 /* Data for initializing call_really_used_regs. */
76 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
77 #endif
79 #ifdef CALL_REALLY_USED_REGISTERS
80 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
81 #else
82 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
83 #endif
85 /* Indexed by hard register number, contains 1 for registers
86 that are being used for global register decls.
87 These must be exempt from ordinary flow analysis
88 and are also considered fixed. */
89 char global_regs[FIRST_PSEUDO_REGISTER];
91 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
92 in dataflow more conveniently. */
93 regset regs_invalidated_by_call_regset;
95 /* The bitmap_obstack is used to hold some static variables that
96 should not be reset after each function is compiled. */
97 static bitmap_obstack persistent_obstack;
99 /* Used to initialize reg_alloc_order. */
100 #ifdef REG_ALLOC_ORDER
101 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
102 #endif
104 /* The same information, but as an array of unsigned ints. We copy from
105 these unsigned ints to the table above. We do this so the tm.h files
106 do not have to be aware of the wordsize for machines with <= 64 regs.
107 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
108 #define N_REG_INTS \
109 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
111 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
112 = REG_CLASS_CONTENTS;
114 /* Array containing all of the register names. */
115 static const char *const initial_reg_names[] = REGISTER_NAMES;
117 /* Array containing all of the register class names. */
118 const char * reg_class_names[] = REG_CLASS_NAMES;
120 #define last_mode_for_init_move_cost \
121 (this_target_regs->x_last_mode_for_init_move_cost)
123 /* No more global register variables may be declared; true once
124 reginfo has been initialized. */
125 static int no_global_reg_vars = 0;
127 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
128 correspond to the hard registers, if any, set in that map. This
129 could be done far more efficiently by having all sorts of special-cases
130 with moving single words, but probably isn't worth the trouble. */
131 void
132 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
134 unsigned i;
135 bitmap_iterator bi;
137 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
139 if (i >= FIRST_PSEUDO_REGISTER)
140 return;
141 SET_HARD_REG_BIT (*to, i);
145 /* Function called only once per target_globals to initialize the
146 target_hard_regs structure. Once this is done, various switches
147 may override. */
148 void
149 init_reg_sets (void)
151 int i, j;
153 /* First copy the register information from the initial int form into
154 the regsets. */
156 for (i = 0; i < N_REG_CLASSES; i++)
158 CLEAR_HARD_REG_SET (reg_class_contents[i]);
160 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
161 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
162 if (int_reg_class_contents[i][j / 32]
163 & ((unsigned) 1 << (j % 32)))
164 SET_HARD_REG_BIT (reg_class_contents[i], j);
167 /* Sanity check: make sure the target macros FIXED_REGISTERS and
168 CALL_USED_REGISTERS had the right number of initializers. */
169 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
170 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
171 #ifdef CALL_REALLY_USED_REGISTERS
172 gcc_assert (sizeof call_really_used_regs
173 == sizeof initial_call_really_used_regs);
174 #endif
175 #ifdef REG_ALLOC_ORDER
176 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
177 #endif
178 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
180 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
181 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
182 #ifdef CALL_REALLY_USED_REGISTERS
183 memcpy (call_really_used_regs, initial_call_really_used_regs,
184 sizeof call_really_used_regs);
185 #endif
186 #ifdef REG_ALLOC_ORDER
187 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
188 #endif
189 memcpy (reg_names, initial_reg_names, sizeof reg_names);
192 /* Initialize may_move_cost and friends for mode M. */
193 void
194 init_move_cost (enum machine_mode m)
196 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
197 bool all_match = true;
198 unsigned int i, j;
200 gcc_assert (have_regs_of_mode[m]);
201 for (i = 0; i < N_REG_CLASSES; i++)
202 if (contains_reg_of_mode[i][m])
203 for (j = 0; j < N_REG_CLASSES; j++)
205 int cost;
206 if (!contains_reg_of_mode[j][m])
207 cost = 65535;
208 else
210 cost = register_move_cost (m, (enum reg_class) i,
211 (enum reg_class) j);
212 gcc_assert (cost < 65535);
214 all_match &= (last_move_cost[i][j] == cost);
215 last_move_cost[i][j] = cost;
217 if (all_match && last_mode_for_init_move_cost != -1)
219 move_cost[m] = move_cost[last_mode_for_init_move_cost];
220 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
221 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
222 return;
224 last_mode_for_init_move_cost = m;
225 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
226 * N_REG_CLASSES);
227 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
228 * N_REG_CLASSES);
229 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
230 * N_REG_CLASSES);
231 for (i = 0; i < N_REG_CLASSES; i++)
232 if (contains_reg_of_mode[i][m])
233 for (j = 0; j < N_REG_CLASSES; j++)
235 int cost;
236 enum reg_class *p1, *p2;
238 if (last_move_cost[i][j] == 65535)
240 move_cost[m][i][j] = 65535;
241 may_move_in_cost[m][i][j] = 65535;
242 may_move_out_cost[m][i][j] = 65535;
244 else
246 cost = last_move_cost[i][j];
248 for (p2 = &reg_class_subclasses[j][0];
249 *p2 != LIM_REG_CLASSES; p2++)
250 if (*p2 != i && contains_reg_of_mode[*p2][m])
251 cost = MAX (cost, move_cost[m][i][*p2]);
253 for (p1 = &reg_class_subclasses[i][0];
254 *p1 != LIM_REG_CLASSES; p1++)
255 if (*p1 != j && contains_reg_of_mode[*p1][m])
256 cost = MAX (cost, move_cost[m][*p1][j]);
258 gcc_assert (cost <= 65535);
259 move_cost[m][i][j] = cost;
261 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
262 may_move_in_cost[m][i][j] = 0;
263 else
264 may_move_in_cost[m][i][j] = cost;
266 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
267 may_move_out_cost[m][i][j] = 0;
268 else
269 may_move_out_cost[m][i][j] = cost;
272 else
273 for (j = 0; j < N_REG_CLASSES; j++)
275 move_cost[m][i][j] = 65535;
276 may_move_in_cost[m][i][j] = 65535;
277 may_move_out_cost[m][i][j] = 65535;
281 /* We need to save copies of some of the register information which
282 can be munged by command-line switches so we can restore it during
283 subsequent back-end reinitialization. */
284 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
285 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
286 #ifdef CALL_REALLY_USED_REGISTERS
287 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
288 #endif
289 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
291 /* Save the register information. */
292 void
293 save_register_info (void)
295 /* Sanity check: make sure the target macros FIXED_REGISTERS and
296 CALL_USED_REGISTERS had the right number of initializers. */
297 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
298 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
299 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
300 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
302 /* Likewise for call_really_used_regs. */
303 #ifdef CALL_REALLY_USED_REGISTERS
304 gcc_assert (sizeof call_really_used_regs
305 == sizeof saved_call_really_used_regs);
306 memcpy (saved_call_really_used_regs, call_really_used_regs,
307 sizeof call_really_used_regs);
308 #endif
310 /* And similarly for reg_names. */
311 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
312 memcpy (saved_reg_names, reg_names, sizeof reg_names);
315 /* Restore the register information. */
316 static void
317 restore_register_info (void)
319 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
320 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
322 #ifdef CALL_REALLY_USED_REGISTERS
323 memcpy (call_really_used_regs, saved_call_really_used_regs,
324 sizeof call_really_used_regs);
325 #endif
327 memcpy (reg_names, saved_reg_names, sizeof reg_names);
330 /* After switches have been processed, which perhaps alter
331 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
332 static void
333 init_reg_sets_1 (void)
335 unsigned int i, j;
336 unsigned int /* enum machine_mode */ m;
338 restore_register_info ();
340 #ifdef REG_ALLOC_ORDER
341 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
342 inv_reg_alloc_order[reg_alloc_order[i]] = i;
343 #endif
345 /* This macro allows the fixed or call-used registers
346 and the register classes to depend on target flags. */
348 #ifdef CONDITIONAL_REGISTER_USAGE
349 CONDITIONAL_REGISTER_USAGE;
350 #endif
352 /* Compute number of hard regs in each class. */
354 memset (reg_class_size, 0, sizeof reg_class_size);
355 for (i = 0; i < N_REG_CLASSES; i++)
357 bool any_nonfixed = false;
358 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
359 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
361 reg_class_size[i]++;
362 if (!fixed_regs[j])
363 any_nonfixed = true;
365 class_only_fixed_regs[i] = !any_nonfixed;
368 /* Initialize the table of subunions.
369 reg_class_subunion[I][J] gets the largest-numbered reg-class
370 that is contained in the union of classes I and J. */
372 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
373 for (i = 0; i < N_REG_CLASSES; i++)
375 for (j = 0; j < N_REG_CLASSES; j++)
377 HARD_REG_SET c;
378 int k;
380 COPY_HARD_REG_SET (c, reg_class_contents[i]);
381 IOR_HARD_REG_SET (c, reg_class_contents[j]);
382 for (k = 0; k < N_REG_CLASSES; k++)
383 if (hard_reg_set_subset_p (reg_class_contents[k], c)
384 && !hard_reg_set_subset_p (reg_class_contents[k],
385 reg_class_contents
386 [(int) reg_class_subunion[i][j]]))
387 reg_class_subunion[i][j] = (enum reg_class) k;
391 /* Initialize the table of superunions.
392 reg_class_superunion[I][J] gets the smallest-numbered reg-class
393 containing the union of classes I and J. */
395 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
396 for (i = 0; i < N_REG_CLASSES; i++)
398 for (j = 0; j < N_REG_CLASSES; j++)
400 HARD_REG_SET c;
401 int k;
403 COPY_HARD_REG_SET (c, reg_class_contents[i]);
404 IOR_HARD_REG_SET (c, reg_class_contents[j]);
405 for (k = 0; k < N_REG_CLASSES; k++)
406 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
407 break;
409 reg_class_superunion[i][j] = (enum reg_class) k;
413 /* Initialize the tables of subclasses and superclasses of each reg class.
414 First clear the whole table, then add the elements as they are found. */
416 for (i = 0; i < N_REG_CLASSES; i++)
418 for (j = 0; j < N_REG_CLASSES; j++)
419 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
422 for (i = 0; i < N_REG_CLASSES; i++)
424 if (i == (int) NO_REGS)
425 continue;
427 for (j = i + 1; j < N_REG_CLASSES; j++)
428 if (hard_reg_set_subset_p (reg_class_contents[i],
429 reg_class_contents[j]))
431 /* Reg class I is a subclass of J.
432 Add J to the table of superclasses of I. */
433 enum reg_class *p;
435 /* Add I to the table of superclasses of J. */
436 p = &reg_class_subclasses[j][0];
437 while (*p != LIM_REG_CLASSES) p++;
438 *p = (enum reg_class) i;
442 /* Initialize "constant" tables. */
444 CLEAR_HARD_REG_SET (fixed_reg_set);
445 CLEAR_HARD_REG_SET (call_used_reg_set);
446 CLEAR_HARD_REG_SET (call_fixed_reg_set);
447 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
448 if (!regs_invalidated_by_call_regset)
450 bitmap_obstack_initialize (&persistent_obstack);
451 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
453 else
454 CLEAR_REG_SET (regs_invalidated_by_call_regset);
456 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
458 /* call_used_regs must include fixed_regs. */
459 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
460 #ifdef CALL_REALLY_USED_REGISTERS
461 /* call_used_regs must include call_really_used_regs. */
462 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
463 #endif
465 if (fixed_regs[i])
466 SET_HARD_REG_BIT (fixed_reg_set, i);
468 if (call_used_regs[i])
469 SET_HARD_REG_BIT (call_used_reg_set, i);
471 /* There are a couple of fixed registers that we know are safe to
472 exclude from being clobbered by calls:
474 The frame pointer is always preserved across calls. The arg
475 pointer is if it is fixed. The stack pointer usually is,
476 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
477 CLOBBER will be present. If we are generating PIC code, the
478 PIC offset table register is preserved across calls, though the
479 target can override that. */
481 if (i == STACK_POINTER_REGNUM)
483 else if (global_regs[i])
485 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
486 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
488 else if (i == FRAME_POINTER_REGNUM)
490 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
491 else if (i == HARD_FRAME_POINTER_REGNUM)
493 #endif
494 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
495 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
497 #endif
498 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
499 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
501 else if (CALL_REALLY_USED_REGNO_P (i))
503 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
504 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
508 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
510 /* Preserve global registers if called more than once. */
511 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
513 if (global_regs[i])
515 fixed_regs[i] = call_used_regs[i] = 1;
516 SET_HARD_REG_BIT (fixed_reg_set, i);
517 SET_HARD_REG_BIT (call_used_reg_set, i);
518 SET_HARD_REG_BIT (call_fixed_reg_set, i);
522 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
523 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
524 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
526 HARD_REG_SET ok_regs;
527 CLEAR_HARD_REG_SET (ok_regs);
528 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
529 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
530 SET_HARD_REG_BIT (ok_regs, j);
532 for (i = 0; i < N_REG_CLASSES; i++)
533 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
534 (enum machine_mode) m)
535 <= reg_class_size[i])
536 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
538 contains_reg_of_mode [i][m] = 1;
539 have_regs_of_mode [m] = 1;
543 /* Reset move_cost and friends, making sure we only free shared
544 table entries once. */
545 for (i = 0; i < MAX_MACHINE_MODE; i++)
546 if (move_cost[i])
548 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
550 if (i == j)
552 free (move_cost[i]);
553 free (may_move_in_cost[i]);
554 free (may_move_out_cost[i]);
557 memset (move_cost, 0, sizeof move_cost);
558 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
559 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
560 last_mode_for_init_move_cost = -1;
563 /* Compute the table of register modes.
564 These values are used to record death information for individual registers
565 (as opposed to a multi-register mode).
566 This function might be invoked more than once, if the target has support
567 for changing register usage conventions on a per-function basis.
569 void
570 init_reg_modes_target (void)
572 int i, j;
574 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
575 for (j = 0; j < MAX_MACHINE_MODE; j++)
576 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
578 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
580 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
582 /* If we couldn't find a valid mode, just use the previous mode.
583 ??? One situation in which we need to do this is on the mips where
584 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
585 to use DF mode for the even registers and VOIDmode for the odd
586 (for the cpu models where the odd ones are inaccessible). */
587 if (reg_raw_mode[i] == VOIDmode)
588 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
592 /* Finish initializing the register sets and initialize the register modes.
593 This function might be invoked more than once, if the target has support
594 for changing register usage conventions on a per-function basis.
596 void
597 init_regs (void)
599 /* This finishes what was started by init_reg_sets, but couldn't be done
600 until after register usage was specified. */
601 init_reg_sets_1 ();
604 /* The same as previous function plus initializing IRA. */
605 void
606 reinit_regs (void)
608 init_regs ();
609 /* caller_save needs to be re-initialized. */
610 caller_save_initialized_p = false;
611 ira_init ();
614 /* Initialize some fake stack-frame MEM references for use in
615 memory_move_secondary_cost. */
616 void
617 init_fake_stack_mems (void)
619 int i;
621 for (i = 0; i < MAX_MACHINE_MODE; i++)
622 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
626 /* Compute cost of moving data from a register of class FROM to one of
627 TO, using MODE. */
630 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
632 return targetm.register_move_cost (mode, from, to);
635 /* Compute cost of moving registers to/from memory. */
637 memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in)
639 return targetm.memory_move_cost (mode, rclass, in);
642 /* Compute extra cost of moving registers to/from memory due to reloads.
643 Only needed if secondary reloads are required for memory moves. */
645 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
646 bool in)
648 reg_class_t altclass;
649 int partial_cost = 0;
650 /* We need a memory reference to feed to SECONDARY... macros. */
651 /* mem may be unused even if the SECONDARY_ macros are defined. */
652 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
654 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
656 if (altclass == NO_REGS)
657 return 0;
659 if (in)
660 partial_cost = register_move_cost (mode, altclass, rclass);
661 else
662 partial_cost = register_move_cost (mode, rclass, altclass);
664 if (rclass == altclass)
665 /* This isn't simply a copy-to-temporary situation. Can't guess
666 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
667 calling here in that case.
669 I'm tempted to put in an assert here, but returning this will
670 probably only give poor estimates, which is what we would've
671 had before this code anyways. */
672 return partial_cost;
674 /* Check if the secondary reload register will also need a
675 secondary reload. */
676 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
679 /* Return a machine mode that is legitimate for hard reg REGNO and large
680 enough to save nregs. If we can't find one, return VOIDmode.
681 If CALL_SAVED is true, only consider modes that are call saved. */
682 enum machine_mode
683 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
684 unsigned int nregs, bool call_saved)
686 unsigned int /* enum machine_mode */ m;
687 enum machine_mode found_mode = VOIDmode, mode;
689 /* We first look for the largest integer mode that can be validly
690 held in REGNO. If none, we look for the largest floating-point mode.
691 If we still didn't find a valid mode, try CCmode. */
693 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
694 mode != VOIDmode;
695 mode = GET_MODE_WIDER_MODE (mode))
696 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
697 && HARD_REGNO_MODE_OK (regno, mode)
698 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
699 found_mode = mode;
701 if (found_mode != VOIDmode)
702 return found_mode;
704 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
705 mode != VOIDmode;
706 mode = GET_MODE_WIDER_MODE (mode))
707 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
708 && HARD_REGNO_MODE_OK (regno, mode)
709 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
710 found_mode = mode;
712 if (found_mode != VOIDmode)
713 return found_mode;
715 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
716 mode != VOIDmode;
717 mode = GET_MODE_WIDER_MODE (mode))
718 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
719 && HARD_REGNO_MODE_OK (regno, mode)
720 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
721 found_mode = mode;
723 if (found_mode != VOIDmode)
724 return found_mode;
726 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
727 mode != VOIDmode;
728 mode = GET_MODE_WIDER_MODE (mode))
729 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
730 && HARD_REGNO_MODE_OK (regno, mode)
731 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
732 found_mode = mode;
734 if (found_mode != VOIDmode)
735 return found_mode;
737 /* Iterate over all of the CCmodes. */
738 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
740 mode = (enum machine_mode) m;
741 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
742 && HARD_REGNO_MODE_OK (regno, mode)
743 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
744 return mode;
747 /* We can't find a mode valid for this register. */
748 return VOIDmode;
751 /* Specify the usage characteristics of the register named NAME.
752 It should be a fixed register if FIXED and a
753 call-used register if CALL_USED. */
754 void
755 fix_register (const char *name, int fixed, int call_used)
757 int i;
759 /* Decode the name and update the primary form of
760 the register info. */
762 if ((i = decode_reg_name (name)) >= 0)
764 if ((i == STACK_POINTER_REGNUM
765 #ifdef HARD_FRAME_POINTER_REGNUM
766 || i == HARD_FRAME_POINTER_REGNUM
767 #else
768 || i == FRAME_POINTER_REGNUM
769 #endif
771 && (fixed == 0 || call_used == 0))
773 static const char * const what_option[2][2] = {
774 { "call-saved", "call-used" },
775 { "no-such-option", "fixed" }};
777 error ("can't use '%s' as a %s register", name,
778 what_option[fixed][call_used]);
780 else
782 fixed_regs[i] = fixed;
783 call_used_regs[i] = call_used;
784 #ifdef CALL_REALLY_USED_REGISTERS
785 if (fixed == 0)
786 call_really_used_regs[i] = call_used;
787 #endif
790 else
792 warning (0, "unknown register name: %s", name);
796 /* Mark register number I as global. */
797 void
798 globalize_reg (int i)
800 #ifdef STACK_REGS
801 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
803 error ("stack register used for global register variable");
804 return;
806 #endif
808 if (fixed_regs[i] == 0 && no_global_reg_vars)
809 error ("global register variable follows a function definition");
811 if (global_regs[i])
813 warning (0, "register used for two global register variables");
814 return;
817 if (call_used_regs[i] && ! fixed_regs[i])
818 warning (0, "call-clobbered register used for global register variable");
820 global_regs[i] = 1;
822 /* If we're globalizing the frame pointer, we need to set the
823 appropriate regs_invalidated_by_call bit, even if it's already
824 set in fixed_regs. */
825 if (i != STACK_POINTER_REGNUM)
827 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
828 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
831 /* If already fixed, nothing else to do. */
832 if (fixed_regs[i])
833 return;
835 fixed_regs[i] = call_used_regs[i] = 1;
836 #ifdef CALL_REALLY_USED_REGISTERS
837 call_really_used_regs[i] = 1;
838 #endif
840 SET_HARD_REG_BIT (fixed_reg_set, i);
841 SET_HARD_REG_BIT (call_used_reg_set, i);
842 SET_HARD_REG_BIT (call_fixed_reg_set, i);
844 reinit_regs ();
848 /* Structure used to record preferences of given pseudo. */
849 struct reg_pref
851 /* (enum reg_class) prefclass is the preferred class. May be
852 NO_REGS if no class is better than memory. */
853 char prefclass;
855 /* altclass is a register class that we should use for allocating
856 pseudo if no register in the preferred class is available.
857 If no register in this class is available, memory is preferred.
859 It might appear to be more general to have a bitmask of classes here,
860 but since it is recommended that there be a class corresponding to the
861 union of most major pair of classes, that generality is not required. */
862 char altclass;
864 /* coverclass is a register class that IRA uses for allocating
865 the pseudo. */
866 char coverclass;
869 /* Record preferences of each pseudo. This is available after RA is
870 run. */
871 static struct reg_pref *reg_pref;
873 /* Current size of reg_info. */
874 static int reg_info_size;
876 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
877 This function is sometimes called before the info has been computed.
878 When that happens, just return GENERAL_REGS, which is innocuous. */
879 enum reg_class
880 reg_preferred_class (int regno)
882 if (reg_pref == 0)
883 return GENERAL_REGS;
885 return (enum reg_class) reg_pref[regno].prefclass;
888 enum reg_class
889 reg_alternate_class (int regno)
891 if (reg_pref == 0)
892 return ALL_REGS;
894 return (enum reg_class) reg_pref[regno].altclass;
897 /* Return the reg_class which is used by IRA for its allocation. */
898 enum reg_class
899 reg_cover_class (int regno)
901 if (reg_pref == 0)
902 return NO_REGS;
904 return (enum reg_class) reg_pref[regno].coverclass;
909 /* Allocate space for reg info. */
910 static void
911 allocate_reg_info (void)
913 reg_info_size = max_reg_num ();
914 gcc_assert (! reg_pref && ! reg_renumber);
915 reg_renumber = XNEWVEC (short, reg_info_size);
916 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
917 memset (reg_renumber, -1, reg_info_size * sizeof (short));
921 /* Resize reg info. The new elements will be uninitialized. Return
922 TRUE if new elements (for new pseudos) were added. */
923 bool
924 resize_reg_info (void)
926 int old;
928 if (reg_pref == NULL)
930 allocate_reg_info ();
931 return true;
933 if (reg_info_size == max_reg_num ())
934 return false;
935 old = reg_info_size;
936 reg_info_size = max_reg_num ();
937 gcc_assert (reg_pref && reg_renumber);
938 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
939 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
940 memset (reg_pref + old, -1,
941 (reg_info_size - old) * sizeof (struct reg_pref));
942 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
943 return true;
947 /* Free up the space allocated by allocate_reg_info. */
948 void
949 free_reg_info (void)
951 if (reg_pref)
953 free (reg_pref);
954 reg_pref = NULL;
957 if (reg_renumber)
959 free (reg_renumber);
960 reg_renumber = NULL;
964 /* Initialize some global data for this pass. */
965 static unsigned int
966 reginfo_init (void)
968 if (df)
969 df_compute_regs_ever_live (true);
971 /* This prevents dump_flow_info from losing if called
972 before reginfo is run. */
973 reg_pref = NULL;
974 /* No more global register variables may be declared. */
975 no_global_reg_vars = 1;
976 return 1;
979 struct rtl_opt_pass pass_reginfo_init =
982 RTL_PASS,
983 "reginfo", /* name */
984 NULL, /* gate */
985 reginfo_init, /* execute */
986 NULL, /* sub */
987 NULL, /* next */
988 0, /* static_pass_number */
989 TV_NONE, /* tv_id */
990 0, /* properties_required */
991 0, /* properties_provided */
992 0, /* properties_destroyed */
993 0, /* todo_flags_start */
994 0 /* todo_flags_finish */
1000 /* Set up preferred, alternate, and cover classes for REGNO as
1001 PREFCLASS, ALTCLASS, and COVERCLASS. */
1002 void
1003 setup_reg_classes (int regno,
1004 enum reg_class prefclass, enum reg_class altclass,
1005 enum reg_class coverclass)
1007 if (reg_pref == NULL)
1008 return;
1009 gcc_assert (reg_info_size == max_reg_num ());
1010 reg_pref[regno].prefclass = prefclass;
1011 reg_pref[regno].altclass = altclass;
1012 reg_pref[regno].coverclass = coverclass;
1016 /* This is the `regscan' pass of the compiler, run just before cse and
1017 again just before loop. It finds the first and last use of each
1018 pseudo-register. */
1020 static void reg_scan_mark_refs (rtx, rtx);
1022 void
1023 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1025 rtx insn;
1027 timevar_push (TV_REG_SCAN);
1029 for (insn = f; insn; insn = NEXT_INSN (insn))
1030 if (INSN_P (insn))
1032 reg_scan_mark_refs (PATTERN (insn), insn);
1033 if (REG_NOTES (insn))
1034 reg_scan_mark_refs (REG_NOTES (insn), insn);
1037 timevar_pop (TV_REG_SCAN);
1041 /* X is the expression to scan. INSN is the insn it appears in.
1042 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1043 We should only record information for REGs with numbers
1044 greater than or equal to MIN_REGNO. */
1045 static void
1046 reg_scan_mark_refs (rtx x, rtx insn)
1048 enum rtx_code code;
1049 rtx dest;
1050 rtx note;
1052 if (!x)
1053 return;
1054 code = GET_CODE (x);
1055 switch (code)
1057 case CONST:
1058 case CONST_INT:
1059 case CONST_DOUBLE:
1060 case CONST_FIXED:
1061 case CONST_VECTOR:
1062 case CC0:
1063 case PC:
1064 case SYMBOL_REF:
1065 case LABEL_REF:
1066 case ADDR_VEC:
1067 case ADDR_DIFF_VEC:
1068 case REG:
1069 return;
1071 case EXPR_LIST:
1072 if (XEXP (x, 0))
1073 reg_scan_mark_refs (XEXP (x, 0), insn);
1074 if (XEXP (x, 1))
1075 reg_scan_mark_refs (XEXP (x, 1), insn);
1076 break;
1078 case INSN_LIST:
1079 if (XEXP (x, 1))
1080 reg_scan_mark_refs (XEXP (x, 1), insn);
1081 break;
1083 case CLOBBER:
1084 if (MEM_P (XEXP (x, 0)))
1085 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1086 break;
1088 case SET:
1089 /* Count a set of the destination if it is a register. */
1090 for (dest = SET_DEST (x);
1091 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1092 || GET_CODE (dest) == ZERO_EXTEND;
1093 dest = XEXP (dest, 0))
1096 /* If this is setting a pseudo from another pseudo or the sum of a
1097 pseudo and a constant integer and the other pseudo is known to be
1098 a pointer, set the destination to be a pointer as well.
1100 Likewise if it is setting the destination from an address or from a
1101 value equivalent to an address or to the sum of an address and
1102 something else.
1104 But don't do any of this if the pseudo corresponds to a user
1105 variable since it should have already been set as a pointer based
1106 on the type. */
1108 if (REG_P (SET_DEST (x))
1109 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1110 /* If the destination pseudo is set more than once, then other
1111 sets might not be to a pointer value (consider access to a
1112 union in two threads of control in the presence of global
1113 optimizations). So only set REG_POINTER on the destination
1114 pseudo if this is the only set of that pseudo. */
1115 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1116 && ! REG_USERVAR_P (SET_DEST (x))
1117 && ! REG_POINTER (SET_DEST (x))
1118 && ((REG_P (SET_SRC (x))
1119 && REG_POINTER (SET_SRC (x)))
1120 || ((GET_CODE (SET_SRC (x)) == PLUS
1121 || GET_CODE (SET_SRC (x)) == LO_SUM)
1122 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1123 && REG_P (XEXP (SET_SRC (x), 0))
1124 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1125 || GET_CODE (SET_SRC (x)) == CONST
1126 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1127 || GET_CODE (SET_SRC (x)) == LABEL_REF
1128 || (GET_CODE (SET_SRC (x)) == HIGH
1129 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1130 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1131 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1132 || ((GET_CODE (SET_SRC (x)) == PLUS
1133 || GET_CODE (SET_SRC (x)) == LO_SUM)
1134 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1135 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1136 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1137 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1138 && (GET_CODE (XEXP (note, 0)) == CONST
1139 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1140 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1141 REG_POINTER (SET_DEST (x)) = 1;
1143 /* If this is setting a register from a register or from a simple
1144 conversion of a register, propagate REG_EXPR. */
1145 if (REG_P (dest) && !REG_ATTRS (dest))
1147 rtx src = SET_SRC (x);
1149 while (GET_CODE (src) == SIGN_EXTEND
1150 || GET_CODE (src) == ZERO_EXTEND
1151 || GET_CODE (src) == TRUNCATE
1152 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1153 src = XEXP (src, 0);
1155 set_reg_attrs_from_value (dest, src);
1158 /* ... fall through ... */
1160 default:
1162 const char *fmt = GET_RTX_FORMAT (code);
1163 int i;
1164 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1166 if (fmt[i] == 'e')
1167 reg_scan_mark_refs (XEXP (x, i), insn);
1168 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1170 int j;
1171 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1172 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1180 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1181 is also in C2. */
1183 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1185 return (c1 == c2
1186 || c2 == ALL_REGS
1187 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1188 reg_class_contents[(int) c2]));
1191 /* Return nonzero if there is a register that is in both C1 and C2. */
1193 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1195 return (c1 == c2
1196 || c1 == ALL_REGS
1197 || c2 == ALL_REGS
1198 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1199 reg_class_contents[(int) c2]));
1204 /* Passes for keeping and updating info about modes of registers
1205 inside subregisters. */
1207 #ifdef CANNOT_CHANGE_MODE_CLASS
1209 struct subregs_of_mode_node
1211 unsigned int block;
1212 unsigned char modes[MAX_MACHINE_MODE];
1215 static htab_t subregs_of_mode;
1217 static hashval_t
1218 som_hash (const void *x)
1220 const struct subregs_of_mode_node *const a =
1221 (const struct subregs_of_mode_node *) x;
1222 return a->block;
1225 static int
1226 som_eq (const void *x, const void *y)
1228 const struct subregs_of_mode_node *const a =
1229 (const struct subregs_of_mode_node *) x;
1230 const struct subregs_of_mode_node *const b =
1231 (const struct subregs_of_mode_node *) y;
1232 return a->block == b->block;
1235 static void
1236 record_subregs_of_mode (rtx subreg)
1238 struct subregs_of_mode_node dummy, *node;
1239 enum machine_mode mode;
1240 unsigned int regno;
1241 void **slot;
1243 if (!REG_P (SUBREG_REG (subreg)))
1244 return;
1246 regno = REGNO (SUBREG_REG (subreg));
1247 mode = GET_MODE (subreg);
1249 if (regno < FIRST_PSEUDO_REGISTER)
1250 return;
1252 dummy.block = regno & -8;
1253 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1254 dummy.block, INSERT);
1255 node = (struct subregs_of_mode_node *) *slot;
1256 if (node == NULL)
1258 node = XCNEW (struct subregs_of_mode_node);
1259 node->block = regno & -8;
1260 *slot = node;
1263 node->modes[mode] |= 1 << (regno & 7);
1266 /* Call record_subregs_of_mode for all the subregs in X. */
1267 static void
1268 find_subregs_of_mode (rtx x)
1270 enum rtx_code code = GET_CODE (x);
1271 const char * const fmt = GET_RTX_FORMAT (code);
1272 int i;
1274 if (code == SUBREG)
1275 record_subregs_of_mode (x);
1277 /* Time for some deep diving. */
1278 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1280 if (fmt[i] == 'e')
1281 find_subregs_of_mode (XEXP (x, i));
1282 else if (fmt[i] == 'E')
1284 int j;
1285 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1286 find_subregs_of_mode (XVECEXP (x, i, j));
1291 void
1292 init_subregs_of_mode (void)
1294 basic_block bb;
1295 rtx insn;
1297 if (subregs_of_mode)
1298 htab_empty (subregs_of_mode);
1299 else
1300 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1302 FOR_EACH_BB (bb)
1303 FOR_BB_INSNS (bb, insn)
1304 if (INSN_P (insn))
1305 find_subregs_of_mode (PATTERN (insn));
1308 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1309 mode. */
1310 bool
1311 invalid_mode_change_p (unsigned int regno,
1312 enum reg_class rclass ATTRIBUTE_UNUSED,
1313 enum machine_mode from)
1315 struct subregs_of_mode_node dummy, *node;
1316 unsigned int to;
1317 unsigned char mask;
1319 gcc_assert (subregs_of_mode);
1320 dummy.block = regno & -8;
1321 node = (struct subregs_of_mode_node *)
1322 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1323 if (node == NULL)
1324 return false;
1326 mask = 1 << (regno & 7);
1327 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1328 if (node->modes[to] & mask)
1329 if (CANNOT_CHANGE_MODE_CLASS (from, (enum machine_mode) to, rclass))
1330 return true;
1332 return false;
1335 void
1336 finish_subregs_of_mode (void)
1338 htab_delete (subregs_of_mode);
1339 subregs_of_mode = 0;
1341 #else
1342 void
1343 init_subregs_of_mode (void)
1346 void
1347 finish_subregs_of_mode (void)
1351 #endif /* CANNOT_CHANGE_MODE_CLASS */