1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #define IN_TARGET_CODE 1
24 #include "coretypes.h"
26 #include "c-family/c-common.h"
29 #include "c-family/c-pragma.h"
31 static bool ix86_pragma_target_parse (tree
, tree
);
32 static void ix86_target_macros_internal
33 (HOST_WIDE_INT
, HOST_WIDE_INT
, enum processor_type
, enum processor_type
, enum fpmath_unit
,
34 void (*def_or_undef
) (cpp_reader
*, const char *));
36 /* Internal function to either define or undef the appropriate system
39 ix86_target_macros_internal (HOST_WIDE_INT isa_flag
,
40 HOST_WIDE_INT isa_flag2
,
41 enum processor_type arch
,
42 enum processor_type tune
,
43 enum fpmath_unit fpmath
,
44 void (*def_or_undef
) (cpp_reader
*,
47 /* For some of the k6/pentium varients there weren't separate ISA bits to
48 identify which tune/arch flag was passed, so figure it out here. */
49 size_t arch_len
= strlen (ix86_arch_string
);
50 size_t tune_len
= strlen (ix86_tune_string
);
51 int last_arch_char
= ix86_arch_string
[arch_len
- 1];
52 int last_tune_char
= ix86_tune_string
[tune_len
- 1];
54 /* Built-ins based on -march=. */
60 def_or_undef (parse_in
, "__i486");
61 def_or_undef (parse_in
, "__i486__");
63 case PROCESSOR_LAKEMONT
:
64 /* Intel MCU is based on Intel Pentium CPU. */
65 case PROCESSOR_PENTIUM
:
66 def_or_undef (parse_in
, "__i586");
67 def_or_undef (parse_in
, "__i586__");
68 def_or_undef (parse_in
, "__pentium");
69 def_or_undef (parse_in
, "__pentium__");
70 if (isa_flag
& OPTION_MASK_ISA_MMX
)
71 def_or_undef (parse_in
, "__pentium_mmx__");
73 case PROCESSOR_PENTIUMPRO
:
74 def_or_undef (parse_in
, "__i686");
75 def_or_undef (parse_in
, "__i686__");
76 def_or_undef (parse_in
, "__pentiumpro");
77 def_or_undef (parse_in
, "__pentiumpro__");
80 def_or_undef (parse_in
, "__geode");
81 def_or_undef (parse_in
, "__geode__");
84 def_or_undef (parse_in
, "__k6");
85 def_or_undef (parse_in
, "__k6__");
86 if (last_arch_char
== '2')
87 def_or_undef (parse_in
, "__k6_2__");
88 else if (last_arch_char
== '3')
89 def_or_undef (parse_in
, "__k6_3__");
90 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
91 def_or_undef (parse_in
, "__k6_3__");
93 case PROCESSOR_ATHLON
:
94 def_or_undef (parse_in
, "__athlon");
95 def_or_undef (parse_in
, "__athlon__");
96 if (isa_flag
& OPTION_MASK_ISA_SSE
)
97 def_or_undef (parse_in
, "__athlon_sse__");
100 def_or_undef (parse_in
, "__k8");
101 def_or_undef (parse_in
, "__k8__");
103 case PROCESSOR_AMDFAM10
:
104 def_or_undef (parse_in
, "__amdfam10");
105 def_or_undef (parse_in
, "__amdfam10__");
107 case PROCESSOR_BDVER1
:
108 def_or_undef (parse_in
, "__bdver1");
109 def_or_undef (parse_in
, "__bdver1__");
111 case PROCESSOR_BDVER2
:
112 def_or_undef (parse_in
, "__bdver2");
113 def_or_undef (parse_in
, "__bdver2__");
115 case PROCESSOR_BDVER3
:
116 def_or_undef (parse_in
, "__bdver3");
117 def_or_undef (parse_in
, "__bdver3__");
119 case PROCESSOR_BDVER4
:
120 def_or_undef (parse_in
, "__bdver4");
121 def_or_undef (parse_in
, "__bdver4__");
123 case PROCESSOR_ZNVER1
:
124 def_or_undef (parse_in
, "__znver1");
125 def_or_undef (parse_in
, "__znver1__");
127 case PROCESSOR_ZNVER2
:
128 def_or_undef (parse_in
, "__znver2");
129 def_or_undef (parse_in
, "__znver2__");
131 case PROCESSOR_BTVER1
:
132 def_or_undef (parse_in
, "__btver1");
133 def_or_undef (parse_in
, "__btver1__");
135 case PROCESSOR_BTVER2
:
136 def_or_undef (parse_in
, "__btver2");
137 def_or_undef (parse_in
, "__btver2__");
139 case PROCESSOR_PENTIUM4
:
140 def_or_undef (parse_in
, "__pentium4");
141 def_or_undef (parse_in
, "__pentium4__");
143 case PROCESSOR_NOCONA
:
144 def_or_undef (parse_in
, "__nocona");
145 def_or_undef (parse_in
, "__nocona__");
147 case PROCESSOR_CORE2
:
148 def_or_undef (parse_in
, "__core2");
149 def_or_undef (parse_in
, "__core2__");
151 case PROCESSOR_NEHALEM
:
152 def_or_undef (parse_in
, "__corei7");
153 def_or_undef (parse_in
, "__corei7__");
154 def_or_undef (parse_in
, "__nehalem");
155 def_or_undef (parse_in
, "__nehalem__");
157 case PROCESSOR_SANDYBRIDGE
:
158 def_or_undef (parse_in
, "__corei7_avx");
159 def_or_undef (parse_in
, "__corei7_avx__");
160 def_or_undef (parse_in
, "__sandybridge");
161 def_or_undef (parse_in
, "__sandybridge__");
163 case PROCESSOR_HASWELL
:
164 def_or_undef (parse_in
, "__core_avx2");
165 def_or_undef (parse_in
, "__core_avx2__");
166 def_or_undef (parse_in
, "__haswell");
167 def_or_undef (parse_in
, "__haswell__");
169 case PROCESSOR_BONNELL
:
170 def_or_undef (parse_in
, "__atom");
171 def_or_undef (parse_in
, "__atom__");
172 def_or_undef (parse_in
, "__bonnell");
173 def_or_undef (parse_in
, "__bonnell__");
175 case PROCESSOR_SILVERMONT
:
176 def_or_undef (parse_in
, "__slm");
177 def_or_undef (parse_in
, "__slm__");
178 def_or_undef (parse_in
, "__silvermont");
179 def_or_undef (parse_in
, "__silvermont__");
181 case PROCESSOR_GOLDMONT
:
182 def_or_undef (parse_in
, "__goldmont");
183 def_or_undef (parse_in
, "__goldmont__");
185 case PROCESSOR_GOLDMONT_PLUS
:
186 def_or_undef (parse_in
, "__goldmont_plus");
187 def_or_undef (parse_in
, "__goldmont_plus__");
189 case PROCESSOR_TREMONT
:
190 def_or_undef (parse_in
, "__tremont");
191 def_or_undef (parse_in
, "__tremont__");
194 def_or_undef (parse_in
, "__knl");
195 def_or_undef (parse_in
, "__knl__");
198 def_or_undef (parse_in
, "__knm");
199 def_or_undef (parse_in
, "__knm__");
201 case PROCESSOR_SKYLAKE
:
202 def_or_undef (parse_in
, "__skylake");
203 def_or_undef (parse_in
, "__skylake__");
205 case PROCESSOR_SKYLAKE_AVX512
:
206 def_or_undef (parse_in
, "__skylake_avx512");
207 def_or_undef (parse_in
, "__skylake_avx512__");
209 case PROCESSOR_CANNONLAKE
:
210 def_or_undef (parse_in
, "__cannonlake");
211 def_or_undef (parse_in
, "__cannonlake__");
213 case PROCESSOR_ICELAKE_CLIENT
:
214 def_or_undef (parse_in
, "__icelake_client");
215 def_or_undef (parse_in
, "__icelake_client__");
217 case PROCESSOR_ICELAKE_SERVER
:
218 def_or_undef (parse_in
, "__icelake_server");
219 def_or_undef (parse_in
, "__icelake_server__");
221 case PROCESSOR_CASCADELAKE
:
222 def_or_undef (parse_in
, "__cascadelake");
223 def_or_undef (parse_in
, "__cascadelake__");
225 /* use PROCESSOR_max to not set/unset the arch macro. */
228 case PROCESSOR_INTEL
:
229 case PROCESSOR_GENERIC
:
233 /* Built-ins based on -mtune=. */
237 def_or_undef (parse_in
, "__tune_i386__");
240 def_or_undef (parse_in
, "__tune_i486__");
242 case PROCESSOR_PENTIUM
:
243 def_or_undef (parse_in
, "__tune_i586__");
244 def_or_undef (parse_in
, "__tune_pentium__");
245 if (last_tune_char
== 'x')
246 def_or_undef (parse_in
, "__tune_pentium_mmx__");
248 case PROCESSOR_PENTIUMPRO
:
249 def_or_undef (parse_in
, "__tune_i686__");
250 def_or_undef (parse_in
, "__tune_pentiumpro__");
251 switch (last_tune_char
)
254 def_or_undef (parse_in
, "__tune_pentium3__");
257 def_or_undef (parse_in
, "__tune_pentium2__");
261 case PROCESSOR_GEODE
:
262 def_or_undef (parse_in
, "__tune_geode__");
265 def_or_undef (parse_in
, "__tune_k6__");
266 if (last_tune_char
== '2')
267 def_or_undef (parse_in
, "__tune_k6_2__");
268 else if (last_tune_char
== '3')
269 def_or_undef (parse_in
, "__tune_k6_3__");
270 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
271 def_or_undef (parse_in
, "__tune_k6_3__");
273 case PROCESSOR_ATHLON
:
274 def_or_undef (parse_in
, "__tune_athlon__");
275 if (isa_flag
& OPTION_MASK_ISA_SSE
)
276 def_or_undef (parse_in
, "__tune_athlon_sse__");
279 def_or_undef (parse_in
, "__tune_k8__");
281 case PROCESSOR_AMDFAM10
:
282 def_or_undef (parse_in
, "__tune_amdfam10__");
284 case PROCESSOR_BDVER1
:
285 def_or_undef (parse_in
, "__tune_bdver1__");
287 case PROCESSOR_BDVER2
:
288 def_or_undef (parse_in
, "__tune_bdver2__");
290 case PROCESSOR_BDVER3
:
291 def_or_undef (parse_in
, "__tune_bdver3__");
293 case PROCESSOR_BDVER4
:
294 def_or_undef (parse_in
, "__tune_bdver4__");
296 case PROCESSOR_ZNVER1
:
297 def_or_undef (parse_in
, "__tune_znver1__");
299 case PROCESSOR_ZNVER2
:
300 def_or_undef (parse_in
, "__tune_znver2__");
302 case PROCESSOR_BTVER1
:
303 def_or_undef (parse_in
, "__tune_btver1__");
305 case PROCESSOR_BTVER2
:
306 def_or_undef (parse_in
, "__tune_btver2__");
308 case PROCESSOR_PENTIUM4
:
309 def_or_undef (parse_in
, "__tune_pentium4__");
311 case PROCESSOR_NOCONA
:
312 def_or_undef (parse_in
, "__tune_nocona__");
314 case PROCESSOR_CORE2
:
315 def_or_undef (parse_in
, "__tune_core2__");
317 case PROCESSOR_NEHALEM
:
318 def_or_undef (parse_in
, "__tune_corei7__");
319 def_or_undef (parse_in
, "__tune_nehalem__");
321 case PROCESSOR_SANDYBRIDGE
:
322 def_or_undef (parse_in
, "__tune_corei7_avx__");
323 def_or_undef (parse_in
, "__tune_sandybridge__");
325 case PROCESSOR_HASWELL
:
326 def_or_undef (parse_in
, "__tune_core_avx2__");
327 def_or_undef (parse_in
, "__tune_haswell__");
329 case PROCESSOR_BONNELL
:
330 def_or_undef (parse_in
, "__tune_atom__");
331 def_or_undef (parse_in
, "__tune_bonnell__");
333 case PROCESSOR_SILVERMONT
:
334 def_or_undef (parse_in
, "__tune_slm__");
335 def_or_undef (parse_in
, "__tune_silvermont__");
337 case PROCESSOR_GOLDMONT
:
338 def_or_undef (parse_in
, "__tune_goldmont__");
340 case PROCESSOR_GOLDMONT_PLUS
:
341 def_or_undef (parse_in
, "__tune_goldmont_plus__");
343 case PROCESSOR_TREMONT
:
344 def_or_undef (parse_in
, "__tune_tremont__");
347 def_or_undef (parse_in
, "__tune_knl__");
350 def_or_undef (parse_in
, "__tune_knm__");
352 case PROCESSOR_SKYLAKE
:
353 def_or_undef (parse_in
, "__tune_skylake__");
355 case PROCESSOR_SKYLAKE_AVX512
:
356 def_or_undef (parse_in
, "__tune_skylake_avx512__");
358 case PROCESSOR_CANNONLAKE
:
359 def_or_undef (parse_in
, "__tune_cannonlake__");
361 case PROCESSOR_ICELAKE_CLIENT
:
362 def_or_undef (parse_in
, "__tune_icelake_client__");
364 case PROCESSOR_ICELAKE_SERVER
:
365 def_or_undef (parse_in
, "__tune_icelake_server__");
367 case PROCESSOR_LAKEMONT
:
368 def_or_undef (parse_in
, "__tune_lakemont__");
370 case PROCESSOR_CASCADELAKE
:
371 def_or_undef (parse_in
, "__tune_cascadelake__");
373 case PROCESSOR_INTEL
:
374 case PROCESSOR_GENERIC
:
376 /* use PROCESSOR_max to not set/unset the tune macro. */
385 def_or_undef (parse_in
, "__code_model_small__");
389 def_or_undef (parse_in
, "__code_model_medium__");
393 def_or_undef (parse_in
, "__code_model_large__");
396 def_or_undef (parse_in
, "__code_model_32__");
399 def_or_undef (parse_in
, "__code_model_kernel__");
405 if (isa_flag2
& OPTION_MASK_ISA_WBNOINVD
)
406 def_or_undef (parse_in
, "__WBNOINVD__");
407 if (isa_flag
& OPTION_MASK_ISA_MMX
)
408 def_or_undef (parse_in
, "__MMX__");
409 if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
410 def_or_undef (parse_in
, "__3dNOW__");
411 if (isa_flag
& OPTION_MASK_ISA_3DNOW_A
)
412 def_or_undef (parse_in
, "__3dNOW_A__");
413 if (isa_flag
& OPTION_MASK_ISA_SSE
)
414 def_or_undef (parse_in
, "__SSE__");
415 if (isa_flag
& OPTION_MASK_ISA_SSE2
)
416 def_or_undef (parse_in
, "__SSE2__");
417 if (isa_flag
& OPTION_MASK_ISA_SSE3
)
418 def_or_undef (parse_in
, "__SSE3__");
419 if (isa_flag
& OPTION_MASK_ISA_SSSE3
)
420 def_or_undef (parse_in
, "__SSSE3__");
421 if (isa_flag
& OPTION_MASK_ISA_SSE4_1
)
422 def_or_undef (parse_in
, "__SSE4_1__");
423 if (isa_flag
& OPTION_MASK_ISA_SSE4_2
)
424 def_or_undef (parse_in
, "__SSE4_2__");
425 if (isa_flag
& OPTION_MASK_ISA_AES
)
426 def_or_undef (parse_in
, "__AES__");
427 if (isa_flag
& OPTION_MASK_ISA_SHA
)
428 def_or_undef (parse_in
, "__SHA__");
429 if (isa_flag
& OPTION_MASK_ISA_PCLMUL
)
430 def_or_undef (parse_in
, "__PCLMUL__");
431 if (isa_flag
& OPTION_MASK_ISA_AVX
)
432 def_or_undef (parse_in
, "__AVX__");
433 if (isa_flag
& OPTION_MASK_ISA_AVX2
)
434 def_or_undef (parse_in
, "__AVX2__");
435 if (isa_flag
& OPTION_MASK_ISA_AVX512F
)
436 def_or_undef (parse_in
, "__AVX512F__");
437 if (isa_flag
& OPTION_MASK_ISA_AVX512ER
)
438 def_or_undef (parse_in
, "__AVX512ER__");
439 if (isa_flag
& OPTION_MASK_ISA_AVX512CD
)
440 def_or_undef (parse_in
, "__AVX512CD__");
441 if (isa_flag
& OPTION_MASK_ISA_AVX512PF
)
442 def_or_undef (parse_in
, "__AVX512PF__");
443 if (isa_flag
& OPTION_MASK_ISA_AVX512DQ
)
444 def_or_undef (parse_in
, "__AVX512DQ__");
445 if (isa_flag
& OPTION_MASK_ISA_AVX512BW
)
446 def_or_undef (parse_in
, "__AVX512BW__");
447 if (isa_flag
& OPTION_MASK_ISA_AVX512VL
)
448 def_or_undef (parse_in
, "__AVX512VL__");
449 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI
)
450 def_or_undef (parse_in
, "__AVX512VBMI__");
451 if (isa_flag
& OPTION_MASK_ISA_AVX512IFMA
)
452 def_or_undef (parse_in
, "__AVX512IFMA__");
453 if (isa_flag2
& OPTION_MASK_ISA_AVX5124VNNIW
)
454 def_or_undef (parse_in
, "__AVX5124VNNIW__");
455 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI2
)
456 def_or_undef (parse_in
, "__AVX512VBMI2__");
457 if (isa_flag
& OPTION_MASK_ISA_AVX512VNNI
)
458 def_or_undef (parse_in
, "__AVX512VNNI__");
459 if (isa_flag2
& OPTION_MASK_ISA_PCONFIG
)
460 def_or_undef (parse_in
, "__PCONFIG__");
461 if (isa_flag2
& OPTION_MASK_ISA_SGX
)
462 def_or_undef (parse_in
, "__SGX__");
463 if (isa_flag2
& OPTION_MASK_ISA_AVX5124FMAPS
)
464 def_or_undef (parse_in
, "__AVX5124FMAPS__");
465 if (isa_flag
& OPTION_MASK_ISA_AVX512BITALG
)
466 def_or_undef (parse_in
, "__AVX512BITALG__");
467 if (isa_flag
& OPTION_MASK_ISA_AVX512VPOPCNTDQ
)
468 def_or_undef (parse_in
, "__AVX512VPOPCNTDQ__");
469 if (isa_flag
& OPTION_MASK_ISA_FMA
)
470 def_or_undef (parse_in
, "__FMA__");
471 if (isa_flag
& OPTION_MASK_ISA_RTM
)
472 def_or_undef (parse_in
, "__RTM__");
473 if (isa_flag
& OPTION_MASK_ISA_SSE4A
)
474 def_or_undef (parse_in
, "__SSE4A__");
475 if (isa_flag
& OPTION_MASK_ISA_FMA4
)
476 def_or_undef (parse_in
, "__FMA4__");
477 if (isa_flag
& OPTION_MASK_ISA_XOP
)
478 def_or_undef (parse_in
, "__XOP__");
479 if (isa_flag
& OPTION_MASK_ISA_LWP
)
480 def_or_undef (parse_in
, "__LWP__");
481 if (isa_flag
& OPTION_MASK_ISA_ABM
)
482 def_or_undef (parse_in
, "__ABM__");
483 if (isa_flag
& OPTION_MASK_ISA_BMI
)
484 def_or_undef (parse_in
, "__BMI__");
485 if (isa_flag
& OPTION_MASK_ISA_BMI2
)
486 def_or_undef (parse_in
, "__BMI2__");
487 if (isa_flag
& OPTION_MASK_ISA_LZCNT
)
488 def_or_undef (parse_in
, "__LZCNT__");
489 if (isa_flag
& OPTION_MASK_ISA_TBM
)
490 def_or_undef (parse_in
, "__TBM__");
491 if (isa_flag
& OPTION_MASK_ISA_POPCNT
)
492 def_or_undef (parse_in
, "__POPCNT__");
493 if (isa_flag
& OPTION_MASK_ISA_FSGSBASE
)
494 def_or_undef (parse_in
, "__FSGSBASE__");
495 if (isa_flag
& OPTION_MASK_ISA_RDRND
)
496 def_or_undef (parse_in
, "__RDRND__");
497 if (isa_flag
& OPTION_MASK_ISA_F16C
)
498 def_or_undef (parse_in
, "__F16C__");
499 if (isa_flag
& OPTION_MASK_ISA_RDSEED
)
500 def_or_undef (parse_in
, "__RDSEED__");
501 if (isa_flag
& OPTION_MASK_ISA_PRFCHW
)
502 def_or_undef (parse_in
, "__PRFCHW__");
503 if (isa_flag
& OPTION_MASK_ISA_ADX
)
504 def_or_undef (parse_in
, "__ADX__");
505 if (isa_flag
& OPTION_MASK_ISA_FXSR
)
506 def_or_undef (parse_in
, "__FXSR__");
507 if (isa_flag
& OPTION_MASK_ISA_XSAVE
)
508 def_or_undef (parse_in
, "__XSAVE__");
509 if (isa_flag
& OPTION_MASK_ISA_XSAVEOPT
)
510 def_or_undef (parse_in
, "__XSAVEOPT__");
511 if (isa_flag
& OPTION_MASK_ISA_PREFETCHWT1
)
512 def_or_undef (parse_in
, "__PREFETCHWT1__");
513 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE
))
514 def_or_undef (parse_in
, "__SSE_MATH__");
515 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE2
))
516 def_or_undef (parse_in
, "__SSE2_MATH__");
517 if (isa_flag
& OPTION_MASK_ISA_CLFLUSHOPT
)
518 def_or_undef (parse_in
, "__CLFLUSHOPT__");
519 if (isa_flag2
& OPTION_MASK_ISA_CLZERO
)
520 def_or_undef (parse_in
, "__CLZERO__");
521 if (isa_flag
& OPTION_MASK_ISA_XSAVEC
)
522 def_or_undef (parse_in
, "__XSAVEC__");
523 if (isa_flag
& OPTION_MASK_ISA_XSAVES
)
524 def_or_undef (parse_in
, "__XSAVES__");
525 if (isa_flag
& OPTION_MASK_ISA_CLWB
)
526 def_or_undef (parse_in
, "__CLWB__");
527 if (isa_flag2
& OPTION_MASK_ISA_MWAITX
)
528 def_or_undef (parse_in
, "__MWAITX__");
529 if (isa_flag
& OPTION_MASK_ISA_PKU
)
530 def_or_undef (parse_in
, "__PKU__");
531 if (isa_flag2
& OPTION_MASK_ISA_RDPID
)
532 def_or_undef (parse_in
, "__RDPID__");
533 if (isa_flag
& OPTION_MASK_ISA_GFNI
)
534 def_or_undef (parse_in
, "__GFNI__");
535 if ((isa_flag
& OPTION_MASK_ISA_SHSTK
))
536 def_or_undef (parse_in
, "__SHSTK__");
537 if (isa_flag2
& OPTION_MASK_ISA_VAES
)
538 def_or_undef (parse_in
, "__VAES__");
539 if (isa_flag
& OPTION_MASK_ISA_VPCLMULQDQ
)
540 def_or_undef (parse_in
, "__VPCLMULQDQ__");
541 if (isa_flag
& OPTION_MASK_ISA_MOVDIRI
)
542 def_or_undef (parse_in
, "__MOVDIRI__");
543 if (isa_flag2
& OPTION_MASK_ISA_MOVDIR64B
)
544 def_or_undef (parse_in
, "__MOVDIR64B__");
545 if (isa_flag2
& OPTION_MASK_ISA_WAITPKG
)
546 def_or_undef (parse_in
, "__WAITPKG__");
547 if (isa_flag2
& OPTION_MASK_ISA_CLDEMOTE
)
548 def_or_undef (parse_in
, "__CLDEMOTE__");
549 if (isa_flag2
& OPTION_MASK_ISA_PTWRITE
)
550 def_or_undef (parse_in
, "__PTWRITE__");
551 if (isa_flag2
& OPTION_MASK_ISA_AVX512BF16
)
552 def_or_undef (parse_in
, "__AVX512BF16__");
553 if (TARGET_MMX_WITH_SSE
)
554 def_or_undef (parse_in
, "__MMX_WITH_SSE__");
555 if (isa_flag2
& OPTION_MASK_ISA_ENQCMD
)
556 def_or_undef (parse_in
, "__ENQCMD__");
559 def_or_undef (parse_in
, "__iamcu");
560 def_or_undef (parse_in
, "__iamcu__");
565 /* Hook to validate the current #pragma GCC target and set the state, and
566 update the macros based on what was changed. If ARGS is NULL, then
567 POP_TARGET is used to reset the options. */
570 ix86_pragma_target_parse (tree args
, tree pop_target
)
572 tree prev_tree
= build_target_option_node (&global_options
);
574 struct cl_target_option
*prev_opt
;
575 struct cl_target_option
*cur_opt
;
576 HOST_WIDE_INT prev_isa
;
577 HOST_WIDE_INT cur_isa
;
578 HOST_WIDE_INT diff_isa
;
579 HOST_WIDE_INT prev_isa2
;
580 HOST_WIDE_INT cur_isa2
;
581 HOST_WIDE_INT diff_isa2
;
582 enum processor_type prev_arch
;
583 enum processor_type prev_tune
;
584 enum processor_type cur_arch
;
585 enum processor_type cur_tune
;
589 cur_tree
= (pop_target
? pop_target
: target_option_default_node
);
590 cl_target_option_restore (&global_options
,
591 TREE_TARGET_OPTION (cur_tree
));
595 cur_tree
= ix86_valid_target_attribute_tree (NULL_TREE
, args
,
597 &global_options_set
, 0);
598 if (!cur_tree
|| cur_tree
== error_mark_node
)
600 cl_target_option_restore (&global_options
,
601 TREE_TARGET_OPTION (prev_tree
));
606 target_option_current_node
= cur_tree
;
607 ix86_reset_previous_fndecl ();
609 /* Figure out the previous/current isa, arch, tune and the differences. */
610 prev_opt
= TREE_TARGET_OPTION (prev_tree
);
611 cur_opt
= TREE_TARGET_OPTION (cur_tree
);
612 prev_isa
= prev_opt
->x_ix86_isa_flags
;
613 cur_isa
= cur_opt
->x_ix86_isa_flags
;
614 diff_isa
= (prev_isa
^ cur_isa
);
615 prev_isa2
= prev_opt
->x_ix86_isa_flags2
;
616 cur_isa2
= cur_opt
->x_ix86_isa_flags2
;
617 diff_isa2
= (prev_isa2
^ cur_isa2
);
618 prev_arch
= (enum processor_type
) prev_opt
->arch
;
619 prev_tune
= (enum processor_type
) prev_opt
->tune
;
620 cur_arch
= (enum processor_type
) cur_opt
->arch
;
621 cur_tune
= (enum processor_type
) cur_opt
->tune
;
623 /* If the same processor is used for both previous and current options, don't
624 change the macros. */
625 if (cur_arch
== prev_arch
)
626 cur_arch
= prev_arch
= PROCESSOR_max
;
628 if (cur_tune
== prev_tune
)
629 cur_tune
= prev_tune
= PROCESSOR_max
;
631 /* Undef all of the macros for that are no longer current. */
632 ix86_target_macros_internal (prev_isa
& diff_isa
,
633 prev_isa2
& diff_isa2
,
636 (enum fpmath_unit
) prev_opt
->x_ix86_fpmath
,
639 /* For the definitions, ensure all newly defined macros are considered
640 as used for -Wunused-macros. There is no point warning about the
641 compiler predefined macros. */
642 cpp_options
*cpp_opts
= cpp_get_options (parse_in
);
643 unsigned char saved_warn_unused_macros
= cpp_opts
->warn_unused_macros
;
644 cpp_opts
->warn_unused_macros
= 0;
646 /* Define all of the macros for new options that were just turned on. */
647 ix86_target_macros_internal (cur_isa
& diff_isa
,
648 cur_isa2
& diff_isa2
,
651 (enum fpmath_unit
) cur_opt
->x_ix86_fpmath
,
654 cpp_opts
->warn_unused_macros
= saved_warn_unused_macros
;
659 /* Function to tell the preprocessor about the defines for the current target. */
662 ix86_target_macros (void)
664 /* 32/64-bit won't change with target specific options, so do the assert and
665 builtin_define_std calls here. */
668 cpp_assert (parse_in
, "cpu=x86_64");
669 cpp_assert (parse_in
, "machine=x86_64");
670 cpp_define (parse_in
, "__amd64");
671 cpp_define (parse_in
, "__amd64__");
672 cpp_define (parse_in
, "__x86_64");
673 cpp_define (parse_in
, "__x86_64__");
676 cpp_define (parse_in
, "_ILP32");
677 cpp_define (parse_in
, "__ILP32__");
682 cpp_assert (parse_in
, "cpu=i386");
683 cpp_assert (parse_in
, "machine=i386");
684 builtin_define_std ("i386");
688 cpp_define (parse_in
, "_SOFT_FLOAT");
690 if (TARGET_LONG_DOUBLE_64
)
691 cpp_define (parse_in
, "__LONG_DOUBLE_64__");
693 if (TARGET_LONG_DOUBLE_128
)
694 cpp_define (parse_in
, "__LONG_DOUBLE_128__");
696 if (TARGET_128BIT_LONG_DOUBLE
)
697 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=16");
699 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=12");
701 cpp_define (parse_in
, "__SIZEOF_FLOAT128__=16");
703 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE
);
704 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE
);
706 cpp_define (parse_in
, "__GCC_ASM_FLAG_OUTPUTS__");
708 ix86_target_macros_internal (ix86_isa_flags
,
715 cpp_define (parse_in
, "__SEG_FS");
716 cpp_define (parse_in
, "__SEG_GS");
718 if (flag_cf_protection
!= CF_NONE
)
719 cpp_define_formatted (parse_in
, "__CET__=%d",
720 flag_cf_protection
& ~CF_SET
);
724 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
725 option here rather than in i386.c since it will pull in various preprocessor
726 functions, and those are not present in languages like fortran without a
730 ix86_register_pragmas (void)
732 /* Update pragma hook to allow parsing #pragma GCC target. */
733 targetm
.target_option
.pragma_parse
= ix86_pragma_target_parse
;
735 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS
);
736 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS
);
738 #ifdef REGISTER_SUBTARGET_PRAGMAS
739 REGISTER_SUBTARGET_PRAGMAS ();