1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
34 #include "insn-config.h"
45 #include "rtlhooks-def.h"
46 #include "tree-pass.h"
50 /* The basic idea of common subexpression elimination is to go
51 through the code, keeping a record of expressions that would
52 have the same value at the current scan point, and replacing
53 expressions encountered with the cheapest equivalent expression.
55 It is too complicated to keep track of the different possibilities
56 when control paths merge in this code; so, at each label, we forget all
57 that is known and start fresh. This can be described as processing each
58 extended basic block separately. We have a separate pass to perform
61 Note CSE can turn a conditional or computed jump into a nop or
62 an unconditional jump. When this occurs we arrange to run the jump
63 optimizer after CSE to delete the unreachable code.
65 We use two data structures to record the equivalent expressions:
66 a hash table for most expressions, and a vector of "quantity
67 numbers" to record equivalent (pseudo) registers.
69 The use of the special data structure for registers is desirable
70 because it is faster. It is possible because registers references
71 contain a fairly small number, the register number, taken from
72 a contiguously allocated series, and two register references are
73 identical if they have the same number. General expressions
74 do not have any such thing, so the only way to retrieve the
75 information recorded on an expression other than a register
76 is to keep it in a hash table.
78 Registers and "quantity numbers":
80 At the start of each basic block, all of the (hardware and pseudo)
81 registers used in the function are given distinct quantity
82 numbers to indicate their contents. During scan, when the code
83 copies one register into another, we copy the quantity number.
84 When a register is loaded in any other way, we allocate a new
85 quantity number to describe the value generated by this operation.
86 `REG_QTY (N)' records what quantity register N is currently thought
89 All real quantity numbers are greater than or equal to zero.
90 If register N has not been assigned a quantity, `REG_QTY (N)' will
91 equal -N - 1, which is always negative.
93 Quantity numbers below zero do not exist and none of the `qty_table'
94 entries should be referenced with a negative index.
96 We also maintain a bidirectional chain of registers for each
97 quantity number. The `qty_table` members `first_reg' and `last_reg',
98 and `reg_eqv_table' members `next' and `prev' hold these chains.
100 The first register in a chain is the one whose lifespan is least local.
101 Among equals, it is the one that was seen first.
102 We replace any equivalent register with that one.
104 If two registers have the same quantity number, it must be true that
105 REG expressions with qty_table `mode' must be in the hash table for both
106 registers and must be in the same class.
108 The converse is not true. Since hard registers may be referenced in
109 any mode, two REG expressions might be equivalent in the hash table
110 but not have the same quantity number if the quantity number of one
111 of the registers is not the same mode as those expressions.
113 Constants and quantity numbers
115 When a quantity has a known constant value, that value is stored
116 in the appropriate qty_table `const_rtx'. This is in addition to
117 putting the constant in the hash table as is usual for non-regs.
119 Whether a reg or a constant is preferred is determined by the configuration
120 macro CONST_COSTS and will often depend on the constant value. In any
121 event, expressions containing constants can be simplified, by fold_rtx.
123 When a quantity has a known nearly constant value (such as an address
124 of a stack slot), that value is stored in the appropriate qty_table
127 Integer constants don't have a machine mode. However, cse
128 determines the intended machine mode from the destination
129 of the instruction that moves the constant. The machine mode
130 is recorded in the hash table along with the actual RTL
131 constant expression so that different modes are kept separate.
135 To record known equivalences among expressions in general
136 we use a hash table called `table'. It has a fixed number of buckets
137 that contain chains of `struct table_elt' elements for expressions.
138 These chains connect the elements whose expressions have the same
141 Other chains through the same elements connect the elements which
142 currently have equivalent values.
144 Register references in an expression are canonicalized before hashing
145 the expression. This is done using `reg_qty' and qty_table `first_reg'.
146 The hash code of a register reference is computed using the quantity
147 number, not the register number.
149 When the value of an expression changes, it is necessary to remove from the
150 hash table not just that expression but all expressions whose values
151 could be different as a result.
153 1. If the value changing is in memory, except in special cases
154 ANYTHING referring to memory could be changed. That is because
155 nobody knows where a pointer does not point.
156 The function `invalidate_memory' removes what is necessary.
158 The special cases are when the address is constant or is
159 a constant plus a fixed register such as the frame pointer
160 or a static chain pointer. When such addresses are stored in,
161 we can tell exactly which other such addresses must be invalidated
162 due to overlap. `invalidate' does this.
163 All expressions that refer to non-constant
164 memory addresses are also invalidated. `invalidate_memory' does this.
166 2. If the value changing is a register, all expressions
167 containing references to that register, and only those,
170 Because searching the entire hash table for expressions that contain
171 a register is very slow, we try to figure out when it isn't necessary.
172 Precisely, this is necessary only when expressions have been
173 entered in the hash table using this register, and then the value has
174 changed, and then another expression wants to be added to refer to
175 the register's new value. This sequence of circumstances is rare
176 within any one basic block.
178 `REG_TICK' and `REG_IN_TABLE', accessors for members of
179 cse_reg_info, are used to detect this case. REG_TICK (i) is
180 incremented whenever a value is stored in register i.
181 REG_IN_TABLE (i) holds -1 if no references to register i have been
182 entered in the table; otherwise, it contains the value REG_TICK (i)
183 had when the references were entered. If we want to enter a
184 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
185 remove old references. Until we want to enter a new entry, the
186 mere fact that the two vectors don't match makes the entries be
187 ignored if anyone tries to match them.
189 Registers themselves are entered in the hash table as well as in
190 the equivalent-register chains. However, `REG_TICK' and
191 `REG_IN_TABLE' do not apply to expressions which are simple
192 register references. These expressions are removed from the table
193 immediately when they become invalid, and this can be done even if
194 we do not immediately search for all the expressions that refer to
197 A CLOBBER rtx in an instruction invalidates its operand for further
198 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
199 invalidates everything that resides in memory.
203 Constant expressions that differ only by an additive integer
204 are called related. When a constant expression is put in
205 the table, the related expression with no constant term
206 is also entered. These are made to point at each other
207 so that it is possible to find out if there exists any
208 register equivalent to an expression related to a given expression. */
210 /* Length of qty_table vector. We know in advance we will not need
211 a quantity number this big. */
215 /* Next quantity number to be allocated.
216 This is 1 + the largest number needed so far. */
220 /* Per-qty information tracking.
222 `first_reg' and `last_reg' track the head and tail of the
223 chain of registers which currently contain this quantity.
225 `mode' contains the machine mode of this quantity.
227 `const_rtx' holds the rtx of the constant value of this
228 quantity, if known. A summations of the frame/arg pointer
229 and a constant can also be entered here. When this holds
230 a known value, `const_insn' is the insn which stored the
233 `comparison_{code,const,qty}' are used to track when a
234 comparison between a quantity and some constant or register has
235 been passed. In such a case, we know the results of the comparison
236 in case we see it again. These members record a comparison that
237 is known to be true. `comparison_code' holds the rtx code of such
238 a comparison, else it is set to UNKNOWN and the other two
239 comparison members are undefined. `comparison_const' holds
240 the constant being compared against, or zero if the comparison
241 is not against a constant. `comparison_qty' holds the quantity
242 being compared against when the result is known. If the comparison
243 is not with a register, `comparison_qty' is -1. */
245 struct qty_table_elem
249 rtx comparison_const
;
251 unsigned int first_reg
, last_reg
;
252 /* The sizes of these fields should match the sizes of the
253 code and mode fields of struct rtx_def (see rtl.h). */
254 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
255 ENUM_BITFIELD(machine_mode
) mode
: 8;
258 /* The table of all qtys, indexed by qty number. */
259 static struct qty_table_elem
*qty_table
;
261 /* Structure used to pass arguments via for_each_rtx to function
262 cse_change_cc_mode. */
263 struct change_cc_mode_args
270 /* For machines that have a CC0, we do not record its value in the hash
271 table since its use is guaranteed to be the insn immediately following
272 its definition and any other insn is presumed to invalidate it.
274 Instead, we store below the current and last value assigned to CC0.
275 If it should happen to be a constant, it is stored in preference
276 to the actual assigned value. In case it is a constant, we store
277 the mode in which the constant should be interpreted. */
279 static rtx this_insn_cc0
, prev_insn_cc0
;
280 static enum machine_mode this_insn_cc0_mode
, prev_insn_cc0_mode
;
283 /* Insn being scanned. */
285 static rtx this_insn
;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem
*reg_eqv_table
;
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp
;
309 /* The quantity number of the register's current contents. */
312 /* The number of times the register has been altered in the current
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked
;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info
*cse_reg_info_table
;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size
;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized
;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp
;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table
;
351 /* Nonzero if cse has altered conditional jump insns
352 in such a way that jump optimization should be redone. */
354 static int cse_jumps_altered
;
356 /* Nonzero if we put a LABEL_REF into the hash table for an INSN
357 without a REG_LABEL_OPERAND, we have to rerun jump after CSE to put
359 static int recorded_label_ref
;
361 /* canon_hash stores 1 in do_not_record
362 if it notices a reference to CC0, PC, or some other volatile
365 static int do_not_record
;
367 /* canon_hash stores 1 in hash_arg_in_memory
368 if it notices a reference to memory within the expression being hashed. */
370 static int hash_arg_in_memory
;
372 /* The hash table contains buckets which are chains of `struct table_elt's,
373 each recording one expression's information.
374 That expression is in the `exp' field.
376 The canon_exp field contains a canonical (from the point of view of
377 alias analysis) version of the `exp' field.
379 Those elements with the same hash code are chained in both directions
380 through the `next_same_hash' and `prev_same_hash' fields.
382 Each set of expressions with equivalent values
383 are on a two-way chain through the `next_same_value'
384 and `prev_same_value' fields, and all point with
385 the `first_same_value' field at the first element in
386 that chain. The chain is in order of increasing cost.
387 Each element's cost value is in its `cost' field.
389 The `in_memory' field is nonzero for elements that
390 involve any reference to memory. These elements are removed
391 whenever a write is done to an unidentified location in memory.
392 To be safe, we assume that a memory address is unidentified unless
393 the address is either a symbol constant or a constant plus
394 the frame pointer or argument pointer.
396 The `related_value' field is used to connect related expressions
397 (that differ by adding an integer).
398 The related expressions are chained in a circular fashion.
399 `related_value' is zero for expressions for which this
402 The `cost' field stores the cost of this element's expression.
403 The `regcost' field stores the value returned by approx_reg_cost for
404 this element's expression.
406 The `is_const' flag is set if the element is a constant (including
409 The `flag' field is used as a temporary during some search routines.
411 The `mode' field is usually the same as GET_MODE (`exp'), but
412 if `exp' is a CONST_INT and has no machine mode then the `mode'
413 field is the mode it was being used as. Each constant is
414 recorded separately for each mode it is used with. */
420 struct table_elt
*next_same_hash
;
421 struct table_elt
*prev_same_hash
;
422 struct table_elt
*next_same_value
;
423 struct table_elt
*prev_same_value
;
424 struct table_elt
*first_same_value
;
425 struct table_elt
*related_value
;
428 /* The size of this field should match the size
429 of the mode field of struct rtx_def (see rtl.h). */
430 ENUM_BITFIELD(machine_mode
) mode
: 8;
436 /* We don't want a lot of buckets, because we rarely have very many
437 things stored in the hash table, and a lot of buckets slows
438 down a lot of loops that happen frequently. */
440 #define HASH_SIZE (1 << HASH_SHIFT)
441 #define HASH_MASK (HASH_SIZE - 1)
443 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
444 register (hard registers may require `do_not_record' to be set). */
447 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
448 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
449 : canon_hash (X, M)) & HASH_MASK)
451 /* Like HASH, but without side-effects. */
452 #define SAFE_HASH(X, M) \
453 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
454 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
455 : safe_hash (X, M)) & HASH_MASK)
457 /* Determine whether register number N is considered a fixed register for the
458 purpose of approximating register costs.
459 It is desirable to replace other regs with fixed regs, to reduce need for
461 A reg wins if it is either the frame pointer or designated as fixed. */
462 #define FIXED_REGNO_P(N) \
463 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
464 || fixed_regs[N] || global_regs[N])
466 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
467 hard registers and pointers into the frame are the cheapest with a cost
468 of 0. Next come pseudos with a cost of one and other hard registers with
469 a cost of 2. Aside from these special cases, call `rtx_cost'. */
471 #define CHEAP_REGNO(N) \
472 (REGNO_PTR_FRAME_P(N) \
473 || (HARD_REGISTER_NUM_P (N) \
474 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
476 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
477 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
479 /* Get the number of times this register has been updated in this
482 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
484 /* Get the point at which REG was recorded in the table. */
486 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
488 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
491 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
493 /* Get the quantity number for REG. */
495 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
497 /* Determine if the quantity number for register X represents a valid index
498 into the qty_table. */
500 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
502 static struct table_elt
*table
[HASH_SIZE
];
504 /* Chain of `struct table_elt's made so far for this function
505 but currently removed from the table. */
507 static struct table_elt
*free_element_chain
;
509 /* Set to the cost of a constant pool reference if one was found for a
510 symbolic constant. If this was found, it means we should try to
511 convert constants into constant pool entries if they don't fit in
514 static int constant_pool_entries_cost
;
515 static int constant_pool_entries_regcost
;
517 /* This data describes a block that will be processed by
518 cse_extended_basic_block. */
520 struct cse_basic_block_data
522 /* Total number of SETs in block. */
524 /* Size of current branch path, if any. */
526 /* Current path, indicating which basic_blocks will be processed. */
529 /* The basic block for this path entry. */
535 /* Pointers to the live in/live out bitmaps for the boundaries of the
537 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
539 /* A simple bitmap to track which basic blocks have been visited
540 already as part of an already processed extended basic block. */
541 static sbitmap cse_visited_basic_blocks
;
543 static bool fixed_base_plus_p (rtx x
);
544 static int notreg_cost (rtx
, enum rtx_code
);
545 static int approx_reg_cost_1 (rtx
*, void *);
546 static int approx_reg_cost (rtx
);
547 static int preferable (int, int, int, int);
548 static void new_basic_block (void);
549 static void make_new_qty (unsigned int, enum machine_mode
);
550 static void make_regs_eqv (unsigned int, unsigned int);
551 static void delete_reg_equiv (unsigned int);
552 static int mention_regs (rtx
);
553 static int insert_regs (rtx
, struct table_elt
*, int);
554 static void remove_from_table (struct table_elt
*, unsigned);
555 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
556 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
557 static rtx
lookup_as_function (rtx
, enum rtx_code
);
558 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
560 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
561 static void invalidate (rtx
, enum machine_mode
);
562 static bool cse_rtx_varies_p (const_rtx
, bool);
563 static void remove_invalid_refs (unsigned int);
564 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
566 static void rehash_using_reg (rtx
);
567 static void invalidate_memory (void);
568 static void invalidate_for_call (void);
569 static rtx
use_related_value (rtx
, struct table_elt
*);
571 static inline unsigned canon_hash (rtx
, enum machine_mode
);
572 static inline unsigned safe_hash (rtx
, enum machine_mode
);
573 static unsigned hash_rtx_string (const char *);
575 static rtx
canon_reg (rtx
, rtx
);
576 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
578 enum machine_mode
*);
579 static rtx
fold_rtx (rtx
, rtx
);
580 static rtx
equiv_constant (rtx
);
581 static void record_jump_equiv (rtx
, bool);
582 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
584 static void cse_insn (rtx
, rtx
);
585 static void cse_prescan_path (struct cse_basic_block_data
*);
586 static void invalidate_from_clobbers (rtx
);
587 static rtx
cse_process_notes (rtx
, rtx
, bool *);
588 static void cse_extended_basic_block (struct cse_basic_block_data
*);
589 static void count_reg_usage (rtx
, int *, rtx
, int);
590 static int check_for_label_ref (rtx
*, void *);
591 extern void dump_class (struct table_elt
*);
592 static void get_cse_reg_info_1 (unsigned int regno
);
593 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
594 static int check_dependence (rtx
*, void *);
596 static void flush_hash_table (void);
597 static bool insn_live_p (rtx
, int *);
598 static bool set_live_p (rtx
, rtx
, int *);
599 static bool dead_libcall_p (rtx
, int *);
600 static int cse_change_cc_mode (rtx
*, void *);
601 static void cse_change_cc_mode_insn (rtx
, rtx
);
602 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
603 static enum machine_mode
cse_cc_succs (basic_block
, rtx
, rtx
, bool);
606 #undef RTL_HOOKS_GEN_LOWPART
607 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
609 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
611 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
612 virtual regs here because the simplify_*_operation routines are called
613 by integrate.c, which is called before virtual register instantiation. */
616 fixed_base_plus_p (rtx x
)
618 switch (GET_CODE (x
))
621 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
623 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
625 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
626 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
631 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
633 return fixed_base_plus_p (XEXP (x
, 0));
640 /* Dump the expressions in the equivalence class indicated by CLASSP.
641 This function is used only for debugging. */
643 dump_class (struct table_elt
*classp
)
645 struct table_elt
*elt
;
647 fprintf (stderr
, "Equivalence chain for ");
648 print_rtl (stderr
, classp
->exp
);
649 fprintf (stderr
, ": \n");
651 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
653 print_rtl (stderr
, elt
->exp
);
654 fprintf (stderr
, "\n");
658 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
661 approx_reg_cost_1 (rtx
*xp
, void *data
)
668 unsigned int regno
= REGNO (x
);
670 if (! CHEAP_REGNO (regno
))
672 if (regno
< FIRST_PSEUDO_REGISTER
)
674 if (SMALL_REGISTER_CLASSES
)
686 /* Return an estimate of the cost of the registers used in an rtx.
687 This is mostly the number of different REG expressions in the rtx;
688 however for some exceptions like fixed registers we use a cost of
689 0. If any other hard register reference occurs, return MAX_COST. */
692 approx_reg_cost (rtx x
)
696 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
702 /* Return a negative value if an rtx A, whose costs are given by COST_A
703 and REGCOST_A, is more desirable than an rtx B.
704 Return a positive value if A is less desirable, or 0 if the two are
707 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
709 /* First, get rid of cases involving expressions that are entirely
711 if (cost_a
!= cost_b
)
713 if (cost_a
== MAX_COST
)
715 if (cost_b
== MAX_COST
)
719 /* Avoid extending lifetimes of hardregs. */
720 if (regcost_a
!= regcost_b
)
722 if (regcost_a
== MAX_COST
)
724 if (regcost_b
== MAX_COST
)
728 /* Normal operation costs take precedence. */
729 if (cost_a
!= cost_b
)
730 return cost_a
- cost_b
;
731 /* Only if these are identical consider effects on register pressure. */
732 if (regcost_a
!= regcost_b
)
733 return regcost_a
- regcost_b
;
737 /* Internal function, to compute cost when X is not a register; called
738 from COST macro to keep it simple. */
741 notreg_cost (rtx x
, enum rtx_code outer
)
743 return ((GET_CODE (x
) == SUBREG
744 && REG_P (SUBREG_REG (x
))
745 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
746 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
747 && (GET_MODE_SIZE (GET_MODE (x
))
748 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
749 && subreg_lowpart_p (x
)
750 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
751 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
753 : rtx_cost (x
, outer
) * 2);
757 /* Initialize CSE_REG_INFO_TABLE. */
760 init_cse_reg_info (unsigned int nregs
)
762 /* Do we need to grow the table? */
763 if (nregs
> cse_reg_info_table_size
)
765 unsigned int new_size
;
767 if (cse_reg_info_table_size
< 2048)
769 /* Compute a new size that is a power of 2 and no smaller
770 than the large of NREGS and 64. */
771 new_size
= (cse_reg_info_table_size
772 ? cse_reg_info_table_size
: 64);
774 while (new_size
< nregs
)
779 /* If we need a big table, allocate just enough to hold
784 /* Reallocate the table with NEW_SIZE entries. */
785 if (cse_reg_info_table
)
786 free (cse_reg_info_table
);
787 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
788 cse_reg_info_table_size
= new_size
;
789 cse_reg_info_table_first_uninitialized
= 0;
792 /* Do we have all of the first NREGS entries initialized? */
793 if (cse_reg_info_table_first_uninitialized
< nregs
)
795 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
798 /* Put the old timestamp on newly allocated entries so that they
799 will all be considered out of date. We do not touch those
800 entries beyond the first NREGS entries to be nice to the
802 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
803 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
805 cse_reg_info_table_first_uninitialized
= nregs
;
809 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
812 get_cse_reg_info_1 (unsigned int regno
)
814 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
815 entry will be considered to have been initialized. */
816 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
818 /* Initialize the rest of the entry. */
819 cse_reg_info_table
[regno
].reg_tick
= 1;
820 cse_reg_info_table
[regno
].reg_in_table
= -1;
821 cse_reg_info_table
[regno
].subreg_ticked
= -1;
822 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
825 /* Find a cse_reg_info entry for REGNO. */
827 static inline struct cse_reg_info
*
828 get_cse_reg_info (unsigned int regno
)
830 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
832 /* If this entry has not been initialized, go ahead and initialize
834 if (p
->timestamp
!= cse_reg_info_timestamp
)
835 get_cse_reg_info_1 (regno
);
840 /* Clear the hash table and initialize each register with its own quantity,
841 for a new basic block. */
844 new_basic_block (void)
850 /* Invalidate cse_reg_info_table. */
851 cse_reg_info_timestamp
++;
853 /* Clear out hash table state for this pass. */
854 CLEAR_HARD_REG_SET (hard_regs_in_table
);
856 /* The per-quantity values used to be initialized here, but it is
857 much faster to initialize each as it is made in `make_new_qty'. */
859 for (i
= 0; i
< HASH_SIZE
; i
++)
861 struct table_elt
*first
;
866 struct table_elt
*last
= first
;
870 while (last
->next_same_hash
!= NULL
)
871 last
= last
->next_same_hash
;
873 /* Now relink this hash entire chain into
874 the free element list. */
876 last
->next_same_hash
= free_element_chain
;
877 free_element_chain
= first
;
886 /* Say that register REG contains a quantity in mode MODE not in any
887 register before and initialize that quantity. */
890 make_new_qty (unsigned int reg
, enum machine_mode mode
)
893 struct qty_table_elem
*ent
;
894 struct reg_eqv_elem
*eqv
;
896 gcc_assert (next_qty
< max_qty
);
898 q
= REG_QTY (reg
) = next_qty
++;
900 ent
->first_reg
= reg
;
903 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
904 ent
->comparison_code
= UNKNOWN
;
906 eqv
= ®_eqv_table
[reg
];
907 eqv
->next
= eqv
->prev
= -1;
910 /* Make reg NEW equivalent to reg OLD.
911 OLD is not changing; NEW is. */
914 make_regs_eqv (unsigned int new, unsigned int old
)
916 unsigned int lastr
, firstr
;
917 int q
= REG_QTY (old
);
918 struct qty_table_elem
*ent
;
922 /* Nothing should become eqv until it has a "non-invalid" qty number. */
923 gcc_assert (REGNO_QTY_VALID_P (old
));
926 firstr
= ent
->first_reg
;
927 lastr
= ent
->last_reg
;
929 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
930 hard regs. Among pseudos, if NEW will live longer than any other reg
931 of the same qty, and that is beyond the current basic block,
932 make it the new canonical replacement for this qty. */
933 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
934 /* Certain fixed registers might be of the class NO_REGS. This means
935 that not only can they not be allocated by the compiler, but
936 they cannot be used in substitutions or canonicalizations
938 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
939 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
940 || (new >= FIRST_PSEUDO_REGISTER
941 && (firstr
< FIRST_PSEUDO_REGISTER
942 || (bitmap_bit_p (cse_ebb_live_out
, new)
943 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
944 || (bitmap_bit_p (cse_ebb_live_in
, new)
945 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
947 reg_eqv_table
[firstr
].prev
= new;
948 reg_eqv_table
[new].next
= firstr
;
949 reg_eqv_table
[new].prev
= -1;
950 ent
->first_reg
= new;
954 /* If NEW is a hard reg (known to be non-fixed), insert at end.
955 Otherwise, insert before any non-fixed hard regs that are at the
956 end. Registers of class NO_REGS cannot be used as an
957 equivalent for anything. */
958 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
959 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
960 && new >= FIRST_PSEUDO_REGISTER
)
961 lastr
= reg_eqv_table
[lastr
].prev
;
962 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
963 if (reg_eqv_table
[lastr
].next
>= 0)
964 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
966 qty_table
[q
].last_reg
= new;
967 reg_eqv_table
[lastr
].next
= new;
968 reg_eqv_table
[new].prev
= lastr
;
972 /* Remove REG from its equivalence class. */
975 delete_reg_equiv (unsigned int reg
)
977 struct qty_table_elem
*ent
;
978 int q
= REG_QTY (reg
);
981 /* If invalid, do nothing. */
982 if (! REGNO_QTY_VALID_P (reg
))
987 p
= reg_eqv_table
[reg
].prev
;
988 n
= reg_eqv_table
[reg
].next
;
991 reg_eqv_table
[n
].prev
= p
;
995 reg_eqv_table
[p
].next
= n
;
999 REG_QTY (reg
) = -reg
- 1;
1002 /* Remove any invalid expressions from the hash table
1003 that refer to any of the registers contained in expression X.
1005 Make sure that newly inserted references to those registers
1006 as subexpressions will be considered valid.
1008 mention_regs is not called when a register itself
1009 is being stored in the table.
1011 Return 1 if we have done something that may have changed the hash code
1015 mention_regs (rtx x
)
1025 code
= GET_CODE (x
);
1028 unsigned int regno
= REGNO (x
);
1029 unsigned int endregno
= END_REGNO (x
);
1032 for (i
= regno
; i
< endregno
; i
++)
1034 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1035 remove_invalid_refs (i
);
1037 REG_IN_TABLE (i
) = REG_TICK (i
);
1038 SUBREG_TICKED (i
) = -1;
1044 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1045 pseudo if they don't use overlapping words. We handle only pseudos
1046 here for simplicity. */
1047 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1048 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1050 unsigned int i
= REGNO (SUBREG_REG (x
));
1052 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1054 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1055 the last store to this register really stored into this
1056 subreg, then remove the memory of this subreg.
1057 Otherwise, remove any memory of the entire register and
1058 all its subregs from the table. */
1059 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1060 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1061 remove_invalid_refs (i
);
1063 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1066 REG_IN_TABLE (i
) = REG_TICK (i
);
1067 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1071 /* If X is a comparison or a COMPARE and either operand is a register
1072 that does not have a quantity, give it one. This is so that a later
1073 call to record_jump_equiv won't cause X to be assigned a different
1074 hash code and not found in the table after that call.
1076 It is not necessary to do this here, since rehash_using_reg can
1077 fix up the table later, but doing this here eliminates the need to
1078 call that expensive function in the most common case where the only
1079 use of the register is in the comparison. */
1081 if (code
== COMPARE
|| COMPARISON_P (x
))
1083 if (REG_P (XEXP (x
, 0))
1084 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1085 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1087 rehash_using_reg (XEXP (x
, 0));
1091 if (REG_P (XEXP (x
, 1))
1092 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1093 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1095 rehash_using_reg (XEXP (x
, 1));
1100 fmt
= GET_RTX_FORMAT (code
);
1101 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1103 changed
|= mention_regs (XEXP (x
, i
));
1104 else if (fmt
[i
] == 'E')
1105 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1106 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1111 /* Update the register quantities for inserting X into the hash table
1112 with a value equivalent to CLASSP.
1113 (If the class does not contain a REG, it is irrelevant.)
1114 If MODIFIED is nonzero, X is a destination; it is being modified.
1115 Note that delete_reg_equiv should be called on a register
1116 before insert_regs is done on that register with MODIFIED != 0.
1118 Nonzero value means that elements of reg_qty have changed
1119 so X's hash code may be different. */
1122 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1126 unsigned int regno
= REGNO (x
);
1129 /* If REGNO is in the equivalence table already but is of the
1130 wrong mode for that equivalence, don't do anything here. */
1132 qty_valid
= REGNO_QTY_VALID_P (regno
);
1135 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1137 if (ent
->mode
!= GET_MODE (x
))
1141 if (modified
|| ! qty_valid
)
1144 for (classp
= classp
->first_same_value
;
1146 classp
= classp
->next_same_value
)
1147 if (REG_P (classp
->exp
)
1148 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1150 unsigned c_regno
= REGNO (classp
->exp
);
1152 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1154 /* Suppose that 5 is hard reg and 100 and 101 are
1157 (set (reg:si 100) (reg:si 5))
1158 (set (reg:si 5) (reg:si 100))
1159 (set (reg:di 101) (reg:di 5))
1161 We would now set REG_QTY (101) = REG_QTY (5), but the
1162 entry for 5 is in SImode. When we use this later in
1163 copy propagation, we get the register in wrong mode. */
1164 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1167 make_regs_eqv (regno
, c_regno
);
1171 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1172 than REG_IN_TABLE to find out if there was only a single preceding
1173 invalidation - for the SUBREG - or another one, which would be
1174 for the full register. However, if we find here that REG_TICK
1175 indicates that the register is invalid, it means that it has
1176 been invalidated in a separate operation. The SUBREG might be used
1177 now (then this is a recursive call), or we might use the full REG
1178 now and a SUBREG of it later. So bump up REG_TICK so that
1179 mention_regs will do the right thing. */
1181 && REG_IN_TABLE (regno
) >= 0
1182 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1184 make_new_qty (regno
, GET_MODE (x
));
1191 /* If X is a SUBREG, we will likely be inserting the inner register in the
1192 table. If that register doesn't have an assigned quantity number at
1193 this point but does later, the insertion that we will be doing now will
1194 not be accessible because its hash code will have changed. So assign
1195 a quantity number now. */
1197 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1198 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1200 insert_regs (SUBREG_REG (x
), NULL
, 0);
1205 return mention_regs (x
);
1208 /* Look in or update the hash table. */
1210 /* Remove table element ELT from use in the table.
1211 HASH is its hash code, made using the HASH macro.
1212 It's an argument because often that is known in advance
1213 and we save much time not recomputing it. */
1216 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1221 /* Mark this element as removed. See cse_insn. */
1222 elt
->first_same_value
= 0;
1224 /* Remove the table element from its equivalence class. */
1227 struct table_elt
*prev
= elt
->prev_same_value
;
1228 struct table_elt
*next
= elt
->next_same_value
;
1231 next
->prev_same_value
= prev
;
1234 prev
->next_same_value
= next
;
1237 struct table_elt
*newfirst
= next
;
1240 next
->first_same_value
= newfirst
;
1241 next
= next
->next_same_value
;
1246 /* Remove the table element from its hash bucket. */
1249 struct table_elt
*prev
= elt
->prev_same_hash
;
1250 struct table_elt
*next
= elt
->next_same_hash
;
1253 next
->prev_same_hash
= prev
;
1256 prev
->next_same_hash
= next
;
1257 else if (table
[hash
] == elt
)
1261 /* This entry is not in the proper hash bucket. This can happen
1262 when two classes were merged by `merge_equiv_classes'. Search
1263 for the hash bucket that it heads. This happens only very
1264 rarely, so the cost is acceptable. */
1265 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1266 if (table
[hash
] == elt
)
1271 /* Remove the table element from its related-value circular chain. */
1273 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1275 struct table_elt
*p
= elt
->related_value
;
1277 while (p
->related_value
!= elt
)
1278 p
= p
->related_value
;
1279 p
->related_value
= elt
->related_value
;
1280 if (p
->related_value
== p
)
1281 p
->related_value
= 0;
1284 /* Now add it to the free element chain. */
1285 elt
->next_same_hash
= free_element_chain
;
1286 free_element_chain
= elt
;
1289 /* Look up X in the hash table and return its table element,
1290 or 0 if X is not in the table.
1292 MODE is the machine-mode of X, or if X is an integer constant
1293 with VOIDmode then MODE is the mode with which X will be used.
1295 Here we are satisfied to find an expression whose tree structure
1298 static struct table_elt
*
1299 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1301 struct table_elt
*p
;
1303 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1304 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1305 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1311 /* Like `lookup' but don't care whether the table element uses invalid regs.
1312 Also ignore discrepancies in the machine mode of a register. */
1314 static struct table_elt
*
1315 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1317 struct table_elt
*p
;
1321 unsigned int regno
= REGNO (x
);
1323 /* Don't check the machine mode when comparing registers;
1324 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1325 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1327 && REGNO (p
->exp
) == regno
)
1332 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1334 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1341 /* Look for an expression equivalent to X and with code CODE.
1342 If one is found, return that expression. */
1345 lookup_as_function (rtx x
, enum rtx_code code
)
1348 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1350 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1351 long as we are narrowing. So if we looked in vain for a mode narrower
1352 than word_mode before, look for word_mode now. */
1353 if (p
== 0 && code
== CONST_INT
1354 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1357 PUT_MODE (x
, word_mode
);
1358 p
= lookup (x
, SAFE_HASH (x
, VOIDmode
), word_mode
);
1364 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1365 if (GET_CODE (p
->exp
) == code
1366 /* Make sure this is a valid entry in the table. */
1367 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1373 /* Insert X in the hash table, assuming HASH is its hash code
1374 and CLASSP is an element of the class it should go in
1375 (or 0 if a new class should be made).
1376 It is inserted at the proper position to keep the class in
1377 the order cheapest first.
1379 MODE is the machine-mode of X, or if X is an integer constant
1380 with VOIDmode then MODE is the mode with which X will be used.
1382 For elements of equal cheapness, the most recent one
1383 goes in front, except that the first element in the list
1384 remains first unless a cheaper element is added. The order of
1385 pseudo-registers does not matter, as canon_reg will be called to
1386 find the cheapest when a register is retrieved from the table.
1388 The in_memory field in the hash table element is set to 0.
1389 The caller must set it nonzero if appropriate.
1391 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1392 and if insert_regs returns a nonzero value
1393 you must then recompute its hash code before calling here.
1395 If necessary, update table showing constant values of quantities. */
1397 #define CHEAPER(X, Y) \
1398 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1400 static struct table_elt
*
1401 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
, enum machine_mode mode
)
1403 struct table_elt
*elt
;
1405 /* If X is a register and we haven't made a quantity for it,
1406 something is wrong. */
1407 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1409 /* If X is a hard register, show it is being put in the table. */
1410 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1411 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1413 /* Put an element for X into the right hash bucket. */
1415 elt
= free_element_chain
;
1417 free_element_chain
= elt
->next_same_hash
;
1419 elt
= XNEW (struct table_elt
);
1422 elt
->canon_exp
= NULL_RTX
;
1423 elt
->cost
= COST (x
);
1424 elt
->regcost
= approx_reg_cost (x
);
1425 elt
->next_same_value
= 0;
1426 elt
->prev_same_value
= 0;
1427 elt
->next_same_hash
= table
[hash
];
1428 elt
->prev_same_hash
= 0;
1429 elt
->related_value
= 0;
1432 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1435 table
[hash
]->prev_same_hash
= elt
;
1438 /* Put it into the proper value-class. */
1441 classp
= classp
->first_same_value
;
1442 if (CHEAPER (elt
, classp
))
1443 /* Insert at the head of the class. */
1445 struct table_elt
*p
;
1446 elt
->next_same_value
= classp
;
1447 classp
->prev_same_value
= elt
;
1448 elt
->first_same_value
= elt
;
1450 for (p
= classp
; p
; p
= p
->next_same_value
)
1451 p
->first_same_value
= elt
;
1455 /* Insert not at head of the class. */
1456 /* Put it after the last element cheaper than X. */
1457 struct table_elt
*p
, *next
;
1459 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1462 /* Put it after P and before NEXT. */
1463 elt
->next_same_value
= next
;
1465 next
->prev_same_value
= elt
;
1467 elt
->prev_same_value
= p
;
1468 p
->next_same_value
= elt
;
1469 elt
->first_same_value
= classp
;
1473 elt
->first_same_value
= elt
;
1475 /* If this is a constant being set equivalent to a register or a register
1476 being set equivalent to a constant, note the constant equivalence.
1478 If this is a constant, it cannot be equivalent to a different constant,
1479 and a constant is the only thing that can be cheaper than a register. So
1480 we know the register is the head of the class (before the constant was
1483 If this is a register that is not already known equivalent to a
1484 constant, we must check the entire class.
1486 If this is a register that is already known equivalent to an insn,
1487 update the qtys `const_insn' to show that `this_insn' is the latest
1488 insn making that quantity equivalent to the constant. */
1490 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1493 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1494 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1496 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1497 exp_ent
->const_insn
= this_insn
;
1502 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1505 struct table_elt
*p
;
1507 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1509 if (p
->is_const
&& !REG_P (p
->exp
))
1511 int x_q
= REG_QTY (REGNO (x
));
1512 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1515 = gen_lowpart (GET_MODE (x
), p
->exp
);
1516 x_ent
->const_insn
= this_insn
;
1523 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1524 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1525 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1527 /* If this is a constant with symbolic value,
1528 and it has a term with an explicit integer value,
1529 link it up with related expressions. */
1530 if (GET_CODE (x
) == CONST
)
1532 rtx subexp
= get_related_value (x
);
1534 struct table_elt
*subelt
, *subelt_prev
;
1538 /* Get the integer-free subexpression in the hash table. */
1539 subhash
= SAFE_HASH (subexp
, mode
);
1540 subelt
= lookup (subexp
, subhash
, mode
);
1542 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1543 /* Initialize SUBELT's circular chain if it has none. */
1544 if (subelt
->related_value
== 0)
1545 subelt
->related_value
= subelt
;
1546 /* Find the element in the circular chain that precedes SUBELT. */
1547 subelt_prev
= subelt
;
1548 while (subelt_prev
->related_value
!= subelt
)
1549 subelt_prev
= subelt_prev
->related_value
;
1550 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1551 This way the element that follows SUBELT is the oldest one. */
1552 elt
->related_value
= subelt_prev
->related_value
;
1553 subelt_prev
->related_value
= elt
;
1560 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1561 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1562 the two classes equivalent.
1564 CLASS1 will be the surviving class; CLASS2 should not be used after this
1567 Any invalid entries in CLASS2 will not be copied. */
1570 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1572 struct table_elt
*elt
, *next
, *new;
1574 /* Ensure we start with the head of the classes. */
1575 class1
= class1
->first_same_value
;
1576 class2
= class2
->first_same_value
;
1578 /* If they were already equal, forget it. */
1579 if (class1
== class2
)
1582 for (elt
= class2
; elt
; elt
= next
)
1586 enum machine_mode mode
= elt
->mode
;
1588 next
= elt
->next_same_value
;
1590 /* Remove old entry, make a new one in CLASS1's class.
1591 Don't do this for invalid entries as we cannot find their
1592 hash code (it also isn't necessary). */
1593 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1595 bool need_rehash
= false;
1597 hash_arg_in_memory
= 0;
1598 hash
= HASH (exp
, mode
);
1602 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1603 delete_reg_equiv (REGNO (exp
));
1606 remove_from_table (elt
, hash
);
1608 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1610 rehash_using_reg (exp
);
1611 hash
= HASH (exp
, mode
);
1613 new = insert (exp
, class1
, hash
, mode
);
1614 new->in_memory
= hash_arg_in_memory
;
1619 /* Flush the entire hash table. */
1622 flush_hash_table (void)
1625 struct table_elt
*p
;
1627 for (i
= 0; i
< HASH_SIZE
; i
++)
1628 for (p
= table
[i
]; p
; p
= table
[i
])
1630 /* Note that invalidate can remove elements
1631 after P in the current hash chain. */
1633 invalidate (p
->exp
, VOIDmode
);
1635 remove_from_table (p
, i
);
1639 /* Function called for each rtx to check whether true dependence exist. */
1640 struct check_dependence_data
1642 enum machine_mode mode
;
1648 check_dependence (rtx
*x
, void *data
)
1650 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1651 if (*x
&& MEM_P (*x
))
1652 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
,
1658 /* Remove from the hash table, or mark as invalid, all expressions whose
1659 values could be altered by storing in X. X is a register, a subreg, or
1660 a memory reference with nonvarying address (because, when a memory
1661 reference with a varying address is stored in, all memory references are
1662 removed by invalidate_memory so specific invalidation is superfluous).
1663 FULL_MODE, if not VOIDmode, indicates that this much should be
1664 invalidated instead of just the amount indicated by the mode of X. This
1665 is only used for bitfield stores into memory.
1667 A nonvarying address may be just a register or just a symbol reference,
1668 or it may be either of those plus a numeric offset. */
1671 invalidate (rtx x
, enum machine_mode full_mode
)
1674 struct table_elt
*p
;
1677 switch (GET_CODE (x
))
1681 /* If X is a register, dependencies on its contents are recorded
1682 through the qty number mechanism. Just change the qty number of
1683 the register, mark it as invalid for expressions that refer to it,
1684 and remove it itself. */
1685 unsigned int regno
= REGNO (x
);
1686 unsigned int hash
= HASH (x
, GET_MODE (x
));
1688 /* Remove REGNO from any quantity list it might be on and indicate
1689 that its value might have changed. If it is a pseudo, remove its
1690 entry from the hash table.
1692 For a hard register, we do the first two actions above for any
1693 additional hard registers corresponding to X. Then, if any of these
1694 registers are in the table, we must remove any REG entries that
1695 overlap these registers. */
1697 delete_reg_equiv (regno
);
1699 SUBREG_TICKED (regno
) = -1;
1701 if (regno
>= FIRST_PSEUDO_REGISTER
)
1703 /* Because a register can be referenced in more than one mode,
1704 we might have to remove more than one table entry. */
1705 struct table_elt
*elt
;
1707 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1708 remove_from_table (elt
, hash
);
1712 HOST_WIDE_INT in_table
1713 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1714 unsigned int endregno
= END_HARD_REGNO (x
);
1715 unsigned int tregno
, tendregno
, rn
;
1716 struct table_elt
*p
, *next
;
1718 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1720 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1722 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1723 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1724 delete_reg_equiv (rn
);
1726 SUBREG_TICKED (rn
) = -1;
1730 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1731 for (p
= table
[hash
]; p
; p
= next
)
1733 next
= p
->next_same_hash
;
1736 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1739 tregno
= REGNO (p
->exp
);
1740 tendregno
= END_HARD_REGNO (p
->exp
);
1741 if (tendregno
> regno
&& tregno
< endregno
)
1742 remove_from_table (p
, hash
);
1749 invalidate (SUBREG_REG (x
), VOIDmode
);
1753 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1754 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1758 /* This is part of a disjoint return value; extract the location in
1759 question ignoring the offset. */
1760 invalidate (XEXP (x
, 0), VOIDmode
);
1764 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1765 /* Calculate the canonical version of X here so that
1766 true_dependence doesn't generate new RTL for X on each call. */
1769 /* Remove all hash table elements that refer to overlapping pieces of
1771 if (full_mode
== VOIDmode
)
1772 full_mode
= GET_MODE (x
);
1774 for (i
= 0; i
< HASH_SIZE
; i
++)
1776 struct table_elt
*next
;
1778 for (p
= table
[i
]; p
; p
= next
)
1780 next
= p
->next_same_hash
;
1783 struct check_dependence_data d
;
1785 /* Just canonicalize the expression once;
1786 otherwise each time we call invalidate
1787 true_dependence will canonicalize the
1788 expression again. */
1790 p
->canon_exp
= canon_rtx (p
->exp
);
1794 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1795 remove_from_table (p
, i
);
1806 /* Remove all expressions that refer to register REGNO,
1807 since they are already invalid, and we are about to
1808 mark that register valid again and don't want the old
1809 expressions to reappear as valid. */
1812 remove_invalid_refs (unsigned int regno
)
1815 struct table_elt
*p
, *next
;
1817 for (i
= 0; i
< HASH_SIZE
; i
++)
1818 for (p
= table
[i
]; p
; p
= next
)
1820 next
= p
->next_same_hash
;
1822 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1823 remove_from_table (p
, i
);
1827 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1830 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1831 enum machine_mode mode
)
1834 struct table_elt
*p
, *next
;
1835 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1837 for (i
= 0; i
< HASH_SIZE
; i
++)
1838 for (p
= table
[i
]; p
; p
= next
)
1841 next
= p
->next_same_hash
;
1844 && (GET_CODE (exp
) != SUBREG
1845 || !REG_P (SUBREG_REG (exp
))
1846 || REGNO (SUBREG_REG (exp
)) != regno
1847 || (((SUBREG_BYTE (exp
)
1848 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
1849 && SUBREG_BYTE (exp
) <= end
))
1850 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1851 remove_from_table (p
, i
);
1855 /* Recompute the hash codes of any valid entries in the hash table that
1856 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1858 This is called when we make a jump equivalence. */
1861 rehash_using_reg (rtx x
)
1864 struct table_elt
*p
, *next
;
1867 if (GET_CODE (x
) == SUBREG
)
1870 /* If X is not a register or if the register is known not to be in any
1871 valid entries in the table, we have no work to do. */
1874 || REG_IN_TABLE (REGNO (x
)) < 0
1875 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1878 /* Scan all hash chains looking for valid entries that mention X.
1879 If we find one and it is in the wrong hash chain, move it. */
1881 for (i
= 0; i
< HASH_SIZE
; i
++)
1882 for (p
= table
[i
]; p
; p
= next
)
1884 next
= p
->next_same_hash
;
1885 if (reg_mentioned_p (x
, p
->exp
)
1886 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
1887 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
1889 if (p
->next_same_hash
)
1890 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1892 if (p
->prev_same_hash
)
1893 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1895 table
[i
] = p
->next_same_hash
;
1897 p
->next_same_hash
= table
[hash
];
1898 p
->prev_same_hash
= 0;
1900 table
[hash
]->prev_same_hash
= p
;
1906 /* Remove from the hash table any expression that is a call-clobbered
1907 register. Also update their TICK values. */
1910 invalidate_for_call (void)
1912 unsigned int regno
, endregno
;
1915 struct table_elt
*p
, *next
;
1918 /* Go through all the hard registers. For each that is clobbered in
1919 a CALL_INSN, remove the register from quantity chains and update
1920 reg_tick if defined. Also see if any of these registers is currently
1923 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1924 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1926 delete_reg_equiv (regno
);
1927 if (REG_TICK (regno
) >= 0)
1930 SUBREG_TICKED (regno
) = -1;
1933 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1936 /* In the case where we have no call-clobbered hard registers in the
1937 table, we are done. Otherwise, scan the table and remove any
1938 entry that overlaps a call-clobbered register. */
1941 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1942 for (p
= table
[hash
]; p
; p
= next
)
1944 next
= p
->next_same_hash
;
1947 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1950 regno
= REGNO (p
->exp
);
1951 endregno
= END_HARD_REGNO (p
->exp
);
1953 for (i
= regno
; i
< endregno
; i
++)
1954 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1956 remove_from_table (p
, hash
);
1962 /* Given an expression X of type CONST,
1963 and ELT which is its table entry (or 0 if it
1964 is not in the hash table),
1965 return an alternate expression for X as a register plus integer.
1966 If none can be found, return 0. */
1969 use_related_value (rtx x
, struct table_elt
*elt
)
1971 struct table_elt
*relt
= 0;
1972 struct table_elt
*p
, *q
;
1973 HOST_WIDE_INT offset
;
1975 /* First, is there anything related known?
1976 If we have a table element, we can tell from that.
1977 Otherwise, must look it up. */
1979 if (elt
!= 0 && elt
->related_value
!= 0)
1981 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1983 rtx subexp
= get_related_value (x
);
1985 relt
= lookup (subexp
,
1986 SAFE_HASH (subexp
, GET_MODE (subexp
)),
1993 /* Search all related table entries for one that has an
1994 equivalent register. */
1999 /* This loop is strange in that it is executed in two different cases.
2000 The first is when X is already in the table. Then it is searching
2001 the RELATED_VALUE list of X's class (RELT). The second case is when
2002 X is not in the table. Then RELT points to a class for the related
2005 Ensure that, whatever case we are in, that we ignore classes that have
2006 the same value as X. */
2008 if (rtx_equal_p (x
, p
->exp
))
2011 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2018 p
= p
->related_value
;
2020 /* We went all the way around, so there is nothing to be found.
2021 Alternatively, perhaps RELT was in the table for some other reason
2022 and it has no related values recorded. */
2023 if (p
== relt
|| p
== 0)
2030 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2031 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2032 return plus_constant (q
->exp
, offset
);
2035 /* Hash a string. Just add its bytes up. */
2036 static inline unsigned
2037 hash_rtx_string (const char *ps
)
2040 const unsigned char *p
= (const unsigned char *) ps
;
2049 /* Hash an rtx. We are careful to make sure the value is never negative.
2050 Equivalent registers hash identically.
2051 MODE is used in hashing for CONST_INTs only;
2052 otherwise the mode of X is used.
2054 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2056 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2057 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2059 Note that cse_insn knows that the hash code of a MEM expression
2060 is just (int) MEM plus the hash code of the address. */
2063 hash_rtx (const_rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2064 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2071 /* Used to turn recursion into iteration. We can't rely on GCC's
2072 tail-recursion elimination since we need to keep accumulating values
2078 code
= GET_CODE (x
);
2083 unsigned int regno
= REGNO (x
);
2085 if (!reload_completed
)
2087 /* On some machines, we can't record any non-fixed hard register,
2088 because extending its life will cause reload problems. We
2089 consider ap, fp, sp, gp to be fixed for this purpose.
2091 We also consider CCmode registers to be fixed for this purpose;
2092 failure to do so leads to failure to simplify 0<100 type of
2095 On all machines, we can't record any global registers.
2096 Nor should we record any register that is in a small
2097 class, as defined by CLASS_LIKELY_SPILLED_P. */
2100 if (regno
>= FIRST_PSEUDO_REGISTER
)
2102 else if (x
== frame_pointer_rtx
2103 || x
== hard_frame_pointer_rtx
2104 || x
== arg_pointer_rtx
2105 || x
== stack_pointer_rtx
2106 || x
== pic_offset_table_rtx
)
2108 else if (global_regs
[regno
])
2110 else if (fixed_regs
[regno
])
2112 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2114 else if (SMALL_REGISTER_CLASSES
)
2116 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2123 *do_not_record_p
= 1;
2128 hash
+= ((unsigned int) REG
<< 7);
2129 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2133 /* We handle SUBREG of a REG specially because the underlying
2134 reg changes its hash value with every value change; we don't
2135 want to have to forget unrelated subregs when one subreg changes. */
2138 if (REG_P (SUBREG_REG (x
)))
2140 hash
+= (((unsigned int) SUBREG
<< 7)
2141 + REGNO (SUBREG_REG (x
))
2142 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2149 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2150 + (unsigned int) INTVAL (x
));
2154 /* This is like the general case, except that it only counts
2155 the integers representing the constant. */
2156 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2157 if (GET_MODE (x
) != VOIDmode
)
2158 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2160 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2161 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2165 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2166 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2174 units
= CONST_VECTOR_NUNITS (x
);
2176 for (i
= 0; i
< units
; ++i
)
2178 elt
= CONST_VECTOR_ELT (x
, i
);
2179 hash
+= hash_rtx (elt
, GET_MODE (elt
), do_not_record_p
,
2180 hash_arg_in_memory_p
, have_reg_qty
);
2186 /* Assume there is only one rtx object for any given label. */
2188 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2189 differences and differences between each stage's debugging dumps. */
2190 hash
+= (((unsigned int) LABEL_REF
<< 7)
2191 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2196 /* Don't hash on the symbol's address to avoid bootstrap differences.
2197 Different hash values may cause expressions to be recorded in
2198 different orders and thus different registers to be used in the
2199 final assembler. This also avoids differences in the dump files
2200 between various stages. */
2202 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2205 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2207 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2212 /* We don't record if marked volatile or if BLKmode since we don't
2213 know the size of the move. */
2214 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2216 *do_not_record_p
= 1;
2219 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2220 *hash_arg_in_memory_p
= 1;
2222 /* Now that we have already found this special case,
2223 might as well speed it up as much as possible. */
2224 hash
+= (unsigned) MEM
;
2229 /* A USE that mentions non-volatile memory needs special
2230 handling since the MEM may be BLKmode which normally
2231 prevents an entry from being made. Pure calls are
2232 marked by a USE which mentions BLKmode memory.
2233 See calls.c:emit_call_1. */
2234 if (MEM_P (XEXP (x
, 0))
2235 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2237 hash
+= (unsigned) USE
;
2240 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2241 *hash_arg_in_memory_p
= 1;
2243 /* Now that we have already found this special case,
2244 might as well speed it up as much as possible. */
2245 hash
+= (unsigned) MEM
;
2260 case UNSPEC_VOLATILE
:
2261 *do_not_record_p
= 1;
2265 if (MEM_VOLATILE_P (x
))
2267 *do_not_record_p
= 1;
2272 /* We don't want to take the filename and line into account. */
2273 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2274 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2275 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2276 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2278 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2280 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2282 hash
+= (hash_rtx (ASM_OPERANDS_INPUT (x
, i
),
2283 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2284 do_not_record_p
, hash_arg_in_memory_p
,
2287 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2290 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2291 x
= ASM_OPERANDS_INPUT (x
, 0);
2292 mode
= GET_MODE (x
);
2304 i
= GET_RTX_LENGTH (code
) - 1;
2305 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2306 fmt
= GET_RTX_FORMAT (code
);
2312 /* If we are about to do the last recursive call
2313 needed at this level, change it into iteration.
2314 This function is called enough to be worth it. */
2321 hash
+= hash_rtx (XEXP (x
, i
), 0, do_not_record_p
,
2322 hash_arg_in_memory_p
, have_reg_qty
);
2326 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2327 hash
+= hash_rtx (XVECEXP (x
, i
, j
), 0, do_not_record_p
,
2328 hash_arg_in_memory_p
, have_reg_qty
);
2332 hash
+= hash_rtx_string (XSTR (x
, i
));
2336 hash
+= (unsigned int) XINT (x
, i
);
2351 /* Hash an rtx X for cse via hash_rtx.
2352 Stores 1 in do_not_record if any subexpression is volatile.
2353 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2354 does not have the RTX_UNCHANGING_P bit set. */
2356 static inline unsigned
2357 canon_hash (rtx x
, enum machine_mode mode
)
2359 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2362 /* Like canon_hash but with no side effects, i.e. do_not_record
2363 and hash_arg_in_memory are not changed. */
2365 static inline unsigned
2366 safe_hash (rtx x
, enum machine_mode mode
)
2368 int dummy_do_not_record
;
2369 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2372 /* Return 1 iff X and Y would canonicalize into the same thing,
2373 without actually constructing the canonicalization of either one.
2374 If VALIDATE is nonzero,
2375 we assume X is an expression being processed from the rtl
2376 and Y was found in the hash table. We check register refs
2377 in Y for being marked as valid.
2379 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2382 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2388 /* Note: it is incorrect to assume an expression is equivalent to itself
2389 if VALIDATE is nonzero. */
2390 if (x
== y
&& !validate
)
2393 if (x
== 0 || y
== 0)
2396 code
= GET_CODE (x
);
2397 if (code
!= GET_CODE (y
))
2400 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2401 if (GET_MODE (x
) != GET_MODE (y
))
2414 return XEXP (x
, 0) == XEXP (y
, 0);
2417 return XSTR (x
, 0) == XSTR (y
, 0);
2421 return REGNO (x
) == REGNO (y
);
2424 unsigned int regno
= REGNO (y
);
2426 unsigned int endregno
= END_REGNO (y
);
2428 /* If the quantities are not the same, the expressions are not
2429 equivalent. If there are and we are not to validate, they
2430 are equivalent. Otherwise, ensure all regs are up-to-date. */
2432 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2438 for (i
= regno
; i
< endregno
; i
++)
2439 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2448 /* A volatile mem should not be considered equivalent to any
2450 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2453 /* Can't merge two expressions in different alias sets, since we
2454 can decide that the expression is transparent in a block when
2455 it isn't, due to it being set with the different alias set.
2457 Also, can't merge two expressions with different MEM_ATTRS.
2458 They could e.g. be two different entities allocated into the
2459 same space on the stack (see e.g. PR25130). In that case, the
2460 MEM addresses can be the same, even though the two MEMs are
2461 absolutely not equivalent.
2463 But because really all MEM attributes should be the same for
2464 equivalent MEMs, we just use the invariant that MEMs that have
2465 the same attributes share the same mem_attrs data structure. */
2466 if (MEM_ATTRS (x
) != MEM_ATTRS (y
))
2471 /* For commutative operations, check both orders. */
2479 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2481 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2482 validate
, for_gcse
))
2483 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2485 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2486 validate
, for_gcse
)));
2489 /* We don't use the generic code below because we want to
2490 disregard filename and line numbers. */
2492 /* A volatile asm isn't equivalent to any other. */
2493 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2496 if (GET_MODE (x
) != GET_MODE (y
)
2497 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2498 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2499 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2500 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2501 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2504 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2506 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2507 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2508 ASM_OPERANDS_INPUT (y
, i
),
2510 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2511 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2521 /* Compare the elements. If any pair of corresponding elements
2522 fail to match, return 0 for the whole thing. */
2524 fmt
= GET_RTX_FORMAT (code
);
2525 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2530 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2531 validate
, for_gcse
))
2536 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2538 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2539 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2540 validate
, for_gcse
))
2545 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2550 if (XINT (x
, i
) != XINT (y
, i
))
2555 if (XWINT (x
, i
) != XWINT (y
, i
))
2571 /* Return 1 if X has a value that can vary even between two
2572 executions of the program. 0 means X can be compared reliably
2573 against certain constants or near-constants. */
2576 cse_rtx_varies_p (const_rtx x
, bool from_alias
)
2578 /* We need not check for X and the equivalence class being of the same
2579 mode because if X is equivalent to a constant in some mode, it
2580 doesn't vary in any mode. */
2583 && REGNO_QTY_VALID_P (REGNO (x
)))
2585 int x_q
= REG_QTY (REGNO (x
));
2586 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2588 if (GET_MODE (x
) == x_ent
->mode
2589 && x_ent
->const_rtx
!= NULL_RTX
)
2593 if (GET_CODE (x
) == PLUS
2594 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2595 && REG_P (XEXP (x
, 0))
2596 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2598 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2599 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2601 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2602 && x0_ent
->const_rtx
!= NULL_RTX
)
2606 /* This can happen as the result of virtual register instantiation, if
2607 the initial constant is too large to be a valid address. This gives
2608 us a three instruction sequence, load large offset into a register,
2609 load fp minus a constant into a register, then a MEM which is the
2610 sum of the two `constant' registers. */
2611 if (GET_CODE (x
) == PLUS
2612 && REG_P (XEXP (x
, 0))
2613 && REG_P (XEXP (x
, 1))
2614 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2615 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2617 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2618 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2619 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2620 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2622 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2623 && x0_ent
->const_rtx
!= NULL_RTX
2624 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2625 && x1_ent
->const_rtx
!= NULL_RTX
)
2629 return rtx_varies_p (x
, from_alias
);
2632 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2633 the result if necessary. INSN is as for canon_reg. */
2636 validate_canon_reg (rtx
*xloc
, rtx insn
)
2640 rtx
new = canon_reg (*xloc
, insn
);
2642 /* If replacing pseudo with hard reg or vice versa, ensure the
2643 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2644 gcc_assert (insn
&& new);
2645 validate_change (insn
, xloc
, new, 1);
2649 /* Canonicalize an expression:
2650 replace each register reference inside it
2651 with the "oldest" equivalent register.
2653 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2654 after we make our substitution. The calls are made with IN_GROUP nonzero
2655 so apply_change_group must be called upon the outermost return from this
2656 function (unless INSN is zero). The result of apply_change_group can
2657 generally be discarded since the changes we are making are optional. */
2660 canon_reg (rtx x
, rtx insn
)
2669 code
= GET_CODE (x
);
2689 struct qty_table_elem
*ent
;
2691 /* Never replace a hard reg, because hard regs can appear
2692 in more than one machine mode, and we must preserve the mode
2693 of each occurrence. Also, some hard regs appear in
2694 MEMs that are shared and mustn't be altered. Don't try to
2695 replace any reg that maps to a reg of class NO_REGS. */
2696 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2697 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2700 q
= REG_QTY (REGNO (x
));
2701 ent
= &qty_table
[q
];
2702 first
= ent
->first_reg
;
2703 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2704 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2705 : gen_rtx_REG (ent
->mode
, first
));
2712 fmt
= GET_RTX_FORMAT (code
);
2713 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2718 validate_canon_reg (&XEXP (x
, i
), insn
);
2719 else if (fmt
[i
] == 'E')
2720 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2721 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2727 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2728 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2729 what values are being compared.
2731 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2732 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2733 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2734 compared to produce cc0.
2736 The return value is the comparison operator and is either the code of
2737 A or the code corresponding to the inverse of the comparison. */
2739 static enum rtx_code
2740 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2741 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
2745 arg1
= *parg1
, arg2
= *parg2
;
2747 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2749 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2751 /* Set nonzero when we find something of interest. */
2753 int reverse_code
= 0;
2754 struct table_elt
*p
= 0;
2756 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2757 On machines with CC0, this is the only case that can occur, since
2758 fold_rtx will return the COMPARE or item being compared with zero
2761 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2764 /* If ARG1 is a comparison operator and CODE is testing for
2765 STORE_FLAG_VALUE, get the inner arguments. */
2767 else if (COMPARISON_P (arg1
))
2769 #ifdef FLOAT_STORE_FLAG_VALUE
2770 REAL_VALUE_TYPE fsfv
;
2774 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2775 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2776 #ifdef FLOAT_STORE_FLAG_VALUE
2777 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2778 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2779 REAL_VALUE_NEGATIVE (fsfv
)))
2784 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2785 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2786 #ifdef FLOAT_STORE_FLAG_VALUE
2787 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2788 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2789 REAL_VALUE_NEGATIVE (fsfv
)))
2792 x
= arg1
, reverse_code
= 1;
2795 /* ??? We could also check for
2797 (ne (and (eq (...) (const_int 1))) (const_int 0))
2799 and related forms, but let's wait until we see them occurring. */
2802 /* Look up ARG1 in the hash table and see if it has an equivalence
2803 that lets us see what is being compared. */
2804 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
2807 p
= p
->first_same_value
;
2809 /* If what we compare is already known to be constant, that is as
2811 We need to break the loop in this case, because otherwise we
2812 can have an infinite loop when looking at a reg that is known
2813 to be a constant which is the same as a comparison of a reg
2814 against zero which appears later in the insn stream, which in
2815 turn is constant and the same as the comparison of the first reg
2821 for (; p
; p
= p
->next_same_value
)
2823 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2824 #ifdef FLOAT_STORE_FLAG_VALUE
2825 REAL_VALUE_TYPE fsfv
;
2828 /* If the entry isn't valid, skip it. */
2829 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2832 if (GET_CODE (p
->exp
) == COMPARE
2833 /* Another possibility is that this machine has a compare insn
2834 that includes the comparison code. In that case, ARG1 would
2835 be equivalent to a comparison operation that would set ARG1 to
2836 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2837 ORIG_CODE is the actual comparison being done; if it is an EQ,
2838 we must reverse ORIG_CODE. On machine with a negative value
2839 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2842 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2843 && (GET_MODE_BITSIZE (inner_mode
)
2844 <= HOST_BITS_PER_WIDE_INT
)
2845 && (STORE_FLAG_VALUE
2846 & ((HOST_WIDE_INT
) 1
2847 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2848 #ifdef FLOAT_STORE_FLAG_VALUE
2850 && SCALAR_FLOAT_MODE_P (inner_mode
)
2851 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2852 REAL_VALUE_NEGATIVE (fsfv
)))
2855 && COMPARISON_P (p
->exp
)))
2860 else if ((code
== EQ
2862 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2863 && (GET_MODE_BITSIZE (inner_mode
)
2864 <= HOST_BITS_PER_WIDE_INT
)
2865 && (STORE_FLAG_VALUE
2866 & ((HOST_WIDE_INT
) 1
2867 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2868 #ifdef FLOAT_STORE_FLAG_VALUE
2870 && SCALAR_FLOAT_MODE_P (inner_mode
)
2871 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2872 REAL_VALUE_NEGATIVE (fsfv
)))
2875 && COMPARISON_P (p
->exp
))
2882 /* If this non-trapping address, e.g. fp + constant, the
2883 equivalent is a better operand since it may let us predict
2884 the value of the comparison. */
2885 else if (!rtx_addr_can_trap_p (p
->exp
))
2892 /* If we didn't find a useful equivalence for ARG1, we are done.
2893 Otherwise, set up for the next iteration. */
2897 /* If we need to reverse the comparison, make sure that that is
2898 possible -- we can't necessarily infer the value of GE from LT
2899 with floating-point operands. */
2902 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
2903 if (reversed
== UNKNOWN
)
2908 else if (COMPARISON_P (x
))
2909 code
= GET_CODE (x
);
2910 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2913 /* Return our results. Return the modes from before fold_rtx
2914 because fold_rtx might produce const_int, and then it's too late. */
2915 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2916 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2921 /* If X is a nontrivial arithmetic operation on an argument for which
2922 a constant value can be determined, return the result of operating
2923 on that value, as a constant. Otherwise, return X, possibly with
2924 one or more operands changed to a forward-propagated constant.
2926 If X is a register whose contents are known, we do NOT return
2927 those contents here; equiv_constant is called to perform that task.
2928 For SUBREGs and MEMs, we do that both here and in equiv_constant.
2930 INSN is the insn that we may be modifying. If it is 0, make a copy
2931 of X before modifying it. */
2934 fold_rtx (rtx x
, rtx insn
)
2937 enum machine_mode mode
;
2943 /* Operands of X. */
2947 /* Constant equivalents of first three operands of X;
2948 0 when no such equivalent is known. */
2953 /* The mode of the first operand of X. We need this for sign and zero
2955 enum machine_mode mode_arg0
;
2960 /* Try to perform some initial simplifications on X. */
2961 code
= GET_CODE (x
);
2966 if ((new = equiv_constant (x
)) != NULL_RTX
)
2979 /* No use simplifying an EXPR_LIST
2980 since they are used only for lists of args
2981 in a function call's REG_EQUAL note. */
2987 return prev_insn_cc0
;
2993 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2994 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
2995 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
2999 #ifdef NO_FUNCTION_CSE
3001 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3006 /* Anything else goes through the loop below. */
3011 mode
= GET_MODE (x
);
3015 mode_arg0
= VOIDmode
;
3017 /* Try folding our operands.
3018 Then see which ones have constant values known. */
3020 fmt
= GET_RTX_FORMAT (code
);
3021 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3024 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3025 enum machine_mode mode_arg
= GET_MODE (folded_arg
);
3027 switch (GET_CODE (folded_arg
))
3032 const_arg
= equiv_constant (folded_arg
);
3042 const_arg
= folded_arg
;
3047 folded_arg
= prev_insn_cc0
;
3048 mode_arg
= prev_insn_cc0_mode
;
3049 const_arg
= equiv_constant (folded_arg
);
3054 folded_arg
= fold_rtx (folded_arg
, insn
);
3055 const_arg
= equiv_constant (folded_arg
);
3059 /* For the first three operands, see if the operand
3060 is constant or equivalent to a constant. */
3064 folded_arg0
= folded_arg
;
3065 const_arg0
= const_arg
;
3066 mode_arg0
= mode_arg
;
3069 folded_arg1
= folded_arg
;
3070 const_arg1
= const_arg
;
3073 const_arg2
= const_arg
;
3077 /* Pick the least expensive of the argument and an equivalent constant
3080 && const_arg
!= folded_arg
3081 && COST_IN (const_arg
, code
) <= COST_IN (folded_arg
, code
)
3083 /* It's not safe to substitute the operand of a conversion
3084 operator with a constant, as the conversion's identity
3085 depends upon the mode of its operand. This optimization
3086 is handled by the call to simplify_unary_operation. */
3087 && (GET_RTX_CLASS (code
) != RTX_UNARY
3088 || GET_MODE (const_arg
) == mode_arg0
3089 || (code
!= ZERO_EXTEND
3090 && code
!= SIGN_EXTEND
3092 && code
!= FLOAT_TRUNCATE
3093 && code
!= FLOAT_EXTEND
3096 && code
!= UNSIGNED_FLOAT
3097 && code
!= UNSIGNED_FIX
)))
3098 folded_arg
= const_arg
;
3100 if (folded_arg
== XEXP (x
, i
))
3103 if (insn
== NULL_RTX
&& !changed
)
3106 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3111 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3112 consistent with the order in X. */
3113 if (canonicalize_change_group (insn
, x
))
3116 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3117 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3120 apply_change_group ();
3123 /* If X is an arithmetic operation, see if we can simplify it. */
3125 switch (GET_RTX_CLASS (code
))
3131 /* We can't simplify extension ops unless we know the
3133 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3134 && mode_arg0
== VOIDmode
)
3137 /* If we had a CONST, strip it off and put it back later if we
3139 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3140 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3142 new = simplify_unary_operation (code
, mode
,
3143 const_arg0
? const_arg0
: folded_arg0
,
3145 /* NEG of PLUS could be converted into MINUS, but that causes
3146 expressions of the form
3147 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3148 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3149 FIXME: those ports should be fixed. */
3150 if (new != 0 && is_const
3151 && GET_CODE (new) == PLUS
3152 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3153 || GET_CODE (XEXP (new, 0)) == LABEL_REF
)
3154 && GET_CODE (XEXP (new, 1)) == CONST_INT
)
3155 new = gen_rtx_CONST (mode
, new);
3160 case RTX_COMM_COMPARE
:
3161 /* See what items are actually being compared and set FOLDED_ARG[01]
3162 to those values and CODE to the actual comparison code. If any are
3163 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3164 do anything if both operands are already known to be constant. */
3166 /* ??? Vector mode comparisons are not supported yet. */
3167 if (VECTOR_MODE_P (mode
))
3170 if (const_arg0
== 0 || const_arg1
== 0)
3172 struct table_elt
*p0
, *p1
;
3173 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3174 enum machine_mode mode_arg1
;
3176 #ifdef FLOAT_STORE_FLAG_VALUE
3177 if (SCALAR_FLOAT_MODE_P (mode
))
3179 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3180 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3181 false_rtx
= CONST0_RTX (mode
);
3185 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3186 &mode_arg0
, &mode_arg1
);
3188 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3189 what kinds of things are being compared, so we can't do
3190 anything with this comparison. */
3192 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3195 const_arg0
= equiv_constant (folded_arg0
);
3196 const_arg1
= equiv_constant (folded_arg1
);
3198 /* If we do not now have two constants being compared, see
3199 if we can nevertheless deduce some things about the
3201 if (const_arg0
== 0 || const_arg1
== 0)
3203 if (const_arg1
!= NULL
)
3205 rtx cheapest_simplification
;
3208 struct table_elt
*p
;
3210 /* See if we can find an equivalent of folded_arg0
3211 that gets us a cheaper expression, possibly a
3212 constant through simplifications. */
3213 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3218 cheapest_simplification
= x
;
3219 cheapest_cost
= COST (x
);
3221 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3225 /* If the entry isn't valid, skip it. */
3226 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3229 /* Try to simplify using this equivalence. */
3231 = simplify_relational_operation (code
, mode
,
3236 if (simp_result
== NULL
)
3239 cost
= COST (simp_result
);
3240 if (cost
< cheapest_cost
)
3242 cheapest_cost
= cost
;
3243 cheapest_simplification
= simp_result
;
3247 /* If we have a cheaper expression now, use that
3248 and try folding it further, from the top. */
3249 if (cheapest_simplification
!= x
)
3250 return fold_rtx (copy_rtx (cheapest_simplification
),
3255 /* Some addresses are known to be nonzero. We don't know
3256 their sign, but equality comparisons are known. */
3257 if (const_arg1
== const0_rtx
3258 && nonzero_address_p (folded_arg0
))
3262 else if (code
== NE
)
3266 /* See if the two operands are the same. */
3268 if (folded_arg0
== folded_arg1
3269 || (REG_P (folded_arg0
)
3270 && REG_P (folded_arg1
)
3271 && (REG_QTY (REGNO (folded_arg0
))
3272 == REG_QTY (REGNO (folded_arg1
))))
3273 || ((p0
= lookup (folded_arg0
,
3274 SAFE_HASH (folded_arg0
, mode_arg0
),
3276 && (p1
= lookup (folded_arg1
,
3277 SAFE_HASH (folded_arg1
, mode_arg0
),
3279 && p0
->first_same_value
== p1
->first_same_value
))
3281 /* Sadly two equal NaNs are not equivalent. */
3282 if (!HONOR_NANS (mode_arg0
))
3283 return ((code
== EQ
|| code
== LE
|| code
== GE
3284 || code
== LEU
|| code
== GEU
|| code
== UNEQ
3285 || code
== UNLE
|| code
== UNGE
3287 ? true_rtx
: false_rtx
);
3288 /* Take care for the FP compares we can resolve. */
3289 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
3291 if (code
== LTGT
|| code
== LT
|| code
== GT
)
3295 /* If FOLDED_ARG0 is a register, see if the comparison we are
3296 doing now is either the same as we did before or the reverse
3297 (we only check the reverse if not floating-point). */
3298 else if (REG_P (folded_arg0
))
3300 int qty
= REG_QTY (REGNO (folded_arg0
));
3302 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3304 struct qty_table_elem
*ent
= &qty_table
[qty
];
3306 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3307 || (! FLOAT_MODE_P (mode_arg0
)
3308 && comparison_dominates_p (ent
->comparison_code
,
3309 reverse_condition (code
))))
3310 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3312 && rtx_equal_p (ent
->comparison_const
,
3314 || (REG_P (folded_arg1
)
3315 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3316 return (comparison_dominates_p (ent
->comparison_code
, code
)
3317 ? true_rtx
: false_rtx
);
3323 /* If we are comparing against zero, see if the first operand is
3324 equivalent to an IOR with a constant. If so, we may be able to
3325 determine the result of this comparison. */
3327 if (const_arg1
== const0_rtx
)
3329 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3333 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3334 && GET_CODE (inner_const
) == CONST_INT
3335 && INTVAL (inner_const
) != 0)
3337 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
3338 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
3339 && (INTVAL (inner_const
)
3340 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
3341 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3343 #ifdef FLOAT_STORE_FLAG_VALUE
3344 if (SCALAR_FLOAT_MODE_P (mode
))
3346 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3347 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3348 false_rtx
= CONST0_RTX (mode
);
3373 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
3374 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
3375 new = simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
3380 case RTX_COMM_ARITH
:
3384 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3385 with that LABEL_REF as its second operand. If so, the result is
3386 the first operand of that MINUS. This handles switches with an
3387 ADDR_DIFF_VEC table. */
3388 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3391 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3392 : lookup_as_function (folded_arg0
, MINUS
);
3394 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3395 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
3398 /* Now try for a CONST of a MINUS like the above. */
3399 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3400 : lookup_as_function (folded_arg0
, CONST
))) != 0
3401 && GET_CODE (XEXP (y
, 0)) == MINUS
3402 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3403 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
3404 return XEXP (XEXP (y
, 0), 0);
3407 /* Likewise if the operands are in the other order. */
3408 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3411 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3412 : lookup_as_function (folded_arg1
, MINUS
);
3414 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3415 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
3418 /* Now try for a CONST of a MINUS like the above. */
3419 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3420 : lookup_as_function (folded_arg1
, CONST
))) != 0
3421 && GET_CODE (XEXP (y
, 0)) == MINUS
3422 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3423 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
3424 return XEXP (XEXP (y
, 0), 0);
3427 /* If second operand is a register equivalent to a negative
3428 CONST_INT, see if we can find a register equivalent to the
3429 positive constant. Make a MINUS if so. Don't do this for
3430 a non-negative constant since we might then alternate between
3431 choosing positive and negative constants. Having the positive
3432 constant previously-used is the more common case. Be sure
3433 the resulting constant is non-negative; if const_arg1 were
3434 the smallest negative number this would overflow: depending
3435 on the mode, this would either just be the same value (and
3436 hence not save anything) or be incorrect. */
3437 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
3438 && INTVAL (const_arg1
) < 0
3439 /* This used to test
3441 -INTVAL (const_arg1) >= 0
3443 But The Sun V5.0 compilers mis-compiled that test. So
3444 instead we test for the problematic value in a more direct
3445 manner and hope the Sun compilers get it correct. */
3446 && INTVAL (const_arg1
) !=
3447 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
3448 && REG_P (folded_arg1
))
3450 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3452 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3455 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3457 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3458 canon_reg (p
->exp
, NULL_RTX
));
3463 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3464 If so, produce (PLUS Z C2-C). */
3465 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
3467 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3468 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
3469 return fold_rtx (plus_constant (copy_rtx (y
),
3470 -INTVAL (const_arg1
)),
3477 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3478 case IOR
: case AND
: case XOR
:
3480 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3481 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3482 is known to be of similar form, we may be able to replace the
3483 operation with a combined operation. This may eliminate the
3484 intermediate operation if every use is simplified in this way.
3485 Note that the similar optimization done by combine.c only works
3486 if the intermediate operation's result has only one reference. */
3488 if (REG_P (folded_arg0
)
3489 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
3492 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3493 rtx y
, inner_const
, new_const
;
3494 enum rtx_code associate_code
;
3497 && (INTVAL (const_arg1
) >= GET_MODE_BITSIZE (mode
)
3498 || INTVAL (const_arg1
) < 0))
3500 if (SHIFT_COUNT_TRUNCATED
)
3501 const_arg1
= GEN_INT (INTVAL (const_arg1
)
3502 & (GET_MODE_BITSIZE (mode
) - 1));
3507 y
= lookup_as_function (folded_arg0
, code
);
3511 /* If we have compiled a statement like
3512 "if (x == (x & mask1))", and now are looking at
3513 "x & mask2", we will have a case where the first operand
3514 of Y is the same as our first operand. Unless we detect
3515 this case, an infinite loop will result. */
3516 if (XEXP (y
, 0) == folded_arg0
)
3519 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3520 if (!inner_const
|| GET_CODE (inner_const
) != CONST_INT
)
3523 /* Don't associate these operations if they are a PLUS with the
3524 same constant and it is a power of two. These might be doable
3525 with a pre- or post-increment. Similarly for two subtracts of
3526 identical powers of two with post decrement. */
3528 if (code
== PLUS
&& const_arg1
== inner_const
3529 && ((HAVE_PRE_INCREMENT
3530 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3531 || (HAVE_POST_INCREMENT
3532 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3533 || (HAVE_PRE_DECREMENT
3534 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
3535 || (HAVE_POST_DECREMENT
3536 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
3540 && (INTVAL (inner_const
) >= GET_MODE_BITSIZE (mode
)
3541 || INTVAL (inner_const
) < 0))
3543 if (SHIFT_COUNT_TRUNCATED
)
3544 inner_const
= GEN_INT (INTVAL (inner_const
)
3545 & (GET_MODE_BITSIZE (mode
) - 1));
3550 /* Compute the code used to compose the constants. For example,
3551 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3553 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3555 new_const
= simplify_binary_operation (associate_code
, mode
,
3556 const_arg1
, inner_const
);
3561 /* If we are associating shift operations, don't let this
3562 produce a shift of the size of the object or larger.
3563 This could occur when we follow a sign-extend by a right
3564 shift on a machine that does a sign-extend as a pair
3568 && GET_CODE (new_const
) == CONST_INT
3569 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
3571 /* As an exception, we can turn an ASHIFTRT of this
3572 form into a shift of the number of bits - 1. */
3573 if (code
== ASHIFTRT
)
3574 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
3575 else if (!side_effects_p (XEXP (y
, 0)))
3576 return CONST0_RTX (mode
);
3581 y
= copy_rtx (XEXP (y
, 0));
3583 /* If Y contains our first operand (the most common way this
3584 can happen is if Y is a MEM), we would do into an infinite
3585 loop if we tried to fold it. So don't in that case. */
3587 if (! reg_mentioned_p (folded_arg0
, y
))
3588 y
= fold_rtx (y
, insn
);
3590 return simplify_gen_binary (code
, mode
, y
, new_const
);
3594 case DIV
: case UDIV
:
3595 /* ??? The associative optimization performed immediately above is
3596 also possible for DIV and UDIV using associate_code of MULT.
3597 However, we would need extra code to verify that the
3598 multiplication does not overflow, that is, there is no overflow
3599 in the calculation of new_const. */
3606 new = simplify_binary_operation (code
, mode
,
3607 const_arg0
? const_arg0
: folded_arg0
,
3608 const_arg1
? const_arg1
: folded_arg1
);
3612 /* (lo_sum (high X) X) is simply X. */
3613 if (code
== LO_SUM
&& const_arg0
!= 0
3614 && GET_CODE (const_arg0
) == HIGH
3615 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3620 case RTX_BITFIELD_OPS
:
3621 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
3622 const_arg0
? const_arg0
: folded_arg0
,
3623 const_arg1
? const_arg1
: folded_arg1
,
3624 const_arg2
? const_arg2
: XEXP (x
, 2));
3631 return new ? new : x
;
3634 /* Return a constant value currently equivalent to X.
3635 Return 0 if we don't know one. */
3638 equiv_constant (rtx x
)
3641 && REGNO_QTY_VALID_P (REGNO (x
)))
3643 int x_q
= REG_QTY (REGNO (x
));
3644 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3646 if (x_ent
->const_rtx
)
3647 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3650 if (x
== 0 || CONSTANT_P (x
))
3653 if (GET_CODE (x
) == SUBREG
)
3657 /* See if we previously assigned a constant value to this SUBREG. */
3658 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3659 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0
3660 || (new = lookup_as_function (x
, CONST_FIXED
)) != 0)
3663 if (REG_P (SUBREG_REG (x
))
3664 && (new = equiv_constant (SUBREG_REG (x
))) != 0)
3665 return simplify_subreg (GET_MODE (x
), SUBREG_REG (x
),
3666 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3671 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3672 the hash table in case its value was seen before. */
3676 struct table_elt
*elt
;
3678 x
= avoid_constant_pool_reference (x
);
3682 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3686 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3687 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3694 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3697 In certain cases, this can cause us to add an equivalence. For example,
3698 if we are following the taken case of
3700 we can add the fact that `i' and '2' are now equivalent.
3702 In any case, we can record that this comparison was passed. If the same
3703 comparison is seen later, we will know its value. */
3706 record_jump_equiv (rtx insn
, bool taken
)
3708 int cond_known_true
;
3711 enum machine_mode mode
, mode0
, mode1
;
3712 int reversed_nonequality
= 0;
3715 /* Ensure this is the right kind of insn. */
3716 gcc_assert (any_condjump_p (insn
));
3718 set
= pc_set (insn
);
3720 /* See if this jump condition is known true or false. */
3722 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3724 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3726 /* Get the type of comparison being done and the operands being compared.
3727 If we had to reverse a non-equality condition, record that fact so we
3728 know that it isn't valid for floating-point. */
3729 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3730 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3731 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3733 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3734 if (! cond_known_true
)
3736 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3738 /* Don't remember if we can't find the inverse. */
3739 if (code
== UNKNOWN
)
3743 /* The mode is the mode of the non-constant. */
3745 if (mode1
!= VOIDmode
)
3748 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3751 /* Yet another form of subreg creation. In this case, we want something in
3752 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3755 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
3757 enum machine_mode op_mode
= GET_MODE (op
);
3758 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3760 return lowpart_subreg (mode
, op
, op_mode
);
3763 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3764 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3765 Make any useful entries we can with that information. Called from
3766 above function and called recursively. */
3769 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
3770 rtx op1
, int reversed_nonequality
)
3772 unsigned op0_hash
, op1_hash
;
3773 int op0_in_memory
, op1_in_memory
;
3774 struct table_elt
*op0_elt
, *op1_elt
;
3776 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3777 we know that they are also equal in the smaller mode (this is also
3778 true for all smaller modes whether or not there is a SUBREG, but
3779 is not worth testing for with no SUBREG). */
3781 /* Note that GET_MODE (op0) may not equal MODE. */
3782 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
3783 && (GET_MODE_SIZE (GET_MODE (op0
))
3784 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
3786 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3787 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3789 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3790 reversed_nonequality
);
3793 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
3794 && (GET_MODE_SIZE (GET_MODE (op1
))
3795 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
3797 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3798 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3800 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3801 reversed_nonequality
);
3804 /* Similarly, if this is an NE comparison, and either is a SUBREG
3805 making a smaller mode, we know the whole thing is also NE. */
3807 /* Note that GET_MODE (op0) may not equal MODE;
3808 if we test MODE instead, we can get an infinite recursion
3809 alternating between two modes each wider than MODE. */
3811 if (code
== NE
&& GET_CODE (op0
) == SUBREG
3812 && subreg_lowpart_p (op0
)
3813 && (GET_MODE_SIZE (GET_MODE (op0
))
3814 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
3816 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3817 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3819 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3820 reversed_nonequality
);
3823 if (code
== NE
&& GET_CODE (op1
) == SUBREG
3824 && subreg_lowpart_p (op1
)
3825 && (GET_MODE_SIZE (GET_MODE (op1
))
3826 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
3828 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3829 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3831 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3832 reversed_nonequality
);
3835 /* Hash both operands. */
3838 hash_arg_in_memory
= 0;
3839 op0_hash
= HASH (op0
, mode
);
3840 op0_in_memory
= hash_arg_in_memory
;
3846 hash_arg_in_memory
= 0;
3847 op1_hash
= HASH (op1
, mode
);
3848 op1_in_memory
= hash_arg_in_memory
;
3853 /* Look up both operands. */
3854 op0_elt
= lookup (op0
, op0_hash
, mode
);
3855 op1_elt
= lookup (op1
, op1_hash
, mode
);
3857 /* If both operands are already equivalent or if they are not in the
3858 table but are identical, do nothing. */
3859 if ((op0_elt
!= 0 && op1_elt
!= 0
3860 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
3861 || op0
== op1
|| rtx_equal_p (op0
, op1
))
3864 /* If we aren't setting two things equal all we can do is save this
3865 comparison. Similarly if this is floating-point. In the latter
3866 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3867 If we record the equality, we might inadvertently delete code
3868 whose intent was to change -0 to +0. */
3870 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
3872 struct qty_table_elem
*ent
;
3875 /* If we reversed a floating-point comparison, if OP0 is not a
3876 register, or if OP1 is neither a register or constant, we can't
3880 op1
= equiv_constant (op1
);
3882 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
3883 || !REG_P (op0
) || op1
== 0)
3886 /* Put OP0 in the hash table if it isn't already. This gives it a
3887 new quantity number. */
3890 if (insert_regs (op0
, NULL
, 0))
3892 rehash_using_reg (op0
);
3893 op0_hash
= HASH (op0
, mode
);
3895 /* If OP0 is contained in OP1, this changes its hash code
3896 as well. Faster to rehash than to check, except
3897 for the simple case of a constant. */
3898 if (! CONSTANT_P (op1
))
3899 op1_hash
= HASH (op1
,mode
);
3902 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
3903 op0_elt
->in_memory
= op0_in_memory
;
3906 qty
= REG_QTY (REGNO (op0
));
3907 ent
= &qty_table
[qty
];
3909 ent
->comparison_code
= code
;
3912 /* Look it up again--in case op0 and op1 are the same. */
3913 op1_elt
= lookup (op1
, op1_hash
, mode
);
3915 /* Put OP1 in the hash table so it gets a new quantity number. */
3918 if (insert_regs (op1
, NULL
, 0))
3920 rehash_using_reg (op1
);
3921 op1_hash
= HASH (op1
, mode
);
3924 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
3925 op1_elt
->in_memory
= op1_in_memory
;
3928 ent
->comparison_const
= NULL_RTX
;
3929 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
3933 ent
->comparison_const
= op1
;
3934 ent
->comparison_qty
= -1;
3940 /* If either side is still missing an equivalence, make it now,
3941 then merge the equivalences. */
3945 if (insert_regs (op0
, NULL
, 0))
3947 rehash_using_reg (op0
);
3948 op0_hash
= HASH (op0
, mode
);
3951 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
3952 op0_elt
->in_memory
= op0_in_memory
;
3957 if (insert_regs (op1
, NULL
, 0))
3959 rehash_using_reg (op1
);
3960 op1_hash
= HASH (op1
, mode
);
3963 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
3964 op1_elt
->in_memory
= op1_in_memory
;
3967 merge_equiv_classes (op0_elt
, op1_elt
);
3970 /* CSE processing for one instruction.
3971 First simplify sources and addresses of all assignments
3972 in the instruction, using previously-computed equivalents values.
3973 Then install the new sources and destinations in the table
3974 of available values.
3976 If LIBCALL_INSN is nonzero, don't record any equivalence made in
3977 the insn. It means that INSN is inside libcall block. In this
3978 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
3980 /* Data on one SET contained in the instruction. */
3984 /* The SET rtx itself. */
3986 /* The SET_SRC of the rtx (the original value, if it is changing). */
3988 /* The hash-table element for the SET_SRC of the SET. */
3989 struct table_elt
*src_elt
;
3990 /* Hash value for the SET_SRC. */
3992 /* Hash value for the SET_DEST. */
3994 /* The SET_DEST, with SUBREG, etc., stripped. */
3996 /* Nonzero if the SET_SRC is in memory. */
3998 /* Nonzero if the SET_SRC contains something
3999 whose value cannot be predicted and understood. */
4001 /* Original machine mode, in case it becomes a CONST_INT.
4002 The size of this field should match the size of the mode
4003 field of struct rtx_def (see rtl.h). */
4004 ENUM_BITFIELD(machine_mode
) mode
: 8;
4005 /* A constant equivalent for SET_SRC, if any. */
4007 /* Original SET_SRC value used for libcall notes. */
4009 /* Hash value of constant equivalent for SET_SRC. */
4010 unsigned src_const_hash
;
4011 /* Table entry for constant equivalent for SET_SRC, if any. */
4012 struct table_elt
*src_const_elt
;
4013 /* Table entry for the destination address. */
4014 struct table_elt
*dest_addr_elt
;
4018 cse_insn (rtx insn
, rtx libcall_insn
)
4020 rtx x
= PATTERN (insn
);
4026 struct table_elt
*src_eqv_elt
= 0;
4027 int src_eqv_volatile
= 0;
4028 int src_eqv_in_memory
= 0;
4029 unsigned src_eqv_hash
= 0;
4031 struct set
*sets
= (struct set
*) 0;
4035 /* Records what this insn does to set CC0. */
4037 this_insn_cc0_mode
= VOIDmode
;
4040 /* Find all the SETs and CLOBBERs in this instruction.
4041 Record all the SETs in the array `set' and count them.
4042 Also determine whether there is a CLOBBER that invalidates
4043 all memory references, or all references at varying addresses. */
4047 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4049 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4050 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4051 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4055 if (GET_CODE (x
) == SET
)
4057 sets
= alloca (sizeof (struct set
));
4060 /* Ignore SETs that are unconditional jumps.
4061 They never need cse processing, so this does not hurt.
4062 The reason is not efficiency but rather
4063 so that we can test at the end for instructions
4064 that have been simplified to unconditional jumps
4065 and not be misled by unchanged instructions
4066 that were unconditional jumps to begin with. */
4067 if (SET_DEST (x
) == pc_rtx
4068 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4071 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4072 The hard function value register is used only once, to copy to
4073 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4074 Ensure we invalidate the destination register. On the 80386 no
4075 other code would invalidate it since it is a fixed_reg.
4076 We need not check the return of apply_change_group; see canon_reg. */
4078 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4080 canon_reg (SET_SRC (x
), insn
);
4081 apply_change_group ();
4082 fold_rtx (SET_SRC (x
), insn
);
4083 invalidate (SET_DEST (x
), VOIDmode
);
4088 else if (GET_CODE (x
) == PARALLEL
)
4090 int lim
= XVECLEN (x
, 0);
4092 sets
= alloca (lim
* sizeof (struct set
));
4094 /* Find all regs explicitly clobbered in this insn,
4095 and ensure they are not replaced with any other regs
4096 elsewhere in this insn.
4097 When a reg that is clobbered is also used for input,
4098 we should presume that that is for a reason,
4099 and we should not substitute some other register
4100 which is not supposed to be clobbered.
4101 Therefore, this loop cannot be merged into the one below
4102 because a CALL may precede a CLOBBER and refer to the
4103 value clobbered. We must not let a canonicalization do
4104 anything in that case. */
4105 for (i
= 0; i
< lim
; i
++)
4107 rtx y
= XVECEXP (x
, 0, i
);
4108 if (GET_CODE (y
) == CLOBBER
)
4110 rtx clobbered
= XEXP (y
, 0);
4112 if (REG_P (clobbered
)
4113 || GET_CODE (clobbered
) == SUBREG
)
4114 invalidate (clobbered
, VOIDmode
);
4115 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4116 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4117 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4121 for (i
= 0; i
< lim
; i
++)
4123 rtx y
= XVECEXP (x
, 0, i
);
4124 if (GET_CODE (y
) == SET
)
4126 /* As above, we ignore unconditional jumps and call-insns and
4127 ignore the result of apply_change_group. */
4128 if (GET_CODE (SET_SRC (y
)) == CALL
)
4130 canon_reg (SET_SRC (y
), insn
);
4131 apply_change_group ();
4132 fold_rtx (SET_SRC (y
), insn
);
4133 invalidate (SET_DEST (y
), VOIDmode
);
4135 else if (SET_DEST (y
) == pc_rtx
4136 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4139 sets
[n_sets
++].rtl
= y
;
4141 else if (GET_CODE (y
) == CLOBBER
)
4143 /* If we clobber memory, canon the address.
4144 This does nothing when a register is clobbered
4145 because we have already invalidated the reg. */
4146 if (MEM_P (XEXP (y
, 0)))
4147 canon_reg (XEXP (y
, 0), insn
);
4149 else if (GET_CODE (y
) == USE
4150 && ! (REG_P (XEXP (y
, 0))
4151 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4152 canon_reg (y
, insn
);
4153 else if (GET_CODE (y
) == CALL
)
4155 /* The result of apply_change_group can be ignored; see
4157 canon_reg (y
, insn
);
4158 apply_change_group ();
4163 else if (GET_CODE (x
) == CLOBBER
)
4165 if (MEM_P (XEXP (x
, 0)))
4166 canon_reg (XEXP (x
, 0), insn
);
4169 /* Canonicalize a USE of a pseudo register or memory location. */
4170 else if (GET_CODE (x
) == USE
4171 && ! (REG_P (XEXP (x
, 0))
4172 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4173 canon_reg (XEXP (x
, 0), insn
);
4174 else if (GET_CODE (x
) == CALL
)
4176 /* The result of apply_change_group can be ignored; see canon_reg. */
4177 canon_reg (x
, insn
);
4178 apply_change_group ();
4182 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4183 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4184 is handled specially for this case, and if it isn't set, then there will
4185 be no equivalence for the destination. */
4186 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4187 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4188 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4189 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4191 /* The result of apply_change_group can be ignored; see canon_reg. */
4192 canon_reg (XEXP (tem
, 0), insn
);
4193 apply_change_group ();
4194 src_eqv
= fold_rtx (XEXP (tem
, 0), insn
);
4195 XEXP (tem
, 0) = copy_rtx (src_eqv
);
4196 df_notes_rescan (insn
);
4199 /* Canonicalize sources and addresses of destinations.
4200 We do this in a separate pass to avoid problems when a MATCH_DUP is
4201 present in the insn pattern. In that case, we want to ensure that
4202 we don't break the duplicate nature of the pattern. So we will replace
4203 both operands at the same time. Otherwise, we would fail to find an
4204 equivalent substitution in the loop calling validate_change below.
4206 We used to suppress canonicalization of DEST if it appears in SRC,
4207 but we don't do this any more. */
4209 for (i
= 0; i
< n_sets
; i
++)
4211 rtx dest
= SET_DEST (sets
[i
].rtl
);
4212 rtx src
= SET_SRC (sets
[i
].rtl
);
4213 rtx
new = canon_reg (src
, insn
);
4215 sets
[i
].orig_src
= src
;
4216 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4218 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4220 validate_change (insn
, &XEXP (dest
, 1),
4221 canon_reg (XEXP (dest
, 1), insn
), 1);
4222 validate_change (insn
, &XEXP (dest
, 2),
4223 canon_reg (XEXP (dest
, 2), insn
), 1);
4226 while (GET_CODE (dest
) == SUBREG
4227 || GET_CODE (dest
) == ZERO_EXTRACT
4228 || GET_CODE (dest
) == STRICT_LOW_PART
)
4229 dest
= XEXP (dest
, 0);
4232 canon_reg (dest
, insn
);
4235 /* Now that we have done all the replacements, we can apply the change
4236 group and see if they all work. Note that this will cause some
4237 canonicalizations that would have worked individually not to be applied
4238 because some other canonicalization didn't work, but this should not
4241 The result of apply_change_group can be ignored; see canon_reg. */
4243 apply_change_group ();
4245 /* Set sets[i].src_elt to the class each source belongs to.
4246 Detect assignments from or to volatile things
4247 and set set[i] to zero so they will be ignored
4248 in the rest of this function.
4250 Nothing in this loop changes the hash table or the register chains. */
4252 for (i
= 0; i
< n_sets
; i
++)
4256 struct table_elt
*elt
= 0, *p
;
4257 enum machine_mode mode
;
4260 rtx src_related
= 0;
4261 struct table_elt
*src_const_elt
= 0;
4262 int src_cost
= MAX_COST
;
4263 int src_eqv_cost
= MAX_COST
;
4264 int src_folded_cost
= MAX_COST
;
4265 int src_related_cost
= MAX_COST
;
4266 int src_elt_cost
= MAX_COST
;
4267 int src_regcost
= MAX_COST
;
4268 int src_eqv_regcost
= MAX_COST
;
4269 int src_folded_regcost
= MAX_COST
;
4270 int src_related_regcost
= MAX_COST
;
4271 int src_elt_regcost
= MAX_COST
;
4272 /* Set nonzero if we need to call force_const_mem on with the
4273 contents of src_folded before using it. */
4274 int src_folded_force_flag
= 0;
4276 dest
= SET_DEST (sets
[i
].rtl
);
4277 src
= SET_SRC (sets
[i
].rtl
);
4279 /* If SRC is a constant that has no machine mode,
4280 hash it with the destination's machine mode.
4281 This way we can keep different modes separate. */
4283 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4284 sets
[i
].mode
= mode
;
4288 enum machine_mode eqvmode
= mode
;
4289 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4290 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4292 hash_arg_in_memory
= 0;
4293 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4295 /* Find the equivalence class for the equivalent expression. */
4298 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4300 src_eqv_volatile
= do_not_record
;
4301 src_eqv_in_memory
= hash_arg_in_memory
;
4304 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4305 value of the INNER register, not the destination. So it is not
4306 a valid substitution for the source. But save it for later. */
4307 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4310 src_eqv_here
= src_eqv
;
4312 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4313 simplified result, which may not necessarily be valid. */
4314 src_folded
= fold_rtx (src
, insn
);
4317 /* ??? This caused bad code to be generated for the m68k port with -O2.
4318 Suppose src is (CONST_INT -1), and that after truncation src_folded
4319 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4320 At the end we will add src and src_const to the same equivalence
4321 class. We now have 3 and -1 on the same equivalence class. This
4322 causes later instructions to be mis-optimized. */
4323 /* If storing a constant in a bitfield, pre-truncate the constant
4324 so we will be able to record it later. */
4325 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4327 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4329 if (GET_CODE (src
) == CONST_INT
4330 && GET_CODE (width
) == CONST_INT
4331 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4332 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4334 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4335 << INTVAL (width
)) - 1));
4339 /* Compute SRC's hash code, and also notice if it
4340 should not be recorded at all. In that case,
4341 prevent any further processing of this assignment. */
4343 hash_arg_in_memory
= 0;
4346 sets
[i
].src_hash
= HASH (src
, mode
);
4347 sets
[i
].src_volatile
= do_not_record
;
4348 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4350 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4351 a pseudo, do not record SRC. Using SRC as a replacement for
4352 anything else will be incorrect in that situation. Note that
4353 this usually occurs only for stack slots, in which case all the
4354 RTL would be referring to SRC, so we don't lose any optimization
4355 opportunities by not having SRC in the hash table. */
4358 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4360 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4361 sets
[i
].src_volatile
= 1;
4364 /* It is no longer clear why we used to do this, but it doesn't
4365 appear to still be needed. So let's try without it since this
4366 code hurts cse'ing widened ops. */
4367 /* If source is a paradoxical subreg (such as QI treated as an SI),
4368 treat it as volatile. It may do the work of an SI in one context
4369 where the extra bits are not being used, but cannot replace an SI
4371 if (GET_CODE (src
) == SUBREG
4372 && (GET_MODE_SIZE (GET_MODE (src
))
4373 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
4374 sets
[i
].src_volatile
= 1;
4377 /* Locate all possible equivalent forms for SRC. Try to replace
4378 SRC in the insn with each cheaper equivalent.
4380 We have the following types of equivalents: SRC itself, a folded
4381 version, a value given in a REG_EQUAL note, or a value related
4384 Each of these equivalents may be part of an additional class
4385 of equivalents (if more than one is in the table, they must be in
4386 the same class; we check for this).
4388 If the source is volatile, we don't do any table lookups.
4390 We note any constant equivalent for possible later use in a
4393 if (!sets
[i
].src_volatile
)
4394 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4396 sets
[i
].src_elt
= elt
;
4398 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4400 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4402 /* The REG_EQUAL is indicating that two formerly distinct
4403 classes are now equivalent. So merge them. */
4404 merge_equiv_classes (elt
, src_eqv_elt
);
4405 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4406 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4412 else if (src_eqv_elt
)
4415 /* Try to find a constant somewhere and record it in `src_const'.
4416 Record its table element, if any, in `src_const_elt'. Look in
4417 any known equivalences first. (If the constant is not in the
4418 table, also set `sets[i].src_const_hash'). */
4420 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4424 src_const_elt
= elt
;
4429 && (CONSTANT_P (src_folded
)
4430 /* Consider (minus (label_ref L1) (label_ref L2)) as
4431 "constant" here so we will record it. This allows us
4432 to fold switch statements when an ADDR_DIFF_VEC is used. */
4433 || (GET_CODE (src_folded
) == MINUS
4434 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4435 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4436 src_const
= src_folded
, src_const_elt
= elt
;
4437 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4438 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4440 /* If we don't know if the constant is in the table, get its
4441 hash code and look it up. */
4442 if (src_const
&& src_const_elt
== 0)
4444 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4445 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4448 sets
[i
].src_const
= src_const
;
4449 sets
[i
].src_const_elt
= src_const_elt
;
4451 /* If the constant and our source are both in the table, mark them as
4452 equivalent. Otherwise, if a constant is in the table but the source
4453 isn't, set ELT to it. */
4454 if (src_const_elt
&& elt
4455 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4456 merge_equiv_classes (elt
, src_const_elt
);
4457 else if (src_const_elt
&& elt
== 0)
4458 elt
= src_const_elt
;
4460 /* See if there is a register linearly related to a constant
4461 equivalent of SRC. */
4463 && (GET_CODE (src_const
) == CONST
4464 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4466 src_related
= use_related_value (src_const
, src_const_elt
);
4469 struct table_elt
*src_related_elt
4470 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4471 if (src_related_elt
&& elt
)
4473 if (elt
->first_same_value
4474 != src_related_elt
->first_same_value
)
4475 /* This can occur when we previously saw a CONST
4476 involving a SYMBOL_REF and then see the SYMBOL_REF
4477 twice. Merge the involved classes. */
4478 merge_equiv_classes (elt
, src_related_elt
);
4481 src_related_elt
= 0;
4483 else if (src_related_elt
&& elt
== 0)
4484 elt
= src_related_elt
;
4488 /* See if we have a CONST_INT that is already in a register in a
4491 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
4492 && GET_MODE_CLASS (mode
) == MODE_INT
4493 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
4495 enum machine_mode wider_mode
;
4497 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
4498 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
4499 && src_related
== 0;
4500 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4502 struct table_elt
*const_elt
4503 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4508 for (const_elt
= const_elt
->first_same_value
;
4509 const_elt
; const_elt
= const_elt
->next_same_value
)
4510 if (REG_P (const_elt
->exp
))
4512 src_related
= gen_lowpart (mode
, const_elt
->exp
);
4518 /* Another possibility is that we have an AND with a constant in
4519 a mode narrower than a word. If so, it might have been generated
4520 as part of an "if" which would narrow the AND. If we already
4521 have done the AND in a wider mode, we can use a SUBREG of that
4524 if (flag_expensive_optimizations
&& ! src_related
4525 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
4526 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4528 enum machine_mode tmode
;
4529 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4531 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4532 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4533 tmode
= GET_MODE_WIDER_MODE (tmode
))
4535 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4536 struct table_elt
*larger_elt
;
4540 PUT_MODE (new_and
, tmode
);
4541 XEXP (new_and
, 0) = inner
;
4542 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4543 if (larger_elt
== 0)
4546 for (larger_elt
= larger_elt
->first_same_value
;
4547 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4548 if (REG_P (larger_elt
->exp
))
4551 = gen_lowpart (mode
, larger_elt
->exp
);
4561 #ifdef LOAD_EXTEND_OP
4562 /* See if a MEM has already been loaded with a widening operation;
4563 if it has, we can use a subreg of that. Many CISC machines
4564 also have such operations, but this is only likely to be
4565 beneficial on these machines. */
4567 if (flag_expensive_optimizations
&& src_related
== 0
4568 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4569 && GET_MODE_CLASS (mode
) == MODE_INT
4570 && MEM_P (src
) && ! do_not_record
4571 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
4573 struct rtx_def memory_extend_buf
;
4574 rtx memory_extend_rtx
= &memory_extend_buf
;
4575 enum machine_mode tmode
;
4577 /* Set what we are trying to extend and the operation it might
4578 have been extended with. */
4579 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
4580 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
4581 XEXP (memory_extend_rtx
, 0) = src
;
4583 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4584 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4585 tmode
= GET_MODE_WIDER_MODE (tmode
))
4587 struct table_elt
*larger_elt
;
4589 PUT_MODE (memory_extend_rtx
, tmode
);
4590 larger_elt
= lookup (memory_extend_rtx
,
4591 HASH (memory_extend_rtx
, tmode
), tmode
);
4592 if (larger_elt
== 0)
4595 for (larger_elt
= larger_elt
->first_same_value
;
4596 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4597 if (REG_P (larger_elt
->exp
))
4599 src_related
= gen_lowpart (mode
, larger_elt
->exp
);
4607 #endif /* LOAD_EXTEND_OP */
4609 if (src
== src_folded
)
4612 /* At this point, ELT, if nonzero, points to a class of expressions
4613 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4614 and SRC_RELATED, if nonzero, each contain additional equivalent
4615 expressions. Prune these latter expressions by deleting expressions
4616 already in the equivalence class.
4618 Check for an equivalent identical to the destination. If found,
4619 this is the preferred equivalent since it will likely lead to
4620 elimination of the insn. Indicate this by placing it in
4624 elt
= elt
->first_same_value
;
4625 for (p
= elt
; p
; p
= p
->next_same_value
)
4627 enum rtx_code code
= GET_CODE (p
->exp
);
4629 /* If the expression is not valid, ignore it. Then we do not
4630 have to check for validity below. In most cases, we can use
4631 `rtx_equal_p', since canonicalization has already been done. */
4632 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
4635 /* Also skip paradoxical subregs, unless that's what we're
4638 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
4639 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
4641 && GET_CODE (src
) == SUBREG
4642 && GET_MODE (src
) == GET_MODE (p
->exp
)
4643 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
4644 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
4647 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
4649 else if (src_folded
&& GET_CODE (src_folded
) == code
4650 && rtx_equal_p (src_folded
, p
->exp
))
4652 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
4653 && rtx_equal_p (src_eqv_here
, p
->exp
))
4655 else if (src_related
&& GET_CODE (src_related
) == code
4656 && rtx_equal_p (src_related
, p
->exp
))
4659 /* This is the same as the destination of the insns, we want
4660 to prefer it. Copy it to src_related. The code below will
4661 then give it a negative cost. */
4662 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
4666 /* Find the cheapest valid equivalent, trying all the available
4667 possibilities. Prefer items not in the hash table to ones
4668 that are when they are equal cost. Note that we can never
4669 worsen an insn as the current contents will also succeed.
4670 If we find an equivalent identical to the destination, use it as best,
4671 since this insn will probably be eliminated in that case. */
4674 if (rtx_equal_p (src
, dest
))
4675 src_cost
= src_regcost
= -1;
4678 src_cost
= COST (src
);
4679 src_regcost
= approx_reg_cost (src
);
4685 if (rtx_equal_p (src_eqv_here
, dest
))
4686 src_eqv_cost
= src_eqv_regcost
= -1;
4689 src_eqv_cost
= COST (src_eqv_here
);
4690 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
4696 if (rtx_equal_p (src_folded
, dest
))
4697 src_folded_cost
= src_folded_regcost
= -1;
4700 src_folded_cost
= COST (src_folded
);
4701 src_folded_regcost
= approx_reg_cost (src_folded
);
4707 if (rtx_equal_p (src_related
, dest
))
4708 src_related_cost
= src_related_regcost
= -1;
4711 src_related_cost
= COST (src_related
);
4712 src_related_regcost
= approx_reg_cost (src_related
);
4716 /* If this was an indirect jump insn, a known label will really be
4717 cheaper even though it looks more expensive. */
4718 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
4719 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
4721 /* Terminate loop when replacement made. This must terminate since
4722 the current contents will be tested and will always be valid. */
4727 /* Skip invalid entries. */
4728 while (elt
&& !REG_P (elt
->exp
)
4729 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
4730 elt
= elt
->next_same_value
;
4732 /* A paradoxical subreg would be bad here: it'll be the right
4733 size, but later may be adjusted so that the upper bits aren't
4734 what we want. So reject it. */
4736 && GET_CODE (elt
->exp
) == SUBREG
4737 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
4738 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
4739 /* It is okay, though, if the rtx we're trying to match
4740 will ignore any of the bits we can't predict. */
4742 && GET_CODE (src
) == SUBREG
4743 && GET_MODE (src
) == GET_MODE (elt
->exp
)
4744 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
4745 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
4747 elt
= elt
->next_same_value
;
4753 src_elt_cost
= elt
->cost
;
4754 src_elt_regcost
= elt
->regcost
;
4757 /* Find cheapest and skip it for the next time. For items
4758 of equal cost, use this order:
4759 src_folded, src, src_eqv, src_related and hash table entry. */
4761 && preferable (src_folded_cost
, src_folded_regcost
,
4762 src_cost
, src_regcost
) <= 0
4763 && preferable (src_folded_cost
, src_folded_regcost
,
4764 src_eqv_cost
, src_eqv_regcost
) <= 0
4765 && preferable (src_folded_cost
, src_folded_regcost
,
4766 src_related_cost
, src_related_regcost
) <= 0
4767 && preferable (src_folded_cost
, src_folded_regcost
,
4768 src_elt_cost
, src_elt_regcost
) <= 0)
4770 trial
= src_folded
, src_folded_cost
= MAX_COST
;
4771 if (src_folded_force_flag
)
4773 rtx forced
= force_const_mem (mode
, trial
);
4779 && preferable (src_cost
, src_regcost
,
4780 src_eqv_cost
, src_eqv_regcost
) <= 0
4781 && preferable (src_cost
, src_regcost
,
4782 src_related_cost
, src_related_regcost
) <= 0
4783 && preferable (src_cost
, src_regcost
,
4784 src_elt_cost
, src_elt_regcost
) <= 0)
4785 trial
= src
, src_cost
= MAX_COST
;
4786 else if (src_eqv_here
4787 && preferable (src_eqv_cost
, src_eqv_regcost
,
4788 src_related_cost
, src_related_regcost
) <= 0
4789 && preferable (src_eqv_cost
, src_eqv_regcost
,
4790 src_elt_cost
, src_elt_regcost
) <= 0)
4791 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
4792 else if (src_related
4793 && preferable (src_related_cost
, src_related_regcost
,
4794 src_elt_cost
, src_elt_regcost
) <= 0)
4795 trial
= src_related
, src_related_cost
= MAX_COST
;
4799 elt
= elt
->next_same_value
;
4800 src_elt_cost
= MAX_COST
;
4803 /* We don't normally have an insn matching (set (pc) (pc)), so
4804 check for this separately here. We will delete such an
4807 For other cases such as a table jump or conditional jump
4808 where we know the ultimate target, go ahead and replace the
4809 operand. While that may not make a valid insn, we will
4810 reemit the jump below (and also insert any necessary
4812 if (n_sets
== 1 && dest
== pc_rtx
4814 || (GET_CODE (trial
) == LABEL_REF
4815 && ! condjump_p (insn
))))
4817 /* Don't substitute non-local labels, this confuses CFG. */
4818 if (GET_CODE (trial
) == LABEL_REF
4819 && LABEL_REF_NONLOCAL_P (trial
))
4822 SET_SRC (sets
[i
].rtl
) = trial
;
4823 cse_jumps_altered
= 1;
4827 /* Reject certain invalid forms of CONST that we create. */
4828 else if (CONSTANT_P (trial
)
4829 && GET_CODE (trial
) == CONST
4830 /* Reject cases that will cause decode_rtx_const to
4831 die. On the alpha when simplifying a switch, we
4832 get (const (truncate (minus (label_ref)
4834 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
4835 /* Likewise on IA-64, except without the
4837 || (GET_CODE (XEXP (trial
, 0)) == MINUS
4838 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
4839 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
4840 /* Do nothing for this case. */
4843 /* Look for a substitution that makes a valid insn. */
4844 else if (validate_unshare_change
4845 (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
4847 rtx
new = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
4849 /* If we just made a substitution inside a libcall, then we
4850 need to make the same substitution in any notes attached
4851 to the RETVAL insn. */
4853 && (REG_P (sets
[i
].orig_src
)
4854 || GET_CODE (sets
[i
].orig_src
) == SUBREG
4855 || MEM_P (sets
[i
].orig_src
)))
4857 rtx note
= find_reg_equal_equiv_note (libcall_insn
);
4859 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0),
4862 df_notes_rescan (libcall_insn
);
4865 /* The result of apply_change_group can be ignored; see
4868 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4869 apply_change_group ();
4874 /* If we previously found constant pool entries for
4875 constants and this is a constant, try making a
4876 pool entry. Put it in src_folded unless we already have done
4877 this since that is where it likely came from. */
4879 else if (constant_pool_entries_cost
4880 && CONSTANT_P (trial
)
4882 || (!MEM_P (src_folded
)
4883 && ! src_folded_force_flag
))
4884 && GET_MODE_CLASS (mode
) != MODE_CC
4885 && mode
!= VOIDmode
)
4887 src_folded_force_flag
= 1;
4889 src_folded_cost
= constant_pool_entries_cost
;
4890 src_folded_regcost
= constant_pool_entries_regcost
;
4894 src
= SET_SRC (sets
[i
].rtl
);
4896 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
4897 However, there is an important exception: If both are registers
4898 that are not the head of their equivalence class, replace SET_SRC
4899 with the head of the class. If we do not do this, we will have
4900 both registers live over a portion of the basic block. This way,
4901 their lifetimes will likely abut instead of overlapping. */
4903 && REGNO_QTY_VALID_P (REGNO (dest
)))
4905 int dest_q
= REG_QTY (REGNO (dest
));
4906 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
4908 if (dest_ent
->mode
== GET_MODE (dest
)
4909 && dest_ent
->first_reg
!= REGNO (dest
)
4910 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
4911 /* Don't do this if the original insn had a hard reg as
4912 SET_SRC or SET_DEST. */
4913 && (!REG_P (sets
[i
].src
)
4914 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
4915 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
4916 /* We can't call canon_reg here because it won't do anything if
4917 SRC is a hard register. */
4919 int src_q
= REG_QTY (REGNO (src
));
4920 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
4921 int first
= src_ent
->first_reg
;
4923 = (first
>= FIRST_PSEUDO_REGISTER
4924 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
4926 /* We must use validate-change even for this, because this
4927 might be a special no-op instruction, suitable only to
4929 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
4932 /* If we had a constant that is cheaper than what we are now
4933 setting SRC to, use that constant. We ignored it when we
4934 thought we could make this into a no-op. */
4935 if (src_const
&& COST (src_const
) < COST (src
)
4936 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
4943 /* If we made a change, recompute SRC values. */
4944 if (src
!= sets
[i
].src
)
4947 hash_arg_in_memory
= 0;
4949 sets
[i
].src_hash
= HASH (src
, mode
);
4950 sets
[i
].src_volatile
= do_not_record
;
4951 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4952 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4955 /* If this is a single SET, we are setting a register, and we have an
4956 equivalent constant, we want to add a REG_NOTE. We don't want
4957 to write a REG_EQUAL note for a constant pseudo since verifying that
4958 that pseudo hasn't been eliminated is a pain. Such a note also
4959 won't help anything.
4961 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
4962 which can be created for a reference to a compile time computable
4963 entry in a jump table. */
4965 if (n_sets
== 1 && src_const
&& REG_P (dest
)
4966 && !REG_P (src_const
)
4967 && ! (GET_CODE (src_const
) == CONST
4968 && GET_CODE (XEXP (src_const
, 0)) == MINUS
4969 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
4970 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
4972 /* We only want a REG_EQUAL note if src_const != src. */
4973 if (! rtx_equal_p (src
, src_const
))
4975 /* Make sure that the rtx is not shared. */
4976 src_const
= copy_rtx (src_const
);
4978 /* Record the actual constant value in a REG_EQUAL note,
4979 making a new one if one does not already exist. */
4980 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
4981 df_notes_rescan (insn
);
4985 /* Now deal with the destination. */
4988 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
4989 while (GET_CODE (dest
) == SUBREG
4990 || GET_CODE (dest
) == ZERO_EXTRACT
4991 || GET_CODE (dest
) == STRICT_LOW_PART
)
4992 dest
= XEXP (dest
, 0);
4994 sets
[i
].inner_dest
= dest
;
4998 #ifdef PUSH_ROUNDING
4999 /* Stack pushes invalidate the stack pointer. */
5000 rtx addr
= XEXP (dest
, 0);
5001 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5002 && XEXP (addr
, 0) == stack_pointer_rtx
)
5003 invalidate (stack_pointer_rtx
, VOIDmode
);
5005 dest
= fold_rtx (dest
, insn
);
5008 /* Compute the hash code of the destination now,
5009 before the effects of this instruction are recorded,
5010 since the register values used in the address computation
5011 are those before this instruction. */
5012 sets
[i
].dest_hash
= HASH (dest
, mode
);
5014 /* Don't enter a bit-field in the hash table
5015 because the value in it after the store
5016 may not equal what was stored, due to truncation. */
5018 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5020 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5022 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5023 && GET_CODE (width
) == CONST_INT
5024 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5025 && ! (INTVAL (src_const
)
5026 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5027 /* Exception: if the value is constant,
5028 and it won't be truncated, record it. */
5032 /* This is chosen so that the destination will be invalidated
5033 but no new value will be recorded.
5034 We must invalidate because sometimes constant
5035 values can be recorded for bitfields. */
5036 sets
[i
].src_elt
= 0;
5037 sets
[i
].src_volatile
= 1;
5043 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5045 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5047 /* One less use of the label this insn used to jump to. */
5048 delete_insn_and_edges (insn
);
5049 cse_jumps_altered
= 1;
5050 /* No more processing for this set. */
5054 /* If this SET is now setting PC to a label, we know it used to
5055 be a conditional or computed branch. */
5056 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5057 && !LABEL_REF_NONLOCAL_P (src
))
5059 /* We reemit the jump in as many cases as possible just in
5060 case the form of an unconditional jump is significantly
5061 different than a computed jump or conditional jump.
5063 If this insn has multiple sets, then reemitting the
5064 jump is nontrivial. So instead we just force rerecognition
5065 and hope for the best. */
5070 new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
5071 JUMP_LABEL (new) = XEXP (src
, 0);
5072 LABEL_NUSES (XEXP (src
, 0))++;
5074 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5075 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5078 XEXP (note
, 1) = NULL_RTX
;
5079 REG_NOTES (new) = note
;
5082 delete_insn_and_edges (insn
);
5086 INSN_CODE (insn
) = -1;
5088 /* Do not bother deleting any unreachable code,
5089 let jump/flow do that. */
5091 cse_jumps_altered
= 1;
5095 /* If destination is volatile, invalidate it and then do no further
5096 processing for this assignment. */
5098 else if (do_not_record
)
5100 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5101 invalidate (dest
, VOIDmode
);
5102 else if (MEM_P (dest
))
5103 invalidate (dest
, VOIDmode
);
5104 else if (GET_CODE (dest
) == STRICT_LOW_PART
5105 || GET_CODE (dest
) == ZERO_EXTRACT
)
5106 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5110 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5111 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5114 /* If setting CC0, record what it was set to, or a constant, if it
5115 is equivalent to a constant. If it is being set to a floating-point
5116 value, make a COMPARE with the appropriate constant of 0. If we
5117 don't do this, later code can interpret this as a test against
5118 const0_rtx, which can cause problems if we try to put it into an
5119 insn as a floating-point operand. */
5120 if (dest
== cc0_rtx
)
5122 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5123 this_insn_cc0_mode
= mode
;
5124 if (FLOAT_MODE_P (mode
))
5125 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5131 /* Now enter all non-volatile source expressions in the hash table
5132 if they are not already present.
5133 Record their equivalence classes in src_elt.
5134 This way we can insert the corresponding destinations into
5135 the same classes even if the actual sources are no longer in them
5136 (having been invalidated). */
5138 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5139 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5141 struct table_elt
*elt
;
5142 struct table_elt
*classp
= sets
[0].src_elt
;
5143 rtx dest
= SET_DEST (sets
[0].rtl
);
5144 enum machine_mode eqvmode
= GET_MODE (dest
);
5146 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5148 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5151 if (insert_regs (src_eqv
, classp
, 0))
5153 rehash_using_reg (src_eqv
);
5154 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5156 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5157 elt
->in_memory
= src_eqv_in_memory
;
5160 /* Check to see if src_eqv_elt is the same as a set source which
5161 does not yet have an elt, and if so set the elt of the set source
5163 for (i
= 0; i
< n_sets
; i
++)
5164 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5165 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5166 sets
[i
].src_elt
= src_eqv_elt
;
5169 for (i
= 0; i
< n_sets
; i
++)
5170 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5171 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5173 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5175 /* REG_EQUAL in setting a STRICT_LOW_PART
5176 gives an equivalent for the entire destination register,
5177 not just for the subreg being stored in now.
5178 This is a more interesting equivalence, so we arrange later
5179 to treat the entire reg as the destination. */
5180 sets
[i
].src_elt
= src_eqv_elt
;
5181 sets
[i
].src_hash
= src_eqv_hash
;
5185 /* Insert source and constant equivalent into hash table, if not
5187 struct table_elt
*classp
= src_eqv_elt
;
5188 rtx src
= sets
[i
].src
;
5189 rtx dest
= SET_DEST (sets
[i
].rtl
);
5190 enum machine_mode mode
5191 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5193 /* It's possible that we have a source value known to be
5194 constant but don't have a REG_EQUAL note on the insn.
5195 Lack of a note will mean src_eqv_elt will be NULL. This
5196 can happen where we've generated a SUBREG to access a
5197 CONST_INT that is already in a register in a wider mode.
5198 Ensure that the source expression is put in the proper
5201 classp
= sets
[i
].src_const_elt
;
5203 if (sets
[i
].src_elt
== 0)
5205 /* Don't put a hard register source into the table if this is
5206 the last insn of a libcall. In this case, we only need
5207 to put src_eqv_elt in src_elt. */
5208 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5210 struct table_elt
*elt
;
5212 /* Note that these insert_regs calls cannot remove
5213 any of the src_elt's, because they would have failed to
5214 match if not still valid. */
5215 if (insert_regs (src
, classp
, 0))
5217 rehash_using_reg (src
);
5218 sets
[i
].src_hash
= HASH (src
, mode
);
5220 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5221 elt
->in_memory
= sets
[i
].src_in_memory
;
5222 sets
[i
].src_elt
= classp
= elt
;
5225 sets
[i
].src_elt
= classp
;
5227 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5228 && src
!= sets
[i
].src_const
5229 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5230 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5231 sets
[i
].src_const_hash
, mode
);
5234 else if (sets
[i
].src_elt
== 0)
5235 /* If we did not insert the source into the hash table (e.g., it was
5236 volatile), note the equivalence class for the REG_EQUAL value, if any,
5237 so that the destination goes into that class. */
5238 sets
[i
].src_elt
= src_eqv_elt
;
5240 /* Record destination addresses in the hash table. This allows us to
5241 check if they are invalidated by other sets. */
5242 for (i
= 0; i
< n_sets
; i
++)
5246 rtx x
= sets
[i
].inner_dest
;
5247 struct table_elt
*elt
;
5248 enum machine_mode mode
;
5254 mode
= GET_MODE (x
);
5255 hash
= HASH (x
, mode
);
5256 elt
= lookup (x
, hash
, mode
);
5259 if (insert_regs (x
, NULL
, 0))
5261 rtx dest
= SET_DEST (sets
[i
].rtl
);
5263 rehash_using_reg (x
);
5264 hash
= HASH (x
, mode
);
5265 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5267 elt
= insert (x
, NULL
, hash
, mode
);
5270 sets
[i
].dest_addr_elt
= elt
;
5273 sets
[i
].dest_addr_elt
= NULL
;
5277 invalidate_from_clobbers (x
);
5279 /* Some registers are invalidated by subroutine calls. Memory is
5280 invalidated by non-constant calls. */
5284 if (! CONST_OR_PURE_CALL_P (insn
))
5285 invalidate_memory ();
5286 invalidate_for_call ();
5289 /* Now invalidate everything set by this instruction.
5290 If a SUBREG or other funny destination is being set,
5291 sets[i].rtl is still nonzero, so here we invalidate the reg
5292 a part of which is being set. */
5294 for (i
= 0; i
< n_sets
; i
++)
5297 /* We can't use the inner dest, because the mode associated with
5298 a ZERO_EXTRACT is significant. */
5299 rtx dest
= SET_DEST (sets
[i
].rtl
);
5301 /* Needed for registers to remove the register from its
5302 previous quantity's chain.
5303 Needed for memory if this is a nonvarying address, unless
5304 we have just done an invalidate_memory that covers even those. */
5305 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5306 invalidate (dest
, VOIDmode
);
5307 else if (MEM_P (dest
))
5308 invalidate (dest
, VOIDmode
);
5309 else if (GET_CODE (dest
) == STRICT_LOW_PART
5310 || GET_CODE (dest
) == ZERO_EXTRACT
)
5311 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5314 /* A volatile ASM invalidates everything. */
5315 if (NONJUMP_INSN_P (insn
)
5316 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5317 && MEM_VOLATILE_P (PATTERN (insn
)))
5318 flush_hash_table ();
5320 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5321 the regs restored by the longjmp come from a later time
5323 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5325 flush_hash_table ();
5329 /* Make sure registers mentioned in destinations
5330 are safe for use in an expression to be inserted.
5331 This removes from the hash table
5332 any invalid entry that refers to one of these registers.
5334 We don't care about the return value from mention_regs because
5335 we are going to hash the SET_DEST values unconditionally. */
5337 for (i
= 0; i
< n_sets
; i
++)
5341 rtx x
= SET_DEST (sets
[i
].rtl
);
5347 /* We used to rely on all references to a register becoming
5348 inaccessible when a register changes to a new quantity,
5349 since that changes the hash code. However, that is not
5350 safe, since after HASH_SIZE new quantities we get a
5351 hash 'collision' of a register with its own invalid
5352 entries. And since SUBREGs have been changed not to
5353 change their hash code with the hash code of the register,
5354 it wouldn't work any longer at all. So we have to check
5355 for any invalid references lying around now.
5356 This code is similar to the REG case in mention_regs,
5357 but it knows that reg_tick has been incremented, and
5358 it leaves reg_in_table as -1 . */
5359 unsigned int regno
= REGNO (x
);
5360 unsigned int endregno
= END_REGNO (x
);
5363 for (i
= regno
; i
< endregno
; i
++)
5365 if (REG_IN_TABLE (i
) >= 0)
5367 remove_invalid_refs (i
);
5368 REG_IN_TABLE (i
) = -1;
5375 /* We may have just removed some of the src_elt's from the hash table.
5376 So replace each one with the current head of the same class.
5377 Also check if destination addresses have been removed. */
5379 for (i
= 0; i
< n_sets
; i
++)
5382 if (sets
[i
].dest_addr_elt
5383 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5385 /* The elt was removed, which means this destination is not
5386 valid after this instruction. */
5387 sets
[i
].rtl
= NULL_RTX
;
5389 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5390 /* If elt was removed, find current head of same class,
5391 or 0 if nothing remains of that class. */
5393 struct table_elt
*elt
= sets
[i
].src_elt
;
5395 while (elt
&& elt
->prev_same_value
)
5396 elt
= elt
->prev_same_value
;
5398 while (elt
&& elt
->first_same_value
== 0)
5399 elt
= elt
->next_same_value
;
5400 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5404 /* Now insert the destinations into their equivalence classes. */
5406 for (i
= 0; i
< n_sets
; i
++)
5409 rtx dest
= SET_DEST (sets
[i
].rtl
);
5410 struct table_elt
*elt
;
5412 /* Don't record value if we are not supposed to risk allocating
5413 floating-point values in registers that might be wider than
5415 if ((flag_float_store
5417 && FLOAT_MODE_P (GET_MODE (dest
)))
5418 /* Don't record BLKmode values, because we don't know the
5419 size of it, and can't be sure that other BLKmode values
5420 have the same or smaller size. */
5421 || GET_MODE (dest
) == BLKmode
5422 /* Don't record values of destinations set inside a libcall block
5423 since we might delete the libcall. Things should have been set
5424 up so we won't want to reuse such a value, but we play it safe
5427 /* If we didn't put a REG_EQUAL value or a source into the hash
5428 table, there is no point is recording DEST. */
5429 || sets
[i
].src_elt
== 0
5430 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5431 or SIGN_EXTEND, don't record DEST since it can cause
5432 some tracking to be wrong.
5434 ??? Think about this more later. */
5435 || (GET_CODE (dest
) == SUBREG
5436 && (GET_MODE_SIZE (GET_MODE (dest
))
5437 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5438 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5439 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5442 /* STRICT_LOW_PART isn't part of the value BEING set,
5443 and neither is the SUBREG inside it.
5444 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5445 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5446 dest
= SUBREG_REG (XEXP (dest
, 0));
5448 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5449 /* Registers must also be inserted into chains for quantities. */
5450 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5452 /* If `insert_regs' changes something, the hash code must be
5454 rehash_using_reg (dest
);
5455 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5458 elt
= insert (dest
, sets
[i
].src_elt
,
5459 sets
[i
].dest_hash
, GET_MODE (dest
));
5461 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5462 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5464 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5465 narrower than M2, and both M1 and M2 are the same number of words,
5466 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5467 make that equivalence as well.
5469 However, BAR may have equivalences for which gen_lowpart
5470 will produce a simpler value than gen_lowpart applied to
5471 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5472 BAR's equivalences. If we don't get a simplified form, make
5473 the SUBREG. It will not be used in an equivalence, but will
5474 cause two similar assignments to be detected.
5476 Note the loop below will find SUBREG_REG (DEST) since we have
5477 already entered SRC and DEST of the SET in the table. */
5479 if (GET_CODE (dest
) == SUBREG
5480 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
5482 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
5483 && (GET_MODE_SIZE (GET_MODE (dest
))
5484 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5485 && sets
[i
].src_elt
!= 0)
5487 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
5488 struct table_elt
*elt
, *classp
= 0;
5490 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
5491 elt
= elt
->next_same_value
)
5495 struct table_elt
*src_elt
;
5498 /* Ignore invalid entries. */
5499 if (!REG_P (elt
->exp
)
5500 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5503 /* We may have already been playing subreg games. If the
5504 mode is already correct for the destination, use it. */
5505 if (GET_MODE (elt
->exp
) == new_mode
)
5509 /* Calculate big endian correction for the SUBREG_BYTE.
5510 We have already checked that M1 (GET_MODE (dest))
5511 is not narrower than M2 (new_mode). */
5512 if (BYTES_BIG_ENDIAN
)
5513 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
5514 - GET_MODE_SIZE (new_mode
));
5516 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
5517 GET_MODE (dest
), byte
);
5520 /* The call to simplify_gen_subreg fails if the value
5521 is VOIDmode, yet we can't do any simplification, e.g.
5522 for EXPR_LISTs denoting function call results.
5523 It is invalid to construct a SUBREG with a VOIDmode
5524 SUBREG_REG, hence a zero new_src means we can't do
5525 this substitution. */
5529 src_hash
= HASH (new_src
, new_mode
);
5530 src_elt
= lookup (new_src
, src_hash
, new_mode
);
5532 /* Put the new source in the hash table is if isn't
5536 if (insert_regs (new_src
, classp
, 0))
5538 rehash_using_reg (new_src
);
5539 src_hash
= HASH (new_src
, new_mode
);
5541 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
5542 src_elt
->in_memory
= elt
->in_memory
;
5544 else if (classp
&& classp
!= src_elt
->first_same_value
)
5545 /* Show that two things that we've seen before are
5546 actually the same. */
5547 merge_equiv_classes (src_elt
, classp
);
5549 classp
= src_elt
->first_same_value
;
5550 /* Ignore invalid entries. */
5552 && !REG_P (classp
->exp
)
5553 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
5554 classp
= classp
->next_same_value
;
5559 /* Special handling for (set REG0 REG1) where REG0 is the
5560 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5561 be used in the sequel, so (if easily done) change this insn to
5562 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5563 that computed their value. Then REG1 will become a dead store
5564 and won't cloud the situation for later optimizations.
5566 Do not make this change if REG1 is a hard register, because it will
5567 then be used in the sequel and we may be changing a two-operand insn
5568 into a three-operand insn.
5570 Also do not do this if we are operating on a copy of INSN.
5572 Also don't do this if INSN ends a libcall; this would cause an unrelated
5573 register to be set in the middle of a libcall, and we then get bad code
5574 if the libcall is deleted. */
5576 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
5577 && NEXT_INSN (PREV_INSN (insn
)) == insn
5578 && REG_P (SET_SRC (sets
[0].rtl
))
5579 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
5580 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
5582 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
5583 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5585 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
5586 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5588 /* Scan for the previous nonnote insn, but stop at a basic
5591 rtx bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
5594 prev
= PREV_INSN (prev
);
5596 while (prev
!= bb_head
&& NOTE_P (prev
));
5598 /* Do not swap the registers around if the previous instruction
5599 attaches a REG_EQUIV note to REG1.
5601 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5602 from the pseudo that originally shadowed an incoming argument
5603 to another register. Some uses of REG_EQUIV might rely on it
5604 being attached to REG1 rather than REG2.
5606 This section previously turned the REG_EQUIV into a REG_EQUAL
5607 note. We cannot do that because REG_EQUIV may provide an
5608 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5609 if (NONJUMP_INSN_P (prev
)
5610 && GET_CODE (PATTERN (prev
)) == SET
5611 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
5612 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
5614 rtx dest
= SET_DEST (sets
[0].rtl
);
5615 rtx src
= SET_SRC (sets
[0].rtl
);
5618 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
5619 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
5620 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
5621 apply_change_group ();
5623 /* If INSN has a REG_EQUAL note, and this note mentions
5624 REG0, then we must delete it, because the value in
5625 REG0 has changed. If the note's value is REG1, we must
5626 also delete it because that is now this insn's dest. */
5627 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5629 && (reg_mentioned_p (dest
, XEXP (note
, 0))
5630 || rtx_equal_p (src
, XEXP (note
, 0))))
5631 remove_note (insn
, note
);
5639 /* Remove from the hash table all expressions that reference memory. */
5642 invalidate_memory (void)
5645 struct table_elt
*p
, *next
;
5647 for (i
= 0; i
< HASH_SIZE
; i
++)
5648 for (p
= table
[i
]; p
; p
= next
)
5650 next
= p
->next_same_hash
;
5652 remove_from_table (p
, i
);
5656 /* Perform invalidation on the basis of everything about an insn
5657 except for invalidating the actual places that are SET in it.
5658 This includes the places CLOBBERed, and anything that might
5659 alias with something that is SET or CLOBBERed.
5661 X is the pattern of the insn. */
5664 invalidate_from_clobbers (rtx x
)
5666 if (GET_CODE (x
) == CLOBBER
)
5668 rtx ref
= XEXP (x
, 0);
5671 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5673 invalidate (ref
, VOIDmode
);
5674 else if (GET_CODE (ref
) == STRICT_LOW_PART
5675 || GET_CODE (ref
) == ZERO_EXTRACT
)
5676 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5679 else if (GET_CODE (x
) == PARALLEL
)
5682 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
5684 rtx y
= XVECEXP (x
, 0, i
);
5685 if (GET_CODE (y
) == CLOBBER
)
5687 rtx ref
= XEXP (y
, 0);
5688 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5690 invalidate (ref
, VOIDmode
);
5691 else if (GET_CODE (ref
) == STRICT_LOW_PART
5692 || GET_CODE (ref
) == ZERO_EXTRACT
)
5693 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5699 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5700 and replace any registers in them with either an equivalent constant
5701 or the canonical form of the register. If we are inside an address,
5702 only do this if the address remains valid.
5704 OBJECT is 0 except when within a MEM in which case it is the MEM.
5706 Return the replacement for X. */
5709 cse_process_notes_1 (rtx x
, rtx object
, bool *changed
)
5711 enum rtx_code code
= GET_CODE (x
);
5712 const char *fmt
= GET_RTX_FORMAT (code
);
5730 validate_change (x
, &XEXP (x
, 0),
5731 cse_process_notes (XEXP (x
, 0), x
, changed
), 0);
5736 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
5737 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
, changed
);
5739 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
, changed
);
5746 rtx
new = cse_process_notes (XEXP (x
, 0), object
, changed
);
5747 /* We don't substitute VOIDmode constants into these rtx,
5748 since they would impede folding. */
5749 if (GET_MODE (new) != VOIDmode
)
5750 validate_change (object
, &XEXP (x
, 0), new, 0);
5755 i
= REG_QTY (REGNO (x
));
5757 /* Return a constant or a constant register. */
5758 if (REGNO_QTY_VALID_P (REGNO (x
)))
5760 struct qty_table_elem
*ent
= &qty_table
[i
];
5762 if (ent
->const_rtx
!= NULL_RTX
5763 && (CONSTANT_P (ent
->const_rtx
)
5764 || REG_P (ent
->const_rtx
)))
5766 rtx
new = gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
5768 return copy_rtx (new);
5772 /* Otherwise, canonicalize this register. */
5773 return canon_reg (x
, NULL_RTX
);
5779 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
5781 validate_change (object
, &XEXP (x
, i
),
5782 cse_process_notes (XEXP (x
, i
), object
, changed
), 0);
5788 cse_process_notes (rtx x
, rtx object
, bool *changed
)
5790 rtx
new = cse_process_notes_1 (x
, object
, changed
);
5797 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
5799 DATA is a pointer to a struct cse_basic_block_data, that is used to
5801 It is filled with a queue of basic blocks, starting with FIRST_BB
5802 and following a trace through the CFG.
5804 If all paths starting at FIRST_BB have been followed, or no new path
5805 starting at FIRST_BB can be constructed, this function returns FALSE.
5806 Otherwise, DATA->path is filled and the function returns TRUE indicating
5807 that a path to follow was found.
5809 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
5810 block in the path will be FIRST_BB. */
5813 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
5820 SET_BIT (cse_visited_basic_blocks
, first_bb
->index
);
5822 /* See if there is a previous path. */
5823 path_size
= data
->path_size
;
5825 /* There is a previous path. Make sure it started with FIRST_BB. */
5827 gcc_assert (data
->path
[0].bb
== first_bb
);
5829 /* There was only one basic block in the last path. Clear the path and
5830 return, so that paths starting at another basic block can be tried. */
5837 /* If the path was empty from the beginning, construct a new path. */
5839 data
->path
[path_size
++].bb
= first_bb
;
5842 /* Otherwise, path_size must be equal to or greater than 2, because
5843 a previous path exists that is at least two basic blocks long.
5845 Update the previous branch path, if any. If the last branch was
5846 previously along the branch edge, take the fallthrough edge now. */
5847 while (path_size
>= 2)
5849 basic_block last_bb_in_path
, previous_bb_in_path
;
5853 last_bb_in_path
= data
->path
[path_size
].bb
;
5854 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
5856 /* If we previously followed a path along the branch edge, try
5857 the fallthru edge now. */
5858 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
5859 && any_condjump_p (BB_END (previous_bb_in_path
))
5860 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
5861 && e
== BRANCH_EDGE (previous_bb_in_path
))
5863 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
5864 if (bb
!= EXIT_BLOCK_PTR
5865 && single_pred_p (bb
)
5866 /* We used to assert here that we would only see blocks
5867 that we have not visited yet. But we may end up
5868 visiting basic blocks twice if the CFG has changed
5869 in this run of cse_main, because when the CFG changes
5870 the topological sort of the CFG also changes. A basic
5871 blocks that previously had more than two predecessors
5872 may now have a single predecessor, and become part of
5873 a path that starts at another basic block.
5875 We still want to visit each basic block only once, so
5876 halt the path here if we have already visited BB. */
5877 && !TEST_BIT (cse_visited_basic_blocks
, bb
->index
))
5879 SET_BIT (cse_visited_basic_blocks
, bb
->index
);
5880 data
->path
[path_size
++].bb
= bb
;
5885 data
->path
[path_size
].bb
= NULL
;
5888 /* If only one block remains in the path, bail. */
5896 /* Extend the path if possible. */
5899 bb
= data
->path
[path_size
- 1].bb
;
5900 while (bb
&& path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
))
5902 if (single_succ_p (bb
))
5903 e
= single_succ_edge (bb
);
5904 else if (EDGE_COUNT (bb
->succs
) == 2
5905 && any_condjump_p (BB_END (bb
)))
5907 /* First try to follow the branch. If that doesn't lead
5908 to a useful path, follow the fallthru edge. */
5909 e
= BRANCH_EDGE (bb
);
5910 if (!single_pred_p (e
->dest
))
5911 e
= FALLTHRU_EDGE (bb
);
5916 if (e
&& e
->dest
!= EXIT_BLOCK_PTR
5917 && single_pred_p (e
->dest
)
5918 /* Avoid visiting basic blocks twice. The large comment
5919 above explains why this can happen. */
5920 && !TEST_BIT (cse_visited_basic_blocks
, e
->dest
->index
))
5922 basic_block bb2
= e
->dest
;
5923 SET_BIT (cse_visited_basic_blocks
, bb2
->index
);
5924 data
->path
[path_size
++].bb
= bb2
;
5933 data
->path_size
= path_size
;
5934 return path_size
!= 0;
5937 /* Dump the path in DATA to file F. NSETS is the number of sets
5941 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
5945 fprintf (f
, ";; Following path with %d sets: ", nsets
);
5946 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
5947 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
5948 fputc ('\n', dump_file
);
5953 /* Return true if BB has exception handling successor edges. */
5956 have_eh_succ_edges (basic_block bb
)
5961 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
5962 if (e
->flags
& EDGE_EH
)
5969 /* Scan to the end of the path described by DATA. Return an estimate of
5970 the total number of SETs of all insns in the path. */
5973 cse_prescan_path (struct cse_basic_block_data
*data
)
5976 int path_size
= data
->path_size
;
5979 /* Scan to end of each basic block in the path. */
5980 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
5985 bb
= data
->path
[path_entry
].bb
;
5987 FOR_BB_INSNS (bb
, insn
)
5992 /* A PARALLEL can have lots of SETs in it,
5993 especially if it is really an ASM_OPERANDS. */
5994 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5995 nsets
+= XVECLEN (PATTERN (insn
), 0);
6001 data
->nsets
= nsets
;
6004 /* Process a single extended basic block described by EBB_DATA. */
6007 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6009 int path_size
= ebb_data
->path_size
;
6013 /* Allocate the space needed by qty_table. */
6014 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6017 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6018 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6019 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6023 rtx libcall_insn
= NULL_RTX
;
6024 int no_conflict
= 0;
6026 bb
= ebb_data
->path
[path_entry
].bb
;
6027 FOR_BB_INSNS (bb
, insn
)
6029 /* If we have processed 1,000 insns, flush the hash table to
6030 avoid extreme quadratic behavior. We must not include NOTEs
6031 in the count since there may be more of them when generating
6032 debugging information. If we clear the table at different
6033 times, code generated with -g -O might be different than code
6034 generated with -O but not -g.
6036 FIXME: This is a real kludge and needs to be done some other
6039 && num_insns
++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS
))
6041 flush_hash_table ();
6047 /* Process notes first so we have all notes in canonical forms
6048 when looking for duplicate operations. */
6049 if (REG_NOTES (insn
))
6051 bool changed
= false;
6052 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
),
6053 NULL_RTX
, &changed
);
6055 df_notes_rescan (insn
);
6058 /* Track when we are inside in LIBCALL block. Inside such
6059 a block we do not want to record destinations. The last
6060 insn of a LIBCALL block is not considered to be part of
6061 the block, since its destination is the result of the
6062 block and hence should be recorded. */
6063 if (REG_NOTES (insn
) != 0)
6067 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
6068 libcall_insn
= XEXP (p
, 0);
6069 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6071 /* Keep libcall_insn for the last SET insn of
6072 a no-conflict block to prevent changing the
6075 libcall_insn
= NULL_RTX
;
6079 else if (find_reg_note (insn
, REG_NO_CONFLICT
, NULL_RTX
))
6083 cse_insn (insn
, libcall_insn
);
6085 /* If we kept libcall_insn for a no-conflict bock,
6087 if (no_conflict
== -1)
6089 libcall_insn
= NULL_RTX
;
6093 /* If we haven't already found an insn where we added a LABEL_REF,
6095 if (INSN_P (insn
) && ! recorded_label_ref
6096 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
6098 recorded_label_ref
= 1;
6101 /* If the previous insn set CC0 and this insn no longer
6102 references CC0, delete the previous insn. Here we use
6103 fact that nothing expects CC0 to be valid over an insn,
6104 which is true until the final pass. */
6108 prev_insn
= PREV_INSN (insn
);
6109 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6110 && (tem
= single_set (prev_insn
)) != 0
6111 && SET_DEST (tem
) == cc0_rtx
6112 && ! reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
6113 delete_insn (prev_insn
);
6116 /* If this insn is not the last insn in the basic block,
6117 it will be PREV_INSN(insn) in the next iteration. If
6118 we recorded any CC0-related information for this insn,
6120 if (insn
!= BB_END (bb
))
6122 prev_insn_cc0
= this_insn_cc0
;
6123 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6129 /* Make sure that libcalls don't span multiple basic blocks. */
6130 gcc_assert (libcall_insn
== NULL_RTX
);
6132 /* With non-call exceptions, we are not always able to update
6133 the CFG properly inside cse_insn. So clean up possibly
6134 redundant EH edges here. */
6135 if (flag_non_call_exceptions
&& have_eh_succ_edges (bb
))
6136 purge_dead_edges (bb
);
6138 /* If we changed a conditional jump, we may have terminated
6139 the path we are following. Check that by verifying that
6140 the edge we would take still exists. If the edge does
6141 not exist anymore, purge the remainder of the path.
6142 Note that this will cause us to return to the caller. */
6143 if (path_entry
< path_size
- 1)
6145 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6146 if (!find_edge (bb
, next_bb
))
6152 /* If we truncate the path, we must also reset the
6153 visited bit on the remaining blocks in the path,
6154 or we will never visit them at all. */
6155 RESET_BIT (cse_visited_basic_blocks
,
6156 ebb_data
->path
[path_size
].bb
->index
);
6157 ebb_data
->path
[path_size
].bb
= NULL
;
6159 while (path_size
- 1 != path_entry
);
6160 ebb_data
->path_size
= path_size
;
6164 /* If this is a conditional jump insn, record any known
6165 equivalences due to the condition being tested. */
6167 if (path_entry
< path_size
- 1
6169 && single_set (insn
)
6170 && any_condjump_p (insn
))
6172 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6173 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6174 record_jump_equiv (insn
, taken
);
6178 /* Clear the CC0-tracking related insns, they can't provide
6179 useful information across basic block boundaries. */
6184 gcc_assert (next_qty
<= max_qty
);
6190 /* Perform cse on the instructions of a function.
6191 F is the first instruction.
6192 NREGS is one plus the highest pseudo-reg number used in the instruction.
6194 Returns 1 if jump_optimize should be redone due to simplifications
6195 in conditional jump instructions. */
6198 cse_main (rtx f ATTRIBUTE_UNUSED
, int nregs
)
6200 struct cse_basic_block_data ebb_data
;
6202 int *rc_order
= XNEWVEC (int, last_basic_block
);
6205 df_set_flags (DF_LR_RUN_DCE
);
6207 df_set_flags (DF_DEFER_INSN_RESCAN
);
6209 reg_scan (get_insns (), max_reg_num ());
6210 init_cse_reg_info (nregs
);
6212 ebb_data
.path
= XNEWVEC (struct branch_path
,
6213 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6215 cse_jumps_altered
= 0;
6216 recorded_label_ref
= 0;
6217 constant_pool_entries_cost
= 0;
6218 constant_pool_entries_regcost
= 0;
6219 ebb_data
.path_size
= 0;
6221 rtl_hooks
= cse_rtl_hooks
;
6224 init_alias_analysis ();
6226 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6228 /* Set up the table of already visited basic blocks. */
6229 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block
);
6230 sbitmap_zero (cse_visited_basic_blocks
);
6232 /* Loop over basic blocks in reverse completion order (RPO),
6233 excluding the ENTRY and EXIT blocks. */
6234 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6236 while (i
< n_blocks
)
6238 /* Find the first block in the RPO queue that we have not yet
6239 processed before. */
6242 bb
= BASIC_BLOCK (rc_order
[i
++]);
6244 while (TEST_BIT (cse_visited_basic_blocks
, bb
->index
)
6247 /* Find all paths starting with BB, and process them. */
6248 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6250 /* Pre-scan the path. */
6251 cse_prescan_path (&ebb_data
);
6253 /* If this basic block has no sets, skip it. */
6254 if (ebb_data
.nsets
== 0)
6257 /* Get a reasonable estimate for the maximum number of qty's
6258 needed for this path. For this, we take the number of sets
6259 and multiply that by MAX_RECOG_OPERANDS. */
6260 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6262 /* Dump the path we're about to process. */
6264 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6266 cse_extended_basic_block (&ebb_data
);
6271 end_alias_analysis ();
6272 free (reg_eqv_table
);
6273 free (ebb_data
.path
);
6274 sbitmap_free (cse_visited_basic_blocks
);
6276 rtl_hooks
= general_rtl_hooks
;
6278 return cse_jumps_altered
|| recorded_label_ref
;
6281 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6282 which there isn't a REG_LABEL_OPERAND note.
6283 Return one if so. DATA is the insn. */
6286 check_for_label_ref (rtx
*rtl
, void *data
)
6288 rtx insn
= (rtx
) data
;
6290 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6291 note for it, we must rerun jump since it needs to place the note. If
6292 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6293 don't do this since no REG_LABEL_OPERAND will be added. */
6294 return (GET_CODE (*rtl
) == LABEL_REF
6295 && ! LABEL_REF_NONLOCAL_P (*rtl
)
6297 || !label_is_jump_target_p (XEXP (*rtl
, 0), insn
))
6298 && LABEL_P (XEXP (*rtl
, 0))
6299 && INSN_UID (XEXP (*rtl
, 0)) != 0
6300 && ! find_reg_note (insn
, REG_LABEL_OPERAND
, XEXP (*rtl
, 0)));
6303 /* Count the number of times registers are used (not set) in X.
6304 COUNTS is an array in which we accumulate the count, INCR is how much
6305 we count each register usage.
6307 Don't count a usage of DEST, which is the SET_DEST of a SET which
6308 contains X in its SET_SRC. This is because such a SET does not
6309 modify the liveness of DEST.
6310 DEST is set to pc_rtx for a trapping insn, which means that we must count
6311 uses of a SET_DEST regardless because the insn can't be deleted here. */
6314 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6324 switch (code
= GET_CODE (x
))
6328 counts
[REGNO (x
)] += incr
;
6343 /* If we are clobbering a MEM, mark any registers inside the address
6345 if (MEM_P (XEXP (x
, 0)))
6346 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6350 /* Unless we are setting a REG, count everything in SET_DEST. */
6351 if (!REG_P (SET_DEST (x
)))
6352 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6353 count_reg_usage (SET_SRC (x
), counts
,
6354 dest
? dest
: SET_DEST (x
),
6361 /* We expect dest to be NULL_RTX here. If the insn may trap, mark
6362 this fact by setting DEST to pc_rtx. */
6363 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (x
)))
6365 if (code
== CALL_INSN
)
6366 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6367 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6369 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6372 note
= find_reg_equal_equiv_note (x
);
6375 rtx eqv
= XEXP (note
, 0);
6377 if (GET_CODE (eqv
) == EXPR_LIST
)
6378 /* This REG_EQUAL note describes the result of a function call.
6379 Process all the arguments. */
6382 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6383 eqv
= XEXP (eqv
, 1);
6385 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6387 count_reg_usage (eqv
, counts
, dest
, incr
);
6392 if (REG_NOTE_KIND (x
) == REG_EQUAL
6393 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6394 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6395 involving registers in the address. */
6396 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
6397 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6399 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6403 /* If the asm is volatile, then this insn cannot be deleted,
6404 and so the inputs *must* be live. */
6405 if (MEM_VOLATILE_P (x
))
6407 /* Iterate over just the inputs, not the constraints as well. */
6408 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6409 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6419 fmt
= GET_RTX_FORMAT (code
);
6420 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6423 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6424 else if (fmt
[i
] == 'E')
6425 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6426 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6430 /* Return true if set is live. */
6432 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
6439 if (set_noop_p (set
))
6443 else if (GET_CODE (SET_DEST (set
)) == CC0
6444 && !side_effects_p (SET_SRC (set
))
6445 && ((tem
= next_nonnote_insn (insn
)) == 0
6447 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
6450 else if (!REG_P (SET_DEST (set
))
6451 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
6452 || counts
[REGNO (SET_DEST (set
))] != 0
6453 || side_effects_p (SET_SRC (set
)))
6458 /* Return true if insn is live. */
6461 insn_live_p (rtx insn
, int *counts
)
6464 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
)))
6466 else if (GET_CODE (PATTERN (insn
)) == SET
)
6467 return set_live_p (PATTERN (insn
), insn
, counts
);
6468 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6470 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6472 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6474 if (GET_CODE (elt
) == SET
)
6476 if (set_live_p (elt
, insn
, counts
))
6479 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
6488 /* Return true if libcall is dead as a whole. */
6491 dead_libcall_p (rtx insn
, int *counts
)
6495 /* See if there's a REG_EQUAL note on this insn and try to
6496 replace the source with the REG_EQUAL expression.
6498 We assume that insns with REG_RETVALs can only be reg->reg
6499 copies at this point. */
6500 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6504 set
= single_set (insn
);
6508 new = simplify_rtx (XEXP (note
, 0));
6510 new = XEXP (note
, 0);
6512 /* While changing insn, we must update the counts accordingly. */
6513 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
6515 if (validate_change (insn
, &SET_SRC (set
), new, 0))
6517 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6518 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
6519 remove_note (insn
, note
);
6523 if (CONSTANT_P (new))
6525 new = force_const_mem (GET_MODE (SET_DEST (set
)), new);
6526 if (new && validate_change (insn
, &SET_SRC (set
), new, 0))
6528 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6529 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
6530 remove_note (insn
, note
);
6535 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6539 /* Scan all the insns and delete any that are dead; i.e., they store a register
6540 that is never used or they copy a register to itself.
6542 This is used to remove insns made obviously dead by cse, loop or other
6543 optimizations. It improves the heuristics in loop since it won't try to
6544 move dead invariants out of loops or make givs for dead quantities. The
6545 remaining passes of the compilation are also sped up. */
6548 delete_trivially_dead_insns (rtx insns
, int nreg
)
6552 int in_libcall
= 0, dead_libcall
= 0;
6555 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
6556 /* First count the number of times each register is used. */
6557 counts
= XCNEWVEC (int, nreg
);
6558 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6560 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6562 /* Go from the last insn to the first and delete insns that only set unused
6563 registers or copy a register to itself. As we delete an insn, remove
6564 usage counts for registers it uses.
6566 The first jump optimization pass may leave a real insn as the last
6567 insn in the function. We must not skip that insn or we may end
6568 up deleting code that is not really dead. */
6569 for (insn
= get_last_insn (); insn
; insn
= prev
)
6573 prev
= PREV_INSN (insn
);
6577 /* Don't delete any insns that are part of a libcall block unless
6578 we can delete the whole libcall block.
6580 Flow or loop might get confused if we did that. Remember
6581 that we are scanning backwards. */
6582 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6586 dead_libcall
= dead_libcall_p (insn
, counts
);
6588 else if (in_libcall
)
6589 live_insn
= ! dead_libcall
;
6591 live_insn
= insn_live_p (insn
, counts
);
6593 /* If this is a dead insn, delete it and show registers in it aren't
6596 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
6598 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
6599 delete_insn_and_edges (insn
);
6603 if (in_libcall
&& find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
6610 if (dump_file
&& ndead
)
6611 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
6615 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
6619 /* This function is called via for_each_rtx. The argument, NEWREG, is
6620 a condition code register with the desired mode. If we are looking
6621 at the same register in a different mode, replace it with
6625 cse_change_cc_mode (rtx
*loc
, void *data
)
6627 struct change_cc_mode_args
* args
= (struct change_cc_mode_args
*)data
;
6631 && REGNO (*loc
) == REGNO (args
->newreg
)
6632 && GET_MODE (*loc
) != GET_MODE (args
->newreg
))
6634 validate_change (args
->insn
, loc
, args
->newreg
, 1);
6641 /* Change the mode of any reference to the register REGNO (NEWREG) to
6642 GET_MODE (NEWREG) in INSN. */
6645 cse_change_cc_mode_insn (rtx insn
, rtx newreg
)
6647 struct change_cc_mode_args args
;
6654 args
.newreg
= newreg
;
6656 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, &args
);
6657 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, &args
);
6659 /* If the following assertion was triggered, there is most probably
6660 something wrong with the cc_modes_compatible back end function.
6661 CC modes only can be considered compatible if the insn - with the mode
6662 replaced by any of the compatible modes - can still be recognized. */
6663 success
= apply_change_group ();
6664 gcc_assert (success
);
6667 /* Change the mode of any reference to the register REGNO (NEWREG) to
6668 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
6669 any instruction which modifies NEWREG. */
6672 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
6676 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
6678 if (! INSN_P (insn
))
6681 if (reg_set_p (newreg
, insn
))
6684 cse_change_cc_mode_insn (insn
, newreg
);
6688 /* BB is a basic block which finishes with CC_REG as a condition code
6689 register which is set to CC_SRC. Look through the successors of BB
6690 to find blocks which have a single predecessor (i.e., this one),
6691 and look through those blocks for an assignment to CC_REG which is
6692 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
6693 permitted to change the mode of CC_SRC to a compatible mode. This
6694 returns VOIDmode if no equivalent assignments were found.
6695 Otherwise it returns the mode which CC_SRC should wind up with.
6697 The main complexity in this function is handling the mode issues.
6698 We may have more than one duplicate which we can eliminate, and we
6699 try to find a mode which will work for multiple duplicates. */
6701 static enum machine_mode
6702 cse_cc_succs (basic_block bb
, rtx cc_reg
, rtx cc_src
, bool can_change_mode
)
6705 enum machine_mode mode
;
6706 unsigned int insn_count
;
6709 enum machine_mode modes
[2];
6715 /* We expect to have two successors. Look at both before picking
6716 the final mode for the comparison. If we have more successors
6717 (i.e., some sort of table jump, although that seems unlikely),
6718 then we require all beyond the first two to use the same
6721 found_equiv
= false;
6722 mode
= GET_MODE (cc_src
);
6724 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6729 if (e
->flags
& EDGE_COMPLEX
)
6732 if (EDGE_COUNT (e
->dest
->preds
) != 1
6733 || e
->dest
== EXIT_BLOCK_PTR
)
6736 end
= NEXT_INSN (BB_END (e
->dest
));
6737 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
6741 if (! INSN_P (insn
))
6744 /* If CC_SRC is modified, we have to stop looking for
6745 something which uses it. */
6746 if (modified_in_p (cc_src
, insn
))
6749 /* Check whether INSN sets CC_REG to CC_SRC. */
6750 set
= single_set (insn
);
6752 && REG_P (SET_DEST (set
))
6753 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
6756 enum machine_mode set_mode
;
6757 enum machine_mode comp_mode
;
6760 set_mode
= GET_MODE (SET_SRC (set
));
6761 comp_mode
= set_mode
;
6762 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
6764 else if (GET_CODE (cc_src
) == COMPARE
6765 && GET_CODE (SET_SRC (set
)) == COMPARE
6767 && rtx_equal_p (XEXP (cc_src
, 0),
6768 XEXP (SET_SRC (set
), 0))
6769 && rtx_equal_p (XEXP (cc_src
, 1),
6770 XEXP (SET_SRC (set
), 1)))
6773 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
6774 if (comp_mode
!= VOIDmode
6775 && (can_change_mode
|| comp_mode
== mode
))
6782 if (insn_count
< ARRAY_SIZE (insns
))
6784 insns
[insn_count
] = insn
;
6785 modes
[insn_count
] = set_mode
;
6786 last_insns
[insn_count
] = end
;
6789 if (mode
!= comp_mode
)
6791 gcc_assert (can_change_mode
);
6794 /* The modified insn will be re-recognized later. */
6795 PUT_MODE (cc_src
, mode
);
6800 if (set_mode
!= mode
)
6802 /* We found a matching expression in the
6803 wrong mode, but we don't have room to
6804 store it in the array. Punt. This case
6808 /* INSN sets CC_REG to a value equal to CC_SRC
6809 with the right mode. We can simply delete
6814 /* We found an instruction to delete. Keep looking,
6815 in the hopes of finding a three-way jump. */
6819 /* We found an instruction which sets the condition
6820 code, so don't look any farther. */
6824 /* If INSN sets CC_REG in some other way, don't look any
6826 if (reg_set_p (cc_reg
, insn
))
6830 /* If we fell off the bottom of the block, we can keep looking
6831 through successors. We pass CAN_CHANGE_MODE as false because
6832 we aren't prepared to handle compatibility between the
6833 further blocks and this block. */
6836 enum machine_mode submode
;
6838 submode
= cse_cc_succs (e
->dest
, cc_reg
, cc_src
, false);
6839 if (submode
!= VOIDmode
)
6841 gcc_assert (submode
== mode
);
6843 can_change_mode
= false;
6851 /* Now INSN_COUNT is the number of instructions we found which set
6852 CC_REG to a value equivalent to CC_SRC. The instructions are in
6853 INSNS. The modes used by those instructions are in MODES. */
6856 for (i
= 0; i
< insn_count
; ++i
)
6858 if (modes
[i
] != mode
)
6860 /* We need to change the mode of CC_REG in INSNS[i] and
6861 subsequent instructions. */
6864 if (GET_MODE (cc_reg
) == mode
)
6867 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
6869 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
6873 delete_insn (insns
[i
]);
6879 /* If we have a fixed condition code register (or two), walk through
6880 the instructions and try to eliminate duplicate assignments. */
6883 cse_condition_code_reg (void)
6885 unsigned int cc_regno_1
;
6886 unsigned int cc_regno_2
;
6891 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
6894 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
6895 if (cc_regno_2
!= INVALID_REGNUM
)
6896 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
6898 cc_reg_2
= NULL_RTX
;
6907 enum machine_mode mode
;
6908 enum machine_mode orig_mode
;
6910 /* Look for blocks which end with a conditional jump based on a
6911 condition code register. Then look for the instruction which
6912 sets the condition code register. Then look through the
6913 successor blocks for instructions which set the condition
6914 code register to the same value. There are other possible
6915 uses of the condition code register, but these are by far the
6916 most common and the ones which we are most likely to be able
6919 last_insn
= BB_END (bb
);
6920 if (!JUMP_P (last_insn
))
6923 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
6925 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
6930 cc_src_insn
= NULL_RTX
;
6932 for (insn
= PREV_INSN (last_insn
);
6933 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
6934 insn
= PREV_INSN (insn
))
6938 if (! INSN_P (insn
))
6940 set
= single_set (insn
);
6942 && REG_P (SET_DEST (set
))
6943 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
6946 cc_src
= SET_SRC (set
);
6949 else if (reg_set_p (cc_reg
, insn
))
6956 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
6959 /* Now CC_REG is a condition code register used for a
6960 conditional jump at the end of the block, and CC_SRC, in
6961 CC_SRC_INSN, is the value to which that condition code
6962 register is set, and CC_SRC is still meaningful at the end of
6965 orig_mode
= GET_MODE (cc_src
);
6966 mode
= cse_cc_succs (bb
, cc_reg
, cc_src
, true);
6967 if (mode
!= VOIDmode
)
6969 gcc_assert (mode
== GET_MODE (cc_src
));
6970 if (mode
!= orig_mode
)
6972 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
6974 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
6976 /* Do the same in the following insns that use the
6977 current value of CC_REG within BB. */
6978 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
6979 NEXT_INSN (last_insn
),
6987 /* Perform common subexpression elimination. Nonzero value from
6988 `cse_main' means that jumps were simplified and some code may now
6989 be unreachable, so do jump optimization again. */
6991 gate_handle_cse (void)
6993 return optimize
> 0;
6997 rest_of_handle_cse (void)
7002 dump_flow_info (dump_file
, dump_flags
);
7004 tem
= cse_main (get_insns (), max_reg_num ());
7006 /* If we are not running more CSE passes, then we are no longer
7007 expecting CSE to be run. But always rerun it in a cheap mode. */
7008 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7011 rebuild_jump_labels (get_insns ());
7013 if (tem
|| optimize
> 1)
7019 struct tree_opt_pass pass_cse
=
7022 gate_handle_cse
, /* gate */
7023 rest_of_handle_cse
, /* execute */
7026 0, /* static_pass_number */
7028 0, /* properties_required */
7029 0, /* properties_provided */
7030 0, /* properties_destroyed */
7031 0, /* todo_flags_start */
7032 TODO_df_finish
| TODO_verify_rtl_sharing
|
7035 TODO_verify_flow
, /* todo_flags_finish */
7041 gate_handle_cse2 (void)
7043 return optimize
> 0 && flag_rerun_cse_after_loop
;
7046 /* Run second CSE pass after loop optimizations. */
7048 rest_of_handle_cse2 (void)
7053 dump_flow_info (dump_file
, dump_flags
);
7055 tem
= cse_main (get_insns (), max_reg_num ());
7057 /* Run a pass to eliminate duplicated assignments to condition code
7058 registers. We have to run this after bypass_jumps, because it
7059 makes it harder for that pass to determine whether a jump can be
7061 cse_condition_code_reg ();
7063 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7067 timevar_push (TV_JUMP
);
7068 rebuild_jump_labels (get_insns ());
7070 timevar_pop (TV_JUMP
);
7072 cse_not_expected
= 1;
7077 struct tree_opt_pass pass_cse2
=
7080 gate_handle_cse2
, /* gate */
7081 rest_of_handle_cse2
, /* execute */
7084 0, /* static_pass_number */
7085 TV_CSE2
, /* tv_id */
7086 0, /* properties_required */
7087 0, /* properties_provided */
7088 0, /* properties_destroyed */
7089 0, /* todo_flags_start */
7090 TODO_df_finish
| TODO_verify_rtl_sharing
|
7093 TODO_verify_flow
, /* todo_flags_finish */