aarch64: Fix gcc.target/aarch64/sve/loop_add_6.c for LLP64 targets
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / loop_add_6.c
bloba530998f54b04583e13dd9ad6b0b14cee0c51251
1 /* { dg-do compile } */
2 /* { dg-options "-O2 -ftree-vectorize -fgimple -ffast-math" } */
4 double __GIMPLE (ssa, startwith("loop"))
5 neg_xi (double *x)
7 int i;
8 __SIZETYPE__ index;
9 __SIZETYPE__ offset;
10 double * xi_ptr;
11 double xi;
12 double neg_xi;
13 double res;
14 unsigned int ivtmp;
16 __BB(5):
17 goto __BB2;
19 __BB(2):
20 res_1 = __PHI (__BB5: 0.0, __BB3: res_2);
21 i_4 = __PHI (__BB5: 0, __BB3: i_5);
22 ivtmp_6 = __PHI (__BB5: 100U, __BB3: ivtmp_7);
23 index = (__SIZETYPE__ ) i_4;
24 offset = index * _Literal (__SIZETYPE__) 8;
25 xi_ptr = x_8(D) + offset;
26 xi = *xi_ptr;
27 neg_xi = -xi;
28 res_2 = neg_xi + res_1;
29 i_5 = i_4 + 1;
30 ivtmp_7 = ivtmp_6 - 1U;
31 if (ivtmp_7 != 0U)
32 goto __BB3;
33 else
34 goto __BB4;
36 __BB(3):
37 goto __BB2;
39 __BB(4):
40 res_3 = __PHI (__BB2: res_2);
41 return res_3;
44 /* { dg-final { scan-assembler {\tfsub\tz[0-9]+\.d, p[0-7]/m} } } */
45 /* { dg-final { scan-assembler-not {\tsel\t} } } */
46 /* { dg-final { scan-assembler-not {\tmovprfx\t} } } */