* target.h (struct gcc_target): Add new field to struct cxx: import_export_class.
[official-gcc.git] / gcc / cse.c
blobe322ec7fbb8d53674dba7d4f9d19e6afe4a8558f
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "real.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "toplev.h"
40 #include "output.h"
41 #include "ggc.h"
42 #include "timevar.h"
43 #include "except.h"
44 #include "target.h"
45 #include "params.h"
46 #include "rtlhooks-def.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
57 global CSE.
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `reg_qty' records what quantity a register is currently thought
85 of as containing.
87 All real quantity numbers are greater than or equal to `max_reg'.
88 If register N has not been assigned a quantity, reg_qty[N] will equal N.
90 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
91 entries should be referenced with an index below `max_reg'.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
122 `const_rtx'.
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
130 Other expressions:
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
136 hash codes.
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
165 must be removed.
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
176 reg_tick[i] is incremented whenever a value is stored in register i.
177 reg_in_table[i] holds -1 if no references to register i have been
178 entered in the table; otherwise, it contains the value reg_tick[i] had
179 when the references were entered. If we want to enter a reference
180 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
181 Until we want to enter a new entry, the mere fact that the two vectors
182 don't match makes the entries be ignored if anyone tries to match them.
184 Registers themselves are entered in the hash table as well as in
185 the equivalent-register chains. However, the vectors `reg_tick'
186 and `reg_in_table' do not apply to expressions which are simple
187 register references. These expressions are removed from the table
188 immediately when they become invalid, and this can be done even if
189 we do not immediately search for all the expressions that refer to
190 the register.
192 A CLOBBER rtx in an instruction invalidates its operand for further
193 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
194 invalidates everything that resides in memory.
196 Related expressions:
198 Constant expressions that differ only by an additive integer
199 are called related. When a constant expression is put in
200 the table, the related expression with no constant term
201 is also entered. These are made to point at each other
202 so that it is possible to find out if there exists any
203 register equivalent to an expression related to a given expression. */
205 /* One plus largest register number used in this function. */
207 static int max_reg;
209 /* One plus largest instruction UID used in this function at time of
210 cse_main call. */
212 static int max_insn_uid;
214 /* Length of qty_table vector. We know in advance we will not need
215 a quantity number this big. */
217 static int max_qty;
219 /* Next quantity number to be allocated.
220 This is 1 + the largest number needed so far. */
222 static int next_qty;
224 /* Per-qty information tracking.
226 `first_reg' and `last_reg' track the head and tail of the
227 chain of registers which currently contain this quantity.
229 `mode' contains the machine mode of this quantity.
231 `const_rtx' holds the rtx of the constant value of this
232 quantity, if known. A summations of the frame/arg pointer
233 and a constant can also be entered here. When this holds
234 a known value, `const_insn' is the insn which stored the
235 constant value.
237 `comparison_{code,const,qty}' are used to track when a
238 comparison between a quantity and some constant or register has
239 been passed. In such a case, we know the results of the comparison
240 in case we see it again. These members record a comparison that
241 is known to be true. `comparison_code' holds the rtx code of such
242 a comparison, else it is set to UNKNOWN and the other two
243 comparison members are undefined. `comparison_const' holds
244 the constant being compared against, or zero if the comparison
245 is not against a constant. `comparison_qty' holds the quantity
246 being compared against when the result is known. If the comparison
247 is not with a register, `comparison_qty' is -1. */
249 struct qty_table_elem
251 rtx const_rtx;
252 rtx const_insn;
253 rtx comparison_const;
254 int comparison_qty;
255 unsigned int first_reg, last_reg;
256 /* The sizes of these fields should match the sizes of the
257 code and mode fields of struct rtx_def (see rtl.h). */
258 ENUM_BITFIELD(rtx_code) comparison_code : 16;
259 ENUM_BITFIELD(machine_mode) mode : 8;
262 /* The table of all qtys, indexed by qty number. */
263 static struct qty_table_elem *qty_table;
265 #ifdef HAVE_cc0
266 /* For machines that have a CC0, we do not record its value in the hash
267 table since its use is guaranteed to be the insn immediately following
268 its definition and any other insn is presumed to invalidate it.
270 Instead, we store below the value last assigned to CC0. If it should
271 happen to be a constant, it is stored in preference to the actual
272 assigned value. In case it is a constant, we store the mode in which
273 the constant should be interpreted. */
275 static rtx prev_insn_cc0;
276 static enum machine_mode prev_insn_cc0_mode;
278 /* Previous actual insn. 0 if at first insn of basic block. */
280 static rtx prev_insn;
281 #endif
283 /* Insn being scanned. */
285 static rtx this_insn;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
289 value.
291 Or -1 if this register is at the end of the chain.
293 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
296 struct reg_eqv_elem
298 int next, prev;
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
304 struct cse_reg_info
306 /* Next in hash chain. */
307 struct cse_reg_info *hash_next;
309 /* The next cse_reg_info structure in the free or used list. */
310 struct cse_reg_info *next;
312 /* Search key */
313 unsigned int regno;
315 /* The quantity number of the register's current contents. */
316 int reg_qty;
318 /* The number of times the register has been altered in the current
319 basic block. */
320 int reg_tick;
322 /* The REG_TICK value at which rtx's containing this register are
323 valid in the hash table. If this does not equal the current
324 reg_tick value, such expressions existing in the hash table are
325 invalid. */
326 int reg_in_table;
328 /* The SUBREG that was set when REG_TICK was last incremented. Set
329 to -1 if the last store was to the whole register, not a subreg. */
330 unsigned int subreg_ticked;
333 /* A free list of cse_reg_info entries. */
334 static struct cse_reg_info *cse_reg_info_free_list;
336 /* A used list of cse_reg_info entries. */
337 static struct cse_reg_info *cse_reg_info_used_list;
338 static struct cse_reg_info *cse_reg_info_used_list_end;
340 /* A mapping from registers to cse_reg_info data structures. */
341 #define REGHASH_SHIFT 7
342 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
343 #define REGHASH_MASK (REGHASH_SIZE - 1)
344 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
346 #define REGHASH_FN(REGNO) \
347 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
349 /* The last lookup we did into the cse_reg_info_tree. This allows us
350 to cache repeated lookups. */
351 static unsigned int cached_regno;
352 static struct cse_reg_info *cached_cse_reg_info;
354 /* A HARD_REG_SET containing all the hard registers for which there is
355 currently a REG expression in the hash table. Note the difference
356 from the above variables, which indicate if the REG is mentioned in some
357 expression in the table. */
359 static HARD_REG_SET hard_regs_in_table;
361 /* CUID of insn that starts the basic block currently being cse-processed. */
363 static int cse_basic_block_start;
365 /* CUID of insn that ends the basic block currently being cse-processed. */
367 static int cse_basic_block_end;
369 /* Vector mapping INSN_UIDs to cuids.
370 The cuids are like uids but increase monotonically always.
371 We use them to see whether a reg is used outside a given basic block. */
373 static int *uid_cuid;
375 /* Highest UID in UID_CUID. */
376 static int max_uid;
378 /* Get the cuid of an insn. */
380 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
382 /* Nonzero if this pass has made changes, and therefore it's
383 worthwhile to run the garbage collector. */
385 static int cse_altered;
387 /* Nonzero if cse has altered conditional jump insns
388 in such a way that jump optimization should be redone. */
390 static int cse_jumps_altered;
392 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
393 REG_LABEL, we have to rerun jump after CSE to put in the note. */
394 static int recorded_label_ref;
396 /* canon_hash stores 1 in do_not_record
397 if it notices a reference to CC0, PC, or some other volatile
398 subexpression. */
400 static int do_not_record;
402 #ifdef LOAD_EXTEND_OP
404 /* Scratch rtl used when looking for load-extended copy of a MEM. */
405 static rtx memory_extend_rtx;
406 #endif
408 /* canon_hash stores 1 in hash_arg_in_memory
409 if it notices a reference to memory within the expression being hashed. */
411 static int hash_arg_in_memory;
413 /* The hash table contains buckets which are chains of `struct table_elt's,
414 each recording one expression's information.
415 That expression is in the `exp' field.
417 The canon_exp field contains a canonical (from the point of view of
418 alias analysis) version of the `exp' field.
420 Those elements with the same hash code are chained in both directions
421 through the `next_same_hash' and `prev_same_hash' fields.
423 Each set of expressions with equivalent values
424 are on a two-way chain through the `next_same_value'
425 and `prev_same_value' fields, and all point with
426 the `first_same_value' field at the first element in
427 that chain. The chain is in order of increasing cost.
428 Each element's cost value is in its `cost' field.
430 The `in_memory' field is nonzero for elements that
431 involve any reference to memory. These elements are removed
432 whenever a write is done to an unidentified location in memory.
433 To be safe, we assume that a memory address is unidentified unless
434 the address is either a symbol constant or a constant plus
435 the frame pointer or argument pointer.
437 The `related_value' field is used to connect related expressions
438 (that differ by adding an integer).
439 The related expressions are chained in a circular fashion.
440 `related_value' is zero for expressions for which this
441 chain is not useful.
443 The `cost' field stores the cost of this element's expression.
444 The `regcost' field stores the value returned by approx_reg_cost for
445 this element's expression.
447 The `is_const' flag is set if the element is a constant (including
448 a fixed address).
450 The `flag' field is used as a temporary during some search routines.
452 The `mode' field is usually the same as GET_MODE (`exp'), but
453 if `exp' is a CONST_INT and has no machine mode then the `mode'
454 field is the mode it was being used as. Each constant is
455 recorded separately for each mode it is used with. */
457 struct table_elt
459 rtx exp;
460 rtx canon_exp;
461 struct table_elt *next_same_hash;
462 struct table_elt *prev_same_hash;
463 struct table_elt *next_same_value;
464 struct table_elt *prev_same_value;
465 struct table_elt *first_same_value;
466 struct table_elt *related_value;
467 int cost;
468 int regcost;
469 /* The size of this field should match the size
470 of the mode field of struct rtx_def (see rtl.h). */
471 ENUM_BITFIELD(machine_mode) mode : 8;
472 char in_memory;
473 char is_const;
474 char flag;
477 /* We don't want a lot of buckets, because we rarely have very many
478 things stored in the hash table, and a lot of buckets slows
479 down a lot of loops that happen frequently. */
480 #define HASH_SHIFT 5
481 #define HASH_SIZE (1 << HASH_SHIFT)
482 #define HASH_MASK (HASH_SIZE - 1)
484 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
485 register (hard registers may require `do_not_record' to be set). */
487 #define HASH(X, M) \
488 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
489 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
490 : canon_hash (X, M)) & HASH_MASK)
492 /* Determine whether register number N is considered a fixed register for the
493 purpose of approximating register costs.
494 It is desirable to replace other regs with fixed regs, to reduce need for
495 non-fixed hard regs.
496 A reg wins if it is either the frame pointer or designated as fixed. */
497 #define FIXED_REGNO_P(N) \
498 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
499 || fixed_regs[N] || global_regs[N])
501 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
502 hard registers and pointers into the frame are the cheapest with a cost
503 of 0. Next come pseudos with a cost of one and other hard registers with
504 a cost of 2. Aside from these special cases, call `rtx_cost'. */
506 #define CHEAP_REGNO(N) \
507 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
508 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
509 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
510 || ((N) < FIRST_PSEUDO_REGISTER \
511 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
513 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
514 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
516 /* Get the info associated with register N. */
518 #define GET_CSE_REG_INFO(N) \
519 (((N) == cached_regno && cached_cse_reg_info) \
520 ? cached_cse_reg_info : get_cse_reg_info ((N)))
522 /* Get the number of times this register has been updated in this
523 basic block. */
525 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
527 /* Get the point at which REG was recorded in the table. */
529 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
531 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
532 SUBREG). */
534 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
536 /* Get the quantity number for REG. */
538 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
540 /* Determine if the quantity number for register X represents a valid index
541 into the qty_table. */
543 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
545 static struct table_elt *table[HASH_SIZE];
547 /* Chain of `struct table_elt's made so far for this function
548 but currently removed from the table. */
550 static struct table_elt *free_element_chain;
552 /* Number of `struct table_elt' structures made so far for this function. */
554 static int n_elements_made;
556 /* Maximum value `n_elements_made' has had so far in this compilation
557 for functions previously processed. */
559 static int max_elements_made;
561 /* Surviving equivalence class when two equivalence classes are merged
562 by recording the effects of a jump in the last insn. Zero if the
563 last insn was not a conditional jump. */
565 static struct table_elt *last_jump_equiv_class;
567 /* Set to the cost of a constant pool reference if one was found for a
568 symbolic constant. If this was found, it means we should try to
569 convert constants into constant pool entries if they don't fit in
570 the insn. */
572 static int constant_pool_entries_cost;
573 static int constant_pool_entries_regcost;
575 /* This data describes a block that will be processed by cse_basic_block. */
577 struct cse_basic_block_data
579 /* Lowest CUID value of insns in block. */
580 int low_cuid;
581 /* Highest CUID value of insns in block. */
582 int high_cuid;
583 /* Total number of SETs in block. */
584 int nsets;
585 /* Last insn in the block. */
586 rtx last;
587 /* Size of current branch path, if any. */
588 int path_size;
589 /* Current branch path, indicating which branches will be taken. */
590 struct branch_path
592 /* The branch insn. */
593 rtx branch;
594 /* Whether it should be taken or not. AROUND is the same as taken
595 except that it is used when the destination label is not preceded
596 by a BARRIER. */
597 enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status;
598 } *path;
601 static bool fixed_base_plus_p (rtx x);
602 static int notreg_cost (rtx, enum rtx_code);
603 static int approx_reg_cost_1 (rtx *, void *);
604 static int approx_reg_cost (rtx);
605 static int preferable (int, int, int, int);
606 static void new_basic_block (void);
607 static void make_new_qty (unsigned int, enum machine_mode);
608 static void make_regs_eqv (unsigned int, unsigned int);
609 static void delete_reg_equiv (unsigned int);
610 static int mention_regs (rtx);
611 static int insert_regs (rtx, struct table_elt *, int);
612 static void remove_from_table (struct table_elt *, unsigned);
613 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
614 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
615 static rtx lookup_as_function (rtx, enum rtx_code);
616 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
617 enum machine_mode);
618 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
619 static void invalidate (rtx, enum machine_mode);
620 static int cse_rtx_varies_p (rtx, int);
621 static void remove_invalid_refs (unsigned int);
622 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
623 enum machine_mode);
624 static void rehash_using_reg (rtx);
625 static void invalidate_memory (void);
626 static void invalidate_for_call (void);
627 static rtx use_related_value (rtx, struct table_elt *);
628 static unsigned canon_hash (rtx, enum machine_mode);
629 static unsigned canon_hash_string (const char *);
630 static unsigned safe_hash (rtx, enum machine_mode);
631 static int exp_equiv_p (rtx, rtx, int, int);
632 static rtx canon_reg (rtx, rtx);
633 static void find_best_addr (rtx, rtx *, enum machine_mode);
634 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
635 enum machine_mode *,
636 enum machine_mode *);
637 static rtx fold_rtx (rtx, rtx);
638 static rtx equiv_constant (rtx);
639 static void record_jump_equiv (rtx, int);
640 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
641 int);
642 static void cse_insn (rtx, rtx);
643 static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *,
644 int, int, int);
645 static int addr_affects_sp_p (rtx);
646 static void invalidate_from_clobbers (rtx);
647 static rtx cse_process_notes (rtx, rtx);
648 static void cse_around_loop (rtx);
649 static void invalidate_skipped_set (rtx, rtx, void *);
650 static void invalidate_skipped_block (rtx);
651 static void cse_check_loop_start (rtx, rtx, void *);
652 static void cse_set_around_loop (rtx, rtx, rtx);
653 static rtx cse_basic_block (rtx, rtx, struct branch_path *, int);
654 static void count_reg_usage (rtx, int *, int);
655 static int check_for_label_ref (rtx *, void *);
656 extern void dump_class (struct table_elt*);
657 static struct cse_reg_info * get_cse_reg_info (unsigned int);
658 static int check_dependence (rtx *, void *);
660 static void flush_hash_table (void);
661 static bool insn_live_p (rtx, int *);
662 static bool set_live_p (rtx, rtx, int *);
663 static bool dead_libcall_p (rtx, int *);
664 static int cse_change_cc_mode (rtx *, void *);
665 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
666 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
669 #undef RTL_HOOKS_GEN_LOWPART
670 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
672 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
674 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
675 virtual regs here because the simplify_*_operation routines are called
676 by integrate.c, which is called before virtual register instantiation. */
678 static bool
679 fixed_base_plus_p (rtx x)
681 switch (GET_CODE (x))
683 case REG:
684 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
685 return true;
686 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
687 return true;
688 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
689 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
690 return true;
691 return false;
693 case PLUS:
694 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
695 return false;
696 return fixed_base_plus_p (XEXP (x, 0));
698 case ADDRESSOF:
699 return true;
701 default:
702 return false;
706 /* Dump the expressions in the equivalence class indicated by CLASSP.
707 This function is used only for debugging. */
708 void
709 dump_class (struct table_elt *classp)
711 struct table_elt *elt;
713 fprintf (stderr, "Equivalence chain for ");
714 print_rtl (stderr, classp->exp);
715 fprintf (stderr, ": \n");
717 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
719 print_rtl (stderr, elt->exp);
720 fprintf (stderr, "\n");
724 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
726 static int
727 approx_reg_cost_1 (rtx *xp, void *data)
729 rtx x = *xp;
730 int *cost_p = data;
732 if (x && REG_P (x))
734 unsigned int regno = REGNO (x);
736 if (! CHEAP_REGNO (regno))
738 if (regno < FIRST_PSEUDO_REGISTER)
740 if (SMALL_REGISTER_CLASSES)
741 return 1;
742 *cost_p += 2;
744 else
745 *cost_p += 1;
749 return 0;
752 /* Return an estimate of the cost of the registers used in an rtx.
753 This is mostly the number of different REG expressions in the rtx;
754 however for some exceptions like fixed registers we use a cost of
755 0. If any other hard register reference occurs, return MAX_COST. */
757 static int
758 approx_reg_cost (rtx x)
760 int cost = 0;
762 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
763 return MAX_COST;
765 return cost;
768 /* Return a negative value if an rtx A, whose costs are given by COST_A
769 and REGCOST_A, is more desirable than an rtx B.
770 Return a positive value if A is less desirable, or 0 if the two are
771 equally good. */
772 static int
773 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
775 /* First, get rid of cases involving expressions that are entirely
776 unwanted. */
777 if (cost_a != cost_b)
779 if (cost_a == MAX_COST)
780 return 1;
781 if (cost_b == MAX_COST)
782 return -1;
785 /* Avoid extending lifetimes of hardregs. */
786 if (regcost_a != regcost_b)
788 if (regcost_a == MAX_COST)
789 return 1;
790 if (regcost_b == MAX_COST)
791 return -1;
794 /* Normal operation costs take precedence. */
795 if (cost_a != cost_b)
796 return cost_a - cost_b;
797 /* Only if these are identical consider effects on register pressure. */
798 if (regcost_a != regcost_b)
799 return regcost_a - regcost_b;
800 return 0;
803 /* Internal function, to compute cost when X is not a register; called
804 from COST macro to keep it simple. */
806 static int
807 notreg_cost (rtx x, enum rtx_code outer)
809 return ((GET_CODE (x) == SUBREG
810 && REG_P (SUBREG_REG (x))
811 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
812 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
813 && (GET_MODE_SIZE (GET_MODE (x))
814 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
815 && subreg_lowpart_p (x)
816 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
817 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
819 : rtx_cost (x, outer) * 2);
823 static struct cse_reg_info *
824 get_cse_reg_info (unsigned int regno)
826 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
827 struct cse_reg_info *p;
829 for (p = *hash_head; p != NULL; p = p->hash_next)
830 if (p->regno == regno)
831 break;
833 if (p == NULL)
835 /* Get a new cse_reg_info structure. */
836 if (cse_reg_info_free_list)
838 p = cse_reg_info_free_list;
839 cse_reg_info_free_list = p->next;
841 else
842 p = xmalloc (sizeof (struct cse_reg_info));
844 /* Insert into hash table. */
845 p->hash_next = *hash_head;
846 *hash_head = p;
848 /* Initialize it. */
849 p->reg_tick = 1;
850 p->reg_in_table = -1;
851 p->subreg_ticked = -1;
852 p->reg_qty = regno;
853 p->regno = regno;
854 p->next = cse_reg_info_used_list;
855 cse_reg_info_used_list = p;
856 if (!cse_reg_info_used_list_end)
857 cse_reg_info_used_list_end = p;
860 /* Cache this lookup; we tend to be looking up information about the
861 same register several times in a row. */
862 cached_regno = regno;
863 cached_cse_reg_info = p;
865 return p;
868 /* Clear the hash table and initialize each register with its own quantity,
869 for a new basic block. */
871 static void
872 new_basic_block (void)
874 int i;
876 next_qty = max_reg;
878 /* Clear out hash table state for this pass. */
880 memset (reg_hash, 0, sizeof reg_hash);
882 if (cse_reg_info_used_list)
884 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
885 cse_reg_info_free_list = cse_reg_info_used_list;
886 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
888 cached_cse_reg_info = 0;
890 CLEAR_HARD_REG_SET (hard_regs_in_table);
892 /* The per-quantity values used to be initialized here, but it is
893 much faster to initialize each as it is made in `make_new_qty'. */
895 for (i = 0; i < HASH_SIZE; i++)
897 struct table_elt *first;
899 first = table[i];
900 if (first != NULL)
902 struct table_elt *last = first;
904 table[i] = NULL;
906 while (last->next_same_hash != NULL)
907 last = last->next_same_hash;
909 /* Now relink this hash entire chain into
910 the free element list. */
912 last->next_same_hash = free_element_chain;
913 free_element_chain = first;
917 #ifdef HAVE_cc0
918 prev_insn = 0;
919 prev_insn_cc0 = 0;
920 #endif
923 /* Say that register REG contains a quantity in mode MODE not in any
924 register before and initialize that quantity. */
926 static void
927 make_new_qty (unsigned int reg, enum machine_mode mode)
929 int q;
930 struct qty_table_elem *ent;
931 struct reg_eqv_elem *eqv;
933 if (next_qty >= max_qty)
934 abort ();
936 q = REG_QTY (reg) = next_qty++;
937 ent = &qty_table[q];
938 ent->first_reg = reg;
939 ent->last_reg = reg;
940 ent->mode = mode;
941 ent->const_rtx = ent->const_insn = NULL_RTX;
942 ent->comparison_code = UNKNOWN;
944 eqv = &reg_eqv_table[reg];
945 eqv->next = eqv->prev = -1;
948 /* Make reg NEW equivalent to reg OLD.
949 OLD is not changing; NEW is. */
951 static void
952 make_regs_eqv (unsigned int new, unsigned int old)
954 unsigned int lastr, firstr;
955 int q = REG_QTY (old);
956 struct qty_table_elem *ent;
958 ent = &qty_table[q];
960 /* Nothing should become eqv until it has a "non-invalid" qty number. */
961 if (! REGNO_QTY_VALID_P (old))
962 abort ();
964 REG_QTY (new) = q;
965 firstr = ent->first_reg;
966 lastr = ent->last_reg;
968 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
969 hard regs. Among pseudos, if NEW will live longer than any other reg
970 of the same qty, and that is beyond the current basic block,
971 make it the new canonical replacement for this qty. */
972 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
973 /* Certain fixed registers might be of the class NO_REGS. This means
974 that not only can they not be allocated by the compiler, but
975 they cannot be used in substitutions or canonicalizations
976 either. */
977 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
978 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
979 || (new >= FIRST_PSEUDO_REGISTER
980 && (firstr < FIRST_PSEUDO_REGISTER
981 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
982 || (uid_cuid[REGNO_FIRST_UID (new)]
983 < cse_basic_block_start))
984 && (uid_cuid[REGNO_LAST_UID (new)]
985 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
987 reg_eqv_table[firstr].prev = new;
988 reg_eqv_table[new].next = firstr;
989 reg_eqv_table[new].prev = -1;
990 ent->first_reg = new;
992 else
994 /* If NEW is a hard reg (known to be non-fixed), insert at end.
995 Otherwise, insert before any non-fixed hard regs that are at the
996 end. Registers of class NO_REGS cannot be used as an
997 equivalent for anything. */
998 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
999 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1000 && new >= FIRST_PSEUDO_REGISTER)
1001 lastr = reg_eqv_table[lastr].prev;
1002 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1003 if (reg_eqv_table[lastr].next >= 0)
1004 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1005 else
1006 qty_table[q].last_reg = new;
1007 reg_eqv_table[lastr].next = new;
1008 reg_eqv_table[new].prev = lastr;
1012 /* Remove REG from its equivalence class. */
1014 static void
1015 delete_reg_equiv (unsigned int reg)
1017 struct qty_table_elem *ent;
1018 int q = REG_QTY (reg);
1019 int p, n;
1021 /* If invalid, do nothing. */
1022 if (q == (int) reg)
1023 return;
1025 ent = &qty_table[q];
1027 p = reg_eqv_table[reg].prev;
1028 n = reg_eqv_table[reg].next;
1030 if (n != -1)
1031 reg_eqv_table[n].prev = p;
1032 else
1033 ent->last_reg = p;
1034 if (p != -1)
1035 reg_eqv_table[p].next = n;
1036 else
1037 ent->first_reg = n;
1039 REG_QTY (reg) = reg;
1042 /* Remove any invalid expressions from the hash table
1043 that refer to any of the registers contained in expression X.
1045 Make sure that newly inserted references to those registers
1046 as subexpressions will be considered valid.
1048 mention_regs is not called when a register itself
1049 is being stored in the table.
1051 Return 1 if we have done something that may have changed the hash code
1052 of X. */
1054 static int
1055 mention_regs (rtx x)
1057 enum rtx_code code;
1058 int i, j;
1059 const char *fmt;
1060 int changed = 0;
1062 if (x == 0)
1063 return 0;
1065 code = GET_CODE (x);
1066 if (code == REG)
1068 unsigned int regno = REGNO (x);
1069 unsigned int endregno
1070 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1071 : hard_regno_nregs[regno][GET_MODE (x)]);
1072 unsigned int i;
1074 for (i = regno; i < endregno; i++)
1076 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1077 remove_invalid_refs (i);
1079 REG_IN_TABLE (i) = REG_TICK (i);
1080 SUBREG_TICKED (i) = -1;
1083 return 0;
1086 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1087 pseudo if they don't use overlapping words. We handle only pseudos
1088 here for simplicity. */
1089 if (code == SUBREG && REG_P (SUBREG_REG (x))
1090 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1092 unsigned int i = REGNO (SUBREG_REG (x));
1094 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1096 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1097 the last store to this register really stored into this
1098 subreg, then remove the memory of this subreg.
1099 Otherwise, remove any memory of the entire register and
1100 all its subregs from the table. */
1101 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1102 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1103 remove_invalid_refs (i);
1104 else
1105 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1108 REG_IN_TABLE (i) = REG_TICK (i);
1109 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1110 return 0;
1113 /* If X is a comparison or a COMPARE and either operand is a register
1114 that does not have a quantity, give it one. This is so that a later
1115 call to record_jump_equiv won't cause X to be assigned a different
1116 hash code and not found in the table after that call.
1118 It is not necessary to do this here, since rehash_using_reg can
1119 fix up the table later, but doing this here eliminates the need to
1120 call that expensive function in the most common case where the only
1121 use of the register is in the comparison. */
1123 if (code == COMPARE || COMPARISON_P (x))
1125 if (REG_P (XEXP (x, 0))
1126 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1127 if (insert_regs (XEXP (x, 0), NULL, 0))
1129 rehash_using_reg (XEXP (x, 0));
1130 changed = 1;
1133 if (REG_P (XEXP (x, 1))
1134 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1135 if (insert_regs (XEXP (x, 1), NULL, 0))
1137 rehash_using_reg (XEXP (x, 1));
1138 changed = 1;
1142 fmt = GET_RTX_FORMAT (code);
1143 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1144 if (fmt[i] == 'e')
1145 changed |= mention_regs (XEXP (x, i));
1146 else if (fmt[i] == 'E')
1147 for (j = 0; j < XVECLEN (x, i); j++)
1148 changed |= mention_regs (XVECEXP (x, i, j));
1150 return changed;
1153 /* Update the register quantities for inserting X into the hash table
1154 with a value equivalent to CLASSP.
1155 (If the class does not contain a REG, it is irrelevant.)
1156 If MODIFIED is nonzero, X is a destination; it is being modified.
1157 Note that delete_reg_equiv should be called on a register
1158 before insert_regs is done on that register with MODIFIED != 0.
1160 Nonzero value means that elements of reg_qty have changed
1161 so X's hash code may be different. */
1163 static int
1164 insert_regs (rtx x, struct table_elt *classp, int modified)
1166 if (REG_P (x))
1168 unsigned int regno = REGNO (x);
1169 int qty_valid;
1171 /* If REGNO is in the equivalence table already but is of the
1172 wrong mode for that equivalence, don't do anything here. */
1174 qty_valid = REGNO_QTY_VALID_P (regno);
1175 if (qty_valid)
1177 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1179 if (ent->mode != GET_MODE (x))
1180 return 0;
1183 if (modified || ! qty_valid)
1185 if (classp)
1186 for (classp = classp->first_same_value;
1187 classp != 0;
1188 classp = classp->next_same_value)
1189 if (REG_P (classp->exp)
1190 && GET_MODE (classp->exp) == GET_MODE (x))
1192 make_regs_eqv (regno, REGNO (classp->exp));
1193 return 1;
1196 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1197 than REG_IN_TABLE to find out if there was only a single preceding
1198 invalidation - for the SUBREG - or another one, which would be
1199 for the full register. However, if we find here that REG_TICK
1200 indicates that the register is invalid, it means that it has
1201 been invalidated in a separate operation. The SUBREG might be used
1202 now (then this is a recursive call), or we might use the full REG
1203 now and a SUBREG of it later. So bump up REG_TICK so that
1204 mention_regs will do the right thing. */
1205 if (! modified
1206 && REG_IN_TABLE (regno) >= 0
1207 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1208 REG_TICK (regno)++;
1209 make_new_qty (regno, GET_MODE (x));
1210 return 1;
1213 return 0;
1216 /* If X is a SUBREG, we will likely be inserting the inner register in the
1217 table. If that register doesn't have an assigned quantity number at
1218 this point but does later, the insertion that we will be doing now will
1219 not be accessible because its hash code will have changed. So assign
1220 a quantity number now. */
1222 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1223 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1225 insert_regs (SUBREG_REG (x), NULL, 0);
1226 mention_regs (x);
1227 return 1;
1229 else
1230 return mention_regs (x);
1233 /* Look in or update the hash table. */
1235 /* Remove table element ELT from use in the table.
1236 HASH is its hash code, made using the HASH macro.
1237 It's an argument because often that is known in advance
1238 and we save much time not recomputing it. */
1240 static void
1241 remove_from_table (struct table_elt *elt, unsigned int hash)
1243 if (elt == 0)
1244 return;
1246 /* Mark this element as removed. See cse_insn. */
1247 elt->first_same_value = 0;
1249 /* Remove the table element from its equivalence class. */
1252 struct table_elt *prev = elt->prev_same_value;
1253 struct table_elt *next = elt->next_same_value;
1255 if (next)
1256 next->prev_same_value = prev;
1258 if (prev)
1259 prev->next_same_value = next;
1260 else
1262 struct table_elt *newfirst = next;
1263 while (next)
1265 next->first_same_value = newfirst;
1266 next = next->next_same_value;
1271 /* Remove the table element from its hash bucket. */
1274 struct table_elt *prev = elt->prev_same_hash;
1275 struct table_elt *next = elt->next_same_hash;
1277 if (next)
1278 next->prev_same_hash = prev;
1280 if (prev)
1281 prev->next_same_hash = next;
1282 else if (table[hash] == elt)
1283 table[hash] = next;
1284 else
1286 /* This entry is not in the proper hash bucket. This can happen
1287 when two classes were merged by `merge_equiv_classes'. Search
1288 for the hash bucket that it heads. This happens only very
1289 rarely, so the cost is acceptable. */
1290 for (hash = 0; hash < HASH_SIZE; hash++)
1291 if (table[hash] == elt)
1292 table[hash] = next;
1296 /* Remove the table element from its related-value circular chain. */
1298 if (elt->related_value != 0 && elt->related_value != elt)
1300 struct table_elt *p = elt->related_value;
1302 while (p->related_value != elt)
1303 p = p->related_value;
1304 p->related_value = elt->related_value;
1305 if (p->related_value == p)
1306 p->related_value = 0;
1309 /* Now add it to the free element chain. */
1310 elt->next_same_hash = free_element_chain;
1311 free_element_chain = elt;
1314 /* Look up X in the hash table and return its table element,
1315 or 0 if X is not in the table.
1317 MODE is the machine-mode of X, or if X is an integer constant
1318 with VOIDmode then MODE is the mode with which X will be used.
1320 Here we are satisfied to find an expression whose tree structure
1321 looks like X. */
1323 static struct table_elt *
1324 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1326 struct table_elt *p;
1328 for (p = table[hash]; p; p = p->next_same_hash)
1329 if (mode == p->mode && ((x == p->exp && REG_P (x))
1330 || exp_equiv_p (x, p->exp, !REG_P (x), 0)))
1331 return p;
1333 return 0;
1336 /* Like `lookup' but don't care whether the table element uses invalid regs.
1337 Also ignore discrepancies in the machine mode of a register. */
1339 static struct table_elt *
1340 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1342 struct table_elt *p;
1344 if (REG_P (x))
1346 unsigned int regno = REGNO (x);
1348 /* Don't check the machine mode when comparing registers;
1349 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1350 for (p = table[hash]; p; p = p->next_same_hash)
1351 if (REG_P (p->exp)
1352 && REGNO (p->exp) == regno)
1353 return p;
1355 else
1357 for (p = table[hash]; p; p = p->next_same_hash)
1358 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1359 return p;
1362 return 0;
1365 /* Look for an expression equivalent to X and with code CODE.
1366 If one is found, return that expression. */
1368 static rtx
1369 lookup_as_function (rtx x, enum rtx_code code)
1371 struct table_elt *p
1372 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1374 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1375 long as we are narrowing. So if we looked in vain for a mode narrower
1376 than word_mode before, look for word_mode now. */
1377 if (p == 0 && code == CONST_INT
1378 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1380 x = copy_rtx (x);
1381 PUT_MODE (x, word_mode);
1382 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1385 if (p == 0)
1386 return 0;
1388 for (p = p->first_same_value; p; p = p->next_same_value)
1389 if (GET_CODE (p->exp) == code
1390 /* Make sure this is a valid entry in the table. */
1391 && exp_equiv_p (p->exp, p->exp, 1, 0))
1392 return p->exp;
1394 return 0;
1397 /* Insert X in the hash table, assuming HASH is its hash code
1398 and CLASSP is an element of the class it should go in
1399 (or 0 if a new class should be made).
1400 It is inserted at the proper position to keep the class in
1401 the order cheapest first.
1403 MODE is the machine-mode of X, or if X is an integer constant
1404 with VOIDmode then MODE is the mode with which X will be used.
1406 For elements of equal cheapness, the most recent one
1407 goes in front, except that the first element in the list
1408 remains first unless a cheaper element is added. The order of
1409 pseudo-registers does not matter, as canon_reg will be called to
1410 find the cheapest when a register is retrieved from the table.
1412 The in_memory field in the hash table element is set to 0.
1413 The caller must set it nonzero if appropriate.
1415 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1416 and if insert_regs returns a nonzero value
1417 you must then recompute its hash code before calling here.
1419 If necessary, update table showing constant values of quantities. */
1421 #define CHEAPER(X, Y) \
1422 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1424 static struct table_elt *
1425 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1427 struct table_elt *elt;
1429 /* If X is a register and we haven't made a quantity for it,
1430 something is wrong. */
1431 if (REG_P (x) && ! REGNO_QTY_VALID_P (REGNO (x)))
1432 abort ();
1434 /* If X is a hard register, show it is being put in the table. */
1435 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1437 unsigned int regno = REGNO (x);
1438 unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
1439 unsigned int i;
1441 for (i = regno; i < endregno; i++)
1442 SET_HARD_REG_BIT (hard_regs_in_table, i);
1445 /* Put an element for X into the right hash bucket. */
1447 elt = free_element_chain;
1448 if (elt)
1449 free_element_chain = elt->next_same_hash;
1450 else
1452 n_elements_made++;
1453 elt = xmalloc (sizeof (struct table_elt));
1456 elt->exp = x;
1457 elt->canon_exp = NULL_RTX;
1458 elt->cost = COST (x);
1459 elt->regcost = approx_reg_cost (x);
1460 elt->next_same_value = 0;
1461 elt->prev_same_value = 0;
1462 elt->next_same_hash = table[hash];
1463 elt->prev_same_hash = 0;
1464 elt->related_value = 0;
1465 elt->in_memory = 0;
1466 elt->mode = mode;
1467 elt->is_const = (CONSTANT_P (x)
1468 /* GNU C++ takes advantage of this for `this'
1469 (and other const values). */
1470 || (REG_P (x)
1471 && RTX_UNCHANGING_P (x)
1472 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1473 || fixed_base_plus_p (x));
1475 if (table[hash])
1476 table[hash]->prev_same_hash = elt;
1477 table[hash] = elt;
1479 /* Put it into the proper value-class. */
1480 if (classp)
1482 classp = classp->first_same_value;
1483 if (CHEAPER (elt, classp))
1484 /* Insert at the head of the class. */
1486 struct table_elt *p;
1487 elt->next_same_value = classp;
1488 classp->prev_same_value = elt;
1489 elt->first_same_value = elt;
1491 for (p = classp; p; p = p->next_same_value)
1492 p->first_same_value = elt;
1494 else
1496 /* Insert not at head of the class. */
1497 /* Put it after the last element cheaper than X. */
1498 struct table_elt *p, *next;
1500 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1501 p = next);
1503 /* Put it after P and before NEXT. */
1504 elt->next_same_value = next;
1505 if (next)
1506 next->prev_same_value = elt;
1508 elt->prev_same_value = p;
1509 p->next_same_value = elt;
1510 elt->first_same_value = classp;
1513 else
1514 elt->first_same_value = elt;
1516 /* If this is a constant being set equivalent to a register or a register
1517 being set equivalent to a constant, note the constant equivalence.
1519 If this is a constant, it cannot be equivalent to a different constant,
1520 and a constant is the only thing that can be cheaper than a register. So
1521 we know the register is the head of the class (before the constant was
1522 inserted).
1524 If this is a register that is not already known equivalent to a
1525 constant, we must check the entire class.
1527 If this is a register that is already known equivalent to an insn,
1528 update the qtys `const_insn' to show that `this_insn' is the latest
1529 insn making that quantity equivalent to the constant. */
1531 if (elt->is_const && classp && REG_P (classp->exp)
1532 && !REG_P (x))
1534 int exp_q = REG_QTY (REGNO (classp->exp));
1535 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1537 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1538 exp_ent->const_insn = this_insn;
1541 else if (REG_P (x)
1542 && classp
1543 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1544 && ! elt->is_const)
1546 struct table_elt *p;
1548 for (p = classp; p != 0; p = p->next_same_value)
1550 if (p->is_const && !REG_P (p->exp))
1552 int x_q = REG_QTY (REGNO (x));
1553 struct qty_table_elem *x_ent = &qty_table[x_q];
1555 x_ent->const_rtx
1556 = gen_lowpart (GET_MODE (x), p->exp);
1557 x_ent->const_insn = this_insn;
1558 break;
1563 else if (REG_P (x)
1564 && qty_table[REG_QTY (REGNO (x))].const_rtx
1565 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1566 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1568 /* If this is a constant with symbolic value,
1569 and it has a term with an explicit integer value,
1570 link it up with related expressions. */
1571 if (GET_CODE (x) == CONST)
1573 rtx subexp = get_related_value (x);
1574 unsigned subhash;
1575 struct table_elt *subelt, *subelt_prev;
1577 if (subexp != 0)
1579 /* Get the integer-free subexpression in the hash table. */
1580 subhash = safe_hash (subexp, mode) & HASH_MASK;
1581 subelt = lookup (subexp, subhash, mode);
1582 if (subelt == 0)
1583 subelt = insert (subexp, NULL, subhash, mode);
1584 /* Initialize SUBELT's circular chain if it has none. */
1585 if (subelt->related_value == 0)
1586 subelt->related_value = subelt;
1587 /* Find the element in the circular chain that precedes SUBELT. */
1588 subelt_prev = subelt;
1589 while (subelt_prev->related_value != subelt)
1590 subelt_prev = subelt_prev->related_value;
1591 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1592 This way the element that follows SUBELT is the oldest one. */
1593 elt->related_value = subelt_prev->related_value;
1594 subelt_prev->related_value = elt;
1598 return elt;
1601 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1602 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1603 the two classes equivalent.
1605 CLASS1 will be the surviving class; CLASS2 should not be used after this
1606 call.
1608 Any invalid entries in CLASS2 will not be copied. */
1610 static void
1611 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1613 struct table_elt *elt, *next, *new;
1615 /* Ensure we start with the head of the classes. */
1616 class1 = class1->first_same_value;
1617 class2 = class2->first_same_value;
1619 /* If they were already equal, forget it. */
1620 if (class1 == class2)
1621 return;
1623 for (elt = class2; elt; elt = next)
1625 unsigned int hash;
1626 rtx exp = elt->exp;
1627 enum machine_mode mode = elt->mode;
1629 next = elt->next_same_value;
1631 /* Remove old entry, make a new one in CLASS1's class.
1632 Don't do this for invalid entries as we cannot find their
1633 hash code (it also isn't necessary). */
1634 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, 0))
1636 bool need_rehash = false;
1638 hash_arg_in_memory = 0;
1639 hash = HASH (exp, mode);
1641 if (REG_P (exp))
1643 need_rehash = (unsigned) REG_QTY (REGNO (exp)) != REGNO (exp);
1644 delete_reg_equiv (REGNO (exp));
1647 remove_from_table (elt, hash);
1649 if (insert_regs (exp, class1, 0) || need_rehash)
1651 rehash_using_reg (exp);
1652 hash = HASH (exp, mode);
1654 new = insert (exp, class1, hash, mode);
1655 new->in_memory = hash_arg_in_memory;
1660 /* Flush the entire hash table. */
1662 static void
1663 flush_hash_table (void)
1665 int i;
1666 struct table_elt *p;
1668 for (i = 0; i < HASH_SIZE; i++)
1669 for (p = table[i]; p; p = table[i])
1671 /* Note that invalidate can remove elements
1672 after P in the current hash chain. */
1673 if (REG_P (p->exp))
1674 invalidate (p->exp, p->mode);
1675 else
1676 remove_from_table (p, i);
1680 /* Function called for each rtx to check whether true dependence exist. */
1681 struct check_dependence_data
1683 enum machine_mode mode;
1684 rtx exp;
1685 rtx addr;
1688 static int
1689 check_dependence (rtx *x, void *data)
1691 struct check_dependence_data *d = (struct check_dependence_data *) data;
1692 if (*x && GET_CODE (*x) == MEM)
1693 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1694 cse_rtx_varies_p);
1695 else
1696 return 0;
1699 /* Remove from the hash table, or mark as invalid, all expressions whose
1700 values could be altered by storing in X. X is a register, a subreg, or
1701 a memory reference with nonvarying address (because, when a memory
1702 reference with a varying address is stored in, all memory references are
1703 removed by invalidate_memory so specific invalidation is superfluous).
1704 FULL_MODE, if not VOIDmode, indicates that this much should be
1705 invalidated instead of just the amount indicated by the mode of X. This
1706 is only used for bitfield stores into memory.
1708 A nonvarying address may be just a register or just a symbol reference,
1709 or it may be either of those plus a numeric offset. */
1711 static void
1712 invalidate (rtx x, enum machine_mode full_mode)
1714 int i;
1715 struct table_elt *p;
1716 rtx addr;
1718 switch (GET_CODE (x))
1720 case REG:
1722 /* If X is a register, dependencies on its contents are recorded
1723 through the qty number mechanism. Just change the qty number of
1724 the register, mark it as invalid for expressions that refer to it,
1725 and remove it itself. */
1726 unsigned int regno = REGNO (x);
1727 unsigned int hash = HASH (x, GET_MODE (x));
1729 /* Remove REGNO from any quantity list it might be on and indicate
1730 that its value might have changed. If it is a pseudo, remove its
1731 entry from the hash table.
1733 For a hard register, we do the first two actions above for any
1734 additional hard registers corresponding to X. Then, if any of these
1735 registers are in the table, we must remove any REG entries that
1736 overlap these registers. */
1738 delete_reg_equiv (regno);
1739 REG_TICK (regno)++;
1740 SUBREG_TICKED (regno) = -1;
1742 if (regno >= FIRST_PSEUDO_REGISTER)
1744 /* Because a register can be referenced in more than one mode,
1745 we might have to remove more than one table entry. */
1746 struct table_elt *elt;
1748 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1749 remove_from_table (elt, hash);
1751 else
1753 HOST_WIDE_INT in_table
1754 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1755 unsigned int endregno
1756 = regno + hard_regno_nregs[regno][GET_MODE (x)];
1757 unsigned int tregno, tendregno, rn;
1758 struct table_elt *p, *next;
1760 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1762 for (rn = regno + 1; rn < endregno; rn++)
1764 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1765 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1766 delete_reg_equiv (rn);
1767 REG_TICK (rn)++;
1768 SUBREG_TICKED (rn) = -1;
1771 if (in_table)
1772 for (hash = 0; hash < HASH_SIZE; hash++)
1773 for (p = table[hash]; p; p = next)
1775 next = p->next_same_hash;
1777 if (!REG_P (p->exp)
1778 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1779 continue;
1781 tregno = REGNO (p->exp);
1782 tendregno
1783 = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)];
1784 if (tendregno > regno && tregno < endregno)
1785 remove_from_table (p, hash);
1789 return;
1791 case SUBREG:
1792 invalidate (SUBREG_REG (x), VOIDmode);
1793 return;
1795 case PARALLEL:
1796 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1797 invalidate (XVECEXP (x, 0, i), VOIDmode);
1798 return;
1800 case EXPR_LIST:
1801 /* This is part of a disjoint return value; extract the location in
1802 question ignoring the offset. */
1803 invalidate (XEXP (x, 0), VOIDmode);
1804 return;
1806 case MEM:
1807 addr = canon_rtx (get_addr (XEXP (x, 0)));
1808 /* Calculate the canonical version of X here so that
1809 true_dependence doesn't generate new RTL for X on each call. */
1810 x = canon_rtx (x);
1812 /* Remove all hash table elements that refer to overlapping pieces of
1813 memory. */
1814 if (full_mode == VOIDmode)
1815 full_mode = GET_MODE (x);
1817 for (i = 0; i < HASH_SIZE; i++)
1819 struct table_elt *next;
1821 for (p = table[i]; p; p = next)
1823 next = p->next_same_hash;
1824 if (p->in_memory)
1826 struct check_dependence_data d;
1828 /* Just canonicalize the expression once;
1829 otherwise each time we call invalidate
1830 true_dependence will canonicalize the
1831 expression again. */
1832 if (!p->canon_exp)
1833 p->canon_exp = canon_rtx (p->exp);
1834 d.exp = x;
1835 d.addr = addr;
1836 d.mode = full_mode;
1837 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1838 remove_from_table (p, i);
1842 return;
1844 default:
1845 abort ();
1849 /* Remove all expressions that refer to register REGNO,
1850 since they are already invalid, and we are about to
1851 mark that register valid again and don't want the old
1852 expressions to reappear as valid. */
1854 static void
1855 remove_invalid_refs (unsigned int regno)
1857 unsigned int i;
1858 struct table_elt *p, *next;
1860 for (i = 0; i < HASH_SIZE; i++)
1861 for (p = table[i]; p; p = next)
1863 next = p->next_same_hash;
1864 if (!REG_P (p->exp)
1865 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1866 remove_from_table (p, i);
1870 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1871 and mode MODE. */
1872 static void
1873 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1874 enum machine_mode mode)
1876 unsigned int i;
1877 struct table_elt *p, *next;
1878 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1880 for (i = 0; i < HASH_SIZE; i++)
1881 for (p = table[i]; p; p = next)
1883 rtx exp = p->exp;
1884 next = p->next_same_hash;
1886 if (!REG_P (exp)
1887 && (GET_CODE (exp) != SUBREG
1888 || !REG_P (SUBREG_REG (exp))
1889 || REGNO (SUBREG_REG (exp)) != regno
1890 || (((SUBREG_BYTE (exp)
1891 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1892 && SUBREG_BYTE (exp) <= end))
1893 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1894 remove_from_table (p, i);
1898 /* Recompute the hash codes of any valid entries in the hash table that
1899 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1901 This is called when we make a jump equivalence. */
1903 static void
1904 rehash_using_reg (rtx x)
1906 unsigned int i;
1907 struct table_elt *p, *next;
1908 unsigned hash;
1910 if (GET_CODE (x) == SUBREG)
1911 x = SUBREG_REG (x);
1913 /* If X is not a register or if the register is known not to be in any
1914 valid entries in the table, we have no work to do. */
1916 if (!REG_P (x)
1917 || REG_IN_TABLE (REGNO (x)) < 0
1918 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1919 return;
1921 /* Scan all hash chains looking for valid entries that mention X.
1922 If we find one and it is in the wrong hash chain, move it. */
1924 for (i = 0; i < HASH_SIZE; i++)
1925 for (p = table[i]; p; p = next)
1927 next = p->next_same_hash;
1928 if (reg_mentioned_p (x, p->exp)
1929 && exp_equiv_p (p->exp, p->exp, 1, 0)
1930 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
1932 if (p->next_same_hash)
1933 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1935 if (p->prev_same_hash)
1936 p->prev_same_hash->next_same_hash = p->next_same_hash;
1937 else
1938 table[i] = p->next_same_hash;
1940 p->next_same_hash = table[hash];
1941 p->prev_same_hash = 0;
1942 if (table[hash])
1943 table[hash]->prev_same_hash = p;
1944 table[hash] = p;
1949 /* Remove from the hash table any expression that is a call-clobbered
1950 register. Also update their TICK values. */
1952 static void
1953 invalidate_for_call (void)
1955 unsigned int regno, endregno;
1956 unsigned int i;
1957 unsigned hash;
1958 struct table_elt *p, *next;
1959 int in_table = 0;
1961 /* Go through all the hard registers. For each that is clobbered in
1962 a CALL_INSN, remove the register from quantity chains and update
1963 reg_tick if defined. Also see if any of these registers is currently
1964 in the table. */
1966 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1967 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1969 delete_reg_equiv (regno);
1970 if (REG_TICK (regno) >= 0)
1972 REG_TICK (regno)++;
1973 SUBREG_TICKED (regno) = -1;
1976 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1979 /* In the case where we have no call-clobbered hard registers in the
1980 table, we are done. Otherwise, scan the table and remove any
1981 entry that overlaps a call-clobbered register. */
1983 if (in_table)
1984 for (hash = 0; hash < HASH_SIZE; hash++)
1985 for (p = table[hash]; p; p = next)
1987 next = p->next_same_hash;
1989 if (!REG_P (p->exp)
1990 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1991 continue;
1993 regno = REGNO (p->exp);
1994 endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)];
1996 for (i = regno; i < endregno; i++)
1997 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1999 remove_from_table (p, hash);
2000 break;
2005 /* Given an expression X of type CONST,
2006 and ELT which is its table entry (or 0 if it
2007 is not in the hash table),
2008 return an alternate expression for X as a register plus integer.
2009 If none can be found, return 0. */
2011 static rtx
2012 use_related_value (rtx x, struct table_elt *elt)
2014 struct table_elt *relt = 0;
2015 struct table_elt *p, *q;
2016 HOST_WIDE_INT offset;
2018 /* First, is there anything related known?
2019 If we have a table element, we can tell from that.
2020 Otherwise, must look it up. */
2022 if (elt != 0 && elt->related_value != 0)
2023 relt = elt;
2024 else if (elt == 0 && GET_CODE (x) == CONST)
2026 rtx subexp = get_related_value (x);
2027 if (subexp != 0)
2028 relt = lookup (subexp,
2029 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2030 GET_MODE (subexp));
2033 if (relt == 0)
2034 return 0;
2036 /* Search all related table entries for one that has an
2037 equivalent register. */
2039 p = relt;
2040 while (1)
2042 /* This loop is strange in that it is executed in two different cases.
2043 The first is when X is already in the table. Then it is searching
2044 the RELATED_VALUE list of X's class (RELT). The second case is when
2045 X is not in the table. Then RELT points to a class for the related
2046 value.
2048 Ensure that, whatever case we are in, that we ignore classes that have
2049 the same value as X. */
2051 if (rtx_equal_p (x, p->exp))
2052 q = 0;
2053 else
2054 for (q = p->first_same_value; q; q = q->next_same_value)
2055 if (REG_P (q->exp))
2056 break;
2058 if (q)
2059 break;
2061 p = p->related_value;
2063 /* We went all the way around, so there is nothing to be found.
2064 Alternatively, perhaps RELT was in the table for some other reason
2065 and it has no related values recorded. */
2066 if (p == relt || p == 0)
2067 break;
2070 if (q == 0)
2071 return 0;
2073 offset = (get_integer_term (x) - get_integer_term (p->exp));
2074 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2075 return plus_constant (q->exp, offset);
2078 /* Hash a string. Just add its bytes up. */
2079 static inline unsigned
2080 canon_hash_string (const char *ps)
2082 unsigned hash = 0;
2083 const unsigned char *p = (const unsigned char *) ps;
2085 if (p)
2086 while (*p)
2087 hash += *p++;
2089 return hash;
2092 /* Hash an rtx. We are careful to make sure the value is never negative.
2093 Equivalent registers hash identically.
2094 MODE is used in hashing for CONST_INTs only;
2095 otherwise the mode of X is used.
2097 Store 1 in do_not_record if any subexpression is volatile.
2099 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2100 which does not have the RTX_UNCHANGING_P bit set.
2102 Note that cse_insn knows that the hash code of a MEM expression
2103 is just (int) MEM plus the hash code of the address. */
2105 static unsigned
2106 canon_hash (rtx x, enum machine_mode mode)
2108 int i, j;
2109 unsigned hash = 0;
2110 enum rtx_code code;
2111 const char *fmt;
2113 /* repeat is used to turn tail-recursion into iteration. */
2114 repeat:
2115 if (x == 0)
2116 return hash;
2118 code = GET_CODE (x);
2119 switch (code)
2121 case REG:
2123 unsigned int regno = REGNO (x);
2124 bool record;
2126 /* On some machines, we can't record any non-fixed hard register,
2127 because extending its life will cause reload problems. We
2128 consider ap, fp, sp, gp to be fixed for this purpose.
2130 We also consider CCmode registers to be fixed for this purpose;
2131 failure to do so leads to failure to simplify 0<100 type of
2132 conditionals.
2134 On all machines, we can't record any global registers.
2135 Nor should we record any register that is in a small
2136 class, as defined by CLASS_LIKELY_SPILLED_P. */
2138 if (regno >= FIRST_PSEUDO_REGISTER)
2139 record = true;
2140 else if (x == frame_pointer_rtx
2141 || x == hard_frame_pointer_rtx
2142 || x == arg_pointer_rtx
2143 || x == stack_pointer_rtx
2144 || x == pic_offset_table_rtx)
2145 record = true;
2146 else if (global_regs[regno])
2147 record = false;
2148 else if (fixed_regs[regno])
2149 record = true;
2150 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2151 record = true;
2152 else if (SMALL_REGISTER_CLASSES)
2153 record = false;
2154 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2155 record = false;
2156 else
2157 record = true;
2159 if (!record)
2161 do_not_record = 1;
2162 return 0;
2165 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2166 return hash;
2169 /* We handle SUBREG of a REG specially because the underlying
2170 reg changes its hash value with every value change; we don't
2171 want to have to forget unrelated subregs when one subreg changes. */
2172 case SUBREG:
2174 if (REG_P (SUBREG_REG (x)))
2176 hash += (((unsigned) SUBREG << 7)
2177 + REGNO (SUBREG_REG (x))
2178 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2179 return hash;
2181 break;
2184 case CONST_INT:
2186 unsigned HOST_WIDE_INT tem = INTVAL (x);
2187 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2188 return hash;
2191 case CONST_DOUBLE:
2192 /* This is like the general case, except that it only counts
2193 the integers representing the constant. */
2194 hash += (unsigned) code + (unsigned) GET_MODE (x);
2195 if (GET_MODE (x) != VOIDmode)
2196 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2197 else
2198 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2199 + (unsigned) CONST_DOUBLE_HIGH (x));
2200 return hash;
2202 case CONST_VECTOR:
2204 int units;
2205 rtx elt;
2207 units = CONST_VECTOR_NUNITS (x);
2209 for (i = 0; i < units; ++i)
2211 elt = CONST_VECTOR_ELT (x, i);
2212 hash += canon_hash (elt, GET_MODE (elt));
2215 return hash;
2218 /* Assume there is only one rtx object for any given label. */
2219 case LABEL_REF:
2220 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2221 return hash;
2223 case SYMBOL_REF:
2224 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2225 return hash;
2227 case MEM:
2228 /* We don't record if marked volatile or if BLKmode since we don't
2229 know the size of the move. */
2230 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2232 do_not_record = 1;
2233 return 0;
2235 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2236 hash_arg_in_memory = 1;
2238 /* Now that we have already found this special case,
2239 might as well speed it up as much as possible. */
2240 hash += (unsigned) MEM;
2241 x = XEXP (x, 0);
2242 goto repeat;
2244 case USE:
2245 /* A USE that mentions non-volatile memory needs special
2246 handling since the MEM may be BLKmode which normally
2247 prevents an entry from being made. Pure calls are
2248 marked by a USE which mentions BLKmode memory. */
2249 if (GET_CODE (XEXP (x, 0)) == MEM
2250 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2252 hash += (unsigned) USE;
2253 x = XEXP (x, 0);
2255 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2256 hash_arg_in_memory = 1;
2258 /* Now that we have already found this special case,
2259 might as well speed it up as much as possible. */
2260 hash += (unsigned) MEM;
2261 x = XEXP (x, 0);
2262 goto repeat;
2264 break;
2266 case PRE_DEC:
2267 case PRE_INC:
2268 case POST_DEC:
2269 case POST_INC:
2270 case PRE_MODIFY:
2271 case POST_MODIFY:
2272 case PC:
2273 case CC0:
2274 case CALL:
2275 case UNSPEC_VOLATILE:
2276 do_not_record = 1;
2277 return 0;
2279 case ASM_OPERANDS:
2280 if (MEM_VOLATILE_P (x))
2282 do_not_record = 1;
2283 return 0;
2285 else
2287 /* We don't want to take the filename and line into account. */
2288 hash += (unsigned) code + (unsigned) GET_MODE (x)
2289 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2290 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2291 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2293 if (ASM_OPERANDS_INPUT_LENGTH (x))
2295 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2297 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2298 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2299 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2300 (x, i)));
2303 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2304 x = ASM_OPERANDS_INPUT (x, 0);
2305 mode = GET_MODE (x);
2306 goto repeat;
2309 return hash;
2311 break;
2313 default:
2314 break;
2317 i = GET_RTX_LENGTH (code) - 1;
2318 hash += (unsigned) code + (unsigned) GET_MODE (x);
2319 fmt = GET_RTX_FORMAT (code);
2320 for (; i >= 0; i--)
2322 if (fmt[i] == 'e')
2324 rtx tem = XEXP (x, i);
2326 /* If we are about to do the last recursive call
2327 needed at this level, change it into iteration.
2328 This function is called enough to be worth it. */
2329 if (i == 0)
2331 x = tem;
2332 goto repeat;
2334 hash += canon_hash (tem, 0);
2336 else if (fmt[i] == 'E')
2337 for (j = 0; j < XVECLEN (x, i); j++)
2338 hash += canon_hash (XVECEXP (x, i, j), 0);
2339 else if (fmt[i] == 's')
2340 hash += canon_hash_string (XSTR (x, i));
2341 else if (fmt[i] == 'i')
2343 unsigned tem = XINT (x, i);
2344 hash += tem;
2346 else if (fmt[i] == '0' || fmt[i] == 't')
2347 /* Unused. */
2349 else
2350 abort ();
2352 return hash;
2355 /* Like canon_hash but with no side effects. */
2357 static unsigned
2358 safe_hash (rtx x, enum machine_mode mode)
2360 int save_do_not_record = do_not_record;
2361 int save_hash_arg_in_memory = hash_arg_in_memory;
2362 unsigned hash = canon_hash (x, mode);
2363 hash_arg_in_memory = save_hash_arg_in_memory;
2364 do_not_record = save_do_not_record;
2365 return hash;
2368 /* Return 1 iff X and Y would canonicalize into the same thing,
2369 without actually constructing the canonicalization of either one.
2370 If VALIDATE is nonzero,
2371 we assume X is an expression being processed from the rtl
2372 and Y was found in the hash table. We check register refs
2373 in Y for being marked as valid.
2375 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2376 that is known to be in the register. Ordinarily, we don't allow them
2377 to match, because letting them match would cause unpredictable results
2378 in all the places that search a hash table chain for an equivalent
2379 for a given value. A possible equivalent that has different structure
2380 has its hash code computed from different data. Whether the hash code
2381 is the same as that of the given value is pure luck. */
2383 static int
2384 exp_equiv_p (rtx x, rtx y, int validate, int equal_values)
2386 int i, j;
2387 enum rtx_code code;
2388 const char *fmt;
2390 /* Note: it is incorrect to assume an expression is equivalent to itself
2391 if VALIDATE is nonzero. */
2392 if (x == y && !validate)
2393 return 1;
2394 if (x == 0 || y == 0)
2395 return x == y;
2397 code = GET_CODE (x);
2398 if (code != GET_CODE (y))
2400 if (!equal_values)
2401 return 0;
2403 /* If X is a constant and Y is a register or vice versa, they may be
2404 equivalent. We only have to validate if Y is a register. */
2405 if (CONSTANT_P (x) && REG_P (y)
2406 && REGNO_QTY_VALID_P (REGNO (y)))
2408 int y_q = REG_QTY (REGNO (y));
2409 struct qty_table_elem *y_ent = &qty_table[y_q];
2411 if (GET_MODE (y) == y_ent->mode
2412 && rtx_equal_p (x, y_ent->const_rtx)
2413 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2414 return 1;
2417 if (CONSTANT_P (y) && code == REG
2418 && REGNO_QTY_VALID_P (REGNO (x)))
2420 int x_q = REG_QTY (REGNO (x));
2421 struct qty_table_elem *x_ent = &qty_table[x_q];
2423 if (GET_MODE (x) == x_ent->mode
2424 && rtx_equal_p (y, x_ent->const_rtx))
2425 return 1;
2428 return 0;
2431 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2432 if (GET_MODE (x) != GET_MODE (y))
2433 return 0;
2435 switch (code)
2437 case PC:
2438 case CC0:
2439 case CONST_INT:
2440 return x == y;
2442 case LABEL_REF:
2443 return XEXP (x, 0) == XEXP (y, 0);
2445 case SYMBOL_REF:
2446 return XSTR (x, 0) == XSTR (y, 0);
2448 case REG:
2450 unsigned int regno = REGNO (y);
2451 unsigned int endregno
2452 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2453 : hard_regno_nregs[regno][GET_MODE (y)]);
2454 unsigned int i;
2456 /* If the quantities are not the same, the expressions are not
2457 equivalent. If there are and we are not to validate, they
2458 are equivalent. Otherwise, ensure all regs are up-to-date. */
2460 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2461 return 0;
2463 if (! validate)
2464 return 1;
2466 for (i = regno; i < endregno; i++)
2467 if (REG_IN_TABLE (i) != REG_TICK (i))
2468 return 0;
2470 return 1;
2473 /* For commutative operations, check both orders. */
2474 case PLUS:
2475 case MULT:
2476 case AND:
2477 case IOR:
2478 case XOR:
2479 case NE:
2480 case EQ:
2481 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2482 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2483 validate, equal_values))
2484 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2485 validate, equal_values)
2486 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2487 validate, equal_values)));
2489 case ASM_OPERANDS:
2490 /* We don't use the generic code below because we want to
2491 disregard filename and line numbers. */
2493 /* A volatile asm isn't equivalent to any other. */
2494 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2495 return 0;
2497 if (GET_MODE (x) != GET_MODE (y)
2498 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2499 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2500 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2501 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2502 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2503 return 0;
2505 if (ASM_OPERANDS_INPUT_LENGTH (x))
2507 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2508 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2509 ASM_OPERANDS_INPUT (y, i),
2510 validate, equal_values)
2511 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2512 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2513 return 0;
2516 return 1;
2518 default:
2519 break;
2522 /* Compare the elements. If any pair of corresponding elements
2523 fail to match, return 0 for the whole things. */
2525 fmt = GET_RTX_FORMAT (code);
2526 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2528 switch (fmt[i])
2530 case 'e':
2531 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2532 return 0;
2533 break;
2535 case 'E':
2536 if (XVECLEN (x, i) != XVECLEN (y, i))
2537 return 0;
2538 for (j = 0; j < XVECLEN (x, i); j++)
2539 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2540 validate, equal_values))
2541 return 0;
2542 break;
2544 case 's':
2545 if (strcmp (XSTR (x, i), XSTR (y, i)))
2546 return 0;
2547 break;
2549 case 'i':
2550 if (XINT (x, i) != XINT (y, i))
2551 return 0;
2552 break;
2554 case 'w':
2555 if (XWINT (x, i) != XWINT (y, i))
2556 return 0;
2557 break;
2559 case '0':
2560 case 't':
2561 break;
2563 default:
2564 abort ();
2568 return 1;
2571 /* Return 1 if X has a value that can vary even between two
2572 executions of the program. 0 means X can be compared reliably
2573 against certain constants or near-constants. */
2575 static int
2576 cse_rtx_varies_p (rtx x, int from_alias)
2578 /* We need not check for X and the equivalence class being of the same
2579 mode because if X is equivalent to a constant in some mode, it
2580 doesn't vary in any mode. */
2582 if (REG_P (x)
2583 && REGNO_QTY_VALID_P (REGNO (x)))
2585 int x_q = REG_QTY (REGNO (x));
2586 struct qty_table_elem *x_ent = &qty_table[x_q];
2588 if (GET_MODE (x) == x_ent->mode
2589 && x_ent->const_rtx != NULL_RTX)
2590 return 0;
2593 if (GET_CODE (x) == PLUS
2594 && GET_CODE (XEXP (x, 1)) == CONST_INT
2595 && REG_P (XEXP (x, 0))
2596 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2598 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2599 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2601 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2602 && x0_ent->const_rtx != NULL_RTX)
2603 return 0;
2606 /* This can happen as the result of virtual register instantiation, if
2607 the initial constant is too large to be a valid address. This gives
2608 us a three instruction sequence, load large offset into a register,
2609 load fp minus a constant into a register, then a MEM which is the
2610 sum of the two `constant' registers. */
2611 if (GET_CODE (x) == PLUS
2612 && REG_P (XEXP (x, 0))
2613 && REG_P (XEXP (x, 1))
2614 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2615 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2617 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2618 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2619 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2620 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2622 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2623 && x0_ent->const_rtx != NULL_RTX
2624 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2625 && x1_ent->const_rtx != NULL_RTX)
2626 return 0;
2629 return rtx_varies_p (x, from_alias);
2632 /* Canonicalize an expression:
2633 replace each register reference inside it
2634 with the "oldest" equivalent register.
2636 If INSN is nonzero and we are replacing a pseudo with a hard register
2637 or vice versa, validate_change is used to ensure that INSN remains valid
2638 after we make our substitution. The calls are made with IN_GROUP nonzero
2639 so apply_change_group must be called upon the outermost return from this
2640 function (unless INSN is zero). The result of apply_change_group can
2641 generally be discarded since the changes we are making are optional. */
2643 static rtx
2644 canon_reg (rtx x, rtx insn)
2646 int i;
2647 enum rtx_code code;
2648 const char *fmt;
2650 if (x == 0)
2651 return x;
2653 code = GET_CODE (x);
2654 switch (code)
2656 case PC:
2657 case CC0:
2658 case CONST:
2659 case CONST_INT:
2660 case CONST_DOUBLE:
2661 case CONST_VECTOR:
2662 case SYMBOL_REF:
2663 case LABEL_REF:
2664 case ADDR_VEC:
2665 case ADDR_DIFF_VEC:
2666 return x;
2668 case REG:
2670 int first;
2671 int q;
2672 struct qty_table_elem *ent;
2674 /* Never replace a hard reg, because hard regs can appear
2675 in more than one machine mode, and we must preserve the mode
2676 of each occurrence. Also, some hard regs appear in
2677 MEMs that are shared and mustn't be altered. Don't try to
2678 replace any reg that maps to a reg of class NO_REGS. */
2679 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2680 || ! REGNO_QTY_VALID_P (REGNO (x)))
2681 return x;
2683 q = REG_QTY (REGNO (x));
2684 ent = &qty_table[q];
2685 first = ent->first_reg;
2686 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2687 : REGNO_REG_CLASS (first) == NO_REGS ? x
2688 : gen_rtx_REG (ent->mode, first));
2691 default:
2692 break;
2695 fmt = GET_RTX_FORMAT (code);
2696 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2698 int j;
2700 if (fmt[i] == 'e')
2702 rtx new = canon_reg (XEXP (x, i), insn);
2703 int insn_code;
2705 /* If replacing pseudo with hard reg or vice versa, ensure the
2706 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2707 if (insn != 0 && new != 0
2708 && REG_P (new) && REG_P (XEXP (x, i))
2709 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2710 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2711 || (insn_code = recog_memoized (insn)) < 0
2712 || insn_data[insn_code].n_dups > 0))
2713 validate_change (insn, &XEXP (x, i), new, 1);
2714 else
2715 XEXP (x, i) = new;
2717 else if (fmt[i] == 'E')
2718 for (j = 0; j < XVECLEN (x, i); j++)
2719 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2722 return x;
2725 /* LOC is a location within INSN that is an operand address (the contents of
2726 a MEM). Find the best equivalent address to use that is valid for this
2727 insn.
2729 On most CISC machines, complicated address modes are costly, and rtx_cost
2730 is a good approximation for that cost. However, most RISC machines have
2731 only a few (usually only one) memory reference formats. If an address is
2732 valid at all, it is often just as cheap as any other address. Hence, for
2733 RISC machines, we use `address_cost' to compare the costs of various
2734 addresses. For two addresses of equal cost, choose the one with the
2735 highest `rtx_cost' value as that has the potential of eliminating the
2736 most insns. For equal costs, we choose the first in the equivalence
2737 class. Note that we ignore the fact that pseudo registers are cheaper than
2738 hard registers here because we would also prefer the pseudo registers. */
2740 static void
2741 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2743 struct table_elt *elt;
2744 rtx addr = *loc;
2745 struct table_elt *p;
2746 int found_better = 1;
2747 int save_do_not_record = do_not_record;
2748 int save_hash_arg_in_memory = hash_arg_in_memory;
2749 int addr_volatile;
2750 int regno;
2751 unsigned hash;
2753 /* Do not try to replace constant addresses or addresses of local and
2754 argument slots. These MEM expressions are made only once and inserted
2755 in many instructions, as well as being used to control symbol table
2756 output. It is not safe to clobber them.
2758 There are some uncommon cases where the address is already in a register
2759 for some reason, but we cannot take advantage of that because we have
2760 no easy way to unshare the MEM. In addition, looking up all stack
2761 addresses is costly. */
2762 if ((GET_CODE (addr) == PLUS
2763 && REG_P (XEXP (addr, 0))
2764 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2765 && (regno = REGNO (XEXP (addr, 0)),
2766 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2767 || regno == ARG_POINTER_REGNUM))
2768 || (REG_P (addr)
2769 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2770 || regno == HARD_FRAME_POINTER_REGNUM
2771 || regno == ARG_POINTER_REGNUM))
2772 || GET_CODE (addr) == ADDRESSOF
2773 || CONSTANT_ADDRESS_P (addr))
2774 return;
2776 /* If this address is not simply a register, try to fold it. This will
2777 sometimes simplify the expression. Many simplifications
2778 will not be valid, but some, usually applying the associative rule, will
2779 be valid and produce better code. */
2780 if (!REG_P (addr))
2782 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2783 int addr_folded_cost = address_cost (folded, mode);
2784 int addr_cost = address_cost (addr, mode);
2786 if ((addr_folded_cost < addr_cost
2787 || (addr_folded_cost == addr_cost
2788 /* ??? The rtx_cost comparison is left over from an older
2789 version of this code. It is probably no longer helpful. */
2790 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2791 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2792 && validate_change (insn, loc, folded, 0))
2793 addr = folded;
2796 /* If this address is not in the hash table, we can't look for equivalences
2797 of the whole address. Also, ignore if volatile. */
2799 do_not_record = 0;
2800 hash = HASH (addr, Pmode);
2801 addr_volatile = do_not_record;
2802 do_not_record = save_do_not_record;
2803 hash_arg_in_memory = save_hash_arg_in_memory;
2805 if (addr_volatile)
2806 return;
2808 elt = lookup (addr, hash, Pmode);
2810 if (elt)
2812 /* We need to find the best (under the criteria documented above) entry
2813 in the class that is valid. We use the `flag' field to indicate
2814 choices that were invalid and iterate until we can't find a better
2815 one that hasn't already been tried. */
2817 for (p = elt->first_same_value; p; p = p->next_same_value)
2818 p->flag = 0;
2820 while (found_better)
2822 int best_addr_cost = address_cost (*loc, mode);
2823 int best_rtx_cost = (elt->cost + 1) >> 1;
2824 int exp_cost;
2825 struct table_elt *best_elt = elt;
2827 found_better = 0;
2828 for (p = elt->first_same_value; p; p = p->next_same_value)
2829 if (! p->flag)
2831 if ((REG_P (p->exp)
2832 || exp_equiv_p (p->exp, p->exp, 1, 0))
2833 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2834 || (exp_cost == best_addr_cost
2835 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2837 found_better = 1;
2838 best_addr_cost = exp_cost;
2839 best_rtx_cost = (p->cost + 1) >> 1;
2840 best_elt = p;
2844 if (found_better)
2846 if (validate_change (insn, loc,
2847 canon_reg (copy_rtx (best_elt->exp),
2848 NULL_RTX), 0))
2849 return;
2850 else
2851 best_elt->flag = 1;
2856 /* If the address is a binary operation with the first operand a register
2857 and the second a constant, do the same as above, but looking for
2858 equivalences of the register. Then try to simplify before checking for
2859 the best address to use. This catches a few cases: First is when we
2860 have REG+const and the register is another REG+const. We can often merge
2861 the constants and eliminate one insn and one register. It may also be
2862 that a machine has a cheap REG+REG+const. Finally, this improves the
2863 code on the Alpha for unaligned byte stores. */
2865 if (flag_expensive_optimizations
2866 && ARITHMETIC_P (*loc)
2867 && REG_P (XEXP (*loc, 0)))
2869 rtx op1 = XEXP (*loc, 1);
2871 do_not_record = 0;
2872 hash = HASH (XEXP (*loc, 0), Pmode);
2873 do_not_record = save_do_not_record;
2874 hash_arg_in_memory = save_hash_arg_in_memory;
2876 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2877 if (elt == 0)
2878 return;
2880 /* We need to find the best (under the criteria documented above) entry
2881 in the class that is valid. We use the `flag' field to indicate
2882 choices that were invalid and iterate until we can't find a better
2883 one that hasn't already been tried. */
2885 for (p = elt->first_same_value; p; p = p->next_same_value)
2886 p->flag = 0;
2888 while (found_better)
2890 int best_addr_cost = address_cost (*loc, mode);
2891 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2892 struct table_elt *best_elt = elt;
2893 rtx best_rtx = *loc;
2894 int count;
2896 /* This is at worst case an O(n^2) algorithm, so limit our search
2897 to the first 32 elements on the list. This avoids trouble
2898 compiling code with very long basic blocks that can easily
2899 call simplify_gen_binary so many times that we run out of
2900 memory. */
2902 found_better = 0;
2903 for (p = elt->first_same_value, count = 0;
2904 p && count < 32;
2905 p = p->next_same_value, count++)
2906 if (! p->flag
2907 && (REG_P (p->exp)
2908 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2910 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2911 p->exp, op1);
2912 int new_cost;
2913 new_cost = address_cost (new, mode);
2915 if (new_cost < best_addr_cost
2916 || (new_cost == best_addr_cost
2917 && (COST (new) + 1) >> 1 > best_rtx_cost))
2919 found_better = 1;
2920 best_addr_cost = new_cost;
2921 best_rtx_cost = (COST (new) + 1) >> 1;
2922 best_elt = p;
2923 best_rtx = new;
2927 if (found_better)
2929 if (validate_change (insn, loc,
2930 canon_reg (copy_rtx (best_rtx),
2931 NULL_RTX), 0))
2932 return;
2933 else
2934 best_elt->flag = 1;
2940 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2941 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2942 what values are being compared.
2944 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2945 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2946 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2947 compared to produce cc0.
2949 The return value is the comparison operator and is either the code of
2950 A or the code corresponding to the inverse of the comparison. */
2952 static enum rtx_code
2953 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2954 enum machine_mode *pmode1, enum machine_mode *pmode2)
2956 rtx arg1, arg2;
2958 arg1 = *parg1, arg2 = *parg2;
2960 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2962 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2964 /* Set nonzero when we find something of interest. */
2965 rtx x = 0;
2966 int reverse_code = 0;
2967 struct table_elt *p = 0;
2969 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2970 On machines with CC0, this is the only case that can occur, since
2971 fold_rtx will return the COMPARE or item being compared with zero
2972 when given CC0. */
2974 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2975 x = arg1;
2977 /* If ARG1 is a comparison operator and CODE is testing for
2978 STORE_FLAG_VALUE, get the inner arguments. */
2980 else if (COMPARISON_P (arg1))
2982 #ifdef FLOAT_STORE_FLAG_VALUE
2983 REAL_VALUE_TYPE fsfv;
2984 #endif
2986 if (code == NE
2987 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2988 && code == LT && STORE_FLAG_VALUE == -1)
2989 #ifdef FLOAT_STORE_FLAG_VALUE
2990 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2991 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2992 REAL_VALUE_NEGATIVE (fsfv)))
2993 #endif
2995 x = arg1;
2996 else if (code == EQ
2997 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2998 && code == GE && STORE_FLAG_VALUE == -1)
2999 #ifdef FLOAT_STORE_FLAG_VALUE
3000 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3001 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3002 REAL_VALUE_NEGATIVE (fsfv)))
3003 #endif
3005 x = arg1, reverse_code = 1;
3008 /* ??? We could also check for
3010 (ne (and (eq (...) (const_int 1))) (const_int 0))
3012 and related forms, but let's wait until we see them occurring. */
3014 if (x == 0)
3015 /* Look up ARG1 in the hash table and see if it has an equivalence
3016 that lets us see what is being compared. */
3017 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3018 GET_MODE (arg1));
3019 if (p)
3021 p = p->first_same_value;
3023 /* If what we compare is already known to be constant, that is as
3024 good as it gets.
3025 We need to break the loop in this case, because otherwise we
3026 can have an infinite loop when looking at a reg that is known
3027 to be a constant which is the same as a comparison of a reg
3028 against zero which appears later in the insn stream, which in
3029 turn is constant and the same as the comparison of the first reg
3030 against zero... */
3031 if (p->is_const)
3032 break;
3035 for (; p; p = p->next_same_value)
3037 enum machine_mode inner_mode = GET_MODE (p->exp);
3038 #ifdef FLOAT_STORE_FLAG_VALUE
3039 REAL_VALUE_TYPE fsfv;
3040 #endif
3042 /* If the entry isn't valid, skip it. */
3043 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3044 continue;
3046 if (GET_CODE (p->exp) == COMPARE
3047 /* Another possibility is that this machine has a compare insn
3048 that includes the comparison code. In that case, ARG1 would
3049 be equivalent to a comparison operation that would set ARG1 to
3050 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3051 ORIG_CODE is the actual comparison being done; if it is an EQ,
3052 we must reverse ORIG_CODE. On machine with a negative value
3053 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3054 || ((code == NE
3055 || (code == LT
3056 && GET_MODE_CLASS (inner_mode) == MODE_INT
3057 && (GET_MODE_BITSIZE (inner_mode)
3058 <= HOST_BITS_PER_WIDE_INT)
3059 && (STORE_FLAG_VALUE
3060 & ((HOST_WIDE_INT) 1
3061 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3062 #ifdef FLOAT_STORE_FLAG_VALUE
3063 || (code == LT
3064 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3065 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3066 REAL_VALUE_NEGATIVE (fsfv)))
3067 #endif
3069 && COMPARISON_P (p->exp)))
3071 x = p->exp;
3072 break;
3074 else if ((code == EQ
3075 || (code == GE
3076 && GET_MODE_CLASS (inner_mode) == MODE_INT
3077 && (GET_MODE_BITSIZE (inner_mode)
3078 <= HOST_BITS_PER_WIDE_INT)
3079 && (STORE_FLAG_VALUE
3080 & ((HOST_WIDE_INT) 1
3081 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3082 #ifdef FLOAT_STORE_FLAG_VALUE
3083 || (code == GE
3084 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3085 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3086 REAL_VALUE_NEGATIVE (fsfv)))
3087 #endif
3089 && COMPARISON_P (p->exp))
3091 reverse_code = 1;
3092 x = p->exp;
3093 break;
3096 /* If this non-trapping address, e.g. fp + constant, the
3097 equivalent is a better operand since it may let us predict
3098 the value of the comparison. */
3099 else if (!rtx_addr_can_trap_p (p->exp))
3101 arg1 = p->exp;
3102 continue;
3106 /* If we didn't find a useful equivalence for ARG1, we are done.
3107 Otherwise, set up for the next iteration. */
3108 if (x == 0)
3109 break;
3111 /* If we need to reverse the comparison, make sure that that is
3112 possible -- we can't necessarily infer the value of GE from LT
3113 with floating-point operands. */
3114 if (reverse_code)
3116 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3117 if (reversed == UNKNOWN)
3118 break;
3119 else
3120 code = reversed;
3122 else if (COMPARISON_P (x))
3123 code = GET_CODE (x);
3124 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3127 /* Return our results. Return the modes from before fold_rtx
3128 because fold_rtx might produce const_int, and then it's too late. */
3129 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3130 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3132 return code;
3135 /* If X is a nontrivial arithmetic operation on an argument
3136 for which a constant value can be determined, return
3137 the result of operating on that value, as a constant.
3138 Otherwise, return X, possibly with one or more operands
3139 modified by recursive calls to this function.
3141 If X is a register whose contents are known, we do NOT
3142 return those contents here. equiv_constant is called to
3143 perform that task.
3145 INSN is the insn that we may be modifying. If it is 0, make a copy
3146 of X before modifying it. */
3148 static rtx
3149 fold_rtx (rtx x, rtx insn)
3151 enum rtx_code code;
3152 enum machine_mode mode;
3153 const char *fmt;
3154 int i;
3155 rtx new = 0;
3156 int copied = 0;
3157 int must_swap = 0;
3159 /* Folded equivalents of first two operands of X. */
3160 rtx folded_arg0;
3161 rtx folded_arg1;
3163 /* Constant equivalents of first three operands of X;
3164 0 when no such equivalent is known. */
3165 rtx const_arg0;
3166 rtx const_arg1;
3167 rtx const_arg2;
3169 /* The mode of the first operand of X. We need this for sign and zero
3170 extends. */
3171 enum machine_mode mode_arg0;
3173 if (x == 0)
3174 return x;
3176 mode = GET_MODE (x);
3177 code = GET_CODE (x);
3178 switch (code)
3180 case CONST:
3181 case CONST_INT:
3182 case CONST_DOUBLE:
3183 case CONST_VECTOR:
3184 case SYMBOL_REF:
3185 case LABEL_REF:
3186 case REG:
3187 /* No use simplifying an EXPR_LIST
3188 since they are used only for lists of args
3189 in a function call's REG_EQUAL note. */
3190 case EXPR_LIST:
3191 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3192 want to (e.g.,) make (addressof (const_int 0)) just because
3193 the location is known to be zero. */
3194 case ADDRESSOF:
3195 return x;
3197 #ifdef HAVE_cc0
3198 case CC0:
3199 return prev_insn_cc0;
3200 #endif
3202 case PC:
3203 /* If the next insn is a CODE_LABEL followed by a jump table,
3204 PC's value is a LABEL_REF pointing to that label. That
3205 lets us fold switch statements on the VAX. */
3207 rtx next;
3208 if (insn && tablejump_p (insn, &next, NULL))
3209 return gen_rtx_LABEL_REF (Pmode, next);
3211 break;
3213 case SUBREG:
3214 /* See if we previously assigned a constant value to this SUBREG. */
3215 if ((new = lookup_as_function (x, CONST_INT)) != 0
3216 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3217 return new;
3219 /* If this is a paradoxical SUBREG, we have no idea what value the
3220 extra bits would have. However, if the operand is equivalent
3221 to a SUBREG whose operand is the same as our mode, and all the
3222 modes are within a word, we can just use the inner operand
3223 because these SUBREGs just say how to treat the register.
3225 Similarly if we find an integer constant. */
3227 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3229 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3230 struct table_elt *elt;
3232 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3233 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3234 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3235 imode)) != 0)
3236 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3238 if (CONSTANT_P (elt->exp)
3239 && GET_MODE (elt->exp) == VOIDmode)
3240 return elt->exp;
3242 if (GET_CODE (elt->exp) == SUBREG
3243 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3244 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3245 return copy_rtx (SUBREG_REG (elt->exp));
3248 return x;
3251 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3252 We might be able to if the SUBREG is extracting a single word in an
3253 integral mode or extracting the low part. */
3255 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3256 const_arg0 = equiv_constant (folded_arg0);
3257 if (const_arg0)
3258 folded_arg0 = const_arg0;
3260 if (folded_arg0 != SUBREG_REG (x))
3262 new = simplify_subreg (mode, folded_arg0,
3263 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3264 if (new)
3265 return new;
3268 if (REG_P (folded_arg0)
3269 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
3271 struct table_elt *elt;
3273 /* We can use HASH here since we know that canon_hash won't be
3274 called. */
3275 elt = lookup (folded_arg0,
3276 HASH (folded_arg0, GET_MODE (folded_arg0)),
3277 GET_MODE (folded_arg0));
3279 if (elt)
3280 elt = elt->first_same_value;
3282 if (subreg_lowpart_p (x))
3283 /* If this is a narrowing SUBREG and our operand is a REG, see
3284 if we can find an equivalence for REG that is an arithmetic
3285 operation in a wider mode where both operands are paradoxical
3286 SUBREGs from objects of our result mode. In that case, we
3287 couldn-t report an equivalent value for that operation, since we
3288 don't know what the extra bits will be. But we can find an
3289 equivalence for this SUBREG by folding that operation in the
3290 narrow mode. This allows us to fold arithmetic in narrow modes
3291 when the machine only supports word-sized arithmetic.
3293 Also look for a case where we have a SUBREG whose operand
3294 is the same as our result. If both modes are smaller
3295 than a word, we are simply interpreting a register in
3296 different modes and we can use the inner value. */
3298 for (; elt; elt = elt->next_same_value)
3300 enum rtx_code eltcode = GET_CODE (elt->exp);
3302 /* Just check for unary and binary operations. */
3303 if (UNARY_P (elt->exp)
3304 && eltcode != SIGN_EXTEND
3305 && eltcode != ZERO_EXTEND
3306 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3307 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3308 && (GET_MODE_CLASS (mode)
3309 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3311 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3313 if (!REG_P (op0) && ! CONSTANT_P (op0))
3314 op0 = fold_rtx (op0, NULL_RTX);
3316 op0 = equiv_constant (op0);
3317 if (op0)
3318 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3319 op0, mode);
3321 else if (ARITHMETIC_P (elt->exp)
3322 && eltcode != DIV && eltcode != MOD
3323 && eltcode != UDIV && eltcode != UMOD
3324 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3325 && eltcode != ROTATE && eltcode != ROTATERT
3326 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3327 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3328 == mode))
3329 || CONSTANT_P (XEXP (elt->exp, 0)))
3330 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3331 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3332 == mode))
3333 || CONSTANT_P (XEXP (elt->exp, 1))))
3335 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3336 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3338 if (op0 && !REG_P (op0) && ! CONSTANT_P (op0))
3339 op0 = fold_rtx (op0, NULL_RTX);
3341 if (op0)
3342 op0 = equiv_constant (op0);
3344 if (op1 && !REG_P (op1) && ! CONSTANT_P (op1))
3345 op1 = fold_rtx (op1, NULL_RTX);
3347 if (op1)
3348 op1 = equiv_constant (op1);
3350 /* If we are looking for the low SImode part of
3351 (ashift:DI c (const_int 32)), it doesn't work
3352 to compute that in SImode, because a 32-bit shift
3353 in SImode is unpredictable. We know the value is 0. */
3354 if (op0 && op1
3355 && GET_CODE (elt->exp) == ASHIFT
3356 && GET_CODE (op1) == CONST_INT
3357 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3359 if (INTVAL (op1)
3360 < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3361 /* If the count fits in the inner mode's width,
3362 but exceeds the outer mode's width,
3363 the value will get truncated to 0
3364 by the subreg. */
3365 new = CONST0_RTX (mode);
3366 else
3367 /* If the count exceeds even the inner mode's width,
3368 don't fold this expression. */
3369 new = 0;
3371 else if (op0 && op1)
3372 new = simplify_binary_operation (GET_CODE (elt->exp), mode, op0, op1);
3375 else if (GET_CODE (elt->exp) == SUBREG
3376 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3377 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3378 <= UNITS_PER_WORD)
3379 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3380 new = copy_rtx (SUBREG_REG (elt->exp));
3382 if (new)
3383 return new;
3385 else
3386 /* A SUBREG resulting from a zero extension may fold to zero if
3387 it extracts higher bits than the ZERO_EXTEND's source bits.
3388 FIXME: if combine tried to, er, combine these instructions,
3389 this transformation may be moved to simplify_subreg. */
3390 for (; elt; elt = elt->next_same_value)
3392 if (GET_CODE (elt->exp) == ZERO_EXTEND
3393 && subreg_lsb (x)
3394 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0))))
3395 return CONST0_RTX (mode);
3399 return x;
3401 case NOT:
3402 case NEG:
3403 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3404 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3405 new = lookup_as_function (XEXP (x, 0), code);
3406 if (new)
3407 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3408 break;
3410 case MEM:
3411 /* If we are not actually processing an insn, don't try to find the
3412 best address. Not only don't we care, but we could modify the
3413 MEM in an invalid way since we have no insn to validate against. */
3414 if (insn != 0)
3415 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3418 /* Even if we don't fold in the insn itself,
3419 we can safely do so here, in hopes of getting a constant. */
3420 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3421 rtx base = 0;
3422 HOST_WIDE_INT offset = 0;
3424 if (REG_P (addr)
3425 && REGNO_QTY_VALID_P (REGNO (addr)))
3427 int addr_q = REG_QTY (REGNO (addr));
3428 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3430 if (GET_MODE (addr) == addr_ent->mode
3431 && addr_ent->const_rtx != NULL_RTX)
3432 addr = addr_ent->const_rtx;
3435 /* If address is constant, split it into a base and integer offset. */
3436 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3437 base = addr;
3438 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3439 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3441 base = XEXP (XEXP (addr, 0), 0);
3442 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3444 else if (GET_CODE (addr) == LO_SUM
3445 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3446 base = XEXP (addr, 1);
3447 else if (GET_CODE (addr) == ADDRESSOF)
3448 return change_address (x, VOIDmode, addr);
3450 /* If this is a constant pool reference, we can fold it into its
3451 constant to allow better value tracking. */
3452 if (base && GET_CODE (base) == SYMBOL_REF
3453 && CONSTANT_POOL_ADDRESS_P (base))
3455 rtx constant = get_pool_constant (base);
3456 enum machine_mode const_mode = get_pool_mode (base);
3457 rtx new;
3459 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3461 constant_pool_entries_cost = COST (constant);
3462 constant_pool_entries_regcost = approx_reg_cost (constant);
3465 /* If we are loading the full constant, we have an equivalence. */
3466 if (offset == 0 && mode == const_mode)
3467 return constant;
3469 /* If this actually isn't a constant (weird!), we can't do
3470 anything. Otherwise, handle the two most common cases:
3471 extracting a word from a multi-word constant, and extracting
3472 the low-order bits. Other cases don't seem common enough to
3473 worry about. */
3474 if (! CONSTANT_P (constant))
3475 return x;
3477 if (GET_MODE_CLASS (mode) == MODE_INT
3478 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3479 && offset % UNITS_PER_WORD == 0
3480 && (new = operand_subword (constant,
3481 offset / UNITS_PER_WORD,
3482 0, const_mode)) != 0)
3483 return new;
3485 if (((BYTES_BIG_ENDIAN
3486 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3487 || (! BYTES_BIG_ENDIAN && offset == 0))
3488 && (new = gen_lowpart (mode, constant)) != 0)
3489 return new;
3492 /* If this is a reference to a label at a known position in a jump
3493 table, we also know its value. */
3494 if (base && GET_CODE (base) == LABEL_REF)
3496 rtx label = XEXP (base, 0);
3497 rtx table_insn = NEXT_INSN (label);
3499 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3500 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3502 rtx table = PATTERN (table_insn);
3504 if (offset >= 0
3505 && (offset / GET_MODE_SIZE (GET_MODE (table))
3506 < XVECLEN (table, 0)))
3507 return XVECEXP (table, 0,
3508 offset / GET_MODE_SIZE (GET_MODE (table)));
3510 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3511 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3513 rtx table = PATTERN (table_insn);
3515 if (offset >= 0
3516 && (offset / GET_MODE_SIZE (GET_MODE (table))
3517 < XVECLEN (table, 1)))
3519 offset /= GET_MODE_SIZE (GET_MODE (table));
3520 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3521 XEXP (table, 0));
3523 if (GET_MODE (table) != Pmode)
3524 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3526 /* Indicate this is a constant. This isn't a
3527 valid form of CONST, but it will only be used
3528 to fold the next insns and then discarded, so
3529 it should be safe.
3531 Note this expression must be explicitly discarded,
3532 by cse_insn, else it may end up in a REG_EQUAL note
3533 and "escape" to cause problems elsewhere. */
3534 return gen_rtx_CONST (GET_MODE (new), new);
3539 return x;
3542 #ifdef NO_FUNCTION_CSE
3543 case CALL:
3544 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3545 return x;
3546 break;
3547 #endif
3549 case ASM_OPERANDS:
3550 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3551 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3552 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3553 break;
3555 default:
3556 break;
3559 const_arg0 = 0;
3560 const_arg1 = 0;
3561 const_arg2 = 0;
3562 mode_arg0 = VOIDmode;
3564 /* Try folding our operands.
3565 Then see which ones have constant values known. */
3567 fmt = GET_RTX_FORMAT (code);
3568 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3569 if (fmt[i] == 'e')
3571 rtx arg = XEXP (x, i);
3572 rtx folded_arg = arg, const_arg = 0;
3573 enum machine_mode mode_arg = GET_MODE (arg);
3574 rtx cheap_arg, expensive_arg;
3575 rtx replacements[2];
3576 int j;
3577 int old_cost = COST_IN (XEXP (x, i), code);
3579 /* Most arguments are cheap, so handle them specially. */
3580 switch (GET_CODE (arg))
3582 case REG:
3583 /* This is the same as calling equiv_constant; it is duplicated
3584 here for speed. */
3585 if (REGNO_QTY_VALID_P (REGNO (arg)))
3587 int arg_q = REG_QTY (REGNO (arg));
3588 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3590 if (arg_ent->const_rtx != NULL_RTX
3591 && !REG_P (arg_ent->const_rtx)
3592 && GET_CODE (arg_ent->const_rtx) != PLUS)
3593 const_arg
3594 = gen_lowpart (GET_MODE (arg),
3595 arg_ent->const_rtx);
3597 break;
3599 case CONST:
3600 case CONST_INT:
3601 case SYMBOL_REF:
3602 case LABEL_REF:
3603 case CONST_DOUBLE:
3604 case CONST_VECTOR:
3605 const_arg = arg;
3606 break;
3608 #ifdef HAVE_cc0
3609 case CC0:
3610 folded_arg = prev_insn_cc0;
3611 mode_arg = prev_insn_cc0_mode;
3612 const_arg = equiv_constant (folded_arg);
3613 break;
3614 #endif
3616 default:
3617 folded_arg = fold_rtx (arg, insn);
3618 const_arg = equiv_constant (folded_arg);
3621 /* For the first three operands, see if the operand
3622 is constant or equivalent to a constant. */
3623 switch (i)
3625 case 0:
3626 folded_arg0 = folded_arg;
3627 const_arg0 = const_arg;
3628 mode_arg0 = mode_arg;
3629 break;
3630 case 1:
3631 folded_arg1 = folded_arg;
3632 const_arg1 = const_arg;
3633 break;
3634 case 2:
3635 const_arg2 = const_arg;
3636 break;
3639 /* Pick the least expensive of the folded argument and an
3640 equivalent constant argument. */
3641 if (const_arg == 0 || const_arg == folded_arg
3642 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3643 cheap_arg = folded_arg, expensive_arg = const_arg;
3644 else
3645 cheap_arg = const_arg, expensive_arg = folded_arg;
3647 /* Try to replace the operand with the cheapest of the two
3648 possibilities. If it doesn't work and this is either of the first
3649 two operands of a commutative operation, try swapping them.
3650 If THAT fails, try the more expensive, provided it is cheaper
3651 than what is already there. */
3653 if (cheap_arg == XEXP (x, i))
3654 continue;
3656 if (insn == 0 && ! copied)
3658 x = copy_rtx (x);
3659 copied = 1;
3662 /* Order the replacements from cheapest to most expensive. */
3663 replacements[0] = cheap_arg;
3664 replacements[1] = expensive_arg;
3666 for (j = 0; j < 2 && replacements[j]; j++)
3668 int new_cost = COST_IN (replacements[j], code);
3670 /* Stop if what existed before was cheaper. Prefer constants
3671 in the case of a tie. */
3672 if (new_cost > old_cost
3673 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3674 break;
3676 /* It's not safe to substitute the operand of a conversion
3677 operator with a constant, as the conversion's identity
3678 depends upon the mode of it's operand. This optimization
3679 is handled by the call to simplify_unary_operation. */
3680 if (GET_RTX_CLASS (code) == RTX_UNARY
3681 && GET_MODE (replacements[j]) != mode_arg0
3682 && (code == ZERO_EXTEND
3683 || code == SIGN_EXTEND
3684 || code == TRUNCATE
3685 || code == FLOAT_TRUNCATE
3686 || code == FLOAT_EXTEND
3687 || code == FLOAT
3688 || code == FIX
3689 || code == UNSIGNED_FLOAT
3690 || code == UNSIGNED_FIX))
3691 continue;
3693 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3694 break;
3696 if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
3697 || GET_RTX_CLASS (code) == RTX_COMM_ARITH)
3699 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3700 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3702 if (apply_change_group ())
3704 /* Swap them back to be invalid so that this loop can
3705 continue and flag them to be swapped back later. */
3706 rtx tem;
3708 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3709 XEXP (x, 1) = tem;
3710 must_swap = 1;
3711 break;
3717 else
3719 if (fmt[i] == 'E')
3720 /* Don't try to fold inside of a vector of expressions.
3721 Doing nothing is harmless. */
3725 /* If a commutative operation, place a constant integer as the second
3726 operand unless the first operand is also a constant integer. Otherwise,
3727 place any constant second unless the first operand is also a constant. */
3729 if (COMMUTATIVE_P (x))
3731 if (must_swap
3732 || swap_commutative_operands_p (const_arg0 ? const_arg0
3733 : XEXP (x, 0),
3734 const_arg1 ? const_arg1
3735 : XEXP (x, 1)))
3737 rtx tem = XEXP (x, 0);
3739 if (insn == 0 && ! copied)
3741 x = copy_rtx (x);
3742 copied = 1;
3745 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3746 validate_change (insn, &XEXP (x, 1), tem, 1);
3747 if (apply_change_group ())
3749 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3750 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3755 /* If X is an arithmetic operation, see if we can simplify it. */
3757 switch (GET_RTX_CLASS (code))
3759 case RTX_UNARY:
3761 int is_const = 0;
3763 /* We can't simplify extension ops unless we know the
3764 original mode. */
3765 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3766 && mode_arg0 == VOIDmode)
3767 break;
3769 /* If we had a CONST, strip it off and put it back later if we
3770 fold. */
3771 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3772 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3774 new = simplify_unary_operation (code, mode,
3775 const_arg0 ? const_arg0 : folded_arg0,
3776 mode_arg0);
3777 if (new != 0 && is_const)
3778 new = gen_rtx_CONST (mode, new);
3780 break;
3782 case RTX_COMPARE:
3783 case RTX_COMM_COMPARE:
3784 /* See what items are actually being compared and set FOLDED_ARG[01]
3785 to those values and CODE to the actual comparison code. If any are
3786 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3787 do anything if both operands are already known to be constant. */
3789 if (const_arg0 == 0 || const_arg1 == 0)
3791 struct table_elt *p0, *p1;
3792 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3793 enum machine_mode mode_arg1;
3795 #ifdef FLOAT_STORE_FLAG_VALUE
3796 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3798 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3799 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3800 false_rtx = CONST0_RTX (mode);
3802 #endif
3804 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3805 &mode_arg0, &mode_arg1);
3806 const_arg0 = equiv_constant (folded_arg0);
3807 const_arg1 = equiv_constant (folded_arg1);
3809 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3810 what kinds of things are being compared, so we can't do
3811 anything with this comparison. */
3813 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3814 break;
3816 /* If we do not now have two constants being compared, see
3817 if we can nevertheless deduce some things about the
3818 comparison. */
3819 if (const_arg0 == 0 || const_arg1 == 0)
3821 /* Some addresses are known to be nonzero. We don't know
3822 their sign, but equality comparisons are known. */
3823 if (const_arg1 == const0_rtx
3824 && nonzero_address_p (folded_arg0))
3826 if (code == EQ)
3827 return false_rtx;
3828 else if (code == NE)
3829 return true_rtx;
3832 /* See if the two operands are the same. */
3834 if (folded_arg0 == folded_arg1
3835 || (REG_P (folded_arg0)
3836 && REG_P (folded_arg1)
3837 && (REG_QTY (REGNO (folded_arg0))
3838 == REG_QTY (REGNO (folded_arg1))))
3839 || ((p0 = lookup (folded_arg0,
3840 (safe_hash (folded_arg0, mode_arg0)
3841 & HASH_MASK), mode_arg0))
3842 && (p1 = lookup (folded_arg1,
3843 (safe_hash (folded_arg1, mode_arg0)
3844 & HASH_MASK), mode_arg0))
3845 && p0->first_same_value == p1->first_same_value))
3847 /* Sadly two equal NaNs are not equivalent. */
3848 if (!HONOR_NANS (mode_arg0))
3849 return ((code == EQ || code == LE || code == GE
3850 || code == LEU || code == GEU || code == UNEQ
3851 || code == UNLE || code == UNGE
3852 || code == ORDERED)
3853 ? true_rtx : false_rtx);
3854 /* Take care for the FP compares we can resolve. */
3855 if (code == UNEQ || code == UNLE || code == UNGE)
3856 return true_rtx;
3857 if (code == LTGT || code == LT || code == GT)
3858 return false_rtx;
3861 /* If FOLDED_ARG0 is a register, see if the comparison we are
3862 doing now is either the same as we did before or the reverse
3863 (we only check the reverse if not floating-point). */
3864 else if (REG_P (folded_arg0))
3866 int qty = REG_QTY (REGNO (folded_arg0));
3868 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3870 struct qty_table_elem *ent = &qty_table[qty];
3872 if ((comparison_dominates_p (ent->comparison_code, code)
3873 || (! FLOAT_MODE_P (mode_arg0)
3874 && comparison_dominates_p (ent->comparison_code,
3875 reverse_condition (code))))
3876 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3877 || (const_arg1
3878 && rtx_equal_p (ent->comparison_const,
3879 const_arg1))
3880 || (REG_P (folded_arg1)
3881 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3882 return (comparison_dominates_p (ent->comparison_code, code)
3883 ? true_rtx : false_rtx);
3889 /* If we are comparing against zero, see if the first operand is
3890 equivalent to an IOR with a constant. If so, we may be able to
3891 determine the result of this comparison. */
3893 if (const_arg1 == const0_rtx)
3895 rtx y = lookup_as_function (folded_arg0, IOR);
3896 rtx inner_const;
3898 if (y != 0
3899 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3900 && GET_CODE (inner_const) == CONST_INT
3901 && INTVAL (inner_const) != 0)
3903 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3904 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3905 && (INTVAL (inner_const)
3906 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3907 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3909 #ifdef FLOAT_STORE_FLAG_VALUE
3910 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3912 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3913 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3914 false_rtx = CONST0_RTX (mode);
3916 #endif
3918 switch (code)
3920 case EQ:
3921 return false_rtx;
3922 case NE:
3923 return true_rtx;
3924 case LT: case LE:
3925 if (has_sign)
3926 return true_rtx;
3927 break;
3928 case GT: case GE:
3929 if (has_sign)
3930 return false_rtx;
3931 break;
3932 default:
3933 break;
3939 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3940 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3941 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3943 break;
3945 case RTX_BIN_ARITH:
3946 case RTX_COMM_ARITH:
3947 switch (code)
3949 case PLUS:
3950 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3951 with that LABEL_REF as its second operand. If so, the result is
3952 the first operand of that MINUS. This handles switches with an
3953 ADDR_DIFF_VEC table. */
3954 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3956 rtx y
3957 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3958 : lookup_as_function (folded_arg0, MINUS);
3960 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3961 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3962 return XEXP (y, 0);
3964 /* Now try for a CONST of a MINUS like the above. */
3965 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3966 : lookup_as_function (folded_arg0, CONST))) != 0
3967 && GET_CODE (XEXP (y, 0)) == MINUS
3968 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3969 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3970 return XEXP (XEXP (y, 0), 0);
3973 /* Likewise if the operands are in the other order. */
3974 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3976 rtx y
3977 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3978 : lookup_as_function (folded_arg1, MINUS);
3980 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3981 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3982 return XEXP (y, 0);
3984 /* Now try for a CONST of a MINUS like the above. */
3985 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3986 : lookup_as_function (folded_arg1, CONST))) != 0
3987 && GET_CODE (XEXP (y, 0)) == MINUS
3988 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3989 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3990 return XEXP (XEXP (y, 0), 0);
3993 /* If second operand is a register equivalent to a negative
3994 CONST_INT, see if we can find a register equivalent to the
3995 positive constant. Make a MINUS if so. Don't do this for
3996 a non-negative constant since we might then alternate between
3997 choosing positive and negative constants. Having the positive
3998 constant previously-used is the more common case. Be sure
3999 the resulting constant is non-negative; if const_arg1 were
4000 the smallest negative number this would overflow: depending
4001 on the mode, this would either just be the same value (and
4002 hence not save anything) or be incorrect. */
4003 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4004 && INTVAL (const_arg1) < 0
4005 /* This used to test
4007 -INTVAL (const_arg1) >= 0
4009 But The Sun V5.0 compilers mis-compiled that test. So
4010 instead we test for the problematic value in a more direct
4011 manner and hope the Sun compilers get it correct. */
4012 && INTVAL (const_arg1) !=
4013 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4014 && REG_P (folded_arg1))
4016 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4017 struct table_elt *p
4018 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4019 mode);
4021 if (p)
4022 for (p = p->first_same_value; p; p = p->next_same_value)
4023 if (REG_P (p->exp))
4024 return simplify_gen_binary (MINUS, mode, folded_arg0,
4025 canon_reg (p->exp, NULL_RTX));
4027 goto from_plus;
4029 case MINUS:
4030 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4031 If so, produce (PLUS Z C2-C). */
4032 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4034 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4035 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4036 return fold_rtx (plus_constant (copy_rtx (y),
4037 -INTVAL (const_arg1)),
4038 NULL_RTX);
4041 /* Fall through. */
4043 from_plus:
4044 case SMIN: case SMAX: case UMIN: case UMAX:
4045 case IOR: case AND: case XOR:
4046 case MULT:
4047 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4048 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4049 is known to be of similar form, we may be able to replace the
4050 operation with a combined operation. This may eliminate the
4051 intermediate operation if every use is simplified in this way.
4052 Note that the similar optimization done by combine.c only works
4053 if the intermediate operation's result has only one reference. */
4055 if (REG_P (folded_arg0)
4056 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4058 int is_shift
4059 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4060 rtx y = lookup_as_function (folded_arg0, code);
4061 rtx inner_const;
4062 enum rtx_code associate_code;
4063 rtx new_const;
4065 if (y == 0
4066 || 0 == (inner_const
4067 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4068 || GET_CODE (inner_const) != CONST_INT
4069 /* If we have compiled a statement like
4070 "if (x == (x & mask1))", and now are looking at
4071 "x & mask2", we will have a case where the first operand
4072 of Y is the same as our first operand. Unless we detect
4073 this case, an infinite loop will result. */
4074 || XEXP (y, 0) == folded_arg0)
4075 break;
4077 /* Don't associate these operations if they are a PLUS with the
4078 same constant and it is a power of two. These might be doable
4079 with a pre- or post-increment. Similarly for two subtracts of
4080 identical powers of two with post decrement. */
4082 if (code == PLUS && const_arg1 == inner_const
4083 && ((HAVE_PRE_INCREMENT
4084 && exact_log2 (INTVAL (const_arg1)) >= 0)
4085 || (HAVE_POST_INCREMENT
4086 && exact_log2 (INTVAL (const_arg1)) >= 0)
4087 || (HAVE_PRE_DECREMENT
4088 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4089 || (HAVE_POST_DECREMENT
4090 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4091 break;
4093 /* Compute the code used to compose the constants. For example,
4094 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4096 associate_code = (is_shift || code == MINUS ? PLUS : code);
4098 new_const = simplify_binary_operation (associate_code, mode,
4099 const_arg1, inner_const);
4101 if (new_const == 0)
4102 break;
4104 /* If we are associating shift operations, don't let this
4105 produce a shift of the size of the object or larger.
4106 This could occur when we follow a sign-extend by a right
4107 shift on a machine that does a sign-extend as a pair
4108 of shifts. */
4110 if (is_shift && GET_CODE (new_const) == CONST_INT
4111 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4113 /* As an exception, we can turn an ASHIFTRT of this
4114 form into a shift of the number of bits - 1. */
4115 if (code == ASHIFTRT)
4116 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4117 else
4118 break;
4121 y = copy_rtx (XEXP (y, 0));
4123 /* If Y contains our first operand (the most common way this
4124 can happen is if Y is a MEM), we would do into an infinite
4125 loop if we tried to fold it. So don't in that case. */
4127 if (! reg_mentioned_p (folded_arg0, y))
4128 y = fold_rtx (y, insn);
4130 return simplify_gen_binary (code, mode, y, new_const);
4132 break;
4134 case DIV: case UDIV:
4135 /* ??? The associative optimization performed immediately above is
4136 also possible for DIV and UDIV using associate_code of MULT.
4137 However, we would need extra code to verify that the
4138 multiplication does not overflow, that is, there is no overflow
4139 in the calculation of new_const. */
4140 break;
4142 default:
4143 break;
4146 new = simplify_binary_operation (code, mode,
4147 const_arg0 ? const_arg0 : folded_arg0,
4148 const_arg1 ? const_arg1 : folded_arg1);
4149 break;
4151 case RTX_OBJ:
4152 /* (lo_sum (high X) X) is simply X. */
4153 if (code == LO_SUM && const_arg0 != 0
4154 && GET_CODE (const_arg0) == HIGH
4155 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4156 return const_arg1;
4157 break;
4159 case RTX_TERNARY:
4160 case RTX_BITFIELD_OPS:
4161 new = simplify_ternary_operation (code, mode, mode_arg0,
4162 const_arg0 ? const_arg0 : folded_arg0,
4163 const_arg1 ? const_arg1 : folded_arg1,
4164 const_arg2 ? const_arg2 : XEXP (x, 2));
4165 break;
4167 default:
4168 break;
4171 return new ? new : x;
4174 /* Return a constant value currently equivalent to X.
4175 Return 0 if we don't know one. */
4177 static rtx
4178 equiv_constant (rtx x)
4180 if (REG_P (x)
4181 && REGNO_QTY_VALID_P (REGNO (x)))
4183 int x_q = REG_QTY (REGNO (x));
4184 struct qty_table_elem *x_ent = &qty_table[x_q];
4186 if (x_ent->const_rtx)
4187 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
4190 if (x == 0 || CONSTANT_P (x))
4191 return x;
4193 /* If X is a MEM, try to fold it outside the context of any insn to see if
4194 it might be equivalent to a constant. That handles the case where it
4195 is a constant-pool reference. Then try to look it up in the hash table
4196 in case it is something whose value we have seen before. */
4198 if (GET_CODE (x) == MEM)
4200 struct table_elt *elt;
4202 x = fold_rtx (x, NULL_RTX);
4203 if (CONSTANT_P (x))
4204 return x;
4206 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4207 if (elt == 0)
4208 return 0;
4210 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4211 if (elt->is_const && CONSTANT_P (elt->exp))
4212 return elt->exp;
4215 return 0;
4218 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4219 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4220 least-significant part of X.
4221 MODE specifies how big a part of X to return.
4223 If the requested operation cannot be done, 0 is returned.
4225 This is similar to gen_lowpart_general in emit-rtl.c. */
4228 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4230 rtx result = gen_lowpart_common (mode, x);
4232 if (result)
4233 return result;
4234 else if (GET_CODE (x) == MEM)
4236 /* This is the only other case we handle. */
4237 int offset = 0;
4238 rtx new;
4240 if (WORDS_BIG_ENDIAN)
4241 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4242 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4243 if (BYTES_BIG_ENDIAN)
4244 /* Adjust the address so that the address-after-the-data is
4245 unchanged. */
4246 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4247 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4249 new = adjust_address_nv (x, mode, offset);
4250 if (! memory_address_p (mode, XEXP (new, 0)))
4251 return 0;
4253 return new;
4255 else
4256 return 0;
4259 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4260 branch. It will be zero if not.
4262 In certain cases, this can cause us to add an equivalence. For example,
4263 if we are following the taken case of
4264 if (i == 2)
4265 we can add the fact that `i' and '2' are now equivalent.
4267 In any case, we can record that this comparison was passed. If the same
4268 comparison is seen later, we will know its value. */
4270 static void
4271 record_jump_equiv (rtx insn, int taken)
4273 int cond_known_true;
4274 rtx op0, op1;
4275 rtx set;
4276 enum machine_mode mode, mode0, mode1;
4277 int reversed_nonequality = 0;
4278 enum rtx_code code;
4280 /* Ensure this is the right kind of insn. */
4281 if (! any_condjump_p (insn))
4282 return;
4283 set = pc_set (insn);
4285 /* See if this jump condition is known true or false. */
4286 if (taken)
4287 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4288 else
4289 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4291 /* Get the type of comparison being done and the operands being compared.
4292 If we had to reverse a non-equality condition, record that fact so we
4293 know that it isn't valid for floating-point. */
4294 code = GET_CODE (XEXP (SET_SRC (set), 0));
4295 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4296 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4298 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4299 if (! cond_known_true)
4301 code = reversed_comparison_code_parts (code, op0, op1, insn);
4303 /* Don't remember if we can't find the inverse. */
4304 if (code == UNKNOWN)
4305 return;
4308 /* The mode is the mode of the non-constant. */
4309 mode = mode0;
4310 if (mode1 != VOIDmode)
4311 mode = mode1;
4313 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4316 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4317 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4318 Make any useful entries we can with that information. Called from
4319 above function and called recursively. */
4321 static void
4322 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4323 rtx op1, int reversed_nonequality)
4325 unsigned op0_hash, op1_hash;
4326 int op0_in_memory, op1_in_memory;
4327 struct table_elt *op0_elt, *op1_elt;
4329 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4330 we know that they are also equal in the smaller mode (this is also
4331 true for all smaller modes whether or not there is a SUBREG, but
4332 is not worth testing for with no SUBREG). */
4334 /* Note that GET_MODE (op0) may not equal MODE. */
4335 if (code == EQ && GET_CODE (op0) == SUBREG
4336 && (GET_MODE_SIZE (GET_MODE (op0))
4337 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4339 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4340 rtx tem = gen_lowpart (inner_mode, op1);
4342 record_jump_cond (code, mode, SUBREG_REG (op0),
4343 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4344 reversed_nonequality);
4347 if (code == EQ && GET_CODE (op1) == SUBREG
4348 && (GET_MODE_SIZE (GET_MODE (op1))
4349 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4351 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4352 rtx tem = gen_lowpart (inner_mode, op0);
4354 record_jump_cond (code, mode, SUBREG_REG (op1),
4355 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4356 reversed_nonequality);
4359 /* Similarly, if this is an NE comparison, and either is a SUBREG
4360 making a smaller mode, we know the whole thing is also NE. */
4362 /* Note that GET_MODE (op0) may not equal MODE;
4363 if we test MODE instead, we can get an infinite recursion
4364 alternating between two modes each wider than MODE. */
4366 if (code == NE && GET_CODE (op0) == SUBREG
4367 && subreg_lowpart_p (op0)
4368 && (GET_MODE_SIZE (GET_MODE (op0))
4369 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4371 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4372 rtx tem = gen_lowpart (inner_mode, op1);
4374 record_jump_cond (code, mode, SUBREG_REG (op0),
4375 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4376 reversed_nonequality);
4379 if (code == NE && GET_CODE (op1) == SUBREG
4380 && subreg_lowpart_p (op1)
4381 && (GET_MODE_SIZE (GET_MODE (op1))
4382 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4384 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4385 rtx tem = gen_lowpart (inner_mode, op0);
4387 record_jump_cond (code, mode, SUBREG_REG (op1),
4388 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4389 reversed_nonequality);
4392 /* Hash both operands. */
4394 do_not_record = 0;
4395 hash_arg_in_memory = 0;
4396 op0_hash = HASH (op0, mode);
4397 op0_in_memory = hash_arg_in_memory;
4399 if (do_not_record)
4400 return;
4402 do_not_record = 0;
4403 hash_arg_in_memory = 0;
4404 op1_hash = HASH (op1, mode);
4405 op1_in_memory = hash_arg_in_memory;
4407 if (do_not_record)
4408 return;
4410 /* Look up both operands. */
4411 op0_elt = lookup (op0, op0_hash, mode);
4412 op1_elt = lookup (op1, op1_hash, mode);
4414 /* If both operands are already equivalent or if they are not in the
4415 table but are identical, do nothing. */
4416 if ((op0_elt != 0 && op1_elt != 0
4417 && op0_elt->first_same_value == op1_elt->first_same_value)
4418 || op0 == op1 || rtx_equal_p (op0, op1))
4419 return;
4421 /* If we aren't setting two things equal all we can do is save this
4422 comparison. Similarly if this is floating-point. In the latter
4423 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4424 If we record the equality, we might inadvertently delete code
4425 whose intent was to change -0 to +0. */
4427 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4429 struct qty_table_elem *ent;
4430 int qty;
4432 /* If we reversed a floating-point comparison, if OP0 is not a
4433 register, or if OP1 is neither a register or constant, we can't
4434 do anything. */
4436 if (!REG_P (op1))
4437 op1 = equiv_constant (op1);
4439 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4440 || !REG_P (op0) || op1 == 0)
4441 return;
4443 /* Put OP0 in the hash table if it isn't already. This gives it a
4444 new quantity number. */
4445 if (op0_elt == 0)
4447 if (insert_regs (op0, NULL, 0))
4449 rehash_using_reg (op0);
4450 op0_hash = HASH (op0, mode);
4452 /* If OP0 is contained in OP1, this changes its hash code
4453 as well. Faster to rehash than to check, except
4454 for the simple case of a constant. */
4455 if (! CONSTANT_P (op1))
4456 op1_hash = HASH (op1,mode);
4459 op0_elt = insert (op0, NULL, op0_hash, mode);
4460 op0_elt->in_memory = op0_in_memory;
4463 qty = REG_QTY (REGNO (op0));
4464 ent = &qty_table[qty];
4466 ent->comparison_code = code;
4467 if (REG_P (op1))
4469 /* Look it up again--in case op0 and op1 are the same. */
4470 op1_elt = lookup (op1, op1_hash, mode);
4472 /* Put OP1 in the hash table so it gets a new quantity number. */
4473 if (op1_elt == 0)
4475 if (insert_regs (op1, NULL, 0))
4477 rehash_using_reg (op1);
4478 op1_hash = HASH (op1, mode);
4481 op1_elt = insert (op1, NULL, op1_hash, mode);
4482 op1_elt->in_memory = op1_in_memory;
4485 ent->comparison_const = NULL_RTX;
4486 ent->comparison_qty = REG_QTY (REGNO (op1));
4488 else
4490 ent->comparison_const = op1;
4491 ent->comparison_qty = -1;
4494 return;
4497 /* If either side is still missing an equivalence, make it now,
4498 then merge the equivalences. */
4500 if (op0_elt == 0)
4502 if (insert_regs (op0, NULL, 0))
4504 rehash_using_reg (op0);
4505 op0_hash = HASH (op0, mode);
4508 op0_elt = insert (op0, NULL, op0_hash, mode);
4509 op0_elt->in_memory = op0_in_memory;
4512 if (op1_elt == 0)
4514 if (insert_regs (op1, NULL, 0))
4516 rehash_using_reg (op1);
4517 op1_hash = HASH (op1, mode);
4520 op1_elt = insert (op1, NULL, op1_hash, mode);
4521 op1_elt->in_memory = op1_in_memory;
4524 merge_equiv_classes (op0_elt, op1_elt);
4525 last_jump_equiv_class = op0_elt;
4528 /* CSE processing for one instruction.
4529 First simplify sources and addresses of all assignments
4530 in the instruction, using previously-computed equivalents values.
4531 Then install the new sources and destinations in the table
4532 of available values.
4534 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4535 the insn. It means that INSN is inside libcall block. In this
4536 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4538 /* Data on one SET contained in the instruction. */
4540 struct set
4542 /* The SET rtx itself. */
4543 rtx rtl;
4544 /* The SET_SRC of the rtx (the original value, if it is changing). */
4545 rtx src;
4546 /* The hash-table element for the SET_SRC of the SET. */
4547 struct table_elt *src_elt;
4548 /* Hash value for the SET_SRC. */
4549 unsigned src_hash;
4550 /* Hash value for the SET_DEST. */
4551 unsigned dest_hash;
4552 /* The SET_DEST, with SUBREG, etc., stripped. */
4553 rtx inner_dest;
4554 /* Nonzero if the SET_SRC is in memory. */
4555 char src_in_memory;
4556 /* Nonzero if the SET_SRC contains something
4557 whose value cannot be predicted and understood. */
4558 char src_volatile;
4559 /* Original machine mode, in case it becomes a CONST_INT.
4560 The size of this field should match the size of the mode
4561 field of struct rtx_def (see rtl.h). */
4562 ENUM_BITFIELD(machine_mode) mode : 8;
4563 /* A constant equivalent for SET_SRC, if any. */
4564 rtx src_const;
4565 /* Original SET_SRC value used for libcall notes. */
4566 rtx orig_src;
4567 /* Hash value of constant equivalent for SET_SRC. */
4568 unsigned src_const_hash;
4569 /* Table entry for constant equivalent for SET_SRC, if any. */
4570 struct table_elt *src_const_elt;
4573 static void
4574 cse_insn (rtx insn, rtx libcall_insn)
4576 rtx x = PATTERN (insn);
4577 int i;
4578 rtx tem;
4579 int n_sets = 0;
4581 #ifdef HAVE_cc0
4582 /* Records what this insn does to set CC0. */
4583 rtx this_insn_cc0 = 0;
4584 enum machine_mode this_insn_cc0_mode = VOIDmode;
4585 #endif
4587 rtx src_eqv = 0;
4588 struct table_elt *src_eqv_elt = 0;
4589 int src_eqv_volatile = 0;
4590 int src_eqv_in_memory = 0;
4591 unsigned src_eqv_hash = 0;
4593 struct set *sets = (struct set *) 0;
4595 this_insn = insn;
4597 /* Find all the SETs and CLOBBERs in this instruction.
4598 Record all the SETs in the array `set' and count them.
4599 Also determine whether there is a CLOBBER that invalidates
4600 all memory references, or all references at varying addresses. */
4602 if (GET_CODE (insn) == CALL_INSN)
4604 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4606 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4607 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4608 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4612 if (GET_CODE (x) == SET)
4614 sets = alloca (sizeof (struct set));
4615 sets[0].rtl = x;
4617 /* Ignore SETs that are unconditional jumps.
4618 They never need cse processing, so this does not hurt.
4619 The reason is not efficiency but rather
4620 so that we can test at the end for instructions
4621 that have been simplified to unconditional jumps
4622 and not be misled by unchanged instructions
4623 that were unconditional jumps to begin with. */
4624 if (SET_DEST (x) == pc_rtx
4625 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4628 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4629 The hard function value register is used only once, to copy to
4630 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4631 Ensure we invalidate the destination register. On the 80386 no
4632 other code would invalidate it since it is a fixed_reg.
4633 We need not check the return of apply_change_group; see canon_reg. */
4635 else if (GET_CODE (SET_SRC (x)) == CALL)
4637 canon_reg (SET_SRC (x), insn);
4638 apply_change_group ();
4639 fold_rtx (SET_SRC (x), insn);
4640 invalidate (SET_DEST (x), VOIDmode);
4642 else
4643 n_sets = 1;
4645 else if (GET_CODE (x) == PARALLEL)
4647 int lim = XVECLEN (x, 0);
4649 sets = alloca (lim * sizeof (struct set));
4651 /* Find all regs explicitly clobbered in this insn,
4652 and ensure they are not replaced with any other regs
4653 elsewhere in this insn.
4654 When a reg that is clobbered is also used for input,
4655 we should presume that that is for a reason,
4656 and we should not substitute some other register
4657 which is not supposed to be clobbered.
4658 Therefore, this loop cannot be merged into the one below
4659 because a CALL may precede a CLOBBER and refer to the
4660 value clobbered. We must not let a canonicalization do
4661 anything in that case. */
4662 for (i = 0; i < lim; i++)
4664 rtx y = XVECEXP (x, 0, i);
4665 if (GET_CODE (y) == CLOBBER)
4667 rtx clobbered = XEXP (y, 0);
4669 if (REG_P (clobbered)
4670 || GET_CODE (clobbered) == SUBREG)
4671 invalidate (clobbered, VOIDmode);
4672 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4673 || GET_CODE (clobbered) == ZERO_EXTRACT)
4674 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4678 for (i = 0; i < lim; i++)
4680 rtx y = XVECEXP (x, 0, i);
4681 if (GET_CODE (y) == SET)
4683 /* As above, we ignore unconditional jumps and call-insns and
4684 ignore the result of apply_change_group. */
4685 if (GET_CODE (SET_SRC (y)) == CALL)
4687 canon_reg (SET_SRC (y), insn);
4688 apply_change_group ();
4689 fold_rtx (SET_SRC (y), insn);
4690 invalidate (SET_DEST (y), VOIDmode);
4692 else if (SET_DEST (y) == pc_rtx
4693 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4695 else
4696 sets[n_sets++].rtl = y;
4698 else if (GET_CODE (y) == CLOBBER)
4700 /* If we clobber memory, canon the address.
4701 This does nothing when a register is clobbered
4702 because we have already invalidated the reg. */
4703 if (GET_CODE (XEXP (y, 0)) == MEM)
4704 canon_reg (XEXP (y, 0), NULL_RTX);
4706 else if (GET_CODE (y) == USE
4707 && ! (REG_P (XEXP (y, 0))
4708 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4709 canon_reg (y, NULL_RTX);
4710 else if (GET_CODE (y) == CALL)
4712 /* The result of apply_change_group can be ignored; see
4713 canon_reg. */
4714 canon_reg (y, insn);
4715 apply_change_group ();
4716 fold_rtx (y, insn);
4720 else if (GET_CODE (x) == CLOBBER)
4722 if (GET_CODE (XEXP (x, 0)) == MEM)
4723 canon_reg (XEXP (x, 0), NULL_RTX);
4726 /* Canonicalize a USE of a pseudo register or memory location. */
4727 else if (GET_CODE (x) == USE
4728 && ! (REG_P (XEXP (x, 0))
4729 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4730 canon_reg (XEXP (x, 0), NULL_RTX);
4731 else if (GET_CODE (x) == CALL)
4733 /* The result of apply_change_group can be ignored; see canon_reg. */
4734 canon_reg (x, insn);
4735 apply_change_group ();
4736 fold_rtx (x, insn);
4739 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4740 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4741 is handled specially for this case, and if it isn't set, then there will
4742 be no equivalence for the destination. */
4743 if (n_sets == 1 && REG_NOTES (insn) != 0
4744 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4745 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4746 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4748 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4749 XEXP (tem, 0) = src_eqv;
4752 /* Canonicalize sources and addresses of destinations.
4753 We do this in a separate pass to avoid problems when a MATCH_DUP is
4754 present in the insn pattern. In that case, we want to ensure that
4755 we don't break the duplicate nature of the pattern. So we will replace
4756 both operands at the same time. Otherwise, we would fail to find an
4757 equivalent substitution in the loop calling validate_change below.
4759 We used to suppress canonicalization of DEST if it appears in SRC,
4760 but we don't do this any more. */
4762 for (i = 0; i < n_sets; i++)
4764 rtx dest = SET_DEST (sets[i].rtl);
4765 rtx src = SET_SRC (sets[i].rtl);
4766 rtx new = canon_reg (src, insn);
4767 int insn_code;
4769 sets[i].orig_src = src;
4770 if ((REG_P (new) && REG_P (src)
4771 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4772 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4773 || (insn_code = recog_memoized (insn)) < 0
4774 || insn_data[insn_code].n_dups > 0)
4775 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4776 else
4777 SET_SRC (sets[i].rtl) = new;
4779 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4781 validate_change (insn, &XEXP (dest, 1),
4782 canon_reg (XEXP (dest, 1), insn), 1);
4783 validate_change (insn, &XEXP (dest, 2),
4784 canon_reg (XEXP (dest, 2), insn), 1);
4787 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4788 || GET_CODE (dest) == ZERO_EXTRACT
4789 || GET_CODE (dest) == SIGN_EXTRACT)
4790 dest = XEXP (dest, 0);
4792 if (GET_CODE (dest) == MEM)
4793 canon_reg (dest, insn);
4796 /* Now that we have done all the replacements, we can apply the change
4797 group and see if they all work. Note that this will cause some
4798 canonicalizations that would have worked individually not to be applied
4799 because some other canonicalization didn't work, but this should not
4800 occur often.
4802 The result of apply_change_group can be ignored; see canon_reg. */
4804 apply_change_group ();
4806 /* Set sets[i].src_elt to the class each source belongs to.
4807 Detect assignments from or to volatile things
4808 and set set[i] to zero so they will be ignored
4809 in the rest of this function.
4811 Nothing in this loop changes the hash table or the register chains. */
4813 for (i = 0; i < n_sets; i++)
4815 rtx src, dest;
4816 rtx src_folded;
4817 struct table_elt *elt = 0, *p;
4818 enum machine_mode mode;
4819 rtx src_eqv_here;
4820 rtx src_const = 0;
4821 rtx src_related = 0;
4822 struct table_elt *src_const_elt = 0;
4823 int src_cost = MAX_COST;
4824 int src_eqv_cost = MAX_COST;
4825 int src_folded_cost = MAX_COST;
4826 int src_related_cost = MAX_COST;
4827 int src_elt_cost = MAX_COST;
4828 int src_regcost = MAX_COST;
4829 int src_eqv_regcost = MAX_COST;
4830 int src_folded_regcost = MAX_COST;
4831 int src_related_regcost = MAX_COST;
4832 int src_elt_regcost = MAX_COST;
4833 /* Set nonzero if we need to call force_const_mem on with the
4834 contents of src_folded before using it. */
4835 int src_folded_force_flag = 0;
4837 dest = SET_DEST (sets[i].rtl);
4838 src = SET_SRC (sets[i].rtl);
4840 /* If SRC is a constant that has no machine mode,
4841 hash it with the destination's machine mode.
4842 This way we can keep different modes separate. */
4844 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4845 sets[i].mode = mode;
4847 if (src_eqv)
4849 enum machine_mode eqvmode = mode;
4850 if (GET_CODE (dest) == STRICT_LOW_PART)
4851 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4852 do_not_record = 0;
4853 hash_arg_in_memory = 0;
4854 src_eqv_hash = HASH (src_eqv, eqvmode);
4856 /* Find the equivalence class for the equivalent expression. */
4858 if (!do_not_record)
4859 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4861 src_eqv_volatile = do_not_record;
4862 src_eqv_in_memory = hash_arg_in_memory;
4865 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4866 value of the INNER register, not the destination. So it is not
4867 a valid substitution for the source. But save it for later. */
4868 if (GET_CODE (dest) == STRICT_LOW_PART)
4869 src_eqv_here = 0;
4870 else
4871 src_eqv_here = src_eqv;
4873 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4874 simplified result, which may not necessarily be valid. */
4875 src_folded = fold_rtx (src, insn);
4877 #if 0
4878 /* ??? This caused bad code to be generated for the m68k port with -O2.
4879 Suppose src is (CONST_INT -1), and that after truncation src_folded
4880 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4881 At the end we will add src and src_const to the same equivalence
4882 class. We now have 3 and -1 on the same equivalence class. This
4883 causes later instructions to be mis-optimized. */
4884 /* If storing a constant in a bitfield, pre-truncate the constant
4885 so we will be able to record it later. */
4886 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4887 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4889 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4891 if (GET_CODE (src) == CONST_INT
4892 && GET_CODE (width) == CONST_INT
4893 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4894 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4895 src_folded
4896 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4897 << INTVAL (width)) - 1));
4899 #endif
4901 /* Compute SRC's hash code, and also notice if it
4902 should not be recorded at all. In that case,
4903 prevent any further processing of this assignment. */
4904 do_not_record = 0;
4905 hash_arg_in_memory = 0;
4907 sets[i].src = src;
4908 sets[i].src_hash = HASH (src, mode);
4909 sets[i].src_volatile = do_not_record;
4910 sets[i].src_in_memory = hash_arg_in_memory;
4912 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4913 a pseudo, do not record SRC. Using SRC as a replacement for
4914 anything else will be incorrect in that situation. Note that
4915 this usually occurs only for stack slots, in which case all the
4916 RTL would be referring to SRC, so we don't lose any optimization
4917 opportunities by not having SRC in the hash table. */
4919 if (GET_CODE (src) == MEM
4920 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4921 && REG_P (dest)
4922 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4923 sets[i].src_volatile = 1;
4925 #if 0
4926 /* It is no longer clear why we used to do this, but it doesn't
4927 appear to still be needed. So let's try without it since this
4928 code hurts cse'ing widened ops. */
4929 /* If source is a paradoxical subreg (such as QI treated as an SI),
4930 treat it as volatile. It may do the work of an SI in one context
4931 where the extra bits are not being used, but cannot replace an SI
4932 in general. */
4933 if (GET_CODE (src) == SUBREG
4934 && (GET_MODE_SIZE (GET_MODE (src))
4935 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4936 sets[i].src_volatile = 1;
4937 #endif
4939 /* Locate all possible equivalent forms for SRC. Try to replace
4940 SRC in the insn with each cheaper equivalent.
4942 We have the following types of equivalents: SRC itself, a folded
4943 version, a value given in a REG_EQUAL note, or a value related
4944 to a constant.
4946 Each of these equivalents may be part of an additional class
4947 of equivalents (if more than one is in the table, they must be in
4948 the same class; we check for this).
4950 If the source is volatile, we don't do any table lookups.
4952 We note any constant equivalent for possible later use in a
4953 REG_NOTE. */
4955 if (!sets[i].src_volatile)
4956 elt = lookup (src, sets[i].src_hash, mode);
4958 sets[i].src_elt = elt;
4960 if (elt && src_eqv_here && src_eqv_elt)
4962 if (elt->first_same_value != src_eqv_elt->first_same_value)
4964 /* The REG_EQUAL is indicating that two formerly distinct
4965 classes are now equivalent. So merge them. */
4966 merge_equiv_classes (elt, src_eqv_elt);
4967 src_eqv_hash = HASH (src_eqv, elt->mode);
4968 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4971 src_eqv_here = 0;
4974 else if (src_eqv_elt)
4975 elt = src_eqv_elt;
4977 /* Try to find a constant somewhere and record it in `src_const'.
4978 Record its table element, if any, in `src_const_elt'. Look in
4979 any known equivalences first. (If the constant is not in the
4980 table, also set `sets[i].src_const_hash'). */
4981 if (elt)
4982 for (p = elt->first_same_value; p; p = p->next_same_value)
4983 if (p->is_const)
4985 src_const = p->exp;
4986 src_const_elt = elt;
4987 break;
4990 if (src_const == 0
4991 && (CONSTANT_P (src_folded)
4992 /* Consider (minus (label_ref L1) (label_ref L2)) as
4993 "constant" here so we will record it. This allows us
4994 to fold switch statements when an ADDR_DIFF_VEC is used. */
4995 || (GET_CODE (src_folded) == MINUS
4996 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4997 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4998 src_const = src_folded, src_const_elt = elt;
4999 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5000 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5002 /* If we don't know if the constant is in the table, get its
5003 hash code and look it up. */
5004 if (src_const && src_const_elt == 0)
5006 sets[i].src_const_hash = HASH (src_const, mode);
5007 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5010 sets[i].src_const = src_const;
5011 sets[i].src_const_elt = src_const_elt;
5013 /* If the constant and our source are both in the table, mark them as
5014 equivalent. Otherwise, if a constant is in the table but the source
5015 isn't, set ELT to it. */
5016 if (src_const_elt && elt
5017 && src_const_elt->first_same_value != elt->first_same_value)
5018 merge_equiv_classes (elt, src_const_elt);
5019 else if (src_const_elt && elt == 0)
5020 elt = src_const_elt;
5022 /* See if there is a register linearly related to a constant
5023 equivalent of SRC. */
5024 if (src_const
5025 && (GET_CODE (src_const) == CONST
5026 || (src_const_elt && src_const_elt->related_value != 0)))
5028 src_related = use_related_value (src_const, src_const_elt);
5029 if (src_related)
5031 struct table_elt *src_related_elt
5032 = lookup (src_related, HASH (src_related, mode), mode);
5033 if (src_related_elt && elt)
5035 if (elt->first_same_value
5036 != src_related_elt->first_same_value)
5037 /* This can occur when we previously saw a CONST
5038 involving a SYMBOL_REF and then see the SYMBOL_REF
5039 twice. Merge the involved classes. */
5040 merge_equiv_classes (elt, src_related_elt);
5042 src_related = 0;
5043 src_related_elt = 0;
5045 else if (src_related_elt && elt == 0)
5046 elt = src_related_elt;
5050 /* See if we have a CONST_INT that is already in a register in a
5051 wider mode. */
5053 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5054 && GET_MODE_CLASS (mode) == MODE_INT
5055 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5057 enum machine_mode wider_mode;
5059 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5060 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5061 && src_related == 0;
5062 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5064 struct table_elt *const_elt
5065 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5067 if (const_elt == 0)
5068 continue;
5070 for (const_elt = const_elt->first_same_value;
5071 const_elt; const_elt = const_elt->next_same_value)
5072 if (REG_P (const_elt->exp))
5074 src_related = gen_lowpart (mode,
5075 const_elt->exp);
5076 break;
5081 /* Another possibility is that we have an AND with a constant in
5082 a mode narrower than a word. If so, it might have been generated
5083 as part of an "if" which would narrow the AND. If we already
5084 have done the AND in a wider mode, we can use a SUBREG of that
5085 value. */
5087 if (flag_expensive_optimizations && ! src_related
5088 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5089 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5091 enum machine_mode tmode;
5092 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5094 for (tmode = GET_MODE_WIDER_MODE (mode);
5095 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5096 tmode = GET_MODE_WIDER_MODE (tmode))
5098 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
5099 struct table_elt *larger_elt;
5101 if (inner)
5103 PUT_MODE (new_and, tmode);
5104 XEXP (new_and, 0) = inner;
5105 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5106 if (larger_elt == 0)
5107 continue;
5109 for (larger_elt = larger_elt->first_same_value;
5110 larger_elt; larger_elt = larger_elt->next_same_value)
5111 if (REG_P (larger_elt->exp))
5113 src_related
5114 = gen_lowpart (mode, larger_elt->exp);
5115 break;
5118 if (src_related)
5119 break;
5124 #ifdef LOAD_EXTEND_OP
5125 /* See if a MEM has already been loaded with a widening operation;
5126 if it has, we can use a subreg of that. Many CISC machines
5127 also have such operations, but this is only likely to be
5128 beneficial on these machines. */
5130 if (flag_expensive_optimizations && src_related == 0
5131 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5132 && GET_MODE_CLASS (mode) == MODE_INT
5133 && GET_CODE (src) == MEM && ! do_not_record
5134 && LOAD_EXTEND_OP (mode) != NIL)
5136 enum machine_mode tmode;
5138 /* Set what we are trying to extend and the operation it might
5139 have been extended with. */
5140 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5141 XEXP (memory_extend_rtx, 0) = src;
5143 for (tmode = GET_MODE_WIDER_MODE (mode);
5144 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5145 tmode = GET_MODE_WIDER_MODE (tmode))
5147 struct table_elt *larger_elt;
5149 PUT_MODE (memory_extend_rtx, tmode);
5150 larger_elt = lookup (memory_extend_rtx,
5151 HASH (memory_extend_rtx, tmode), tmode);
5152 if (larger_elt == 0)
5153 continue;
5155 for (larger_elt = larger_elt->first_same_value;
5156 larger_elt; larger_elt = larger_elt->next_same_value)
5157 if (REG_P (larger_elt->exp))
5159 src_related = gen_lowpart (mode,
5160 larger_elt->exp);
5161 break;
5164 if (src_related)
5165 break;
5168 #endif /* LOAD_EXTEND_OP */
5170 if (src == src_folded)
5171 src_folded = 0;
5173 /* At this point, ELT, if nonzero, points to a class of expressions
5174 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5175 and SRC_RELATED, if nonzero, each contain additional equivalent
5176 expressions. Prune these latter expressions by deleting expressions
5177 already in the equivalence class.
5179 Check for an equivalent identical to the destination. If found,
5180 this is the preferred equivalent since it will likely lead to
5181 elimination of the insn. Indicate this by placing it in
5182 `src_related'. */
5184 if (elt)
5185 elt = elt->first_same_value;
5186 for (p = elt; p; p = p->next_same_value)
5188 enum rtx_code code = GET_CODE (p->exp);
5190 /* If the expression is not valid, ignore it. Then we do not
5191 have to check for validity below. In most cases, we can use
5192 `rtx_equal_p', since canonicalization has already been done. */
5193 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5194 continue;
5196 /* Also skip paradoxical subregs, unless that's what we're
5197 looking for. */
5198 if (code == SUBREG
5199 && (GET_MODE_SIZE (GET_MODE (p->exp))
5200 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5201 && ! (src != 0
5202 && GET_CODE (src) == SUBREG
5203 && GET_MODE (src) == GET_MODE (p->exp)
5204 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5205 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5206 continue;
5208 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5209 src = 0;
5210 else if (src_folded && GET_CODE (src_folded) == code
5211 && rtx_equal_p (src_folded, p->exp))
5212 src_folded = 0;
5213 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5214 && rtx_equal_p (src_eqv_here, p->exp))
5215 src_eqv_here = 0;
5216 else if (src_related && GET_CODE (src_related) == code
5217 && rtx_equal_p (src_related, p->exp))
5218 src_related = 0;
5220 /* This is the same as the destination of the insns, we want
5221 to prefer it. Copy it to src_related. The code below will
5222 then give it a negative cost. */
5223 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5224 src_related = dest;
5227 /* Find the cheapest valid equivalent, trying all the available
5228 possibilities. Prefer items not in the hash table to ones
5229 that are when they are equal cost. Note that we can never
5230 worsen an insn as the current contents will also succeed.
5231 If we find an equivalent identical to the destination, use it as best,
5232 since this insn will probably be eliminated in that case. */
5233 if (src)
5235 if (rtx_equal_p (src, dest))
5236 src_cost = src_regcost = -1;
5237 else
5239 src_cost = COST (src);
5240 src_regcost = approx_reg_cost (src);
5244 if (src_eqv_here)
5246 if (rtx_equal_p (src_eqv_here, dest))
5247 src_eqv_cost = src_eqv_regcost = -1;
5248 else
5250 src_eqv_cost = COST (src_eqv_here);
5251 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5255 if (src_folded)
5257 if (rtx_equal_p (src_folded, dest))
5258 src_folded_cost = src_folded_regcost = -1;
5259 else
5261 src_folded_cost = COST (src_folded);
5262 src_folded_regcost = approx_reg_cost (src_folded);
5266 if (src_related)
5268 if (rtx_equal_p (src_related, dest))
5269 src_related_cost = src_related_regcost = -1;
5270 else
5272 src_related_cost = COST (src_related);
5273 src_related_regcost = approx_reg_cost (src_related);
5277 /* If this was an indirect jump insn, a known label will really be
5278 cheaper even though it looks more expensive. */
5279 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5280 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5282 /* Terminate loop when replacement made. This must terminate since
5283 the current contents will be tested and will always be valid. */
5284 while (1)
5286 rtx trial;
5288 /* Skip invalid entries. */
5289 while (elt && !REG_P (elt->exp)
5290 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5291 elt = elt->next_same_value;
5293 /* A paradoxical subreg would be bad here: it'll be the right
5294 size, but later may be adjusted so that the upper bits aren't
5295 what we want. So reject it. */
5296 if (elt != 0
5297 && GET_CODE (elt->exp) == SUBREG
5298 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5299 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5300 /* It is okay, though, if the rtx we're trying to match
5301 will ignore any of the bits we can't predict. */
5302 && ! (src != 0
5303 && GET_CODE (src) == SUBREG
5304 && GET_MODE (src) == GET_MODE (elt->exp)
5305 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5306 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5308 elt = elt->next_same_value;
5309 continue;
5312 if (elt)
5314 src_elt_cost = elt->cost;
5315 src_elt_regcost = elt->regcost;
5318 /* Find cheapest and skip it for the next time. For items
5319 of equal cost, use this order:
5320 src_folded, src, src_eqv, src_related and hash table entry. */
5321 if (src_folded
5322 && preferable (src_folded_cost, src_folded_regcost,
5323 src_cost, src_regcost) <= 0
5324 && preferable (src_folded_cost, src_folded_regcost,
5325 src_eqv_cost, src_eqv_regcost) <= 0
5326 && preferable (src_folded_cost, src_folded_regcost,
5327 src_related_cost, src_related_regcost) <= 0
5328 && preferable (src_folded_cost, src_folded_regcost,
5329 src_elt_cost, src_elt_regcost) <= 0)
5331 trial = src_folded, src_folded_cost = MAX_COST;
5332 if (src_folded_force_flag)
5334 rtx forced = force_const_mem (mode, trial);
5335 if (forced)
5336 trial = forced;
5339 else if (src
5340 && preferable (src_cost, src_regcost,
5341 src_eqv_cost, src_eqv_regcost) <= 0
5342 && preferable (src_cost, src_regcost,
5343 src_related_cost, src_related_regcost) <= 0
5344 && preferable (src_cost, src_regcost,
5345 src_elt_cost, src_elt_regcost) <= 0)
5346 trial = src, src_cost = MAX_COST;
5347 else if (src_eqv_here
5348 && preferable (src_eqv_cost, src_eqv_regcost,
5349 src_related_cost, src_related_regcost) <= 0
5350 && preferable (src_eqv_cost, src_eqv_regcost,
5351 src_elt_cost, src_elt_regcost) <= 0)
5352 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5353 else if (src_related
5354 && preferable (src_related_cost, src_related_regcost,
5355 src_elt_cost, src_elt_regcost) <= 0)
5356 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5357 else
5359 trial = copy_rtx (elt->exp);
5360 elt = elt->next_same_value;
5361 src_elt_cost = MAX_COST;
5364 /* We don't normally have an insn matching (set (pc) (pc)), so
5365 check for this separately here. We will delete such an
5366 insn below.
5368 For other cases such as a table jump or conditional jump
5369 where we know the ultimate target, go ahead and replace the
5370 operand. While that may not make a valid insn, we will
5371 reemit the jump below (and also insert any necessary
5372 barriers). */
5373 if (n_sets == 1 && dest == pc_rtx
5374 && (trial == pc_rtx
5375 || (GET_CODE (trial) == LABEL_REF
5376 && ! condjump_p (insn))))
5378 SET_SRC (sets[i].rtl) = trial;
5379 cse_jumps_altered = 1;
5380 break;
5383 /* Look for a substitution that makes a valid insn. */
5384 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5386 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5388 /* If we just made a substitution inside a libcall, then we
5389 need to make the same substitution in any notes attached
5390 to the RETVAL insn. */
5391 if (libcall_insn
5392 && (REG_P (sets[i].orig_src)
5393 || GET_CODE (sets[i].orig_src) == SUBREG
5394 || GET_CODE (sets[i].orig_src) == MEM))
5396 rtx note = find_reg_equal_equiv_note (libcall_insn);
5397 if (note != 0)
5398 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
5399 sets[i].orig_src,
5400 copy_rtx (new));
5403 /* The result of apply_change_group can be ignored; see
5404 canon_reg. */
5406 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5407 apply_change_group ();
5408 break;
5411 /* If we previously found constant pool entries for
5412 constants and this is a constant, try making a
5413 pool entry. Put it in src_folded unless we already have done
5414 this since that is where it likely came from. */
5416 else if (constant_pool_entries_cost
5417 && CONSTANT_P (trial)
5418 /* Reject cases that will abort in decode_rtx_const.
5419 On the alpha when simplifying a switch, we get
5420 (const (truncate (minus (label_ref) (label_ref)))). */
5421 && ! (GET_CODE (trial) == CONST
5422 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5423 /* Likewise on IA-64, except without the truncate. */
5424 && ! (GET_CODE (trial) == CONST
5425 && GET_CODE (XEXP (trial, 0)) == MINUS
5426 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5427 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5428 && (src_folded == 0
5429 || (GET_CODE (src_folded) != MEM
5430 && ! src_folded_force_flag))
5431 && GET_MODE_CLASS (mode) != MODE_CC
5432 && mode != VOIDmode)
5434 src_folded_force_flag = 1;
5435 src_folded = trial;
5436 src_folded_cost = constant_pool_entries_cost;
5437 src_folded_regcost = constant_pool_entries_regcost;
5441 src = SET_SRC (sets[i].rtl);
5443 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5444 However, there is an important exception: If both are registers
5445 that are not the head of their equivalence class, replace SET_SRC
5446 with the head of the class. If we do not do this, we will have
5447 both registers live over a portion of the basic block. This way,
5448 their lifetimes will likely abut instead of overlapping. */
5449 if (REG_P (dest)
5450 && REGNO_QTY_VALID_P (REGNO (dest)))
5452 int dest_q = REG_QTY (REGNO (dest));
5453 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5455 if (dest_ent->mode == GET_MODE (dest)
5456 && dest_ent->first_reg != REGNO (dest)
5457 && REG_P (src) && REGNO (src) == REGNO (dest)
5458 /* Don't do this if the original insn had a hard reg as
5459 SET_SRC or SET_DEST. */
5460 && (!REG_P (sets[i].src)
5461 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5462 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5463 /* We can't call canon_reg here because it won't do anything if
5464 SRC is a hard register. */
5466 int src_q = REG_QTY (REGNO (src));
5467 struct qty_table_elem *src_ent = &qty_table[src_q];
5468 int first = src_ent->first_reg;
5469 rtx new_src
5470 = (first >= FIRST_PSEUDO_REGISTER
5471 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5473 /* We must use validate-change even for this, because this
5474 might be a special no-op instruction, suitable only to
5475 tag notes onto. */
5476 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5478 src = new_src;
5479 /* If we had a constant that is cheaper than what we are now
5480 setting SRC to, use that constant. We ignored it when we
5481 thought we could make this into a no-op. */
5482 if (src_const && COST (src_const) < COST (src)
5483 && validate_change (insn, &SET_SRC (sets[i].rtl),
5484 src_const, 0))
5485 src = src_const;
5490 /* If we made a change, recompute SRC values. */
5491 if (src != sets[i].src)
5493 cse_altered = 1;
5494 do_not_record = 0;
5495 hash_arg_in_memory = 0;
5496 sets[i].src = src;
5497 sets[i].src_hash = HASH (src, mode);
5498 sets[i].src_volatile = do_not_record;
5499 sets[i].src_in_memory = hash_arg_in_memory;
5500 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5503 /* If this is a single SET, we are setting a register, and we have an
5504 equivalent constant, we want to add a REG_NOTE. We don't want
5505 to write a REG_EQUAL note for a constant pseudo since verifying that
5506 that pseudo hasn't been eliminated is a pain. Such a note also
5507 won't help anything.
5509 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5510 which can be created for a reference to a compile time computable
5511 entry in a jump table. */
5513 if (n_sets == 1 && src_const && REG_P (dest)
5514 && !REG_P (src_const)
5515 && ! (GET_CODE (src_const) == CONST
5516 && GET_CODE (XEXP (src_const, 0)) == MINUS
5517 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5518 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5520 /* We only want a REG_EQUAL note if src_const != src. */
5521 if (! rtx_equal_p (src, src_const))
5523 /* Make sure that the rtx is not shared. */
5524 src_const = copy_rtx (src_const);
5526 /* Record the actual constant value in a REG_EQUAL note,
5527 making a new one if one does not already exist. */
5528 set_unique_reg_note (insn, REG_EQUAL, src_const);
5532 /* Now deal with the destination. */
5533 do_not_record = 0;
5535 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5536 to the MEM or REG within it. */
5537 while (GET_CODE (dest) == SIGN_EXTRACT
5538 || GET_CODE (dest) == ZERO_EXTRACT
5539 || GET_CODE (dest) == SUBREG
5540 || GET_CODE (dest) == STRICT_LOW_PART)
5541 dest = XEXP (dest, 0);
5543 sets[i].inner_dest = dest;
5545 if (GET_CODE (dest) == MEM)
5547 #ifdef PUSH_ROUNDING
5548 /* Stack pushes invalidate the stack pointer. */
5549 rtx addr = XEXP (dest, 0);
5550 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5551 && XEXP (addr, 0) == stack_pointer_rtx)
5552 invalidate (stack_pointer_rtx, Pmode);
5553 #endif
5554 dest = fold_rtx (dest, insn);
5557 /* Compute the hash code of the destination now,
5558 before the effects of this instruction are recorded,
5559 since the register values used in the address computation
5560 are those before this instruction. */
5561 sets[i].dest_hash = HASH (dest, mode);
5563 /* Don't enter a bit-field in the hash table
5564 because the value in it after the store
5565 may not equal what was stored, due to truncation. */
5567 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5568 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5570 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5572 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5573 && GET_CODE (width) == CONST_INT
5574 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5575 && ! (INTVAL (src_const)
5576 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5577 /* Exception: if the value is constant,
5578 and it won't be truncated, record it. */
5580 else
5582 /* This is chosen so that the destination will be invalidated
5583 but no new value will be recorded.
5584 We must invalidate because sometimes constant
5585 values can be recorded for bitfields. */
5586 sets[i].src_elt = 0;
5587 sets[i].src_volatile = 1;
5588 src_eqv = 0;
5589 src_eqv_elt = 0;
5593 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5594 the insn. */
5595 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5597 /* One less use of the label this insn used to jump to. */
5598 delete_insn (insn);
5599 cse_jumps_altered = 1;
5600 /* No more processing for this set. */
5601 sets[i].rtl = 0;
5604 /* If this SET is now setting PC to a label, we know it used to
5605 be a conditional or computed branch. */
5606 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5608 /* Now emit a BARRIER after the unconditional jump. */
5609 if (NEXT_INSN (insn) == 0
5610 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5611 emit_barrier_after (insn);
5613 /* We reemit the jump in as many cases as possible just in
5614 case the form of an unconditional jump is significantly
5615 different than a computed jump or conditional jump.
5617 If this insn has multiple sets, then reemitting the
5618 jump is nontrivial. So instead we just force rerecognition
5619 and hope for the best. */
5620 if (n_sets == 1)
5622 rtx new, note;
5624 new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5625 JUMP_LABEL (new) = XEXP (src, 0);
5626 LABEL_NUSES (XEXP (src, 0))++;
5628 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5629 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5630 if (note)
5632 XEXP (note, 1) = NULL_RTX;
5633 REG_NOTES (new) = note;
5636 delete_insn (insn);
5637 insn = new;
5639 /* Now emit a BARRIER after the unconditional jump. */
5640 if (NEXT_INSN (insn) == 0
5641 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5642 emit_barrier_after (insn);
5644 else
5645 INSN_CODE (insn) = -1;
5647 /* Do not bother deleting any unreachable code,
5648 let jump/flow do that. */
5650 cse_jumps_altered = 1;
5651 sets[i].rtl = 0;
5654 /* If destination is volatile, invalidate it and then do no further
5655 processing for this assignment. */
5657 else if (do_not_record)
5659 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5660 invalidate (dest, VOIDmode);
5661 else if (GET_CODE (dest) == MEM)
5663 /* Outgoing arguments for a libcall don't
5664 affect any recorded expressions. */
5665 if (! libcall_insn || insn == libcall_insn)
5666 invalidate (dest, VOIDmode);
5668 else if (GET_CODE (dest) == STRICT_LOW_PART
5669 || GET_CODE (dest) == ZERO_EXTRACT)
5670 invalidate (XEXP (dest, 0), GET_MODE (dest));
5671 sets[i].rtl = 0;
5674 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5675 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5677 #ifdef HAVE_cc0
5678 /* If setting CC0, record what it was set to, or a constant, if it
5679 is equivalent to a constant. If it is being set to a floating-point
5680 value, make a COMPARE with the appropriate constant of 0. If we
5681 don't do this, later code can interpret this as a test against
5682 const0_rtx, which can cause problems if we try to put it into an
5683 insn as a floating-point operand. */
5684 if (dest == cc0_rtx)
5686 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5687 this_insn_cc0_mode = mode;
5688 if (FLOAT_MODE_P (mode))
5689 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5690 CONST0_RTX (mode));
5692 #endif
5695 /* Now enter all non-volatile source expressions in the hash table
5696 if they are not already present.
5697 Record their equivalence classes in src_elt.
5698 This way we can insert the corresponding destinations into
5699 the same classes even if the actual sources are no longer in them
5700 (having been invalidated). */
5702 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5703 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5705 struct table_elt *elt;
5706 struct table_elt *classp = sets[0].src_elt;
5707 rtx dest = SET_DEST (sets[0].rtl);
5708 enum machine_mode eqvmode = GET_MODE (dest);
5710 if (GET_CODE (dest) == STRICT_LOW_PART)
5712 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5713 classp = 0;
5715 if (insert_regs (src_eqv, classp, 0))
5717 rehash_using_reg (src_eqv);
5718 src_eqv_hash = HASH (src_eqv, eqvmode);
5720 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5721 elt->in_memory = src_eqv_in_memory;
5722 src_eqv_elt = elt;
5724 /* Check to see if src_eqv_elt is the same as a set source which
5725 does not yet have an elt, and if so set the elt of the set source
5726 to src_eqv_elt. */
5727 for (i = 0; i < n_sets; i++)
5728 if (sets[i].rtl && sets[i].src_elt == 0
5729 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5730 sets[i].src_elt = src_eqv_elt;
5733 for (i = 0; i < n_sets; i++)
5734 if (sets[i].rtl && ! sets[i].src_volatile
5735 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5737 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5739 /* REG_EQUAL in setting a STRICT_LOW_PART
5740 gives an equivalent for the entire destination register,
5741 not just for the subreg being stored in now.
5742 This is a more interesting equivalence, so we arrange later
5743 to treat the entire reg as the destination. */
5744 sets[i].src_elt = src_eqv_elt;
5745 sets[i].src_hash = src_eqv_hash;
5747 else
5749 /* Insert source and constant equivalent into hash table, if not
5750 already present. */
5751 struct table_elt *classp = src_eqv_elt;
5752 rtx src = sets[i].src;
5753 rtx dest = SET_DEST (sets[i].rtl);
5754 enum machine_mode mode
5755 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5757 /* It's possible that we have a source value known to be
5758 constant but don't have a REG_EQUAL note on the insn.
5759 Lack of a note will mean src_eqv_elt will be NULL. This
5760 can happen where we've generated a SUBREG to access a
5761 CONST_INT that is already in a register in a wider mode.
5762 Ensure that the source expression is put in the proper
5763 constant class. */
5764 if (!classp)
5765 classp = sets[i].src_const_elt;
5767 if (sets[i].src_elt == 0)
5769 /* Don't put a hard register source into the table if this is
5770 the last insn of a libcall. In this case, we only need
5771 to put src_eqv_elt in src_elt. */
5772 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5774 struct table_elt *elt;
5776 /* Note that these insert_regs calls cannot remove
5777 any of the src_elt's, because they would have failed to
5778 match if not still valid. */
5779 if (insert_regs (src, classp, 0))
5781 rehash_using_reg (src);
5782 sets[i].src_hash = HASH (src, mode);
5784 elt = insert (src, classp, sets[i].src_hash, mode);
5785 elt->in_memory = sets[i].src_in_memory;
5786 sets[i].src_elt = classp = elt;
5788 else
5789 sets[i].src_elt = classp;
5791 if (sets[i].src_const && sets[i].src_const_elt == 0
5792 && src != sets[i].src_const
5793 && ! rtx_equal_p (sets[i].src_const, src))
5794 sets[i].src_elt = insert (sets[i].src_const, classp,
5795 sets[i].src_const_hash, mode);
5798 else if (sets[i].src_elt == 0)
5799 /* If we did not insert the source into the hash table (e.g., it was
5800 volatile), note the equivalence class for the REG_EQUAL value, if any,
5801 so that the destination goes into that class. */
5802 sets[i].src_elt = src_eqv_elt;
5804 invalidate_from_clobbers (x);
5806 /* Some registers are invalidated by subroutine calls. Memory is
5807 invalidated by non-constant calls. */
5809 if (GET_CODE (insn) == CALL_INSN)
5811 if (! CONST_OR_PURE_CALL_P (insn))
5812 invalidate_memory ();
5813 invalidate_for_call ();
5816 /* Now invalidate everything set by this instruction.
5817 If a SUBREG or other funny destination is being set,
5818 sets[i].rtl is still nonzero, so here we invalidate the reg
5819 a part of which is being set. */
5821 for (i = 0; i < n_sets; i++)
5822 if (sets[i].rtl)
5824 /* We can't use the inner dest, because the mode associated with
5825 a ZERO_EXTRACT is significant. */
5826 rtx dest = SET_DEST (sets[i].rtl);
5828 /* Needed for registers to remove the register from its
5829 previous quantity's chain.
5830 Needed for memory if this is a nonvarying address, unless
5831 we have just done an invalidate_memory that covers even those. */
5832 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5833 invalidate (dest, VOIDmode);
5834 else if (GET_CODE (dest) == MEM)
5836 /* Outgoing arguments for a libcall don't
5837 affect any recorded expressions. */
5838 if (! libcall_insn || insn == libcall_insn)
5839 invalidate (dest, VOIDmode);
5841 else if (GET_CODE (dest) == STRICT_LOW_PART
5842 || GET_CODE (dest) == ZERO_EXTRACT)
5843 invalidate (XEXP (dest, 0), GET_MODE (dest));
5846 /* A volatile ASM invalidates everything. */
5847 if (GET_CODE (insn) == INSN
5848 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5849 && MEM_VOLATILE_P (PATTERN (insn)))
5850 flush_hash_table ();
5852 /* Make sure registers mentioned in destinations
5853 are safe for use in an expression to be inserted.
5854 This removes from the hash table
5855 any invalid entry that refers to one of these registers.
5857 We don't care about the return value from mention_regs because
5858 we are going to hash the SET_DEST values unconditionally. */
5860 for (i = 0; i < n_sets; i++)
5862 if (sets[i].rtl)
5864 rtx x = SET_DEST (sets[i].rtl);
5866 if (!REG_P (x))
5867 mention_regs (x);
5868 else
5870 /* We used to rely on all references to a register becoming
5871 inaccessible when a register changes to a new quantity,
5872 since that changes the hash code. However, that is not
5873 safe, since after HASH_SIZE new quantities we get a
5874 hash 'collision' of a register with its own invalid
5875 entries. And since SUBREGs have been changed not to
5876 change their hash code with the hash code of the register,
5877 it wouldn't work any longer at all. So we have to check
5878 for any invalid references lying around now.
5879 This code is similar to the REG case in mention_regs,
5880 but it knows that reg_tick has been incremented, and
5881 it leaves reg_in_table as -1 . */
5882 unsigned int regno = REGNO (x);
5883 unsigned int endregno
5884 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5885 : hard_regno_nregs[regno][GET_MODE (x)]);
5886 unsigned int i;
5888 for (i = regno; i < endregno; i++)
5890 if (REG_IN_TABLE (i) >= 0)
5892 remove_invalid_refs (i);
5893 REG_IN_TABLE (i) = -1;
5900 /* We may have just removed some of the src_elt's from the hash table.
5901 So replace each one with the current head of the same class. */
5903 for (i = 0; i < n_sets; i++)
5904 if (sets[i].rtl)
5906 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5907 /* If elt was removed, find current head of same class,
5908 or 0 if nothing remains of that class. */
5910 struct table_elt *elt = sets[i].src_elt;
5912 while (elt && elt->prev_same_value)
5913 elt = elt->prev_same_value;
5915 while (elt && elt->first_same_value == 0)
5916 elt = elt->next_same_value;
5917 sets[i].src_elt = elt ? elt->first_same_value : 0;
5921 /* Now insert the destinations into their equivalence classes. */
5923 for (i = 0; i < n_sets; i++)
5924 if (sets[i].rtl)
5926 rtx dest = SET_DEST (sets[i].rtl);
5927 rtx inner_dest = sets[i].inner_dest;
5928 struct table_elt *elt;
5930 /* Don't record value if we are not supposed to risk allocating
5931 floating-point values in registers that might be wider than
5932 memory. */
5933 if ((flag_float_store
5934 && GET_CODE (dest) == MEM
5935 && FLOAT_MODE_P (GET_MODE (dest)))
5936 /* Don't record BLKmode values, because we don't know the
5937 size of it, and can't be sure that other BLKmode values
5938 have the same or smaller size. */
5939 || GET_MODE (dest) == BLKmode
5940 /* Don't record values of destinations set inside a libcall block
5941 since we might delete the libcall. Things should have been set
5942 up so we won't want to reuse such a value, but we play it safe
5943 here. */
5944 || libcall_insn
5945 /* If we didn't put a REG_EQUAL value or a source into the hash
5946 table, there is no point is recording DEST. */
5947 || sets[i].src_elt == 0
5948 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5949 or SIGN_EXTEND, don't record DEST since it can cause
5950 some tracking to be wrong.
5952 ??? Think about this more later. */
5953 || (GET_CODE (dest) == SUBREG
5954 && (GET_MODE_SIZE (GET_MODE (dest))
5955 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5956 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5957 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5958 continue;
5960 /* STRICT_LOW_PART isn't part of the value BEING set,
5961 and neither is the SUBREG inside it.
5962 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5963 if (GET_CODE (dest) == STRICT_LOW_PART)
5964 dest = SUBREG_REG (XEXP (dest, 0));
5966 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5967 /* Registers must also be inserted into chains for quantities. */
5968 if (insert_regs (dest, sets[i].src_elt, 1))
5970 /* If `insert_regs' changes something, the hash code must be
5971 recalculated. */
5972 rehash_using_reg (dest);
5973 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5976 if (GET_CODE (inner_dest) == MEM
5977 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5978 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5979 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5980 Consider the case in which the address of the MEM is
5981 passed to a function, which alters the MEM. Then, if we
5982 later use Y instead of the MEM we'll miss the update. */
5983 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5984 else
5985 elt = insert (dest, sets[i].src_elt,
5986 sets[i].dest_hash, GET_MODE (dest));
5988 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5989 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5990 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
5991 0))));
5993 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5994 narrower than M2, and both M1 and M2 are the same number of words,
5995 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5996 make that equivalence as well.
5998 However, BAR may have equivalences for which gen_lowpart
5999 will produce a simpler value than gen_lowpart applied to
6000 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6001 BAR's equivalences. If we don't get a simplified form, make
6002 the SUBREG. It will not be used in an equivalence, but will
6003 cause two similar assignments to be detected.
6005 Note the loop below will find SUBREG_REG (DEST) since we have
6006 already entered SRC and DEST of the SET in the table. */
6008 if (GET_CODE (dest) == SUBREG
6009 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6010 / UNITS_PER_WORD)
6011 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6012 && (GET_MODE_SIZE (GET_MODE (dest))
6013 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6014 && sets[i].src_elt != 0)
6016 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6017 struct table_elt *elt, *classp = 0;
6019 for (elt = sets[i].src_elt->first_same_value; elt;
6020 elt = elt->next_same_value)
6022 rtx new_src = 0;
6023 unsigned src_hash;
6024 struct table_elt *src_elt;
6025 int byte = 0;
6027 /* Ignore invalid entries. */
6028 if (!REG_P (elt->exp)
6029 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6030 continue;
6032 /* We may have already been playing subreg games. If the
6033 mode is already correct for the destination, use it. */
6034 if (GET_MODE (elt->exp) == new_mode)
6035 new_src = elt->exp;
6036 else
6038 /* Calculate big endian correction for the SUBREG_BYTE.
6039 We have already checked that M1 (GET_MODE (dest))
6040 is not narrower than M2 (new_mode). */
6041 if (BYTES_BIG_ENDIAN)
6042 byte = (GET_MODE_SIZE (GET_MODE (dest))
6043 - GET_MODE_SIZE (new_mode));
6045 new_src = simplify_gen_subreg (new_mode, elt->exp,
6046 GET_MODE (dest), byte);
6049 /* The call to simplify_gen_subreg fails if the value
6050 is VOIDmode, yet we can't do any simplification, e.g.
6051 for EXPR_LISTs denoting function call results.
6052 It is invalid to construct a SUBREG with a VOIDmode
6053 SUBREG_REG, hence a zero new_src means we can't do
6054 this substitution. */
6055 if (! new_src)
6056 continue;
6058 src_hash = HASH (new_src, new_mode);
6059 src_elt = lookup (new_src, src_hash, new_mode);
6061 /* Put the new source in the hash table is if isn't
6062 already. */
6063 if (src_elt == 0)
6065 if (insert_regs (new_src, classp, 0))
6067 rehash_using_reg (new_src);
6068 src_hash = HASH (new_src, new_mode);
6070 src_elt = insert (new_src, classp, src_hash, new_mode);
6071 src_elt->in_memory = elt->in_memory;
6073 else if (classp && classp != src_elt->first_same_value)
6074 /* Show that two things that we've seen before are
6075 actually the same. */
6076 merge_equiv_classes (src_elt, classp);
6078 classp = src_elt->first_same_value;
6079 /* Ignore invalid entries. */
6080 while (classp
6081 && !REG_P (classp->exp)
6082 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6083 classp = classp->next_same_value;
6088 /* Special handling for (set REG0 REG1) where REG0 is the
6089 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6090 be used in the sequel, so (if easily done) change this insn to
6091 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6092 that computed their value. Then REG1 will become a dead store
6093 and won't cloud the situation for later optimizations.
6095 Do not make this change if REG1 is a hard register, because it will
6096 then be used in the sequel and we may be changing a two-operand insn
6097 into a three-operand insn.
6099 Also do not do this if we are operating on a copy of INSN.
6101 Also don't do this if INSN ends a libcall; this would cause an unrelated
6102 register to be set in the middle of a libcall, and we then get bad code
6103 if the libcall is deleted. */
6105 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
6106 && NEXT_INSN (PREV_INSN (insn)) == insn
6107 && REG_P (SET_SRC (sets[0].rtl))
6108 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6109 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6111 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6112 struct qty_table_elem *src_ent = &qty_table[src_q];
6114 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6115 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6117 rtx prev = insn;
6118 /* Scan for the previous nonnote insn, but stop at a basic
6119 block boundary. */
6122 prev = PREV_INSN (prev);
6124 while (prev && GET_CODE (prev) == NOTE
6125 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6127 /* Do not swap the registers around if the previous instruction
6128 attaches a REG_EQUIV note to REG1.
6130 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6131 from the pseudo that originally shadowed an incoming argument
6132 to another register. Some uses of REG_EQUIV might rely on it
6133 being attached to REG1 rather than REG2.
6135 This section previously turned the REG_EQUIV into a REG_EQUAL
6136 note. We cannot do that because REG_EQUIV may provide an
6137 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6139 if (prev != 0 && GET_CODE (prev) == INSN
6140 && GET_CODE (PATTERN (prev)) == SET
6141 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6142 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6144 rtx dest = SET_DEST (sets[0].rtl);
6145 rtx src = SET_SRC (sets[0].rtl);
6146 rtx note;
6148 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6149 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6150 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6151 apply_change_group ();
6153 /* If INSN has a REG_EQUAL note, and this note mentions
6154 REG0, then we must delete it, because the value in
6155 REG0 has changed. If the note's value is REG1, we must
6156 also delete it because that is now this insn's dest. */
6157 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6158 if (note != 0
6159 && (reg_mentioned_p (dest, XEXP (note, 0))
6160 || rtx_equal_p (src, XEXP (note, 0))))
6161 remove_note (insn, note);
6166 /* If this is a conditional jump insn, record any known equivalences due to
6167 the condition being tested. */
6169 last_jump_equiv_class = 0;
6170 if (GET_CODE (insn) == JUMP_INSN
6171 && n_sets == 1 && GET_CODE (x) == SET
6172 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6173 record_jump_equiv (insn, 0);
6175 #ifdef HAVE_cc0
6176 /* If the previous insn set CC0 and this insn no longer references CC0,
6177 delete the previous insn. Here we use the fact that nothing expects CC0
6178 to be valid over an insn, which is true until the final pass. */
6179 if (prev_insn && GET_CODE (prev_insn) == INSN
6180 && (tem = single_set (prev_insn)) != 0
6181 && SET_DEST (tem) == cc0_rtx
6182 && ! reg_mentioned_p (cc0_rtx, x))
6183 delete_insn (prev_insn);
6185 prev_insn_cc0 = this_insn_cc0;
6186 prev_insn_cc0_mode = this_insn_cc0_mode;
6187 prev_insn = insn;
6188 #endif
6191 /* Remove from the hash table all expressions that reference memory. */
6193 static void
6194 invalidate_memory (void)
6196 int i;
6197 struct table_elt *p, *next;
6199 for (i = 0; i < HASH_SIZE; i++)
6200 for (p = table[i]; p; p = next)
6202 next = p->next_same_hash;
6203 if (p->in_memory)
6204 remove_from_table (p, i);
6208 /* If ADDR is an address that implicitly affects the stack pointer, return
6209 1 and update the register tables to show the effect. Else, return 0. */
6211 static int
6212 addr_affects_sp_p (rtx addr)
6214 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
6215 && REG_P (XEXP (addr, 0))
6216 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6218 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6220 REG_TICK (STACK_POINTER_REGNUM)++;
6221 /* Is it possible to use a subreg of SP? */
6222 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6225 /* This should be *very* rare. */
6226 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6227 invalidate (stack_pointer_rtx, VOIDmode);
6229 return 1;
6232 return 0;
6235 /* Perform invalidation on the basis of everything about an insn
6236 except for invalidating the actual places that are SET in it.
6237 This includes the places CLOBBERed, and anything that might
6238 alias with something that is SET or CLOBBERed.
6240 X is the pattern of the insn. */
6242 static void
6243 invalidate_from_clobbers (rtx x)
6245 if (GET_CODE (x) == CLOBBER)
6247 rtx ref = XEXP (x, 0);
6248 if (ref)
6250 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6251 || GET_CODE (ref) == MEM)
6252 invalidate (ref, VOIDmode);
6253 else if (GET_CODE (ref) == STRICT_LOW_PART
6254 || GET_CODE (ref) == ZERO_EXTRACT)
6255 invalidate (XEXP (ref, 0), GET_MODE (ref));
6258 else if (GET_CODE (x) == PARALLEL)
6260 int i;
6261 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6263 rtx y = XVECEXP (x, 0, i);
6264 if (GET_CODE (y) == CLOBBER)
6266 rtx ref = XEXP (y, 0);
6267 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6268 || GET_CODE (ref) == MEM)
6269 invalidate (ref, VOIDmode);
6270 else if (GET_CODE (ref) == STRICT_LOW_PART
6271 || GET_CODE (ref) == ZERO_EXTRACT)
6272 invalidate (XEXP (ref, 0), GET_MODE (ref));
6278 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6279 and replace any registers in them with either an equivalent constant
6280 or the canonical form of the register. If we are inside an address,
6281 only do this if the address remains valid.
6283 OBJECT is 0 except when within a MEM in which case it is the MEM.
6285 Return the replacement for X. */
6287 static rtx
6288 cse_process_notes (rtx x, rtx object)
6290 enum rtx_code code = GET_CODE (x);
6291 const char *fmt = GET_RTX_FORMAT (code);
6292 int i;
6294 switch (code)
6296 case CONST_INT:
6297 case CONST:
6298 case SYMBOL_REF:
6299 case LABEL_REF:
6300 case CONST_DOUBLE:
6301 case CONST_VECTOR:
6302 case PC:
6303 case CC0:
6304 case LO_SUM:
6305 return x;
6307 case MEM:
6308 validate_change (x, &XEXP (x, 0),
6309 cse_process_notes (XEXP (x, 0), x), 0);
6310 return x;
6312 case EXPR_LIST:
6313 case INSN_LIST:
6314 if (REG_NOTE_KIND (x) == REG_EQUAL)
6315 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6316 if (XEXP (x, 1))
6317 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6318 return x;
6320 case SIGN_EXTEND:
6321 case ZERO_EXTEND:
6322 case SUBREG:
6324 rtx new = cse_process_notes (XEXP (x, 0), object);
6325 /* We don't substitute VOIDmode constants into these rtx,
6326 since they would impede folding. */
6327 if (GET_MODE (new) != VOIDmode)
6328 validate_change (object, &XEXP (x, 0), new, 0);
6329 return x;
6332 case REG:
6333 i = REG_QTY (REGNO (x));
6335 /* Return a constant or a constant register. */
6336 if (REGNO_QTY_VALID_P (REGNO (x)))
6338 struct qty_table_elem *ent = &qty_table[i];
6340 if (ent->const_rtx != NULL_RTX
6341 && (CONSTANT_P (ent->const_rtx)
6342 || REG_P (ent->const_rtx)))
6344 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
6345 if (new)
6346 return new;
6350 /* Otherwise, canonicalize this register. */
6351 return canon_reg (x, NULL_RTX);
6353 default:
6354 break;
6357 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6358 if (fmt[i] == 'e')
6359 validate_change (object, &XEXP (x, i),
6360 cse_process_notes (XEXP (x, i), object), 0);
6362 return x;
6365 /* Find common subexpressions between the end test of a loop and the beginning
6366 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6368 Often we have a loop where an expression in the exit test is used
6369 in the body of the loop. For example "while (*p) *q++ = *p++;".
6370 Because of the way we duplicate the loop exit test in front of the loop,
6371 however, we don't detect that common subexpression. This will be caught
6372 when global cse is implemented, but this is a quite common case.
6374 This function handles the most common cases of these common expressions.
6375 It is called after we have processed the basic block ending with the
6376 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6377 jumps to a label used only once. */
6379 static void
6380 cse_around_loop (rtx loop_start)
6382 rtx insn;
6383 int i;
6384 struct table_elt *p;
6386 /* If the jump at the end of the loop doesn't go to the start, we don't
6387 do anything. */
6388 for (insn = PREV_INSN (loop_start);
6389 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6390 insn = PREV_INSN (insn))
6393 if (insn == 0
6394 || GET_CODE (insn) != NOTE
6395 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6396 return;
6398 /* If the last insn of the loop (the end test) was an NE comparison,
6399 we will interpret it as an EQ comparison, since we fell through
6400 the loop. Any equivalences resulting from that comparison are
6401 therefore not valid and must be invalidated. */
6402 if (last_jump_equiv_class)
6403 for (p = last_jump_equiv_class->first_same_value; p;
6404 p = p->next_same_value)
6406 if (MEM_P (p->exp) || REG_P (p->exp)
6407 || (GET_CODE (p->exp) == SUBREG
6408 && REG_P (SUBREG_REG (p->exp))))
6409 invalidate (p->exp, VOIDmode);
6410 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6411 || GET_CODE (p->exp) == ZERO_EXTRACT)
6412 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6415 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6416 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6418 The only thing we do with SET_DEST is invalidate entries, so we
6419 can safely process each SET in order. It is slightly less efficient
6420 to do so, but we only want to handle the most common cases.
6422 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6423 These pseudos won't have valid entries in any of the tables indexed
6424 by register number, such as reg_qty. We avoid out-of-range array
6425 accesses by not processing any instructions created after cse started. */
6427 for (insn = NEXT_INSN (loop_start);
6428 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6429 && INSN_UID (insn) < max_insn_uid
6430 && ! (GET_CODE (insn) == NOTE
6431 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6432 insn = NEXT_INSN (insn))
6434 if (INSN_P (insn)
6435 && (GET_CODE (PATTERN (insn)) == SET
6436 || GET_CODE (PATTERN (insn)) == CLOBBER))
6437 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6438 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6439 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6440 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6441 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6442 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6443 loop_start);
6447 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6448 since they are done elsewhere. This function is called via note_stores. */
6450 static void
6451 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6453 enum rtx_code code = GET_CODE (dest);
6455 if (code == MEM
6456 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6457 /* There are times when an address can appear varying and be a PLUS
6458 during this scan when it would be a fixed address were we to know
6459 the proper equivalences. So invalidate all memory if there is
6460 a BLKmode or nonscalar memory reference or a reference to a
6461 variable address. */
6462 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6463 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6465 invalidate_memory ();
6466 return;
6469 if (GET_CODE (set) == CLOBBER
6470 || CC0_P (dest)
6471 || dest == pc_rtx)
6472 return;
6474 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6475 invalidate (XEXP (dest, 0), GET_MODE (dest));
6476 else if (code == REG || code == SUBREG || code == MEM)
6477 invalidate (dest, VOIDmode);
6480 /* Invalidate all insns from START up to the end of the function or the
6481 next label. This called when we wish to CSE around a block that is
6482 conditionally executed. */
6484 static void
6485 invalidate_skipped_block (rtx start)
6487 rtx insn;
6489 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6490 insn = NEXT_INSN (insn))
6492 if (! INSN_P (insn))
6493 continue;
6495 if (GET_CODE (insn) == CALL_INSN)
6497 if (! CONST_OR_PURE_CALL_P (insn))
6498 invalidate_memory ();
6499 invalidate_for_call ();
6502 invalidate_from_clobbers (PATTERN (insn));
6503 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6507 /* If modifying X will modify the value in *DATA (which is really an
6508 `rtx *'), indicate that fact by setting the pointed to value to
6509 NULL_RTX. */
6511 static void
6512 cse_check_loop_start (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
6514 rtx *cse_check_loop_start_value = (rtx *) data;
6516 if (*cse_check_loop_start_value == NULL_RTX
6517 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6518 return;
6520 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6521 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6522 *cse_check_loop_start_value = NULL_RTX;
6525 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6526 a loop that starts with the label at LOOP_START.
6528 If X is a SET, we see if its SET_SRC is currently in our hash table.
6529 If so, we see if it has a value equal to some register used only in the
6530 loop exit code (as marked by jump.c).
6532 If those two conditions are true, we search backwards from the start of
6533 the loop to see if that same value was loaded into a register that still
6534 retains its value at the start of the loop.
6536 If so, we insert an insn after the load to copy the destination of that
6537 load into the equivalent register and (try to) replace our SET_SRC with that
6538 register.
6540 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6542 static void
6543 cse_set_around_loop (rtx x, rtx insn, rtx loop_start)
6545 struct table_elt *src_elt;
6547 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6548 are setting PC or CC0 or whose SET_SRC is already a register. */
6549 if (GET_CODE (x) == SET
6550 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6551 && !REG_P (SET_SRC (x)))
6553 src_elt = lookup (SET_SRC (x),
6554 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6555 GET_MODE (SET_DEST (x)));
6557 if (src_elt)
6558 for (src_elt = src_elt->first_same_value; src_elt;
6559 src_elt = src_elt->next_same_value)
6560 if (REG_P (src_elt->exp) && REG_LOOP_TEST_P (src_elt->exp)
6561 && COST (src_elt->exp) < COST (SET_SRC (x)))
6563 rtx p, set;
6565 /* Look for an insn in front of LOOP_START that sets
6566 something in the desired mode to SET_SRC (x) before we hit
6567 a label or CALL_INSN. */
6569 for (p = prev_nonnote_insn (loop_start);
6570 p && GET_CODE (p) != CALL_INSN
6571 && GET_CODE (p) != CODE_LABEL;
6572 p = prev_nonnote_insn (p))
6573 if ((set = single_set (p)) != 0
6574 && REG_P (SET_DEST (set))
6575 && GET_MODE (SET_DEST (set)) == src_elt->mode
6576 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6578 /* We now have to ensure that nothing between P
6579 and LOOP_START modified anything referenced in
6580 SET_SRC (x). We know that nothing within the loop
6581 can modify it, or we would have invalidated it in
6582 the hash table. */
6583 rtx q;
6584 rtx cse_check_loop_start_value = SET_SRC (x);
6585 for (q = p; q != loop_start; q = NEXT_INSN (q))
6586 if (INSN_P (q))
6587 note_stores (PATTERN (q),
6588 cse_check_loop_start,
6589 &cse_check_loop_start_value);
6591 /* If nothing was changed and we can replace our
6592 SET_SRC, add an insn after P to copy its destination
6593 to what we will be replacing SET_SRC with. */
6594 if (cse_check_loop_start_value
6595 && single_set (p)
6596 && !can_throw_internal (insn)
6597 && validate_change (insn, &SET_SRC (x),
6598 src_elt->exp, 0))
6600 /* If this creates new pseudos, this is unsafe,
6601 because the regno of new pseudo is unsuitable
6602 to index into reg_qty when cse_insn processes
6603 the new insn. Therefore, if a new pseudo was
6604 created, discard this optimization. */
6605 int nregs = max_reg_num ();
6606 rtx move
6607 = gen_move_insn (src_elt->exp, SET_DEST (set));
6608 if (nregs != max_reg_num ())
6610 if (! validate_change (insn, &SET_SRC (x),
6611 SET_SRC (set), 0))
6612 abort ();
6614 else
6616 if (CONSTANT_P (SET_SRC (set))
6617 && ! find_reg_equal_equiv_note (insn))
6618 set_unique_reg_note (insn, REG_EQUAL,
6619 SET_SRC (set));
6620 if (control_flow_insn_p (p))
6621 /* p can cause a control flow transfer so it
6622 is the last insn of a basic block. We can't
6623 therefore use emit_insn_after. */
6624 emit_insn_before (move, next_nonnote_insn (p));
6625 else
6626 emit_insn_after (move, p);
6629 break;
6634 /* Deal with the destination of X affecting the stack pointer. */
6635 addr_affects_sp_p (SET_DEST (x));
6637 /* See comment on similar code in cse_insn for explanation of these
6638 tests. */
6639 if (REG_P (SET_DEST (x)) || GET_CODE (SET_DEST (x)) == SUBREG
6640 || GET_CODE (SET_DEST (x)) == MEM)
6641 invalidate (SET_DEST (x), VOIDmode);
6642 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6643 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6644 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6647 /* Find the end of INSN's basic block and return its range,
6648 the total number of SETs in all the insns of the block, the last insn of the
6649 block, and the branch path.
6651 The branch path indicates which branches should be followed. If a nonzero
6652 path size is specified, the block should be rescanned and a different set
6653 of branches will be taken. The branch path is only used if
6654 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6656 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6657 used to describe the block. It is filled in with the information about
6658 the current block. The incoming structure's branch path, if any, is used
6659 to construct the output branch path. */
6661 static void
6662 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6663 int follow_jumps, int after_loop, int skip_blocks)
6665 rtx p = insn, q;
6666 int nsets = 0;
6667 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6668 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6669 int path_size = data->path_size;
6670 int path_entry = 0;
6671 int i;
6673 /* Update the previous branch path, if any. If the last branch was
6674 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6675 If it was previously PATH_NOT_TAKEN,
6676 shorten the path by one and look at the previous branch. We know that
6677 at least one branch must have been taken if PATH_SIZE is nonzero. */
6678 while (path_size > 0)
6680 if (data->path[path_size - 1].status != PATH_NOT_TAKEN)
6682 data->path[path_size - 1].status = PATH_NOT_TAKEN;
6683 break;
6685 else
6686 path_size--;
6689 /* If the first instruction is marked with QImode, that means we've
6690 already processed this block. Our caller will look at DATA->LAST
6691 to figure out where to go next. We want to return the next block
6692 in the instruction stream, not some branched-to block somewhere
6693 else. We accomplish this by pretending our called forbid us to
6694 follow jumps, or skip blocks. */
6695 if (GET_MODE (insn) == QImode)
6696 follow_jumps = skip_blocks = 0;
6698 /* Scan to end of this basic block. */
6699 while (p && GET_CODE (p) != CODE_LABEL)
6701 /* Don't cse out the end of a loop. This makes a difference
6702 only for the unusual loops that always execute at least once;
6703 all other loops have labels there so we will stop in any case.
6704 Cse'ing out the end of the loop is dangerous because it
6705 might cause an invariant expression inside the loop
6706 to be reused after the end of the loop. This would make it
6707 hard to move the expression out of the loop in loop.c,
6708 especially if it is one of several equivalent expressions
6709 and loop.c would like to eliminate it.
6711 If we are running after loop.c has finished, we can ignore
6712 the NOTE_INSN_LOOP_END. */
6714 if (! after_loop && GET_CODE (p) == NOTE
6715 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6716 break;
6718 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6719 the regs restored by the longjmp come from
6720 a later time than the setjmp. */
6721 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6722 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6723 break;
6725 /* A PARALLEL can have lots of SETs in it,
6726 especially if it is really an ASM_OPERANDS. */
6727 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6728 nsets += XVECLEN (PATTERN (p), 0);
6729 else if (GET_CODE (p) != NOTE)
6730 nsets += 1;
6732 /* Ignore insns made by CSE; they cannot affect the boundaries of
6733 the basic block. */
6735 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6736 high_cuid = INSN_CUID (p);
6737 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6738 low_cuid = INSN_CUID (p);
6740 /* See if this insn is in our branch path. If it is and we are to
6741 take it, do so. */
6742 if (path_entry < path_size && data->path[path_entry].branch == p)
6744 if (data->path[path_entry].status != PATH_NOT_TAKEN)
6745 p = JUMP_LABEL (p);
6747 /* Point to next entry in path, if any. */
6748 path_entry++;
6751 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6752 was specified, we haven't reached our maximum path length, there are
6753 insns following the target of the jump, this is the only use of the
6754 jump label, and the target label is preceded by a BARRIER.
6756 Alternatively, we can follow the jump if it branches around a
6757 block of code and there are no other branches into the block.
6758 In this case invalidate_skipped_block will be called to invalidate any
6759 registers set in the block when following the jump. */
6761 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6762 && GET_CODE (p) == JUMP_INSN
6763 && GET_CODE (PATTERN (p)) == SET
6764 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6765 && JUMP_LABEL (p) != 0
6766 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6767 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6769 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6770 if ((GET_CODE (q) != NOTE
6771 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6772 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6773 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6774 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6775 break;
6777 /* If we ran into a BARRIER, this code is an extension of the
6778 basic block when the branch is taken. */
6779 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6781 /* Don't allow ourself to keep walking around an
6782 always-executed loop. */
6783 if (next_real_insn (q) == next)
6785 p = NEXT_INSN (p);
6786 continue;
6789 /* Similarly, don't put a branch in our path more than once. */
6790 for (i = 0; i < path_entry; i++)
6791 if (data->path[i].branch == p)
6792 break;
6794 if (i != path_entry)
6795 break;
6797 data->path[path_entry].branch = p;
6798 data->path[path_entry++].status = PATH_TAKEN;
6800 /* This branch now ends our path. It was possible that we
6801 didn't see this branch the last time around (when the
6802 insn in front of the target was a JUMP_INSN that was
6803 turned into a no-op). */
6804 path_size = path_entry;
6806 p = JUMP_LABEL (p);
6807 /* Mark block so we won't scan it again later. */
6808 PUT_MODE (NEXT_INSN (p), QImode);
6810 /* Detect a branch around a block of code. */
6811 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6813 rtx tmp;
6815 if (next_real_insn (q) == next)
6817 p = NEXT_INSN (p);
6818 continue;
6821 for (i = 0; i < path_entry; i++)
6822 if (data->path[i].branch == p)
6823 break;
6825 if (i != path_entry)
6826 break;
6828 /* This is no_labels_between_p (p, q) with an added check for
6829 reaching the end of a function (in case Q precedes P). */
6830 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6831 if (GET_CODE (tmp) == CODE_LABEL)
6832 break;
6834 if (tmp == q)
6836 data->path[path_entry].branch = p;
6837 data->path[path_entry++].status = PATH_AROUND;
6839 path_size = path_entry;
6841 p = JUMP_LABEL (p);
6842 /* Mark block so we won't scan it again later. */
6843 PUT_MODE (NEXT_INSN (p), QImode);
6847 p = NEXT_INSN (p);
6850 data->low_cuid = low_cuid;
6851 data->high_cuid = high_cuid;
6852 data->nsets = nsets;
6853 data->last = p;
6855 /* If all jumps in the path are not taken, set our path length to zero
6856 so a rescan won't be done. */
6857 for (i = path_size - 1; i >= 0; i--)
6858 if (data->path[i].status != PATH_NOT_TAKEN)
6859 break;
6861 if (i == -1)
6862 data->path_size = 0;
6863 else
6864 data->path_size = path_size;
6866 /* End the current branch path. */
6867 data->path[path_size].branch = 0;
6870 /* Perform cse on the instructions of a function.
6871 F is the first instruction.
6872 NREGS is one plus the highest pseudo-reg number used in the instruction.
6874 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6875 (only if -frerun-cse-after-loop).
6877 Returns 1 if jump_optimize should be redone due to simplifications
6878 in conditional jump instructions. */
6881 cse_main (rtx f, int nregs, int after_loop, FILE *file)
6883 struct cse_basic_block_data val;
6884 rtx insn = f;
6885 int i;
6887 val.path = xmalloc (sizeof (struct branch_path)
6888 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6890 cse_jumps_altered = 0;
6891 recorded_label_ref = 0;
6892 constant_pool_entries_cost = 0;
6893 constant_pool_entries_regcost = 0;
6894 val.path_size = 0;
6895 rtl_hooks = cse_rtl_hooks;
6897 init_recog ();
6898 init_alias_analysis ();
6900 max_reg = nregs;
6902 max_insn_uid = get_max_uid ();
6904 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6906 #ifdef LOAD_EXTEND_OP
6908 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6909 and change the code and mode as appropriate. */
6910 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6911 #endif
6913 /* Reset the counter indicating how many elements have been made
6914 thus far. */
6915 n_elements_made = 0;
6917 /* Find the largest uid. */
6919 max_uid = get_max_uid ();
6920 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6922 /* Compute the mapping from uids to cuids.
6923 CUIDs are numbers assigned to insns, like uids,
6924 except that cuids increase monotonically through the code.
6925 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6926 between two insns is not affected by -g. */
6928 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6930 if (GET_CODE (insn) != NOTE
6931 || NOTE_LINE_NUMBER (insn) < 0)
6932 INSN_CUID (insn) = ++i;
6933 else
6934 /* Give a line number note the same cuid as preceding insn. */
6935 INSN_CUID (insn) = i;
6938 ggc_push_context ();
6940 /* Loop over basic blocks.
6941 Compute the maximum number of qty's needed for each basic block
6942 (which is 2 for each SET). */
6943 insn = f;
6944 while (insn)
6946 cse_altered = 0;
6947 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6948 flag_cse_skip_blocks);
6950 /* If this basic block was already processed or has no sets, skip it. */
6951 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6953 PUT_MODE (insn, VOIDmode);
6954 insn = (val.last ? NEXT_INSN (val.last) : 0);
6955 val.path_size = 0;
6956 continue;
6959 cse_basic_block_start = val.low_cuid;
6960 cse_basic_block_end = val.high_cuid;
6961 max_qty = val.nsets * 2;
6963 if (file)
6964 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6965 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6966 val.nsets);
6968 /* Make MAX_QTY bigger to give us room to optimize
6969 past the end of this basic block, if that should prove useful. */
6970 if (max_qty < 500)
6971 max_qty = 500;
6973 max_qty += max_reg;
6975 /* If this basic block is being extended by following certain jumps,
6976 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6977 Otherwise, we start after this basic block. */
6978 if (val.path_size > 0)
6979 cse_basic_block (insn, val.last, val.path, 0);
6980 else
6982 int old_cse_jumps_altered = cse_jumps_altered;
6983 rtx temp;
6985 /* When cse changes a conditional jump to an unconditional
6986 jump, we want to reprocess the block, since it will give
6987 us a new branch path to investigate. */
6988 cse_jumps_altered = 0;
6989 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6990 if (cse_jumps_altered == 0
6991 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6992 insn = temp;
6994 cse_jumps_altered |= old_cse_jumps_altered;
6997 if (cse_altered)
6998 ggc_collect ();
7000 #ifdef USE_C_ALLOCA
7001 alloca (0);
7002 #endif
7005 ggc_pop_context ();
7007 if (max_elements_made < n_elements_made)
7008 max_elements_made = n_elements_made;
7010 /* Clean up. */
7011 end_alias_analysis ();
7012 free (uid_cuid);
7013 free (reg_eqv_table);
7014 free (val.path);
7015 rtl_hooks = general_rtl_hooks;
7017 return cse_jumps_altered || recorded_label_ref;
7020 /* Process a single basic block. FROM and TO and the limits of the basic
7021 block. NEXT_BRANCH points to the branch path when following jumps or
7022 a null path when not following jumps.
7024 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7025 loop. This is true when we are being called for the last time on a
7026 block and this CSE pass is before loop.c. */
7028 static rtx
7029 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
7030 int around_loop)
7032 rtx insn;
7033 int to_usage = 0;
7034 rtx libcall_insn = NULL_RTX;
7035 int num_insns = 0;
7036 int no_conflict = 0;
7038 /* This array is undefined before max_reg, so only allocate
7039 the space actually needed and adjust the start. */
7041 qty_table = xmalloc ((max_qty - max_reg) * sizeof (struct qty_table_elem));
7042 qty_table -= max_reg;
7044 new_basic_block ();
7046 /* TO might be a label. If so, protect it from being deleted. */
7047 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7048 ++LABEL_NUSES (to);
7050 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7052 enum rtx_code code = GET_CODE (insn);
7054 /* If we have processed 1,000 insns, flush the hash table to
7055 avoid extreme quadratic behavior. We must not include NOTEs
7056 in the count since there may be more of them when generating
7057 debugging information. If we clear the table at different
7058 times, code generated with -g -O might be different than code
7059 generated with -O but not -g.
7061 ??? This is a real kludge and needs to be done some other way.
7062 Perhaps for 2.9. */
7063 if (code != NOTE && num_insns++ > 1000)
7065 flush_hash_table ();
7066 num_insns = 0;
7069 /* See if this is a branch that is part of the path. If so, and it is
7070 to be taken, do so. */
7071 if (next_branch->branch == insn)
7073 enum taken status = next_branch++->status;
7074 if (status != PATH_NOT_TAKEN)
7076 if (status == PATH_TAKEN)
7077 record_jump_equiv (insn, 1);
7078 else
7079 invalidate_skipped_block (NEXT_INSN (insn));
7081 /* Set the last insn as the jump insn; it doesn't affect cc0.
7082 Then follow this branch. */
7083 #ifdef HAVE_cc0
7084 prev_insn_cc0 = 0;
7085 prev_insn = insn;
7086 #endif
7087 insn = JUMP_LABEL (insn);
7088 continue;
7092 if (GET_MODE (insn) == QImode)
7093 PUT_MODE (insn, VOIDmode);
7095 if (GET_RTX_CLASS (code) == RTX_INSN)
7097 rtx p;
7099 /* Process notes first so we have all notes in canonical forms when
7100 looking for duplicate operations. */
7102 if (REG_NOTES (insn))
7103 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7105 /* Track when we are inside in LIBCALL block. Inside such a block,
7106 we do not want to record destinations. The last insn of a
7107 LIBCALL block is not considered to be part of the block, since
7108 its destination is the result of the block and hence should be
7109 recorded. */
7111 if (REG_NOTES (insn) != 0)
7113 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7114 libcall_insn = XEXP (p, 0);
7115 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7117 /* Keep libcall_insn for the last SET insn of a no-conflict
7118 block to prevent changing the destination. */
7119 if (! no_conflict)
7120 libcall_insn = 0;
7121 else
7122 no_conflict = -1;
7124 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
7125 no_conflict = 1;
7128 cse_insn (insn, libcall_insn);
7130 if (no_conflict == -1)
7132 libcall_insn = 0;
7133 no_conflict = 0;
7136 /* If we haven't already found an insn where we added a LABEL_REF,
7137 check this one. */
7138 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7139 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7140 (void *) insn))
7141 recorded_label_ref = 1;
7144 /* If INSN is now an unconditional jump, skip to the end of our
7145 basic block by pretending that we just did the last insn in the
7146 basic block. If we are jumping to the end of our block, show
7147 that we can have one usage of TO. */
7149 if (any_uncondjump_p (insn))
7151 if (to == 0)
7153 free (qty_table + max_reg);
7154 return 0;
7157 if (JUMP_LABEL (insn) == to)
7158 to_usage = 1;
7160 /* Maybe TO was deleted because the jump is unconditional.
7161 If so, there is nothing left in this basic block. */
7162 /* ??? Perhaps it would be smarter to set TO
7163 to whatever follows this insn,
7164 and pretend the basic block had always ended here. */
7165 if (INSN_DELETED_P (to))
7166 break;
7168 insn = PREV_INSN (to);
7171 /* See if it is ok to keep on going past the label
7172 which used to end our basic block. Remember that we incremented
7173 the count of that label, so we decrement it here. If we made
7174 a jump unconditional, TO_USAGE will be one; in that case, we don't
7175 want to count the use in that jump. */
7177 if (to != 0 && NEXT_INSN (insn) == to
7178 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7180 struct cse_basic_block_data val;
7181 rtx prev;
7183 insn = NEXT_INSN (to);
7185 /* If TO was the last insn in the function, we are done. */
7186 if (insn == 0)
7188 free (qty_table + max_reg);
7189 return 0;
7192 /* If TO was preceded by a BARRIER we are done with this block
7193 because it has no continuation. */
7194 prev = prev_nonnote_insn (to);
7195 if (prev && GET_CODE (prev) == BARRIER)
7197 free (qty_table + max_reg);
7198 return insn;
7201 /* Find the end of the following block. Note that we won't be
7202 following branches in this case. */
7203 to_usage = 0;
7204 val.path_size = 0;
7205 val.path = xmalloc (sizeof (struct branch_path)
7206 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7207 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7208 free (val.path);
7210 /* If the tables we allocated have enough space left
7211 to handle all the SETs in the next basic block,
7212 continue through it. Otherwise, return,
7213 and that block will be scanned individually. */
7214 if (val.nsets * 2 + next_qty > max_qty)
7215 break;
7217 cse_basic_block_start = val.low_cuid;
7218 cse_basic_block_end = val.high_cuid;
7219 to = val.last;
7221 /* Prevent TO from being deleted if it is a label. */
7222 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7223 ++LABEL_NUSES (to);
7225 /* Back up so we process the first insn in the extension. */
7226 insn = PREV_INSN (insn);
7230 if (next_qty > max_qty)
7231 abort ();
7233 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7234 the previous insn is the only insn that branches to the head of a loop,
7235 we can cse into the loop. Don't do this if we changed the jump
7236 structure of a loop unless we aren't going to be following jumps. */
7238 insn = prev_nonnote_insn (to);
7239 if ((cse_jumps_altered == 0
7240 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7241 && around_loop && to != 0
7242 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7243 && GET_CODE (insn) == JUMP_INSN
7244 && JUMP_LABEL (insn) != 0
7245 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7246 cse_around_loop (JUMP_LABEL (insn));
7248 free (qty_table + max_reg);
7250 return to ? NEXT_INSN (to) : 0;
7253 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7254 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7256 static int
7257 check_for_label_ref (rtx *rtl, void *data)
7259 rtx insn = (rtx) data;
7261 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7262 we must rerun jump since it needs to place the note. If this is a
7263 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7264 since no REG_LABEL will be added. */
7265 return (GET_CODE (*rtl) == LABEL_REF
7266 && ! LABEL_REF_NONLOCAL_P (*rtl)
7267 && LABEL_P (XEXP (*rtl, 0))
7268 && INSN_UID (XEXP (*rtl, 0)) != 0
7269 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7272 /* Count the number of times registers are used (not set) in X.
7273 COUNTS is an array in which we accumulate the count, INCR is how much
7274 we count each register usage. */
7276 static void
7277 count_reg_usage (rtx x, int *counts, int incr)
7279 enum rtx_code code;
7280 rtx note;
7281 const char *fmt;
7282 int i, j;
7284 if (x == 0)
7285 return;
7287 switch (code = GET_CODE (x))
7289 case REG:
7290 counts[REGNO (x)] += incr;
7291 return;
7293 case PC:
7294 case CC0:
7295 case CONST:
7296 case CONST_INT:
7297 case CONST_DOUBLE:
7298 case CONST_VECTOR:
7299 case SYMBOL_REF:
7300 case LABEL_REF:
7301 return;
7303 case CLOBBER:
7304 /* If we are clobbering a MEM, mark any registers inside the address
7305 as being used. */
7306 if (GET_CODE (XEXP (x, 0)) == MEM)
7307 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7308 return;
7310 case SET:
7311 /* Unless we are setting a REG, count everything in SET_DEST. */
7312 if (!REG_P (SET_DEST (x)))
7313 count_reg_usage (SET_DEST (x), counts, incr);
7314 count_reg_usage (SET_SRC (x), counts, incr);
7315 return;
7317 case CALL_INSN:
7318 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7319 /* Fall through. */
7321 case INSN:
7322 case JUMP_INSN:
7323 count_reg_usage (PATTERN (x), counts, incr);
7325 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7326 use them. */
7328 note = find_reg_equal_equiv_note (x);
7329 if (note)
7331 rtx eqv = XEXP (note, 0);
7333 if (GET_CODE (eqv) == EXPR_LIST)
7334 /* This REG_EQUAL note describes the result of a function call.
7335 Process all the arguments. */
7338 count_reg_usage (XEXP (eqv, 0), counts, incr);
7339 eqv = XEXP (eqv, 1);
7341 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7342 else
7343 count_reg_usage (eqv, counts, incr);
7345 return;
7347 case EXPR_LIST:
7348 if (REG_NOTE_KIND (x) == REG_EQUAL
7349 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7350 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7351 involving registers in the address. */
7352 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7353 count_reg_usage (XEXP (x, 0), counts, incr);
7355 count_reg_usage (XEXP (x, 1), counts, incr);
7356 return;
7358 case ASM_OPERANDS:
7359 /* Iterate over just the inputs, not the constraints as well. */
7360 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7361 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7362 return;
7364 case INSN_LIST:
7365 abort ();
7367 default:
7368 break;
7371 fmt = GET_RTX_FORMAT (code);
7372 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7374 if (fmt[i] == 'e')
7375 count_reg_usage (XEXP (x, i), counts, incr);
7376 else if (fmt[i] == 'E')
7377 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7378 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7382 /* Return true if set is live. */
7383 static bool
7384 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7385 int *counts)
7387 #ifdef HAVE_cc0
7388 rtx tem;
7389 #endif
7391 if (set_noop_p (set))
7394 #ifdef HAVE_cc0
7395 else if (GET_CODE (SET_DEST (set)) == CC0
7396 && !side_effects_p (SET_SRC (set))
7397 && ((tem = next_nonnote_insn (insn)) == 0
7398 || !INSN_P (tem)
7399 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7400 return false;
7401 #endif
7402 else if (!REG_P (SET_DEST (set))
7403 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7404 || counts[REGNO (SET_DEST (set))] != 0
7405 || side_effects_p (SET_SRC (set))
7406 /* An ADDRESSOF expression can turn into a use of the
7407 internal arg pointer, so always consider the
7408 internal arg pointer live. If it is truly dead,
7409 flow will delete the initializing insn. */
7410 || (SET_DEST (set) == current_function_internal_arg_pointer))
7411 return true;
7412 return false;
7415 /* Return true if insn is live. */
7417 static bool
7418 insn_live_p (rtx insn, int *counts)
7420 int i;
7421 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7422 return true;
7423 else if (GET_CODE (PATTERN (insn)) == SET)
7424 return set_live_p (PATTERN (insn), insn, counts);
7425 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7427 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7429 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7431 if (GET_CODE (elt) == SET)
7433 if (set_live_p (elt, insn, counts))
7434 return true;
7436 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7437 return true;
7439 return false;
7441 else
7442 return true;
7445 /* Return true if libcall is dead as a whole. */
7447 static bool
7448 dead_libcall_p (rtx insn, int *counts)
7450 rtx note, set, new;
7452 /* See if there's a REG_EQUAL note on this insn and try to
7453 replace the source with the REG_EQUAL expression.
7455 We assume that insns with REG_RETVALs can only be reg->reg
7456 copies at this point. */
7457 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7458 if (!note)
7459 return false;
7461 set = single_set (insn);
7462 if (!set)
7463 return false;
7465 new = simplify_rtx (XEXP (note, 0));
7466 if (!new)
7467 new = XEXP (note, 0);
7469 /* While changing insn, we must update the counts accordingly. */
7470 count_reg_usage (insn, counts, -1);
7472 if (validate_change (insn, &SET_SRC (set), new, 0))
7474 count_reg_usage (insn, counts, 1);
7475 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7476 remove_note (insn, note);
7477 return true;
7480 if (CONSTANT_P (new))
7482 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7483 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7485 count_reg_usage (insn, counts, 1);
7486 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7487 remove_note (insn, note);
7488 return true;
7492 count_reg_usage (insn, counts, 1);
7493 return false;
7496 /* Scan all the insns and delete any that are dead; i.e., they store a register
7497 that is never used or they copy a register to itself.
7499 This is used to remove insns made obviously dead by cse, loop or other
7500 optimizations. It improves the heuristics in loop since it won't try to
7501 move dead invariants out of loops or make givs for dead quantities. The
7502 remaining passes of the compilation are also sped up. */
7505 delete_trivially_dead_insns (rtx insns, int nreg)
7507 int *counts;
7508 rtx insn, prev;
7509 int in_libcall = 0, dead_libcall = 0;
7510 int ndead = 0, nlastdead, niterations = 0;
7512 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7513 /* First count the number of times each register is used. */
7514 counts = xcalloc (nreg, sizeof (int));
7515 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7516 count_reg_usage (insn, counts, 1);
7520 nlastdead = ndead;
7521 niterations++;
7522 /* Go from the last insn to the first and delete insns that only set unused
7523 registers or copy a register to itself. As we delete an insn, remove
7524 usage counts for registers it uses.
7526 The first jump optimization pass may leave a real insn as the last
7527 insn in the function. We must not skip that insn or we may end
7528 up deleting code that is not really dead. */
7529 insn = get_last_insn ();
7530 if (! INSN_P (insn))
7531 insn = prev_real_insn (insn);
7533 for (; insn; insn = prev)
7535 int live_insn = 0;
7537 prev = prev_real_insn (insn);
7539 /* Don't delete any insns that are part of a libcall block unless
7540 we can delete the whole libcall block.
7542 Flow or loop might get confused if we did that. Remember
7543 that we are scanning backwards. */
7544 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7546 in_libcall = 1;
7547 live_insn = 1;
7548 dead_libcall = dead_libcall_p (insn, counts);
7550 else if (in_libcall)
7551 live_insn = ! dead_libcall;
7552 else
7553 live_insn = insn_live_p (insn, counts);
7555 /* If this is a dead insn, delete it and show registers in it aren't
7556 being used. */
7558 if (! live_insn)
7560 count_reg_usage (insn, counts, -1);
7561 delete_insn_and_edges (insn);
7562 ndead++;
7565 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7567 in_libcall = 0;
7568 dead_libcall = 0;
7572 while (ndead != nlastdead);
7574 if (dump_file && ndead)
7575 fprintf (dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7576 ndead, niterations);
7577 /* Clean up. */
7578 free (counts);
7579 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7580 return ndead;
7583 /* This function is called via for_each_rtx. The argument, NEWREG, is
7584 a condition code register with the desired mode. If we are looking
7585 at the same register in a different mode, replace it with
7586 NEWREG. */
7588 static int
7589 cse_change_cc_mode (rtx *loc, void *data)
7591 rtx newreg = (rtx) data;
7593 if (*loc
7594 && REG_P (*loc)
7595 && REGNO (*loc) == REGNO (newreg)
7596 && GET_MODE (*loc) != GET_MODE (newreg))
7598 *loc = newreg;
7599 return -1;
7601 return 0;
7604 /* Change the mode of any reference to the register REGNO (NEWREG) to
7605 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7606 any instruction which modifies NEWREG. */
7608 static void
7609 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7611 rtx insn;
7613 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7615 if (! INSN_P (insn))
7616 continue;
7618 if (reg_set_p (newreg, insn))
7619 return;
7621 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, newreg);
7622 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, newreg);
7626 /* BB is a basic block which finishes with CC_REG as a condition code
7627 register which is set to CC_SRC. Look through the successors of BB
7628 to find blocks which have a single predecessor (i.e., this one),
7629 and look through those blocks for an assignment to CC_REG which is
7630 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7631 permitted to change the mode of CC_SRC to a compatible mode. This
7632 returns VOIDmode if no equivalent assignments were found.
7633 Otherwise it returns the mode which CC_SRC should wind up with.
7635 The main complexity in this function is handling the mode issues.
7636 We may have more than one duplicate which we can eliminate, and we
7637 try to find a mode which will work for multiple duplicates. */
7639 static enum machine_mode
7640 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7642 bool found_equiv;
7643 enum machine_mode mode;
7644 unsigned int insn_count;
7645 edge e;
7646 rtx insns[2];
7647 enum machine_mode modes[2];
7648 rtx last_insns[2];
7649 unsigned int i;
7650 rtx newreg;
7652 /* We expect to have two successors. Look at both before picking
7653 the final mode for the comparison. If we have more successors
7654 (i.e., some sort of table jump, although that seems unlikely),
7655 then we require all beyond the first two to use the same
7656 mode. */
7658 found_equiv = false;
7659 mode = GET_MODE (cc_src);
7660 insn_count = 0;
7661 for (e = bb->succ; e; e = e->succ_next)
7663 rtx insn;
7664 rtx end;
7666 if (e->flags & EDGE_COMPLEX)
7667 continue;
7669 if (! e->dest->pred
7670 || e->dest->pred->pred_next
7671 || e->dest == EXIT_BLOCK_PTR)
7672 continue;
7674 end = NEXT_INSN (BB_END (e->dest));
7675 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7677 rtx set;
7679 if (! INSN_P (insn))
7680 continue;
7682 /* If CC_SRC is modified, we have to stop looking for
7683 something which uses it. */
7684 if (modified_in_p (cc_src, insn))
7685 break;
7687 /* Check whether INSN sets CC_REG to CC_SRC. */
7688 set = single_set (insn);
7689 if (set
7690 && REG_P (SET_DEST (set))
7691 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7693 bool found;
7694 enum machine_mode set_mode;
7695 enum machine_mode comp_mode;
7697 found = false;
7698 set_mode = GET_MODE (SET_SRC (set));
7699 comp_mode = set_mode;
7700 if (rtx_equal_p (cc_src, SET_SRC (set)))
7701 found = true;
7702 else if (GET_CODE (cc_src) == COMPARE
7703 && GET_CODE (SET_SRC (set)) == COMPARE
7704 && mode != set_mode
7705 && rtx_equal_p (XEXP (cc_src, 0),
7706 XEXP (SET_SRC (set), 0))
7707 && rtx_equal_p (XEXP (cc_src, 1),
7708 XEXP (SET_SRC (set), 1)))
7711 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7712 if (comp_mode != VOIDmode
7713 && (can_change_mode || comp_mode == mode))
7714 found = true;
7717 if (found)
7719 found_equiv = true;
7720 if (insn_count < ARRAY_SIZE (insns))
7722 insns[insn_count] = insn;
7723 modes[insn_count] = set_mode;
7724 last_insns[insn_count] = end;
7725 ++insn_count;
7727 if (mode != comp_mode)
7729 if (! can_change_mode)
7730 abort ();
7731 mode = comp_mode;
7732 PUT_MODE (cc_src, mode);
7735 else
7737 if (set_mode != mode)
7739 /* We found a matching expression in the
7740 wrong mode, but we don't have room to
7741 store it in the array. Punt. This case
7742 should be rare. */
7743 break;
7745 /* INSN sets CC_REG to a value equal to CC_SRC
7746 with the right mode. We can simply delete
7747 it. */
7748 delete_insn (insn);
7751 /* We found an instruction to delete. Keep looking,
7752 in the hopes of finding a three-way jump. */
7753 continue;
7756 /* We found an instruction which sets the condition
7757 code, so don't look any farther. */
7758 break;
7761 /* If INSN sets CC_REG in some other way, don't look any
7762 farther. */
7763 if (reg_set_p (cc_reg, insn))
7764 break;
7767 /* If we fell off the bottom of the block, we can keep looking
7768 through successors. We pass CAN_CHANGE_MODE as false because
7769 we aren't prepared to handle compatibility between the
7770 further blocks and this block. */
7771 if (insn == end)
7773 enum machine_mode submode;
7775 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7776 if (submode != VOIDmode)
7778 if (submode != mode)
7779 abort ();
7780 found_equiv = true;
7781 can_change_mode = false;
7786 if (! found_equiv)
7787 return VOIDmode;
7789 /* Now INSN_COUNT is the number of instructions we found which set
7790 CC_REG to a value equivalent to CC_SRC. The instructions are in
7791 INSNS. The modes used by those instructions are in MODES. */
7793 newreg = NULL_RTX;
7794 for (i = 0; i < insn_count; ++i)
7796 if (modes[i] != mode)
7798 /* We need to change the mode of CC_REG in INSNS[i] and
7799 subsequent instructions. */
7800 if (! newreg)
7802 if (GET_MODE (cc_reg) == mode)
7803 newreg = cc_reg;
7804 else
7805 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7807 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7808 newreg);
7811 delete_insn (insns[i]);
7814 return mode;
7817 /* If we have a fixed condition code register (or two), walk through
7818 the instructions and try to eliminate duplicate assignments. */
7820 void
7821 cse_condition_code_reg (void)
7823 unsigned int cc_regno_1;
7824 unsigned int cc_regno_2;
7825 rtx cc_reg_1;
7826 rtx cc_reg_2;
7827 basic_block bb;
7829 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7830 return;
7832 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7833 if (cc_regno_2 != INVALID_REGNUM)
7834 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7835 else
7836 cc_reg_2 = NULL_RTX;
7838 FOR_EACH_BB (bb)
7840 rtx last_insn;
7841 rtx cc_reg;
7842 rtx insn;
7843 rtx cc_src_insn;
7844 rtx cc_src;
7845 enum machine_mode mode;
7846 enum machine_mode orig_mode;
7848 /* Look for blocks which end with a conditional jump based on a
7849 condition code register. Then look for the instruction which
7850 sets the condition code register. Then look through the
7851 successor blocks for instructions which set the condition
7852 code register to the same value. There are other possible
7853 uses of the condition code register, but these are by far the
7854 most common and the ones which we are most likely to be able
7855 to optimize. */
7857 last_insn = BB_END (bb);
7858 if (GET_CODE (last_insn) != JUMP_INSN)
7859 continue;
7861 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7862 cc_reg = cc_reg_1;
7863 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7864 cc_reg = cc_reg_2;
7865 else
7866 continue;
7868 cc_src_insn = NULL_RTX;
7869 cc_src = NULL_RTX;
7870 for (insn = PREV_INSN (last_insn);
7871 insn && insn != PREV_INSN (BB_HEAD (bb));
7872 insn = PREV_INSN (insn))
7874 rtx set;
7876 if (! INSN_P (insn))
7877 continue;
7878 set = single_set (insn);
7879 if (set
7880 && REG_P (SET_DEST (set))
7881 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7883 cc_src_insn = insn;
7884 cc_src = SET_SRC (set);
7885 break;
7887 else if (reg_set_p (cc_reg, insn))
7888 break;
7891 if (! cc_src_insn)
7892 continue;
7894 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7895 continue;
7897 /* Now CC_REG is a condition code register used for a
7898 conditional jump at the end of the block, and CC_SRC, in
7899 CC_SRC_INSN, is the value to which that condition code
7900 register is set, and CC_SRC is still meaningful at the end of
7901 the basic block. */
7903 orig_mode = GET_MODE (cc_src);
7904 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
7905 if (mode != VOIDmode)
7907 if (mode != GET_MODE (cc_src))
7908 abort ();
7909 if (mode != orig_mode)
7911 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7913 /* Change the mode of CC_REG in CC_SRC_INSN to
7914 GET_MODE (NEWREG). */
7915 for_each_rtx (&PATTERN (cc_src_insn), cse_change_cc_mode,
7916 newreg);
7917 for_each_rtx (&REG_NOTES (cc_src_insn), cse_change_cc_mode,
7918 newreg);
7920 /* Do the same in the following insns that use the
7921 current value of CC_REG within BB. */
7922 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7923 NEXT_INSN (last_insn),
7924 newreg);