gcc/ChangeLog

   1 2020-05-05  Eric Botcazou  <ebotcazou@adacore.com>
   2
   3         * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
   4         (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
   5         * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
   6
   7 2020-05-05  Eric Botcazou  <ebotcazou@adacore.com>
   8
   9         * gimplify.c (gimplify_init_constructor): Do not put the constructor
  10         into static memory if it is not complete.
  11
  12 2020-05-05  Richard Biener  <rguenther@suse.de>
  13
  14         PR tree-optimization/94949
  15         * tree-ssa-loop-im.c (execute_sm): Check whether we use
  16         the multithreaded model or always compute the stored value
  17         before eliding a load.
  18
  19 2020-05-05  Alex Coplan  <alex.coplan@arm.com>
  20
  21         * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
  22
  23 2020-05-05  Jakub Jelinek  <jakub@redhat.com>
  24
  25         PR tree-optimization/94800
  26         * match.pd (X + (X << C) to X * (1 + (1 << C)),
  27         (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
  28         canonicalizations.
  29
  30         PR target/94942
  31         * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
  32
  33         PR tree-optimization/94914
  34         * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
  35         New simplification.
  36
  37 2020-05-05  Uroš Bizjak  <ubizjak@gmail.com>
  38
  39         * config/i386/i386.md (*testqi_ext_3): Use
  40         int_nonimmediate_operand instead of manual mode checks.
  41         (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
  42         Use int_nonimmediate_operand predicate.  Rewrite
  43         define_insn_and_split pattern to a combine pass splitter.
  44
  45 2020-05-05  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  46
  47         * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
  48         * configure: Regenerate.
  49
  50 2020-05-05  Jakub Jelinek  <jakub@redhat.com>
  51
  52         PR target/94460
  53         * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
  54         ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
  55         avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
  56         ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
  57
  58 2020-05-04  Clement Chigot  <clement.chigot@atos.net>
  59             David Edelsohn  <dje.gcc@gmail.com>
  60
  61         * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
  62         for fmodl, frexpl, ldexpl and modfl builtins.
  63
  64 2020-05-04  Richard Sandiford  <richard.sandiford@arm.com>
  65
  66         PR middle-end/94941
  67         * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
  68         chosen lhs is different from the gcall lhs.
  69         (expand_mask_load_optab_fn): Likewise.
  70         (expand_gather_load_optab_fn): Likewise.
  71
  72 2020-05-04  Uroš Bizjak  <ubizjak@gmail.com>
  73
  74         PR target/94795
  75         * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
  76         (EQ compare->LTU compare splitter): New splitter.
  77         (NE compare->NEG splitter): Ditto.
  78
  79 2020-05-04  Marek Polacek  <polacek@redhat.com>
  80
  81         Revert:
  82         2020-04-30  Marek Polacek  <polacek@redhat.com>
  83
  84         PR c++/94775
  85         * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
  86         (check_aligned_type): Check if TYPE_USER_ALIGN match.
  87
  88 2020-05-04  Richard Biener  <rguenther@suse.de>
  89
  90         PR tree-optimization/93891
  91         * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
  92         the original reference tree for assessing access alignment.
  93
  94 2020-05-04  Richard Biener  <rguenther@suse.de>
  95
  96         PR tree-optimization/39612
  97         * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
  98         (set_ref_loaded_in_loop): New.
  99         (mark_ref_loaded): Likewise.
 100         (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
 101         (execute_sm): Avoid issueing a load when it was not there.
 102         (execute_sm_if_changed): Avoid issueing warnings for the
 103         conditional store.
 104
 105 2020-05-04  Martin Jambor  <mjambor@suse.cz>
 106
 107         PR ipa/93385
 108         * tree-inline.c (tree_function_versioning): Leave any type conversion
 109         of replacements to setup_one_parameter and its friend
 110         force_value_to_type.
 111
 112 2020-05-04  Uroš Bizjak  <ubizjak@gmail.com>
 113
 114         PR target/94650
 115         * config/i386/predicates.md (shr_comparison_operator): New predicate.
 116         * config/i386/i386.md (compare->shr splitter): New splitters.
 117
 118 2020-05-04  Jakub Jelinek  <jakub@redhat.com>
 119
 120         PR tree-optimization/94718
 121         * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
 122
 123         PR tree-optimization/94718
 124         * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
 125         replace two nop conversions on bit_{and,ior,xor} argument
 126         and result with just one conversion on the result or another argument.
 127
 128         PR tree-optimization/94718
 129         * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
 130         -> (X ^ Y) & C eqne 0 optimization to ...
 131         * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
 132
 133         * opts.c (get_option_html_page): Instead of hardcoding a list of
 134         options common between C/C++ and Fortran only use gfortran/
 135         documentation for warnings that have CL_Fortran set but not
 136         CL_C or CL_CXX.
 137
 138 2020-05-03  Uroš Bizjak  <ubizjak@gmail.com>
 139
 140         * config/i386/i386-expand.c (ix86_expand_int_movcc):
 141         Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
 142         (emit_memmov): Ditto.
 143         (emit_memset): Ditto.
 144         (ix86_expand_strlensi_unroll_1): Ditto.
 145         (release_scratch_register_on_entry): Ditto.
 146         (gen_frame_set): Ditto.
 147         (ix86_emit_restore_reg_using_pop): Ditto.
 148         (ix86_emit_outlined_ms2sysv_restore): Ditto.
 149         (ix86_expand_epilogue): Ditto.
 150         (ix86_expand_split_stack_prologue): Ditto.
 151         * config/i386/i386.md (push immediate splitter): Ditto.
 152         (strmov): Ditto.
 153         (strset): Ditto.
 154
 155 2020-05-02  Iain Sandoe  <iain@sandoe.co.uk>
 156
 157         PR translation/93861
 158         * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
 159         a warning.
 160
 161 2020-05-02  Jakub Jelinek  <jakub@redhat.com>
 162
 163         * config/tilegx/tilegx.md
 164         (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
 165         rather than just <n>.
 166
 167 2020-05-01  H.J. Lu  <hongjiu.lu@intel.com>
 168
 169         PR target/93492
 170         * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
 171         and crtl->patch_area_entry.
 172         * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
 173         * opts.c (common_handle_option): Limit
 174         function_entry_patch_area_size and function_entry_patch_area_start
 175         to USHRT_MAX.  Fix a typo in error message.
 176         * varasm.c (assemble_start_function): Use crtl->patch_area_size
 177         and crtl->patch_area_entry.
 178         * doc/invoke.texi: Document the maximum value for
 179         -fpatchable-function-entry.
 180
 181 2020-05-01  Iain Sandoe  <iain@sandoe.co.uk>
 182
 183         * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
 184         Override SUBTARGET_SHADOW_OFFSET macro.
 185
 186 2020-05-01  Andreas Tobler  <andreast@gcc.gnu.org>
 187
 188         * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
 189         * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
 190         * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
 191         * config/i386/freebsd.h: Likewise.
 192         * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
 193         LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
 194
 195 2020-04-30  Alexandre Oliva <oliva@adacore.com>
 196
 197         * doc/sourcebuild.texi (Effective-Target Keywords): Document
 198         the newly-introduced fileio effective target.
 199
 200 2020-04-30  Richard Sandiford  <richard.sandiford@arm.com>
 201
 202         PR rtl-optimization/94740
 203         * cse.c (cse_process_notes_1): Replace with...
 204         (cse_process_note_1): ...this new function, acting as a
 205         simplify_replace_fn_rtx callback to process_note.  Handle only
 206         REGs and MEMs directly.  Validate the MEM if cse_process_note
 207         changes its address.
 208         (cse_process_notes): Replace with...
 209         (cse_process_note): ...this new function.
 210         (cse_extended_basic_block): Update accordingly, iterating over
 211         the register notes and passing individual notes to cse_process_note.
 212
 213 2020-04-30  Carl Love  <cel@us.ibm.com>
 214
 215         * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
 216
 217 2020-04-30  Martin Jambor  <mjambor@suse.cz>
 218
 219         PR ipa/94856
 220         * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
 221         saved by the inliner and thunks which had their call inlined.
 222         * ipa-inline-transform.c (save_inline_function_body): Fill in
 223         former_clone_of of new body holders.
 224
 225 2020-04-30  Jakub Jelinek  <jakub@redhat.com>
 226
 227         * BASE-VER: Set to 11.0.0.
 228
 229 2020-04-30  Jonathan Wakely  <jwakely@redhat.com>
 230
 231         * pretty-print.c (pp_take_prefix): Fix spelling in comment.
 232
 233 2020-04-30  Marek Polacek  <polacek@redhat.com>
 234
 235         PR c++/94775
 236         * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
 237         (check_aligned_type): Check if TYPE_USER_ALIGN match.
 238
 239 2020-04-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 240
 241         * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
 242         * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
 243         * doc/invoke.texi (moutline-atomics): Document as on by default.
 244
 245 2020-04-30  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 246
 247         PR target/94748
 248         * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
 249         the check for NOTE_INSN_DELETED_LABEL.
 250
 251 2020-04-30  Jakub Jelinek  <jakub@redhat.com>
 252
 253         * configure.ac (--with-documentation-root-url,
 254         --with-changes-root-url): Diagnose URL not ending with /,
 255         use AC_DEFINE_UNQUOTED instead of AC_SUBST.
 256         * opts.h (get_changes_url): Remove.
 257         * opts.c (get_changes_url): Remove.
 258         * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
 259         or -DCHANGES_ROOT_URL.
 260         * doc/install.texi (--with-documentation-root-url,
 261         --with-changes-root-url): Document.
 262         * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
 263         get_changes_url and free, change url variable type to const char * and
 264         set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
 265         * config/s390/s390.c (s390_function_arg_vector,
 266         s390_function_arg_float): Likewise.
 267         * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
 268         Likewise.
 269         * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
 270         Likewise.
 271         * config.in: Regenerate.
 272         * configure: Regenerate.
 273
 274 2020-04-30  Christophe Lyon  <christophe.lyon@linaro.org>
 275
 276         PR target/57002
 277         * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
 278
 279 2020-04-30  Andreas Krebbel  <krebbel@linux.ibm.com>
 280
 281         * config/s390/constraints.md ("j>f", "jb4"): New constraints.
 282         * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
 283         macro definitions.
 284         * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
 285         separate expander.
 286         ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
 287         Change constraint for vlrl/vstrl to jb4.
 288
 289 2020-04-30  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
 290
 291         * var-tracking.c (vt_initialize): Move variables pre and post
 292         into inner block and initialize both in order to fix warning
 293         about uninitialized use.  Remove unnecessary checks for
 294         frame_pointer_needed.
 295
 296 2020-04-30  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
 297
 298         * toplev.c (output_stack_usage_1): Ensure that first
 299         argument to fprintf is not null.
 300
 301 2020-04-29  Jakub Jelinek  <jakub@redhat.com>
 302
 303         * configure.ac (-with-changes-root-url): New configure option,
 304         defaulting to https://gcc.gnu.org/.
 305         * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
 306         opts.c.
 307         * pretty-print.c (get_end_url_string): New function.
 308         (pp_format): Handle %{ and %} for URLs.
 309         (pp_begin_url): Use pp_string instead of pp_printf.
 310         (pp_end_url): Use get_end_url_string.
 311         * opts.h (get_changes_url): Declare.
 312         * opts.c (get_changes_url): New function.
 313         * config/rs6000/rs6000-call.c: Include opts.h.
 314         (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
 315         of just in GCC 10.1 in diagnostics and add URL.
 316         * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
 317         * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
 318         Likewise.
 319         * config/s390/s390.c (s390_function_arg_vector,
 320         s390_function_arg_float): Likewise.
 321         * configure: Regenerated.
 322
 323         PR target/94704
 324         * config/s390/s390.c (s390_function_arg_vector,
 325         s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
 326         cxx17_empty_base_field_p.  In -Wpsabi diagnostics use the type
 327         passed to the function rather than the type of the single element.
 328         Rename cxx17_empty_base_seen variable to empty_base_seen, change
 329         type to int, and adjust diagnostics depending on if the field
 330         has [[no_unique_attribute]] or not.
 331
 332         PR target/94832
 333         * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
 334         _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
 335         used in casts into parens.
 336         * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
 337         _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
 338         _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
 339         _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
 340         _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
 341         _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
 342         _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
 343         * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
 344         _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
 345         _mm256_mask_cmp_epu8_mask): Likewise.
 346         * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
 347         _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
 348         * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
 349         * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
 350
 351         PR target/94832
 352         * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
 353         _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
 354         _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
 355         _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
 356         _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
 357         _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
 358         _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
 359         _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
 360         _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
 361         _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
 362         _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
 363         _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
 364         _mm256_mask_i64gather_epi32): Surround macro parameter uses with
 365         parens.
 366         (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
 367         _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
 368         _mm_i64gather_ps, _mm256_i64gather_ps): Likewise.  Don't use
 369         as mask vector containing -1.0 or -1.0f elts, but instead vector
 370         with all bits set using _mm*_cmpeq_p? with zero operands.
 371         * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
 372         _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
 373         _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
 374         _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
 375         _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
 376         _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
 377         _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
 378         _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
 379         _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
 380         _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
 381         _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
 382         _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
 383         _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
 384         _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
 385         _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
 386         _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
 387         _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
 388         parens.
 389         * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
 390         _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
 391         _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
 392         _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
 393         _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
 394         _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
 395         _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
 396         _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
 397         _mm512_mask_prefetch_i64scatter_ps): Likewise.
 398         * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
 399         _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
 400         _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
 401         _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
 402         _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
 403         _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
 404         _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
 405         _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
 406         _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
 407         _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
 408         _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
 409         _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
 410         _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
 411         _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
 412         _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
 413         _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
 414         _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
 415         _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
 416         _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
 417         _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
 418         _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
 419         _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
 420         _mm_mask_i64scatter_epi64): Likewise.
 421
 422 2020-04-29  Jeff Law  <law@redhat.com>
 423
 424         * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
 425         division instructions are 4 bytes long.
 426
 427 2020-04-29  Jakub Jelinek  <jakub@redhat.com>
 428
 429         PR target/94826
 430         * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
 431         TARGET_EXPR instead of MODIFY_EXPR for first assignment to
 432         fenv_var, fenv_clear and old_fenv variables.  For fenv_addr
 433         take address of TARGET_EXPR of fenv_var with void_node initializer.
 434         Formatting fixes.
 435
 436 2020-04-29  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
 437
 438         PR tree-optimization/94774
 439         * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
 440         variable retval.
 441
 442 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
 443
 444         * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
 445         * calls.c (cxx17_empty_base_field_p): New function.  Check
 446         DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
 447         previous checks.
 448
 449 2020-04-29  H.J. Lu  <hongjiu.lu@intel.com>
 450
 451         PR target/93654
 452         * config/i386/i386-options.c (ix86_set_indirect_branch_type):
 453         Allow -fcf-protection with -mindirect-branch=thunk-extern and
 454         -mfunction-return=thunk-extern.
 455         * doc/invoke.texi: Update notes for -fcf-protection=branch with
 456         -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
 457
 458 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
 459
 460         * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
 461
 462 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
 463
 464         * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
 465         TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
 466         fenv_var and new_fenv_var.
 467
 468 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
 469
 470         * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
 471         effective-target keyword.
 472         (arm_arch_v8a_hard_multilib): Likewise.
 473         (arm_arch_v8a_hard): Document new dg-add-options keyword.
 474         * config/arm/arm.c (arm_return_in_memory): Note that the APCS
 475         code is deprecated and has not been updated to handle
 476         DECL_FIELD_ABI_IGNORED.
 477         (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
 478         (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
 479         (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
 480         avoid_cxx17_empty_base with a pointer to a bitmask.  Ignore fields
 481         whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
 482         something actually is a HFA or HVA.  Record whether we see a
 483         [[no_unique_address]] field that previous GCCs would not have
 484         ignored in this way.
 485         (aapcs_vfp_is_call_or_return_candidate): Update the calls to
 486         aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
 487         [[no_unique_address]] case.  Use TYPE_MAIN_VARIANT in the
 488         diagnostic messages.
 489         (arm_needs_doubleword_align): Add a comment explaining why we
 490         consider even zero-sized fields.
 491
 492 2020-04-29  Richard Biener  <rguenther@suse.de>
 493             Li Zekun  <lizekun1@huawei.com>
 494
 495         PR lto/94822
 496         * tree.c (component_ref_size): Guard against error_mark_node
 497         DECL_INITIAL as it happens with LTO.
 498
 499 2020-04-29  Richard Sandiford  <richard.sandiford@arm.com>
 500
 501         * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
 502         comment explaining why we consider even zero-sized fields.
 503         (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
 504         (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
 505         (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
 506         avoid_cxx17_empty_base with a pointer to a bitmask.  Ignore fields
 507         whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
 508         something actually is a HFA or HVA.  Record whether we see a
 509         [[no_unique_address]] field that previous GCCs would not have
 510         ignored in this way.
 511         (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
 512         whether diagnostics should be suppressed.  Update the calls to
 513         aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
 514         [[no_unique_address]] case.
 515         (aarch64_return_in_msb): Update call accordingly, never silencing
 516         diagnostics.
 517         (aarch64_function_value): Likewise.
 518         (aarch64_return_in_memory_1): Likewise.
 519         (aarch64_init_cumulative_args): Likewise.
 520         (aarch64_gimplify_va_arg_expr): Likewise.
 521         (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
 522         use it to decide whether arch64_vfp_is_call_or_return_candidate
 523         should be silent.
 524         (aarch64_pass_by_reference): Update calls accordingly.
 525         (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
 526         to decide whether arch64_vfp_is_call_or_return_candidate should be
 527         silent.
 528
 529 2020-04-29  Haijian Zhang  <z.zhanghaijian@huawei.com>
 530
 531         PR target/94820
 532         * config/aarch64/aarch64-builtins.c
 533         (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
 534         MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
 535         new_fenv_var.
 536
 537 2020-04-29  Thomas Schwinge  <thomas@codesourcery.com>
 538
 539         * configure.ac <$enable_offload_targets>: Do parsing as done
 540         elsewhere.
 541         * configure: Regenerate.
 542
 543         * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
 544         * configure: Regenerate.
 545
 546         PR target/94279
 547         * rtlanal.c (set_noop_p): Handle non-constant selectors.
 548
 549         PR target/94282
 550         * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
 551         function.
 552         (TARGET_EXCEPT_UNWIND_INFO): Define.
 553
 554 2020-04-29  Jakub Jelinek  <jakub@redhat.com>
 555
 556         PR target/94248
 557         * config/gcn/gcn.md (*mov<mode>_insn): Use
 558         'reg_overlap_mentioned_p' to check for overlap.
 559
 560         PR target/94706
 561         * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
 562         instead of cxx17_empty_base_field_p.
 563
 564         PR target/94707
 565         * tree-core.h (tree_decl_common): Note decl_flag_0 used for
 566         DECL_FIELD_ABI_IGNORED.
 567         * tree.h (DECL_FIELD_ABI_IGNORED): Define.
 568         * calls.h (cxx17_empty_base_field_p): Change into a temporary
 569         macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
 570         attribute.
 571         * calls.c (cxx17_empty_base_field_p): Remove.
 572         * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
 573         DECL_FIELD_ABI_IGNORED.
 574         * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
 575         * lto-streamer-out.c (hash_tree): Likewise.
 576         * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
 577         cxx17_empty_base_seen to empty_base_seen, change type to int *,
 578         adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
 579         cxx17_empty_base_field_p, if "no_unique_address" attribute is
 580         present, propagate that to the caller too.
 581         (rs6000_discover_homogeneous_aggregate): Adjust
 582         rs6000_aggregate_candidate caller, emit different diagnostics
 583         when c++17 empty base fields are present and when empty
 584         [[no_unique_address]] fields are present.
 585         * config/rs6000/rs6000.c (rs6000_special_round_type_align,
 586         darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
 587         fields.
 588
 589 2020-04-29  Richard Biener  <rguenther@suse.de>
 590
 591         * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
 592         Just check whether the stmt stores.
 593
 594 2020-04-28  Alexandre Oliva <oliva@adacore.com>
 595
 596         PR target/94812
 597         * gcc/config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
 598         output operand in emulation.  Don't overwrite pseudos.
 599
 600 2020-04-28  Jeff Law  <law@redhat.com>
 601
 602         * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
 603         multiply patterns are 4 bytes long.
 604
 605 2020-04-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 606
 607         * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
 608         * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
 609
 610 2020-04-28  Matthew Malcomson  <matthew.malcomson@arm.com>
 611             Jakub Jelinek  <jakub@redhat.com>
 612
 613         PR target/94711
 614         * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
 615         base class artificial fields.
 616         (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
 617         decision is different after this fix.
 618
 619 2020-04-28  David Malcolm  <dmalcolm@redhat.com>
 620
 621         PR analyzer/94447
 622         PR analyzer/94639
 623         PR analyzer/94732
 624         PR analyzer/94754
 625         * doc/invoke.texi (Static Analyzer Options): Remove
 626         -Wanalyzer-use-of-uninitialized-value.
 627         (-Wno-analyzer-use-of-uninitialized-value): Remove item.
 628
 629 2020-04-28  Jakub Jelinek  <jakub@redhat.com>
 630
 631         PR tree-optimization/94809
 632         * tree.c (build_call_expr_internal_loc_array): Call
 633         process_call_operands.
 634
 635 2020-04-27  Anton Youdkevitch  <anton.youdkevitch@bell-sw.com>
 636
 637         * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
 638         * config/aarch64/aarch64-tune.md: Regenerate.
 639         * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
 640         (thunderx3t110_regmove_cost): Likewise.
 641         (thunderx3t110_vector_cost): Likewise.
 642         (thunderx3t110_prefetch_tune): Likewise.
 643         (thunderx3t110_tunings): Likewise.
 644         * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
 645         Define.
 646         * config/aarch64/thunderx3t110.md: New file.
 647         * config/aarch64/aarch64.md: Include thunderx3t110.md.
 648         * doc/invoke.texi (AArch64 options): Add thunderx3t110.
 649
 650 2020-04-28  Jakub Jelinek  <jakub@redhat.com>
 651
 652         PR target/94704
 653         * config/s390/s390.c (s390_function_arg_vector,
 654         s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
 655
 656 2020-04-28  Richard Sandiford  <richard.sandiford@arm.com>
 657
 658         PR tree-optimization/94727
 659         * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
 660         operands are invariant booleans, use the mask type associated with the
 661         STMT_VINFO_VECTYPE.  Use !slp_node instead of !vectype to exclude SLP.
 662         (vectorizable_condition): Pass vectype unconditionally to
 663         vect_is_simple_cond.
 664
 665 2020-04-27  Jakub Jelinek  <jakub@redhat.com>
 666
 667         PR target/94780
 668         * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
 669         TARGET_EXPR instead of MODIFY_EXPR for first assignment to
 670         sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
 671
 672 2020-04-27  David Malcolm  <dmalcolm@redhat.com>
 673
 674         PR 92830
 675         * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
 676         default value, so that it can by supplied by get_option_html_page.
 677         * configure: Regenerate.
 678         * opts.c: Include "selftest.h".
 679         (get_option_html_page): New function.
 680         (get_option_url): Use it.  Reformat to place comments next to the
 681         expressions they refer to.
 682         (selftest::test_get_option_html_page): New.
 683         (selftest::opts_c_tests): New.
 684         * selftest-run-tests.c (selftest::run_tests): Call
 685         selftest::opts_c_tests.
 686         * selftest.h (selftest::opts_c_tests): New decl.
 687
 688 2020-04-27  Richard Sandiford  <richard.sandiford@arm.com>
 689
 690         * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
 691         UINTVAL to CONST_INTs.
 692
 693 2020-04-27  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
 694
 695         * config/arm/constraints.md (e): Remove constraint.
 696         (Te): Define constraint.
 697         * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
 698         operand 0 from "e" to "Te".
 699         (vaddvaq_<supf><mode>): Likewise.
 700         (vaddvq_p_<supf><mode>): Likewise.
 701         (vmladavq_<supf><mode>): Likewise.
 702         (vmladavxq_s<mode>): Likewise.
 703         (vmlsdavq_s<mode>): Likewise.
 704         (vmlsdavxq_s<mode>): Likewise.
 705         (vaddvaq_p_<supf><mode>): Likewise.
 706         (vmladavaq_<supf><mode>): Likewise.
 707         (vmladavq_p_<supf><mode>): Likewise.
 708         (vmladavxq_p_s<mode>): Likewise.
 709         (vmlsdavq_p_s<mode>): Likewise.
 710         (vmlsdavxq_p_s<mode>): Likewise.
 711         (vmlsdavaxq_s<mode>): Likewise.
 712         (vmlsdavaq_s<mode>): Likewise.
 713         (vmladavaxq_s<mode>): Likewise.
 714         (vmladavaq_p_<supf><mode>): Likewise.
 715         (vmladavaxq_p_s<mode>): Likewise.
 716         (vmlsdavaq_p_s<mode>): Likewise.
 717         (vmlsdavaxq_p_s<mode>): Likewise.
 718
 719 2020-04-27  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 720
 721         * config/arm/arm.c (output_move_neon): Only get the first operand if
 722         addr is PLUS.
 723
 724 2020-04-27  Felix Yang  <felix.yang@huawei.com>
 725
 726         PR tree-optimization/94784
 727         * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
 728         assert around so that it checks that the two vectors have equal
 729         TYPE_VECTOR_SUBPARTS and that converting the corresponding element
 730         types is a useless_type_conversion_p.
 731
 732 2020-04-27  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 733
 734         PR target/94515
 735         * dwarf2cfi.c (struct GTY): Add ra_mangled.
 736         (cfi_row_equal_p): Check ra_mangled.
 737         (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
 738         this only handles the sparc logic now.
 739         (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
 740         the aarch64 specific logic.
 741         (dwarf2out_frame_debug): Update to use the new subroutines.
 742         (change_cfi_row): Check ra_mangled.
 743
 744 2020-04-27  Jakub Jelinek  <jakub@redhat.com>
 745
 746         PR target/94704
 747         * config/s390/s390.c (s390_function_arg_vector,
 748         s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
 749
 750 2020-04-27  Jiufu Guo   <guojiufu@cn.ibm.com>
 751
 752         * common/config/rs6000/rs6000-common.c
 753         (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
 754         -fweb.
 755         * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
 756         set flag_web.
 757
 758 2020-04-27  Martin Liska  <mliska@suse.cz>
 759
 760         PR lto/94659
 761         * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
 762         Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
 763
 764 2020-04-27  Xiong Hu Luo  <luoxhu@linux.ibm.com>
 765
 766         PR target/91518
 767         * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
 768         New variable.
 769         (rs6000_emit_prologue_components):
 770         Check with frame_pointer_needed_indeed.
 771         (rs6000_emit_epilogue_components): Likewise.
 772         (rs6000_emit_prologue): Likewise.
 773         (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
 774
 775 2020-04-25  David Edelsohn  <dje.gcc@gmail.com>
 776
 777         * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
 778         stack frame when debugging and flag_compare_debug is enabled.
 779
 780 2020-04-25  Michael Meissner  <meissner@linux.ibm.com>
 781
 782         * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
 783         enable PC-relative addressing for -mcpu=future.
 784         * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
 785         after OTHER_FUTURE_MASKS.  Use OTHER_FUTURE_MASKS.
 786         * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
 787         suppress PC-relative addressing.
 788         (rs6000_option_override_internal): Split up error messages
 789         checking for -mprefixed and -mpcrel.  Enable -mpcrel if the target
 790         system supports it.
 791
 792 2020-04-25  Jakub Jelinek  <jakub@redhat.com>
 793             Richard Biener  <rguenther@suse.de>
 794
 795         PR tree-optimization/94734
 796         PR tree-optimization/89430
 797         * tree-ssa-phiopt.c: Include tree-eh.h.
 798         (cond_store_replacement): Return false if an automatic variable
 799         access could trap.  If -fstore-data-races, don't return false
 800         just because an automatic variable is addressable.
 801
 802 2020-04-24  Andrew Stubbs  <ams@codesourcery.com>
 803
 804         * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
 805         of high-part.
 806         (add<mode>_sext_dup2_exec): Likewise.
 807
 808 2020-04-24  Segher Boessenkool  <segher@kernel.crashing.org>
 809
 810         PR target/94710
 811         * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
 812         endian byteshift_val calculation.
 813
 814 2020-04-24  Andrew Stubbs  <ams@codesourcery.com>
 815
 816         * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
 817
 818 2020-04-24  Richard Sandiford  <richard.sandiford@arm.com>
 819
 820         * config/aarch64/arm_sve.h: Add a comment.
 821
 822 2020-04-24  Haijian Zhang <z.zhanghaijian@huawei.com>
 823
 824         PR rtl-optimization/94708
 825         * combine.c (simplify_if_then_else): Add check for
 826         !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
 827
 828 2020-04-23  Martin Sebor  <msebor@redhat.com>
 829
 830         PR driver/90983
 831         * common.opt (-Wno-frame-larger-than): New option.
 832         (-Wno-larger-than, -Wno-stack-usage): Same.
 833
 834 2020-04-23  Andrew Stubbs  <ams@codesourcery.com>
 835
 836         * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
 837         2 and 3.
 838         (mov<mode>_exec): Likewise.
 839         (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
 840         (<convop><mode><vndi>2_exec): Likewise.
 841
 842 2019-04-23  Eric Botcazou  <ebotcazou@adacore.com>
 843
 844         PR tree-optimization/94717
 845         * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
 846         of the stores doesn't have the same landing pad number as the first.
 847         (coalesce_immediate_stores): Do not try to coalesce the store using
 848         bswap if it doesn't have the same landing pad number as the first.
 849
 850 2020-04-23  Bill Schmidt  <wschmidt@linux.ibm.com>
 851
 852         * gcc/doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
 853         Replace outdated link to ELFv2 ABI.
 854
 855 2020-04-23  Jakub Jelinek  <jakub@redhat.com>
 856
 857         PR target/94710
 858         * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
 859         just return v2.
 860
 861         PR middle-end/94724
 862         * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
 863         temporarily with non-final second operand and updating it later,
 864         push COMPOUND_EXPRs into a vector and process it in reverse,
 865         creating COMPOUND_EXPRs with the final operands.
 866
 867 2020-04-23  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 868
 869         PR target/94697
 870         * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
 871         bti c and bti j handling.
 872
 873 2020-04-23  Andrew Stubbs  <ams@codesourcery.com>
 874             Thomas Schwinge  <thomas@codesourcery.com>
 875
 876         PR middle-end/93488
 877
 878         * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
 879         t_async and the wait arguments.
 880
 881 2020-04-23  Richard Sandiford  <richard.sandiford@arm.com>
 882
 883         PR tree-optimization/94727
 884         * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
 885         comparing invariant scalar booleans.
 886
 887 2020-04-23  Matthew Malcomson  <matthew.malcomson@arm.com>
 888             Jakub Jelinek  <jakub@redhat.com>
 889
 890         PR target/94383
 891         * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
 892         empty base class artificial fields.
 893         (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
 894         different after this fix.
 895
 896 2020-04-23  Jakub Jelinek  <jakub@redhat.com>
 897
 898         PR target/94707
 899         * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
 900         Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
 901         if the same type has been diagnosed most recently already.
 902
 903 2020-04-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
 904
 905         * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
 906         datatype.
 907         (__arm_vbicq_n_s16): Likewise.
 908         (__arm_vbicq_n_u32): Likewise.
 909         (__arm_vbicq_n_s32): Likewise.
 910         (__arm_vbicq): Likewise.
 911         (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
 912         (__arm_vbicq_n_s32): Likewise.
 913         (__arm_vbicq_n_u16): Likewise.
 914         (__arm_vbicq_n_u32): Likewise.
 915         (__arm_vdupq_m_n_s8): Likewise.
 916         (__arm_vdupq_m_n_s16): Likewise.
 917         (__arm_vdupq_m_n_s32): Likewise.
 918         (__arm_vdupq_m_n_u8): Likewise.
 919         (__arm_vdupq_m_n_u16): Likewise.
 920         (__arm_vdupq_m_n_u32): Likewise.
 921         (__arm_vdupq_m_n_f16): Likewise.
 922         (__arm_vdupq_m_n_f32): Likewise.
 923         (__arm_vldrhq_gather_offset_s16): Likewise.
 924         (__arm_vldrhq_gather_offset_s32): Likewise.
 925         (__arm_vldrhq_gather_offset_u16): Likewise.
 926         (__arm_vldrhq_gather_offset_u32): Likewise.
 927         (__arm_vldrhq_gather_offset_f16): Likewise.
 928         (__arm_vldrhq_gather_offset_z_s16): Likewise.
 929         (__arm_vldrhq_gather_offset_z_s32): Likewise.
 930         (__arm_vldrhq_gather_offset_z_u16): Likewise.
 931         (__arm_vldrhq_gather_offset_z_u32): Likewise.
 932         (__arm_vldrhq_gather_offset_z_f16): Likewise.
 933         (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
 934         (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
 935         (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
 936         (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
 937         (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
 938         (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
 939         (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
 940         (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
 941         (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
 942         (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
 943         (__arm_vldrwq_gather_offset_s32): Likewise.
 944         (__arm_vldrwq_gather_offset_u32): Likewise.
 945         (__arm_vldrwq_gather_offset_f32): Likewise.
 946         (__arm_vldrwq_gather_offset_z_s32): Likewise.
 947         (__arm_vldrwq_gather_offset_z_u32): Likewise.
 948         (__arm_vldrwq_gather_offset_z_f32): Likewise.
 949         (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
 950         (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
 951         (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
 952         (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
 953         (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
 954         (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
 955         (__arm_vdwdupq_x_n_u8): Likewise.
 956         (__arm_vdwdupq_x_n_u16): Likewise.
 957         (__arm_vdwdupq_x_n_u32): Likewise.
 958         (__arm_viwdupq_x_n_u8): Likewise.
 959         (__arm_viwdupq_x_n_u16): Likewise.
 960         (__arm_viwdupq_x_n_u32): Likewise.
 961         (__arm_vidupq_x_n_u8): Likewise.
 962         (__arm_vddupq_x_n_u8): Likewise.
 963         (__arm_vidupq_x_n_u16): Likewise.
 964         (__arm_vddupq_x_n_u16): Likewise.
 965         (__arm_vidupq_x_n_u32): Likewise.
 966         (__arm_vddupq_x_n_u32): Likewise.
 967         (__arm_vldrdq_gather_offset_s64): Likewise.
 968         (__arm_vldrdq_gather_offset_u64): Likewise.
 969         (__arm_vldrdq_gather_offset_z_s64): Likewise.
 970         (__arm_vldrdq_gather_offset_z_u64): Likewise.
 971         (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
 972         (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
 973         (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
 974         (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
 975         (__arm_vidupq_m_n_u8): Likewise.
 976         (__arm_vidupq_m_n_u16): Likewise.
 977         (__arm_vidupq_m_n_u32): Likewise.
 978         (__arm_vddupq_m_n_u8): Likewise.
 979         (__arm_vddupq_m_n_u16): Likewise.
 980         (__arm_vddupq_m_n_u32): Likewise.
 981         (__arm_vidupq_n_u16): Likewise.
 982         (__arm_vidupq_n_u32): Likewise.
 983         (__arm_vidupq_n_u8): Likewise.
 984         (__arm_vddupq_n_u16): Likewise.
 985         (__arm_vddupq_n_u32): Likewise.
 986         (__arm_vddupq_n_u8): Likewise.
 987
 988 2020-04-23  Iain Buclaw  <ibuclaw@gdcproject.org>
 989
 990         * doc/install.texi (D-Specific Options): Document
 991         --enable-libphobos-checking and --with-libphobos-druntime-only.
 992
 993 2020-04-23  Jakub Jelinek  <jakub@redhat.com>
 994
 995         PR target/94707
 996         * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
 997         cxx17_empty_base_seen argument.  Pass it to recursive calls.
 998         Ignore cxx17_empty_base_field_p fields after setting
 999         *cxx17_empty_base_seen to true.
1000         (rs6000_discover_homogeneous_aggregate): Adjust
1001         rs6000_aggregate_candidate caller.  With -Wpsabi, diagnose homogeneous
1002         aggregates with C++17 empty base fields.
1003
1004         PR c/94705
1005         * attribs.c (decl_attribute): Don't diagnose attribute exclusions
1006         if last_decl is error_mark_node or has such a TREE_TYPE.
1007
1008         PR c/94705
1009         * attribs.c (decl_attribute): Don't diagnose attribute exclusions
1010         if last_decl is error_mark_node or has such a TREE_TYPE.
1011
1012 2020-04-22  Felix Yang  <felix.yang@huawei.com>
1013
1014         PR target/94678
1015         * config/aarch64/aarch64.h (TARGET_SVE):
1016         Add && !TARGET_GENERAL_REGS_ONLY.
1017         (TARGET_SVE2): Add && TARGET_SVE.
1018         (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
1019         TARGET_SVE2_SM4): Add && TARGET_SVE2.
1020         * config/aarch64/aarch64-sve-builtins.h
1021         (sve_switcher::m_old_general_regs_only): New member.
1022         * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
1023         New function.
1024         (reported_missing_registers_p): New variable.
1025         (check_required_extensions): Call check_required_registers before
1026         return if all required extenstions are present.
1027         (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
1028         m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
1029         global_options.x_target_flags.
1030         (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
1031         global_options.x_target_flags if m_old_general_regs_only is true.
1032
1033 2020-04-22  Zackery Spytz  <zspytz@gmail.com>
1034
1035         * doc/extend.exi: Add "free" to list of other builtin functions
1036         supported by GCC.
1037
1038 2020-04-20  Aaron Sawdey  <acsawdey@linux.ibm.com>
1039
1040         PR target/94622
1041         * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
1042         if TARGET_PREFIXED.
1043         (store_quadpti): Ditto.
1044         (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
1045         plq will be used and doesn't need it.
1046         (atomic_store<mode>): Ditto, for pstq.
1047
1048 2020-04-22  Erick Ochoa  <erick.ochoa@theobroma-systems.com>
1049
1050         * doc/invoke.texi: Update flags turned on by -O3.
1051
1052 2020-04-22  Jakub Jelinek  <jakub@redhat.com>
1053
1054         PR target/94706
1055         * config/ia64/ia64.c (hfa_element_mode): Ignore
1056         cxx17_empty_base_field_p fields.
1057
1058         PR target/94383
1059         * calls.h (cxx17_empty_base_field_p): Declare.
1060         * calls.c (cxx17_empty_base_field_p): Define.
1061
1062 2020-04-22  Christophe Lyon  <christophe.lyon@linaro.org>
1063
1064         * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
1065
1066 2020-04-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1067             Andre Vieira  <andre.simoesdiasvieira@arm.com>
1068             Mihail Ionescu  <mihail.ionescu@arm.com>
1069
1070         * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
1071         * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
1072         (ALL_QUIRKS): Add quirk_no_asmcpu.
1073         (cortex-m55): Define new cpu.
1074         * config/arm/arm-tables.opt: Regenerate.
1075         * config/arm/arm-tune.md: Likewise.
1076         * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
1077
1078 2020-04-22  Richard Sandiford  <richard.sandiford@arm.com>
1079
1080         PR tree-optimization/94700
1081         * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
1082         an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
1083         of similarly-structured but distinct vector types.
1084
1085 2020-04-21  Martin Sebor  <msebor@redhat.com>
1086
1087         PR middle-end/94647
1088         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
1089         the computation of the lower bound of the source access size.
1090         (builtin_access::generic_overlap): Remove a hack for setting ranges
1091         of overlap offsets.
1092
1093 2020-04-21  John David Anglin  <danglin@gcc.gnu.org>
1094
1095         * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
1096         (ASM_WEAKEN_DECL): New define.
1097         (HAVE_GAS_WEAKREF): Undefine.
1098
1099 2020-04-21  Richard Sandiford  <richard.sandiford@arm.com>
1100
1101         PR tree-optimization/94683
1102         * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
1103         VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
1104         but distinct vector types.
1105
1106 2020-04-21  Jakub Jelinek  <jakub@redhat.com>
1107
1108         PR c/94641
1109         * stor-layout.c (place_field, finalize_record_size): Don't emit
1110         -Wpadded warning on TYPE_ARTIFICIAL rli->t.
1111         * ubsan.c (ubsan_get_type_descriptor_type,
1112         ubsan_get_source_location_type, ubsan_create_data): Set
1113         TYPE_ARTIFICIAL.
1114         * asan.c (asan_global_struct): Likewise.
1115
1116 2020-04-21  Duan bo  <duanbo3@huawei.com>
1117
1118         PR target/94577
1119         * config/aarch64/aarch64.c: Add an error message for option conflict.
1120         * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
1121         incompatible with -fpic, -fPIC and -mabi=ilp32.
1122
1123 2020-04-21  Frederik Harwath  <frederik@codesourcery.com>
1124
1125         PR other/94629
1126         * omp-low.c (new_omp_context): Remove assignments to
1127         ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
1128
1129 2020-04-20  Andreas Krebbel  <krebbel@linux.ibm.com>
1130
1131         * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
1132         ("popcountv2di2_vx"): Use simplify_gen_subreg.
1133
1134 2020-04-20  Andreas Krebbel  <krebbel@linux.ibm.com>
1135
1136         PR target/94613
1137         * config/s390/s390-builtin-types.def: Add 3 new function modes.
1138         * config/s390/s390-builtins.def: Add mode dependent low-level
1139         builtin and map the overloaded builtins to these.
1140         * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
1141         ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
1142
1143 2020-04-20  Richard Sandiford  <richard.sandiford@arm.com>
1144
1145         * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
1146         has a variable VF, prefer new_loop_vinfo if it is cheaper for the
1147         estimated VF and is no worse at double the estimated VF.
1148
1149 2020-04-20  Richard Sandiford  <richard.sandiford@arm.com>
1150
1151         PR target/94668
1152         * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
1153         order of arguments to rtx_vector_builder.
1154         (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
1155         When extending the trailing constants to a full vector, replace any
1156         variables with zeros.
1157
1158 2020-04-20  Jan Hubicka  <hubicka@ucw.cz>
1159
1160         PR ipa/94582
1161         * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
1162         flag.
1163
1164 2020-04-20  Martin Liska  <mliska@suse.cz>
1165
1166         * symtab.c (symtab_node::dump_references): Add space after
1167         one entry.
1168         (symtab_node::dump_referring): Likewise.
1169
1170 2020-04-18  Jeff Law  <law@redhat.com>
1171
1172         PR debug/94439
1173         * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
1174         the chain.
1175
1176 2020-04-18  Iain Buclaw  <ibuclaw@gdcproject.org>
1177
1178         * doc/sourcebuild.texi (Effective-Target Keywords, Environment
1179         attributes): Document d_runtime_has_std_library.
1180
1181 2020-04-17  Jeff Law  <law@redhat.com>
1182
1183         PR rtl-optimization/90275
1184         * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
1185         when the destination has a REG_UNUSED note.
1186
1187 2020-04-17  Tobias Burnus  <tobias@codesourcery.com>
1188
1189         PR middle-end/94635
1190         * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
1191         MAP_DELETE.
1192
1193 2020-04-17  Richard Sandiford  <richard.sandiford@arm.com>
1194
1195         * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
1196         (aarch64_sve_adjust_stmt_cost): Add a vectype parameter.  Double the
1197         cost of load and store insns if one loop iteration has enough scalar
1198         elements to use an Advanced SIMD LDP or STP.
1199         (aarch64_add_stmt_cost): Update call accordingly.
1200
1201 2020-04-17  Jakub Jelinek  <jakub@redhat.com>
1202             Jeff Law  <law@redhat.com>
1203
1204         PR target/94567
1205         * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
1206         CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
1207         or pos + len >= 32, or pos + len is equal to operands[2] precision
1208         and operands[2] is not a register operand.  During splitting perform
1209         SImode AND if operands[0] doesn't have CCZmode and pos + len is
1210         equal to mode precision.
1211
1212 2020-04-17  Richard Biener  <rguenther@suse.de>
1213
1214         PR other/94629
1215         * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
1216         initialization.
1217         * dwarf2out.c (dw_val_equal_p): Fix pasto in
1218         dw_val_class_vms_delta comparison.
1219         * optabs.c (expand_binop_directly): Fix pasto in commutation
1220         check.
1221         * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
1222         initialization.
1223
1224 2020-04-17  Jakub Jelinek  <jakub@redhat.com>
1225
1226         PR rtl-optimization/94618
1227         * cfgrtl.c (delete_insn_and_edges): Set purge not just when
1228         insn is the BB_END of its block, but also when it is only followed
1229         by DEBUG_INSNs in its block.
1230
1231         PR tree-optimization/94621
1232         * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
1233         Move id->adjust_array_error_bounds check first in the condition.
1234
1235 2020-04-17  Martin Liska  <mliska@suse.cz>
1236             Jonathan Yong <10walls@gmail.com>
1237
1238         PR gcov-profile/94570
1239         * coverage.c (coverage_init): Use separator properly.
1240
1241 2020-04-16  Peter Bergner  <bergner@linux.ibm.com>
1242
1243         PR rtl-optimization/93974
1244         * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
1245         (rs6000_cannot_substitute_mem_equiv_p): New function.
1246
1247 2020-04-16  Martin Jambor  <mjambor@suse.cz>
1248
1249         PR ipa/93621
1250         * ipa-inline.h (ipa_saved_clone_sources): Declare.
1251         * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
1252         (save_inline_function_body): Link the new body holder with the
1253         previous one.
1254         * cgraph.c: Include ipa-inline.h.
1255         (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
1256         the statement in ipa_saved_clone_sources.
1257         * cgraphunit.c: Include ipa-inline.h.
1258         (expand_all_functions): Free ipa_saved_clone_sources.
1259
1260 2020-04-16  Richard Sandiford  <richard.sandiford@arm.com>
1261
1262         PR target/94606
1263         * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
1264         the VNx16BI lowpart of the recursively-generated constant.
1265
1266 2020-04-16  Martin Liska  <mliska@suse.cz>
1267             Jakub Jelinek  <jakub@redhat.com>
1268
1269         PR c++/94314
1270         * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
1271         DECL_IS_REPLACEABLE_OPERATOR during cloning.
1272         * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
1273         (propagate_necessity): Check operator names.
1274
1275 2020-04-16  Richard Sandiford  <richard.sandiford@arm.com>
1276
1277         PR rtl-optimization/94605
1278         * early-remat.c (early_remat::process_block): Handle insns that
1279         set multiple candidate registers.
1280 2020-04-16  Jan Hubicka  <hubicka@ucw.cz>
1281
1282         PR gcov-profile/93401
1283         * common.opt (profile-prefix-path): New option.
1284         * coverae.c: Include diagnostics.h.
1285         (coverage_init): Strip profile prefix path.
1286         * doc/invoke.texi (-fprofile-prefix-path): Document.
1287
1288 2020-04-16  Richard Biener  <rguenther@suse.de>
1289
1290         PR middle-end/94614
1291         * expr.c (emit_move_multi_word): Do not generate code when
1292         the destination part is undefined_operand_subword_p.
1293         * lower-subreg.c (resolve_clobber): Look through a paradoxica
1294         subreg.
1295
1296 2020-04-16  Martin Jambor  <mjambor@suse.cz>
1297
1298         PR tree-optimization/94598
1299         * tree-sra.c (verify_sra_access_forest): Fix verification of total
1300         scalarization accesses under access to one-element arrays.
1301
1302 2020-04-16  Jakub Jelinek  <jakub@redhat.com>
1303
1304         PR bootstrap/89494
1305         * function.c (assign_parm_find_data_types): Add workaround for
1306         BROKEN_VALUE_INITIALIZATION compilers.
1307
1308 2020-04-16  Richard Biener  <rguenther@suse.de>
1309
1310         * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
1311         nodes.
1312
1313 2020-04-15  Uroš Bizjak  <ubizjak@gmail.com>
1314
1315         PR target/94603
1316         * config/i386/i386-builtin.def (__builtin_ia32_movq128):
1317         Require OPTION_MASK_ISA_SSE2.
1318
1319 2020-04-15  Gustavo Romero  <gromero@linux.ibm.com>
1320
1321         PR bootstrap/89494
1322         * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
1323         Don't construct a dump_context temporary to call static method.
1324
1325 2020-04-15  Andrea Corallo  <andrea.corallo@arm.com>
1326
1327         * config/aarch64/falkor-tag-collision-avoidance.c
1328         (valid_src_p): Check for aarch64_address_info type before
1329         accessing base field.
1330
1331 2020-04-15  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1332
1333         * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
1334         (V_sz_elem2): Remove unused mode attribute.
1335
1336 2020-04-15  Matthew Malcomson  <matthew.malcomson@arm.com>
1337
1338         * config/arm/arm.md (arm_movdi): Disallow for MVE.
1339
1340 2020-04-15  Richard Biener  <rguenther@suse.de>
1341
1342         PR middle-end/94539
1343         * tree-ssa-alias.c (same_type_for_tbaa): Defer to
1344         alias_sets_conflict_p for pointers.
1345
1346 2020-04-14  Max Filippov  <jcmvbkbc@gmail.com>
1347
1348         PR target/94584
1349         * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
1350         (extendhisi2_internal): Add %v1 before the load instructions.
1351
1352 2020-04-14  Aaron Sawdey  <acsawdey@linux.ibm.com>
1353
1354         PR target/94542
1355         * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
1356         use PC-relative addressing for TLS references.
1357
1358 2020-04-14  Martin Jambor  <mjambor@suse.cz>
1359
1360         PR ipa/94434
1361         * ipa-sra.c: Include internal-fn.h.
1362         (enum isra_scan_context): Update comment.
1363         (scan_function): Treat calls to internal_functions like loads or stores.
1364
1365 2020-04-14  Yang Yang <yangyang305@huawei.com>
1366
1367         PR tree-optimization/94574
1368         * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
1369         whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
1370
1371 2020-04-14  H.J. Lu  <hongjiu.lu@intel.com>
1372
1373         PR target/94561
1374         * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
1375
1376 2020-04-13  Martin Sebor  <msebor@redhat.com>
1377
1378         * doc/extend.texi (-Wall): Mention -Wformat-overflow and
1379         -Wformat-truncation.  Move -Wzero-length-bounds last.
1380         (-Wrestrict): Document positive form of option enabled by -Wall.
1381
1382 2020-04-13 Zachary Spytz  <zspytz@gmail.com>
1383
1384         * doc/extend.texi: Add realloc to list of built-in functions
1385         are recognized by the compiler.
1386
1387 2020-04-13  H.J. Lu  <hongjiu.lu@intel.com>
1388
1389         PR target/94556
1390         * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
1391         pointer in word_mode for eh_return epilogues.
1392
1393 2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
1394
1395         * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
1396         memory references in %B, %C and %D operand selectors when the inner
1397         operand is a post increment address.
1398
1399 2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
1400
1401         * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
1402         reference by 4 bytes, and %D memory reference by 6 bytes.
1403
1404 2020-04-11  Uroš Bizjak  <ubizjak@gmail.com>
1405
1406         PR target/94494
1407         * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
1408         condition for V4SI, V8HI and V16QI modes.
1409
1410 2020-04-11  Jakub Jelinek  <jakub@redhat.com>
1411
1412         PR debug/94495
1413         PR target/94551
1414         * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
1415         val->val_rtx.
1416
1417 2020-04-10  Thomas Schwinge  <thomas@codesourcery.com>
1418
1419         PR middle-end/89433
1420         PR middle-end/93465
1421         * omp-general.c (oacc_verify_routine_clauses): Diagnose if
1422         "#pragma omp declare target" has also been applied.
1423
1424 2020-04-09  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
1425
1426         * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
1427         when to emit the epilogue_helper insn.
1428         * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
1429         RTL pattern.
1430
1431 2020-04-09  Jakub Jelinek  <jakub@redhat.com>
1432
1433         PR debug/94495
1434         * cselib.h (cselib_record_sp_cfa_base_equiv,
1435         cselib_sp_derived_value_p): Declare.
1436         * cselib.c (cselib_record_sp_cfa_base_equiv,
1437         cselib_sp_derived_value_p): New functions.
1438         * var-tracking.c (add_stores): Don't record MO_VAL_SET for
1439         cselib_sp_derived_value_p values.
1440         (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
1441         start of extended basic blocks other than the first one
1442         for !frame_pointer_needed functions.
1443
1444 2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
1445
1446         * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
1447         (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
1448         (aarch64_sve2048_hw): Document.
1449         * config/aarch64/aarch64-protos.h
1450         (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
1451         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
1452         __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
1453         * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
1454         function.
1455         (find_type_suffix_for_scalar_type): Use it instead of comparing
1456         TYPE_MAIN_VARIANTs.
1457         (function_resolver::infer_vector_or_tuple_type): Likewise.
1458         (function_resolver::require_vector_type): Likewise.
1459         (handle_arm_sve_vector_bits_attribute): New function.
1460         * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
1461         (aarch64_attribute_table): Add arm_sve_vector_bits.
1462         (aarch64_return_in_memory_1):
1463         (pure_scalable_type_info::piece::get_rtx): New function.
1464         (pure_scalable_type_info::num_zr): Likewise.
1465         (pure_scalable_type_info::num_pr): Likewise.
1466         (pure_scalable_type_info::get_rtx): Likewise.
1467         (pure_scalable_type_info::analyze): Likewise.
1468         (pure_scalable_type_info::analyze_registers): Likewise.
1469         (pure_scalable_type_info::analyze_array): Likewise.
1470         (pure_scalable_type_info::analyze_record): Likewise.
1471         (pure_scalable_type_info::add_piece): Likewise.
1472         (aarch64_some_values_include_pst_objects_p): Likewise.
1473         (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
1474         to analyze whether the type is returned in SVE registers.
1475         (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
1476         is passed in SVE registers.
1477         (aarch64_pass_by_reference_1): New function, extracted from...
1478         (aarch64_pass_by_reference): ...here.  Use pure_scalable_type_info
1479         to analyze whether the type is a pure scalable type and, if so,
1480         whether it should be passed by reference.
1481         (aarch64_return_in_msb): Return false for pure scalable types.
1482         (aarch64_function_value_1): Fold back into...
1483         (aarch64_function_value): ...this function.  Use
1484         pure_scalable_type_info to analyze whether the type is a pure
1485         scalable type and, if so, which registers it should use.  Handle
1486         types that include pure scalable types but are not themselves
1487         pure scalable types.
1488         (aarch64_return_in_memory_1): New function, split out from...
1489         (aarch64_return_in_memory): ...here.  Use pure_scalable_type_info
1490         to analyze whether the type is a pure scalable type and, if so,
1491         whether it should be returned by reference.
1492         (aarch64_layout_arg): Remove orig_mode argument.  Use
1493         pure_scalable_type_info to analyze whether the type is a pure
1494         scalable type and, if so, which registers it should use.  Handle
1495         types that include pure scalable types but are not themselves
1496         pure scalable types.
1497         (aarch64_function_arg): Update call accordingly.
1498         (aarch64_function_arg_advance): Likewise.
1499         (aarch64_pad_reg_upward): On big-endian targets, return false for
1500         pure scalable types that are smaller than 16 bytes.
1501         (aarch64_member_type_forces_blk): New function.
1502         (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
1503         (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
1504         correspond to built-in SVE types.  Do not rely on a vector mode
1505         if the type includes an pure scalable type.  When returning true,
1506         assert that the mode is not an SVE mode.
1507         (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
1508         built-in types here.  When returning true, assert that the type
1509         does not have an SVE mode.
1510         (aarch64_can_change_mode_class): Don't allow anything to change
1511         between a predicate mode and a non-predicate mode.  Also don't
1512         allow changes between SVE vector modes and other modes that
1513         might be bigger than 128 bits.
1514         (aarch64_invalid_binary_op): Reject binary operations that mix
1515         SVE and GNU vector types.
1516         (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
1517
1518 2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
1519
1520         * config/aarch64/aarch64.c (aarch64_attribute_table): Add
1521         "SVE sizeless type".
1522         * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
1523         (sizeless_type_p): New functions.
1524         (register_builtin_types): Apply make_type_sizeless to the type.
1525         (register_tuple_type): Likewise.
1526         (verify_type_context): Use sizeless_type_p instead of builin_type_p.
1527
1528 2020-04-09  Matthew Malcomson  <matthew.malcomson@arm.com>
1529
1530         * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
1531         C++.
1532
1533 2020-04-09  Martin Jambor  <mjambor@suse.cz>
1534             Richard Biener  <rguenther@suse.de>
1535
1536         PR tree-optimization/94482
1537         * tree-sra.c (create_access_replacement): Dump new replacement with
1538         TDF_UID.
1539         (sra_modify_expr): Fix handling of cases when the original EXPR writes
1540         to only part of the replacement.
1541         * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
1542         the first operand of combinations into REAL/IMAGPART_EXPR and
1543         BIT_FIELD_REF.
1544
1545 2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
1546
1547         * doc/sourcebuild.texi (check-function-bodies): Treat the third
1548         parameter as a list of option regexps and require each regexp
1549         to match.
1550
1551 2020-04-09  Andrea Corallo  <andrea.corallo@arm.com>
1552
1553         PR target/94530
1554         * config/aarch64/falkor-tag-collision-avoidance.c
1555         (valid_src_p): Fix missing rtx type check.
1556
1557 2020-04-09  Bin Cheng  <bin.cheng@linux.alibaba.com>
1558             Richard Biener  <rguenther@suse.de>
1559
1560         PR tree-optimization/93674
1561         * tree-ssa-loop-ivopts.c (langhooks.h): New include.
1562         (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
1563         or non-mode precision type, add candidate in unsigned type with the
1564         same precision.
1565
1566 2020-04-08  Clement Chigot  <clement.chigot@atos.net>
1567
1568         * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
1569         * config/rs6000/aix71.h (LIB_SPEC): Likewise.
1570         * config/rs6000/aix72.h (LIB_SPEC): Likewise.
1571
1572 2020-04-08  Jakub Jelinek  <jakub@redhat.com>
1573
1574         PR middle-end/94526
1575         * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
1576         with zero offset.
1577         * reload1.c (eliminate_regs_1): Avoid creating
1578         (plus (reg) (const_int 0)) in DEBUG_INSNs.
1579
1580         PR tree-optimization/94524
1581         * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
1582         negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
1583         op1 rather than op1 itself at the end.  Punt for signed modulo by
1584         most negative constant.
1585         * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
1586         modulo by most negative constant.
1587
1588 2020-04-08  Richard Biener  <rguenther@suse.de>
1589
1590         PR rtl-optimization/93946
1591         * cse.c (cse_insn): Record the tabled expression in
1592         src_related.  Verify a redundant store removal is valid.
1593
1594 2020-04-08  H.J. Lu  <hongjiu.lu@intel.com>
1595
1596         PR target/94417
1597         * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
1598         ENDBR at function entry if function will be called indirectly.
1599
1600 2020-04-08  Jakub Jelinek  <jakub@redhat.com>
1601
1602         PR target/94438
1603         * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
1604         1, 2, 4 and 8.
1605
1606 2020-04-08  Martin Liska  <mliska@suse.cz>
1607
1608         PR c++/94314
1609         * gimple.c (gimple_call_operator_delete_p): Rename to...
1610         (gimple_call_replaceable_operator_delete_p): ... this.
1611         Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
1612         * gimple.h (gimple_call_operator_delete_p): Rename to ...
1613         (gimple_call_replaceable_operator_delete_p): ... this.
1614         * tree-core.h (tree_function_decl): Add replaceable_operator
1615         flag.
1616         * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
1617         Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
1618         (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
1619         (eliminate_unnecessary_stmts): Likewise.
1620         * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
1621         Pack DECL_IS_REPLACEABLE_OPERATOR.
1622         * tree-streamer-out.c (pack_ts_function_decl_value_fields):
1623         Unpack the field here.
1624         * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
1625         (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
1626         (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
1627         * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
1628         * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
1629         replaceable operator flags.
1630
1631 2020-04-08  Dennis Zhang  <dennis.zhang@arm.com>
1632             Matthew Malcomson  <matthew.malcomson@arm.com>
1633
1634         * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
1635         (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
1636         (CX_TERNARY_QUALIFIERS): Likewise.
1637         (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
1638         (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
1639         (arm_init_acle_builtins): Initialize CDE builtins.
1640         (arm_expand_acle_builtin): Check CDE constant operands.
1641         * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
1642         of CDE constant operand.
1643         * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
1644         TARGET_VFP_BASE.
1645         (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
1646         * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
1647         (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
1648         (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
1649         (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
1650         (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
1651         * config/arm/arm_cde_builtins.def: New file.
1652         * config/arm/iterators.md (V_reg): New attribute of SI.
1653         * config/arm/predicates.md (const_int_coproc_operand): New.
1654         (const_int_vcde1_operand, const_int_vcde2_operand): New.
1655         (const_int_vcde3_operand): New.
1656         * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
1657         * config/arm/vfp.md (arm_vcx1<mode>): New entry.
1658         (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
1659         (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
1660
1661 2020-04-08  Dennis Zhang  <dennis.zhang@arm.com>
1662
1663         * config.gcc: Add arm_cde.h.
1664         * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
1665         __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
1666         * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
1667         * config/arm/arm.c (arm_option_reconfigure_globals): Configure
1668         arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
1669         * config/arm/arm.h (TARGET_CDE): New macro.
1670         * config/arm/arm_cde.h: New file.
1671         * doc/invoke.texi: Document CDE options +cdecp[0-7].
1672         * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
1673         supports option.
1674         (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
1675
1676 2020-04-08  Jakub Jelinek  <jakub@redhat.com>
1677
1678         PR rtl-optimization/94516
1679         * postreload.c: Include rtl-iter.h.
1680         (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
1681         looking for all MEMs with RTX_AUTOINC operand.
1682         (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
1683
1684 2020-04-08  Tobias Burnus  <tobias@codesourcery.com>
1685
1686         * omp-grid.c (grid_eliminate_combined_simd_part): Use
1687         OMP_CLAUSE_CODE to access the omp clause code.
1688
1689 2020-04-07  Jeff Law  <law@redhat.com>
1690
1691         PR rtl-optimization/92264
1692         * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
1693         the destination is the stack pointer.
1694
1695 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
1696
1697         PR rtl-optimization/94291
1698         PR rtl-optimization/84169
1699         * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
1700         must be a REG or SUBREG of REG; if it is not one of these, don't
1701         update LOG_LINKs.
1702
1703 2020-04-07  Richard Biener  <rguenther@suse.de>
1704
1705         PR middle-end/94479
1706         * gimplify.c (gimplify_addr_expr): Also consider generated
1707         MEM_REFs.
1708
1709 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1710
1711         * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
1712
1713 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1714
1715         * config/arm/arm_mve.h: Cast some pointers to expected types.
1716
1717 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1718
1719         * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
1720         same with '__arm_' prefix.
1721
1722 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1723
1724         * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
1725
1726 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1727
1728         * config/arm/arm.c (arm_mve_immediate_check): Removed.
1729         * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
1730         (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
1731          mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
1732          mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
1733          mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
1734          mve_vqshruntq_m_n_s*): Fixed immediate constraints.
1735
1736 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1737
1738         * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
1739
1740 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1741
1742         * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
1743         * config/arm/mve/md: Fix v[id]wdup patterns.
1744
1745 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1746
1747         * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
1748         * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
1749
1750 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1751
1752         * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
1753         and remove const_ptr enums.
1754
1755 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1756
1757         * config/arm/arm_mve.h (vsubq_n): Merge with...
1758         (vsubq): ... this.
1759         (vmulq_n): Merge with...
1760         (vmulq): ... this.
1761         (__ARM_mve_typeid): Simplify scalar and constant detection.
1762
1763 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
1764
1765         PR target/94509
1766         * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
1767         for inter-lane permutation for 64-byte modes.
1768
1769         PR target/94488
1770         * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
1771         ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
1772         Assume it is a REG after that instead of testing it and doing FAIL
1773         otherwise.  Formatting fix.
1774
1775 2020-04-07  Sebastian Huber  <sebastian.huber@embedded-brains.de>
1776
1777         * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
1778
1779 2020-04-07  Jakub Jelinek  <jakub@redhat.com>
1780
1781         PR target/94500
1782         * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
1783         handle i < 64 using avx512bw_lshrv4ti3.  Formatting fixes.
1784
1785 2020-04-06  Jakub Jelinek  <jakub@redhat.com>
1786
1787         * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
1788         + const0_rtx return the SP_DERIVED_VALUE_P.
1789
1790 2020-04-06  Richard Sandiford  <richard.sandiford@arm.com>
1791
1792         PR rtl-optimization/92989
1793         * lra-lives.c (process_bb_lives): Do not treat eh_return data
1794         registers as being live at the beginning of the EH receiver.
1795
1796 2020-04-05 Zachary Spytz  <zspytz@gmail.com>
1797
1798         * extend.texi: Add free to list of ISO C90 functions that
1799         are recognized by the compiler.
1800
1801 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
1802
1803         * config/microblaze/microblaze.c (microblaze_must_save_register): Check
1804         for fast_interrupt.
1805
1806         * config/microblaze/microblaze.md (trap): Update output pattern.
1807
1808 2020-04-04  Hannes Domani  <ssbssa@yahoo.de>
1809             Jakub Jelinek  <jakub@redhat.com>
1810
1811         PR debug/94459
1812         * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
1813         arrays, pointer-to-members, function types and qualifiers when
1814         checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
1815         to emit type again on definition.
1816
1817 2020-04-04  Jan Hubicka  <hubicka@ucw.cz>
1818
1819         PR ipa/93940
1820         * ipa-fnsummary.c (vrp_will_run_p): New function.
1821         (fre_will_run_p): New function.
1822         (evaluate_properties_for_edge): Use it.
1823         * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
1824         !optimize_debug to optimize_debug.
1825
1826 2020-04-04  Jakub Jelinek  <jakub@redhat.com>
1827
1828         PR rtl-optimization/94468
1829         * cselib.c (references_value_p): Formatting fix.
1830         (cselib_useless_value_p): New function.
1831         (discard_useless_locs, discard_useless_values,
1832         cselib_invalidate_regno_val, cselib_invalidate_mem,
1833         cselib_record_set): Use it instead of
1834         v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
1835
1836         PR debug/94441
1837         * tree-iterator.h (expr_single): Declare.
1838         * tree-iterator.c (expr_single): New function.
1839         * tree.h (protected_set_expr_location_if_unset): Declare.
1840         * tree.c (protected_set_expr_location): Use expr_single.
1841         (protected_set_expr_location_if_unset): New function.
1842
1843 2020-04-03  Jeff Law  <law@redhat.com>
1844
1845         PR rtl-optimization/92264
1846         * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
1847         reloading of auto-increment addressing modes.
1848
1849 2020-04-03  H.J. Lu  <hongjiu.lu@intel.com>
1850
1851         PR target/94467
1852         * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
1853         as earlyclobber.
1854
1855 2020-04-03  Jeff Law  <law@redhat.com>
1856
1857         PR rtl-optimization/92264
1858         * config/m32r/m32r.c (m32r_output_block_move): Properly account for
1859         post-increment addressing of source operands as well as residuals
1860         when computing any adjustments to the input pointer.
1861
1862 2020-04-03  Jakub Jelinek  <jakub@redhat.com>
1863
1864         PR target/94460
1865         * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
1866         avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
1867         second half of first lane from first lane of second operand and
1868         first half of second lane from second lane of first operand.
1869
1870 2020-04-03  Andre Vieira  <andre.simoesdiasvieira@arm.com>
1871
1872         * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
1873
1874 2020-04-03  Tamar Christina  <tamar.christina@arm.com>
1875
1876         PR target/94396
1877         * common/config/aarch64/aarch64-common.c
1878         (aarch64_get_extension_string_for_isa_flags): Handle default flags.
1879
1880 2020-04-03  Richard Biener  <rguenther@suse.de>
1881
1882         PR middle-end/94465
1883         * tree.c (array_ref_low_bound): Deal with released SSA names
1884         in index position.
1885
1886 2020-04-03  Kwok Cheung Yeung  <kcy@codesourcery.com>
1887
1888         * config/gcn/gcn.c (print_operand): Handle unordered comparison
1889         operators.
1890         * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
1891         comparison operators.
1892
1893 2020-04-03  Kewen Lin  <linkw@gcc.gnu.org>
1894
1895         PR tree-optimization/94443
1896         * tree-vect-loop.c (vectorizable_live_operation): Use
1897         gsi_insert_seq_before to replace gsi_insert_before.
1898
1899 2020-04-03  Martin Liska  <mliska@suse.cz>
1900
1901         PR ipa/94445
1902         * ipa-icf-gimple.c (func_checker::compare_gimple_call):
1903           Compare type attributes for gimple_call_fntypes.
1904
1905 2020-04-02  Sandra Loosemore  <sandra@codesourcery.com>
1906
1907         * alias.c (get_alias_set): Fix comment typos.
1908
1909 2020-04-02  Fritz Reese  <foreese@gcc.gnu.org>
1910
1911         PR fortran/85982
1912         * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
1913         attribute checking used by TYPE.
1914
1915 2020-04-02  Martin Jambor  <mjambor@suse.cz>
1916
1917         PR ipa/92676
1918         * ipa-sra.c (struct caller_issues): New fields candidate and
1919         call_from_outside_comdat.
1920         (check_for_caller_issues): Check for calls from outsied of
1921         candidate's same_comdat_group.
1922         (check_all_callers_for_issues): Set up issues.candidate, check result
1923         of the new check.
1924         (mark_callers_calls_comdat_local): New function.
1925         (process_isra_node_results): Set calls_comdat_local of callers if
1926         appropriate.
1927
1928 2020-04-02  Richard Biener  <rguenther@suse.de>
1929
1930         PR c/94392
1931         * common.opt (ffinite-loops): Initialize to zero.
1932         * opts.c (default_options_table): Remove OPT_ffinite_loops
1933         entry.
1934         * cfgloop.h (loop::finite_p): New member.
1935         * cfgloopmanip.c (copy_loop_info): Copy finite_p.
1936         * ipa-icf-gimple.c (func_checker::compare_loops): Compare
1937         finite_p.
1938         * lto-streamer-in.c (input_cfg): Stream finite_p.
1939         * lto-streamer-out.c (output_cfg): Likewise.
1940         * tree-cfg.c (replace_loop_annotate): Initialize finite_p
1941         from flag_finite_loops at CFG build time.
1942         * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
1943         finite_p flag instead of flag_finite_loops.
1944         * doc/invoke.texi (ffinite-loops): Adjust documentation of
1945         default setting.
1946
1947 2020-04-02  Richard Biener  <rguenther@suse.de>
1948
1949         PR debug/94450
1950         * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
1951         DW_TAG_imported_unit.
1952
1953 2020-04-02  Maciej W. Rozycki  <macro@wdc.com>
1954
1955         * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
1956         <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
1957         2.30.
1958
1959 2020-04-02  Kewen Lin  <linkw@gcc.gnu.org>
1960
1961         PR tree-optimization/94401
1962         * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
1963         access type when loading halves of vector to avoid peeling for gaps.
1964
1965 2020-04-02  Jakub Jelinek  <jakub@redhat.com>
1966
1967         * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
1968         between a string literal and MIPS_SYSVERSION_SPEC macro.
1969
1970 2020-04-02  Martin Jambor  <mjambor@suse.cz>
1971
1972         * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
1973
1974 2020-04-02  Jakub Jelinek  <jakub@redhat.com>
1975
1976         PR rtl-optimization/92264
1977         * params.opt (-param=max-find-base-term-values=): Decrease default
1978         from 2000 to 200.
1979
1980         PR rtl-optimization/92264
1981         * rtl.h (struct rtx_def): Mention that call bit is used as
1982         SP_DERIVED_VALUE_P in cselib.c.
1983         * cselib.c (SP_DERIVED_VALUE_P): Define.
1984         (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
1985         (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
1986         val_rtx and sp based expression where offsets cancel each other.
1987         (preserve_constants_and_equivs): Formatting fix.
1988         (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
1989         locs list for cfa_base_preserved_val if needed.  Formatting fix.
1990         (autoinc_split): If the to be returned value is a REG, MEM or
1991         VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
1992         locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
1993         (rtx_equal_for_cselib_1): Call autoinc_split even if both
1994         expressions are PLUS in Pmode with CONST_INT second operands.
1995         Handle SP_DERIVED_VALUE_P cases.
1996         (cselib_hash_plus_const_int): New function.
1997         (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
1998         second operand, as well as for PRE_DEC etc. that ought to be
1999         hashed the same way.
2000         (cselib_subst_to_values): Substitute PLUS with Pmode and
2001         CONST_INT operand if the first operand is a VALUE which has
2002         SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
2003         SP_DERIVED_VALUE_P + adjusted offset.
2004         (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
2005         set SP_DERIVED_VALUE_P on it.  Set PRESERVED_VALUE_P when adding
2006         SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
2007         * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
2008         on the sp value before calling cselib_add_permanent_equiv on the
2009         cfa_base value.
2010         * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
2011         in the insn without REG_INC note.
2012         (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
2013         Punt on invalid insns added by copy_to_mode_reg.  Formatting fixes.
2014
2015         PR target/94435
2016         * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
2017         y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
2018
2019 2020-04-02  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2020
2021         PR target/94317
2022         * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
2023         (LDRGBWBXU_Z_QUALIFIERS): Likewise.
2024         * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
2025         intrinsic defintion by adding a new builtin call to writeback into base
2026         address.
2027         (__arm_vldrdq_gather_base_wb_u64): Likewise.
2028         (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
2029         (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
2030         (__arm_vldrwq_gather_base_wb_s32): Likewise.
2031         (__arm_vldrwq_gather_base_wb_u32): Likewise.
2032         (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
2033         (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
2034         (__arm_vldrwq_gather_base_wb_f32): Likewise.
2035         (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
2036         * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
2037         builtin's qualifier.
2038         (vldrdq_gather_base_wb_z_u): Likewise.
2039         (vldrwq_gather_base_wb_u): Likewise.
2040         (vldrdq_gather_base_wb_u): Likewise.
2041         (vldrwq_gather_base_wb_z_s): Likewise.
2042         (vldrwq_gather_base_wb_z_f): Likewise.
2043         (vldrdq_gather_base_wb_z_s): Likewise.
2044         (vldrwq_gather_base_wb_s): Likewise.
2045         (vldrwq_gather_base_wb_f): Likewise.
2046         (vldrdq_gather_base_wb_s): Likewise.
2047         (vldrwq_gather_base_nowb_z_u): Define builtin.
2048         (vldrdq_gather_base_nowb_z_u): Likewise.
2049         (vldrwq_gather_base_nowb_u): Likewise.
2050         (vldrdq_gather_base_nowb_u): Likewise.
2051         (vldrwq_gather_base_nowb_z_s): Likewise.
2052         (vldrwq_gather_base_nowb_z_f): Likewise.
2053         (vldrdq_gather_base_nowb_z_s): Likewise.
2054         (vldrwq_gather_base_nowb_s): Likewise.
2055         (vldrwq_gather_base_nowb_f): Likewise.
2056         (vldrdq_gather_base_nowb_s): Likewise.
2057         * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
2058         pattern.
2059         (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
2060         (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
2061         (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
2062         (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
2063         (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
2064         (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
2065         (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
2066         (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
2067         (mve_vldrdq_gather_base_wb_<supf>v4di):  Modify RTL pattern.
2068         (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
2069         (mve_vldrdq_gather_base_wb_z_<supf>v4di):  Modify RTL pattern.
2070
2071 2020-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>
2072
2073         * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
2074         ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
2075         ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
2076         ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
2077         ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
2078         ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
2079         ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
2080         ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
2081         ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
2082         modifier.
2083         ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
2084         ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
2085         Remove constraints from expander.
2086         * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
2087         ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
2088         ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
2089         ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
2090         ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
2091         ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
2092
2093 2020-04-01  Peter Bergner  <bergner@linux.ibm.com>
2094
2095         PR rtl-optimization/94123
2096         * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
2097         flag_split_wide_types_early.
2098
2099 2020-04-01  Joerg Sonnenberger  <joerg@bec.de>
2100
2101         * doc/extend.texi (Common Function Attributes): Fix typo.
2102
2103 2020-04-01  Segher Boessenkool  <segher@kernel.crashing.org>
2104
2105         PR target/94420
2106         * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
2107         on operands[1].
2108
2109 2020-04-01  Zackery Spytz  <zspytz@gmail.com>
2110
2111         * doc/extend.texi: Fix a typo in the documentation of the
2112         copy function attribute.
2113
2114 2020-04-01  Jakub Jelinek  <jakub@redhat.com>
2115
2116         PR middle-end/94423
2117         * tree-object-size.c (pass_object_sizes::execute): Don't call
2118         replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
2119         call replace_call_with_value.
2120
2121 2020-04-01  Kewen Lin  <linkw@gcc.gnu.org>
2122
2123         PR tree-optimization/94043
2124         * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
2125         phi for vec_lhs and use it for lane extraction.
2126
2127 2020-03-31  Felix Yang  <felix.yang@huawei.com>
2128
2129         PR tree-optimization/94398
2130         * tree-vect-stmts.c (vectorizable_store): Instead of calling
2131         vect_supportable_dr_alignment, set alignment_support_scheme to
2132         dr_unaligned_supported for gather-scatter accesses.
2133         (vectorizable_load): Likewise.
2134
2135 2020-03-31  Andrew Stubbs  <ams@codesourcery.com>
2136
2137         * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
2138         New mode iterators.
2139         (vnsi, VnSI, vndi, VnDI): New mode attributes.
2140         (mov<mode>): Use <VnDI> in place of V64DI.
2141         (mov<mode>_exec): Likewise.
2142         (mov<mode>_sgprbase): Likewise.
2143         (reload_out<mode>): Likewise.
2144         (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
2145         (gather_load<mode>v64si): Rename to ...
2146         (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
2147         and <VnDI> in place of V64DI.
2148         (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
2149         (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
2150         (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
2151         (scatter_store<mode>v64si): Rename to ...
2152         (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2153         (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
2154         (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
2155         (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
2156         (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
2157         (ds_bpermute<mode>): Use <VnSI>.
2158         (addv64si3_vcc<exec_vcc>): Rename to ...
2159         (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
2160         (addv64si3_vcc_dup<exec_vcc>): Rename to ...
2161         (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
2162         (addcv64si3<exec_vcc>): Rename to ...
2163         (addc<mode>3<exec_vcc>): ... this, and use V_SI.
2164         (subv64si3_vcc<exec_vcc>): Rename to ...
2165         (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
2166         (subcv64si3<exec_vcc>): Rename to ...
2167         (subc<mode>3<exec_vcc>): ... this, and use V_SI.
2168         (addv64di3): Rename to ...
2169         (add<mode>3): ... this, and use V_DI.
2170         (addv64di3_exec): Rename to ...
2171         (add<mode>3_exec): ... this, and use V_DI.
2172         (subv64di3): Rename to ...
2173         (sub<mode>3): ... this, and use V_DI.
2174         (subv64di3_exec): Rename to ...
2175         (sub<mode>3_exec): ... this, and use V_DI.
2176         (addv64di3_zext): Rename to ...
2177         (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
2178         (addv64di3_zext_exec): Rename to ...
2179         (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
2180         (addv64di3_zext_dup): Rename to ...
2181         (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
2182         (addv64di3_zext_dup_exec): Rename to ...
2183         (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
2184         (addv64di3_zext_dup2): Rename to ...
2185         (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
2186         (addv64di3_zext_dup2_exec): Rename to ...
2187         (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
2188         (addv64di3_sext_dup2): Rename to ...
2189         (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
2190         (addv64di3_sext_dup2_exec): Rename to ...
2191         (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
2192         (<su>mulv64si3_highpart<exec>): Rename to ...
2193         (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
2194         (mulv64di3): Rename to ...
2195         (mul<mode>3): ... this, and use V_DI and <VnSI>.
2196         (mulv64di3_exec): Rename to ...
2197         (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
2198         (mulv64di3_zext): Rename to ...
2199         (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
2200         (mulv64di3_zext_exec): Rename to ...
2201         (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
2202         (mulv64di3_zext_dup2): Rename to ...
2203         (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
2204         (mulv64di3_zext_dup2_exec): Rename to ...
2205         (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
2206         (<expander>v64di3): Rename to ...
2207         (<expander><mode>3): ... this, and use V_DI and <VnSI>.
2208         (<expander>v64di3_exec): Rename to ...
2209         (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
2210         (<expander>v64si3<exec>): Rename to ...
2211         (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
2212         (v<expander>v64si3<exec>): Rename to ...
2213         (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
2214         (<expander>v64si3<exec>): Rename to ...
2215         (<expander><vnsi>3<exec>): ... this, and use V_SI.
2216         (subv64df3<exec>): Rename to ...
2217         (sub<mode>3<exec>): ... this, and use V_DF.
2218         (truncv64di<mode>2): Rename to ...
2219         (trunc<vndi><mode>2): ... this, and use <VnDI>.
2220         (truncv64di<mode>2_exec): Rename to ...
2221         (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
2222         (<convop><mode>v64di2): Rename to ...
2223         (<convop><mode><vndi>2): ... this, and use <VnDI>.
2224         (<convop><mode>v64di2_exec): Rename to ...
2225         (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
2226         (vec_cmp<u>v64qidi): Rename to ...
2227         (vec_cmp<u><mode>di): ... this, and use <VnSI>.
2228         (vec_cmp<u>v64qidi_exec): Rename to ...
2229         (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
2230         (vcond_mask_<mode>di): Use <VnDI>.
2231         (maskload<mode>di): Likewise.
2232         (maskstore<mode>di): Likewise.
2233         (mask_gather_load<mode>v64si): Rename to ...
2234         (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2235         (mask_scatter_store<mode>v64si): Rename to ...
2236         (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2237         (*<reduc_op>_dpp_shr_v64di): Rename to ...
2238         (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
2239         (*plus_carry_in_dpp_shr_v64si): Rename to ...
2240         (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
2241         (*plus_carry_dpp_shr_v64di): Rename to ...
2242         (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
2243         (vec_seriesv64si): Rename to ...
2244         (vec_series<mode>): ... this, and use V_SI.
2245         (vec_seriesv64di): Rename to ...
2246         (vec_series<mode>): ... this, and use V_DI.
2247
2248 2020-03-31  Claudiu Zissulescu  <claziss@synopsys.com>
2249
2250         * config/arc/arc.c (arc_print_operand): Use
2251         HOST_WIDE_INT_PRINT_DEC macro.
2252
2253 2020-03-31  Claudiu Zissulescu  <claziss@synopsys.com>
2254
2255         * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
2256
2257 2020-03-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2258
2259         * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
2260         variant.
2261         (__arm_vbicq): Likewise.
2262
2263 2020-03-31  Vineet Gupta <vgupta@synopsys.com>
2264
2265         * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
2266
2267 2020-03-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2268
2269         * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
2270         common section of both MVE Integer and MVE Floating Point.
2271         (vaddvq): Likewise.
2272         (vaddlvq_p): Likewise.
2273         (vaddvaq): Likewise.
2274         (vaddvq_p): Likewise.
2275         (vcmpcsq): Likewise.
2276         (vmlsdavxq): Likewise.
2277         (vmlsdavq): Likewise.
2278         (vmladavxq): Likewise.
2279         (vmladavq): Likewise.
2280         (vminvq): Likewise.
2281         (vminavq): Likewise.
2282         (vmaxvq): Likewise.
2283         (vmaxavq): Likewise.
2284         (vmlaldavq): Likewise.
2285         (vcmphiq): Likewise.
2286         (vaddlvaq): Likewise.
2287         (vrmlaldavhq): Likewise.
2288         (vrmlaldavhxq): Likewise.
2289         (vrmlsldavhq): Likewise.
2290         (vrmlsldavhxq): Likewise.
2291         (vmlsldavxq): Likewise.
2292         (vmlsldavq): Likewise.
2293         (vabavq): Likewise.
2294         (vrmlaldavhaq): Likewise.
2295         (vcmpgeq_m_n): Likewise.
2296         (vmlsdavxq_p): Likewise.
2297         (vmlsdavq_p): Likewise.
2298         (vmlsdavaxq): Likewise.
2299         (vmlsdavaq): Likewise.
2300         (vaddvaq_p): Likewise.
2301         (vcmpcsq_m_n): Likewise.
2302         (vcmpcsq_m): Likewise.
2303         (vmladavxq_p): Likewise.
2304         (vmladavq_p): Likewise.
2305         (vmladavaxq): Likewise.
2306         (vmladavaq): Likewise.
2307         (vminvq_p): Likewise.
2308         (vminavq_p): Likewise.
2309         (vmaxvq_p): Likewise.
2310         (vmaxavq_p): Likewise.
2311         (vcmphiq_m): Likewise.
2312         (vaddlvaq_p): Likewise.
2313         (vmlaldavaq): Likewise.
2314         (vmlaldavaxq): Likewise.
2315         (vmlaldavq_p): Likewise.
2316         (vmlaldavxq_p): Likewise.
2317         (vmlsldavaq): Likewise.
2318         (vmlsldavaxq): Likewise.
2319         (vmlsldavq_p): Likewise.
2320         (vmlsldavxq_p): Likewise.
2321         (vrmlaldavhaxq): Likewise.
2322         (vrmlaldavhq_p): Likewise.
2323         (vrmlaldavhxq_p): Likewise.
2324         (vrmlsldavhaq): Likewise.
2325         (vrmlsldavhaxq): Likewise.
2326         (vrmlsldavhq_p): Likewise.
2327         (vrmlsldavhxq_p): Likewise.
2328         (vabavq_p): Likewise.
2329         (vmladavaq_p): Likewise.
2330         (vstrbq_scatter_offset): Likewise.
2331         (vstrbq_p): Likewise.
2332         (vstrbq_scatter_offset_p): Likewise.
2333         (vstrdq_scatter_base_p): Likewise.
2334         (vstrdq_scatter_base): Likewise.
2335         (vstrdq_scatter_offset_p): Likewise.
2336         (vstrdq_scatter_offset): Likewise.
2337         (vstrdq_scatter_shifted_offset_p): Likewise.
2338         (vstrdq_scatter_shifted_offset): Likewise.
2339         (vmaxq_x): Likewise.
2340         (vminq_x): Likewise.
2341         (vmovlbq_x): Likewise.
2342         (vmovltq_x): Likewise.
2343         (vmulhq_x): Likewise.
2344         (vmullbq_int_x): Likewise.
2345         (vmullbq_poly_x): Likewise.
2346         (vmulltq_int_x): Likewise.
2347         (vmulltq_poly_x): Likewise.
2348         (vstrbq): Likewise.
2349
2350 2020-03-31  Jakub Jelinek  <jakub@redhat.com>
2351
2352         PR target/94368
2353         * config/aarch64/constraints.md (Uph): New constraint.
2354         * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
2355         (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
2356         constraint.
2357
2358 2020-03-31  Marc Glisse  <marc.glisse@inria.fr>
2359             Jakub Jelinek  <jakub@redhat.com>
2360
2361         PR middle-end/94412
2362         * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
2363         ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
2364
2365 2020-03-31  Jakub Jelinek  <jakub@redhat.com>
2366
2367         PR tree-optimization/94403
2368         * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
2369         ENUMERAL_TYPE lhs_type.
2370
2371         PR rtl-optimization/94344
2372         * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
2373         conversions, either on both operands of |^+ or just one.  Handle
2374         also extra same precision conversion on RSHIFT_EXPR first operand
2375         provided RSHIFT_EXPR is performed in unsigned type.
2376
2377 2020-03-30  David Malcolm  <dmalcolm@redhat.com>
2378
2379         * lra.c (finish_insn_code_data_once): Set the array elements
2380         to NULL after freeing them.
2381
2382 2020-03-30  Andreas Schwab  <schwab@suse.de>
2383
2384         * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
2385         Define.
2386
2387 2020-03-30  Will Schmidt  <will_schmidt@vnet.ibm.com>
2388
2389         * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
2390         to skip defining builtins based on builtin_mask.
2391
2392 2020-03-30  Jakub Jelinek  <jakub@redhat.com>
2393
2394         PR target/94343
2395         * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
2396         !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
2397         operand is a register.  Don't enable masked variants for V*[QH]Imode.
2398
2399         PR target/93069
2400         * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
2401         <store_mask_constraint> instead of m in output operand constraint.
2402         (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
2403         %{%3%}.
2404
2405 2020-03-30  Alan Modra  <amodra@gmail.com>
2406
2407         * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
2408         (rs6000_indirect_call_template_1): Adjust to suit.
2409         * config/rs6000/rs6000.md (call_local): Merge call_local32,
2410         call_local64, and call_local_aix.
2411         (call_value_local): Simlarly.
2412         (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
2413         and disable pattern when CALL_LONG.
2414         (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
2415         (call_indirect_elfv2, call_indirect_pcrel): Likewise.
2416         (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
2417
2418 2020-03-29  H.J. Lu  <hongjiu.lu@intel.com>
2419
2420         PR driver/94381
2421         * doc/invoke.texi: Update -falign-functions, -falign-loops and
2422         -falign-jumps documentation.
2423
2424 2020-03-29  Martin Liska  <mliska@suse.cz>
2425
2426         PR ipa/94363
2427         * cgraphunit.c (process_function_and_variable_attributes): Remove
2428         double 'attribute' words.
2429
2430 2020-03-29  John David Anglin  <dave.anglin@bell.net>
2431
2432         * gcc/config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
2433         .align output.
2434
2435 2020-03-28  Jakub Jelinek  <jakub@redhat.com>
2436
2437         PR c/93573
2438         * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
2439         to true after setting size to integer_one_node.
2440
2441         PR tree-optimization/94329
2442         * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
2443         on the last stmt in a bb, make sure gsi_prev isn't done immediately
2444         after gsi_last_bb.
2445
2446 2020-03-27  Alan Modra  <amodra@gmail.com>
2447
2448         PR target/94145
2449         * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
2450         for PLT16_LO and PLT_PCREL.
2451         * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
2452         (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
2453         (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
2454
2455 2020-03-27  Martin Sebor  <msebor@redhat.com>
2456
2457         PR c++/94098
2458         * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
2459
2460 2020-03-27  Andrew Stubbs  <ams@codesourcery.com>
2461
2462         * config/gcn/gcn-valu.md:
2463         (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
2464         (VEC_1REG_MODE): Delete.
2465         (VEC_1REG_ALT): Delete.
2466         (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
2467         (VEC_1REG_INT_MODE): Delete.
2468         (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
2469         (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
2470         (VEC_2REG_MODE): Rename to V_2REG throughout.
2471         (VEC_REG_MODE): Rename to V_noHI throughout.
2472         (VEC_ALLREG_MODE): Rename to V_ALL throughout.
2473         (VEC_ALLREG_ALT):  Rename to V_ALL_ALT throughout.
2474         (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
2475         (VEC_INT_MODE): Delete.
2476         (VEC_FP_MODE): Rename to V_FP throughout and move to top.
2477         (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
2478         (FP_MODE): Delete and replace with FP throughout.
2479         (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
2480         (VCMP_MODE): Rename to V_noQI throughout and move to top.
2481         (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
2482         * config/gcn/gcn.md (FP): New mode iterator.
2483         (FP_1REG): New mode iterator.
2484
2485 2020-03-27  David Malcolm  <dmalcolm@redhat.com>
2486
2487         * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
2488         now emits two .dot files.
2489         * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
2490         (graphviz_out::end_tr): Only close a TR, not a TD.
2491         (graphviz_out::begin_td): New.
2492         (graphviz_out::end_td): New.
2493         (graphviz_out::begin_trtd): New, replacing the old implementation
2494         of graphviz_out::begin_tr.
2495         (graphviz_out::end_tdtr): New, replacing the old implementation
2496         of graphviz_out::end_tr.
2497         * graphviz.h (graphviz_out::begin_td): New decl.
2498         (graphviz_out::end_td): New decl.
2499         (graphviz_out::begin_trtd): New decl.
2500         (graphviz_out::end_tdtr): New decl.
2501
2502 2020-03-27  Richard Biener  <rguenther@suse.de>
2503
2504         PR debug/94273
2505         * dwarf2out.c (should_emit_struct_debug): Return false for
2506         DINFO_LEVEL_TERSE.
2507
2508 2020-03-27  Richard Biener  <rguenther@suse.de>
2509
2510         PR tree-optimization/94352
2511         * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
2512         worklist ...
2513         (ssa_propagation_engine::ssa_propagate): ... here after
2514         initializing curr_order.
2515
2516 2020-03-27  Kewen Lin  <linkw@gcc.gnu.org>
2517
2518         PR tree-optimization/90332
2519         * tree-vect-stmts.c (vector_vector_composition_type): New function.
2520         (get_group_load_store_type): Adjust to call
2521         vector_vector_composition_type, extend it to construct with scalar
2522         types.
2523         (vectorizable_load): Likewise.
2524
2525 2020-03-27  Roman Zhuykov  <zhroma@ispras.ru>
2526
2527         * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
2528         (create_ddg_dep_no_link): Likewise.
2529         (add_cross_iteration_register_deps): Move debug instruction check.
2530         Other minor refactoring.
2531         (add_intra_loop_mem_dep): Do not check for debug instructions.
2532         (add_inter_loop_mem_dep): Likewise.
2533         (build_intra_loop_deps): Likewise.
2534         (create_ddg): Do not include debug insns into the graph.
2535         * ddg.h (struct ddg): Remove num_debug field.
2536         * modulo-sched.c (doloop_register_get): Adjust condition.
2537         (res_MII): Remove DDG num_debug field usage.
2538         (sms_schedule_by_order): Use assertion against debug insns.
2539         (ps_has_conflicts): Drop debug insn check.
2540
2541 2020-03-26  Jakub Jelinek  <jakub@redhat.com>
2542
2543         PR debug/94323
2544         * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
2545         that contains exactly one non-DEBUG_BEGIN_STMT statement.
2546
2547         PR debug/94281
2548         * gimple.h (gimple_seq_first_nondebug_stmt): New function.
2549         (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
2550         a single non-debug stmt followed by one or more debug stmts.
2551         * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
2552         instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
2553         and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
2554         gimple_seq_last to check if outer_stmt gbind could be reused and
2555         if yes and it is surrounded by any debug stmts, move them into the
2556         gbind body.
2557
2558         PR rtl-optimization/92264
2559         * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
2560         for sp based values in !frame_pointer_needed
2561         && !ACCUMULATE_OUTGOING_ARGS functions.
2562
2563 2020-03-26  Felix Yang  <felix.yang@huawei.com>
2564
2565         PR tree-optimization/94269
2566         * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
2567         this
2568         operation to single basic block.
2569
2570 2020-03-25  Jeff Law  <law@redhat.com>
2571
2572         PR rtl-optimization/90275
2573         * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
2574         pattern.
2575
2576 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
2577
2578         PR target/94292
2579         * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
2580         mode rather than VOIDmode.
2581
2582 2020-03-25  Martin Sebor  <msebor@redhat.com>
2583
2584         PR middle-end/94004
2585         * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
2586         even for alloca calls resulting from system macro expansion.
2587         Include inlining context in all warnings.
2588
2589 2020-03-25  Richard Sandiford  <richard.sandiford@arm.com>
2590
2591         PR target/94254
2592         * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
2593         FPRs to change between SDmode and DDmode.
2594
2595 2020-03-25  Martin Sebor  <msebor@redhat.com>
2596
2597         PR tree-optimization/94131
2598         * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
2599         types and decls.
2600         * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
2601         types have constant sizes.
2602
2603 2020-03-25  Martin Liska  <mliska@suse.cz>
2604
2605         PR lto/94259
2606         * configure.ac: Report error only when --with-zstd
2607         is used.
2608         * configure: Regenerate.
2609
2610 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
2611
2612         PR target/94308
2613         * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
2614         INSN_CODE (insn) to -1 when changing the pattern.
2615
2616 2020-03-25  Martin Liska  <mliska@suse.cz>
2617
2618         PR target/93274
2619         PR ipa/94271
2620         * config/i386/i386-features.c (make_resolver_func): Drop
2621         public flag for resolver.
2622         * config/rs6000/rs6000.c (make_resolver_func): Add comdat
2623         group for resolver and drop public flag if possible.
2624         * multiple_target.c (create_dispatcher_calls): Drop unique_name
2625         and resolution as we want to enable LTO privatization of the default
2626         symbol.
2627
2628 2020-03-25  Martin Liska  <mliska@suse.cz>
2629
2630         PR lto/94259
2631         * configure.ac: Respect --without-zstd and report
2632         error when we can't find header file with --with-zstd.
2633         * configure: Regenerate.
2634
2635 2020-03-25  Jakub Jelinek  <jakub@redhat.com>
2636
2637         PR middle-end/94303
2638         * varasm.c (output_constructor_array_range): If local->index
2639         RANGE_EXPR doesn't start at the current location in the constructor,
2640         skip needed number of bytes using assemble_zeros or assert we don't
2641         go backwards.
2642
2643         PR c++/94223
2644         * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
2645         counter instead of DECL_UID.
2646
2647         PR tree-optimization/94300
2648         * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
2649         is positive, make sure that off + size isn't larger than needed_len.
2650
2651 2020-03-25  Richard Biener  <rguenther@suse.de>
2652             Jakub Jelinek  <jakub@redhat.com>
2653
2654         PR debug/94283
2655         * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
2656
2657 2020-03-24  Christophe Lyon  <christophe.lyon@linaro.org>
2658
2659         * doc/sourcebuild.texi (ARM-specific attributes): Add
2660         arm_fp_dp_ok.
2661         (Features for dg-add-options): Add arm_fp_dp.
2662
2663 2020-03-24  John David Anglin  <danglin@gcc.gnu.org>
2664
2665         PR lto/94249
2666         * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
2667
2668 2020-03-24  Tobias Burnus  <tobias@codesourcery.com>
2669
2670         PR libgomp/81689
2671         * omp-offload.c (omp_finish_file): Fix target-link handling if
2672         targetm_common.have_named_sections is false.
2673
2674 2020-03-24  Jakub Jelinek  <jakub@redhat.com>
2675
2676         PR target/94286
2677         * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
2678         instead of GEN_INT.
2679
2680         PR debug/94285
2681         * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
2682         e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
2683         If not after and at *incr_pos is a debug stmt, set stmt location to
2684         location of next non-debug stmt after it if any.
2685
2686         PR debug/94283
2687         * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
2688         GF_PLF_2, but don't add them to worklist.  Don't add an assigment to
2689         worklist or set GF_PLF_2 just because it is used in a debug stmt in
2690         another bb.  Formatting improvements.
2691
2692         PR debug/94277
2693         * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
2694         non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
2695         regardless of whether TREE_NO_WARNING is set on it or whether
2696         warn_unused_function is true or not.
2697
2698 2020-03-23  Jeff Law  <law@redhat.com>
2699
2700         PR rtl-optimization/90275
2701         PR target/94238
2702         PR target/94144
2703         * simplify-rtx.c (comparison_code_valid_for_mode): New function.
2704         (simplify_logical_relational_operation): Use it.
2705
2706 2020-03-23  Jakub Jelinek  <jakub@redhat.com>
2707
2708         PR c++/91993
2709         * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
2710         ultimate rhs and if returned something different, reconstructing
2711         the COMPOUND_EXPRs.
2712
2713 2020-03-23  Lewis Hyatt  <lhyatt@gmail.com>
2714
2715         * opts.c (print_filtered_help): Improve the help text for alias options.
2716
2717 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2718             Andre Vieira  <andre.simoesdiasvieira@arm.com>
2719             Mihail Ionescu  <mihail.ionescu@arm.com>
2720
2721         * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
2722         (vshlcq_m_u8): Likewise.
2723         (vshlcq_m_s16): Likewise.
2724         (vshlcq_m_u16): Likewise.
2725         (vshlcq_m_s32): Likewise.
2726         (vshlcq_m_u32): Likewise.
2727         (__arm_vshlcq_m_s8): Define intrinsic.
2728         (__arm_vshlcq_m_u8): Likewise.
2729         (__arm_vshlcq_m_s16): Likewise.
2730         (__arm_vshlcq_m_u16): Likewise.
2731         (__arm_vshlcq_m_s32): Likewise.
2732         (__arm_vshlcq_m_u32): Likewise.
2733         (vshlcq_m): Define polymorphic variant.
2734         * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
2735         Use builtin qualifier.
2736         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
2737         * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
2738         (mve_vshlcq_m_carry_<supf><mode>): Likewise.
2739         (mve_vshlcq_m_<supf><mode>): Likewise.
2740
2741 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2742
2743         * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
2744         (UQSHL_QUALIFIERS): Likewise.
2745         (ASRL_QUALIFIERS): Likewise.
2746         (SQSHL_QUALIFIERS): Likewise.
2747         * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
2748         Big-Endian Mode.
2749         (sqrshr): Define macro.
2750         (sqrshrl): Likewise.
2751         (sqrshrl_sat48): Likewise.
2752         (sqshl): Likewise.
2753         (sqshll): Likewise.
2754         (srshr): Likewise.
2755         (srshrl): Likewise.
2756         (uqrshl): Likewise.
2757         (uqrshll): Likewise.
2758         (uqrshll_sat48): Likewise.
2759         (uqshl): Likewise.
2760         (uqshll): Likewise.
2761         (urshr): Likewise.
2762         (urshrl): Likewise.
2763         (lsll): Likewise.
2764         (asrl): Likewise.
2765         (__arm_lsll): Define intrinsic.
2766         (__arm_asrl): Likewise.
2767         (__arm_uqrshll): Likewise.
2768         (__arm_uqrshll_sat48): Likewise.
2769         (__arm_sqrshrl): Likewise.
2770         (__arm_sqrshrl_sat48): Likewise.
2771         (__arm_uqshll): Likewise.
2772         (__arm_urshrl): Likewise.
2773         (__arm_srshrl): Likewise.
2774         (__arm_sqshll): Likewise.
2775         (__arm_uqrshl): Likewise.
2776         (__arm_sqrshr): Likewise.
2777         (__arm_uqshl): Likewise.
2778         (__arm_urshr): Likewise.
2779         (__arm_sqshl): Likewise.
2780         (__arm_srshr): Likewise.
2781         * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
2782         qualifier.
2783         (UQSHL_QUALIFIERS): Likewise.
2784         (ASRL_QUALIFIERS): Likewise.
2785         (SQSHL_QUALIFIERS): Likewise.
2786         * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
2787         (mve_sqrshrl_sat<supf>_di): Likewise.
2788         (mve_uqrshl_si): Likewise.
2789         (mve_sqrshr_si): Likewise.
2790         (mve_uqshll_di): Likewise.
2791         (mve_urshrl_di): Likewise.
2792         (mve_uqshl_si): Likewise.
2793         (mve_urshr_si): Likewise.
2794         (mve_sqshl_si): Likewise.
2795         (mve_srshr_si): Likewise.
2796         (mve_srshrl_di): Likewise.
2797         (mve_sqshll_di): Likewise.
2798
2799 2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2800             Andre Vieira  <andre.simoesdiasvieira@arm.com>
2801             Mihail Ionescu  <mihail.ionescu@arm.com>
2802
2803         * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
2804         (vsetq_lane_f32): Likewise.
2805         (vsetq_lane_s16): Likewise.
2806         (vsetq_lane_s32): Likewise.
2807         (vsetq_lane_s8): Likewise.
2808         (vsetq_lane_s64): Likewise.
2809         (vsetq_lane_u8): Likewise.
2810         (vsetq_lane_u16): Likewise.
2811         (vsetq_lane_u32): Likewise.
2812         (vsetq_lane_u64): Likewise.
2813         (vgetq_lane_f16): Likewise.
2814         (vgetq_lane_f32): Likewise.
2815         (vgetq_lane_s16): Likewise.
2816         (vgetq_lane_s32): Likewise.
2817         (vgetq_lane_s8): Likewise.
2818         (vgetq_lane_s64): Likewise.
2819         (vgetq_lane_u8): Likewise.
2820         (vgetq_lane_u16): Likewise.
2821         (vgetq_lane_u32): Likewise.
2822         (vgetq_lane_u64): Likewise.
2823         (__ARM_NUM_LANES): Likewise.
2824         (__ARM_LANEQ): Likewise.
2825         (__ARM_CHECK_LANEQ): Likewise.
2826         (__arm_vsetq_lane_s16): Define intrinsic.
2827         (__arm_vsetq_lane_s32): Likewise.
2828         (__arm_vsetq_lane_s8): Likewise.
2829         (__arm_vsetq_lane_s64): Likewise.
2830         (__arm_vsetq_lane_u8): Likewise.
2831         (__arm_vsetq_lane_u16): Likewise.
2832         (__arm_vsetq_lane_u32): Likewise.
2833         (__arm_vsetq_lane_u64): Likewise.
2834         (__arm_vgetq_lane_s16): Likewise.
2835         (__arm_vgetq_lane_s32): Likewise.
2836         (__arm_vgetq_lane_s8): Likewise.
2837         (__arm_vgetq_lane_s64): Likewise.
2838         (__arm_vgetq_lane_u8): Likewise.
2839         (__arm_vgetq_lane_u16): Likewise.
2840         (__arm_vgetq_lane_u32): Likewise.
2841         (__arm_vgetq_lane_u64): Likewise.
2842         (__arm_vsetq_lane_f16): Likewise.
2843         (__arm_vsetq_lane_f32): Likewise.
2844         (__arm_vgetq_lane_f16): Likewise.
2845         (__arm_vgetq_lane_f32): Likewise.
2846         (vgetq_lane): Define polymorphic variant.
2847         (vsetq_lane): Likewise.
2848         * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
2849         pattern.
2850         (mve_vec_extractv2didi): Likewise.
2851         (mve_vec_extract_sext_internal<mode>): Likewise.
2852         (mve_vec_extract_zext_internal<mode>): Likewise.
2853         (mve_vec_set<mode>_internal): Likewise.
2854         (mve_vec_setv2di_internal): Likewise.
2855         * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
2856         file.
2857         (vec_extract<mode><V_elem_l>): Rename to
2858         "neon_vec_extract<mode><V_elem_l>".
2859         (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
2860         * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
2861         pattern common for MVE and NEON.
2862         (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
2863         MVE and NEON.
2864
2865 2020-03-23  Andre Vieira  <andre.simoesdiasvieira@arm.com>
2866
2867         * config/arm/mve.md (earlyclobber_32): New mode attribute.
2868         (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
2869          mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
2870
2871 2020-03-23  Richard Biener  <rguenther@suse.de>
2872
2873         PR tree-optimization/94261
2874         * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
2875         IL operand swapping code.
2876         (vect_slp_rearrange_stmts): Do not arrange isomorphic
2877         nodes that would need operation code adjustments.
2878
2879 2020-03-23  Tobias Burnus  <tobias@codesourcery.com>
2880
2881         * doc/install.texi (amdgcn-*-amdhsa): Renamed
2882         from amdgcn-unknown-amdhsa; change
2883         amdgcn-unknown-amdhsa to amdgcn-amdhsa.
2884
2885 2020-03-23  Richard Biener  <rguenther@suse.de>
2886
2887         PR ipa/94245
2888         * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
2889         directly rather than also folding it via build_fold_addr_expr.
2890
2891 2020-03-23  Richard Biener  <rguenther@suse.de>
2892
2893         PR tree-optimization/94266
2894         * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
2895         addresses of TARGET_MEM_REFs.
2896
2897 2020-03-23  Martin Liska  <mliska@suse.cz>
2898
2899         PR ipa/94250
2900         * symtab.c (symtab_node::clone_references): Save speculative_id
2901         as ref may be overwritten by create_reference.
2902         (symtab_node::clone_referring): Likewise.
2903         (symtab_node::clone_reference): Likewise.
2904
2905 2020-03-22  Iain Sandoe  <iain@sandoe.co.uk>
2906
2907         * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
2908         references to Darwin.
2909         * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
2910         unconditionally and comment on why.
2911
2912 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
2913
2914         * config/darwin.c (darwin_mergeable_constant_section): Collect
2915         section anchor checks into the caller.
2916         (machopic_select_section): Collect section anchor checks into
2917         the determination of 'effective zero-size' objects. When the
2918         size is unknown, assume it is non-zero, and thus return the
2919         'generic' section for the DECL.
2920
2921 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
2922
2923         PR target/93694
2924         * gcc/config/darwin.opt: Amend options descriptions.
2925
2926 2020-03-21  Richard Sandiford  <richard.sandiford@arm.com>
2927
2928         PR rtl-optimization/94052
2929         * lra-constraints.c (simplify_operand_subreg): Reload the inner
2930         register of a paradoxical subreg if simplify_subreg_regno fails
2931         to give a valid hard register for the outer mode.
2932
2933 2020-03-20  Martin Jambor  <mjambor@suse.cz>
2934
2935         PR tree-optimization/93435
2936         * params.opt (sra-max-propagations): New parameter.
2937         * tree-sra.c (propagation_budget): New variable.
2938         (budget_for_propagation_access): New function.
2939         (propagate_subaccesses_from_rhs): Use it.
2940         (propagate_subaccesses_from_lhs): Likewise.
2941         (propagate_all_subaccesses): Set up and destroy propagation_budget.
2942
2943 2020-03-20  Carl Love  <cel@us.ibm.com>
2944
2945         PR/target 87583
2946         * gcc/config/rs6000/rs6000.c (rs6000_option_override_internal):
2947         Add check for TARGET_FPRND for Power 7 or newer.
2948
2949 2020-03-20  Jan Hubicka  <hubicka@ucw.cz>
2950
2951         PR ipa/93347
2952         * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
2953         (cgraph_edge::redirect_callee): Move here; likewise.
2954         (cgraph_node::remove_callees): Update calls_comdat_local flag.
2955         (cgraph_node::verify_node): Verify that calls_comdat_local flag match
2956         reality.
2957         (cgraph_node::check_calls_comdat_local_p): New member function.
2958         * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
2959         (cgraph_edge::redirect_callee): Move offline.
2960         * ipa-fnsummary.c (compute_fn_summary): Do not compute
2961         calls_comdat_local flag here.
2962         * ipa-inline-transform.c (inline_call): Fix updating of
2963         calls_comdat_local flag.
2964         * ipa-split.c (split_function): Use true instead of 1 to set the flag.
2965         * symtab.c (symtab_node::add_to_same_comdat_group): Update
2966         calls_comdat_local flag.
2967
2968 2020-03-20  Richard Biener  <rguenther@suse.de>
2969
2970         * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
2971         from the possibly modified root.
2972
2973 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
2974             Andre Vieira  <andre.simoesdiasvieira@arm.com>
2975             Mihail Ionescu  <mihail.ionescu@arm.com>
2976
2977         * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
2978         (vst1q_p_s8): Likewise.
2979         (vst2q_s8): Likewise.
2980         (vst2q_u8): Likewise.
2981         (vld1q_z_u8): Likewise.
2982         (vld1q_z_s8): Likewise.
2983         (vld2q_s8): Likewise.
2984         (vld2q_u8): Likewise.
2985         (vld4q_s8): Likewise.
2986         (vld4q_u8): Likewise.
2987         (vst1q_p_u16): Likewise.
2988         (vst1q_p_s16): Likewise.
2989         (vst2q_s16): Likewise.
2990         (vst2q_u16): Likewise.
2991         (vld1q_z_u16): Likewise.
2992         (vld1q_z_s16): Likewise.
2993         (vld2q_s16): Likewise.
2994         (vld2q_u16): Likewise.
2995         (vld4q_s16): Likewise.
2996         (vld4q_u16): Likewise.
2997         (vst1q_p_u32): Likewise.
2998         (vst1q_p_s32): Likewise.
2999         (vst2q_s32): Likewise.
3000         (vst2q_u32): Likewise.
3001         (vld1q_z_u32): Likewise.
3002         (vld1q_z_s32): Likewise.
3003         (vld2q_s32): Likewise.
3004         (vld2q_u32): Likewise.
3005         (vld4q_s32): Likewise.
3006         (vld4q_u32): Likewise.
3007         (vld4q_f16): Likewise.
3008         (vld2q_f16): Likewise.
3009         (vld1q_z_f16): Likewise.
3010         (vst2q_f16): Likewise.
3011         (vst1q_p_f16): Likewise.
3012         (vld4q_f32): Likewise.
3013         (vld2q_f32): Likewise.
3014         (vld1q_z_f32): Likewise.
3015         (vst2q_f32): Likewise.
3016         (vst1q_p_f32): Likewise.
3017         (__arm_vst1q_p_u8): Define intrinsic.
3018         (__arm_vst1q_p_s8): Likewise.
3019         (__arm_vst2q_s8): Likewise.
3020         (__arm_vst2q_u8): Likewise.
3021         (__arm_vld1q_z_u8): Likewise.
3022         (__arm_vld1q_z_s8): Likewise.
3023         (__arm_vld2q_s8): Likewise.
3024         (__arm_vld2q_u8): Likewise.
3025         (__arm_vld4q_s8): Likewise.
3026         (__arm_vld4q_u8): Likewise.
3027         (__arm_vst1q_p_u16): Likewise.
3028         (__arm_vst1q_p_s16): Likewise.
3029         (__arm_vst2q_s16): Likewise.
3030         (__arm_vst2q_u16): Likewise.
3031         (__arm_vld1q_z_u16): Likewise.
3032         (__arm_vld1q_z_s16): Likewise.
3033         (__arm_vld2q_s16): Likewise.
3034         (__arm_vld2q_u16): Likewise.
3035         (__arm_vld4q_s16): Likewise.
3036         (__arm_vld4q_u16): Likewise.
3037         (__arm_vst1q_p_u32): Likewise.
3038         (__arm_vst1q_p_s32): Likewise.
3039         (__arm_vst2q_s32): Likewise.
3040         (__arm_vst2q_u32): Likewise.
3041         (__arm_vld1q_z_u32): Likewise.
3042         (__arm_vld1q_z_s32): Likewise.
3043         (__arm_vld2q_s32): Likewise.
3044         (__arm_vld2q_u32): Likewise.
3045         (__arm_vld4q_s32): Likewise.
3046         (__arm_vld4q_u32): Likewise.
3047         (__arm_vld4q_f16): Likewise.
3048         (__arm_vld2q_f16): Likewise.
3049         (__arm_vld1q_z_f16): Likewise.
3050         (__arm_vst2q_f16): Likewise.
3051         (__arm_vst1q_p_f16): Likewise.
3052         (__arm_vld4q_f32): Likewise.
3053         (__arm_vld2q_f32): Likewise.
3054         (__arm_vld1q_z_f32): Likewise.
3055         (__arm_vst2q_f32): Likewise.
3056         (__arm_vst1q_p_f32): Likewise.
3057         (vld1q_z): Define polymorphic variant.
3058         (vld2q): Likewise.
3059         (vld4q): Likewise.
3060         (vst1q_p): Likewise.
3061         (vst2q): Likewise.
3062         * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
3063         (LOAD1): Likewise.
3064         * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
3065         (mve_vld2q<mode>): Likewise.
3066         (mve_vld4q<mode>): Likewise.
3067
3068 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3069             Andre Vieira  <andre.simoesdiasvieira@arm.com>
3070             Mihail Ionescu  <mihail.ionescu@arm.com>
3071
3072         * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
3073         (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
3074         (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
3075         "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
3076         (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
3077         and ARM_BUILTIN_SET_FPSCR_NZCVQC.
3078         * config/arm/arm_mve.h (vadciq_s32): Define macro.
3079         (vadciq_u32): Likewise.
3080         (vadciq_m_s32): Likewise.
3081         (vadciq_m_u32): Likewise.
3082         (vadcq_s32): Likewise.
3083         (vadcq_u32): Likewise.
3084         (vadcq_m_s32): Likewise.
3085         (vadcq_m_u32): Likewise.
3086         (vsbciq_s32): Likewise.
3087         (vsbciq_u32): Likewise.
3088         (vsbciq_m_s32): Likewise.
3089         (vsbciq_m_u32): Likewise.
3090         (vsbcq_s32): Likewise.
3091         (vsbcq_u32): Likewise.
3092         (vsbcq_m_s32): Likewise.
3093         (vsbcq_m_u32): Likewise.
3094         (__arm_vadciq_s32): Define intrinsic.
3095         (__arm_vadciq_u32): Likewise.
3096         (__arm_vadciq_m_s32): Likewise.
3097         (__arm_vadciq_m_u32): Likewise.
3098         (__arm_vadcq_s32): Likewise.
3099         (__arm_vadcq_u32): Likewise.
3100         (__arm_vadcq_m_s32): Likewise.
3101         (__arm_vadcq_m_u32): Likewise.
3102         (__arm_vsbciq_s32): Likewise.
3103         (__arm_vsbciq_u32): Likewise.
3104         (__arm_vsbciq_m_s32): Likewise.
3105         (__arm_vsbciq_m_u32): Likewise.
3106         (__arm_vsbcq_s32): Likewise.
3107         (__arm_vsbcq_u32): Likewise.
3108         (__arm_vsbcq_m_s32): Likewise.
3109         (__arm_vsbcq_m_u32): Likewise.
3110         (vadciq_m): Define polymorphic variant.
3111         (vadciq): Likewise.
3112         (vadcq_m): Likewise.
3113         (vadcq): Likewise.
3114         (vsbciq_m): Likewise.
3115         (vsbciq): Likewise.
3116         (vsbcq_m): Likewise.
3117         (vsbcq): Likewise.
3118         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
3119         qualifier.
3120         (BINOP_UNONE_UNONE_UNONE): Likewise.
3121         (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
3122         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
3123         * config/arm/mve.md (VADCIQ): Define iterator.
3124         (VADCIQ_M): Likewise.
3125         (VSBCQ): Likewise.
3126         (VSBCQ_M): Likewise.
3127         (VSBCIQ): Likewise.
3128         (VSBCIQ_M): Likewise.
3129         (VADCQ): Likewise.
3130         (VADCQ_M): Likewise.
3131         (mve_vadciq_m_<supf>v4si): Define RTL pattern.
3132         (mve_vadciq_<supf>v4si): Likewise.
3133         (mve_vadcq_m_<supf>v4si): Likewise.
3134         (mve_vadcq_<supf>v4si): Likewise.
3135         (mve_vsbciq_m_<supf>v4si): Likewise.
3136         (mve_vsbciq_<supf>v4si): Likewise.
3137         (mve_vsbcq_m_<supf>v4si): Likewise.
3138         (mve_vsbcq_<supf>v4si): Likewise.
3139         (get_fpscr_nzcvqc): Define isns.
3140         (set_fpscr_nzcvqc): Define isns.
3141         * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
3142         (UNSPEC_SET_FPSCR_NZCVQC): Define.
3143
3144 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3145
3146         * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
3147         (vddupq_x_n_u16): Likewise.
3148         (vddupq_x_n_u32): Likewise.
3149         (vddupq_x_wb_u8): Likewise.
3150         (vddupq_x_wb_u16): Likewise.
3151         (vddupq_x_wb_u32): Likewise.
3152         (vdwdupq_x_n_u8): Likewise.
3153         (vdwdupq_x_n_u16): Likewise.
3154         (vdwdupq_x_n_u32): Likewise.
3155         (vdwdupq_x_wb_u8): Likewise.
3156         (vdwdupq_x_wb_u16): Likewise.
3157         (vdwdupq_x_wb_u32): Likewise.
3158         (vidupq_x_n_u8): Likewise.
3159         (vidupq_x_n_u16): Likewise.
3160         (vidupq_x_n_u32): Likewise.
3161         (vidupq_x_wb_u8): Likewise.
3162         (vidupq_x_wb_u16): Likewise.
3163         (vidupq_x_wb_u32): Likewise.
3164         (viwdupq_x_n_u8): Likewise.
3165         (viwdupq_x_n_u16): Likewise.
3166         (viwdupq_x_n_u32): Likewise.
3167         (viwdupq_x_wb_u8): Likewise.
3168         (viwdupq_x_wb_u16): Likewise.
3169         (viwdupq_x_wb_u32): Likewise.
3170         (vdupq_x_n_s8): Likewise.
3171         (vdupq_x_n_s16): Likewise.
3172         (vdupq_x_n_s32): Likewise.
3173         (vdupq_x_n_u8): Likewise.
3174         (vdupq_x_n_u16): Likewise.
3175         (vdupq_x_n_u32): Likewise.
3176         (vminq_x_s8): Likewise.
3177         (vminq_x_s16): Likewise.
3178         (vminq_x_s32): Likewise.
3179         (vminq_x_u8): Likewise.
3180         (vminq_x_u16): Likewise.
3181         (vminq_x_u32): Likewise.
3182         (vmaxq_x_s8): Likewise.
3183         (vmaxq_x_s16): Likewise.
3184         (vmaxq_x_s32): Likewise.
3185         (vmaxq_x_u8): Likewise.
3186         (vmaxq_x_u16): Likewise.
3187         (vmaxq_x_u32): Likewise.
3188         (vabdq_x_s8): Likewise.
3189         (vabdq_x_s16): Likewise.
3190         (vabdq_x_s32): Likewise.
3191         (vabdq_x_u8): Likewise.
3192         (vabdq_x_u16): Likewise.
3193         (vabdq_x_u32): Likewise.
3194         (vabsq_x_s8): Likewise.
3195         (vabsq_x_s16): Likewise.
3196         (vabsq_x_s32): Likewise.
3197         (vaddq_x_s8): Likewise.
3198         (vaddq_x_s16): Likewise.
3199         (vaddq_x_s32): Likewise.
3200         (vaddq_x_n_s8): Likewise.
3201         (vaddq_x_n_s16): Likewise.
3202         (vaddq_x_n_s32): Likewise.
3203         (vaddq_x_u8): Likewise.
3204         (vaddq_x_u16): Likewise.
3205         (vaddq_x_u32): Likewise.
3206         (vaddq_x_n_u8): Likewise.
3207         (vaddq_x_n_u16): Likewise.
3208         (vaddq_x_n_u32): Likewise.
3209         (vclsq_x_s8): Likewise.
3210         (vclsq_x_s16): Likewise.
3211         (vclsq_x_s32): Likewise.
3212         (vclzq_x_s8): Likewise.
3213         (vclzq_x_s16): Likewise.
3214         (vclzq_x_s32): Likewise.
3215         (vclzq_x_u8): Likewise.
3216         (vclzq_x_u16): Likewise.
3217         (vclzq_x_u32): Likewise.
3218         (vnegq_x_s8): Likewise.
3219         (vnegq_x_s16): Likewise.
3220         (vnegq_x_s32): Likewise.
3221         (vmulhq_x_s8): Likewise.
3222         (vmulhq_x_s16): Likewise.
3223         (vmulhq_x_s32): Likewise.
3224         (vmulhq_x_u8): Likewise.
3225         (vmulhq_x_u16): Likewise.
3226         (vmulhq_x_u32): Likewise.
3227         (vmullbq_poly_x_p8): Likewise.
3228         (vmullbq_poly_x_p16): Likewise.
3229         (vmullbq_int_x_s8): Likewise.
3230         (vmullbq_int_x_s16): Likewise.
3231         (vmullbq_int_x_s32): Likewise.
3232         (vmullbq_int_x_u8): Likewise.
3233         (vmullbq_int_x_u16): Likewise.
3234         (vmullbq_int_x_u32): Likewise.
3235         (vmulltq_poly_x_p8): Likewise.
3236         (vmulltq_poly_x_p16): Likewise.
3237         (vmulltq_int_x_s8): Likewise.
3238         (vmulltq_int_x_s16): Likewise.
3239         (vmulltq_int_x_s32): Likewise.
3240         (vmulltq_int_x_u8): Likewise.
3241         (vmulltq_int_x_u16): Likewise.
3242         (vmulltq_int_x_u32): Likewise.
3243         (vmulq_x_s8): Likewise.
3244         (vmulq_x_s16): Likewise.
3245         (vmulq_x_s32): Likewise.
3246         (vmulq_x_n_s8): Likewise.
3247         (vmulq_x_n_s16): Likewise.
3248         (vmulq_x_n_s32): Likewise.
3249         (vmulq_x_u8): Likewise.
3250         (vmulq_x_u16): Likewise.
3251         (vmulq_x_u32): Likewise.
3252         (vmulq_x_n_u8): Likewise.
3253         (vmulq_x_n_u16): Likewise.
3254         (vmulq_x_n_u32): Likewise.
3255         (vsubq_x_s8): Likewise.
3256         (vsubq_x_s16): Likewise.
3257         (vsubq_x_s32): Likewise.
3258         (vsubq_x_n_s8): Likewise.
3259         (vsubq_x_n_s16): Likewise.
3260         (vsubq_x_n_s32): Likewise.
3261         (vsubq_x_u8): Likewise.
3262         (vsubq_x_u16): Likewise.
3263         (vsubq_x_u32): Likewise.
3264         (vsubq_x_n_u8): Likewise.
3265         (vsubq_x_n_u16): Likewise.
3266         (vsubq_x_n_u32): Likewise.
3267         (vcaddq_rot90_x_s8): Likewise.
3268         (vcaddq_rot90_x_s16): Likewise.
3269         (vcaddq_rot90_x_s32): Likewise.
3270         (vcaddq_rot90_x_u8): Likewise.
3271         (vcaddq_rot90_x_u16): Likewise.
3272         (vcaddq_rot90_x_u32): Likewise.
3273         (vcaddq_rot270_x_s8): Likewise.
3274         (vcaddq_rot270_x_s16): Likewise.
3275         (vcaddq_rot270_x_s32): Likewise.
3276         (vcaddq_rot270_x_u8): Likewise.
3277         (vcaddq_rot270_x_u16): Likewise.
3278         (vcaddq_rot270_x_u32): Likewise.
3279         (vhaddq_x_n_s8): Likewise.
3280         (vhaddq_x_n_s16): Likewise.
3281         (vhaddq_x_n_s32): Likewise.
3282         (vhaddq_x_n_u8): Likewise.
3283         (vhaddq_x_n_u16): Likewise.
3284         (vhaddq_x_n_u32): Likewise.
3285         (vhaddq_x_s8): Likewise.
3286         (vhaddq_x_s16): Likewise.
3287         (vhaddq_x_s32): Likewise.
3288         (vhaddq_x_u8): Likewise.
3289         (vhaddq_x_u16): Likewise.
3290         (vhaddq_x_u32): Likewise.
3291         (vhcaddq_rot90_x_s8): Likewise.
3292         (vhcaddq_rot90_x_s16): Likewise.
3293         (vhcaddq_rot90_x_s32): Likewise.
3294         (vhcaddq_rot270_x_s8): Likewise.
3295         (vhcaddq_rot270_x_s16): Likewise.
3296         (vhcaddq_rot270_x_s32): Likewise.
3297         (vhsubq_x_n_s8): Likewise.
3298         (vhsubq_x_n_s16): Likewise.
3299         (vhsubq_x_n_s32): Likewise.
3300         (vhsubq_x_n_u8): Likewise.
3301         (vhsubq_x_n_u16): Likewise.
3302         (vhsubq_x_n_u32): Likewise.
3303         (vhsubq_x_s8): Likewise.
3304         (vhsubq_x_s16): Likewise.
3305         (vhsubq_x_s32): Likewise.
3306         (vhsubq_x_u8): Likewise.
3307         (vhsubq_x_u16): Likewise.
3308         (vhsubq_x_u32): Likewise.
3309         (vrhaddq_x_s8): Likewise.
3310         (vrhaddq_x_s16): Likewise.
3311         (vrhaddq_x_s32): Likewise.
3312         (vrhaddq_x_u8): Likewise.
3313         (vrhaddq_x_u16): Likewise.
3314         (vrhaddq_x_u32): Likewise.
3315         (vrmulhq_x_s8): Likewise.
3316         (vrmulhq_x_s16): Likewise.
3317         (vrmulhq_x_s32): Likewise.
3318         (vrmulhq_x_u8): Likewise.
3319         (vrmulhq_x_u16): Likewise.
3320         (vrmulhq_x_u32): Likewise.
3321         (vandq_x_s8): Likewise.
3322         (vandq_x_s16): Likewise.
3323         (vandq_x_s32): Likewise.
3324         (vandq_x_u8): Likewise.
3325         (vandq_x_u16): Likewise.
3326         (vandq_x_u32): Likewise.
3327         (vbicq_x_s8): Likewise.
3328         (vbicq_x_s16): Likewise.
3329         (vbicq_x_s32): Likewise.
3330         (vbicq_x_u8): Likewise.
3331         (vbicq_x_u16): Likewise.
3332         (vbicq_x_u32): Likewise.
3333         (vbrsrq_x_n_s8): Likewise.
3334         (vbrsrq_x_n_s16): Likewise.
3335         (vbrsrq_x_n_s32): Likewise.
3336         (vbrsrq_x_n_u8): Likewise.
3337         (vbrsrq_x_n_u16): Likewise.
3338         (vbrsrq_x_n_u32): Likewise.
3339         (veorq_x_s8): Likewise.
3340         (veorq_x_s16): Likewise.
3341         (veorq_x_s32): Likewise.
3342         (veorq_x_u8): Likewise.
3343         (veorq_x_u16): Likewise.
3344         (veorq_x_u32): Likewise.
3345         (vmovlbq_x_s8): Likewise.
3346         (vmovlbq_x_s16): Likewise.
3347         (vmovlbq_x_u8): Likewise.
3348         (vmovlbq_x_u16): Likewise.
3349         (vmovltq_x_s8): Likewise.
3350         (vmovltq_x_s16): Likewise.
3351         (vmovltq_x_u8): Likewise.
3352         (vmovltq_x_u16): Likewise.
3353         (vmvnq_x_s8): Likewise.
3354         (vmvnq_x_s16): Likewise.
3355         (vmvnq_x_s32): Likewise.
3356         (vmvnq_x_u8): Likewise.
3357         (vmvnq_x_u16): Likewise.
3358         (vmvnq_x_u32): Likewise.
3359         (vmvnq_x_n_s16): Likewise.
3360         (vmvnq_x_n_s32): Likewise.
3361         (vmvnq_x_n_u16): Likewise.
3362         (vmvnq_x_n_u32): Likewise.
3363         (vornq_x_s8): Likewise.
3364         (vornq_x_s16): Likewise.
3365         (vornq_x_s32): Likewise.
3366         (vornq_x_u8): Likewise.
3367         (vornq_x_u16): Likewise.
3368         (vornq_x_u32): Likewise.
3369         (vorrq_x_s8): Likewise.
3370         (vorrq_x_s16): Likewise.
3371         (vorrq_x_s32): Likewise.
3372         (vorrq_x_u8): Likewise.
3373         (vorrq_x_u16): Likewise.
3374         (vorrq_x_u32): Likewise.
3375         (vrev16q_x_s8): Likewise.
3376         (vrev16q_x_u8): Likewise.
3377         (vrev32q_x_s8): Likewise.
3378         (vrev32q_x_s16): Likewise.
3379         (vrev32q_x_u8): Likewise.
3380         (vrev32q_x_u16): Likewise.
3381         (vrev64q_x_s8): Likewise.
3382         (vrev64q_x_s16): Likewise.
3383         (vrev64q_x_s32): Likewise.
3384         (vrev64q_x_u8): Likewise.
3385         (vrev64q_x_u16): Likewise.
3386         (vrev64q_x_u32): Likewise.
3387         (vrshlq_x_s8): Likewise.
3388         (vrshlq_x_s16): Likewise.
3389         (vrshlq_x_s32): Likewise.
3390         (vrshlq_x_u8): Likewise.
3391         (vrshlq_x_u16): Likewise.
3392         (vrshlq_x_u32): Likewise.
3393         (vshllbq_x_n_s8): Likewise.
3394         (vshllbq_x_n_s16): Likewise.
3395         (vshllbq_x_n_u8): Likewise.
3396         (vshllbq_x_n_u16): Likewise.
3397         (vshlltq_x_n_s8): Likewise.
3398         (vshlltq_x_n_s16): Likewise.
3399         (vshlltq_x_n_u8): Likewise.
3400         (vshlltq_x_n_u16): Likewise.
3401         (vshlq_x_s8): Likewise.
3402         (vshlq_x_s16): Likewise.
3403         (vshlq_x_s32): Likewise.
3404         (vshlq_x_u8): Likewise.
3405         (vshlq_x_u16): Likewise.
3406         (vshlq_x_u32): Likewise.
3407         (vshlq_x_n_s8): Likewise.
3408         (vshlq_x_n_s16): Likewise.
3409         (vshlq_x_n_s32): Likewise.
3410         (vshlq_x_n_u8): Likewise.
3411         (vshlq_x_n_u16): Likewise.
3412         (vshlq_x_n_u32): Likewise.
3413         (vrshrq_x_n_s8): Likewise.
3414         (vrshrq_x_n_s16): Likewise.
3415         (vrshrq_x_n_s32): Likewise.
3416         (vrshrq_x_n_u8): Likewise.
3417         (vrshrq_x_n_u16): Likewise.
3418         (vrshrq_x_n_u32): Likewise.
3419         (vshrq_x_n_s8): Likewise.
3420         (vshrq_x_n_s16): Likewise.
3421         (vshrq_x_n_s32): Likewise.
3422         (vshrq_x_n_u8): Likewise.
3423         (vshrq_x_n_u16): Likewise.
3424         (vshrq_x_n_u32): Likewise.
3425         (vdupq_x_n_f16): Likewise.
3426         (vdupq_x_n_f32): Likewise.
3427         (vminnmq_x_f16): Likewise.
3428         (vminnmq_x_f32): Likewise.
3429         (vmaxnmq_x_f16): Likewise.
3430         (vmaxnmq_x_f32): Likewise.
3431         (vabdq_x_f16): Likewise.
3432         (vabdq_x_f32): Likewise.
3433         (vabsq_x_f16): Likewise.
3434         (vabsq_x_f32): Likewise.
3435         (vaddq_x_f16): Likewise.
3436         (vaddq_x_f32): Likewise.
3437         (vaddq_x_n_f16): Likewise.
3438         (vaddq_x_n_f32): Likewise.
3439         (vnegq_x_f16): Likewise.
3440         (vnegq_x_f32): Likewise.
3441         (vmulq_x_f16): Likewise.
3442         (vmulq_x_f32): Likewise.
3443         (vmulq_x_n_f16): Likewise.
3444         (vmulq_x_n_f32): Likewise.
3445         (vsubq_x_f16): Likewise.
3446         (vsubq_x_f32): Likewise.
3447         (vsubq_x_n_f16): Likewise.
3448         (vsubq_x_n_f32): Likewise.
3449         (vcaddq_rot90_x_f16): Likewise.
3450         (vcaddq_rot90_x_f32): Likewise.
3451         (vcaddq_rot270_x_f16): Likewise.
3452         (vcaddq_rot270_x_f32): Likewise.
3453         (vcmulq_x_f16): Likewise.
3454         (vcmulq_x_f32): Likewise.
3455         (vcmulq_rot90_x_f16): Likewise.
3456         (vcmulq_rot90_x_f32): Likewise.
3457         (vcmulq_rot180_x_f16): Likewise.
3458         (vcmulq_rot180_x_f32): Likewise.
3459         (vcmulq_rot270_x_f16): Likewise.
3460         (vcmulq_rot270_x_f32): Likewise.
3461         (vcvtaq_x_s16_f16): Likewise.
3462         (vcvtaq_x_s32_f32): Likewise.
3463         (vcvtaq_x_u16_f16): Likewise.
3464         (vcvtaq_x_u32_f32): Likewise.
3465         (vcvtnq_x_s16_f16): Likewise.
3466         (vcvtnq_x_s32_f32): Likewise.
3467         (vcvtnq_x_u16_f16): Likewise.
3468         (vcvtnq_x_u32_f32): Likewise.
3469         (vcvtpq_x_s16_f16): Likewise.
3470         (vcvtpq_x_s32_f32): Likewise.
3471         (vcvtpq_x_u16_f16): Likewise.
3472         (vcvtpq_x_u32_f32): Likewise.
3473         (vcvtmq_x_s16_f16): Likewise.
3474         (vcvtmq_x_s32_f32): Likewise.
3475         (vcvtmq_x_u16_f16): Likewise.
3476         (vcvtmq_x_u32_f32): Likewise.
3477         (vcvtbq_x_f32_f16): Likewise.
3478         (vcvttq_x_f32_f16): Likewise.
3479         (vcvtq_x_f16_u16): Likewise.
3480         (vcvtq_x_f16_s16): Likewise.
3481         (vcvtq_x_f32_s32): Likewise.
3482         (vcvtq_x_f32_u32): Likewise.
3483         (vcvtq_x_n_f16_s16): Likewise.
3484         (vcvtq_x_n_f16_u16): Likewise.
3485         (vcvtq_x_n_f32_s32): Likewise.
3486         (vcvtq_x_n_f32_u32): Likewise.
3487         (vcvtq_x_s16_f16): Likewise.
3488         (vcvtq_x_s32_f32): Likewise.
3489         (vcvtq_x_u16_f16): Likewise.
3490         (vcvtq_x_u32_f32): Likewise.
3491         (vcvtq_x_n_s16_f16): Likewise.
3492         (vcvtq_x_n_s32_f32): Likewise.
3493         (vcvtq_x_n_u16_f16): Likewise.
3494         (vcvtq_x_n_u32_f32): Likewise.
3495         (vrndq_x_f16): Likewise.
3496         (vrndq_x_f32): Likewise.
3497         (vrndnq_x_f16): Likewise.
3498         (vrndnq_x_f32): Likewise.
3499         (vrndmq_x_f16): Likewise.
3500         (vrndmq_x_f32): Likewise.
3501         (vrndpq_x_f16): Likewise.
3502         (vrndpq_x_f32): Likewise.
3503         (vrndaq_x_f16): Likewise.
3504         (vrndaq_x_f32): Likewise.
3505         (vrndxq_x_f16): Likewise.
3506         (vrndxq_x_f32): Likewise.
3507         (vandq_x_f16): Likewise.
3508         (vandq_x_f32): Likewise.
3509         (vbicq_x_f16): Likewise.
3510         (vbicq_x_f32): Likewise.
3511         (vbrsrq_x_n_f16): Likewise.
3512         (vbrsrq_x_n_f32): Likewise.
3513         (veorq_x_f16): Likewise.
3514         (veorq_x_f32): Likewise.
3515         (vornq_x_f16): Likewise.
3516         (vornq_x_f32): Likewise.
3517         (vorrq_x_f16): Likewise.
3518         (vorrq_x_f32): Likewise.
3519         (vrev32q_x_f16): Likewise.
3520         (vrev64q_x_f16): Likewise.
3521         (vrev64q_x_f32): Likewise.
3522         (__arm_vddupq_x_n_u8): Define intrinsic.
3523         (__arm_vddupq_x_n_u16): Likewise.
3524         (__arm_vddupq_x_n_u32): Likewise.
3525         (__arm_vddupq_x_wb_u8): Likewise.
3526         (__arm_vddupq_x_wb_u16): Likewise.
3527         (__arm_vddupq_x_wb_u32): Likewise.
3528         (__arm_vdwdupq_x_n_u8): Likewise.
3529         (__arm_vdwdupq_x_n_u16): Likewise.
3530         (__arm_vdwdupq_x_n_u32): Likewise.
3531         (__arm_vdwdupq_x_wb_u8): Likewise.
3532         (__arm_vdwdupq_x_wb_u16): Likewise.
3533         (__arm_vdwdupq_x_wb_u32): Likewise.
3534         (__arm_vidupq_x_n_u8): Likewise.
3535         (__arm_vidupq_x_n_u16): Likewise.
3536         (__arm_vidupq_x_n_u32): Likewise.
3537         (__arm_vidupq_x_wb_u8): Likewise.
3538         (__arm_vidupq_x_wb_u16): Likewise.
3539         (__arm_vidupq_x_wb_u32): Likewise.
3540         (__arm_viwdupq_x_n_u8): Likewise.
3541         (__arm_viwdupq_x_n_u16): Likewise.
3542         (__arm_viwdupq_x_n_u32): Likewise.
3543         (__arm_viwdupq_x_wb_u8): Likewise.
3544         (__arm_viwdupq_x_wb_u16): Likewise.
3545         (__arm_viwdupq_x_wb_u32): Likewise.
3546         (__arm_vdupq_x_n_s8): Likewise.
3547         (__arm_vdupq_x_n_s16): Likewise.
3548         (__arm_vdupq_x_n_s32): Likewise.
3549         (__arm_vdupq_x_n_u8): Likewise.
3550         (__arm_vdupq_x_n_u16): Likewise.
3551         (__arm_vdupq_x_n_u32): Likewise.
3552         (__arm_vminq_x_s8): Likewise.
3553         (__arm_vminq_x_s16): Likewise.
3554         (__arm_vminq_x_s32): Likewise.
3555         (__arm_vminq_x_u8): Likewise.
3556         (__arm_vminq_x_u16): Likewise.
3557         (__arm_vminq_x_u32): Likewise.
3558         (__arm_vmaxq_x_s8): Likewise.
3559         (__arm_vmaxq_x_s16): Likewise.
3560         (__arm_vmaxq_x_s32): Likewise.
3561         (__arm_vmaxq_x_u8): Likewise.
3562         (__arm_vmaxq_x_u16): Likewise.
3563         (__arm_vmaxq_x_u32): Likewise.
3564         (__arm_vabdq_x_s8): Likewise.
3565         (__arm_vabdq_x_s16): Likewise.
3566         (__arm_vabdq_x_s32): Likewise.
3567         (__arm_vabdq_x_u8): Likewise.
3568         (__arm_vabdq_x_u16): Likewise.
3569         (__arm_vabdq_x_u32): Likewise.
3570         (__arm_vabsq_x_s8): Likewise.
3571         (__arm_vabsq_x_s16): Likewise.
3572         (__arm_vabsq_x_s32): Likewise.
3573         (__arm_vaddq_x_s8): Likewise.
3574         (__arm_vaddq_x_s16): Likewise.
3575         (__arm_vaddq_x_s32): Likewise.
3576         (__arm_vaddq_x_n_s8): Likewise.
3577         (__arm_vaddq_x_n_s16): Likewise.
3578         (__arm_vaddq_x_n_s32): Likewise.
3579         (__arm_vaddq_x_u8): Likewise.
3580         (__arm_vaddq_x_u16): Likewise.
3581         (__arm_vaddq_x_u32): Likewise.
3582         (__arm_vaddq_x_n_u8): Likewise.
3583         (__arm_vaddq_x_n_u16): Likewise.
3584         (__arm_vaddq_x_n_u32): Likewise.
3585         (__arm_vclsq_x_s8): Likewise.
3586         (__arm_vclsq_x_s16): Likewise.
3587         (__arm_vclsq_x_s32): Likewise.
3588         (__arm_vclzq_x_s8): Likewise.
3589         (__arm_vclzq_x_s16): Likewise.
3590         (__arm_vclzq_x_s32): Likewise.
3591         (__arm_vclzq_x_u8): Likewise.
3592         (__arm_vclzq_x_u16): Likewise.
3593         (__arm_vclzq_x_u32): Likewise.
3594         (__arm_vnegq_x_s8): Likewise.
3595         (__arm_vnegq_x_s16): Likewise.
3596         (__arm_vnegq_x_s32): Likewise.
3597         (__arm_vmulhq_x_s8): Likewise.
3598         (__arm_vmulhq_x_s16): Likewise.
3599         (__arm_vmulhq_x_s32): Likewise.
3600         (__arm_vmulhq_x_u8): Likewise.
3601         (__arm_vmulhq_x_u16): Likewise.
3602         (__arm_vmulhq_x_u32): Likewise.
3603         (__arm_vmullbq_poly_x_p8): Likewise.
3604         (__arm_vmullbq_poly_x_p16): Likewise.
3605         (__arm_vmullbq_int_x_s8): Likewise.
3606         (__arm_vmullbq_int_x_s16): Likewise.
3607         (__arm_vmullbq_int_x_s32): Likewise.
3608         (__arm_vmullbq_int_x_u8): Likewise.
3609         (__arm_vmullbq_int_x_u16): Likewise.
3610         (__arm_vmullbq_int_x_u32): Likewise.
3611         (__arm_vmulltq_poly_x_p8): Likewise.
3612         (__arm_vmulltq_poly_x_p16): Likewise.
3613         (__arm_vmulltq_int_x_s8): Likewise.
3614         (__arm_vmulltq_int_x_s16): Likewise.
3615         (__arm_vmulltq_int_x_s32): Likewise.
3616         (__arm_vmulltq_int_x_u8): Likewise.
3617         (__arm_vmulltq_int_x_u16): Likewise.
3618         (__arm_vmulltq_int_x_u32): Likewise.
3619         (__arm_vmulq_x_s8): Likewise.
3620         (__arm_vmulq_x_s16): Likewise.
3621         (__arm_vmulq_x_s32): Likewise.
3622         (__arm_vmulq_x_n_s8): Likewise.
3623         (__arm_vmulq_x_n_s16): Likewise.
3624         (__arm_vmulq_x_n_s32): Likewise.
3625         (__arm_vmulq_x_u8): Likewise.
3626         (__arm_vmulq_x_u16): Likewise.
3627         (__arm_vmulq_x_u32): Likewise.
3628         (__arm_vmulq_x_n_u8): Likewise.
3629         (__arm_vmulq_x_n_u16): Likewise.
3630         (__arm_vmulq_x_n_u32): Likewise.
3631         (__arm_vsubq_x_s8): Likewise.
3632         (__arm_vsubq_x_s16): Likewise.
3633         (__arm_vsubq_x_s32): Likewise.
3634         (__arm_vsubq_x_n_s8): Likewise.
3635         (__arm_vsubq_x_n_s16): Likewise.
3636         (__arm_vsubq_x_n_s32): Likewise.
3637         (__arm_vsubq_x_u8): Likewise.
3638         (__arm_vsubq_x_u16): Likewise.
3639         (__arm_vsubq_x_u32): Likewise.
3640         (__arm_vsubq_x_n_u8): Likewise.
3641         (__arm_vsubq_x_n_u16): Likewise.
3642         (__arm_vsubq_x_n_u32): Likewise.
3643         (__arm_vcaddq_rot90_x_s8): Likewise.
3644         (__arm_vcaddq_rot90_x_s16): Likewise.
3645         (__arm_vcaddq_rot90_x_s32): Likewise.
3646         (__arm_vcaddq_rot90_x_u8): Likewise.
3647         (__arm_vcaddq_rot90_x_u16): Likewise.
3648         (__arm_vcaddq_rot90_x_u32): Likewise.
3649         (__arm_vcaddq_rot270_x_s8): Likewise.
3650         (__arm_vcaddq_rot270_x_s16): Likewise.
3651         (__arm_vcaddq_rot270_x_s32): Likewise.
3652         (__arm_vcaddq_rot270_x_u8): Likewise.
3653         (__arm_vcaddq_rot270_x_u16): Likewise.
3654         (__arm_vcaddq_rot270_x_u32): Likewise.
3655         (__arm_vhaddq_x_n_s8): Likewise.
3656         (__arm_vhaddq_x_n_s16): Likewise.
3657         (__arm_vhaddq_x_n_s32): Likewise.
3658         (__arm_vhaddq_x_n_u8): Likewise.
3659         (__arm_vhaddq_x_n_u16): Likewise.
3660         (__arm_vhaddq_x_n_u32): Likewise.
3661         (__arm_vhaddq_x_s8): Likewise.
3662         (__arm_vhaddq_x_s16): Likewise.
3663         (__arm_vhaddq_x_s32): Likewise.
3664         (__arm_vhaddq_x_u8): Likewise.
3665         (__arm_vhaddq_x_u16): Likewise.
3666         (__arm_vhaddq_x_u32): Likewise.
3667         (__arm_vhcaddq_rot90_x_s8): Likewise.
3668         (__arm_vhcaddq_rot90_x_s16): Likewise.
3669         (__arm_vhcaddq_rot90_x_s32): Likewise.
3670         (__arm_vhcaddq_rot270_x_s8): Likewise.
3671         (__arm_vhcaddq_rot270_x_s16): Likewise.
3672         (__arm_vhcaddq_rot270_x_s32): Likewise.
3673         (__arm_vhsubq_x_n_s8): Likewise.
3674         (__arm_vhsubq_x_n_s16): Likewise.
3675         (__arm_vhsubq_x_n_s32): Likewise.
3676         (__arm_vhsubq_x_n_u8): Likewise.
3677         (__arm_vhsubq_x_n_u16): Likewise.
3678         (__arm_vhsubq_x_n_u32): Likewise.
3679         (__arm_vhsubq_x_s8): Likewise.
3680         (__arm_vhsubq_x_s16): Likewise.
3681         (__arm_vhsubq_x_s32): Likewise.
3682         (__arm_vhsubq_x_u8): Likewise.
3683         (__arm_vhsubq_x_u16): Likewise.
3684         (__arm_vhsubq_x_u32): Likewise.
3685         (__arm_vrhaddq_x_s8): Likewise.
3686         (__arm_vrhaddq_x_s16): Likewise.
3687         (__arm_vrhaddq_x_s32): Likewise.
3688         (__arm_vrhaddq_x_u8): Likewise.
3689         (__arm_vrhaddq_x_u16): Likewise.
3690         (__arm_vrhaddq_x_u32): Likewise.
3691         (__arm_vrmulhq_x_s8): Likewise.
3692         (__arm_vrmulhq_x_s16): Likewise.
3693         (__arm_vrmulhq_x_s32): Likewise.
3694         (__arm_vrmulhq_x_u8): Likewise.
3695         (__arm_vrmulhq_x_u16): Likewise.
3696         (__arm_vrmulhq_x_u32): Likewise.
3697         (__arm_vandq_x_s8): Likewise.
3698         (__arm_vandq_x_s16): Likewise.
3699         (__arm_vandq_x_s32): Likewise.
3700         (__arm_vandq_x_u8): Likewise.
3701         (__arm_vandq_x_u16): Likewise.
3702         (__arm_vandq_x_u32): Likewise.
3703         (__arm_vbicq_x_s8): Likewise.
3704         (__arm_vbicq_x_s16): Likewise.
3705         (__arm_vbicq_x_s32): Likewise.
3706         (__arm_vbicq_x_u8): Likewise.
3707         (__arm_vbicq_x_u16): Likewise.
3708         (__arm_vbicq_x_u32): Likewise.
3709         (__arm_vbrsrq_x_n_s8): Likewise.
3710         (__arm_vbrsrq_x_n_s16): Likewise.
3711         (__arm_vbrsrq_x_n_s32): Likewise.
3712         (__arm_vbrsrq_x_n_u8): Likewise.
3713         (__arm_vbrsrq_x_n_u16): Likewise.
3714         (__arm_vbrsrq_x_n_u32): Likewise.
3715         (__arm_veorq_x_s8): Likewise.
3716         (__arm_veorq_x_s16): Likewise.
3717         (__arm_veorq_x_s32): Likewise.
3718         (__arm_veorq_x_u8): Likewise.
3719         (__arm_veorq_x_u16): Likewise.
3720         (__arm_veorq_x_u32): Likewise.
3721         (__arm_vmovlbq_x_s8): Likewise.
3722         (__arm_vmovlbq_x_s16): Likewise.
3723         (__arm_vmovlbq_x_u8): Likewise.
3724         (__arm_vmovlbq_x_u16): Likewise.
3725         (__arm_vmovltq_x_s8): Likewise.
3726         (__arm_vmovltq_x_s16): Likewise.
3727         (__arm_vmovltq_x_u8): Likewise.
3728         (__arm_vmovltq_x_u16): Likewise.
3729         (__arm_vmvnq_x_s8): Likewise.
3730         (__arm_vmvnq_x_s16): Likewise.
3731         (__arm_vmvnq_x_s32): Likewise.
3732         (__arm_vmvnq_x_u8): Likewise.
3733         (__arm_vmvnq_x_u16): Likewise.
3734         (__arm_vmvnq_x_u32): Likewise.
3735         (__arm_vmvnq_x_n_s16): Likewise.
3736         (__arm_vmvnq_x_n_s32): Likewise.
3737         (__arm_vmvnq_x_n_u16): Likewise.
3738         (__arm_vmvnq_x_n_u32): Likewise.
3739         (__arm_vornq_x_s8): Likewise.
3740         (__arm_vornq_x_s16): Likewise.
3741         (__arm_vornq_x_s32): Likewise.
3742         (__arm_vornq_x_u8): Likewise.
3743         (__arm_vornq_x_u16): Likewise.
3744         (__arm_vornq_x_u32): Likewise.
3745         (__arm_vorrq_x_s8): Likewise.
3746         (__arm_vorrq_x_s16): Likewise.
3747         (__arm_vorrq_x_s32): Likewise.
3748         (__arm_vorrq_x_u8): Likewise.
3749         (__arm_vorrq_x_u16): Likewise.
3750         (__arm_vorrq_x_u32): Likewise.
3751         (__arm_vrev16q_x_s8): Likewise.
3752         (__arm_vrev16q_x_u8): Likewise.
3753         (__arm_vrev32q_x_s8): Likewise.
3754         (__arm_vrev32q_x_s16): Likewise.
3755         (__arm_vrev32q_x_u8): Likewise.
3756         (__arm_vrev32q_x_u16): Likewise.
3757         (__arm_vrev64q_x_s8): Likewise.
3758         (__arm_vrev64q_x_s16): Likewise.
3759         (__arm_vrev64q_x_s32): Likewise.
3760         (__arm_vrev64q_x_u8): Likewise.
3761         (__arm_vrev64q_x_u16): Likewise.
3762         (__arm_vrev64q_x_u32): Likewise.
3763         (__arm_vrshlq_x_s8): Likewise.
3764         (__arm_vrshlq_x_s16): Likewise.
3765         (__arm_vrshlq_x_s32): Likewise.
3766         (__arm_vrshlq_x_u8): Likewise.
3767         (__arm_vrshlq_x_u16): Likewise.
3768         (__arm_vrshlq_x_u32): Likewise.
3769         (__arm_vshllbq_x_n_s8): Likewise.
3770         (__arm_vshllbq_x_n_s16): Likewise.
3771         (__arm_vshllbq_x_n_u8): Likewise.
3772         (__arm_vshllbq_x_n_u16): Likewise.
3773         (__arm_vshlltq_x_n_s8): Likewise.
3774         (__arm_vshlltq_x_n_s16): Likewise.
3775         (__arm_vshlltq_x_n_u8): Likewise.
3776         (__arm_vshlltq_x_n_u16): Likewise.
3777         (__arm_vshlq_x_s8): Likewise.
3778         (__arm_vshlq_x_s16): Likewise.
3779         (__arm_vshlq_x_s32): Likewise.
3780         (__arm_vshlq_x_u8): Likewise.
3781         (__arm_vshlq_x_u16): Likewise.
3782         (__arm_vshlq_x_u32): Likewise.
3783         (__arm_vshlq_x_n_s8): Likewise.
3784         (__arm_vshlq_x_n_s16): Likewise.
3785         (__arm_vshlq_x_n_s32): Likewise.
3786         (__arm_vshlq_x_n_u8): Likewise.
3787         (__arm_vshlq_x_n_u16): Likewise.
3788         (__arm_vshlq_x_n_u32): Likewise.
3789         (__arm_vrshrq_x_n_s8): Likewise.
3790         (__arm_vrshrq_x_n_s16): Likewise.
3791         (__arm_vrshrq_x_n_s32): Likewise.
3792         (__arm_vrshrq_x_n_u8): Likewise.
3793         (__arm_vrshrq_x_n_u16): Likewise.
3794         (__arm_vrshrq_x_n_u32): Likewise.
3795         (__arm_vshrq_x_n_s8): Likewise.
3796         (__arm_vshrq_x_n_s16): Likewise.
3797         (__arm_vshrq_x_n_s32): Likewise.
3798         (__arm_vshrq_x_n_u8): Likewise.
3799         (__arm_vshrq_x_n_u16): Likewise.
3800         (__arm_vshrq_x_n_u32): Likewise.
3801         (__arm_vdupq_x_n_f16): Likewise.
3802         (__arm_vdupq_x_n_f32): Likewise.
3803         (__arm_vminnmq_x_f16): Likewise.
3804         (__arm_vminnmq_x_f32): Likewise.
3805         (__arm_vmaxnmq_x_f16): Likewise.
3806         (__arm_vmaxnmq_x_f32): Likewise.
3807         (__arm_vabdq_x_f16): Likewise.
3808         (__arm_vabdq_x_f32): Likewise.
3809         (__arm_vabsq_x_f16): Likewise.
3810         (__arm_vabsq_x_f32): Likewise.
3811         (__arm_vaddq_x_f16): Likewise.
3812         (__arm_vaddq_x_f32): Likewise.
3813         (__arm_vaddq_x_n_f16): Likewise.
3814         (__arm_vaddq_x_n_f32): Likewise.
3815         (__arm_vnegq_x_f16): Likewise.
3816         (__arm_vnegq_x_f32): Likewise.
3817         (__arm_vmulq_x_f16): Likewise.
3818         (__arm_vmulq_x_f32): Likewise.
3819         (__arm_vmulq_x_n_f16): Likewise.
3820         (__arm_vmulq_x_n_f32): Likewise.
3821         (__arm_vsubq_x_f16): Likewise.
3822         (__arm_vsubq_x_f32): Likewise.
3823         (__arm_vsubq_x_n_f16): Likewise.
3824         (__arm_vsubq_x_n_f32): Likewise.
3825         (__arm_vcaddq_rot90_x_f16): Likewise.
3826         (__arm_vcaddq_rot90_x_f32): Likewise.
3827         (__arm_vcaddq_rot270_x_f16): Likewise.
3828         (__arm_vcaddq_rot270_x_f32): Likewise.
3829         (__arm_vcmulq_x_f16): Likewise.
3830         (__arm_vcmulq_x_f32): Likewise.
3831         (__arm_vcmulq_rot90_x_f16): Likewise.
3832         (__arm_vcmulq_rot90_x_f32): Likewise.
3833         (__arm_vcmulq_rot180_x_f16): Likewise.
3834         (__arm_vcmulq_rot180_x_f32): Likewise.
3835         (__arm_vcmulq_rot270_x_f16): Likewise.
3836         (__arm_vcmulq_rot270_x_f32): Likewise.
3837         (__arm_vcvtaq_x_s16_f16): Likewise.
3838         (__arm_vcvtaq_x_s32_f32): Likewise.
3839         (__arm_vcvtaq_x_u16_f16): Likewise.
3840         (__arm_vcvtaq_x_u32_f32): Likewise.
3841         (__arm_vcvtnq_x_s16_f16): Likewise.
3842         (__arm_vcvtnq_x_s32_f32): Likewise.
3843         (__arm_vcvtnq_x_u16_f16): Likewise.
3844         (__arm_vcvtnq_x_u32_f32): Likewise.
3845         (__arm_vcvtpq_x_s16_f16): Likewise.
3846         (__arm_vcvtpq_x_s32_f32): Likewise.
3847         (__arm_vcvtpq_x_u16_f16): Likewise.
3848         (__arm_vcvtpq_x_u32_f32): Likewise.
3849         (__arm_vcvtmq_x_s16_f16): Likewise.
3850         (__arm_vcvtmq_x_s32_f32): Likewise.
3851         (__arm_vcvtmq_x_u16_f16): Likewise.
3852         (__arm_vcvtmq_x_u32_f32): Likewise.
3853         (__arm_vcvtbq_x_f32_f16): Likewise.
3854         (__arm_vcvttq_x_f32_f16): Likewise.
3855         (__arm_vcvtq_x_f16_u16): Likewise.
3856         (__arm_vcvtq_x_f16_s16): Likewise.
3857         (__arm_vcvtq_x_f32_s32): Likewise.
3858         (__arm_vcvtq_x_f32_u32): Likewise.
3859         (__arm_vcvtq_x_n_f16_s16): Likewise.
3860         (__arm_vcvtq_x_n_f16_u16): Likewise.
3861         (__arm_vcvtq_x_n_f32_s32): Likewise.
3862         (__arm_vcvtq_x_n_f32_u32): Likewise.
3863         (__arm_vcvtq_x_s16_f16): Likewise.
3864         (__arm_vcvtq_x_s32_f32): Likewise.
3865         (__arm_vcvtq_x_u16_f16): Likewise.
3866         (__arm_vcvtq_x_u32_f32): Likewise.
3867         (__arm_vcvtq_x_n_s16_f16): Likewise.
3868         (__arm_vcvtq_x_n_s32_f32): Likewise.
3869         (__arm_vcvtq_x_n_u16_f16): Likewise.
3870         (__arm_vcvtq_x_n_u32_f32): Likewise.
3871         (__arm_vrndq_x_f16): Likewise.
3872         (__arm_vrndq_x_f32): Likewise.
3873         (__arm_vrndnq_x_f16): Likewise.
3874         (__arm_vrndnq_x_f32): Likewise.
3875         (__arm_vrndmq_x_f16): Likewise.
3876         (__arm_vrndmq_x_f32): Likewise.
3877         (__arm_vrndpq_x_f16): Likewise.
3878         (__arm_vrndpq_x_f32): Likewise.
3879         (__arm_vrndaq_x_f16): Likewise.
3880         (__arm_vrndaq_x_f32): Likewise.
3881         (__arm_vrndxq_x_f16): Likewise.
3882         (__arm_vrndxq_x_f32): Likewise.
3883         (__arm_vandq_x_f16): Likewise.
3884         (__arm_vandq_x_f32): Likewise.
3885         (__arm_vbicq_x_f16): Likewise.
3886         (__arm_vbicq_x_f32): Likewise.
3887         (__arm_vbrsrq_x_n_f16): Likewise.
3888         (__arm_vbrsrq_x_n_f32): Likewise.
3889         (__arm_veorq_x_f16): Likewise.
3890         (__arm_veorq_x_f32): Likewise.
3891         (__arm_vornq_x_f16): Likewise.
3892         (__arm_vornq_x_f32): Likewise.
3893         (__arm_vorrq_x_f16): Likewise.
3894         (__arm_vorrq_x_f32): Likewise.
3895         (__arm_vrev32q_x_f16): Likewise.
3896         (__arm_vrev64q_x_f16): Likewise.
3897         (__arm_vrev64q_x_f32): Likewise.
3898         (vabdq_x): Define polymorphic variant.
3899         (vabsq_x): Likewise.
3900         (vaddq_x): Likewise.
3901         (vandq_x): Likewise.
3902         (vbicq_x): Likewise.
3903         (vbrsrq_x): Likewise.
3904         (vcaddq_rot270_x): Likewise.
3905         (vcaddq_rot90_x): Likewise.
3906         (vcmulq_rot180_x): Likewise.
3907         (vcmulq_rot270_x): Likewise.
3908         (vcmulq_x): Likewise.
3909         (vcvtq_x): Likewise.
3910         (vcvtq_x_n): Likewise.
3911         (vcvtnq_m): Likewise.
3912         (veorq_x): Likewise.
3913         (vmaxnmq_x): Likewise.
3914         (vminnmq_x): Likewise.
3915         (vmulq_x): Likewise.
3916         (vnegq_x): Likewise.
3917         (vornq_x): Likewise.
3918         (vorrq_x): Likewise.
3919         (vrev32q_x): Likewise.
3920         (vrev64q_x): Likewise.
3921         (vrndaq_x): Likewise.
3922         (vrndmq_x): Likewise.
3923         (vrndnq_x): Likewise.
3924         (vrndpq_x): Likewise.
3925         (vrndq_x): Likewise.
3926         (vrndxq_x): Likewise.
3927         (vsubq_x): Likewise.
3928         (vcmulq_rot90_x): Likewise.
3929         (vadciq): Likewise.
3930         (vclsq_x): Likewise.
3931         (vclzq_x): Likewise.
3932         (vhaddq_x): Likewise.
3933         (vhcaddq_rot270_x): Likewise.
3934         (vhcaddq_rot90_x): Likewise.
3935         (vhsubq_x): Likewise.
3936         (vmaxq_x): Likewise.
3937         (vminq_x): Likewise.
3938         (vmovlbq_x): Likewise.
3939         (vmovltq_x): Likewise.
3940         (vmulhq_x): Likewise.
3941         (vmullbq_int_x): Likewise.
3942         (vmullbq_poly_x): Likewise.
3943         (vmulltq_int_x): Likewise.
3944         (vmulltq_poly_x): Likewise.
3945         (vmvnq_x): Likewise.
3946         (vrev16q_x): Likewise.
3947         (vrhaddq_x): Likewise.
3948         (vrmulhq_x): Likewise.
3949         (vrshlq_x): Likewise.
3950         (vrshrq_x): Likewise.
3951         (vshllbq_x): Likewise.
3952         (vshlltq_x): Likewise.
3953         (vshlq_x_n): Likewise.
3954         (vshlq_x): Likewise.
3955         (vdwdupq_x_u8): Likewise.
3956         (vdwdupq_x_u16): Likewise.
3957         (vdwdupq_x_u32): Likewise.
3958         (viwdupq_x_u8): Likewise.
3959         (viwdupq_x_u16): Likewise.
3960         (viwdupq_x_u32): Likewise.
3961         (vidupq_x_u8): Likewise.
3962         (vddupq_x_u8): Likewise.
3963         (vidupq_x_u16): Likewise.
3964         (vddupq_x_u16): Likewise.
3965         (vidupq_x_u32): Likewise.
3966         (vddupq_x_u32): Likewise.
3967         (vshrq_x): Likewise.
3968
3969 2020-03-20  Richard Biener  <rguenther@suse.de>
3970
3971         * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
3972         to vectorize for CTOR defs.
3973
3974 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
3975             Andre Vieira  <andre.simoesdiasvieira@arm.com>
3976             Mihail Ionescu  <mihail.ionescu@arm.com>
3977
3978         * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
3979         qualifier.
3980         (LDRGBWBU_QUALIFIERS): Likewise.
3981         (LDRGBWBS_Z_QUALIFIERS): Likewise.
3982         (LDRGBWBU_Z_QUALIFIERS): Likewise.
3983         (STRSBWBS_QUALIFIERS): Likewise.
3984         (STRSBWBU_QUALIFIERS): Likewise.
3985         (STRSBWBS_P_QUALIFIERS): Likewise.
3986         (STRSBWBU_P_QUALIFIERS): Likewise.
3987         * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
3988         (vldrdq_gather_base_wb_u64): Likewise.
3989         (vldrdq_gather_base_wb_z_s64): Likewise.
3990         (vldrdq_gather_base_wb_z_u64): Likewise.
3991         (vldrwq_gather_base_wb_f32): Likewise.
3992         (vldrwq_gather_base_wb_s32): Likewise.
3993         (vldrwq_gather_base_wb_u32): Likewise.
3994         (vldrwq_gather_base_wb_z_f32): Likewise.
3995         (vldrwq_gather_base_wb_z_s32): Likewise.
3996         (vldrwq_gather_base_wb_z_u32): Likewise.
3997         (vstrdq_scatter_base_wb_p_s64): Likewise.
3998         (vstrdq_scatter_base_wb_p_u64): Likewise.
3999         (vstrdq_scatter_base_wb_s64): Likewise.
4000         (vstrdq_scatter_base_wb_u64): Likewise.
4001         (vstrwq_scatter_base_wb_p_s32): Likewise.
4002         (vstrwq_scatter_base_wb_p_f32): Likewise.
4003         (vstrwq_scatter_base_wb_p_u32): Likewise.
4004         (vstrwq_scatter_base_wb_s32): Likewise.
4005         (vstrwq_scatter_base_wb_u32): Likewise.
4006         (vstrwq_scatter_base_wb_f32): Likewise.
4007         (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
4008         (__arm_vldrdq_gather_base_wb_u64): Likewise.
4009         (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
4010         (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
4011         (__arm_vldrwq_gather_base_wb_s32): Likewise.
4012         (__arm_vldrwq_gather_base_wb_u32): Likewise.
4013         (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
4014         (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
4015         (__arm_vstrdq_scatter_base_wb_s64): Likewise.
4016         (__arm_vstrdq_scatter_base_wb_u64): Likewise.
4017         (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
4018         (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
4019         (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
4020         (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
4021         (__arm_vstrwq_scatter_base_wb_s32): Likewise.
4022         (__arm_vstrwq_scatter_base_wb_u32): Likewise.
4023         (__arm_vldrwq_gather_base_wb_f32): Likewise.
4024         (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
4025         (__arm_vstrwq_scatter_base_wb_f32): Likewise.
4026         (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
4027         (vstrwq_scatter_base_wb): Define polymorphic variant.
4028         (vstrwq_scatter_base_wb_p): Likewise.
4029         (vstrdq_scatter_base_wb_p): Likewise.
4030         (vstrdq_scatter_base_wb): Likewise.
4031         * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
4032         qualifier.
4033         * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
4034         pattern.
4035         (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
4036         (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
4037         (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
4038         (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
4039         (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
4040         (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
4041         (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
4042         (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
4043         (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
4044         (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
4045         (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
4046         (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
4047         (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
4048         (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
4049         (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
4050         (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
4051         (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
4052         (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
4053         (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
4054         (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
4055         (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
4056         (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
4057         (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
4058         (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
4059         (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
4060         (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
4061         (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
4062         (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
4063         (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
4064
4065 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4066             Andre Vieira  <andre.simoesdiasvieira@arm.com>
4067             Mihail Ionescu  <mihail.ionescu@arm.com>
4068
4069         * config/arm/arm-builtins.c
4070         (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
4071         builtin qualifier.
4072         * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
4073         (vddupq_m_n_u32): Likewise.
4074         (vddupq_m_n_u16): Likewise.
4075         (vddupq_m_wb_u8): Likewise.
4076         (vddupq_m_wb_u16): Likewise.
4077         (vddupq_m_wb_u32): Likewise.
4078         (vddupq_n_u8): Likewise.
4079         (vddupq_n_u32): Likewise.
4080         (vddupq_n_u16): Likewise.
4081         (vddupq_wb_u8): Likewise.
4082         (vddupq_wb_u16): Likewise.
4083         (vddupq_wb_u32): Likewise.
4084         (vdwdupq_m_n_u8): Likewise.
4085         (vdwdupq_m_n_u32): Likewise.
4086         (vdwdupq_m_n_u16): Likewise.
4087         (vdwdupq_m_wb_u8): Likewise.
4088         (vdwdupq_m_wb_u32): Likewise.
4089         (vdwdupq_m_wb_u16): Likewise.
4090         (vdwdupq_n_u8): Likewise.
4091         (vdwdupq_n_u32): Likewise.
4092         (vdwdupq_n_u16): Likewise.
4093         (vdwdupq_wb_u8): Likewise.
4094         (vdwdupq_wb_u32): Likewise.
4095         (vdwdupq_wb_u16): Likewise.
4096         (vidupq_m_n_u8): Likewise.
4097         (vidupq_m_n_u32): Likewise.
4098         (vidupq_m_n_u16): Likewise.
4099         (vidupq_m_wb_u8): Likewise.
4100         (vidupq_m_wb_u16): Likewise.
4101         (vidupq_m_wb_u32): Likewise.
4102         (vidupq_n_u8): Likewise.
4103         (vidupq_n_u32): Likewise.
4104         (vidupq_n_u16): Likewise.
4105         (vidupq_wb_u8): Likewise.
4106         (vidupq_wb_u16): Likewise.
4107         (vidupq_wb_u32): Likewise.
4108         (viwdupq_m_n_u8): Likewise.
4109         (viwdupq_m_n_u32): Likewise.
4110         (viwdupq_m_n_u16): Likewise.
4111         (viwdupq_m_wb_u8): Likewise.
4112         (viwdupq_m_wb_u32): Likewise.
4113         (viwdupq_m_wb_u16): Likewise.
4114         (viwdupq_n_u8): Likewise.
4115         (viwdupq_n_u32): Likewise.
4116         (viwdupq_n_u16): Likewise.
4117         (viwdupq_wb_u8): Likewise.
4118         (viwdupq_wb_u32): Likewise.
4119         (viwdupq_wb_u16): Likewise.
4120         (__arm_vddupq_m_n_u8): Define intrinsic.
4121         (__arm_vddupq_m_n_u32): Likewise.
4122         (__arm_vddupq_m_n_u16): Likewise.
4123         (__arm_vddupq_m_wb_u8): Likewise.
4124         (__arm_vddupq_m_wb_u16): Likewise.
4125         (__arm_vddupq_m_wb_u32): Likewise.
4126         (__arm_vddupq_n_u8): Likewise.
4127         (__arm_vddupq_n_u32): Likewise.
4128         (__arm_vddupq_n_u16): Likewise.
4129         (__arm_vdwdupq_m_n_u8): Likewise.
4130         (__arm_vdwdupq_m_n_u32): Likewise.
4131         (__arm_vdwdupq_m_n_u16): Likewise.
4132         (__arm_vdwdupq_m_wb_u8): Likewise.
4133         (__arm_vdwdupq_m_wb_u32): Likewise.
4134         (__arm_vdwdupq_m_wb_u16): Likewise.
4135         (__arm_vdwdupq_n_u8): Likewise.
4136         (__arm_vdwdupq_n_u32): Likewise.
4137         (__arm_vdwdupq_n_u16): Likewise.
4138         (__arm_vdwdupq_wb_u8): Likewise.
4139         (__arm_vdwdupq_wb_u32): Likewise.
4140         (__arm_vdwdupq_wb_u16): Likewise.
4141         (__arm_vidupq_m_n_u8): Likewise.
4142         (__arm_vidupq_m_n_u32): Likewise.
4143         (__arm_vidupq_m_n_u16): Likewise.
4144         (__arm_vidupq_n_u8): Likewise.
4145         (__arm_vidupq_m_wb_u8): Likewise.
4146         (__arm_vidupq_m_wb_u16): Likewise.
4147         (__arm_vidupq_m_wb_u32): Likewise.
4148         (__arm_vidupq_n_u32): Likewise.
4149         (__arm_vidupq_n_u16): Likewise.
4150         (__arm_vidupq_wb_u8): Likewise.
4151         (__arm_vidupq_wb_u16): Likewise.
4152         (__arm_vidupq_wb_u32): Likewise.
4153         (__arm_vddupq_wb_u8): Likewise.
4154         (__arm_vddupq_wb_u16): Likewise.
4155         (__arm_vddupq_wb_u32): Likewise.
4156         (__arm_viwdupq_m_n_u8): Likewise.
4157         (__arm_viwdupq_m_n_u32): Likewise.
4158         (__arm_viwdupq_m_n_u16): Likewise.
4159         (__arm_viwdupq_m_wb_u8): Likewise.
4160         (__arm_viwdupq_m_wb_u32): Likewise.
4161         (__arm_viwdupq_m_wb_u16): Likewise.
4162         (__arm_viwdupq_n_u8): Likewise.
4163         (__arm_viwdupq_n_u32): Likewise.
4164         (__arm_viwdupq_n_u16): Likewise.
4165         (__arm_viwdupq_wb_u8): Likewise.
4166         (__arm_viwdupq_wb_u32): Likewise.
4167         (__arm_viwdupq_wb_u16): Likewise.
4168         (vidupq_m): Define polymorphic variant.
4169         (vddupq_m): Likewise.
4170         (vidupq_u16): Likewise.
4171         (vidupq_u32): Likewise.
4172         (vidupq_u8): Likewise.
4173         (vddupq_u16): Likewise.
4174         (vddupq_u32): Likewise.
4175         (vddupq_u8): Likewise.
4176         (viwdupq_m): Likewise.
4177         (viwdupq_u16): Likewise.
4178         (viwdupq_u32): Likewise.
4179         (viwdupq_u8): Likewise.
4180         (vdwdupq_m): Likewise.
4181         (vdwdupq_u16): Likewise.
4182         (vdwdupq_u32): Likewise.
4183         (vdwdupq_u8): Likewise.
4184         * config/arm/arm_mve_builtins.def
4185         (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
4186         qualifier.
4187         * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
4188         (mve_vidupq_u<mode>_insn): Likewise.
4189         (mve_vidupq_m_n_u<mode>): Likewise.
4190         (mve_vidupq_m_wb_u<mode>_insn): Likewise.
4191         (mve_vddupq_n_u<mode>): Likewise.
4192         (mve_vddupq_u<mode>_insn): Likewise.
4193         (mve_vddupq_m_n_u<mode>): Likewise.
4194         (mve_vddupq_m_wb_u<mode>_insn): Likewise.
4195         (mve_vdwdupq_n_u<mode>): Likewise.
4196         (mve_vdwdupq_wb_u<mode>): Likewise.
4197         (mve_vdwdupq_wb_u<mode>_insn): Likewise.
4198         (mve_vdwdupq_m_n_u<mode>): Likewise.
4199         (mve_vdwdupq_m_wb_u<mode>): Likewise.
4200         (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
4201         (mve_viwdupq_n_u<mode>): Likewise.
4202         (mve_viwdupq_wb_u<mode>): Likewise.
4203         (mve_viwdupq_wb_u<mode>_insn): Likewise.
4204         (mve_viwdupq_m_n_u<mode>): Likewise.
4205         (mve_viwdupq_m_wb_u<mode>): Likewise.
4206         (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
4207
4208 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4209
4210         * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
4211         (vreinterpretq_s16_s64): Likewise.
4212         (vreinterpretq_s16_s8): Likewise.
4213         (vreinterpretq_s16_u16): Likewise.
4214         (vreinterpretq_s16_u32): Likewise.
4215         (vreinterpretq_s16_u64): Likewise.
4216         (vreinterpretq_s16_u8): Likewise.
4217         (vreinterpretq_s32_s16): Likewise.
4218         (vreinterpretq_s32_s64): Likewise.
4219         (vreinterpretq_s32_s8): Likewise.
4220         (vreinterpretq_s32_u16): Likewise.
4221         (vreinterpretq_s32_u32): Likewise.
4222         (vreinterpretq_s32_u64): Likewise.
4223         (vreinterpretq_s32_u8): Likewise.
4224         (vreinterpretq_s64_s16): Likewise.
4225         (vreinterpretq_s64_s32): Likewise.
4226         (vreinterpretq_s64_s8): Likewise.
4227         (vreinterpretq_s64_u16): Likewise.
4228         (vreinterpretq_s64_u32): Likewise.
4229         (vreinterpretq_s64_u64): Likewise.
4230         (vreinterpretq_s64_u8): Likewise.
4231         (vreinterpretq_s8_s16): Likewise.
4232         (vreinterpretq_s8_s32): Likewise.
4233         (vreinterpretq_s8_s64): Likewise.
4234         (vreinterpretq_s8_u16): Likewise.
4235         (vreinterpretq_s8_u32): Likewise.
4236         (vreinterpretq_s8_u64): Likewise.
4237         (vreinterpretq_s8_u8): Likewise.
4238         (vreinterpretq_u16_s16): Likewise.
4239         (vreinterpretq_u16_s32): Likewise.
4240         (vreinterpretq_u16_s64): Likewise.
4241         (vreinterpretq_u16_s8): Likewise.
4242         (vreinterpretq_u16_u32): Likewise.
4243         (vreinterpretq_u16_u64): Likewise.
4244         (vreinterpretq_u16_u8): Likewise.
4245         (vreinterpretq_u32_s16): Likewise.
4246         (vreinterpretq_u32_s32): Likewise.
4247         (vreinterpretq_u32_s64): Likewise.
4248         (vreinterpretq_u32_s8): Likewise.
4249         (vreinterpretq_u32_u16): Likewise.
4250         (vreinterpretq_u32_u64): Likewise.
4251         (vreinterpretq_u32_u8): Likewise.
4252         (vreinterpretq_u64_s16): Likewise.
4253         (vreinterpretq_u64_s32): Likewise.
4254         (vreinterpretq_u64_s64): Likewise.
4255         (vreinterpretq_u64_s8): Likewise.
4256         (vreinterpretq_u64_u16): Likewise.
4257         (vreinterpretq_u64_u32): Likewise.
4258         (vreinterpretq_u64_u8): Likewise.
4259         (vreinterpretq_u8_s16): Likewise.
4260         (vreinterpretq_u8_s32): Likewise.
4261         (vreinterpretq_u8_s64): Likewise.
4262         (vreinterpretq_u8_s8): Likewise.
4263         (vreinterpretq_u8_u16): Likewise.
4264         (vreinterpretq_u8_u32): Likewise.
4265         (vreinterpretq_u8_u64): Likewise.
4266         (vreinterpretq_s32_f16): Likewise.
4267         (vreinterpretq_s32_f32): Likewise.
4268         (vreinterpretq_u16_f16): Likewise.
4269         (vreinterpretq_u16_f32): Likewise.
4270         (vreinterpretq_u32_f16): Likewise.
4271         (vreinterpretq_u32_f32): Likewise.
4272         (vreinterpretq_u64_f16): Likewise.
4273         (vreinterpretq_u64_f32): Likewise.
4274         (vreinterpretq_u8_f16): Likewise.
4275         (vreinterpretq_u8_f32): Likewise.
4276         (vreinterpretq_f16_f32): Likewise.
4277         (vreinterpretq_f16_s16): Likewise.
4278         (vreinterpretq_f16_s32): Likewise.
4279         (vreinterpretq_f16_s64): Likewise.
4280         (vreinterpretq_f16_s8): Likewise.
4281         (vreinterpretq_f16_u16): Likewise.
4282         (vreinterpretq_f16_u32): Likewise.
4283         (vreinterpretq_f16_u64): Likewise.
4284         (vreinterpretq_f16_u8): Likewise.
4285         (vreinterpretq_f32_f16): Likewise.
4286         (vreinterpretq_f32_s16): Likewise.
4287         (vreinterpretq_f32_s32): Likewise.
4288         (vreinterpretq_f32_s64): Likewise.
4289         (vreinterpretq_f32_s8): Likewise.
4290         (vreinterpretq_f32_u16): Likewise.
4291         (vreinterpretq_f32_u32): Likewise.
4292         (vreinterpretq_f32_u64): Likewise.
4293         (vreinterpretq_f32_u8): Likewise.
4294         (vreinterpretq_s16_f16): Likewise.
4295         (vreinterpretq_s16_f32): Likewise.
4296         (vreinterpretq_s64_f16): Likewise.
4297         (vreinterpretq_s64_f32): Likewise.
4298         (vreinterpretq_s8_f16): Likewise.
4299         (vreinterpretq_s8_f32): Likewise.
4300         (vuninitializedq_u8): Likewise.
4301         (vuninitializedq_u16): Likewise.
4302         (vuninitializedq_u32): Likewise.
4303         (vuninitializedq_u64): Likewise.
4304         (vuninitializedq_s8): Likewise.
4305         (vuninitializedq_s16): Likewise.
4306         (vuninitializedq_s32): Likewise.
4307         (vuninitializedq_s64): Likewise.
4308         (vuninitializedq_f16): Likewise.
4309         (vuninitializedq_f32): Likewise.
4310         (__arm_vuninitializedq_u8): Define intrinsic.
4311         (__arm_vuninitializedq_u16): Likewise.
4312         (__arm_vuninitializedq_u32): Likewise.
4313         (__arm_vuninitializedq_u64): Likewise.
4314         (__arm_vuninitializedq_s8): Likewise.
4315         (__arm_vuninitializedq_s16): Likewise.
4316         (__arm_vuninitializedq_s32): Likewise.
4317         (__arm_vuninitializedq_s64): Likewise.
4318         (__arm_vreinterpretq_s16_s32): Likewise.
4319         (__arm_vreinterpretq_s16_s64): Likewise.
4320         (__arm_vreinterpretq_s16_s8): Likewise.
4321         (__arm_vreinterpretq_s16_u16): Likewise.
4322         (__arm_vreinterpretq_s16_u32): Likewise.
4323         (__arm_vreinterpretq_s16_u64): Likewise.
4324         (__arm_vreinterpretq_s16_u8): Likewise.
4325         (__arm_vreinterpretq_s32_s16): Likewise.
4326         (__arm_vreinterpretq_s32_s64): Likewise.
4327         (__arm_vreinterpretq_s32_s8): Likewise.
4328         (__arm_vreinterpretq_s32_u16): Likewise.
4329         (__arm_vreinterpretq_s32_u32): Likewise.
4330         (__arm_vreinterpretq_s32_u64): Likewise.
4331         (__arm_vreinterpretq_s32_u8): Likewise.
4332         (__arm_vreinterpretq_s64_s16): Likewise.
4333         (__arm_vreinterpretq_s64_s32): Likewise.
4334         (__arm_vreinterpretq_s64_s8): Likewise.
4335         (__arm_vreinterpretq_s64_u16): Likewise.
4336         (__arm_vreinterpretq_s64_u32): Likewise.
4337         (__arm_vreinterpretq_s64_u64): Likewise.
4338         (__arm_vreinterpretq_s64_u8): Likewise.
4339         (__arm_vreinterpretq_s8_s16): Likewise.
4340         (__arm_vreinterpretq_s8_s32): Likewise.
4341         (__arm_vreinterpretq_s8_s64): Likewise.
4342         (__arm_vreinterpretq_s8_u16): Likewise.
4343         (__arm_vreinterpretq_s8_u32): Likewise.
4344         (__arm_vreinterpretq_s8_u64): Likewise.
4345         (__arm_vreinterpretq_s8_u8): Likewise.
4346         (__arm_vreinterpretq_u16_s16): Likewise.
4347         (__arm_vreinterpretq_u16_s32): Likewise.
4348         (__arm_vreinterpretq_u16_s64): Likewise.
4349         (__arm_vreinterpretq_u16_s8): Likewise.
4350         (__arm_vreinterpretq_u16_u32): Likewise.
4351         (__arm_vreinterpretq_u16_u64): Likewise.
4352         (__arm_vreinterpretq_u16_u8): Likewise.
4353         (__arm_vreinterpretq_u32_s16): Likewise.
4354         (__arm_vreinterpretq_u32_s32): Likewise.
4355         (__arm_vreinterpretq_u32_s64): Likewise.
4356         (__arm_vreinterpretq_u32_s8): Likewise.
4357         (__arm_vreinterpretq_u32_u16): Likewise.
4358         (__arm_vreinterpretq_u32_u64): Likewise.
4359         (__arm_vreinterpretq_u32_u8): Likewise.
4360         (__arm_vreinterpretq_u64_s16): Likewise.
4361         (__arm_vreinterpretq_u64_s32): Likewise.
4362         (__arm_vreinterpretq_u64_s64): Likewise.
4363         (__arm_vreinterpretq_u64_s8): Likewise.
4364         (__arm_vreinterpretq_u64_u16): Likewise.
4365         (__arm_vreinterpretq_u64_u32): Likewise.
4366         (__arm_vreinterpretq_u64_u8): Likewise.
4367         (__arm_vreinterpretq_u8_s16): Likewise.
4368         (__arm_vreinterpretq_u8_s32): Likewise.
4369         (__arm_vreinterpretq_u8_s64): Likewise.
4370         (__arm_vreinterpretq_u8_s8): Likewise.
4371         (__arm_vreinterpretq_u8_u16): Likewise.
4372         (__arm_vreinterpretq_u8_u32): Likewise.
4373         (__arm_vreinterpretq_u8_u64): Likewise.
4374         (__arm_vuninitializedq_f16): Likewise.
4375         (__arm_vuninitializedq_f32): Likewise.
4376         (__arm_vreinterpretq_s32_f16): Likewise.
4377         (__arm_vreinterpretq_s32_f32): Likewise.
4378         (__arm_vreinterpretq_s16_f16): Likewise.
4379         (__arm_vreinterpretq_s16_f32): Likewise.
4380         (__arm_vreinterpretq_s64_f16): Likewise.
4381         (__arm_vreinterpretq_s64_f32): Likewise.
4382         (__arm_vreinterpretq_s8_f16): Likewise.
4383         (__arm_vreinterpretq_s8_f32): Likewise.
4384         (__arm_vreinterpretq_u16_f16): Likewise.
4385         (__arm_vreinterpretq_u16_f32): Likewise.
4386         (__arm_vreinterpretq_u32_f16): Likewise.
4387         (__arm_vreinterpretq_u32_f32): Likewise.
4388         (__arm_vreinterpretq_u64_f16): Likewise.
4389         (__arm_vreinterpretq_u64_f32): Likewise.
4390         (__arm_vreinterpretq_u8_f16): Likewise.
4391         (__arm_vreinterpretq_u8_f32): Likewise.
4392         (__arm_vreinterpretq_f16_f32): Likewise.
4393         (__arm_vreinterpretq_f16_s16): Likewise.
4394         (__arm_vreinterpretq_f16_s32): Likewise.
4395         (__arm_vreinterpretq_f16_s64): Likewise.
4396         (__arm_vreinterpretq_f16_s8): Likewise.
4397         (__arm_vreinterpretq_f16_u16): Likewise.
4398         (__arm_vreinterpretq_f16_u32): Likewise.
4399         (__arm_vreinterpretq_f16_u64): Likewise.
4400         (__arm_vreinterpretq_f16_u8): Likewise.
4401         (__arm_vreinterpretq_f32_f16): Likewise.
4402         (__arm_vreinterpretq_f32_s16): Likewise.
4403         (__arm_vreinterpretq_f32_s32): Likewise.
4404         (__arm_vreinterpretq_f32_s64): Likewise.
4405         (__arm_vreinterpretq_f32_s8): Likewise.
4406         (__arm_vreinterpretq_f32_u16): Likewise.
4407         (__arm_vreinterpretq_f32_u32): Likewise.
4408         (__arm_vreinterpretq_f32_u64): Likewise.
4409         (__arm_vreinterpretq_f32_u8): Likewise.
4410         (vuninitializedq): Define polymorphic variant.
4411         (vreinterpretq_f16): Likewise.
4412         (vreinterpretq_f32): Likewise.
4413         (vreinterpretq_s16): Likewise.
4414         (vreinterpretq_s32): Likewise.
4415         (vreinterpretq_s64): Likewise.
4416         (vreinterpretq_s8): Likewise.
4417         (vreinterpretq_u16): Likewise.
4418         (vreinterpretq_u32): Likewise.
4419         (vreinterpretq_u64): Likewise.
4420         (vreinterpretq_u8): Likewise.
4421
4422 2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4423             Andre Vieira  <andre.simoesdiasvieira@arm.com>
4424             Mihail Ionescu  <mihail.ionescu@arm.com>
4425
4426         * config/arm/arm_mve.h (vaddq_s8): Define macro.
4427         (vaddq_s16): Likewise.
4428         (vaddq_s32): Likewise.
4429         (vaddq_u8): Likewise.
4430         (vaddq_u16): Likewise.
4431         (vaddq_u32): Likewise.
4432         (vaddq_f16): Likewise.
4433         (vaddq_f32): Likewise.
4434         (__arm_vaddq_s8): Define intrinsic.
4435         (__arm_vaddq_s16): Likewise.
4436         (__arm_vaddq_s32): Likewise.
4437         (__arm_vaddq_u8): Likewise.
4438         (__arm_vaddq_u16): Likewise.
4439         (__arm_vaddq_u32): Likewise.
4440         (__arm_vaddq_f16): Likewise.
4441         (__arm_vaddq_f32): Likewise.
4442         (vaddq): Define polymorphic variant.
4443         * config/arm/iterators.md (VNIM): Define mode iterator for common types
4444         Neon, IWMMXT and MVE.
4445         (VNINOTM): Likewise.
4446         * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
4447         (mve_vaddq_f<mode>): Define RTL pattern.
4448         * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
4449         (addv8hf3_neon): Define RTL pattern.
4450         * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
4451         to support MVE.
4452         (addv8hf3): Define standard RTL pattern for MVE and Neon.
4453         (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
4454
4455 2020-03-20  Martin Liska  <mliska@suse.cz>
4456
4457         PR ipa/94232
4458         * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
4459         build_ref_for_offset function was used and it transforms off to bytes
4460         from bits.
4461
4462 2020-03-20  Richard Biener  <rguenther@suse.de>
4463
4464         PR tree-optimization/94266
4465         * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
4466         type of the underlying object to adjust for the containing
4467         field if available.
4468
4469 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4470
4471         * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
4472         (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
4473         * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
4474
4475 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4476
4477         * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
4478
4479 2020-03-20  Jakub Jelinek  <jakub@redhat.com>
4480
4481         PR tree-optimization/94224
4482         * gimple-ssa-store-merging.c
4483         (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
4484         or adjacent INTEGER_CST rhs_code stores as mergeable if they have
4485         different lp_nr.
4486
4487 2020-03-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4488
4489         * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
4490
4491 2020-03-19  Jan Hubicka  <hubicka@ucw.cz>
4492
4493         PR ipa/94202
4494         * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
4495         (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
4496
4497 2020-03-19  Jan Hubicka  <hubicka@ucw.cz>
4498
4499         PR ipa/92372
4500         * cgraphunit.c (process_function_and_variable_attributes): warn
4501         for flatten attribute on alias.
4502         * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
4503
4504 2020-03-19  Martin Liska  <mliska@suse.cz>
4505
4506         * lto-section-in.c: Add ext_symtab.
4507         * lto-streamer-out.c (write_symbol_extension_info): New.
4508         (produce_symtab_extension): New.
4509         (produce_asm_for_decls): Stream also produce_symtab_extension.
4510         * lto-streamer.h (enum lto_section_type): New section.
4511
4512 2020-03-19  Jakub Jelinek  <jakub@redhat.com>
4513
4514         PR tree-optimization/94211
4515         * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
4516         instead of estimate_num_insns for bb_seq (middle_bb).  Rename
4517         emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
4518         all uses.
4519
4520 2020-03-19  Richard Biener  <rguenther@suse.de>
4521
4522         PR ipa/94217
4523         * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
4524         and build_ref_for_offset.
4525
4526 2020-03-19  Richard Biener  <rguenther@suse.de>
4527
4528         PR middle-end/94216
4529         * fold-const.c (fold_binary_loc): Avoid using
4530         build_fold_addr_expr when we really want an ADDR_EXPR.
4531
4532 2020-03-18  Segher Boessenkool  <segher@kernel.crashing.org>
4533
4534         * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
4535         aliases for "wa".
4536
4537 2020-03-12  Richard Sandiford  <richard.sandiford@arm.com>
4538
4539         PR rtl-optimization/90275
4540         * cse.c (cse_insn): Delete no-op register moves too.
4541
4542 2020-03-18  Martin Sebor  <msebor@redhat.com>
4543
4544         PR ipa/92799
4545         * cgraphunit.c (process_function_and_variable_attributes): Also
4546         complain about weakref function definitions and drop all effects
4547         of the attribute.
4548
4549 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4550             Mihail Ionescu  <mihail.ionescu@arm.com>
4551             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4552
4553         * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
4554         (vstrdq_scatter_base_p_u64): Likewise.
4555         (vstrdq_scatter_base_s64): Likewise.
4556         (vstrdq_scatter_base_u64): Likewise.
4557         (vstrdq_scatter_offset_p_s64): Likewise.
4558         (vstrdq_scatter_offset_p_u64): Likewise.
4559         (vstrdq_scatter_offset_s64): Likewise.
4560         (vstrdq_scatter_offset_u64): Likewise.
4561         (vstrdq_scatter_shifted_offset_p_s64): Likewise.
4562         (vstrdq_scatter_shifted_offset_p_u64): Likewise.
4563         (vstrdq_scatter_shifted_offset_s64): Likewise.
4564         (vstrdq_scatter_shifted_offset_u64): Likewise.
4565         (vstrhq_scatter_offset_f16): Likewise.
4566         (vstrhq_scatter_offset_p_f16): Likewise.
4567         (vstrhq_scatter_shifted_offset_f16): Likewise.
4568         (vstrhq_scatter_shifted_offset_p_f16): Likewise.
4569         (vstrwq_scatter_base_f32): Likewise.
4570         (vstrwq_scatter_base_p_f32): Likewise.
4571         (vstrwq_scatter_offset_f32): Likewise.
4572         (vstrwq_scatter_offset_p_f32): Likewise.
4573         (vstrwq_scatter_offset_p_s32): Likewise.
4574         (vstrwq_scatter_offset_p_u32): Likewise.
4575         (vstrwq_scatter_offset_s32): Likewise.
4576         (vstrwq_scatter_offset_u32): Likewise.
4577         (vstrwq_scatter_shifted_offset_f32): Likewise.
4578         (vstrwq_scatter_shifted_offset_p_f32): Likewise.
4579         (vstrwq_scatter_shifted_offset_p_s32): Likewise.
4580         (vstrwq_scatter_shifted_offset_p_u32): Likewise.
4581         (vstrwq_scatter_shifted_offset_s32): Likewise.
4582         (vstrwq_scatter_shifted_offset_u32): Likewise.
4583         (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
4584         (__arm_vstrdq_scatter_base_p_u64): Likewise.
4585         (__arm_vstrdq_scatter_base_s64): Likewise.
4586         (__arm_vstrdq_scatter_base_u64): Likewise.
4587         (__arm_vstrdq_scatter_offset_p_s64): Likewise.
4588         (__arm_vstrdq_scatter_offset_p_u64): Likewise.
4589         (__arm_vstrdq_scatter_offset_s64): Likewise.
4590         (__arm_vstrdq_scatter_offset_u64): Likewise.
4591         (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
4592         (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
4593         (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
4594         (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
4595         (__arm_vstrwq_scatter_offset_p_s32): Likewise.
4596         (__arm_vstrwq_scatter_offset_p_u32): Likewise.
4597         (__arm_vstrwq_scatter_offset_s32): Likewise.
4598         (__arm_vstrwq_scatter_offset_u32): Likewise.
4599         (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
4600         (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
4601         (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
4602         (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
4603         (__arm_vstrhq_scatter_offset_f16): Likewise.
4604         (__arm_vstrhq_scatter_offset_p_f16): Likewise.
4605         (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
4606         (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
4607         (__arm_vstrwq_scatter_base_f32): Likewise.
4608         (__arm_vstrwq_scatter_base_p_f32): Likewise.
4609         (__arm_vstrwq_scatter_offset_f32): Likewise.
4610         (__arm_vstrwq_scatter_offset_p_f32): Likewise.
4611         (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
4612         (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
4613         (vstrhq_scatter_offset): Define polymorphic variant.
4614         (vstrhq_scatter_offset_p): Likewise.
4615         (vstrhq_scatter_shifted_offset): Likewise.
4616         (vstrhq_scatter_shifted_offset_p): Likewise.
4617         (vstrwq_scatter_base): Likewise.
4618         (vstrwq_scatter_base_p): Likewise.
4619         (vstrwq_scatter_offset): Likewise.
4620         (vstrwq_scatter_offset_p): Likewise.
4621         (vstrwq_scatter_shifted_offset): Likewise.
4622         (vstrwq_scatter_shifted_offset_p): Likewise.
4623         (vstrdq_scatter_base_p): Likewise.
4624         (vstrdq_scatter_base): Likewise.
4625         (vstrdq_scatter_offset_p): Likewise.
4626         (vstrdq_scatter_offset): Likewise.
4627         (vstrdq_scatter_shifted_offset_p): Likewise.
4628         (vstrdq_scatter_shifted_offset): Likewise.
4629         * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
4630         (STRSBS_P): Likewise.
4631         (STRSBU): Likewise.
4632         (STRSBU_P): Likewise.
4633         (STRSS): Likewise.
4634         (STRSS_P): Likewise.
4635         (STRSU): Likewise.
4636         (STRSU_P): Likewise.
4637         * config/arm/constraints.md (Ri): Define.
4638         * config/arm/mve.md (VSTRDSBQ): Define iterator.
4639         (VSTRDSOQ): Likewise.
4640         (VSTRDSSOQ): Likewise.
4641         (VSTRWSOQ): Likewise.
4642         (VSTRWSSOQ): Likewise.
4643         (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
4644         (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
4645         (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
4646         (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
4647         (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
4648         (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
4649         (mve_vstrhq_scatter_offset_fv8hf): Likewise.
4650         (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
4651         (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
4652         (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
4653         (mve_vstrwq_scatter_base_fv4sf): Likewise.
4654         (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
4655         (mve_vstrwq_scatter_offset_fv4sf): Likewise.
4656         (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
4657         (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
4658         (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
4659         (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
4660         (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
4661         (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
4662         (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
4663         * config/arm/predicates.md (Ri): Define predicate to check immediate
4664         is the range +/-1016 and multiple of 8.
4665
4666 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4667             Mihail Ionescu  <mihail.ionescu@arm.com>
4668             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4669
4670         * config/arm/arm_mve.h (vst1q_f32): Define macro.
4671         (vst1q_f16): Likewise.
4672         (vst1q_s8): Likewise.
4673         (vst1q_s32): Likewise.
4674         (vst1q_s16): Likewise.
4675         (vst1q_u8): Likewise.
4676         (vst1q_u32): Likewise.
4677         (vst1q_u16): Likewise.
4678         (vstrhq_f16): Likewise.
4679         (vstrhq_scatter_offset_s32): Likewise.
4680         (vstrhq_scatter_offset_s16): Likewise.
4681         (vstrhq_scatter_offset_u32): Likewise.
4682         (vstrhq_scatter_offset_u16): Likewise.
4683         (vstrhq_scatter_offset_p_s32): Likewise.
4684         (vstrhq_scatter_offset_p_s16): Likewise.
4685         (vstrhq_scatter_offset_p_u32): Likewise.
4686         (vstrhq_scatter_offset_p_u16): Likewise.
4687         (vstrhq_scatter_shifted_offset_s32): Likewise.
4688         (vstrhq_scatter_shifted_offset_s16): Likewise.
4689         (vstrhq_scatter_shifted_offset_u32): Likewise.
4690         (vstrhq_scatter_shifted_offset_u16): Likewise.
4691         (vstrhq_scatter_shifted_offset_p_s32): Likewise.
4692         (vstrhq_scatter_shifted_offset_p_s16): Likewise.
4693         (vstrhq_scatter_shifted_offset_p_u32): Likewise.
4694         (vstrhq_scatter_shifted_offset_p_u16): Likewise.
4695         (vstrhq_s32): Likewise.
4696         (vstrhq_s16): Likewise.
4697         (vstrhq_u32): Likewise.
4698         (vstrhq_u16): Likewise.
4699         (vstrhq_p_f16): Likewise.
4700         (vstrhq_p_s32): Likewise.
4701         (vstrhq_p_s16): Likewise.
4702         (vstrhq_p_u32): Likewise.
4703         (vstrhq_p_u16): Likewise.
4704         (vstrwq_f32): Likewise.
4705         (vstrwq_s32): Likewise.
4706         (vstrwq_u32): Likewise.
4707         (vstrwq_p_f32): Likewise.
4708         (vstrwq_p_s32): Likewise.
4709         (vstrwq_p_u32): Likewise.
4710         (__arm_vst1q_s8): Define intrinsic.
4711         (__arm_vst1q_s32): Likewise.
4712         (__arm_vst1q_s16): Likewise.
4713         (__arm_vst1q_u8): Likewise.
4714         (__arm_vst1q_u32): Likewise.
4715         (__arm_vst1q_u16): Likewise.
4716         (__arm_vstrhq_scatter_offset_s32): Likewise.
4717         (__arm_vstrhq_scatter_offset_s16): Likewise.
4718         (__arm_vstrhq_scatter_offset_u32): Likewise.
4719         (__arm_vstrhq_scatter_offset_u16): Likewise.
4720         (__arm_vstrhq_scatter_offset_p_s32): Likewise.
4721         (__arm_vstrhq_scatter_offset_p_s16): Likewise.
4722         (__arm_vstrhq_scatter_offset_p_u32): Likewise.
4723         (__arm_vstrhq_scatter_offset_p_u16): Likewise.
4724         (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
4725         (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
4726         (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
4727         (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
4728         (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
4729         (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
4730         (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
4731         (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
4732         (__arm_vstrhq_s32): Likewise.
4733         (__arm_vstrhq_s16): Likewise.
4734         (__arm_vstrhq_u32): Likewise.
4735         (__arm_vstrhq_u16): Likewise.
4736         (__arm_vstrhq_p_s32): Likewise.
4737         (__arm_vstrhq_p_s16): Likewise.
4738         (__arm_vstrhq_p_u32): Likewise.
4739         (__arm_vstrhq_p_u16): Likewise.
4740         (__arm_vstrwq_s32): Likewise.
4741         (__arm_vstrwq_u32): Likewise.
4742         (__arm_vstrwq_p_s32): Likewise.
4743         (__arm_vstrwq_p_u32): Likewise.
4744         (__arm_vstrwq_p_f32): Likewise.
4745         (__arm_vstrwq_f32): Likewise.
4746         (__arm_vst1q_f32): Likewise.
4747         (__arm_vst1q_f16): Likewise.
4748         (__arm_vstrhq_f16): Likewise.
4749         (__arm_vstrhq_p_f16): Likewise.
4750         (vst1q): Define polymorphic variant.
4751         (vstrhq): Likewise.
4752         (vstrhq_p): Likewise.
4753         (vstrhq_scatter_offset_p): Likewise.
4754         (vstrhq_scatter_offset): Likewise.
4755         (vstrhq_scatter_shifted_offset_p): Likewise.
4756         (vstrhq_scatter_shifted_offset): Likewise.
4757         (vstrwq_p): Likewise.
4758         (vstrwq): Likewise.
4759         * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
4760         (STRS_P): Likewise.
4761         (STRSS): Likewise.
4762         (STRSS_P): Likewise.
4763         (STRSU): Likewise.
4764         (STRSU_P): Likewise.
4765         (STRU): Likewise.
4766         (STRU_P): Likewise.
4767         * config/arm/mve.md (VST1Q): Define iterator.
4768         (VSTRHSOQ): Likewise.
4769         (VSTRHSSOQ): Likewise.
4770         (VSTRHQ): Likewise.
4771         (VSTRWQ): Likewise.
4772         (mve_vstrhq_fv8hf): Define RTL pattern.
4773         (mve_vstrhq_p_fv8hf): Likewise.
4774         (mve_vstrhq_p_<supf><mode>): Likewise.
4775         (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
4776         (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
4777         (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
4778         (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
4779         (mve_vstrhq_<supf><mode>): Likewise.
4780         (mve_vstrwq_fv4sf): Likewise.
4781         (mve_vstrwq_p_fv4sf): Likewise.
4782         (mve_vstrwq_p_<supf>v4si): Likewise.
4783         (mve_vstrwq_<supf>v4si): Likewise.
4784         (mve_vst1q_f<mode>): Define expand.
4785         (mve_vst1q_<supf><mode>): Likewise.
4786
4787 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4788             Mihail Ionescu  <mihail.ionescu@arm.com>
4789             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4790
4791         * config/arm/arm_mve.h (vld1q_s8): Define macro.
4792         (vld1q_s32): Likewise.
4793         (vld1q_s16): Likewise.
4794         (vld1q_u8): Likewise.
4795         (vld1q_u32): Likewise.
4796         (vld1q_u16): Likewise.
4797         (vldrhq_gather_offset_s32): Likewise.
4798         (vldrhq_gather_offset_s16): Likewise.
4799         (vldrhq_gather_offset_u32): Likewise.
4800         (vldrhq_gather_offset_u16): Likewise.
4801         (vldrhq_gather_offset_z_s32): Likewise.
4802         (vldrhq_gather_offset_z_s16): Likewise.
4803         (vldrhq_gather_offset_z_u32): Likewise.
4804         (vldrhq_gather_offset_z_u16): Likewise.
4805         (vldrhq_gather_shifted_offset_s32): Likewise.
4806         (vldrhq_gather_shifted_offset_s16): Likewise.
4807         (vldrhq_gather_shifted_offset_u32): Likewise.
4808         (vldrhq_gather_shifted_offset_u16): Likewise.
4809         (vldrhq_gather_shifted_offset_z_s32): Likewise.
4810         (vldrhq_gather_shifted_offset_z_s16): Likewise.
4811         (vldrhq_gather_shifted_offset_z_u32): Likewise.
4812         (vldrhq_gather_shifted_offset_z_u16): Likewise.
4813         (vldrhq_s32): Likewise.
4814         (vldrhq_s16): Likewise.
4815         (vldrhq_u32): Likewise.
4816         (vldrhq_u16): Likewise.
4817         (vldrhq_z_s32): Likewise.
4818         (vldrhq_z_s16): Likewise.
4819         (vldrhq_z_u32): Likewise.
4820         (vldrhq_z_u16): Likewise.
4821         (vldrwq_s32): Likewise.
4822         (vldrwq_u32): Likewise.
4823         (vldrwq_z_s32): Likewise.
4824         (vldrwq_z_u32): Likewise.
4825         (vld1q_f32): Likewise.
4826         (vld1q_f16): Likewise.
4827         (vldrhq_f16): Likewise.
4828         (vldrhq_z_f16): Likewise.
4829         (vldrwq_f32): Likewise.
4830         (vldrwq_z_f32): Likewise.
4831         (__arm_vld1q_s8): Define intrinsic.
4832         (__arm_vld1q_s32): Likewise.
4833         (__arm_vld1q_s16): Likewise.
4834         (__arm_vld1q_u8): Likewise.
4835         (__arm_vld1q_u32): Likewise.
4836         (__arm_vld1q_u16): Likewise.
4837         (__arm_vldrhq_gather_offset_s32): Likewise.
4838         (__arm_vldrhq_gather_offset_s16): Likewise.
4839         (__arm_vldrhq_gather_offset_u32): Likewise.
4840         (__arm_vldrhq_gather_offset_u16): Likewise.
4841         (__arm_vldrhq_gather_offset_z_s32): Likewise.
4842         (__arm_vldrhq_gather_offset_z_s16): Likewise.
4843         (__arm_vldrhq_gather_offset_z_u32): Likewise.
4844         (__arm_vldrhq_gather_offset_z_u16): Likewise.
4845         (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
4846         (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
4847         (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
4848         (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
4849         (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
4850         (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
4851         (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
4852         (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
4853         (__arm_vldrhq_s32): Likewise.
4854         (__arm_vldrhq_s16): Likewise.
4855         (__arm_vldrhq_u32): Likewise.
4856         (__arm_vldrhq_u16): Likewise.
4857         (__arm_vldrhq_z_s32): Likewise.
4858         (__arm_vldrhq_z_s16): Likewise.
4859         (__arm_vldrhq_z_u32): Likewise.
4860         (__arm_vldrhq_z_u16): Likewise.
4861         (__arm_vldrwq_s32): Likewise.
4862         (__arm_vldrwq_u32): Likewise.
4863         (__arm_vldrwq_z_s32): Likewise.
4864         (__arm_vldrwq_z_u32): Likewise.
4865         (__arm_vld1q_f32): Likewise.
4866         (__arm_vld1q_f16): Likewise.
4867         (__arm_vldrwq_f32): Likewise.
4868         (__arm_vldrwq_z_f32): Likewise.
4869         (__arm_vldrhq_z_f16): Likewise.
4870         (__arm_vldrhq_f16): Likewise.
4871         (vld1q): Define polymorphic variant.
4872         (vldrhq_gather_offset): Likewise.
4873         (vldrhq_gather_offset_z): Likewise.
4874         (vldrhq_gather_shifted_offset): Likewise.
4875         (vldrhq_gather_shifted_offset_z): Likewise.
4876         * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
4877         (LDRS): Likewise.
4878         (LDRU_Z): Likewise.
4879         (LDRS_Z): Likewise.
4880         (LDRGU_Z): Likewise.
4881         (LDRGU): Likewise.
4882         (LDRGS_Z): Likewise.
4883         (LDRGS): Likewise.
4884         * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
4885         (V_sz_elem1): Likewise.
4886         (VLD1Q): Define iterator.
4887         (VLDRHGOQ): Likewise.
4888         (VLDRHGSOQ): Likewise.
4889         (VLDRHQ): Likewise.
4890         (VLDRWQ): Likewise.
4891         (mve_vldrhq_fv8hf): Define RTL pattern.
4892         (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
4893         (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
4894         (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
4895         (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
4896         (mve_vldrhq_<supf><mode>): Likewise.
4897         (mve_vldrhq_z_fv8hf): Likewise.
4898         (mve_vldrhq_z_<supf><mode>): Likewise.
4899         (mve_vldrwq_fv4sf): Likewise.
4900         (mve_vldrwq_<supf>v4si): Likewise.
4901         (mve_vldrwq_z_fv4sf): Likewise.
4902         (mve_vldrwq_z_<supf>v4si): Likewise.
4903         (mve_vld1q_f<mode>): Define RTL expand pattern.
4904         (mve_vld1q_<supf><mode>): Likewise.
4905
4906 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
4907             Mihail Ionescu  <mihail.ionescu@arm.com>
4908             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
4909
4910         * config/arm/arm_mve.h (vld1q_s8): Define macro.
4911         (vld1q_s32): Likewise.
4912         (vld1q_s16): Likewise.
4913         (vld1q_u8): Likewise.
4914         (vld1q_u32): Likewise.
4915         (vld1q_u16): Likewise.
4916         (vldrhq_gather_offset_s32): Likewise.
4917         (vldrhq_gather_offset_s16): Likewise.
4918         (vldrhq_gather_offset_u32): Likewise.
4919         (vldrhq_gather_offset_u16): Likewise.
4920         (vldrhq_gather_offset_z_s32): Likewise.
4921         (vldrhq_gather_offset_z_s16): Likewise.
4922         (vldrhq_gather_offset_z_u32): Likewise.
4923         (vldrhq_gather_offset_z_u16): Likewise.
4924         (vldrhq_gather_shifted_offset_s32): Likewise.
4925         (vldrhq_gather_shifted_offset_s16): Likewise.
4926         (vldrhq_gather_shifted_offset_u32): Likewise.
4927         (vldrhq_gather_shifted_offset_u16): Likewise.
4928         (vldrhq_gather_shifted_offset_z_s32): Likewise.
4929         (vldrhq_gather_shifted_offset_z_s16): Likewise.
4930         (vldrhq_gather_shifted_offset_z_u32): Likewise.
4931         (vldrhq_gather_shifted_offset_z_u16): Likewise.
4932         (vldrhq_s32): Likewise.
4933         (vldrhq_s16): Likewise.
4934         (vldrhq_u32): Likewise.
4935         (vldrhq_u16): Likewise.
4936         (vldrhq_z_s32): Likewise.
4937         (vldrhq_z_s16): Likewise.
4938         (vldrhq_z_u32): Likewise.
4939         (vldrhq_z_u16): Likewise.
4940         (vldrwq_s32): Likewise.
4941         (vldrwq_u32): Likewise.
4942         (vldrwq_z_s32): Likewise.
4943         (vldrwq_z_u32): Likewise.
4944         (vld1q_f32): Likewise.
4945         (vld1q_f16): Likewise.
4946         (vldrhq_f16): Likewise.
4947         (vldrhq_z_f16): Likewise.
4948         (vldrwq_f32): Likewise.
4949         (vldrwq_z_f32): Likewise.
4950         (__arm_vld1q_s8): Define intrinsic.
4951         (__arm_vld1q_s32): Likewise.
4952         (__arm_vld1q_s16): Likewise.
4953         (__arm_vld1q_u8): Likewise.
4954         (__arm_vld1q_u32): Likewise.
4955         (__arm_vld1q_u16): Likewise.
4956         (__arm_vldrhq_gather_offset_s32): Likewise.
4957         (__arm_vldrhq_gather_offset_s16): Likewise.
4958         (__arm_vldrhq_gather_offset_u32): Likewise.
4959         (__arm_vldrhq_gather_offset_u16): Likewise.
4960         (__arm_vldrhq_gather_offset_z_s32): Likewise.
4961         (__arm_vldrhq_gather_offset_z_s16): Likewise.
4962         (__arm_vldrhq_gather_offset_z_u32): Likewise.
4963         (__arm_vldrhq_gather_offset_z_u16): Likewise.
4964         (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
4965         (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
4966         (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
4967         (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
4968         (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
4969         (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
4970         (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
4971         (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
4972         (__arm_vldrhq_s32): Likewise.
4973         (__arm_vldrhq_s16): Likewise.
4974         (__arm_vldrhq_u32): Likewise.
4975         (__arm_vldrhq_u16): Likewise.
4976         (__arm_vldrhq_z_s32): Likewise.
4977         (__arm_vldrhq_z_s16): Likewise.
4978         (__arm_vldrhq_z_u32): Likewise.
4979         (__arm_vldrhq_z_u16): Likewise.
4980         (__arm_vldrwq_s32): Likewise.
4981         (__arm_vldrwq_u32): Likewise.
4982         (__arm_vldrwq_z_s32): Likewise.
4983         (__arm_vldrwq_z_u32): Likewise.
4984         (__arm_vld1q_f32): Likewise.
4985         (__arm_vld1q_f16): Likewise.
4986         (__arm_vldrwq_f32): Likewise.
4987         (__arm_vldrwq_z_f32): Likewise.
4988         (__arm_vldrhq_z_f16): Likewise.
4989         (__arm_vldrhq_f16): Likewise.
4990         (vld1q): Define polymorphic variant.
4991         (vldrhq_gather_offset): Likewise.
4992         (vldrhq_gather_offset_z): Likewise.
4993         (vldrhq_gather_shifted_offset): Likewise.
4994         (vldrhq_gather_shifted_offset_z): Likewise.
4995         * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
4996         (LDRS): Likewise.
4997         (LDRU_Z): Likewise.
4998         (LDRS_Z): Likewise.
4999         (LDRGU_Z): Likewise.
5000         (LDRGU): Likewise.
5001         (LDRGS_Z): Likewise.
5002         (LDRGS): Likewise.
5003         * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
5004         (V_sz_elem1): Likewise.
5005         (VLD1Q): Define iterator.
5006         (VLDRHGOQ): Likewise.
5007         (VLDRHGSOQ): Likewise.
5008         (VLDRHQ): Likewise.
5009         (VLDRWQ): Likewise.
5010         (mve_vldrhq_fv8hf): Define RTL pattern.
5011         (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
5012         (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
5013         (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
5014         (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
5015         (mve_vldrhq_<supf><mode>): Likewise.
5016         (mve_vldrhq_z_fv8hf): Likewise.
5017         (mve_vldrhq_z_<supf><mode>): Likewise.
5018         (mve_vldrwq_fv4sf): Likewise.
5019         (mve_vldrwq_<supf>v4si): Likewise.
5020         (mve_vldrwq_z_fv4sf): Likewise.
5021         (mve_vldrwq_z_<supf>v4si): Likewise.
5022         (mve_vld1q_f<mode>): Define RTL expand pattern.
5023         (mve_vld1q_<supf><mode>): Likewise.
5024
5025 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
5026             Mihail Ionescu  <mihail.ionescu@arm.com>
5027             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
5028
5029         * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
5030         qualifier.
5031         (LDRGBU_Z_QUALIFIERS): Likewise.
5032         (LDRGS_Z_QUALIFIERS): Likewise.
5033         (LDRGU_Z_QUALIFIERS): Likewise.
5034         (LDRS_Z_QUALIFIERS): Likewise.
5035         (LDRU_Z_QUALIFIERS): Likewise.
5036         * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
5037         (vldrbq_gather_offset_z_u8): Likewise.
5038         (vldrbq_gather_offset_z_s32): Likewise.
5039         (vldrbq_gather_offset_z_u16): Likewise.
5040         (vldrbq_gather_offset_z_u32): Likewise.
5041         (vldrbq_gather_offset_z_s8): Likewise.
5042         (vldrbq_z_s16): Likewise.
5043         (vldrbq_z_u8): Likewise.
5044         (vldrbq_z_s8): Likewise.
5045         (vldrbq_z_s32): Likewise.
5046         (vldrbq_z_u16): Likewise.
5047         (vldrbq_z_u32): Likewise.
5048         (vldrwq_gather_base_z_u32): Likewise.
5049         (vldrwq_gather_base_z_s32): Likewise.
5050         (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
5051         (__arm_vldrbq_gather_offset_z_s32): Likewise.
5052         (__arm_vldrbq_gather_offset_z_s16): Likewise.
5053         (__arm_vldrbq_gather_offset_z_u8): Likewise.
5054         (__arm_vldrbq_gather_offset_z_u32): Likewise.
5055         (__arm_vldrbq_gather_offset_z_u16): Likewise.
5056         (__arm_vldrbq_z_s8): Likewise.
5057         (__arm_vldrbq_z_s32): Likewise.
5058         (__arm_vldrbq_z_s16): Likewise.
5059         (__arm_vldrbq_z_u8): Likewise.
5060         (__arm_vldrbq_z_u32): Likewise.
5061         (__arm_vldrbq_z_u16): Likewise.
5062         (__arm_vldrwq_gather_base_z_s32): Likewise.
5063         (__arm_vldrwq_gather_base_z_u32): Likewise.
5064         (vldrbq_gather_offset_z): Define polymorphic variant.
5065         * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
5066         qualifier.
5067         (LDRGBU_Z_QUALIFIERS): Likewise.
5068         (LDRGS_Z_QUALIFIERS): Likewise.
5069         (LDRGU_Z_QUALIFIERS): Likewise.
5070         (LDRS_Z_QUALIFIERS): Likewise.
5071         (LDRU_Z_QUALIFIERS): Likewise.
5072         * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
5073         RTL pattern.
5074         (mve_vldrbq_z_<supf><mode>): Likewise.
5075         (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
5076
5077 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
5078             Mihail Ionescu  <mihail.ionescu@arm.com>
5079             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
5080
5081         * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
5082         qualifier.
5083         (STRU_P_QUALIFIERS): Likewise.
5084         (STRSU_P_QUALIFIERS): Likewise.
5085         (STRSS_P_QUALIFIERS): Likewise.
5086         (STRSBS_P_QUALIFIERS): Likewise.
5087         (STRSBU_P_QUALIFIERS): Likewise.
5088         * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
5089         (vstrbq_p_s32): Likewise.
5090         (vstrbq_p_s16): Likewise.
5091         (vstrbq_p_u8): Likewise.
5092         (vstrbq_p_u32): Likewise.
5093         (vstrbq_p_u16): Likewise.
5094         (vstrbq_scatter_offset_p_s8): Likewise.
5095         (vstrbq_scatter_offset_p_s32): Likewise.
5096         (vstrbq_scatter_offset_p_s16): Likewise.
5097         (vstrbq_scatter_offset_p_u8): Likewise.
5098         (vstrbq_scatter_offset_p_u32): Likewise.
5099         (vstrbq_scatter_offset_p_u16): Likewise.
5100         (vstrwq_scatter_base_p_s32): Likewise.
5101         (vstrwq_scatter_base_p_u32): Likewise.
5102         (__arm_vstrbq_p_s8): Define intrinsic.
5103         (__arm_vstrbq_p_s32): Likewise.
5104         (__arm_vstrbq_p_s16): Likewise.
5105         (__arm_vstrbq_p_u8): Likewise.
5106         (__arm_vstrbq_p_u32): Likewise.
5107         (__arm_vstrbq_p_u16): Likewise.
5108         (__arm_vstrbq_scatter_offset_p_s8): Likewise.
5109         (__arm_vstrbq_scatter_offset_p_s32): Likewise.
5110         (__arm_vstrbq_scatter_offset_p_s16): Likewise.
5111         (__arm_vstrbq_scatter_offset_p_u8): Likewise.
5112         (__arm_vstrbq_scatter_offset_p_u32): Likewise.
5113         (__arm_vstrbq_scatter_offset_p_u16): Likewise.
5114         (__arm_vstrwq_scatter_base_p_s32): Likewise.
5115         (__arm_vstrwq_scatter_base_p_u32): Likewise.
5116         (vstrbq_p): Define polymorphic variant.
5117         (vstrbq_scatter_offset_p): Likewise.
5118         (vstrwq_scatter_base_p): Likewise.
5119         * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
5120         qualifier.
5121         (STRU_P_QUALIFIERS): Likewise.
5122         (STRSU_P_QUALIFIERS): Likewise.
5123         (STRSS_P_QUALIFIERS): Likewise.
5124         (STRSBS_P_QUALIFIERS): Likewise.
5125         (STRSBU_P_QUALIFIERS): Likewise.
5126         * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
5127         RTL pattern.
5128         (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
5129         (mve_vstrbq_p_<supf><mode>): Likewise.
5130
5131 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
5132             Mihail Ionescu  <mihail.ionescu@arm.com>
5133             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
5134
5135         * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
5136         qualifier.
5137         (LDRGS_QUALIFIERS): Likewise.
5138         (LDRS_QUALIFIERS): Likewise.
5139         (LDRU_QUALIFIERS): Likewise.
5140         (LDRGBS_QUALIFIERS): Likewise.
5141         (LDRGBU_QUALIFIERS): Likewise.
5142         * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
5143         (vldrbq_gather_offset_s8): Likewise.
5144         (vldrbq_s8): Likewise.
5145         (vldrbq_u8): Likewise.
5146         (vldrbq_gather_offset_u16): Likewise.
5147         (vldrbq_gather_offset_s16): Likewise.
5148         (vldrbq_s16): Likewise.
5149         (vldrbq_u16): Likewise.
5150         (vldrbq_gather_offset_u32): Likewise.
5151         (vldrbq_gather_offset_s32): Likewise.
5152         (vldrbq_s32): Likewise.
5153         (vldrbq_u32): Likewise.
5154         (vldrwq_gather_base_s32): Likewise.
5155         (vldrwq_gather_base_u32): Likewise.
5156         (__arm_vldrbq_gather_offset_u8): Define intrinsic.
5157         (__arm_vldrbq_gather_offset_s8): Likewise.
5158         (__arm_vldrbq_s8): Likewise.
5159         (__arm_vldrbq_u8): Likewise.
5160         (__arm_vldrbq_gather_offset_u16): Likewise.
5161         (__arm_vldrbq_gather_offset_s16): Likewise.
5162         (__arm_vldrbq_s16): Likewise.
5163         (__arm_vldrbq_u16): Likewise.
5164         (__arm_vldrbq_gather_offset_u32): Likewise.
5165         (__arm_vldrbq_gather_offset_s32): Likewise.
5166         (__arm_vldrbq_s32): Likewise.
5167         (__arm_vldrbq_u32): Likewise.
5168         (__arm_vldrwq_gather_base_s32): Likewise.
5169         (__arm_vldrwq_gather_base_u32): Likewise.
5170         (vldrbq_gather_offset): Define polymorphic variant.
5171         * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
5172         qualifier.
5173         (LDRGS_QUALIFIERS): Likewise.
5174         (LDRS_QUALIFIERS): Likewise.
5175         (LDRU_QUALIFIERS): Likewise.
5176         (LDRGBS_QUALIFIERS): Likewise.
5177         (LDRGBU_QUALIFIERS): Likewise.
5178         * config/arm/mve.md (VLDRBGOQ): Define iterator.
5179         (VLDRBQ): Likewise.
5180         (VLDRWGBQ): Likewise.
5181         (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
5182         (mve_vldrbq_<supf><mode>): Likewise.
5183         (mve_vldrwq_gather_base_<supf>v4si): Likewise.
5184
5185 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
5186             Mihail Ionescu  <mihail.ionescu@arm.com>
5187             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
5188
5189         * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
5190         (STRU_QUALIFIERS): Likewise.
5191         (STRSS_QUALIFIERS): Likewise.
5192         (STRSU_QUALIFIERS): Likewise.
5193         (STRSBS_QUALIFIERS): Likewise.
5194         (STRSBU_QUALIFIERS): Likewise.
5195         * config/arm/arm_mve.h (vstrbq_s8): Define macro.
5196         (vstrbq_u8): Likewise.
5197         (vstrbq_u16): Likewise.
5198         (vstrbq_scatter_offset_s8): Likewise.
5199         (vstrbq_scatter_offset_u8): Likewise.
5200         (vstrbq_scatter_offset_u16): Likewise.
5201         (vstrbq_s16): Likewise.
5202         (vstrbq_u32): Likewise.
5203         (vstrbq_scatter_offset_s16): Likewise.
5204         (vstrbq_scatter_offset_u32): Likewise.
5205         (vstrbq_s32): Likewise.
5206         (vstrbq_scatter_offset_s32): Likewise.
5207         (vstrwq_scatter_base_s32): Likewise.
5208         (vstrwq_scatter_base_u32): Likewise.
5209         (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
5210         (__arm_vstrbq_scatter_offset_s32): Likewise.
5211         (__arm_vstrbq_scatter_offset_s16): Likewise.
5212         (__arm_vstrbq_scatter_offset_u8): Likewise.
5213         (__arm_vstrbq_scatter_offset_u32): Likewise.
5214         (__arm_vstrbq_scatter_offset_u16): Likewise.
5215         (__arm_vstrbq_s8): Likewise.
5216         (__arm_vstrbq_s32): Likewise.
5217         (__arm_vstrbq_s16): Likewise.
5218         (__arm_vstrbq_u8): Likewise.
5219         (__arm_vstrbq_u32): Likewise.
5220         (__arm_vstrbq_u16): Likewise.
5221         (__arm_vstrwq_scatter_base_s32): Likewise.
5222         (__arm_vstrwq_scatter_base_u32): Likewise.
5223         (vstrbq): Define polymorphic variant.
5224         (vstrbq_scatter_offset): Likewise.
5225         (vstrwq_scatter_base): Likewise.
5226         * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
5227         qualifier.
5228         (STRU_QUALIFIERS): Likewise.
5229         (STRSS_QUALIFIERS): Likewise.
5230         (STRSU_QUALIFIERS): Likewise.
5231         (STRSBS_QUALIFIERS): Likewise.
5232         (STRSBU_QUALIFIERS): Likewise.
5233         * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
5234         (VSTRWSBQ): Define iterators.
5235         (VSTRBSOQ): Likewise.
5236         (VSTRBQ): Likewise.
5237         (mve_vstrbq_<supf><mode>): Define RTL pattern.
5238         (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
5239         (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
5240
5241 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
5242             Mihail Ionescu  <mihail.ionescu@arm.com>
5243             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
5244
5245         * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
5246         (vabdq_m_f16): Likewise.
5247         (vaddq_m_f32): Likewise.
5248         (vaddq_m_f16): Likewise.
5249         (vaddq_m_n_f32): Likewise.
5250         (vaddq_m_n_f16): Likewise.
5251         (vandq_m_f32): Likewise.
5252         (vandq_m_f16): Likewise.
5253         (vbicq_m_f32): Likewise.
5254         (vbicq_m_f16): Likewise.
5255         (vbrsrq_m_n_f32): Likewise.
5256         (vbrsrq_m_n_f16): Likewise.
5257         (vcaddq_rot270_m_f32): Likewise.
5258         (vcaddq_rot270_m_f16): Likewise.
5259         (vcaddq_rot90_m_f32): Likewise.
5260         (vcaddq_rot90_m_f16): Likewise.
5261         (vcmlaq_m_f32): Likewise.
5262         (vcmlaq_m_f16): Likewise.
5263         (vcmlaq_rot180_m_f32): Likewise.
5264         (vcmlaq_rot180_m_f16): Likewise.
5265         (vcmlaq_rot270_m_f32): Likewise.
5266         (vcmlaq_rot270_m_f16): Likewise.
5267         (vcmlaq_rot90_m_f32): Likewise.
5268         (vcmlaq_rot90_m_f16): Likewise.
5269         (vcmulq_m_f32): Likewise.
5270         (vcmulq_m_f16): Likewise.
5271         (vcmulq_rot180_m_f32): Likewise.
5272         (vcmulq_rot180_m_f16): Likewise.
5273         (vcmulq_rot270_m_f32): Likewise.
5274         (vcmulq_rot270_m_f16): Likewise.
5275         (vcmulq_rot90_m_f32): Likewise.
5276         (vcmulq_rot90_m_f16): Likewise.
5277         (vcvtq_m_n_s32_f32): Likewise.
5278         (vcvtq_m_n_s16_f16): Likewise.
5279         (vcvtq_m_n_u32_f32): Likewise.
5280         (vcvtq_m_n_u16_f16): Likewise.
5281         (veorq_m_f32): Likewise.
5282         (veorq_m_f16): Likewise.
5283         (vfmaq_m_f32): Likewise.
5284         (vfmaq_m_f16): Likewise.
5285         (vfmaq_m_n_f32): Likewise.
5286         (vfmaq_m_n_f16): Likewise.
5287         (vfmasq_m_n_f32): Likewise.
5288         (vfmasq_m_n_f16): Likewise.
5289         (vfmsq_m_f32): Likewise.
5290         (vfmsq_m_f16): Likewise.
5291         (vmaxnmq_m_f32): Likewise.
5292         (vmaxnmq_m_f16): Likewise.
5293         (vminnmq_m_f32): Likewise.
5294         (vminnmq_m_f16): Likewise.
5295         (vmulq_m_f32): Likewise.
5296         (vmulq_m_f16): Likewise.
5297         (vmulq_m_n_f32): Likewise.
5298         (vmulq_m_n_f16): Likewise.
5299         (vornq_m_f32): Likewise.
5300         (vornq_m_f16): Likewise.
5301         (vorrq_m_f32): Likewise.
5302         (vorrq_m_f16): Likewise.
5303         (vsubq_m_f32): Likewise.
5304         (vsubq_m_f16): Likewise.
5305         (vsubq_m_n_f32): Likewise.
5306         (vsubq_m_n_f16): Likewise.
5307         (__attribute__): Likewise.
5308         (__arm_vabdq_m_f32): Likewise.
5309         (__arm_vabdq_m_f16): Likewise.
5310         (__arm_vaddq_m_f32): Likewise.
5311         (__arm_vaddq_m_f16): Likewise.
5312         (__arm_vaddq_m_n_f32): Likewise.
5313         (__arm_vaddq_m_n_f16): Likewise.
5314         (__arm_vandq_m_f32): Likewise.
5315         (__arm_vandq_m_f16): Likewise.
5316         (__arm_vbicq_m_f32): Likewise.
5317         (__arm_vbicq_m_f16): Likewise.
5318         (__arm_vbrsrq_m_n_f32): Likewise.
5319         (__arm_vbrsrq_m_n_f16): Likewise.
5320         (__arm_vcaddq_rot270_m_f32): Likewise.
5321         (__arm_vcaddq_rot270_m_f16): Likewise.
5322         (__arm_vcaddq_rot90_m_f32): Likewise.
5323         (__arm_vcaddq_rot90_m_f16): Likewise.
5324         (__arm_vcmlaq_m_f32): Likewise.
5325         (__arm_vcmlaq_m_f16): Likewise.
5326         (__arm_vcmlaq_rot180_m_f32): Likewise.
5327         (__arm_vcmlaq_rot180_m_f16): Likewise.
5328         (__arm_vcmlaq_rot270_m_f32): Likewise.
5329         (__arm_vcmlaq_rot270_m_f16): Likewise.
5330         (__arm_vcmlaq_rot90_m_f32): Likewise.
5331         (__arm_vcmlaq_rot90_m_f16): Likewise.
5332         (__arm_vcmulq_m_f32): Likewise.
5333         (__arm_vcmulq_m_f16): Likewise.
5334         (__arm_vcmulq_rot180_m_f32): Define intrinsic.
5335         (__arm_vcmulq_rot180_m_f16): Likewise.
5336         (__arm_vcmulq_rot270_m_f32): Likewise.
5337         (__arm_vcmulq_rot270_m_f16): Likewise.
5338         (__arm_vcmulq_rot90_m_f32): Likewise.
5339         (__arm_vcmulq_rot90_m_f16): Likewise.
5340         (__arm_vcvtq_m_n_s32_f32): Likewise.
5341         (__arm_vcvtq_m_n_s16_f16): Likewise.
5342         (__arm_vcvtq_m_n_u32_f32): Likewise.
5343         (__arm_vcvtq_m_n_u16_f16): Likewise.
5344         (__arm_veorq_m_f32): Likewise.
5345         (__arm_veorq_m_f16): Likewise.
5346         (__arm_vfmaq_m_f32): Likewise.
5347         (__arm_vfmaq_m_f16): Likewise.
5348         (__arm_vfmaq_m_n_f32): Likewise.
5349         (__arm_vfmaq_m_n_f16): Likewise.
5350         (__arm_vfmasq_m_n_f32): Likewise.
5351         (__arm_vfmasq_m_n_f16): Likewise.
5352         (__arm_vfmsq_m_f32): Likewise.
5353         (__arm_vfmsq_m_f16): Likewise.
5354         (__arm_vmaxnmq_m_f32): Likewise.
5355         (__arm_vmaxnmq_m_f16): Likewise.
5356         (__arm_vminnmq_m_f32): Likewise.
5357         (__arm_vminnmq_m_f16): Likewise.
5358         (__arm_vmulq_m_f32): Likewise.
5359         (__arm_vmulq_m_f16): Likewise.
5360         (__arm_vmulq_m_n_f32): Likewise.
5361         (__arm_vmulq_m_n_f16): Likewise.
5362         (__arm_vornq_m_f32): Likewise.
5363         (__arm_vornq_m_f16): Likewise.
5364         (__arm_vorrq_m_f32): Likewise.
5365         (__arm_vorrq_m_f16): Likewise.
5366         (__arm_vsubq_m_f32): Likewise.
5367         (__arm_vsubq_m_f16): Likewise.
5368         (__arm_vsubq_m_n_f32): Likewise.
5369         (__arm_vsubq_m_n_f16): Likewise.
5370         (vabdq_m): Define polymorphic variant.
5371         (vaddq_m): Likewise.
5372         (vaddq_m_n): Likewise.
5373         (vandq_m): Likewise.
5374         (vbicq_m): Likewise.
5375         (vbrsrq_m_n): Likewise.
5376         (vcaddq_rot270_m): Likewise.
5377         (vcaddq_rot90_m): Likewise.
5378         (vcmlaq_m): Likewise.
5379         (vcmlaq_rot180_m): Likewise.
5380         (vcmlaq_rot270_m): Likewise.
5381         (vcmlaq_rot90_m): Likewise.
5382         (vcmulq_m): Likewise.
5383         (vcmulq_rot180_m): Likewise.
5384         (vcmulq_rot270_m): Likewise.
5385         (vcmulq_rot90_m): Likewise.
5386         (veorq_m): Likewise.
5387         (vfmaq_m): Likewise.
5388         (vfmaq_m_n): Likewise.
5389         (vfmasq_m_n): Likewise.
5390         (vfmsq_m): Likewise.
5391         (vmaxnmq_m): Likewise.
5392         (vminnmq_m): Likewise.
5393         (vmulq_m): Likewise.
5394         (vmulq_m_n): Likewise.
5395         (vornq_m): Likewise.
5396         (vsubq_m): Likewise.
5397         (vsubq_m_n): Likewise.
5398         (vorrq_m): Likewise.
5399         * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
5400         builtin qualifier.
5401         (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5402         (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
5403         * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
5404         (mve_vaddq_m_f<mode>): Likewise.
5405         (mve_vaddq_m_n_f<mode>): Likewise.
5406         (mve_vandq_m_f<mode>): Likewise.
5407         (mve_vbicq_m_f<mode>): Likewise.
5408         (mve_vbrsrq_m_n_f<mode>): Likewise.
5409         (mve_vcaddq_rot270_m_f<mode>): Likewise.
5410         (mve_vcaddq_rot90_m_f<mode>): Likewise.
5411         (mve_vcmlaq_m_f<mode>): Likewise.
5412         (mve_vcmlaq_rot180_m_f<mode>): Likewise.
5413         (mve_vcmlaq_rot270_m_f<mode>): Likewise.
5414         (mve_vcmlaq_rot90_m_f<mode>): Likewise.
5415         (mve_vcmulq_m_f<mode>): Likewise.
5416         (mve_vcmulq_rot180_m_f<mode>): Likewise.
5417         (mve_vcmulq_rot270_m_f<mode>): Likewise.
5418         (mve_vcmulq_rot90_m_f<mode>): Likewise.
5419         (mve_veorq_m_f<mode>): Likewise.
5420         (mve_vfmaq_m_f<mode>): Likewise.
5421         (mve_vfmaq_m_n_f<mode>): Likewise.
5422         (mve_vfmasq_m_n_f<mode>): Likewise.
5423         (mve_vfmsq_m_f<mode>): Likewise.
5424         (mve_vmaxnmq_m_f<mode>): Likewise.
5425         (mve_vminnmq_m_f<mode>): Likewise.
5426         (mve_vmulq_m_f<mode>): Likewise.
5427         (mve_vmulq_m_n_f<mode>): Likewise.
5428         (mve_vornq_m_f<mode>): Likewise.
5429         (mve_vorrq_m_f<mode>): Likewise.
5430         (mve_vsubq_m_f<mode>): Likewise.
5431         (mve_vsubq_m_n_f<mode>): Likewise.
5432
5433 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
5434             Mihail Ionescu  <mihail.ionescu@arm.com>
5435             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
5436
5437         * config/arm/arm-protos.h (arm_mve_immediate_check):
5438         * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
5439         mode and interger value.
5440         * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
5441         (vmlaldavaq_p_s16): Likewise.
5442         (vmlaldavaq_p_u32): Likewise.
5443         (vmlaldavaq_p_u16): Likewise.
5444         (vmlaldavaxq_p_s32): Likewise.
5445         (vmlaldavaxq_p_s16): Likewise.
5446         (vmlaldavaxq_p_u32): Likewise.
5447         (vmlaldavaxq_p_u16): Likewise.
5448         (vmlsldavaq_p_s32): Likewise.
5449         (vmlsldavaq_p_s16): Likewise.
5450         (vmlsldavaxq_p_s32): Likewise.
5451         (vmlsldavaxq_p_s16): Likewise.
5452         (vmullbq_poly_m_p8): Likewise.
5453         (vmullbq_poly_m_p16): Likewise.
5454         (vmulltq_poly_m_p8): Likewise.
5455         (vmulltq_poly_m_p16): Likewise.
5456         (vqdmullbq_m_n_s32): Likewise.
5457         (vqdmullbq_m_n_s16): Likewise.
5458         (vqdmullbq_m_s32): Likewise.
5459         (vqdmullbq_m_s16): Likewise.
5460         (vqdmulltq_m_n_s32): Likewise.
5461         (vqdmulltq_m_n_s16): Likewise.
5462         (vqdmulltq_m_s32): Likewise.
5463         (vqdmulltq_m_s16): Likewise.
5464         (vqrshrnbq_m_n_s32): Likewise.
5465         (vqrshrnbq_m_n_s16): Likewise.
5466         (vqrshrnbq_m_n_u32): Likewise.
5467         (vqrshrnbq_m_n_u16): Likewise.
5468         (vqrshrntq_m_n_s32): Likewise.
5469         (vqrshrntq_m_n_s16): Likewise.
5470         (vqrshrntq_m_n_u32): Likewise.
5471         (vqrshrntq_m_n_u16): Likewise.
5472         (vqrshrunbq_m_n_s32): Likewise.
5473         (vqrshrunbq_m_n_s16): Likewise.
5474         (vqrshruntq_m_n_s32): Likewise.
5475         (vqrshruntq_m_n_s16): Likewise.
5476         (vqshrnbq_m_n_s32): Likewise.
5477         (vqshrnbq_m_n_s16): Likewise.
5478         (vqshrnbq_m_n_u32): Likewise.
5479         (vqshrnbq_m_n_u16): Likewise.
5480         (vqshrntq_m_n_s32): Likewise.
5481         (vqshrntq_m_n_s16): Likewise.
5482         (vqshrntq_m_n_u32): Likewise.
5483         (vqshrntq_m_n_u16): Likewise.
5484         (vqshrunbq_m_n_s32): Likewise.
5485         (vqshrunbq_m_n_s16): Likewise.
5486         (vqshruntq_m_n_s32): Likewise.
5487         (vqshruntq_m_n_s16): Likewise.
5488         (vrmlaldavhaq_p_s32): Likewise.
5489         (vrmlaldavhaq_p_u32): Likewise.
5490         (vrmlaldavhaxq_p_s32): Likewise.
5491         (vrmlsldavhaq_p_s32): Likewise.
5492         (vrmlsldavhaxq_p_s32): Likewise.
5493         (vrshrnbq_m_n_s32): Likewise.
5494         (vrshrnbq_m_n_s16): Likewise.
5495         (vrshrnbq_m_n_u32): Likewise.
5496         (vrshrnbq_m_n_u16): Likewise.
5497         (vrshrntq_m_n_s32): Likewise.
5498         (vrshrntq_m_n_s16): Likewise.
5499         (vrshrntq_m_n_u32): Likewise.
5500         (vrshrntq_m_n_u16): Likewise.
5501         (vshllbq_m_n_s8): Likewise.
5502         (vshllbq_m_n_s16): Likewise.
5503         (vshllbq_m_n_u8): Likewise.
5504         (vshllbq_m_n_u16): Likewise.
5505         (vshlltq_m_n_s8): Likewise.
5506         (vshlltq_m_n_s16): Likewise.
5507         (vshlltq_m_n_u8): Likewise.
5508         (vshlltq_m_n_u16): Likewise.
5509         (vshrnbq_m_n_s32): Likewise.
5510         (vshrnbq_m_n_s16): Likewise.
5511         (vshrnbq_m_n_u32): Likewise.
5512         (vshrnbq_m_n_u16): Likewise.
5513         (vshrntq_m_n_s32): Likewise.
5514         (vshrntq_m_n_s16): Likewise.
5515         (vshrntq_m_n_u32): Likewise.
5516         (vshrntq_m_n_u16): Likewise.
5517         (__arm_vmlaldavaq_p_s32): Define intrinsic.
5518         (__arm_vmlaldavaq_p_s16): Likewise.
5519         (__arm_vmlaldavaq_p_u32): Likewise.
5520         (__arm_vmlaldavaq_p_u16): Likewise.
5521         (__arm_vmlaldavaxq_p_s32): Likewise.
5522         (__arm_vmlaldavaxq_p_s16): Likewise.
5523         (__arm_vmlaldavaxq_p_u32): Likewise.
5524         (__arm_vmlaldavaxq_p_u16): Likewise.
5525         (__arm_vmlsldavaq_p_s32): Likewise.
5526         (__arm_vmlsldavaq_p_s16): Likewise.
5527         (__arm_vmlsldavaxq_p_s32): Likewise.
5528         (__arm_vmlsldavaxq_p_s16): Likewise.
5529         (__arm_vmullbq_poly_m_p8): Likewise.
5530         (__arm_vmullbq_poly_m_p16): Likewise.
5531         (__arm_vmulltq_poly_m_p8): Likewise.
5532         (__arm_vmulltq_poly_m_p16): Likewise.
5533         (__arm_vqdmullbq_m_n_s32): Likewise.
5534         (__arm_vqdmullbq_m_n_s16): Likewise.
5535         (__arm_vqdmullbq_m_s32): Likewise.
5536         (__arm_vqdmullbq_m_s16): Likewise.
5537         (__arm_vqdmulltq_m_n_s32): Likewise.
5538         (__arm_vqdmulltq_m_n_s16): Likewise.
5539         (__arm_vqdmulltq_m_s32): Likewise.
5540         (__arm_vqdmulltq_m_s16): Likewise.
5541         (__arm_vqrshrnbq_m_n_s32): Likewise.
5542         (__arm_vqrshrnbq_m_n_s16): Likewise.
5543         (__arm_vqrshrnbq_m_n_u32): Likewise.
5544         (__arm_vqrshrnbq_m_n_u16): Likewise.
5545         (__arm_vqrshrntq_m_n_s32): Likewise.
5546         (__arm_vqrshrntq_m_n_s16): Likewise.
5547         (__arm_vqrshrntq_m_n_u32): Likewise.
5548         (__arm_vqrshrntq_m_n_u16): Likewise.
5549         (__arm_vqrshrunbq_m_n_s32): Likewise.
5550         (__arm_vqrshrunbq_m_n_s16): Likewise.
5551         (__arm_vqrshruntq_m_n_s32): Likewise.
5552         (__arm_vqrshruntq_m_n_s16): Likewise.
5553         (__arm_vqshrnbq_m_n_s32): Likewise.
5554         (__arm_vqshrnbq_m_n_s16): Likewise.
5555         (__arm_vqshrnbq_m_n_u32): Likewise.
5556         (__arm_vqshrnbq_m_n_u16): Likewise.
5557         (__arm_vqshrntq_m_n_s32): Likewise.
5558         (__arm_vqshrntq_m_n_s16): Likewise.
5559         (__arm_vqshrntq_m_n_u32): Likewise.
5560         (__arm_vqshrntq_m_n_u16): Likewise.
5561         (__arm_vqshrunbq_m_n_s32): Likewise.
5562         (__arm_vqshrunbq_m_n_s16): Likewise.
5563         (__arm_vqshruntq_m_n_s32): Likewise.
5564         (__arm_vqshruntq_m_n_s16): Likewise.
5565         (__arm_vrmlaldavhaq_p_s32): Likewise.
5566         (__arm_vrmlaldavhaq_p_u32): Likewise.
5567         (__arm_vrmlaldavhaxq_p_s32): Likewise.
5568         (__arm_vrmlsldavhaq_p_s32): Likewise.
5569         (__arm_vrmlsldavhaxq_p_s32): Likewise.
5570         (__arm_vrshrnbq_m_n_s32): Likewise.
5571         (__arm_vrshrnbq_m_n_s16): Likewise.
5572         (__arm_vrshrnbq_m_n_u32): Likewise.
5573         (__arm_vrshrnbq_m_n_u16): Likewise.
5574         (__arm_vrshrntq_m_n_s32): Likewise.
5575         (__arm_vrshrntq_m_n_s16): Likewise.
5576         (__arm_vrshrntq_m_n_u32): Likewise.
5577         (__arm_vrshrntq_m_n_u16): Likewise.
5578         (__arm_vshllbq_m_n_s8): Likewise.
5579         (__arm_vshllbq_m_n_s16): Likewise.
5580         (__arm_vshllbq_m_n_u8): Likewise.
5581         (__arm_vshllbq_m_n_u16): Likewise.
5582         (__arm_vshlltq_m_n_s8): Likewise.
5583         (__arm_vshlltq_m_n_s16): Likewise.
5584         (__arm_vshlltq_m_n_u8): Likewise.
5585         (__arm_vshlltq_m_n_u16): Likewise.
5586         (__arm_vshrnbq_m_n_s32): Likewise.
5587         (__arm_vshrnbq_m_n_s16): Likewise.
5588         (__arm_vshrnbq_m_n_u32): Likewise.
5589         (__arm_vshrnbq_m_n_u16): Likewise.
5590         (__arm_vshrntq_m_n_s32): Likewise.
5591         (__arm_vshrntq_m_n_s16): Likewise.
5592         (__arm_vshrntq_m_n_u32): Likewise.
5593         (__arm_vshrntq_m_n_u16): Likewise.
5594         (vmullbq_poly_m): Define polymorphic variant.
5595         (vmulltq_poly_m): Likewise.
5596         (vshllbq_m): Likewise.
5597         (vshrntq_m_n): Likewise.
5598         (vshrnbq_m_n): Likewise.
5599         (vshlltq_m_n): Likewise.
5600         (vshllbq_m_n): Likewise.
5601         (vrshrntq_m_n): Likewise.
5602         (vrshrnbq_m_n): Likewise.
5603         (vqshruntq_m_n): Likewise.
5604         (vqshrunbq_m_n): Likewise.
5605         (vqdmullbq_m_n): Likewise.
5606         (vqdmullbq_m): Likewise.
5607         (vqdmulltq_m_n): Likewise.
5608         (vqdmulltq_m): Likewise.
5609         (vqrshrnbq_m_n): Likewise.
5610         (vqrshrntq_m_n): Likewise.
5611         (vqrshrunbq_m_n): Likewise.
5612         (vqrshruntq_m_n): Likewise.
5613         (vqshrnbq_m_n): Likewise.
5614         (vqshrntq_m_n): Likewise.
5615         * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
5616         builtin qualifiers.
5617         (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5618         (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
5619         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
5620         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
5621         * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
5622         (VMLALDAVAXQ_P): Likewise.
5623         (VQRSHRNBQ_M_N): Likewise.
5624         (VQRSHRNTQ_M_N): Likewise.
5625         (VQSHRNBQ_M_N): Likewise.
5626         (VQSHRNTQ_M_N): Likewise.
5627         (VRSHRNBQ_M_N): Likewise.
5628         (VRSHRNTQ_M_N): Likewise.
5629         (VSHLLBQ_M_N): Likewise.
5630         (VSHLLTQ_M_N): Likewise.
5631         (VSHRNBQ_M_N): Likewise.
5632         (VSHRNTQ_M_N): Likewise.
5633         (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
5634         (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
5635         (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
5636         (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
5637         (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
5638         (mve_vqshrntq_m_n_<supf><mode>): Likewise.
5639         (mve_vrmlaldavhaq_p_sv4si): Likewise.
5640         (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
5641         (mve_vrshrntq_m_n_<supf><mode>): Likewise.
5642         (mve_vshllbq_m_n_<supf><mode>): Likewise.
5643         (mve_vshlltq_m_n_<supf><mode>): Likewise.
5644         (mve_vshrnbq_m_n_<supf><mode>): Likewise.
5645         (mve_vshrntq_m_n_<supf><mode>): Likewise.
5646         (mve_vmlsldavaq_p_s<mode>): Likewise.
5647         (mve_vmlsldavaxq_p_s<mode>): Likewise.
5648         (mve_vmullbq_poly_m_p<mode>): Likewise.
5649         (mve_vmulltq_poly_m_p<mode>): Likewise.
5650         (mve_vqdmullbq_m_n_s<mode>): Likewise.
5651         (mve_vqdmullbq_m_s<mode>): Likewise.
5652         (mve_vqdmulltq_m_n_s<mode>): Likewise.
5653         (mve_vqdmulltq_m_s<mode>): Likewise.
5654         (mve_vqrshrunbq_m_n_s<mode>): Likewise.
5655         (mve_vqrshruntq_m_n_s<mode>): Likewise.
5656         (mve_vqshrunbq_m_n_s<mode>): Likewise.
5657         (mve_vqshruntq_m_n_s<mode>): Likewise.
5658         (mve_vrmlaldavhaq_p_uv4si): Likewise.
5659         (mve_vrmlaldavhaxq_p_sv4si): Likewise.
5660         (mve_vrmlsldavhaq_p_sv4si): Likewise.
5661         (mve_vrmlsldavhaxq_p_sv4si): Likewise.
5662
5663 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
5664             Mihail Ionescu  <mihail.ionescu@arm.com>
5665             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
5666
5667         * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
5668         (vabdq_m_s32): Likewise.
5669         (vabdq_m_s16): Likewise.
5670         (vabdq_m_u8): Likewise.
5671         (vabdq_m_u32): Likewise.
5672         (vabdq_m_u16): Likewise.
5673         (vaddq_m_n_s8): Likewise.
5674         (vaddq_m_n_s32): Likewise.
5675         (vaddq_m_n_s16): Likewise.
5676         (vaddq_m_n_u8): Likewise.
5677         (vaddq_m_n_u32): Likewise.
5678         (vaddq_m_n_u16): Likewise.
5679         (vaddq_m_s8): Likewise.
5680         (vaddq_m_s32): Likewise.
5681         (vaddq_m_s16): Likewise.
5682         (vaddq_m_u8): Likewise.
5683         (vaddq_m_u32): Likewise.
5684         (vaddq_m_u16): Likewise.
5685         (vandq_m_s8): Likewise.
5686         (vandq_m_s32): Likewise.
5687         (vandq_m_s16): Likewise.
5688         (vandq_m_u8): Likewise.
5689         (vandq_m_u32): Likewise.
5690         (vandq_m_u16): Likewise.
5691         (vbicq_m_s8): Likewise.
5692         (vbicq_m_s32): Likewise.
5693         (vbicq_m_s16): Likewise.
5694         (vbicq_m_u8): Likewise.
5695         (vbicq_m_u32): Likewise.
5696         (vbicq_m_u16): Likewise.
5697         (vbrsrq_m_n_s8): Likewise.
5698         (vbrsrq_m_n_s32): Likewise.
5699         (vbrsrq_m_n_s16): Likewise.
5700         (vbrsrq_m_n_u8): Likewise.
5701         (vbrsrq_m_n_u32): Likewise.
5702         (vbrsrq_m_n_u16): Likewise.
5703         (vcaddq_rot270_m_s8): Likewise.
5704         (vcaddq_rot270_m_s32): Likewise.
5705         (vcaddq_rot270_m_s16): Likewise.
5706         (vcaddq_rot270_m_u8): Likewise.
5707         (vcaddq_rot270_m_u32): Likewise.
5708         (vcaddq_rot270_m_u16): Likewise.
5709         (vcaddq_rot90_m_s8): Likewise.
5710         (vcaddq_rot90_m_s32): Likewise.
5711         (vcaddq_rot90_m_s16): Likewise.
5712         (vcaddq_rot90_m_u8): Likewise.
5713         (vcaddq_rot90_m_u32): Likewise.
5714         (vcaddq_rot90_m_u16): Likewise.
5715         (veorq_m_s8): Likewise.
5716         (veorq_m_s32): Likewise.
5717         (veorq_m_s16): Likewise.
5718         (veorq_m_u8): Likewise.
5719         (veorq_m_u32): Likewise.
5720         (veorq_m_u16): Likewise.
5721         (vhaddq_m_n_s8): Likewise.
5722         (vhaddq_m_n_s32): Likewise.
5723         (vhaddq_m_n_s16): Likewise.
5724         (vhaddq_m_n_u8): Likewise.
5725         (vhaddq_m_n_u32): Likewise.
5726         (vhaddq_m_n_u16): Likewise.
5727         (vhaddq_m_s8): Likewise.
5728         (vhaddq_m_s32): Likewise.
5729         (vhaddq_m_s16): Likewise.
5730         (vhaddq_m_u8): Likewise.
5731         (vhaddq_m_u32): Likewise.
5732         (vhaddq_m_u16): Likewise.
5733         (vhcaddq_rot270_m_s8): Likewise.
5734         (vhcaddq_rot270_m_s32): Likewise.
5735         (vhcaddq_rot270_m_s16): Likewise.
5736         (vhcaddq_rot90_m_s8): Likewise.
5737         (vhcaddq_rot90_m_s32): Likewise.
5738         (vhcaddq_rot90_m_s16): Likewise.
5739         (vhsubq_m_n_s8): Likewise.
5740         (vhsubq_m_n_s32): Likewise.
5741         (vhsubq_m_n_s16): Likewise.
5742         (vhsubq_m_n_u8): Likewise.
5743         (vhsubq_m_n_u32): Likewise.
5744         (vhsubq_m_n_u16): Likewise.
5745         (vhsubq_m_s8): Likewise.
5746         (vhsubq_m_s32): Likewise.
5747         (vhsubq_m_s16): Likewise.
5748         (vhsubq_m_u8): Likewise.
5749         (vhsubq_m_u32): Likewise.
5750         (vhsubq_m_u16): Likewise.
5751         (vmaxq_m_s8): Likewise.
5752         (vmaxq_m_s32): Likewise.
5753         (vmaxq_m_s16): Likewise.
5754         (vmaxq_m_u8): Likewise.
5755         (vmaxq_m_u32): Likewise.
5756         (vmaxq_m_u16): Likewise.
5757         (vminq_m_s8): Likewise.
5758         (vminq_m_s32): Likewise.
5759         (vminq_m_s16): Likewise.
5760         (vminq_m_u8): Likewise.
5761         (vminq_m_u32): Likewise.
5762         (vminq_m_u16): Likewise.
5763         (vmladavaq_p_s8): Likewise.
5764         (vmladavaq_p_s32): Likewise.
5765         (vmladavaq_p_s16): Likewise.
5766         (vmladavaq_p_u8): Likewise.
5767         (vmladavaq_p_u32): Likewise.
5768         (vmladavaq_p_u16): Likewise.
5769         (vmladavaxq_p_s8): Likewise.
5770         (vmladavaxq_p_s32): Likewise.
5771         (vmladavaxq_p_s16): Likewise.
5772         (vmlaq_m_n_s8): Likewise.
5773         (vmlaq_m_n_s32): Likewise.
5774         (vmlaq_m_n_s16): Likewise.
5775         (vmlaq_m_n_u8): Likewise.
5776         (vmlaq_m_n_u32): Likewise.
5777         (vmlaq_m_n_u16): Likewise.
5778         (vmlasq_m_n_s8): Likewise.
5779         (vmlasq_m_n_s32): Likewise.
5780         (vmlasq_m_n_s16): Likewise.
5781         (vmlasq_m_n_u8): Likewise.
5782         (vmlasq_m_n_u32): Likewise.
5783         (vmlasq_m_n_u16): Likewise.
5784         (vmlsdavaq_p_s8): Likewise.
5785         (vmlsdavaq_p_s32): Likewise.
5786         (vmlsdavaq_p_s16): Likewise.
5787         (vmlsdavaxq_p_s8): Likewise.
5788         (vmlsdavaxq_p_s32): Likewise.
5789         (vmlsdavaxq_p_s16): Likewise.
5790         (vmulhq_m_s8): Likewise.
5791         (vmulhq_m_s32): Likewise.
5792         (vmulhq_m_s16): Likewise.
5793         (vmulhq_m_u8): Likewise.
5794         (vmulhq_m_u32): Likewise.
5795         (vmulhq_m_u16): Likewise.
5796         (vmullbq_int_m_s8): Likewise.
5797         (vmullbq_int_m_s32): Likewise.
5798         (vmullbq_int_m_s16): Likewise.
5799         (vmullbq_int_m_u8): Likewise.
5800         (vmullbq_int_m_u32): Likewise.
5801         (vmullbq_int_m_u16): Likewise.
5802         (vmulltq_int_m_s8): Likewise.
5803         (vmulltq_int_m_s32): Likewise.
5804         (vmulltq_int_m_s16): Likewise.
5805         (vmulltq_int_m_u8): Likewise.
5806         (vmulltq_int_m_u32): Likewise.
5807         (vmulltq_int_m_u16): Likewise.
5808         (vmulq_m_n_s8): Likewise.
5809         (vmulq_m_n_s32): Likewise.
5810         (vmulq_m_n_s16): Likewise.
5811         (vmulq_m_n_u8): Likewise.
5812         (vmulq_m_n_u32): Likewise.
5813         (vmulq_m_n_u16): Likewise.
5814         (vmulq_m_s8): Likewise.
5815         (vmulq_m_s32): Likewise.
5816         (vmulq_m_s16): Likewise.
5817         (vmulq_m_u8): Likewise.
5818         (vmulq_m_u32): Likewise.
5819         (vmulq_m_u16): Likewise.
5820         (vornq_m_s8): Likewise.
5821         (vornq_m_s32): Likewise.
5822         (vornq_m_s16): Likewise.
5823         (vornq_m_u8): Likewise.
5824         (vornq_m_u32): Likewise.
5825         (vornq_m_u16): Likewise.
5826         (vorrq_m_s8): Likewise.
5827         (vorrq_m_s32): Likewise.
5828         (vorrq_m_s16): Likewise.
5829         (vorrq_m_u8): Likewise.
5830         (vorrq_m_u32): Likewise.
5831         (vorrq_m_u16): Likewise.
5832         (vqaddq_m_n_s8): Likewise.
5833         (vqaddq_m_n_s32): Likewise.
5834         (vqaddq_m_n_s16): Likewise.
5835         (vqaddq_m_n_u8): Likewise.
5836         (vqaddq_m_n_u32): Likewise.
5837         (vqaddq_m_n_u16): Likewise.
5838         (vqaddq_m_s8): Likewise.
5839         (vqaddq_m_s32): Likewise.
5840         (vqaddq_m_s16): Likewise.
5841         (vqaddq_m_u8): Likewise.
5842         (vqaddq_m_u32): Likewise.
5843         (vqaddq_m_u16): Likewise.
5844         (vqdmladhq_m_s8): Likewise.
5845         (vqdmladhq_m_s32): Likewise.
5846         (vqdmladhq_m_s16): Likewise.
5847         (vqdmladhxq_m_s8): Likewise.
5848         (vqdmladhxq_m_s32): Likewise.
5849         (vqdmladhxq_m_s16): Likewise.
5850         (vqdmlahq_m_n_s8): Likewise.
5851         (vqdmlahq_m_n_s32): Likewise.
5852         (vqdmlahq_m_n_s16): Likewise.
5853         (vqdmlahq_m_n_u8): Likewise.
5854         (vqdmlahq_m_n_u32): Likewise.
5855         (vqdmlahq_m_n_u16): Likewise.
5856         (vqdmlsdhq_m_s8): Likewise.
5857         (vqdmlsdhq_m_s32): Likewise.
5858         (vqdmlsdhq_m_s16): Likewise.
5859         (vqdmlsdhxq_m_s8): Likewise.
5860         (vqdmlsdhxq_m_s32): Likewise.
5861         (vqdmlsdhxq_m_s16): Likewise.
5862         (vqdmulhq_m_n_s8): Likewise.
5863         (vqdmulhq_m_n_s32): Likewise.
5864         (vqdmulhq_m_n_s16): Likewise.
5865         (vqdmulhq_m_s8): Likewise.
5866         (vqdmulhq_m_s32): Likewise.
5867         (vqdmulhq_m_s16): Likewise.
5868         (vqrdmladhq_m_s8): Likewise.
5869         (vqrdmladhq_m_s32): Likewise.
5870         (vqrdmladhq_m_s16): Likewise.
5871         (vqrdmladhxq_m_s8): Likewise.
5872         (vqrdmladhxq_m_s32): Likewise.
5873         (vqrdmladhxq_m_s16): Likewise.
5874         (vqrdmlahq_m_n_s8): Likewise.
5875         (vqrdmlahq_m_n_s32): Likewise.
5876         (vqrdmlahq_m_n_s16): Likewise.
5877         (vqrdmlahq_m_n_u8): Likewise.
5878         (vqrdmlahq_m_n_u32): Likewise.
5879         (vqrdmlahq_m_n_u16): Likewise.
5880         (vqrdmlashq_m_n_s8): Likewise.
5881         (vqrdmlashq_m_n_s32): Likewise.
5882         (vqrdmlashq_m_n_s16): Likewise.
5883         (vqrdmlashq_m_n_u8): Likewise.
5884         (vqrdmlashq_m_n_u32): Likewise.
5885         (vqrdmlashq_m_n_u16): Likewise.
5886         (vqrdmlsdhq_m_s8): Likewise.
5887         (vqrdmlsdhq_m_s32): Likewise.
5888         (vqrdmlsdhq_m_s16): Likewise.
5889         (vqrdmlsdhxq_m_s8): Likewise.
5890         (vqrdmlsdhxq_m_s32): Likewise.
5891         (vqrdmlsdhxq_m_s16): Likewise.
5892         (vqrdmulhq_m_n_s8): Likewise.
5893         (vqrdmulhq_m_n_s32): Likewise.
5894         (vqrdmulhq_m_n_s16): Likewise.
5895         (vqrdmulhq_m_s8): Likewise.
5896         (vqrdmulhq_m_s32): Likewise.
5897         (vqrdmulhq_m_s16): Likewise.
5898         (vqrshlq_m_s8): Likewise.
5899         (vqrshlq_m_s32): Likewise.
5900         (vqrshlq_m_s16): Likewise.
5901         (vqrshlq_m_u8): Likewise.
5902         (vqrshlq_m_u32): Likewise.
5903         (vqrshlq_m_u16): Likewise.
5904         (vqshlq_m_n_s8): Likewise.
5905         (vqshlq_m_n_s32): Likewise.
5906         (vqshlq_m_n_s16): Likewise.
5907         (vqshlq_m_n_u8): Likewise.
5908         (vqshlq_m_n_u32): Likewise.
5909         (vqshlq_m_n_u16): Likewise.
5910         (vqshlq_m_s8): Likewise.
5911         (vqshlq_m_s32): Likewise.
5912         (vqshlq_m_s16): Likewise.
5913         (vqshlq_m_u8): Likewise.
5914         (vqshlq_m_u32): Likewise.
5915         (vqshlq_m_u16): Likewise.
5916         (vqsubq_m_n_s8): Likewise.
5917         (vqsubq_m_n_s32): Likewise.
5918         (vqsubq_m_n_s16): Likewise.
5919         (vqsubq_m_n_u8): Likewise.
5920         (vqsubq_m_n_u32): Likewise.
5921         (vqsubq_m_n_u16): Likewise.
5922         (vqsubq_m_s8): Likewise.
5923         (vqsubq_m_s32): Likewise.
5924         (vqsubq_m_s16): Likewise.
5925         (vqsubq_m_u8): Likewise.
5926         (vqsubq_m_u32): Likewise.
5927         (vqsubq_m_u16): Likewise.
5928         (vrhaddq_m_s8): Likewise.
5929         (vrhaddq_m_s32): Likewise.
5930         (vrhaddq_m_s16): Likewise.
5931         (vrhaddq_m_u8): Likewise.
5932         (vrhaddq_m_u32): Likewise.
5933         (vrhaddq_m_u16): Likewise.
5934         (vrmulhq_m_s8): Likewise.
5935         (vrmulhq_m_s32): Likewise.
5936         (vrmulhq_m_s16): Likewise.
5937         (vrmulhq_m_u8): Likewise.
5938         (vrmulhq_m_u32): Likewise.
5939         (vrmulhq_m_u16): Likewise.
5940         (vrshlq_m_s8): Likewise.
5941         (vrshlq_m_s32): Likewise.
5942         (vrshlq_m_s16): Likewise.
5943         (vrshlq_m_u8): Likewise.
5944         (vrshlq_m_u32): Likewise.
5945         (vrshlq_m_u16): Likewise.
5946         (vrshrq_m_n_s8): Likewise.
5947         (vrshrq_m_n_s32): Likewise.
5948         (vrshrq_m_n_s16): Likewise.
5949         (vrshrq_m_n_u8): Likewise.
5950         (vrshrq_m_n_u32): Likewise.
5951         (vrshrq_m_n_u16): Likewise.
5952         (vshlq_m_n_s8): Likewise.
5953         (vshlq_m_n_s32): Likewise.
5954         (vshlq_m_n_s16): Likewise.
5955         (vshlq_m_n_u8): Likewise.
5956         (vshlq_m_n_u32): Likewise.
5957         (vshlq_m_n_u16): Likewise.
5958         (vshrq_m_n_s8): Likewise.
5959         (vshrq_m_n_s32): Likewise.
5960         (vshrq_m_n_s16): Likewise.
5961         (vshrq_m_n_u8): Likewise.
5962         (vshrq_m_n_u32): Likewise.
5963         (vshrq_m_n_u16): Likewise.
5964         (vsliq_m_n_s8): Likewise.
5965         (vsliq_m_n_s32): Likewise.
5966         (vsliq_m_n_s16): Likewise.
5967         (vsliq_m_n_u8): Likewise.
5968         (vsliq_m_n_u32): Likewise.
5969         (vsliq_m_n_u16): Likewise.
5970         (vsubq_m_n_s8): Likewise.
5971         (vsubq_m_n_s32): Likewise.
5972         (vsubq_m_n_s16): Likewise.
5973         (vsubq_m_n_u8): Likewise.
5974         (vsubq_m_n_u32): Likewise.
5975         (vsubq_m_n_u16): Likewise.
5976         (__arm_vabdq_m_s8): Define intrinsic.
5977         (__arm_vabdq_m_s32): Likewise.
5978         (__arm_vabdq_m_s16): Likewise.
5979         (__arm_vabdq_m_u8): Likewise.
5980         (__arm_vabdq_m_u32): Likewise.
5981         (__arm_vabdq_m_u16): Likewise.
5982         (__arm_vaddq_m_n_s8): Likewise.
5983         (__arm_vaddq_m_n_s32): Likewise.
5984         (__arm_vaddq_m_n_s16): Likewise.
5985         (__arm_vaddq_m_n_u8): Likewise.
5986         (__arm_vaddq_m_n_u32): Likewise.
5987         (__arm_vaddq_m_n_u16): Likewise.
5988         (__arm_vaddq_m_s8): Likewise.
5989         (__arm_vaddq_m_s32): Likewise.
5990         (__arm_vaddq_m_s16): Likewise.
5991         (__arm_vaddq_m_u8): Likewise.
5992         (__arm_vaddq_m_u32): Likewise.
5993         (__arm_vaddq_m_u16): Likewise.
5994         (__arm_vandq_m_s8): Likewise.
5995         (__arm_vandq_m_s32): Likewise.
5996         (__arm_vandq_m_s16): Likewise.
5997         (__arm_vandq_m_u8): Likewise.
5998         (__arm_vandq_m_u32): Likewise.
5999         (__arm_vandq_m_u16): Likewise.
6000         (__arm_vbicq_m_s8): Likewise.
6001         (__arm_vbicq_m_s32): Likewise.
6002         (__arm_vbicq_m_s16): Likewise.
6003         (__arm_vbicq_m_u8): Likewise.
6004         (__arm_vbicq_m_u32): Likewise.
6005         (__arm_vbicq_m_u16): Likewise.
6006         (__arm_vbrsrq_m_n_s8): Likewise.
6007         (__arm_vbrsrq_m_n_s32): Likewise.
6008         (__arm_vbrsrq_m_n_s16): Likewise.
6009         (__arm_vbrsrq_m_n_u8): Likewise.
6010         (__arm_vbrsrq_m_n_u32): Likewise.
6011         (__arm_vbrsrq_m_n_u16): Likewise.
6012         (__arm_vcaddq_rot270_m_s8): Likewise.
6013         (__arm_vcaddq_rot270_m_s32): Likewise.
6014         (__arm_vcaddq_rot270_m_s16): Likewise.
6015         (__arm_vcaddq_rot270_m_u8): Likewise.
6016         (__arm_vcaddq_rot270_m_u32): Likewise.
6017         (__arm_vcaddq_rot270_m_u16): Likewise.
6018         (__arm_vcaddq_rot90_m_s8): Likewise.
6019         (__arm_vcaddq_rot90_m_s32): Likewise.
6020         (__arm_vcaddq_rot90_m_s16): Likewise.
6021         (__arm_vcaddq_rot90_m_u8): Likewise.
6022         (__arm_vcaddq_rot90_m_u32): Likewise.
6023         (__arm_vcaddq_rot90_m_u16): Likewise.
6024         (__arm_veorq_m_s8): Likewise.
6025         (__arm_veorq_m_s32): Likewise.
6026         (__arm_veorq_m_s16): Likewise.
6027         (__arm_veorq_m_u8): Likewise.
6028         (__arm_veorq_m_u32): Likewise.
6029         (__arm_veorq_m_u16): Likewise.
6030         (__arm_vhaddq_m_n_s8): Likewise.
6031         (__arm_vhaddq_m_n_s32): Likewise.
6032         (__arm_vhaddq_m_n_s16): Likewise.
6033         (__arm_vhaddq_m_n_u8): Likewise.
6034         (__arm_vhaddq_m_n_u32): Likewise.
6035         (__arm_vhaddq_m_n_u16): Likewise.
6036         (__arm_vhaddq_m_s8): Likewise.
6037         (__arm_vhaddq_m_s32): Likewise.
6038         (__arm_vhaddq_m_s16): Likewise.
6039         (__arm_vhaddq_m_u8): Likewise.
6040         (__arm_vhaddq_m_u32): Likewise.
6041         (__arm_vhaddq_m_u16): Likewise.
6042         (__arm_vhcaddq_rot270_m_s8): Likewise.
6043         (__arm_vhcaddq_rot270_m_s32): Likewise.
6044         (__arm_vhcaddq_rot270_m_s16): Likewise.
6045         (__arm_vhcaddq_rot90_m_s8): Likewise.
6046         (__arm_vhcaddq_rot90_m_s32): Likewise.
6047         (__arm_vhcaddq_rot90_m_s16): Likewise.
6048         (__arm_vhsubq_m_n_s8): Likewise.
6049         (__arm_vhsubq_m_n_s32): Likewise.
6050         (__arm_vhsubq_m_n_s16): Likewise.
6051         (__arm_vhsubq_m_n_u8): Likewise.
6052         (__arm_vhsubq_m_n_u32): Likewise.
6053         (__arm_vhsubq_m_n_u16): Likewise.
6054         (__arm_vhsubq_m_s8): Likewise.
6055         (__arm_vhsubq_m_s32): Likewise.
6056         (__arm_vhsubq_m_s16): Likewise.
6057         (__arm_vhsubq_m_u8): Likewise.
6058         (__arm_vhsubq_m_u32): Likewise.
6059         (__arm_vhsubq_m_u16): Likewise.
6060         (__arm_vmaxq_m_s8): Likewise.
6061         (__arm_vmaxq_m_s32): Likewise.
6062         (__arm_vmaxq_m_s16): Likewise.
6063         (__arm_vmaxq_m_u8): Likewise.
6064         (__arm_vmaxq_m_u32): Likewise.
6065         (__arm_vmaxq_m_u16): Likewise.
6066         (__arm_vminq_m_s8): Likewise.
6067         (__arm_vminq_m_s32): Likewise.
6068         (__arm_vminq_m_s16): Likewise.
6069         (__arm_vminq_m_u8): Likewise.
6070         (__arm_vminq_m_u32): Likewise.
6071         (__arm_vminq_m_u16): Likewise.
6072         (__arm_vmladavaq_p_s8): Likewise.
6073         (__arm_vmladavaq_p_s32): Likewise.
6074         (__arm_vmladavaq_p_s16): Likewise.
6075         (__arm_vmladavaq_p_u8): Likewise.
6076         (__arm_vmladavaq_p_u32): Likewise.
6077         (__arm_vmladavaq_p_u16): Likewise.
6078         (__arm_vmladavaxq_p_s8): Likewise.
6079         (__arm_vmladavaxq_p_s32): Likewise.
6080         (__arm_vmladavaxq_p_s16): Likewise.
6081         (__arm_vmlaq_m_n_s8): Likewise.
6082         (__arm_vmlaq_m_n_s32): Likewise.
6083         (__arm_vmlaq_m_n_s16): Likewise.
6084         (__arm_vmlaq_m_n_u8): Likewise.
6085         (__arm_vmlaq_m_n_u32): Likewise.
6086         (__arm_vmlaq_m_n_u16): Likewise.
6087         (__arm_vmlasq_m_n_s8): Likewise.
6088         (__arm_vmlasq_m_n_s32): Likewise.
6089         (__arm_vmlasq_m_n_s16): Likewise.
6090         (__arm_vmlasq_m_n_u8): Likewise.
6091         (__arm_vmlasq_m_n_u32): Likewise.
6092         (__arm_vmlasq_m_n_u16): Likewise.
6093         (__arm_vmlsdavaq_p_s8): Likewise.
6094         (__arm_vmlsdavaq_p_s32): Likewise.
6095         (__arm_vmlsdavaq_p_s16): Likewise.
6096         (__arm_vmlsdavaxq_p_s8): Likewise.
6097         (__arm_vmlsdavaxq_p_s32): Likewise.
6098         (__arm_vmlsdavaxq_p_s16): Likewise.
6099         (__arm_vmulhq_m_s8): Likewise.
6100         (__arm_vmulhq_m_s32): Likewise.
6101         (__arm_vmulhq_m_s16): Likewise.
6102         (__arm_vmulhq_m_u8): Likewise.
6103         (__arm_vmulhq_m_u32): Likewise.
6104         (__arm_vmulhq_m_u16): Likewise.
6105         (__arm_vmullbq_int_m_s8): Likewise.
6106         (__arm_vmullbq_int_m_s32): Likewise.
6107         (__arm_vmullbq_int_m_s16): Likewise.
6108         (__arm_vmullbq_int_m_u8): Likewise.
6109         (__arm_vmullbq_int_m_u32): Likewise.
6110         (__arm_vmullbq_int_m_u16): Likewise.
6111         (__arm_vmulltq_int_m_s8): Likewise.
6112         (__arm_vmulltq_int_m_s32): Likewise.
6113         (__arm_vmulltq_int_m_s16): Likewise.
6114         (__arm_vmulltq_int_m_u8): Likewise.
6115         (__arm_vmulltq_int_m_u32): Likewise.
6116         (__arm_vmulltq_int_m_u16): Likewise.
6117         (__arm_vmulq_m_n_s8): Likewise.
6118         (__arm_vmulq_m_n_s32): Likewise.
6119         (__arm_vmulq_m_n_s16): Likewise.
6120         (__arm_vmulq_m_n_u8): Likewise.
6121         (__arm_vmulq_m_n_u32): Likewise.
6122         (__arm_vmulq_m_n_u16): Likewise.
6123         (__arm_vmulq_m_s8): Likewise.
6124         (__arm_vmulq_m_s32): Likewise.
6125         (__arm_vmulq_m_s16): Likewise.
6126         (__arm_vmulq_m_u8): Likewise.
6127         (__arm_vmulq_m_u32): Likewise.
6128         (__arm_vmulq_m_u16): Likewise.
6129         (__arm_vornq_m_s8): Likewise.
6130         (__arm_vornq_m_s32): Likewise.
6131         (__arm_vornq_m_s16): Likewise.
6132         (__arm_vornq_m_u8): Likewise.
6133         (__arm_vornq_m_u32): Likewise.
6134         (__arm_vornq_m_u16): Likewise.
6135         (__arm_vorrq_m_s8): Likewise.
6136         (__arm_vorrq_m_s32): Likewise.
6137         (__arm_vorrq_m_s16): Likewise.
6138         (__arm_vorrq_m_u8): Likewise.
6139         (__arm_vorrq_m_u32): Likewise.
6140         (__arm_vorrq_m_u16): Likewise.
6141         (__arm_vqaddq_m_n_s8): Likewise.
6142         (__arm_vqaddq_m_n_s32): Likewise.
6143         (__arm_vqaddq_m_n_s16): Likewise.
6144         (__arm_vqaddq_m_n_u8): Likewise.
6145         (__arm_vqaddq_m_n_u32): Likewise.
6146         (__arm_vqaddq_m_n_u16): Likewise.
6147         (__arm_vqaddq_m_s8): Likewise.
6148         (__arm_vqaddq_m_s32): Likewise.
6149         (__arm_vqaddq_m_s16): Likewise.
6150         (__arm_vqaddq_m_u8): Likewise.
6151         (__arm_vqaddq_m_u32): Likewise.
6152         (__arm_vqaddq_m_u16): Likewise.
6153         (__arm_vqdmladhq_m_s8): Likewise.
6154         (__arm_vqdmladhq_m_s32): Likewise.
6155         (__arm_vqdmladhq_m_s16): Likewise.
6156         (__arm_vqdmladhxq_m_s8): Likewise.
6157         (__arm_vqdmladhxq_m_s32): Likewise.
6158         (__arm_vqdmladhxq_m_s16): Likewise.
6159         (__arm_vqdmlahq_m_n_s8): Likewise.
6160         (__arm_vqdmlahq_m_n_s32): Likewise.
6161         (__arm_vqdmlahq_m_n_s16): Likewise.
6162         (__arm_vqdmlahq_m_n_u8): Likewise.
6163         (__arm_vqdmlahq_m_n_u32): Likewise.
6164         (__arm_vqdmlahq_m_n_u16): Likewise.
6165         (__arm_vqdmlsdhq_m_s8): Likewise.
6166         (__arm_vqdmlsdhq_m_s32): Likewise.
6167         (__arm_vqdmlsdhq_m_s16): Likewise.
6168         (__arm_vqdmlsdhxq_m_s8): Likewise.
6169         (__arm_vqdmlsdhxq_m_s32): Likewise.
6170         (__arm_vqdmlsdhxq_m_s16): Likewise.
6171         (__arm_vqdmulhq_m_n_s8): Likewise.
6172         (__arm_vqdmulhq_m_n_s32): Likewise.
6173         (__arm_vqdmulhq_m_n_s16): Likewise.
6174         (__arm_vqdmulhq_m_s8): Likewise.
6175         (__arm_vqdmulhq_m_s32): Likewise.
6176         (__arm_vqdmulhq_m_s16): Likewise.
6177         (__arm_vqrdmladhq_m_s8): Likewise.
6178         (__arm_vqrdmladhq_m_s32): Likewise.
6179         (__arm_vqrdmladhq_m_s16): Likewise.
6180         (__arm_vqrdmladhxq_m_s8): Likewise.
6181         (__arm_vqrdmladhxq_m_s32): Likewise.
6182         (__arm_vqrdmladhxq_m_s16): Likewise.
6183         (__arm_vqrdmlahq_m_n_s8): Likewise.
6184         (__arm_vqrdmlahq_m_n_s32): Likewise.
6185         (__arm_vqrdmlahq_m_n_s16): Likewise.
6186         (__arm_vqrdmlahq_m_n_u8): Likewise.
6187         (__arm_vqrdmlahq_m_n_u32): Likewise.
6188         (__arm_vqrdmlahq_m_n_u16): Likewise.
6189         (__arm_vqrdmlashq_m_n_s8): Likewise.
6190         (__arm_vqrdmlashq_m_n_s32): Likewise.
6191         (__arm_vqrdmlashq_m_n_s16): Likewise.
6192         (__arm_vqrdmlashq_m_n_u8): Likewise.
6193         (__arm_vqrdmlashq_m_n_u32): Likewise.
6194         (__arm_vqrdmlashq_m_n_u16): Likewise.
6195         (__arm_vqrdmlsdhq_m_s8): Likewise.
6196         (__arm_vqrdmlsdhq_m_s32): Likewise.
6197         (__arm_vqrdmlsdhq_m_s16): Likewise.
6198         (__arm_vqrdmlsdhxq_m_s8): Likewise.
6199         (__arm_vqrdmlsdhxq_m_s32): Likewise.
6200         (__arm_vqrdmlsdhxq_m_s16): Likewise.
6201         (__arm_vqrdmulhq_m_n_s8): Likewise.
6202         (__arm_vqrdmulhq_m_n_s32): Likewise.
6203         (__arm_vqrdmulhq_m_n_s16): Likewise.
6204         (__arm_vqrdmulhq_m_s8): Likewise.
6205         (__arm_vqrdmulhq_m_s32): Likewise.
6206         (__arm_vqrdmulhq_m_s16): Likewise.
6207         (__arm_vqrshlq_m_s8): Likewise.
6208         (__arm_vqrshlq_m_s32): Likewise.
6209         (__arm_vqrshlq_m_s16): Likewise.
6210         (__arm_vqrshlq_m_u8): Likewise.
6211         (__arm_vqrshlq_m_u32): Likewise.
6212         (__arm_vqrshlq_m_u16): Likewise.
6213         (__arm_vqshlq_m_n_s8): Likewise.
6214         (__arm_vqshlq_m_n_s32): Likewise.
6215         (__arm_vqshlq_m_n_s16): Likewise.
6216         (__arm_vqshlq_m_n_u8): Likewise.
6217         (__arm_vqshlq_m_n_u32): Likewise.
6218         (__arm_vqshlq_m_n_u16): Likewise.
6219         (__arm_vqshlq_m_s8): Likewise.
6220         (__arm_vqshlq_m_s32): Likewise.
6221         (__arm_vqshlq_m_s16): Likewise.
6222         (__arm_vqshlq_m_u8): Likewise.
6223         (__arm_vqshlq_m_u32): Likewise.
6224         (__arm_vqshlq_m_u16): Likewise.
6225         (__arm_vqsubq_m_n_s8): Likewise.
6226         (__arm_vqsubq_m_n_s32): Likewise.
6227         (__arm_vqsubq_m_n_s16): Likewise.
6228         (__arm_vqsubq_m_n_u8): Likewise.
6229         (__arm_vqsubq_m_n_u32): Likewise.
6230         (__arm_vqsubq_m_n_u16): Likewise.
6231         (__arm_vqsubq_m_s8): Likewise.
6232         (__arm_vqsubq_m_s32): Likewise.
6233         (__arm_vqsubq_m_s16): Likewise.
6234         (__arm_vqsubq_m_u8): Likewise.
6235         (__arm_vqsubq_m_u32): Likewise.
6236         (__arm_vqsubq_m_u16): Likewise.
6237         (__arm_vrhaddq_m_s8): Likewise.
6238         (__arm_vrhaddq_m_s32): Likewise.
6239         (__arm_vrhaddq_m_s16): Likewise.
6240         (__arm_vrhaddq_m_u8): Likewise.
6241         (__arm_vrhaddq_m_u32): Likewise.
6242         (__arm_vrhaddq_m_u16): Likewise.
6243         (__arm_vrmulhq_m_s8): Likewise.
6244         (__arm_vrmulhq_m_s32): Likewise.
6245         (__arm_vrmulhq_m_s16): Likewise.
6246         (__arm_vrmulhq_m_u8): Likewise.
6247         (__arm_vrmulhq_m_u32): Likewise.
6248         (__arm_vrmulhq_m_u16): Likewise.
6249         (__arm_vrshlq_m_s8): Likewise.
6250         (__arm_vrshlq_m_s32): Likewise.
6251         (__arm_vrshlq_m_s16): Likewise.
6252         (__arm_vrshlq_m_u8): Likewise.
6253         (__arm_vrshlq_m_u32): Likewise.
6254         (__arm_vrshlq_m_u16): Likewise.
6255         (__arm_vrshrq_m_n_s8): Likewise.
6256         (__arm_vrshrq_m_n_s32): Likewise.
6257         (__arm_vrshrq_m_n_s16): Likewise.
6258         (__arm_vrshrq_m_n_u8): Likewise.
6259         (__arm_vrshrq_m_n_u32): Likewise.
6260         (__arm_vrshrq_m_n_u16): Likewise.
6261         (__arm_vshlq_m_n_s8): Likewise.
6262         (__arm_vshlq_m_n_s32): Likewise.
6263         (__arm_vshlq_m_n_s16): Likewise.
6264         (__arm_vshlq_m_n_u8): Likewise.
6265         (__arm_vshlq_m_n_u32): Likewise.
6266         (__arm_vshlq_m_n_u16): Likewise.
6267         (__arm_vshrq_m_n_s8): Likewise.
6268         (__arm_vshrq_m_n_s32): Likewise.
6269         (__arm_vshrq_m_n_s16): Likewise.
6270         (__arm_vshrq_m_n_u8): Likewise.
6271         (__arm_vshrq_m_n_u32): Likewise.
6272         (__arm_vshrq_m_n_u16): Likewise.
6273         (__arm_vsliq_m_n_s8): Likewise.
6274         (__arm_vsliq_m_n_s32): Likewise.
6275         (__arm_vsliq_m_n_s16): Likewise.
6276         (__arm_vsliq_m_n_u8): Likewise.
6277         (__arm_vsliq_m_n_u32): Likewise.
6278         (__arm_vsliq_m_n_u16): Likewise.
6279         (__arm_vsubq_m_n_s8): Likewise.
6280         (__arm_vsubq_m_n_s32): Likewise.
6281         (__arm_vsubq_m_n_s16): Likewise.
6282         (__arm_vsubq_m_n_u8): Likewise.
6283         (__arm_vsubq_m_n_u32): Likewise.
6284         (__arm_vsubq_m_n_u16): Likewise.
6285         (vqdmladhq_m): Define polymorphic variant.
6286         (vqdmladhxq_m): Likewise.
6287         (vqdmlsdhq_m): Likewise.
6288         (vqdmlsdhxq_m): Likewise.
6289         (vabdq_m): Likewise.
6290         (vandq_m): Likewise.
6291         (vbicq_m): Likewise.
6292         (vbrsrq_m_n): Likewise.
6293         (vcaddq_rot270_m): Likewise.
6294         (vcaddq_rot90_m): Likewise.
6295         (veorq_m): Likewise.
6296         (vmaxq_m): Likewise.
6297         (vminq_m): Likewise.
6298         (vmladavaq_p): Likewise.
6299         (vmlaq_m_n): Likewise.
6300         (vmlasq_m_n): Likewise.
6301         (vmulhq_m): Likewise.
6302         (vmullbq_int_m): Likewise.
6303         (vmulltq_int_m): Likewise.
6304         (vornq_m): Likewise.
6305         (vorrq_m): Likewise.
6306         (vqdmlahq_m_n): Likewise.
6307         (vqrdmlahq_m_n): Likewise.
6308         (vqrdmlashq_m_n): Likewise.
6309         (vqrshlq_m): Likewise.
6310         (vqshlq_m_n): Likewise.
6311         (vqshlq_m): Likewise.
6312         (vrhaddq_m): Likewise.
6313         (vrmulhq_m): Likewise.
6314         (vrshlq_m): Likewise.
6315         (vrshrq_m_n): Likewise.
6316         (vshlq_m_n): Likewise.
6317         (vshrq_m_n): Likewise.
6318         (vsliq_m): Likewise.
6319         (vaddq_m_n): Likewise.
6320         (vaddq_m): Likewise.
6321         (vhaddq_m_n): Likewise.
6322         (vhaddq_m): Likewise.
6323         (vhcaddq_rot270_m): Likewise.
6324         (vhcaddq_rot90_m): Likewise.
6325         (vhsubq_m): Likewise.
6326         (vhsubq_m_n): Likewise.
6327         (vmulq_m_n): Likewise.
6328         (vmulq_m): Likewise.
6329         (vqaddq_m_n): Likewise.
6330         (vqaddq_m): Likewise.
6331         (vqdmulhq_m_n): Likewise.
6332         (vqdmulhq_m): Likewise.
6333         (vsubq_m_n): Likewise.
6334         (vsliq_m_n): Likewise.
6335         (vqsubq_m_n): Likewise.
6336         (vqsubq_m): Likewise.
6337         (vqrdmulhq_m): Likewise.
6338         (vqrdmulhq_m_n): Likewise.
6339         (vqrdmlsdhxq_m): Likewise.
6340         (vqrdmlsdhq_m): Likewise.
6341         (vqrdmladhq_m): Likewise.
6342         (vqrdmladhxq_m): Likewise.
6343         (vmlsdavaxq_p): Likewise.
6344         (vmlsdavaq_p): Likewise.
6345         (vmladavaxq_p): Likewise.
6346         * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
6347         builtin qualifier.
6348         (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
6349         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
6350         (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
6351         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
6352         * config/arm/mve.md (VHSUBQ_M): Define iterators.
6353         (VSLIQ_M_N): Likewise.
6354         (VQRDMLAHQ_M_N): Likewise.
6355         (VRSHLQ_M): Likewise.
6356         (VMINQ_M): Likewise.
6357         (VMULLBQ_INT_M): Likewise.
6358         (VMULHQ_M): Likewise.
6359         (VMULQ_M): Likewise.
6360         (VHSUBQ_M_N): Likewise.
6361         (VHADDQ_M_N): Likewise.
6362         (VORRQ_M): Likewise.
6363         (VRMULHQ_M): Likewise.
6364         (VQADDQ_M): Likewise.
6365         (VRSHRQ_M_N): Likewise.
6366         (VQSUBQ_M_N): Likewise.
6367         (VADDQ_M): Likewise.
6368         (VORNQ_M): Likewise.
6369         (VQDMLAHQ_M_N): Likewise.
6370         (VRHADDQ_M): Likewise.
6371         (VQSHLQ_M): Likewise.
6372         (VANDQ_M): Likewise.
6373         (VBICQ_M): Likewise.
6374         (VSHLQ_M_N): Likewise.
6375         (VCADDQ_ROT270_M): Likewise.
6376         (VQRSHLQ_M): Likewise.
6377         (VQADDQ_M_N): Likewise.
6378         (VADDQ_M_N): Likewise.
6379         (VMAXQ_M): Likewise.
6380         (VQSUBQ_M): Likewise.
6381         (VMLASQ_M_N): Likewise.
6382         (VMLADAVAQ_P): Likewise.
6383         (VBRSRQ_M_N): Likewise.
6384         (VMULQ_M_N): Likewise.
6385         (VCADDQ_ROT90_M): Likewise.
6386         (VMULLTQ_INT_M): Likewise.
6387         (VEORQ_M): Likewise.
6388         (VSHRQ_M_N): Likewise.
6389         (VSUBQ_M_N): Likewise.
6390         (VHADDQ_M): Likewise.
6391         (VABDQ_M): Likewise.
6392         (VQRDMLASHQ_M_N): Likewise.
6393         (VMLAQ_M_N): Likewise.
6394         (VQSHLQ_M_N): Likewise.
6395         (mve_vabdq_m_<supf><mode>): Define RTL pattern.
6396         (mve_vaddq_m_n_<supf><mode>): Likewise.
6397         (mve_vaddq_m_<supf><mode>): Likewise.
6398         (mve_vandq_m_<supf><mode>): Likewise.
6399         (mve_vbicq_m_<supf><mode>): Likewise.
6400         (mve_vbrsrq_m_n_<supf><mode>): Likewise.
6401         (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
6402         (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
6403         (mve_veorq_m_<supf><mode>): Likewise.
6404         (mve_vhaddq_m_n_<supf><mode>): Likewise.
6405         (mve_vhaddq_m_<supf><mode>): Likewise.
6406         (mve_vhsubq_m_n_<supf><mode>): Likewise.
6407         (mve_vhsubq_m_<supf><mode>): Likewise.
6408         (mve_vmaxq_m_<supf><mode>): Likewise.
6409         (mve_vminq_m_<supf><mode>): Likewise.
6410         (mve_vmladavaq_p_<supf><mode>): Likewise.
6411         (mve_vmlaq_m_n_<supf><mode>): Likewise.
6412         (mve_vmlasq_m_n_<supf><mode>): Likewise.
6413         (mve_vmulhq_m_<supf><mode>): Likewise.
6414         (mve_vmullbq_int_m_<supf><mode>): Likewise.
6415         (mve_vmulltq_int_m_<supf><mode>): Likewise.
6416         (mve_vmulq_m_n_<supf><mode>): Likewise.
6417         (mve_vmulq_m_<supf><mode>): Likewise.
6418         (mve_vornq_m_<supf><mode>): Likewise.
6419         (mve_vorrq_m_<supf><mode>): Likewise.
6420         (mve_vqaddq_m_n_<supf><mode>): Likewise.
6421         (mve_vqaddq_m_<supf><mode>): Likewise.
6422         (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
6423         (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
6424         (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
6425         (mve_vqrshlq_m_<supf><mode>): Likewise.
6426         (mve_vqshlq_m_n_<supf><mode>): Likewise.
6427         (mve_vqshlq_m_<supf><mode>): Likewise.
6428         (mve_vqsubq_m_n_<supf><mode>): Likewise.
6429         (mve_vqsubq_m_<supf><mode>): Likewise.
6430         (mve_vrhaddq_m_<supf><mode>): Likewise.
6431         (mve_vrmulhq_m_<supf><mode>): Likewise.
6432         (mve_vrshlq_m_<supf><mode>): Likewise.
6433         (mve_vrshrq_m_n_<supf><mode>): Likewise.
6434         (mve_vshlq_m_n_<supf><mode>): Likewise.
6435         (mve_vshrq_m_n_<supf><mode>): Likewise.
6436         (mve_vsliq_m_n_<supf><mode>): Likewise.
6437         (mve_vsubq_m_n_<supf><mode>): Likewise.
6438         (mve_vhcaddq_rot270_m_s<mode>): Likewise.
6439         (mve_vhcaddq_rot90_m_s<mode>): Likewise.
6440         (mve_vmladavaxq_p_s<mode>): Likewise.
6441         (mve_vmlsdavaq_p_s<mode>): Likewise.
6442         (mve_vmlsdavaxq_p_s<mode>): Likewise.
6443         (mve_vqdmladhq_m_s<mode>): Likewise.
6444         (mve_vqdmladhxq_m_s<mode>): Likewise.
6445         (mve_vqdmlsdhq_m_s<mode>): Likewise.
6446         (mve_vqdmlsdhxq_m_s<mode>): Likewise.
6447         (mve_vqdmulhq_m_n_s<mode>): Likewise.
6448         (mve_vqdmulhq_m_s<mode>): Likewise.
6449         (mve_vqrdmladhq_m_s<mode>): Likewise.
6450         (mve_vqrdmladhxq_m_s<mode>): Likewise.
6451         (mve_vqrdmlsdhq_m_s<mode>): Likewise.
6452         (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
6453         (mve_vqrdmulhq_m_n_s<mode>): Likewise.
6454         (mve_vqrdmulhq_m_s<mode>): Likewise.
6455
6456 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
6457             Mihail Ionescu  <mihail.ionescu@arm.com>
6458             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
6459
6460         * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
6461         Define builtin qualifier.
6462         (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6463         (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6464         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
6465         (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6466         (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6467         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6468         (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
6469         * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
6470         (vsubq_m_s8): Likewise.
6471         (vcvtq_m_n_f16_u16): Likewise.
6472         (vqshluq_m_n_s8): Likewise.
6473         (vabavq_p_s8): Likewise.
6474         (vsriq_m_n_u8): Likewise.
6475         (vshlq_m_u8): Likewise.
6476         (vsubq_m_u8): Likewise.
6477         (vabavq_p_u8): Likewise.
6478         (vshlq_m_s8): Likewise.
6479         (vcvtq_m_n_f16_s16): Likewise.
6480         (vsriq_m_n_s16): Likewise.
6481         (vsubq_m_s16): Likewise.
6482         (vcvtq_m_n_f32_u32): Likewise.
6483         (vqshluq_m_n_s16): Likewise.
6484         (vabavq_p_s16): Likewise.
6485         (vsriq_m_n_u16): Likewise.
6486         (vshlq_m_u16): Likewise.
6487         (vsubq_m_u16): Likewise.
6488         (vabavq_p_u16): Likewise.
6489         (vshlq_m_s16): Likewise.
6490         (vcvtq_m_n_f32_s32): Likewise.
6491         (vsriq_m_n_s32): Likewise.
6492         (vsubq_m_s32): Likewise.
6493         (vqshluq_m_n_s32): Likewise.
6494         (vabavq_p_s32): Likewise.
6495         (vsriq_m_n_u32): Likewise.
6496         (vshlq_m_u32): Likewise.
6497         (vsubq_m_u32): Likewise.
6498         (vabavq_p_u32): Likewise.
6499         (vshlq_m_s32): Likewise.
6500         (__arm_vsriq_m_n_s8): Define intrinsic.
6501         (__arm_vsubq_m_s8): Likewise.
6502         (__arm_vqshluq_m_n_s8): Likewise.
6503         (__arm_vabavq_p_s8): Likewise.
6504         (__arm_vsriq_m_n_u8): Likewise.
6505         (__arm_vshlq_m_u8): Likewise.
6506         (__arm_vsubq_m_u8): Likewise.
6507         (__arm_vabavq_p_u8): Likewise.
6508         (__arm_vshlq_m_s8): Likewise.
6509         (__arm_vsriq_m_n_s16): Likewise.
6510         (__arm_vsubq_m_s16): Likewise.
6511         (__arm_vqshluq_m_n_s16): Likewise.
6512         (__arm_vabavq_p_s16): Likewise.
6513         (__arm_vsriq_m_n_u16): Likewise.
6514         (__arm_vshlq_m_u16): Likewise.
6515         (__arm_vsubq_m_u16): Likewise.
6516         (__arm_vabavq_p_u16): Likewise.
6517         (__arm_vshlq_m_s16): Likewise.
6518         (__arm_vsriq_m_n_s32): Likewise.
6519         (__arm_vsubq_m_s32): Likewise.
6520         (__arm_vqshluq_m_n_s32): Likewise.
6521         (__arm_vabavq_p_s32): Likewise.
6522         (__arm_vsriq_m_n_u32): Likewise.
6523         (__arm_vshlq_m_u32): Likewise.
6524         (__arm_vsubq_m_u32): Likewise.
6525         (__arm_vabavq_p_u32): Likewise.
6526         (__arm_vshlq_m_s32): Likewise.
6527         (__arm_vcvtq_m_n_f16_u16): Likewise.
6528         (__arm_vcvtq_m_n_f16_s16): Likewise.
6529         (__arm_vcvtq_m_n_f32_u32): Likewise.
6530         (__arm_vcvtq_m_n_f32_s32): Likewise.
6531         (vcvtq_m_n): Define polymorphic variant.
6532         (vqshluq_m_n): Likewise.
6533         (vshlq_m): Likewise.
6534         (vsriq_m_n): Likewise.
6535         (vsubq_m): Likewise.
6536         (vabavq_p): Likewise.
6537         * config/arm/arm_mve_builtins.def
6538         (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
6539         (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6540         (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6541         (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
6542         (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6543         (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6544         (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6545         (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
6546         * config/arm/mve.md (VABAVQ_P): Define iterator.
6547         (VSHLQ_M): Likewise.
6548         (VSRIQ_M_N): Likewise.
6549         (VSUBQ_M): Likewise.
6550         (VCVTQ_M_N_TO_F): Likewise.
6551         (mve_vabavq_p_<supf><mode>): Define RTL pattern.
6552         (mve_vqshluq_m_n_s<mode>): Likewise.
6553         (mve_vshlq_m_<supf><mode>): Likewise.
6554         (mve_vsriq_m_n_<supf><mode>): Likewise.
6555         (mve_vsubq_m_<supf><mode>): Likewise.
6556         (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
6557
6558 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
6559             Mihail Ionescu  <mihail.ionescu@arm.com>
6560             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
6561
6562         * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
6563         (vrmlsldavhaq_s32): Likewise.
6564         (vrmlsldavhaxq_s32): Likewise.
6565         (vaddlvaq_p_s32): Likewise.
6566         (vcvtbq_m_f16_f32): Likewise.
6567         (vcvtbq_m_f32_f16): Likewise.
6568         (vcvttq_m_f16_f32): Likewise.
6569         (vcvttq_m_f32_f16): Likewise.
6570         (vrev16q_m_s8): Likewise.
6571         (vrev32q_m_f16): Likewise.
6572         (vrmlaldavhq_p_s32): Likewise.
6573         (vrmlaldavhxq_p_s32): Likewise.
6574         (vrmlsldavhq_p_s32): Likewise.
6575         (vrmlsldavhxq_p_s32): Likewise.
6576         (vaddlvaq_p_u32): Likewise.
6577         (vrev16q_m_u8): Likewise.
6578         (vrmlaldavhq_p_u32): Likewise.
6579         (vmvnq_m_n_s16): Likewise.
6580         (vorrq_m_n_s16): Likewise.
6581         (vqrshrntq_n_s16): Likewise.
6582         (vqshrnbq_n_s16): Likewise.
6583         (vqshrntq_n_s16): Likewise.
6584         (vrshrnbq_n_s16): Likewise.
6585         (vrshrntq_n_s16): Likewise.
6586         (vshrnbq_n_s16): Likewise.
6587         (vshrntq_n_s16): Likewise.
6588         (vcmlaq_f16): Likewise.
6589         (vcmlaq_rot180_f16): Likewise.
6590         (vcmlaq_rot270_f16): Likewise.
6591         (vcmlaq_rot90_f16): Likewise.
6592         (vfmaq_f16): Likewise.
6593         (vfmaq_n_f16): Likewise.
6594         (vfmasq_n_f16): Likewise.
6595         (vfmsq_f16): Likewise.
6596         (vmlaldavaq_s16): Likewise.
6597         (vmlaldavaxq_s16): Likewise.
6598         (vmlsldavaq_s16): Likewise.
6599         (vmlsldavaxq_s16): Likewise.
6600         (vabsq_m_f16): Likewise.
6601         (vcvtmq_m_s16_f16): Likewise.
6602         (vcvtnq_m_s16_f16): Likewise.
6603         (vcvtpq_m_s16_f16): Likewise.
6604         (vcvtq_m_s16_f16): Likewise.
6605         (vdupq_m_n_f16): Likewise.
6606         (vmaxnmaq_m_f16): Likewise.
6607         (vmaxnmavq_p_f16): Likewise.
6608         (vmaxnmvq_p_f16): Likewise.
6609         (vminnmaq_m_f16): Likewise.
6610         (vminnmavq_p_f16): Likewise.
6611         (vminnmvq_p_f16): Likewise.
6612         (vmlaldavq_p_s16): Likewise.
6613         (vmlaldavxq_p_s16): Likewise.
6614         (vmlsldavq_p_s16): Likewise.
6615         (vmlsldavxq_p_s16): Likewise.
6616         (vmovlbq_m_s8): Likewise.
6617         (vmovltq_m_s8): Likewise.
6618         (vmovnbq_m_s16): Likewise.
6619         (vmovntq_m_s16): Likewise.
6620         (vnegq_m_f16): Likewise.
6621         (vpselq_f16): Likewise.
6622         (vqmovnbq_m_s16): Likewise.
6623         (vqmovntq_m_s16): Likewise.
6624         (vrev32q_m_s8): Likewise.
6625         (vrev64q_m_f16): Likewise.
6626         (vrndaq_m_f16): Likewise.
6627         (vrndmq_m_f16): Likewise.
6628         (vrndnq_m_f16): Likewise.
6629         (vrndpq_m_f16): Likewise.
6630         (vrndq_m_f16): Likewise.
6631         (vrndxq_m_f16): Likewise.
6632         (vcmpeqq_m_n_f16): Likewise.
6633         (vcmpgeq_m_f16): Likewise.
6634         (vcmpgeq_m_n_f16): Likewise.
6635         (vcmpgtq_m_f16): Likewise.
6636         (vcmpgtq_m_n_f16): Likewise.
6637         (vcmpleq_m_f16): Likewise.
6638         (vcmpleq_m_n_f16): Likewise.
6639         (vcmpltq_m_f16): Likewise.
6640         (vcmpltq_m_n_f16): Likewise.
6641         (vcmpneq_m_f16): Likewise.
6642         (vcmpneq_m_n_f16): Likewise.
6643         (vmvnq_m_n_u16): Likewise.
6644         (vorrq_m_n_u16): Likewise.
6645         (vqrshruntq_n_s16): Likewise.
6646         (vqshrunbq_n_s16): Likewise.
6647         (vqshruntq_n_s16): Likewise.
6648         (vcvtmq_m_u16_f16): Likewise.
6649         (vcvtnq_m_u16_f16): Likewise.
6650         (vcvtpq_m_u16_f16): Likewise.
6651         (vcvtq_m_u16_f16): Likewise.
6652         (vqmovunbq_m_s16): Likewise.
6653         (vqmovuntq_m_s16): Likewise.
6654         (vqrshrntq_n_u16): Likewise.
6655         (vqshrnbq_n_u16): Likewise.
6656         (vqshrntq_n_u16): Likewise.
6657         (vrshrnbq_n_u16): Likewise.
6658         (vrshrntq_n_u16): Likewise.
6659         (vshrnbq_n_u16): Likewise.
6660         (vshrntq_n_u16): Likewise.
6661         (vmlaldavaq_u16): Likewise.
6662         (vmlaldavaxq_u16): Likewise.
6663         (vmlaldavq_p_u16): Likewise.
6664         (vmlaldavxq_p_u16): Likewise.
6665         (vmovlbq_m_u8): Likewise.
6666         (vmovltq_m_u8): Likewise.
6667         (vmovnbq_m_u16): Likewise.
6668         (vmovntq_m_u16): Likewise.
6669         (vqmovnbq_m_u16): Likewise.
6670         (vqmovntq_m_u16): Likewise.
6671         (vrev32q_m_u8): Likewise.
6672         (vmvnq_m_n_s32): Likewise.
6673         (vorrq_m_n_s32): Likewise.
6674         (vqrshrntq_n_s32): Likewise.
6675         (vqshrnbq_n_s32): Likewise.
6676         (vqshrntq_n_s32): Likewise.
6677         (vrshrnbq_n_s32): Likewise.
6678         (vrshrntq_n_s32): Likewise.
6679         (vshrnbq_n_s32): Likewise.
6680         (vshrntq_n_s32): Likewise.
6681         (vcmlaq_f32): Likewise.
6682         (vcmlaq_rot180_f32): Likewise.
6683         (vcmlaq_rot270_f32): Likewise.
6684         (vcmlaq_rot90_f32): Likewise.
6685         (vfmaq_f32): Likewise.
6686         (vfmaq_n_f32): Likewise.
6687         (vfmasq_n_f32): Likewise.
6688         (vfmsq_f32): Likewise.
6689         (vmlaldavaq_s32): Likewise.
6690         (vmlaldavaxq_s32): Likewise.
6691         (vmlsldavaq_s32): Likewise.
6692         (vmlsldavaxq_s32): Likewise.
6693         (vabsq_m_f32): Likewise.
6694         (vcvtmq_m_s32_f32): Likewise.
6695         (vcvtnq_m_s32_f32): Likewise.
6696         (vcvtpq_m_s32_f32): Likewise.
6697         (vcvtq_m_s32_f32): Likewise.
6698         (vdupq_m_n_f32): Likewise.
6699         (vmaxnmaq_m_f32): Likewise.
6700         (vmaxnmavq_p_f32): Likewise.
6701         (vmaxnmvq_p_f32): Likewise.
6702         (vminnmaq_m_f32): Likewise.
6703         (vminnmavq_p_f32): Likewise.
6704         (vminnmvq_p_f32): Likewise.
6705         (vmlaldavq_p_s32): Likewise.
6706         (vmlaldavxq_p_s32): Likewise.
6707         (vmlsldavq_p_s32): Likewise.
6708         (vmlsldavxq_p_s32): Likewise.
6709         (vmovlbq_m_s16): Likewise.
6710         (vmovltq_m_s16): Likewise.
6711         (vmovnbq_m_s32): Likewise.
6712         (vmovntq_m_s32): Likewise.
6713         (vnegq_m_f32): Likewise.
6714         (vpselq_f32): Likewise.
6715         (vqmovnbq_m_s32): Likewise.
6716         (vqmovntq_m_s32): Likewise.
6717         (vrev32q_m_s16): Likewise.
6718         (vrev64q_m_f32): Likewise.
6719         (vrndaq_m_f32): Likewise.
6720         (vrndmq_m_f32): Likewise.
6721         (vrndnq_m_f32): Likewise.
6722         (vrndpq_m_f32): Likewise.
6723         (vrndq_m_f32): Likewise.
6724         (vrndxq_m_f32): Likewise.
6725         (vcmpeqq_m_n_f32): Likewise.
6726         (vcmpgeq_m_f32): Likewise.
6727         (vcmpgeq_m_n_f32): Likewise.
6728         (vcmpgtq_m_f32): Likewise.
6729         (vcmpgtq_m_n_f32): Likewise.
6730         (vcmpleq_m_f32): Likewise.
6731         (vcmpleq_m_n_f32): Likewise.
6732         (vcmpltq_m_f32): Likewise.
6733         (vcmpltq_m_n_f32): Likewise.
6734         (vcmpneq_m_f32): Likewise.
6735         (vcmpneq_m_n_f32): Likewise.
6736         (vmvnq_m_n_u32): Likewise.
6737         (vorrq_m_n_u32): Likewise.
6738         (vqrshruntq_n_s32): Likewise.
6739         (vqshrunbq_n_s32): Likewise.
6740         (vqshruntq_n_s32): Likewise.
6741         (vcvtmq_m_u32_f32): Likewise.
6742         (vcvtnq_m_u32_f32): Likewise.
6743         (vcvtpq_m_u32_f32): Likewise.
6744         (vcvtq_m_u32_f32): Likewise.
6745         (vqmovunbq_m_s32): Likewise.
6746         (vqmovuntq_m_s32): Likewise.
6747         (vqrshrntq_n_u32): Likewise.
6748         (vqshrnbq_n_u32): Likewise.
6749         (vqshrntq_n_u32): Likewise.
6750         (vrshrnbq_n_u32): Likewise.
6751         (vrshrntq_n_u32): Likewise.
6752         (vshrnbq_n_u32): Likewise.
6753         (vshrntq_n_u32): Likewise.
6754         (vmlaldavaq_u32): Likewise.
6755         (vmlaldavaxq_u32): Likewise.
6756         (vmlaldavq_p_u32): Likewise.
6757         (vmlaldavxq_p_u32): Likewise.
6758         (vmovlbq_m_u16): Likewise.
6759         (vmovltq_m_u16): Likewise.
6760         (vmovnbq_m_u32): Likewise.
6761         (vmovntq_m_u32): Likewise.
6762         (vqmovnbq_m_u32): Likewise.
6763         (vqmovntq_m_u32): Likewise.
6764         (vrev32q_m_u16): Likewise.
6765         (__arm_vrmlaldavhaxq_s32): Define intrinsic.
6766         (__arm_vrmlsldavhaq_s32): Likewise.
6767         (__arm_vrmlsldavhaxq_s32): Likewise.
6768         (__arm_vaddlvaq_p_s32): Likewise.
6769         (__arm_vrev16q_m_s8): Likewise.
6770         (__arm_vrmlaldavhq_p_s32): Likewise.
6771         (__arm_vrmlaldavhxq_p_s32): Likewise.
6772         (__arm_vrmlsldavhq_p_s32): Likewise.
6773         (__arm_vrmlsldavhxq_p_s32): Likewise.
6774         (__arm_vaddlvaq_p_u32): Likewise.
6775         (__arm_vrev16q_m_u8): Likewise.
6776         (__arm_vrmlaldavhq_p_u32): Likewise.
6777         (__arm_vmvnq_m_n_s16): Likewise.
6778         (__arm_vorrq_m_n_s16): Likewise.
6779         (__arm_vqrshrntq_n_s16): Likewise.
6780         (__arm_vqshrnbq_n_s16): Likewise.
6781         (__arm_vqshrntq_n_s16): Likewise.
6782         (__arm_vrshrnbq_n_s16): Likewise.
6783         (__arm_vrshrntq_n_s16): Likewise.
6784         (__arm_vshrnbq_n_s16): Likewise.
6785         (__arm_vshrntq_n_s16): Likewise.
6786         (__arm_vmlaldavaq_s16): Likewise.
6787         (__arm_vmlaldavaxq_s16): Likewise.
6788         (__arm_vmlsldavaq_s16): Likewise.
6789         (__arm_vmlsldavaxq_s16): Likewise.
6790         (__arm_vmlaldavq_p_s16): Likewise.
6791         (__arm_vmlaldavxq_p_s16): Likewise.
6792         (__arm_vmlsldavq_p_s16): Likewise.
6793         (__arm_vmlsldavxq_p_s16): Likewise.
6794         (__arm_vmovlbq_m_s8): Likewise.
6795         (__arm_vmovltq_m_s8): Likewise.
6796         (__arm_vmovnbq_m_s16): Likewise.
6797         (__arm_vmovntq_m_s16): Likewise.
6798         (__arm_vqmovnbq_m_s16): Likewise.
6799         (__arm_vqmovntq_m_s16): Likewise.
6800         (__arm_vrev32q_m_s8): Likewise.
6801         (__arm_vmvnq_m_n_u16): Likewise.
6802         (__arm_vorrq_m_n_u16): Likewise.
6803         (__arm_vqrshruntq_n_s16): Likewise.
6804         (__arm_vqshrunbq_n_s16): Likewise.
6805         (__arm_vqshruntq_n_s16): Likewise.
6806         (__arm_vqmovunbq_m_s16): Likewise.
6807         (__arm_vqmovuntq_m_s16): Likewise.
6808         (__arm_vqrshrntq_n_u16): Likewise.
6809         (__arm_vqshrnbq_n_u16): Likewise.
6810         (__arm_vqshrntq_n_u16): Likewise.
6811         (__arm_vrshrnbq_n_u16): Likewise.
6812         (__arm_vrshrntq_n_u16): Likewise.
6813         (__arm_vshrnbq_n_u16): Likewise.
6814         (__arm_vshrntq_n_u16): Likewise.
6815         (__arm_vmlaldavaq_u16): Likewise.
6816         (__arm_vmlaldavaxq_u16): Likewise.
6817         (__arm_vmlaldavq_p_u16): Likewise.
6818         (__arm_vmlaldavxq_p_u16): Likewise.
6819         (__arm_vmovlbq_m_u8): Likewise.
6820         (__arm_vmovltq_m_u8): Likewise.
6821         (__arm_vmovnbq_m_u16): Likewise.
6822         (__arm_vmovntq_m_u16): Likewise.
6823         (__arm_vqmovnbq_m_u16): Likewise.
6824         (__arm_vqmovntq_m_u16): Likewise.
6825         (__arm_vrev32q_m_u8): Likewise.
6826         (__arm_vmvnq_m_n_s32): Likewise.
6827         (__arm_vorrq_m_n_s32): Likewise.
6828         (__arm_vqrshrntq_n_s32): Likewise.
6829         (__arm_vqshrnbq_n_s32): Likewise.
6830         (__arm_vqshrntq_n_s32): Likewise.
6831         (__arm_vrshrnbq_n_s32): Likewise.
6832         (__arm_vrshrntq_n_s32): Likewise.
6833         (__arm_vshrnbq_n_s32): Likewise.
6834         (__arm_vshrntq_n_s32): Likewise.
6835         (__arm_vmlaldavaq_s32): Likewise.
6836         (__arm_vmlaldavaxq_s32): Likewise.
6837         (__arm_vmlsldavaq_s32): Likewise.
6838         (__arm_vmlsldavaxq_s32): Likewise.
6839         (__arm_vmlaldavq_p_s32): Likewise.
6840         (__arm_vmlaldavxq_p_s32): Likewise.
6841         (__arm_vmlsldavq_p_s32): Likewise.
6842         (__arm_vmlsldavxq_p_s32): Likewise.
6843         (__arm_vmovlbq_m_s16): Likewise.
6844         (__arm_vmovltq_m_s16): Likewise.
6845         (__arm_vmovnbq_m_s32): Likewise.
6846         (__arm_vmovntq_m_s32): Likewise.
6847         (__arm_vqmovnbq_m_s32): Likewise.
6848         (__arm_vqmovntq_m_s32): Likewise.
6849         (__arm_vrev32q_m_s16): Likewise.
6850         (__arm_vmvnq_m_n_u32): Likewise.
6851         (__arm_vorrq_m_n_u32): Likewise.
6852         (__arm_vqrshruntq_n_s32): Likewise.
6853         (__arm_vqshrunbq_n_s32): Likewise.
6854         (__arm_vqshruntq_n_s32): Likewise.
6855         (__arm_vqmovunbq_m_s32): Likewise.
6856         (__arm_vqmovuntq_m_s32): Likewise.
6857         (__arm_vqrshrntq_n_u32): Likewise.
6858         (__arm_vqshrnbq_n_u32): Likewise.
6859         (__arm_vqshrntq_n_u32): Likewise.
6860         (__arm_vrshrnbq_n_u32): Likewise.
6861         (__arm_vrshrntq_n_u32): Likewise.
6862         (__arm_vshrnbq_n_u32): Likewise.
6863         (__arm_vshrntq_n_u32): Likewise.
6864         (__arm_vmlaldavaq_u32): Likewise.
6865         (__arm_vmlaldavaxq_u32): Likewise.
6866         (__arm_vmlaldavq_p_u32): Likewise.
6867         (__arm_vmlaldavxq_p_u32): Likewise.
6868         (__arm_vmovlbq_m_u16): Likewise.
6869         (__arm_vmovltq_m_u16): Likewise.
6870         (__arm_vmovnbq_m_u32): Likewise.
6871         (__arm_vmovntq_m_u32): Likewise.
6872         (__arm_vqmovnbq_m_u32): Likewise.
6873         (__arm_vqmovntq_m_u32): Likewise.
6874         (__arm_vrev32q_m_u16): Likewise.
6875         (__arm_vcvtbq_m_f16_f32): Likewise.
6876         (__arm_vcvtbq_m_f32_f16): Likewise.
6877         (__arm_vcvttq_m_f16_f32): Likewise.
6878         (__arm_vcvttq_m_f32_f16): Likewise.
6879         (__arm_vrev32q_m_f16): Likewise.
6880         (__arm_vcmlaq_f16): Likewise.
6881         (__arm_vcmlaq_rot180_f16): Likewise.
6882         (__arm_vcmlaq_rot270_f16): Likewise.
6883         (__arm_vcmlaq_rot90_f16): Likewise.
6884         (__arm_vfmaq_f16): Likewise.
6885         (__arm_vfmaq_n_f16): Likewise.
6886         (__arm_vfmasq_n_f16): Likewise.
6887         (__arm_vfmsq_f16): Likewise.
6888         (__arm_vabsq_m_f16): Likewise.
6889         (__arm_vcvtmq_m_s16_f16): Likewise.
6890         (__arm_vcvtnq_m_s16_f16): Likewise.
6891         (__arm_vcvtpq_m_s16_f16): Likewise.
6892         (__arm_vcvtq_m_s16_f16): Likewise.
6893         (__arm_vdupq_m_n_f16): Likewise.
6894         (__arm_vmaxnmaq_m_f16): Likewise.
6895         (__arm_vmaxnmavq_p_f16): Likewise.
6896         (__arm_vmaxnmvq_p_f16): Likewise.
6897         (__arm_vminnmaq_m_f16): Likewise.
6898         (__arm_vminnmavq_p_f16): Likewise.
6899         (__arm_vminnmvq_p_f16): Likewise.
6900         (__arm_vnegq_m_f16): Likewise.
6901         (__arm_vpselq_f16): Likewise.
6902         (__arm_vrev64q_m_f16): Likewise.
6903         (__arm_vrndaq_m_f16): Likewise.
6904         (__arm_vrndmq_m_f16): Likewise.
6905         (__arm_vrndnq_m_f16): Likewise.
6906         (__arm_vrndpq_m_f16): Likewise.
6907         (__arm_vrndq_m_f16): Likewise.
6908         (__arm_vrndxq_m_f16): Likewise.
6909         (__arm_vcmpeqq_m_n_f16): Likewise.
6910         (__arm_vcmpgeq_m_f16): Likewise.
6911         (__arm_vcmpgeq_m_n_f16): Likewise.
6912         (__arm_vcmpgtq_m_f16): Likewise.
6913         (__arm_vcmpgtq_m_n_f16): Likewise.
6914         (__arm_vcmpleq_m_f16): Likewise.
6915         (__arm_vcmpleq_m_n_f16): Likewise.
6916         (__arm_vcmpltq_m_f16): Likewise.
6917         (__arm_vcmpltq_m_n_f16): Likewise.
6918         (__arm_vcmpneq_m_f16): Likewise.
6919         (__arm_vcmpneq_m_n_f16): Likewise.
6920         (__arm_vcvtmq_m_u16_f16): Likewise.
6921         (__arm_vcvtnq_m_u16_f16): Likewise.
6922         (__arm_vcvtpq_m_u16_f16): Likewise.
6923         (__arm_vcvtq_m_u16_f16): Likewise.
6924         (__arm_vcmlaq_f32): Likewise.
6925         (__arm_vcmlaq_rot180_f32): Likewise.
6926         (__arm_vcmlaq_rot270_f32): Likewise.
6927         (__arm_vcmlaq_rot90_f32): Likewise.
6928         (__arm_vfmaq_f32): Likewise.
6929         (__arm_vfmaq_n_f32): Likewise.
6930         (__arm_vfmasq_n_f32): Likewise.
6931         (__arm_vfmsq_f32): Likewise.
6932         (__arm_vabsq_m_f32): Likewise.
6933         (__arm_vcvtmq_m_s32_f32): Likewise.
6934         (__arm_vcvtnq_m_s32_f32): Likewise.
6935         (__arm_vcvtpq_m_s32_f32): Likewise.
6936         (__arm_vcvtq_m_s32_f32): Likewise.
6937         (__arm_vdupq_m_n_f32): Likewise.
6938         (__arm_vmaxnmaq_m_f32): Likewise.
6939         (__arm_vmaxnmavq_p_f32): Likewise.
6940         (__arm_vmaxnmvq_p_f32): Likewise.
6941         (__arm_vminnmaq_m_f32): Likewise.
6942         (__arm_vminnmavq_p_f32): Likewise.
6943         (__arm_vminnmvq_p_f32): Likewise.
6944         (__arm_vnegq_m_f32): Likewise.
6945         (__arm_vpselq_f32): Likewise.
6946         (__arm_vrev64q_m_f32): Likewise.
6947         (__arm_vrndaq_m_f32): Likewise.
6948         (__arm_vrndmq_m_f32): Likewise.
6949         (__arm_vrndnq_m_f32): Likewise.
6950         (__arm_vrndpq_m_f32): Likewise.
6951         (__arm_vrndq_m_f32): Likewise.
6952         (__arm_vrndxq_m_f32): Likewise.
6953         (__arm_vcmpeqq_m_n_f32): Likewise.
6954         (__arm_vcmpgeq_m_f32): Likewise.
6955         (__arm_vcmpgeq_m_n_f32): Likewise.
6956         (__arm_vcmpgtq_m_f32): Likewise.
6957         (__arm_vcmpgtq_m_n_f32): Likewise.
6958         (__arm_vcmpleq_m_f32): Likewise.
6959         (__arm_vcmpleq_m_n_f32): Likewise.
6960         (__arm_vcmpltq_m_f32): Likewise.
6961         (__arm_vcmpltq_m_n_f32): Likewise.
6962         (__arm_vcmpneq_m_f32): Likewise.
6963         (__arm_vcmpneq_m_n_f32): Likewise.
6964         (__arm_vcvtmq_m_u32_f32): Likewise.
6965         (__arm_vcvtnq_m_u32_f32): Likewise.
6966         (__arm_vcvtpq_m_u32_f32): Likewise.
6967         (__arm_vcvtq_m_u32_f32): Likewise.
6968         (vcvtq_m): Define polymorphic variant.
6969         (vabsq_m): Likewise.
6970         (vcmlaq): Likewise.
6971         (vcmlaq_rot180): Likewise.
6972         (vcmlaq_rot270): Likewise.
6973         (vcmlaq_rot90): Likewise.
6974         (vcmpeqq_m_n): Likewise.
6975         (vcmpgeq_m_n): Likewise.
6976         (vrndxq_m): Likewise.
6977         (vrndq_m): Likewise.
6978         (vrndpq_m): Likewise.
6979         (vcmpgtq_m_n): Likewise.
6980         (vcmpgtq_m): Likewise.
6981         (vcmpleq_m): Likewise.
6982         (vcmpleq_m_n): Likewise.
6983         (vcmpltq_m_n): Likewise.
6984         (vcmpltq_m): Likewise.
6985         (vcmpneq_m): Likewise.
6986         (vcmpneq_m_n): Likewise.
6987         (vcvtbq_m): Likewise.
6988         (vcvttq_m): Likewise.
6989         (vcvtmq_m): Likewise.
6990         (vcvtnq_m): Likewise.
6991         (vcvtpq_m): Likewise.
6992         (vdupq_m_n): Likewise.
6993         (vfmaq_n): Likewise.
6994         (vfmaq): Likewise.
6995         (vfmasq_n): Likewise.
6996         (vfmsq): Likewise.
6997         (vmaxnmaq_m): Likewise.
6998         (vmaxnmavq_m): Likewise.
6999         (vmaxnmvq_m): Likewise.
7000         (vmaxnmavq_p): Likewise.
7001         (vmaxnmvq_p): Likewise.
7002         (vminnmaq_m): Likewise.
7003         (vminnmavq_p): Likewise.
7004         (vminnmvq_p): Likewise.
7005         (vrndnq_m): Likewise.
7006         (vrndaq_m): Likewise.
7007         (vrndmq_m): Likewise.
7008         (vrev64q_m): Likewise.
7009         (vrev32q_m): Likewise.
7010         (vpselq): Likewise.
7011         (vnegq_m): Likewise.
7012         (vcmpgeq_m): Likewise.
7013         (vshrntq_n): Likewise.
7014         (vrshrntq_n): Likewise.
7015         (vmovlbq_m): Likewise.
7016         (vmovnbq_m): Likewise.
7017         (vmovntq_m): Likewise.
7018         (vmvnq_m_n): Likewise.
7019         (vmvnq_m): Likewise.
7020         (vshrnbq_n): Likewise.
7021         (vrshrnbq_n): Likewise.
7022         (vqshruntq_n): Likewise.
7023         (vrev16q_m): Likewise.
7024         (vqshrunbq_n): Likewise.
7025         (vqshrntq_n): Likewise.
7026         (vqrshruntq_n): Likewise.
7027         (vqrshrntq_n): Likewise.
7028         (vqshrnbq_n): Likewise.
7029         (vqmovuntq_m): Likewise.
7030         (vqmovntq_m): Likewise.
7031         (vqmovnbq_m): Likewise.
7032         (vorrq_m_n): Likewise.
7033         (vmovltq_m): Likewise.
7034         (vqmovunbq_m): Likewise.
7035         (vaddlvaq_p): Likewise.
7036         (vmlaldavaq): Likewise.
7037         (vmlaldavaxq): Likewise.
7038         (vmlaldavq_p): Likewise.
7039         (vmlaldavxq_p): Likewise.
7040         (vmlsldavaq): Likewise.
7041         (vmlsldavaxq): Likewise.
7042         (vmlsldavq_p): Likewise.
7043         (vmlsldavxq_p): Likewise.
7044         (vrmlaldavhaxq): Likewise.
7045         (vrmlaldavhq_p): Likewise.
7046         (vrmlaldavhxq_p): Likewise.
7047         (vrmlsldavhaq): Likewise.
7048         (vrmlsldavhaxq): Likewise.
7049         (vrmlsldavhq_p): Likewise.
7050         (vrmlsldavhxq_p): Likewise.
7051         * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
7052         builtin qualifier.
7053         (TERNOP_NONE_NONE_NONE_IMM): Likewise.
7054         (TERNOP_NONE_NONE_NONE_NONE): Likewise.
7055         (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
7056         (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
7057         (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
7058         (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
7059         (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
7060         (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
7061         (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
7062         * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
7063         (MVE_pred3): Likewise.
7064         (MVE_constraint1): Likewise.
7065         (MVE_pred1): Likewise.
7066         (VMLALDAVQ_P): Define iterator.
7067         (VQMOVNBQ_M): Likewise.
7068         (VMOVLTQ_M): Likewise.
7069         (VMOVNBQ_M): Likewise.
7070         (VRSHRNTQ_N): Likewise.
7071         (VORRQ_M_N): Likewise.
7072         (VREV32Q_M): Likewise.
7073         (VREV16Q_M): Likewise.
7074         (VQRSHRNTQ_N): Likewise.
7075         (VMOVNTQ_M): Likewise.
7076         (VMOVLBQ_M): Likewise.
7077         (VMLALDAVAQ): Likewise.
7078         (VQSHRNBQ_N): Likewise.
7079         (VSHRNBQ_N): Likewise.
7080         (VRSHRNBQ_N): Likewise.
7081         (VMLALDAVXQ_P): Likewise.
7082         (VQMOVNTQ_M): Likewise.
7083         (VMVNQ_M_N): Likewise.
7084         (VQSHRNTQ_N): Likewise.
7085         (VMLALDAVAXQ): Likewise.
7086         (VSHRNTQ_N): Likewise.
7087         (VCVTMQ_M): Likewise.
7088         (VCVTNQ_M): Likewise.
7089         (VCVTPQ_M): Likewise.
7090         (VCVTQ_M_N_FROM_F): Likewise.
7091         (VCVTQ_M_FROM_F): Likewise.
7092         (VRMLALDAVHQ_P): Likewise.
7093         (VADDLVAQ_P): Likewise.
7094         (mve_vrndq_m_f<mode>): Define RTL pattern.
7095         (mve_vabsq_m_f<mode>): Likewise.
7096         (mve_vaddlvaq_p_<supf>v4si): Likewise.
7097         (mve_vcmlaq_f<mode>): Likewise.
7098         (mve_vcmlaq_rot180_f<mode>): Likewise.
7099         (mve_vcmlaq_rot270_f<mode>): Likewise.
7100         (mve_vcmlaq_rot90_f<mode>): Likewise.
7101         (mve_vcmpeqq_m_n_f<mode>): Likewise.
7102         (mve_vcmpgeq_m_f<mode>): Likewise.
7103         (mve_vcmpgeq_m_n_f<mode>): Likewise.
7104         (mve_vcmpgtq_m_f<mode>): Likewise.
7105         (mve_vcmpgtq_m_n_f<mode>): Likewise.
7106         (mve_vcmpleq_m_f<mode>): Likewise.
7107         (mve_vcmpleq_m_n_f<mode>): Likewise.
7108         (mve_vcmpltq_m_f<mode>): Likewise.
7109         (mve_vcmpltq_m_n_f<mode>): Likewise.
7110         (mve_vcmpneq_m_f<mode>): Likewise.
7111         (mve_vcmpneq_m_n_f<mode>): Likewise.
7112         (mve_vcvtbq_m_f16_f32v8hf): Likewise.
7113         (mve_vcvtbq_m_f32_f16v4sf): Likewise.
7114         (mve_vcvttq_m_f16_f32v8hf): Likewise.
7115         (mve_vcvttq_m_f32_f16v4sf): Likewise.
7116         (mve_vdupq_m_n_f<mode>): Likewise.
7117         (mve_vfmaq_f<mode>): Likewise.
7118         (mve_vfmaq_n_f<mode>): Likewise.
7119         (mve_vfmasq_n_f<mode>): Likewise.
7120         (mve_vfmsq_f<mode>): Likewise.
7121         (mve_vmaxnmaq_m_f<mode>): Likewise.
7122         (mve_vmaxnmavq_p_f<mode>): Likewise.
7123         (mve_vmaxnmvq_p_f<mode>): Likewise.
7124         (mve_vminnmaq_m_f<mode>): Likewise.
7125         (mve_vminnmavq_p_f<mode>): Likewise.
7126         (mve_vminnmvq_p_f<mode>): Likewise.
7127         (mve_vmlaldavaq_<supf><mode>): Likewise.
7128         (mve_vmlaldavaxq_<supf><mode>): Likewise.
7129         (mve_vmlaldavq_p_<supf><mode>): Likewise.
7130         (mve_vmlaldavxq_p_<supf><mode>): Likewise.
7131         (mve_vmlsldavaq_s<mode>): Likewise.
7132         (mve_vmlsldavaxq_s<mode>): Likewise.
7133         (mve_vmlsldavq_p_s<mode>): Likewise.
7134         (mve_vmlsldavxq_p_s<mode>): Likewise.
7135         (mve_vmovlbq_m_<supf><mode>): Likewise.
7136         (mve_vmovltq_m_<supf><mode>): Likewise.
7137         (mve_vmovnbq_m_<supf><mode>): Likewise.
7138         (mve_vmovntq_m_<supf><mode>): Likewise.
7139         (mve_vmvnq_m_n_<supf><mode>): Likewise.
7140         (mve_vnegq_m_f<mode>): Likewise.
7141         (mve_vorrq_m_n_<supf><mode>): Likewise.
7142         (mve_vpselq_f<mode>): Likewise.
7143         (mve_vqmovnbq_m_<supf><mode>): Likewise.
7144         (mve_vqmovntq_m_<supf><mode>): Likewise.
7145         (mve_vqmovunbq_m_s<mode>): Likewise.
7146         (mve_vqmovuntq_m_s<mode>): Likewise.
7147         (mve_vqrshrntq_n_<supf><mode>): Likewise.
7148         (mve_vqrshruntq_n_s<mode>): Likewise.
7149         (mve_vqshrnbq_n_<supf><mode>): Likewise.
7150         (mve_vqshrntq_n_<supf><mode>): Likewise.
7151         (mve_vqshrunbq_n_s<mode>): Likewise.
7152         (mve_vqshruntq_n_s<mode>): Likewise.
7153         (mve_vrev32q_m_fv8hf): Likewise.
7154         (mve_vrev32q_m_<supf><mode>): Likewise.
7155         (mve_vrev64q_m_f<mode>): Likewise.
7156         (mve_vrmlaldavhaxq_sv4si): Likewise.
7157         (mve_vrmlaldavhxq_p_sv4si): Likewise.
7158         (mve_vrmlsldavhaxq_sv4si): Likewise.
7159         (mve_vrmlsldavhq_p_sv4si): Likewise.
7160         (mve_vrmlsldavhxq_p_sv4si): Likewise.
7161         (mve_vrndaq_m_f<mode>): Likewise.
7162         (mve_vrndmq_m_f<mode>): Likewise.
7163         (mve_vrndnq_m_f<mode>): Likewise.
7164         (mve_vrndpq_m_f<mode>): Likewise.
7165         (mve_vrndxq_m_f<mode>): Likewise.
7166         (mve_vrshrnbq_n_<supf><mode>): Likewise.
7167         (mve_vrshrntq_n_<supf><mode>): Likewise.
7168         (mve_vshrnbq_n_<supf><mode>): Likewise.
7169         (mve_vshrntq_n_<supf><mode>): Likewise.
7170         (mve_vcvtmq_m_<supf><mode>): Likewise.
7171         (mve_vcvtpq_m_<supf><mode>): Likewise.
7172         (mve_vcvtnq_m_<supf><mode>): Likewise.
7173         (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
7174         (mve_vrev16q_m_<supf>v16qi): Likewise.
7175         (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
7176         (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
7177         (mve_vrmlsldavhaq_sv4si): Likewise.
7178
7179 2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
7180             Mihail Ionescu  <mihail.ionescu@arm.com>
7181             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
7182
7183         * config/arm/arm_mve.h (vpselq_u8): Define macro.
7184         (vpselq_s8): Likewise.
7185         (vrev64q_m_u8): Likewise.
7186         (vqrdmlashq_n_u8): Likewise.
7187         (vqrdmlahq_n_u8): Likewise.
7188         (vqdmlahq_n_u8): Likewise.
7189         (vmvnq_m_u8): Likewise.
7190         (vmlasq_n_u8): Likewise.
7191         (vmlaq_n_u8): Likewise.
7192         (vmladavq_p_u8): Likewise.
7193         (vmladavaq_u8): Likewise.
7194         (vminvq_p_u8): Likewise.
7195         (vmaxvq_p_u8): Likewise.
7196         (vdupq_m_n_u8): Likewise.
7197         (vcmpneq_m_u8): Likewise.
7198         (vcmpneq_m_n_u8): Likewise.
7199         (vcmphiq_m_u8): Likewise.
7200         (vcmphiq_m_n_u8): Likewise.
7201         (vcmpeqq_m_u8): Likewise.
7202         (vcmpeqq_m_n_u8): Likewise.
7203         (vcmpcsq_m_u8): Likewise.
7204         (vcmpcsq_m_n_u8): Likewise.
7205         (vclzq_m_u8): Likewise.
7206         (vaddvaq_p_u8): Likewise.
7207         (vsriq_n_u8): Likewise.
7208         (vsliq_n_u8): Likewise.
7209         (vshlq_m_r_u8): Likewise.
7210         (vrshlq_m_n_u8): Likewise.
7211         (vqshlq_m_r_u8): Likewise.
7212         (vqrshlq_m_n_u8): Likewise.
7213         (vminavq_p_s8): Likewise.
7214         (vminaq_m_s8): Likewise.
7215         (vmaxavq_p_s8): Likewise.
7216         (vmaxaq_m_s8): Likewise.
7217         (vcmpneq_m_s8): Likewise.
7218         (vcmpneq_m_n_s8): Likewise.
7219         (vcmpltq_m_s8): Likewise.
7220         (vcmpltq_m_n_s8): Likewise.
7221         (vcmpleq_m_s8): Likewise.
7222         (vcmpleq_m_n_s8): Likewise.
7223         (vcmpgtq_m_s8): Likewise.
7224         (vcmpgtq_m_n_s8): Likewise.
7225         (vcmpgeq_m_s8): Likewise.
7226         (vcmpgeq_m_n_s8): Likewise.
7227         (vcmpeqq_m_s8): Likewise.
7228         (vcmpeqq_m_n_s8): Likewise.
7229         (vshlq_m_r_s8): Likewise.
7230         (vrshlq_m_n_s8): Likewise.
7231         (vrev64q_m_s8): Likewise.
7232         (vqshlq_m_r_s8): Likewise.
7233         (vqrshlq_m_n_s8): Likewise.
7234         (vqnegq_m_s8): Likewise.
7235         (vqabsq_m_s8): Likewise.
7236         (vnegq_m_s8): Likewise.
7237         (vmvnq_m_s8): Likewise.
7238         (vmlsdavxq_p_s8): Likewise.
7239         (vmlsdavq_p_s8): Likewise.
7240         (vmladavxq_p_s8): Likewise.
7241         (vmladavq_p_s8): Likewise.
7242         (vminvq_p_s8): Likewise.
7243         (vmaxvq_p_s8): Likewise.
7244         (vdupq_m_n_s8): Likewise.
7245         (vclzq_m_s8): Likewise.
7246         (vclsq_m_s8): Likewise.
7247         (vaddvaq_p_s8): Likewise.
7248         (vabsq_m_s8): Likewise.
7249         (vqrdmlsdhxq_s8): Likewise.
7250         (vqrdmlsdhq_s8): Likewise.
7251         (vqrdmlashq_n_s8): Likewise.
7252         (vqrdmlahq_n_s8): Likewise.
7253         (vqrdmladhxq_s8): Likewise.
7254         (vqrdmladhq_s8): Likewise.
7255         (vqdmlsdhxq_s8): Likewise.
7256         (vqdmlsdhq_s8): Likewise.
7257         (vqdmlahq_n_s8): Likewise.
7258         (vqdmladhxq_s8): Likewise.
7259         (vqdmladhq_s8): Likewise.
7260         (vmlsdavaxq_s8): Likewise.
7261         (vmlsdavaq_s8): Likewise.
7262         (vmlasq_n_s8): Likewise.
7263         (vmlaq_n_s8): Likewise.
7264         (vmladavaxq_s8): Likewise.
7265         (vmladavaq_s8): Likewise.
7266         (vsriq_n_s8): Likewise.
7267         (vsliq_n_s8): Likewise.
7268         (vpselq_u16): Likewise.
7269         (vpselq_s16): Likewise.
7270         (vrev64q_m_u16): Likewise.
7271         (vqrdmlashq_n_u16): Likewise.
7272         (vqrdmlahq_n_u16): Likewise.
7273         (vqdmlahq_n_u16): Likewise.
7274         (vmvnq_m_u16): Likewise.
7275         (vmlasq_n_u16): Likewise.
7276         (vmlaq_n_u16): Likewise.
7277         (vmladavq_p_u16): Likewise.
7278         (vmladavaq_u16): Likewise.
7279         (vminvq_p_u16): Likewise.
7280         (vmaxvq_p_u16): Likewise.
7281         (vdupq_m_n_u16): Likewise.
7282         (vcmpneq_m_u16): Likewise.
7283         (vcmpneq_m_n_u16): Likewise.
7284         (vcmphiq_m_u16): Likewise.
7285         (vcmphiq_m_n_u16): Likewise.
7286         (vcmpeqq_m_u16): Likewise.
7287         (vcmpeqq_m_n_u16): Likewise.
7288         (vcmpcsq_m_u16): Likewise.
7289         (vcmpcsq_m_n_u16): Likewise.
7290         (vclzq_m_u16): Likewise.
7291         (vaddvaq_p_u16): Likewise.
7292         (vsriq_n_u16): Likewise.
7293         (vsliq_n_u16): Likewise.
7294         (vshlq_m_r_u16): Likewise.
7295         (vrshlq_m_n_u16): Likewise.
7296         (vqshlq_m_r_u16): Likewise.
7297         (vqrshlq_m_n_u16): Likewise.
7298         (vminavq_p_s16): Likewise.
7299         (vminaq_m_s16): Likewise.
7300         (vmaxavq_p_s16): Likewise.
7301         (vmaxaq_m_s16): Likewise.
7302         (vcmpneq_m_s16): Likewise.
7303         (vcmpneq_m_n_s16): Likewise.
7304         (vcmpltq_m_s16): Likewise.
7305         (vcmpltq_m_n_s16): Likewise.
7306         (vcmpleq_m_s16): Likewise.
7307         (vcmpleq_m_n_s16): Likewise.
7308         (vcmpgtq_m_s16): Likewise.
7309         (vcmpgtq_m_n_s16): Likewise.
7310         (vcmpgeq_m_s16): Likewise.
7311         (vcmpgeq_m_n_s16): Likewise.
7312         (vcmpeqq_m_s16): Likewise.
7313         (vcmpeqq_m_n_s16): Likewise.
7314         (vshlq_m_r_s16): Likewise.
7315         (vrshlq_m_n_s16): Likewise.
7316         (vrev64q_m_s16): Likewise.
7317         (vqshlq_m_r_s16): Likewise.
7318         (vqrshlq_m_n_s16): Likewise.
7319         (vqnegq_m_s16): Likewise.
7320         (vqabsq_m_s16): Likewise.
7321         (vnegq_m_s16): Likewise.
7322         (vmvnq_m_s16): Likewise.
7323         (vmlsdavxq_p_s16): Likewise.
7324         (vmlsdavq_p_s16): Likewise.
7325         (vmladavxq_p_s16): Likewise.
7326         (vmladavq_p_s16): Likewise.
7327         (vminvq_p_s16): Likewise.
7328         (vmaxvq_p_s16): Likewise.
7329         (vdupq_m_n_s16): Likewise.
7330         (vclzq_m_s16): Likewise.
7331         (vclsq_m_s16): Likewise.
7332         (vaddvaq_p_s16): Likewise.
7333         (vabsq_m_s16): Likewise.
7334         (vqrdmlsdhxq_s16): Likewise.
7335         (vqrdmlsdhq_s16): Likewise.
7336         (vqrdmlashq_n_s16): Likewise.
7337         (vqrdmlahq_n_s16): Likewise.
7338         (vqrdmladhxq_s16): Likewise.
7339         (vqrdmladhq_s16): Likewise.
7340         (vqdmlsdhxq_s16): Likewise.
7341         (vqdmlsdhq_s16): Likewise.
7342         (vqdmlahq_n_s16): Likewise.
7343         (vqdmladhxq_s16): Likewise.
7344         (vqdmladhq_s16): Likewise.
7345         (vmlsdavaxq_s16): Likewise.
7346         (vmlsdavaq_s16): Likewise.
7347         (vmlasq_n_s16): Likewise.
7348         (vmlaq_n_s16): Likewise.
7349         (vmladavaxq_s16): Likewise.
7350         (vmladavaq_s16): Likewise.
7351         (vsriq_n_s16): Likewise.
7352         (vsliq_n_s16): Likewise.
7353         (vpselq_u32): Likewise.
7354         (vpselq_s32): Likewise.
7355         (vrev64q_m_u32): Likewise.
7356         (vqrdmlashq_n_u32): Likewise.
7357         (vqrdmlahq_n_u32): Likewise.
7358         (vqdmlahq_n_u32): Likewise.
7359         (vmvnq_m_u32): Likewise.
7360         (vmlasq_n_u32): Likewise.
7361         (vmlaq_n_u32): Likewise.
7362         (vmladavq_p_u32): Likewise.
7363         (vmladavaq_u32): Likewise.
7364         (vminvq_p_u32): Likewise.
7365         (vmaxvq_p_u32): Likewise.
7366         (vdupq_m_n_u32): Likewise.
7367         (vcmpneq_m_u32): Likewise.
7368         (vcmpneq_m_n_u32): Likewise.
7369         (vcmphiq_m_u32): Likewise.
7370         (vcmphiq_m_n_u32): Likewise.
7371         (vcmpeqq_m_u32): Likewise.
7372         (vcmpeqq_m_n_u32): Likewise.
7373         (vcmpcsq_m_u32): Likewise.
7374         (vcmpcsq_m_n_u32): Likewise.
7375         (vclzq_m_u32): Likewise.
7376         (vaddvaq_p_u32): Likewise.
7377         (vsriq_n_u32): Likewise.
7378         (vsliq_n_u32): Likewise.
7379         (vshlq_m_r_u32): Likewise.
7380         (vrshlq_m_n_u32): Likewise.
7381         (vqshlq_m_r_u32): Likewise.
7382         (vqrshlq_m_n_u32): Likewise.
7383         (vminavq_p_s32): Likewise.
7384         (vminaq_m_s32): Likewise.
7385         (vmaxavq_p_s32): Likewise.
7386         (vmaxaq_m_s32): Likewise.
7387         (vcmpneq_m_s32): Likewise.
7388         (vcmpneq_m_n_s32): Likewise.
7389         (vcmpltq_m_s32): Likewise.
7390         (vcmpltq_m_n_s32): Likewise.
7391         (vcmpleq_m_s32): Likewise.
7392         (vcmpleq_m_n_s32): Likewise.
7393         (vcmpgtq_m_s32): Likewise.
7394         (vcmpgtq_m_n_s32): Likewise.
7395         (vcmpgeq_m_s32): Likewise.
7396         (vcmpgeq_m_n_s32): Likewise.
7397         (vcmpeqq_m_s32): Likewise.
7398         (vcmpeqq_m_n_s32): Likewise.
7399         (vshlq_m_r_s32): Likewise.
7400         (vrshlq_m_n_s32): Likewise.
7401         (vrev64q_m_s32): Likewise.
7402         (vqshlq_m_r_s32): Likewise.
7403         (vqrshlq_m_n_s32): Likewise.
7404         (vqnegq_m_s32): Likewise.
7405         (vqabsq_m_s32): Likewise.
7406         (vnegq_m_s32): Likewise.
7407         (vmvnq_m_s32): Likewise.
7408         (vmlsdavxq_p_s32): Likewise.
7409         (vmlsdavq_p_s32): Likewise.
7410         (vmladavxq_p_s32): Likewise.
7411         (vmladavq_p_s32): Likewise.
7412         (vminvq_p_s32): Likewise.
7413         (vmaxvq_p_s32): Likewise.
7414         (vdupq_m_n_s32): Likewise.
7415         (vclzq_m_s32): Likewise.
7416         (vclsq_m_s32): Likewise.
7417         (vaddvaq_p_s32): Likewise.
7418         (vabsq_m_s32): Likewise.
7419         (vqrdmlsdhxq_s32): Likewise.
7420         (vqrdmlsdhq_s32): Likewise.
7421         (vqrdmlashq_n_s32): Likewise.
7422         (vqrdmlahq_n_s32): Likewise.
7423         (vqrdmladhxq_s32): Likewise.
7424         (vqrdmladhq_s32): Likewise.
7425         (vqdmlsdhxq_s32): Likewise.
7426         (vqdmlsdhq_s32): Likewise.
7427         (vqdmlahq_n_s32): Likewise.
7428         (vqdmladhxq_s32): Likewise.
7429         (vqdmladhq_s32): Likewise.
7430         (vmlsdavaxq_s32): Likewise.
7431         (vmlsdavaq_s32): Likewise.
7432         (vmlasq_n_s32): Likewise.
7433         (vmlaq_n_s32): Likewise.
7434         (vmladavaxq_s32): Likewise.
7435         (vmladavaq_s32): Likewise.
7436         (vsriq_n_s32): Likewise.
7437         (vsliq_n_s32): Likewise.
7438         (vpselq_u64): Likewise.
7439         (vpselq_s64): Likewise.
7440         (__arm_vpselq_u8): Define intrinsic.
7441         (__arm_vpselq_s8): Likewise.
7442         (__arm_vrev64q_m_u8): Likewise.
7443         (__arm_vqrdmlashq_n_u8): Likewise.
7444         (__arm_vqrdmlahq_n_u8): Likewise.
7445         (__arm_vqdmlahq_n_u8): Likewise.
7446         (__arm_vmvnq_m_u8): Likewise.
7447         (__arm_vmlasq_n_u8): Likewise.
7448         (__arm_vmlaq_n_u8): Likewise.
7449         (__arm_vmladavq_p_u8): Likewise.
7450         (__arm_vmladavaq_u8): Likewise.
7451         (__arm_vminvq_p_u8): Likewise.
7452         (__arm_vmaxvq_p_u8): Likewise.
7453         (__arm_vdupq_m_n_u8): Likewise.
7454         (__arm_vcmpneq_m_u8): Likewise.
7455         (__arm_vcmpneq_m_n_u8): Likewise.
7456         (__arm_vcmphiq_m_u8): Likewise.
7457         (__arm_vcmphiq_m_n_u8): Likewise.
7458         (__arm_vcmpeqq_m_u8): Likewise.
7459         (__arm_vcmpeqq_m_n_u8): Likewise.
7460         (__arm_vcmpcsq_m_u8): Likewise.
7461         (__arm_vcmpcsq_m_n_u8): Likewise.
7462         (__arm_vclzq_m_u8): Likewise.
7463         (__arm_vaddvaq_p_u8): Likewise.
7464         (__arm_vsriq_n_u8): Likewise.
7465         (__arm_vsliq_n_u8): Likewise.
7466         (__arm_vshlq_m_r_u8): Likewise.
7467         (__arm_vrshlq_m_n_u8): Likewise.
7468         (__arm_vqshlq_m_r_u8): Likewise.
7469         (__arm_vqrshlq_m_n_u8): Likewise.
7470         (__arm_vminavq_p_s8): Likewise.
7471         (__arm_vminaq_m_s8): Likewise.
7472         (__arm_vmaxavq_p_s8): Likewise.
7473         (__arm_vmaxaq_m_s8): Likewise.
7474         (__arm_vcmpneq_m_s8): Likewise.
7475         (__arm_vcmpneq_m_n_s8): Likewise.
7476         (__arm_vcmpltq_m_s8): Likewise.
7477         (__arm_vcmpltq_m_n_s8): Likewise.
7478         (__arm_vcmpleq_m_s8): Likewise.
7479         (__arm_vcmpleq_m_n_s8): Likewise.
7480         (__arm_vcmpgtq_m_s8): Likewise.
7481         (__arm_vcmpgtq_m_n_s8): Likewise.
7482         (__arm_vcmpgeq_m_s8): Likewise.
7483         (__arm_vcmpgeq_m_n_s8): Likewise.
7484         (__arm_vcmpeqq_m_s8): Likewise.
7485         (__arm_vcmpeqq_m_n_s8): Likewise.
7486         (__arm_vshlq_m_r_s8): Likewise.
7487         (__arm_vrshlq_m_n_s8): Likewise.
7488         (__arm_vrev64q_m_s8): Likewise.
7489         (__arm_vqshlq_m_r_s8): Likewise.
7490         (__arm_vqrshlq_m_n_s8): Likewise.
7491         (__arm_vqnegq_m_s8): Likewise.
7492         (__arm_vqabsq_m_s8): Likewise.
7493         (__arm_vnegq_m_s8): Likewise.
7494         (__arm_vmvnq_m_s8): Likewise.
7495         (__arm_vmlsdavxq_p_s8): Likewise.
7496         (__arm_vmlsdavq_p_s8): Likewise.
7497         (__arm_vmladavxq_p_s8): Likewise.
7498         (__arm_vmladavq_p_s8): Likewise.
7499         (__arm_vminvq_p_s8): Likewise.
7500         (__arm_vmaxvq_p_s8): Likewise.
7501         (__arm_vdupq_m_n_s8): Likewise.
7502         (__arm_vclzq_m_s8): Likewise.
7503         (__arm_vclsq_m_s8): Likewise.
7504         (__arm_vaddvaq_p_s8): Likewise.
7505         (__arm_vabsq_m_s8): Likewise.
7506         (__arm_vqrdmlsdhxq_s8): Likewise.
7507         (__arm_vqrdmlsdhq_s8): Likewise.
7508         (__arm_vqrdmlashq_n_s8): Likewise.
7509         (__arm_vqrdmlahq_n_s8): Likewise.
7510         (__arm_vqrdmladhxq_s8): Likewise.
7511         (__arm_vqrdmladhq_s8): Likewise.
7512         (__arm_vqdmlsdhxq_s8): Likewise.
7513         (__arm_vqdmlsdhq_s8): Likewise.
7514         (__arm_vqdmlahq_n_s8): Likewise.
7515         (__arm_vqdmladhxq_s8): Likewise.
7516         (__arm_vqdmladhq_s8): Likewise.
7517         (__arm_vmlsdavaxq_s8): Likewise.
7518         (__arm_vmlsdavaq_s8): Likewise.
7519         (__arm_vmlasq_n_s8): Likewise.
7520         (__arm_vmlaq_n_s8): Likewise.
7521         (__arm_vmladavaxq_s8): Likewise.
7522         (__arm_vmladavaq_s8): Likewise.
7523         (__arm_vsriq_n_s8): Likewise.
7524         (__arm_vsliq_n_s8): Likewise.
7525         (__arm_vpselq_u16): Likewise.
7526         (__arm_vpselq_s16): Likewise.
7527         (__arm_vrev64q_m_u16): Likewise.
7528         (__arm_vqrdmlashq_n_u16): Likewise.
7529         (__arm_vqrdmlahq_n_u16): Likewise.
7530         (__arm_vqdmlahq_n_u16): Likewise.
7531         (__arm_vmvnq_m_u16): Likewise.
7532         (__arm_vmlasq_n_u16): Likewise.
7533         (__arm_vmlaq_n_u16): Likewise.
7534         (__arm_vmladavq_p_u16): Likewise.
7535         (__arm_vmladavaq_u16): Likewise.
7536         (__arm_vminvq_p_u16): Likewise.
7537         (__arm_vmaxvq_p_u16): Likewise.
7538         (__arm_vdupq_m_n_u16): Likewise.
7539         (__arm_vcmpneq_m_u16): Likewise.
7540         (__arm_vcmpneq_m_n_u16): Likewise.
7541         (__arm_vcmphiq_m_u16): Likewise.
7542         (__arm_vcmphiq_m_n_u16): Likewise.
7543         (__arm_vcmpeqq_m_u16): Likewise.
7544         (__arm_vcmpeqq_m_n_u16): Likewise.
7545         (__arm_vcmpcsq_m_u16): Likewise.
7546         (__arm_vcmpcsq_m_n_u16): Likewise.
7547         (__arm_vclzq_m_u16): Likewise.
7548         (__arm_vaddvaq_p_u16): Likewise.
7549         (__arm_vsriq_n_u16): Likewise.
7550         (__arm_vsliq_n_u16): Likewise.
7551         (__arm_vshlq_m_r_u16): Likewise.
7552         (__arm_vrshlq_m_n_u16): Likewise.
7553         (__arm_vqshlq_m_r_u16): Likewise.
7554         (__arm_vqrshlq_m_n_u16): Likewise.
7555         (__arm_vminavq_p_s16): Likewise.
7556         (__arm_vminaq_m_s16): Likewise.
7557         (__arm_vmaxavq_p_s16): Likewise.
7558         (__arm_vmaxaq_m_s16): Likewise.
7559         (__arm_vcmpneq_m_s16): Likewise.
7560         (__arm_vcmpneq_m_n_s16): Likewise.
7561         (__arm_vcmpltq_m_s16): Likewise.
7562         (__arm_vcmpltq_m_n_s16): Likewise.
7563         (__arm_vcmpleq_m_s16): Likewise.
7564         (__arm_vcmpleq_m_n_s16): Likewise.
7565         (__arm_vcmpgtq_m_s16): Likewise.
7566         (__arm_vcmpgtq_m_n_s16): Likewise.
7567         (__arm_vcmpgeq_m_s16): Likewise.
7568         (__arm_vcmpgeq_m_n_s16): Likewise.
7569         (__arm_vcmpeqq_m_s16): Likewise.
7570         (__arm_vcmpeqq_m_n_s16): Likewise.
7571         (__arm_vshlq_m_r_s16): Likewise.
7572         (__arm_vrshlq_m_n_s16): Likewise.
7573         (__arm_vrev64q_m_s16): Likewise.
7574         (__arm_vqshlq_m_r_s16): Likewise.
7575         (__arm_vqrshlq_m_n_s16): Likewise.
7576         (__arm_vqnegq_m_s16): Likewise.
7577         (__arm_vqabsq_m_s16): Likewise.
7578         (__arm_vnegq_m_s16): Likewise.
7579         (__arm_vmvnq_m_s16): Likewise.
7580         (__arm_vmlsdavxq_p_s16): Likewise.
7581         (__arm_vmlsdavq_p_s16): Likewise.
7582         (__arm_vmladavxq_p_s16): Likewise.
7583         (__arm_vmladavq_p_s16): Likewise.
7584         (__arm_vminvq_p_s16): Likewise.
7585         (__arm_vmaxvq_p_s16): Likewise.
7586         (__arm_vdupq_m_n_s16): Likewise.
7587         (__arm_vclzq_m_s16): Likewise.
7588         (__arm_vclsq_m_s16): Likewise.
7589         (__arm_vaddvaq_p_s16): Likewise.
7590         (__arm_vabsq_m_s16): Likewise.
7591         (__arm_vqrdmlsdhxq_s16): Likewise.
7592         (__arm_vqrdmlsdhq_s16): Likewise.
7593         (__arm_vqrdmlashq_n_s16): Likewise.
7594         (__arm_vqrdmlahq_n_s16): Likewise.
7595         (__arm_vqrdmladhxq_s16): Likewise.
7596         (__arm_vqrdmladhq_s16): Likewise.
7597         (__arm_vqdmlsdhxq_s16): Likewise.
7598         (__arm_vqdmlsdhq_s16): Likewise.
7599         (__arm_vqdmlahq_n_s16): Likewise.
7600         (__arm_vqdmladhxq_s16): Likewise.
7601         (__arm_vqdmladhq_s16): Likewise.
7602         (__arm_vmlsdavaxq_s16): Likewise.
7603         (__arm_vmlsdavaq_s16): Likewise.
7604         (__arm_vmlasq_n_s16): Likewise.
7605         (__arm_vmlaq_n_s16): Likewise.
7606         (__arm_vmladavaxq_s16): Likewise.
7607         (__arm_vmladavaq_s16): Likewise.
7608         (__arm_vsriq_n_s16): Likewise.
7609         (__arm_vsliq_n_s16): Likewise.
7610         (__arm_vpselq_u32): Likewise.
7611         (__arm_vpselq_s32): Likewise.
7612         (__arm_vrev64q_m_u32): Likewise.
7613         (__arm_vqrdmlashq_n_u32): Likewise.
7614         (__arm_vqrdmlahq_n_u32): Likewise.
7615         (__arm_vqdmlahq_n_u32): Likewise.
7616         (__arm_vmvnq_m_u32): Likewise.
7617         (__arm_vmlasq_n_u32): Likewise.
7618         (__arm_vmlaq_n_u32): Likewise.
7619         (__arm_vmladavq_p_u32): Likewise.
7620         (__arm_vmladavaq_u32): Likewise.
7621         (__arm_vminvq_p_u32): Likewise.
7622         (__arm_vmaxvq_p_u32): Likewise.
7623         (__arm_vdupq_m_n_u32): Likewise.
7624         (__arm_vcmpneq_m_u32): Likewise.
7625         (__arm_vcmpneq_m_n_u32): Likewise.
7626         (__arm_vcmphiq_m_u32): Likewise.
7627         (__arm_vcmphiq_m_n_u32): Likewise.
7628         (__arm_vcmpeqq_m_u32): Likewise.
7629         (__arm_vcmpeqq_m_n_u32): Likewise.
7630         (__arm_vcmpcsq_m_u32): Likewise.
7631         (__arm_vcmpcsq_m_n_u32): Likewise.
7632         (__arm_vclzq_m_u32): Likewise.
7633         (__arm_vaddvaq_p_u32): Likewise.
7634         (__arm_vsriq_n_u32): Likewise.
7635         (__arm_vsliq_n_u32): Likewise.
7636         (__arm_vshlq_m_r_u32): Likewise.
7637         (__arm_vrshlq_m_n_u32): Likewise.
7638         (__arm_vqshlq_m_r_u32): Likewise.
7639         (__arm_vqrshlq_m_n_u32): Likewise.
7640         (__arm_vminavq_p_s32): Likewise.
7641         (__arm_vminaq_m_s32): Likewise.
7642         (__arm_vmaxavq_p_s32): Likewise.
7643         (__arm_vmaxaq_m_s32): Likewise.
7644         (__arm_vcmpneq_m_s32): Likewise.
7645         (__arm_vcmpneq_m_n_s32): Likewise.
7646         (__arm_vcmpltq_m_s32): Likewise.
7647         (__arm_vcmpltq_m_n_s32): Likewise.
7648         (__arm_vcmpleq_m_s32): Likewise.
7649         (__arm_vcmpleq_m_n_s32): Likewise.
7650         (__arm_vcmpgtq_m_s32): Likewise.
7651         (__arm_vcmpgtq_m_n_s32): Likewise.
7652         (__arm_vcmpgeq_m_s32): Likewise.
7653         (__arm_vcmpgeq_m_n_s32): Likewise.
7654         (__arm_vcmpeqq_m_s32): Likewise.
7655         (__arm_vcmpeqq_m_n_s32): Likewise.
7656         (__arm_vshlq_m_r_s32): Likewise.
7657         (__arm_vrshlq_m_n_s32): Likewise.
7658         (__arm_vrev64q_m_s32): Likewise.
7659         (__arm_vqshlq_m_r_s32): Likewise.
7660         (__arm_vqrshlq_m_n_s32): Likewise.
7661         (__arm_vqnegq_m_s32): Likewise.
7662         (__arm_vqabsq_m_s32): Likewise.
7663         (__arm_vnegq_m_s32): Likewise.
7664         (__arm_vmvnq_m_s32): Likewise.
7665         (__arm_vmlsdavxq_p_s32): Likewise.
7666         (__arm_vmlsdavq_p_s32): Likewise.
7667         (__arm_vmladavxq_p_s32): Likewise.
7668         (__arm_vmladavq_p_s32): Likewise.
7669         (__arm_vminvq_p_s32): Likewise.
7670         (__arm_vmaxvq_p_s32): Likewise.
7671         (__arm_vdupq_m_n_s32): Likewise.
7672         (__arm_vclzq_m_s32): Likewise.
7673         (__arm_vclsq_m_s32): Likewise.
7674         (__arm_vaddvaq_p_s32): Likewise.
7675         (__arm_vabsq_m_s32): Likewise.
7676         (__arm_vqrdmlsdhxq_s32): Likewise.
7677         (__arm_vqrdmlsdhq_s32): Likewise.
7678         (__arm_vqrdmlashq_n_s32): Likewise.
7679         (__arm_vqrdmlahq_n_s32): Likewise.
7680         (__arm_vqrdmladhxq_s32): Likewise.
7681         (__arm_vqrdmladhq_s32): Likewise.
7682         (__arm_vqdmlsdhxq_s32): Likewise.
7683         (__arm_vqdmlsdhq_s32): Likewise.
7684         (__arm_vqdmlahq_n_s32): Likewise.
7685         (__arm_vqdmladhxq_s32): Likewise.
7686         (__arm_vqdmladhq_s32): Likewise.
7687         (__arm_vmlsdavaxq_s32): Likewise.
7688         (__arm_vmlsdavaq_s32): Likewise.
7689         (__arm_vmlasq_n_s32): Likewise.
7690         (__arm_vmlaq_n_s32): Likewise.
7691         (__arm_vmladavaxq_s32): Likewise.
7692         (__arm_vmladavaq_s32): Likewise.
7693         (__arm_vsriq_n_s32): Likewise.
7694         (__arm_vsliq_n_s32): Likewise.
7695         (__arm_vpselq_u64): Likewise.
7696         (__arm_vpselq_s64): Likewise.
7697         (vcmpneq_m_n): Define polymorphic variant.
7698         (vcmpneq_m): Likewise.
7699         (vqrdmlsdhq): Likewise.
7700         (vqrdmlsdhxq): Likewise.
7701         (vqrshlq_m_n): Likewise.
7702         (vqshlq_m_r): Likewise.
7703         (vrev64q_m): Likewise.
7704         (vrshlq_m_n): Likewise.
7705         (vshlq_m_r): Likewise.
7706         (vsliq_n): Likewise.
7707         (vsriq_n): Likewise.
7708         (vqrdmlashq_n): Likewise.
7709         (vqrdmlahq): Likewise.
7710         (vqrdmladhxq): Likewise.
7711         (vqrdmladhq): Likewise.
7712         (vqnegq_m): Likewise.
7713         (vqdmlsdhxq): Likewise.
7714         (vabsq_m): Likewise.
7715         (vclsq_m): Likewise.
7716         (vclzq_m): Likewise.
7717         (vcmpgeq_m): Likewise.
7718         (vcmpgeq_m_n): Likewise.
7719         (vdupq_m_n): Likewise.
7720         (vmaxaq_m): Likewise.
7721         (vmlaq_n): Likewise.
7722         (vmlasq_n): Likewise.
7723         (vmvnq_m): Likewise.
7724         (vnegq_m): Likewise.
7725         (vpselq): Likewise.
7726         (vqdmlahq_n): Likewise.
7727         (vqrdmlahq_n): Likewise.
7728         (vqdmlsdhq): Likewise.
7729         (vqdmladhq): Likewise.
7730         (vqabsq_m): Likewise.
7731         (vminaq_m): Likewise.
7732         (vrmlaldavhaq): Likewise.
7733         (vmlsdavxq_p): Likewise.
7734         (vmlsdavq_p): Likewise.
7735         (vmlsdavaxq): Likewise.
7736         (vmlsdavaq): Likewise.
7737         (vaddvaq_p): Likewise.
7738         (vcmpcsq_m_n): Likewise.
7739         (vcmpcsq_m): Likewise.
7740         (vcmpeqq_m_n): Likewise.
7741         (vcmpeqq_m): Likewise.
7742         (vmladavxq_p): Likewise.
7743         (vmladavq_p): Likewise.
7744         (vmladavaxq): Likewise.
7745         (vmladavaq): Likewise.
7746         (vminvq_p): Likewise.
7747         (vminavq_p): Likewise.
7748         (vmaxvq_p): Likewise.
7749         (vmaxavq_p): Likewise.
7750         (vcmpltq_m_n): Likewise.
7751         (vcmpltq_m): Likewise.
7752         (vcmpleq_m): Likewise.
7753         (vcmpleq_m_n): Likewise.
7754         (vcmphiq_m_n): Likewise.
7755         (vcmphiq_m): Likewise.
7756         (vcmpgtq_m_n): Likewise.
7757         (vcmpgtq_m): Likewise.
7758         * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
7759         builtin qualifier.
7760         (TERNOP_NONE_NONE_NONE_NONE): Likewise.
7761         (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
7762         (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
7763         (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
7764         (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
7765         (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
7766         * config/arm/constraints.md (Rc): Define constraint to check constant is
7767         in the range of 0 to 15.
7768         (Re): Define constraint to check constant is in the range of 0 to 31.
7769         * config/arm/mve.md (VADDVAQ_P): Define iterator.
7770         (VCLZQ_M): Likewise.
7771         (VCMPEQQ_M_N): Likewise.
7772         (VCMPEQQ_M): Likewise.
7773         (VCMPNEQ_M_N): Likewise.
7774         (VCMPNEQ_M): Likewise.
7775         (VDUPQ_M_N): Likewise.
7776         (VMAXVQ_P): Likewise.
7777         (VMINVQ_P): Likewise.
7778         (VMLADAVAQ): Likewise.
7779         (VMLADAVQ_P): Likewise.
7780         (VMLAQ_N): Likewise.
7781         (VMLASQ_N): Likewise.
7782         (VMVNQ_M): Likewise.
7783         (VPSELQ): Likewise.
7784         (VQDMLAHQ_N): Likewise.
7785         (VQRDMLAHQ_N): Likewise.
7786         (VQRDMLASHQ_N): Likewise.
7787         (VQRSHLQ_M_N): Likewise.
7788         (VQSHLQ_M_R): Likewise.
7789         (VREV64Q_M): Likewise.
7790         (VRSHLQ_M_N): Likewise.
7791         (VSHLQ_M_R): Likewise.
7792         (VSLIQ_N): Likewise.
7793         (VSRIQ_N): Likewise.
7794         (mve_vabsq_m_s<mode>): Define RTL pattern.
7795         (mve_vaddvaq_p_<supf><mode>): Likewise.
7796         (mve_vclsq_m_s<mode>): Likewise.
7797         (mve_vclzq_m_<supf><mode>): Likewise.
7798         (mve_vcmpcsq_m_n_u<mode>): Likewise.
7799         (mve_vcmpcsq_m_u<mode>): Likewise.
7800         (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
7801         (mve_vcmpeqq_m_<supf><mode>): Likewise.
7802         (mve_vcmpgeq_m_n_s<mode>): Likewise.
7803         (mve_vcmpgeq_m_s<mode>): Likewise.
7804         (mve_vcmpgtq_m_n_s<mode>): Likewise.
7805         (mve_vcmpgtq_m_s<mode>): Likewise.
7806         (mve_vcmphiq_m_n_u<mode>): Likewise.
7807         (mve_vcmphiq_m_u<mode>): Likewise.
7808         (mve_vcmpleq_m_n_s<mode>): Likewise.
7809         (mve_vcmpleq_m_s<mode>): Likewise.
7810         (mve_vcmpltq_m_n_s<mode>): Likewise.
7811         (mve_vcmpltq_m_s<mode>): Likewise.
7812         (mve_vcmpneq_m_n_<supf><mode>): Likewise.
7813         (mve_vcmpneq_m_<supf><mode>): Likewise.
7814         (mve_vdupq_m_n_<supf><mode>): Likewise.
7815         (mve_vmaxaq_m_s<mode>): Likewise.
7816         (mve_vmaxavq_p_s<mode>): Likewise.
7817         (mve_vmaxvq_p_<supf><mode>): Likewise.
7818         (mve_vminaq_m_s<mode>): Likewise.
7819         (mve_vminavq_p_s<mode>): Likewise.
7820         (mve_vminvq_p_<supf><mode>): Likewise.
7821         (mve_vmladavaq_<supf><mode>): Likewise.
7822         (mve_vmladavq_p_<supf><mode>): Likewise.
7823         (mve_vmladavxq_p_s<mode>): Likewise.
7824         (mve_vmlaq_n_<supf><mode>): Likewise.
7825         (mve_vmlasq_n_<supf><mode>): Likewise.
7826         (mve_vmlsdavq_p_s<mode>): Likewise.
7827         (mve_vmlsdavxq_p_s<mode>): Likewise.
7828         (mve_vmvnq_m_<supf><mode>): Likewise.
7829         (mve_vnegq_m_s<mode>): Likewise.
7830         (mve_vpselq_<supf><mode>): Likewise.
7831         (mve_vqabsq_m_s<mode>): Likewise.
7832         (mve_vqdmlahq_n_<supf><mode>): Likewise.
7833         (mve_vqnegq_m_s<mode>): Likewise.
7834         (mve_vqrdmladhq_s<mode>): Likewise.
7835         (mve_vqrdmladhxq_s<mode>): Likewise.
7836         (mve_vqrdmlahq_n_<supf><mode>): Likewise.
7837         (mve_vqrdmlashq_n_<supf><mode>): Likewise.
7838         (mve_vqrdmlsdhq_s<mode>): Likewise.
7839         (mve_vqrdmlsdhxq_s<mode>): Likewise.
7840         (mve_vqrshlq_m_n_<supf><mode>): Likewise.
7841         (mve_vqshlq_m_r_<supf><mode>): Likewise.
7842         (mve_vrev64q_m_<supf><mode>): Likewise.
7843         (mve_vrshlq_m_n_<supf><mode>): Likewise.
7844         (mve_vshlq_m_r_<supf><mode>): Likewise.
7845         (mve_vsliq_n_<supf><mode>): Likewise.
7846         (mve_vsriq_n_<supf><mode>): Likewise.
7847         (mve_vqdmlsdhxq_s<mode>): Likewise.
7848         (mve_vqdmlsdhq_s<mode>): Likewise.
7849         (mve_vqdmladhxq_s<mode>): Likewise.
7850         (mve_vqdmladhq_s<mode>): Likewise.
7851         (mve_vmlsdavaxq_s<mode>): Likewise.
7852         (mve_vmlsdavaq_s<mode>): Likewise.
7853         (mve_vmladavaxq_s<mode>): Likewise.
7854         * config/arm/predicates.md (mve_imm_15):Define predicate to check the
7855         matching constraint Rc.
7856         (mve_imm_31): Define predicate to check the matching constraint Re.
7857
7858 2020-03-18  Andrew Stubbs  <ams@codesourcery.com>
7859
7860         * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
7861         (vec_cmp<mode>di_dup): Likewise.
7862         * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
7863
7864 2020-03-18  Andrew Stubbs  <ams@codesourcery.com>
7865
7866         * config/gcn/gcn-valu.md (COND_MODE): Delete.
7867         (COND_INT_MODE): Delete.
7868         (cond_op): Add "mult".
7869         (cond_<expander><mode>): Use VEC_ALLREG_MODE.
7870         (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
7871
7872 2020-03-18   Richard Biener  <rguenther@suse.de>
7873
7874         PR middle-end/94206
7875         * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
7876         partial int modes or not mode-precision integer types for
7877         the store.
7878
7879 2020-03-18  Jakub Jelinek  <jakub@redhat.com>
7880
7881         * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
7882         in a comment.
7883         * config/arc/arc.c (frame_stack_add): Likewise.
7884         * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
7885         Likewise.
7886         * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
7887         * tree-ssa-strlen.h (handle_printf_call): Likewise.
7888         * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
7889         * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
7890
7891 2020-03-18  Duan bo  <duanbo3@huawei.com>
7892
7893         PR target/94201
7894         * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
7895         (@ldr_got_tiny_<mode>): New pattern.
7896         (ldr_got_tiny_sidi): Likewise.
7897         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
7898         them to handle SYMBOL_TINY_GOT for ILP32.
7899
7900 2020-03-18  Richard Sandiford  <richard.sandiford@arm.com>
7901
7902         * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
7903         call-preserved for SVE PCS functions.
7904         (aarch64_layout_frame): Cope with up to 12 predicate save slots.
7905         Optimize the case in which there are no following vector save slots.
7906
7907 2020-03-18  Richard Biener  <rguenther@suse.de>
7908
7909         PR middle-end/94188
7910         * fold-const.c (build_fold_addr_expr): Convert address to
7911         correct type.
7912         * asan.c (maybe_create_ssa_name): Strip useless type conversions.
7913         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
7914         to build the ADDR_EXPR which we don't really want to simplify.
7915         * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
7916         * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
7917         * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
7918         (simplify_builtin_call): Strip useless type conversions.
7919         * tree-ssa-strlen.c (new_strinfo): Likewise.
7920
7921 2020-03-17  Alexey Neyman  <stilor@att.net>
7922
7923         PR debug/93751
7924         * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
7925         the debug level is terse and the declaration is public. Do not
7926         generate type info.
7927         (dwarf2out_decl): Same.
7928         (add_type_attribute): Return immediately if debug level is
7929         terse.
7930
7931 2020-03-17  Richard Sandiford  <richard.sandiford@arm.com>
7932
7933         * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
7934
7935 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
7936             Mihail Ionescu  <mihail.ionescu@arm.com>
7937             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
7938
7939         * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
7940         Define qualifier for ternary operands.
7941         (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
7942         (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
7943         (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
7944         (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
7945         (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
7946         (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
7947         (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
7948         (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
7949         (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
7950         (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
7951         (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
7952         (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
7953         (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
7954         * config/arm/arm_mve.h (vabavq_s8): Define macro.
7955         (vabavq_s16): Likewise.
7956         (vabavq_s32): Likewise.
7957         (vbicq_m_n_s16): Likewise.
7958         (vbicq_m_n_s32): Likewise.
7959         (vbicq_m_n_u16): Likewise.
7960         (vbicq_m_n_u32): Likewise.
7961         (vcmpeqq_m_f16): Likewise.
7962         (vcmpeqq_m_f32): Likewise.
7963         (vcvtaq_m_s16_f16): Likewise.
7964         (vcvtaq_m_u16_f16): Likewise.
7965         (vcvtaq_m_s32_f32): Likewise.
7966         (vcvtaq_m_u32_f32): Likewise.
7967         (vcvtq_m_f16_s16): Likewise.
7968         (vcvtq_m_f16_u16): Likewise.
7969         (vcvtq_m_f32_s32): Likewise.
7970         (vcvtq_m_f32_u32): Likewise.
7971         (vqrshrnbq_n_s16): Likewise.
7972         (vqrshrnbq_n_u16): Likewise.
7973         (vqrshrnbq_n_s32): Likewise.
7974         (vqrshrnbq_n_u32): Likewise.
7975         (vqrshrunbq_n_s16): Likewise.
7976         (vqrshrunbq_n_s32): Likewise.
7977         (vrmlaldavhaq_s32): Likewise.
7978         (vrmlaldavhaq_u32): Likewise.
7979         (vshlcq_s8): Likewise.
7980         (vshlcq_u8): Likewise.
7981         (vshlcq_s16): Likewise.
7982         (vshlcq_u16): Likewise.
7983         (vshlcq_s32): Likewise.
7984         (vshlcq_u32): Likewise.
7985         (vabavq_u8): Likewise.
7986         (vabavq_u16): Likewise.
7987         (vabavq_u32): Likewise.
7988         (__arm_vabavq_s8): Define intrinsic.
7989         (__arm_vabavq_s16): Likewise.
7990         (__arm_vabavq_s32): Likewise.
7991         (__arm_vabavq_u8): Likewise.
7992         (__arm_vabavq_u16): Likewise.
7993         (__arm_vabavq_u32): Likewise.
7994         (__arm_vbicq_m_n_s16): Likewise.
7995         (__arm_vbicq_m_n_s32): Likewise.
7996         (__arm_vbicq_m_n_u16): Likewise.
7997         (__arm_vbicq_m_n_u32): Likewise.
7998         (__arm_vqrshrnbq_n_s16): Likewise.
7999         (__arm_vqrshrnbq_n_u16): Likewise.
8000         (__arm_vqrshrnbq_n_s32): Likewise.
8001         (__arm_vqrshrnbq_n_u32): Likewise.
8002         (__arm_vqrshrunbq_n_s16): Likewise.
8003         (__arm_vqrshrunbq_n_s32): Likewise.
8004         (__arm_vrmlaldavhaq_s32): Likewise.
8005         (__arm_vrmlaldavhaq_u32): Likewise.
8006         (__arm_vshlcq_s8): Likewise.
8007         (__arm_vshlcq_u8): Likewise.
8008         (__arm_vshlcq_s16): Likewise.
8009         (__arm_vshlcq_u16): Likewise.
8010         (__arm_vshlcq_s32): Likewise.
8011         (__arm_vshlcq_u32): Likewise.
8012         (__arm_vcmpeqq_m_f16): Likewise.
8013         (__arm_vcmpeqq_m_f32): Likewise.
8014         (__arm_vcvtaq_m_s16_f16): Likewise.
8015         (__arm_vcvtaq_m_u16_f16): Likewise.
8016         (__arm_vcvtaq_m_s32_f32): Likewise.
8017         (__arm_vcvtaq_m_u32_f32): Likewise.
8018         (__arm_vcvtq_m_f16_s16): Likewise.
8019         (__arm_vcvtq_m_f16_u16): Likewise.
8020         (__arm_vcvtq_m_f32_s32): Likewise.
8021         (__arm_vcvtq_m_f32_u32): Likewise.
8022         (vcvtaq_m): Define polymorphic variant.
8023         (vcvtq_m): Likewise.
8024         (vabavq): Likewise.
8025         (vshlcq): Likewise.
8026         (vbicq_m_n): Likewise.
8027         (vqrshrnbq_n): Likewise.
8028         (vqrshrunbq_n): Likewise.
8029         * config/arm/arm_mve_builtins.def
8030         (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
8031         (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
8032         (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
8033         (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
8034         (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
8035         (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8036         (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8037         (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8038         (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
8039         (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8040         (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8041         (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
8042         (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8043         (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
8044         * config/arm/mve.md (VBICQ_M_N): Define iterator.
8045         (VCVTAQ_M): Likewise.
8046         (VCVTQ_M_TO_F): Likewise.
8047         (VQRSHRNBQ_N): Likewise.
8048         (VABAVQ): Likewise.
8049         (VSHLCQ): Likewise.
8050         (VRMLALDAVHAQ): Likewise.
8051         (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
8052         (mve_vcmpeqq_m_f<mode>): Likewise.
8053         (mve_vcvtaq_m_<supf><mode>): Likewise.
8054         (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
8055         (mve_vqrshrnbq_n_<supf><mode>): Likewise.
8056         (mve_vqrshrunbq_n_s<mode>): Likewise.
8057         (mve_vrmlaldavhaq_<supf>v4si): Likewise.
8058         (mve_vabavq_<supf><mode>): Likewise.
8059         (mve_vshlcq_<supf><mode>): Likewise.
8060         (mve_vshlcq_<supf><mode>): Likewise.
8061         (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
8062         (mve_vshlcq_carry_<supf><mode>): Likewise.
8063
8064 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
8065             Mihail Ionescu  <mihail.ionescu@arm.com>
8066             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
8067
8068         * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
8069         (vqmovnbq_u16): Likewise.
8070         (vmulltq_poly_p8): Likewise.
8071         (vmullbq_poly_p8): Likewise.
8072         (vmovntq_u16): Likewise.
8073         (vmovnbq_u16): Likewise.
8074         (vmlaldavxq_u16): Likewise.
8075         (vmlaldavq_u16): Likewise.
8076         (vqmovuntq_s16): Likewise.
8077         (vqmovunbq_s16): Likewise.
8078         (vshlltq_n_u8): Likewise.
8079         (vshllbq_n_u8): Likewise.
8080         (vorrq_n_u16): Likewise.
8081         (vbicq_n_u16): Likewise.
8082         (vcmpneq_n_f16): Likewise.
8083         (vcmpneq_f16): Likewise.
8084         (vcmpltq_n_f16): Likewise.
8085         (vcmpltq_f16): Likewise.
8086         (vcmpleq_n_f16): Likewise.
8087         (vcmpleq_f16): Likewise.
8088         (vcmpgtq_n_f16): Likewise.
8089         (vcmpgtq_f16): Likewise.
8090         (vcmpgeq_n_f16): Likewise.
8091         (vcmpgeq_f16): Likewise.
8092         (vcmpeqq_n_f16): Likewise.
8093         (vcmpeqq_f16): Likewise.
8094         (vsubq_f16): Likewise.
8095         (vqmovntq_s16): Likewise.
8096         (vqmovnbq_s16): Likewise.
8097         (vqdmulltq_s16): Likewise.
8098         (vqdmulltq_n_s16): Likewise.
8099         (vqdmullbq_s16): Likewise.
8100         (vqdmullbq_n_s16): Likewise.
8101         (vorrq_f16): Likewise.
8102         (vornq_f16): Likewise.
8103         (vmulq_n_f16): Likewise.
8104         (vmulq_f16): Likewise.
8105         (vmovntq_s16): Likewise.
8106         (vmovnbq_s16): Likewise.
8107         (vmlsldavxq_s16): Likewise.
8108         (vmlsldavq_s16): Likewise.
8109         (vmlaldavxq_s16): Likewise.
8110         (vmlaldavq_s16): Likewise.
8111         (vminnmvq_f16): Likewise.
8112         (vminnmq_f16): Likewise.
8113         (vminnmavq_f16): Likewise.
8114         (vminnmaq_f16): Likewise.
8115         (vmaxnmvq_f16): Likewise.
8116         (vmaxnmq_f16): Likewise.
8117         (vmaxnmavq_f16): Likewise.
8118         (vmaxnmaq_f16): Likewise.
8119         (veorq_f16): Likewise.
8120         (vcmulq_rot90_f16): Likewise.
8121         (vcmulq_rot270_f16): Likewise.
8122         (vcmulq_rot180_f16): Likewise.
8123         (vcmulq_f16): Likewise.
8124         (vcaddq_rot90_f16): Likewise.
8125         (vcaddq_rot270_f16): Likewise.
8126         (vbicq_f16): Likewise.
8127         (vandq_f16): Likewise.
8128         (vaddq_n_f16): Likewise.
8129         (vabdq_f16): Likewise.
8130         (vshlltq_n_s8): Likewise.
8131         (vshllbq_n_s8): Likewise.
8132         (vorrq_n_s16): Likewise.
8133         (vbicq_n_s16): Likewise.
8134         (vqmovntq_u32): Likewise.
8135         (vqmovnbq_u32): Likewise.
8136         (vmulltq_poly_p16): Likewise.
8137         (vmullbq_poly_p16): Likewise.
8138         (vmovntq_u32): Likewise.
8139         (vmovnbq_u32): Likewise.
8140         (vmlaldavxq_u32): Likewise.
8141         (vmlaldavq_u32): Likewise.
8142         (vqmovuntq_s32): Likewise.
8143         (vqmovunbq_s32): Likewise.
8144         (vshlltq_n_u16): Likewise.
8145         (vshllbq_n_u16): Likewise.
8146         (vorrq_n_u32): Likewise.
8147         (vbicq_n_u32): Likewise.
8148         (vcmpneq_n_f32): Likewise.
8149         (vcmpneq_f32): Likewise.
8150         (vcmpltq_n_f32): Likewise.
8151         (vcmpltq_f32): Likewise.
8152         (vcmpleq_n_f32): Likewise.
8153         (vcmpleq_f32): Likewise.
8154         (vcmpgtq_n_f32): Likewise.
8155         (vcmpgtq_f32): Likewise.
8156         (vcmpgeq_n_f32): Likewise.
8157         (vcmpgeq_f32): Likewise.
8158         (vcmpeqq_n_f32): Likewise.
8159         (vcmpeqq_f32): Likewise.
8160         (vsubq_f32): Likewise.
8161         (vqmovntq_s32): Likewise.
8162         (vqmovnbq_s32): Likewise.
8163         (vqdmulltq_s32): Likewise.
8164         (vqdmulltq_n_s32): Likewise.
8165         (vqdmullbq_s32): Likewise.
8166         (vqdmullbq_n_s32): Likewise.
8167         (vorrq_f32): Likewise.
8168         (vornq_f32): Likewise.
8169         (vmulq_n_f32): Likewise.
8170         (vmulq_f32): Likewise.
8171         (vmovntq_s32): Likewise.
8172         (vmovnbq_s32): Likewise.
8173         (vmlsldavxq_s32): Likewise.
8174         (vmlsldavq_s32): Likewise.
8175         (vmlaldavxq_s32): Likewise.
8176         (vmlaldavq_s32): Likewise.
8177         (vminnmvq_f32): Likewise.
8178         (vminnmq_f32): Likewise.
8179         (vminnmavq_f32): Likewise.
8180         (vminnmaq_f32): Likewise.
8181         (vmaxnmvq_f32): Likewise.
8182         (vmaxnmq_f32): Likewise.
8183         (vmaxnmavq_f32): Likewise.
8184         (vmaxnmaq_f32): Likewise.
8185         (veorq_f32): Likewise.
8186         (vcmulq_rot90_f32): Likewise.
8187         (vcmulq_rot270_f32): Likewise.
8188         (vcmulq_rot180_f32): Likewise.
8189         (vcmulq_f32): Likewise.
8190         (vcaddq_rot90_f32): Likewise.
8191         (vcaddq_rot270_f32): Likewise.
8192         (vbicq_f32): Likewise.
8193         (vandq_f32): Likewise.
8194         (vaddq_n_f32): Likewise.
8195         (vabdq_f32): Likewise.
8196         (vshlltq_n_s16): Likewise.
8197         (vshllbq_n_s16): Likewise.
8198         (vorrq_n_s32): Likewise.
8199         (vbicq_n_s32): Likewise.
8200         (vrmlaldavhq_u32): Likewise.
8201         (vctp8q_m): Likewise.
8202         (vctp64q_m): Likewise.
8203         (vctp32q_m): Likewise.
8204         (vctp16q_m): Likewise.
8205         (vaddlvaq_u32): Likewise.
8206         (vrmlsldavhxq_s32): Likewise.
8207         (vrmlsldavhq_s32): Likewise.
8208         (vrmlaldavhxq_s32): Likewise.
8209         (vrmlaldavhq_s32): Likewise.
8210         (vcvttq_f16_f32): Likewise.
8211         (vcvtbq_f16_f32): Likewise.
8212         (vaddlvaq_s32): Likewise.
8213         (__arm_vqmovntq_u16): Define intrinsic.
8214         (__arm_vqmovnbq_u16): Likewise.
8215         (__arm_vmulltq_poly_p8): Likewise.
8216         (__arm_vmullbq_poly_p8): Likewise.
8217         (__arm_vmovntq_u16): Likewise.
8218         (__arm_vmovnbq_u16): Likewise.
8219         (__arm_vmlaldavxq_u16): Likewise.
8220         (__arm_vmlaldavq_u16): Likewise.
8221         (__arm_vqmovuntq_s16): Likewise.
8222         (__arm_vqmovunbq_s16): Likewise.
8223         (__arm_vshlltq_n_u8): Likewise.
8224         (__arm_vshllbq_n_u8): Likewise.
8225         (__arm_vorrq_n_u16): Likewise.
8226         (__arm_vbicq_n_u16): Likewise.
8227         (__arm_vcmpneq_n_f16): Likewise.
8228         (__arm_vcmpneq_f16): Likewise.
8229         (__arm_vcmpltq_n_f16): Likewise.
8230         (__arm_vcmpltq_f16): Likewise.
8231         (__arm_vcmpleq_n_f16): Likewise.
8232         (__arm_vcmpleq_f16): Likewise.
8233         (__arm_vcmpgtq_n_f16): Likewise.
8234         (__arm_vcmpgtq_f16): Likewise.
8235         (__arm_vcmpgeq_n_f16): Likewise.
8236         (__arm_vcmpgeq_f16): Likewise.
8237         (__arm_vcmpeqq_n_f16): Likewise.
8238         (__arm_vcmpeqq_f16): Likewise.
8239         (__arm_vsubq_f16): Likewise.
8240         (__arm_vqmovntq_s16): Likewise.
8241         (__arm_vqmovnbq_s16): Likewise.
8242         (__arm_vqdmulltq_s16): Likewise.
8243         (__arm_vqdmulltq_n_s16): Likewise.
8244         (__arm_vqdmullbq_s16): Likewise.
8245         (__arm_vqdmullbq_n_s16): Likewise.
8246         (__arm_vorrq_f16): Likewise.
8247         (__arm_vornq_f16): Likewise.
8248         (__arm_vmulq_n_f16): Likewise.
8249         (__arm_vmulq_f16): Likewise.
8250         (__arm_vmovntq_s16): Likewise.
8251         (__arm_vmovnbq_s16): Likewise.
8252         (__arm_vmlsldavxq_s16): Likewise.
8253         (__arm_vmlsldavq_s16): Likewise.
8254         (__arm_vmlaldavxq_s16): Likewise.
8255         (__arm_vmlaldavq_s16): Likewise.
8256         (__arm_vminnmvq_f16): Likewise.
8257         (__arm_vminnmq_f16): Likewise.
8258         (__arm_vminnmavq_f16): Likewise.
8259         (__arm_vminnmaq_f16): Likewise.
8260         (__arm_vmaxnmvq_f16): Likewise.
8261         (__arm_vmaxnmq_f16): Likewise.
8262         (__arm_vmaxnmavq_f16): Likewise.
8263         (__arm_vmaxnmaq_f16): Likewise.
8264         (__arm_veorq_f16): Likewise.
8265         (__arm_vcmulq_rot90_f16): Likewise.
8266         (__arm_vcmulq_rot270_f16): Likewise.
8267         (__arm_vcmulq_rot180_f16): Likewise.
8268         (__arm_vcmulq_f16): Likewise.
8269         (__arm_vcaddq_rot90_f16): Likewise.
8270         (__arm_vcaddq_rot270_f16): Likewise.
8271         (__arm_vbicq_f16): Likewise.
8272         (__arm_vandq_f16): Likewise.
8273         (__arm_vaddq_n_f16): Likewise.
8274         (__arm_vabdq_f16): Likewise.
8275         (__arm_vshlltq_n_s8): Likewise.
8276         (__arm_vshllbq_n_s8): Likewise.
8277         (__arm_vorrq_n_s16): Likewise.
8278         (__arm_vbicq_n_s16): Likewise.
8279         (__arm_vqmovntq_u32): Likewise.
8280         (__arm_vqmovnbq_u32): Likewise.
8281         (__arm_vmulltq_poly_p16): Likewise.
8282         (__arm_vmullbq_poly_p16): Likewise.
8283         (__arm_vmovntq_u32): Likewise.
8284         (__arm_vmovnbq_u32): Likewise.
8285         (__arm_vmlaldavxq_u32): Likewise.
8286         (__arm_vmlaldavq_u32): Likewise.
8287         (__arm_vqmovuntq_s32): Likewise.
8288         (__arm_vqmovunbq_s32): Likewise.
8289         (__arm_vshlltq_n_u16): Likewise.
8290         (__arm_vshllbq_n_u16): Likewise.
8291         (__arm_vorrq_n_u32): Likewise.
8292         (__arm_vbicq_n_u32): Likewise.
8293         (__arm_vcmpneq_n_f32): Likewise.
8294         (__arm_vcmpneq_f32): Likewise.
8295         (__arm_vcmpltq_n_f32): Likewise.
8296         (__arm_vcmpltq_f32): Likewise.
8297         (__arm_vcmpleq_n_f32): Likewise.
8298         (__arm_vcmpleq_f32): Likewise.
8299         (__arm_vcmpgtq_n_f32): Likewise.
8300         (__arm_vcmpgtq_f32): Likewise.
8301         (__arm_vcmpgeq_n_f32): Likewise.
8302         (__arm_vcmpgeq_f32): Likewise.
8303         (__arm_vcmpeqq_n_f32): Likewise.
8304         (__arm_vcmpeqq_f32): Likewise.
8305         (__arm_vsubq_f32): Likewise.
8306         (__arm_vqmovntq_s32): Likewise.
8307         (__arm_vqmovnbq_s32): Likewise.
8308         (__arm_vqdmulltq_s32): Likewise.
8309         (__arm_vqdmulltq_n_s32): Likewise.
8310         (__arm_vqdmullbq_s32): Likewise.
8311         (__arm_vqdmullbq_n_s32): Likewise.
8312         (__arm_vorrq_f32): Likewise.
8313         (__arm_vornq_f32): Likewise.
8314         (__arm_vmulq_n_f32): Likewise.
8315         (__arm_vmulq_f32): Likewise.
8316         (__arm_vmovntq_s32): Likewise.
8317         (__arm_vmovnbq_s32): Likewise.
8318         (__arm_vmlsldavxq_s32): Likewise.
8319         (__arm_vmlsldavq_s32): Likewise.
8320         (__arm_vmlaldavxq_s32): Likewise.
8321         (__arm_vmlaldavq_s32): Likewise.
8322         (__arm_vminnmvq_f32): Likewise.
8323         (__arm_vminnmq_f32): Likewise.
8324         (__arm_vminnmavq_f32): Likewise.
8325         (__arm_vminnmaq_f32): Likewise.
8326         (__arm_vmaxnmvq_f32): Likewise.
8327         (__arm_vmaxnmq_f32): Likewise.
8328         (__arm_vmaxnmavq_f32): Likewise.
8329         (__arm_vmaxnmaq_f32): Likewise.
8330         (__arm_veorq_f32): Likewise.
8331         (__arm_vcmulq_rot90_f32): Likewise.
8332         (__arm_vcmulq_rot270_f32): Likewise.
8333         (__arm_vcmulq_rot180_f32): Likewise.
8334         (__arm_vcmulq_f32): Likewise.
8335         (__arm_vcaddq_rot90_f32): Likewise.
8336         (__arm_vcaddq_rot270_f32): Likewise.
8337         (__arm_vbicq_f32): Likewise.
8338         (__arm_vandq_f32): Likewise.
8339         (__arm_vaddq_n_f32): Likewise.
8340         (__arm_vabdq_f32): Likewise.
8341         (__arm_vshlltq_n_s16): Likewise.
8342         (__arm_vshllbq_n_s16): Likewise.
8343         (__arm_vorrq_n_s32): Likewise.
8344         (__arm_vbicq_n_s32): Likewise.
8345         (__arm_vrmlaldavhq_u32): Likewise.
8346         (__arm_vctp8q_m): Likewise.
8347         (__arm_vctp64q_m): Likewise.
8348         (__arm_vctp32q_m): Likewise.
8349         (__arm_vctp16q_m): Likewise.
8350         (__arm_vaddlvaq_u32): Likewise.
8351         (__arm_vrmlsldavhxq_s32): Likewise.
8352         (__arm_vrmlsldavhq_s32): Likewise.
8353         (__arm_vrmlaldavhxq_s32): Likewise.
8354         (__arm_vrmlaldavhq_s32): Likewise.
8355         (__arm_vcvttq_f16_f32): Likewise.
8356         (__arm_vcvtbq_f16_f32): Likewise.
8357         (__arm_vaddlvaq_s32): Likewise.
8358         (vst4q): Define polymorphic variant.
8359         (vrndxq): Likewise.
8360         (vrndq): Likewise.
8361         (vrndpq): Likewise.
8362         (vrndnq): Likewise.
8363         (vrndmq): Likewise.
8364         (vrndaq): Likewise.
8365         (vrev64q): Likewise.
8366         (vnegq): Likewise.
8367         (vdupq_n): Likewise.
8368         (vabsq): Likewise.
8369         (vrev32q): Likewise.
8370         (vcvtbq_f32): Likewise.
8371         (vcvttq_f32): Likewise.
8372         (vcvtq): Likewise.
8373         (vsubq_n): Likewise.
8374         (vbrsrq_n): Likewise.
8375         (vcvtq_n): Likewise.
8376         (vsubq): Likewise.
8377         (vorrq): Likewise.
8378         (vabdq): Likewise.
8379         (vaddq_n): Likewise.
8380         (vandq): Likewise.
8381         (vbicq): Likewise.
8382         (vornq): Likewise.
8383         (vmulq_n): Likewise.
8384         (vmulq): Likewise.
8385         (vcaddq_rot270): Likewise.
8386         (vcmpeqq_n): Likewise.
8387         (vcmpeqq): Likewise.
8388         (vcaddq_rot90): Likewise.
8389         (vcmpgeq_n): Likewise.
8390         (vcmpgeq): Likewise.
8391         (vcmpgtq_n): Likewise.
8392         (vcmpgtq): Likewise.
8393         (vcmpgtq): Likewise.
8394         (vcmpleq_n): Likewise.
8395         (vcmpleq_n): Likewise.
8396         (vcmpleq): Likewise.
8397         (vcmpleq): Likewise.
8398         (vcmpltq_n): Likewise.
8399         (vcmpltq_n): Likewise.
8400         (vcmpltq): Likewise.
8401         (vcmpltq): Likewise.
8402         (vcmpneq_n): Likewise.
8403         (vcmpneq_n): Likewise.
8404         (vcmpneq): Likewise.
8405         (vcmpneq): Likewise.
8406         (vcmulq): Likewise.
8407         (vcmulq): Likewise.
8408         (vcmulq_rot180): Likewise.
8409         (vcmulq_rot180): Likewise.
8410         (vcmulq_rot270): Likewise.
8411         (vcmulq_rot270): Likewise.
8412         (vcmulq_rot90): Likewise.
8413         (vcmulq_rot90): Likewise.
8414         (veorq): Likewise.
8415         (veorq): Likewise.
8416         (vmaxnmaq): Likewise.
8417         (vmaxnmaq): Likewise.
8418         (vmaxnmavq): Likewise.
8419         (vmaxnmavq): Likewise.
8420         (vmaxnmq): Likewise.
8421         (vmaxnmq): Likewise.
8422         (vmaxnmvq): Likewise.
8423         (vmaxnmvq): Likewise.
8424         (vminnmaq): Likewise.
8425         (vminnmaq): Likewise.
8426         (vminnmavq): Likewise.
8427         (vminnmavq): Likewise.
8428         (vminnmq): Likewise.
8429         (vminnmq): Likewise.
8430         (vminnmvq): Likewise.
8431         (vminnmvq): Likewise.
8432         (vbicq_n): Likewise.
8433         (vqmovntq): Likewise.
8434         (vqmovntq): Likewise.
8435         (vqmovnbq): Likewise.
8436         (vqmovnbq): Likewise.
8437         (vmulltq_poly): Likewise.
8438         (vmulltq_poly): Likewise.
8439         (vmullbq_poly): Likewise.
8440         (vmullbq_poly): Likewise.
8441         (vmovntq): Likewise.
8442         (vmovntq): Likewise.
8443         (vmovnbq): Likewise.
8444         (vmovnbq): Likewise.
8445         (vmlaldavxq): Likewise.
8446         (vmlaldavxq): Likewise.
8447         (vqmovuntq): Likewise.
8448         (vqmovuntq): Likewise.
8449         (vshlltq_n): Likewise.
8450         (vshlltq_n): Likewise.
8451         (vshllbq_n): Likewise.
8452         (vshllbq_n): Likewise.
8453         (vorrq_n): Likewise.
8454         (vorrq_n): Likewise.
8455         (vmlaldavq): Likewise.
8456         (vmlaldavq): Likewise.
8457         (vqmovunbq): Likewise.
8458         (vqmovunbq): Likewise.
8459         (vqdmulltq_n): Likewise.
8460         (vqdmulltq_n): Likewise.
8461         (vqdmulltq): Likewise.
8462         (vqdmulltq): Likewise.
8463         (vqdmullbq_n): Likewise.
8464         (vqdmullbq_n): Likewise.
8465         (vqdmullbq): Likewise.
8466         (vqdmullbq): Likewise.
8467         (vaddlvaq): Likewise.
8468         (vaddlvaq): Likewise.
8469         (vrmlaldavhq): Likewise.
8470         (vrmlaldavhq): Likewise.
8471         (vrmlaldavhxq): Likewise.
8472         (vrmlaldavhxq): Likewise.
8473         (vrmlsldavhq): Likewise.
8474         (vrmlsldavhq): Likewise.
8475         (vrmlsldavhxq): Likewise.
8476         (vrmlsldavhxq): Likewise.
8477         (vmlsldavxq): Likewise.
8478         (vmlsldavxq): Likewise.
8479         (vmlsldavq): Likewise.
8480         (vmlsldavq): Likewise.
8481         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
8482         (BINOP_NONE_NONE_NONE): Likewise.
8483         (BINOP_UNONE_NONE_NONE): Likewise.
8484         (BINOP_UNONE_UNONE_IMM): Likewise.
8485         (BINOP_UNONE_UNONE_NONE): Likewise.
8486         (BINOP_UNONE_UNONE_UNONE): Likewise.
8487         * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
8488         (mve_vaddlvaq_<supf>v4si): Likewise.
8489         (mve_vaddq_n_f<mode>): Likewise.
8490         (mve_vandq_f<mode>): Likewise.
8491         (mve_vbicq_f<mode>): Likewise.
8492         (mve_vbicq_n_<supf><mode>): Likewise.
8493         (mve_vcaddq_rot270_f<mode>): Likewise.
8494         (mve_vcaddq_rot90_f<mode>): Likewise.
8495         (mve_vcmpeqq_f<mode>): Likewise.
8496         (mve_vcmpeqq_n_f<mode>): Likewise.
8497         (mve_vcmpgeq_f<mode>): Likewise.
8498         (mve_vcmpgeq_n_f<mode>): Likewise.
8499         (mve_vcmpgtq_f<mode>): Likewise.
8500         (mve_vcmpgtq_n_f<mode>): Likewise.
8501         (mve_vcmpleq_f<mode>): Likewise.
8502         (mve_vcmpleq_n_f<mode>): Likewise.
8503         (mve_vcmpltq_f<mode>): Likewise.
8504         (mve_vcmpltq_n_f<mode>): Likewise.
8505         (mve_vcmpneq_f<mode>): Likewise.
8506         (mve_vcmpneq_n_f<mode>): Likewise.
8507         (mve_vcmulq_f<mode>): Likewise.
8508         (mve_vcmulq_rot180_f<mode>): Likewise.
8509         (mve_vcmulq_rot270_f<mode>): Likewise.
8510         (mve_vcmulq_rot90_f<mode>): Likewise.
8511         (mve_vctp<mode1>q_mhi): Likewise.
8512         (mve_vcvtbq_f16_f32v8hf): Likewise.
8513         (mve_vcvttq_f16_f32v8hf): Likewise.
8514         (mve_veorq_f<mode>): Likewise.
8515         (mve_vmaxnmaq_f<mode>): Likewise.
8516         (mve_vmaxnmavq_f<mode>): Likewise.
8517         (mve_vmaxnmq_f<mode>): Likewise.
8518         (mve_vmaxnmvq_f<mode>): Likewise.
8519         (mve_vminnmaq_f<mode>): Likewise.
8520         (mve_vminnmavq_f<mode>): Likewise.
8521         (mve_vminnmq_f<mode>): Likewise.
8522         (mve_vminnmvq_f<mode>): Likewise.
8523         (mve_vmlaldavq_<supf><mode>): Likewise.
8524         (mve_vmlaldavxq_<supf><mode>): Likewise.
8525         (mve_vmlsldavq_s<mode>): Likewise.
8526         (mve_vmlsldavxq_s<mode>): Likewise.
8527         (mve_vmovnbq_<supf><mode>): Likewise.
8528         (mve_vmovntq_<supf><mode>): Likewise.
8529         (mve_vmulq_f<mode>): Likewise.
8530         (mve_vmulq_n_f<mode>): Likewise.
8531         (mve_vornq_f<mode>): Likewise.
8532         (mve_vorrq_f<mode>): Likewise.
8533         (mve_vorrq_n_<supf><mode>): Likewise.
8534         (mve_vqdmullbq_n_s<mode>): Likewise.
8535         (mve_vqdmullbq_s<mode>): Likewise.
8536         (mve_vqdmulltq_n_s<mode>): Likewise.
8537         (mve_vqdmulltq_s<mode>): Likewise.
8538         (mve_vqmovnbq_<supf><mode>): Likewise.
8539         (mve_vqmovntq_<supf><mode>): Likewise.
8540         (mve_vqmovunbq_s<mode>): Likewise.
8541         (mve_vqmovuntq_s<mode>): Likewise.
8542         (mve_vrmlaldavhxq_sv4si): Likewise.
8543         (mve_vrmlsldavhq_sv4si): Likewise.
8544         (mve_vrmlsldavhxq_sv4si): Likewise.
8545         (mve_vshllbq_n_<supf><mode>): Likewise.
8546         (mve_vshlltq_n_<supf><mode>): Likewise.
8547         (mve_vsubq_f<mode>): Likewise.
8548         (mve_vmulltq_poly_p<mode>): Likewise.
8549         (mve_vmullbq_poly_p<mode>): Likewise.
8550         (mve_vrmlaldavhq_<supf>v4si): Likewise.
8551
8552 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
8553             Mihail Ionescu  <mihail.ionescu@arm.com>
8554             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
8555
8556         * config/arm/arm_mve.h (vsubq_u8): Define macro.
8557         (vsubq_n_u8): Likewise.
8558         (vrmulhq_u8): Likewise.
8559         (vrhaddq_u8): Likewise.
8560         (vqsubq_u8): Likewise.
8561         (vqsubq_n_u8): Likewise.
8562         (vqaddq_u8): Likewise.
8563         (vqaddq_n_u8): Likewise.
8564         (vorrq_u8): Likewise.
8565         (vornq_u8): Likewise.
8566         (vmulq_u8): Likewise.
8567         (vmulq_n_u8): Likewise.
8568         (vmulltq_int_u8): Likewise.
8569         (vmullbq_int_u8): Likewise.
8570         (vmulhq_u8): Likewise.
8571         (vmladavq_u8): Likewise.
8572         (vminvq_u8): Likewise.
8573         (vminq_u8): Likewise.
8574         (vmaxvq_u8): Likewise.
8575         (vmaxq_u8): Likewise.
8576         (vhsubq_u8): Likewise.
8577         (vhsubq_n_u8): Likewise.
8578         (vhaddq_u8): Likewise.
8579         (vhaddq_n_u8): Likewise.
8580         (veorq_u8): Likewise.
8581         (vcmpneq_n_u8): Likewise.
8582         (vcmphiq_u8): Likewise.
8583         (vcmphiq_n_u8): Likewise.
8584         (vcmpeqq_u8): Likewise.
8585         (vcmpeqq_n_u8): Likewise.
8586         (vcmpcsq_u8): Likewise.
8587         (vcmpcsq_n_u8): Likewise.
8588         (vcaddq_rot90_u8): Likewise.
8589         (vcaddq_rot270_u8): Likewise.
8590         (vbicq_u8): Likewise.
8591         (vandq_u8): Likewise.
8592         (vaddvq_p_u8): Likewise.
8593         (vaddvaq_u8): Likewise.
8594         (vaddq_n_u8): Likewise.
8595         (vabdq_u8): Likewise.
8596         (vshlq_r_u8): Likewise.
8597         (vrshlq_u8): Likewise.
8598         (vrshlq_n_u8): Likewise.
8599         (vqshlq_u8): Likewise.
8600         (vqshlq_r_u8): Likewise.
8601         (vqrshlq_u8): Likewise.
8602         (vqrshlq_n_u8): Likewise.
8603         (vminavq_s8): Likewise.
8604         (vminaq_s8): Likewise.
8605         (vmaxavq_s8): Likewise.
8606         (vmaxaq_s8): Likewise.
8607         (vbrsrq_n_u8): Likewise.
8608         (vshlq_n_u8): Likewise.
8609         (vrshrq_n_u8): Likewise.
8610         (vqshlq_n_u8): Likewise.
8611         (vcmpneq_n_s8): Likewise.
8612         (vcmpltq_s8): Likewise.
8613         (vcmpltq_n_s8): Likewise.
8614         (vcmpleq_s8): Likewise.
8615         (vcmpleq_n_s8): Likewise.
8616         (vcmpgtq_s8): Likewise.
8617         (vcmpgtq_n_s8): Likewise.
8618         (vcmpgeq_s8): Likewise.
8619         (vcmpgeq_n_s8): Likewise.
8620         (vcmpeqq_s8): Likewise.
8621         (vcmpeqq_n_s8): Likewise.
8622         (vqshluq_n_s8): Likewise.
8623         (vaddvq_p_s8): Likewise.
8624         (vsubq_s8): Likewise.
8625         (vsubq_n_s8): Likewise.
8626         (vshlq_r_s8): Likewise.
8627         (vrshlq_s8): Likewise.
8628         (vrshlq_n_s8): Likewise.
8629         (vrmulhq_s8): Likewise.
8630         (vrhaddq_s8): Likewise.
8631         (vqsubq_s8): Likewise.
8632         (vqsubq_n_s8): Likewise.
8633         (vqshlq_s8): Likewise.
8634         (vqshlq_r_s8): Likewise.
8635         (vqrshlq_s8): Likewise.
8636         (vqrshlq_n_s8): Likewise.
8637         (vqrdmulhq_s8): Likewise.
8638         (vqrdmulhq_n_s8): Likewise.
8639         (vqdmulhq_s8): Likewise.
8640         (vqdmulhq_n_s8): Likewise.
8641         (vqaddq_s8): Likewise.
8642         (vqaddq_n_s8): Likewise.
8643         (vorrq_s8): Likewise.
8644         (vornq_s8): Likewise.
8645         (vmulq_s8): Likewise.
8646         (vmulq_n_s8): Likewise.
8647         (vmulltq_int_s8): Likewise.
8648         (vmullbq_int_s8): Likewise.
8649         (vmulhq_s8): Likewise.
8650         (vmlsdavxq_s8): Likewise.
8651         (vmlsdavq_s8): Likewise.
8652         (vmladavxq_s8): Likewise.
8653         (vmladavq_s8): Likewise.
8654         (vminvq_s8): Likewise.
8655         (vminq_s8): Likewise.
8656         (vmaxvq_s8): Likewise.
8657         (vmaxq_s8): Likewise.
8658         (vhsubq_s8): Likewise.
8659         (vhsubq_n_s8): Likewise.
8660         (vhcaddq_rot90_s8): Likewise.
8661         (vhcaddq_rot270_s8): Likewise.
8662         (vhaddq_s8): Likewise.
8663         (vhaddq_n_s8): Likewise.
8664         (veorq_s8): Likewise.
8665         (vcaddq_rot90_s8): Likewise.
8666         (vcaddq_rot270_s8): Likewise.
8667         (vbrsrq_n_s8): Likewise.
8668         (vbicq_s8): Likewise.
8669         (vandq_s8): Likewise.
8670         (vaddvaq_s8): Likewise.
8671         (vaddq_n_s8): Likewise.
8672         (vabdq_s8): Likewise.
8673         (vshlq_n_s8): Likewise.
8674         (vrshrq_n_s8): Likewise.
8675         (vqshlq_n_s8): Likewise.
8676         (vsubq_u16): Likewise.
8677         (vsubq_n_u16): Likewise.
8678         (vrmulhq_u16): Likewise.
8679         (vrhaddq_u16): Likewise.
8680         (vqsubq_u16): Likewise.
8681         (vqsubq_n_u16): Likewise.
8682         (vqaddq_u16): Likewise.
8683         (vqaddq_n_u16): Likewise.
8684         (vorrq_u16): Likewise.
8685         (vornq_u16): Likewise.
8686         (vmulq_u16): Likewise.
8687         (vmulq_n_u16): Likewise.
8688         (vmulltq_int_u16): Likewise.
8689         (vmullbq_int_u16): Likewise.
8690         (vmulhq_u16): Likewise.
8691         (vmladavq_u16): Likewise.
8692         (vminvq_u16): Likewise.
8693         (vminq_u16): Likewise.
8694         (vmaxvq_u16): Likewise.
8695         (vmaxq_u16): Likewise.
8696         (vhsubq_u16): Likewise.
8697         (vhsubq_n_u16): Likewise.
8698         (vhaddq_u16): Likewise.
8699         (vhaddq_n_u16): Likewise.
8700         (veorq_u16): Likewise.
8701         (vcmpneq_n_u16): Likewise.
8702         (vcmphiq_u16): Likewise.
8703         (vcmphiq_n_u16): Likewise.
8704         (vcmpeqq_u16): Likewise.
8705         (vcmpeqq_n_u16): Likewise.
8706         (vcmpcsq_u16): Likewise.
8707         (vcmpcsq_n_u16): Likewise.
8708         (vcaddq_rot90_u16): Likewise.
8709         (vcaddq_rot270_u16): Likewise.
8710         (vbicq_u16): Likewise.
8711         (vandq_u16): Likewise.
8712         (vaddvq_p_u16): Likewise.
8713         (vaddvaq_u16): Likewise.
8714         (vaddq_n_u16): Likewise.
8715         (vabdq_u16): Likewise.
8716         (vshlq_r_u16): Likewise.
8717         (vrshlq_u16): Likewise.
8718         (vrshlq_n_u16): Likewise.
8719         (vqshlq_u16): Likewise.
8720         (vqshlq_r_u16): Likewise.
8721         (vqrshlq_u16): Likewise.
8722         (vqrshlq_n_u16): Likewise.
8723         (vminavq_s16): Likewise.
8724         (vminaq_s16): Likewise.
8725         (vmaxavq_s16): Likewise.
8726         (vmaxaq_s16): Likewise.
8727         (vbrsrq_n_u16): Likewise.
8728         (vshlq_n_u16): Likewise.
8729         (vrshrq_n_u16): Likewise.
8730         (vqshlq_n_u16): Likewise.
8731         (vcmpneq_n_s16): Likewise.
8732         (vcmpltq_s16): Likewise.
8733         (vcmpltq_n_s16): Likewise.
8734         (vcmpleq_s16): Likewise.
8735         (vcmpleq_n_s16): Likewise.
8736         (vcmpgtq_s16): Likewise.
8737         (vcmpgtq_n_s16): Likewise.
8738         (vcmpgeq_s16): Likewise.
8739         (vcmpgeq_n_s16): Likewise.
8740         (vcmpeqq_s16): Likewise.
8741         (vcmpeqq_n_s16): Likewise.
8742         (vqshluq_n_s16): Likewise.
8743         (vaddvq_p_s16): Likewise.
8744         (vsubq_s16): Likewise.
8745         (vsubq_n_s16): Likewise.
8746         (vshlq_r_s16): Likewise.
8747         (vrshlq_s16): Likewise.
8748         (vrshlq_n_s16): Likewise.
8749         (vrmulhq_s16): Likewise.
8750         (vrhaddq_s16): Likewise.
8751         (vqsubq_s16): Likewise.
8752         (vqsubq_n_s16): Likewise.
8753         (vqshlq_s16): Likewise.
8754         (vqshlq_r_s16): Likewise.
8755         (vqrshlq_s16): Likewise.
8756         (vqrshlq_n_s16): Likewise.
8757         (vqrdmulhq_s16): Likewise.
8758         (vqrdmulhq_n_s16): Likewise.
8759         (vqdmulhq_s16): Likewise.
8760         (vqdmulhq_n_s16): Likewise.
8761         (vqaddq_s16): Likewise.
8762         (vqaddq_n_s16): Likewise.
8763         (vorrq_s16): Likewise.
8764         (vornq_s16): Likewise.
8765         (vmulq_s16): Likewise.
8766         (vmulq_n_s16): Likewise.
8767         (vmulltq_int_s16): Likewise.
8768         (vmullbq_int_s16): Likewise.
8769         (vmulhq_s16): Likewise.
8770         (vmlsdavxq_s16): Likewise.
8771         (vmlsdavq_s16): Likewise.
8772         (vmladavxq_s16): Likewise.
8773         (vmladavq_s16): Likewise.
8774         (vminvq_s16): Likewise.
8775         (vminq_s16): Likewise.
8776         (vmaxvq_s16): Likewise.
8777         (vmaxq_s16): Likewise.
8778         (vhsubq_s16): Likewise.
8779         (vhsubq_n_s16): Likewise.
8780         (vhcaddq_rot90_s16): Likewise.
8781         (vhcaddq_rot270_s16): Likewise.
8782         (vhaddq_s16): Likewise.
8783         (vhaddq_n_s16): Likewise.
8784         (veorq_s16): Likewise.
8785         (vcaddq_rot90_s16): Likewise.
8786         (vcaddq_rot270_s16): Likewise.
8787         (vbrsrq_n_s16): Likewise.
8788         (vbicq_s16): Likewise.
8789         (vandq_s16): Likewise.
8790         (vaddvaq_s16): Likewise.
8791         (vaddq_n_s16): Likewise.
8792         (vabdq_s16): Likewise.
8793         (vshlq_n_s16): Likewise.
8794         (vrshrq_n_s16): Likewise.
8795         (vqshlq_n_s16): Likewise.
8796         (vsubq_u32): Likewise.
8797         (vsubq_n_u32): Likewise.
8798         (vrmulhq_u32): Likewise.
8799         (vrhaddq_u32): Likewise.
8800         (vqsubq_u32): Likewise.
8801         (vqsubq_n_u32): Likewise.
8802         (vqaddq_u32): Likewise.
8803         (vqaddq_n_u32): Likewise.
8804         (vorrq_u32): Likewise.
8805         (vornq_u32): Likewise.
8806         (vmulq_u32): Likewise.
8807         (vmulq_n_u32): Likewise.
8808         (vmulltq_int_u32): Likewise.
8809         (vmullbq_int_u32): Likewise.
8810         (vmulhq_u32): Likewise.
8811         (vmladavq_u32): Likewise.
8812         (vminvq_u32): Likewise.
8813         (vminq_u32): Likewise.
8814         (vmaxvq_u32): Likewise.
8815         (vmaxq_u32): Likewise.
8816         (vhsubq_u32): Likewise.
8817         (vhsubq_n_u32): Likewise.
8818         (vhaddq_u32): Likewise.
8819         (vhaddq_n_u32): Likewise.
8820         (veorq_u32): Likewise.
8821         (vcmpneq_n_u32): Likewise.
8822         (vcmphiq_u32): Likewise.
8823         (vcmphiq_n_u32): Likewise.
8824         (vcmpeqq_u32): Likewise.
8825         (vcmpeqq_n_u32): Likewise.
8826         (vcmpcsq_u32): Likewise.
8827         (vcmpcsq_n_u32): Likewise.
8828         (vcaddq_rot90_u32): Likewise.
8829         (vcaddq_rot270_u32): Likewise.
8830         (vbicq_u32): Likewise.
8831         (vandq_u32): Likewise.
8832         (vaddvq_p_u32): Likewise.
8833         (vaddvaq_u32): Likewise.
8834         (vaddq_n_u32): Likewise.
8835         (vabdq_u32): Likewise.
8836         (vshlq_r_u32): Likewise.
8837         (vrshlq_u32): Likewise.
8838         (vrshlq_n_u32): Likewise.
8839         (vqshlq_u32): Likewise.
8840         (vqshlq_r_u32): Likewise.
8841         (vqrshlq_u32): Likewise.
8842         (vqrshlq_n_u32): Likewise.
8843         (vminavq_s32): Likewise.
8844         (vminaq_s32): Likewise.
8845         (vmaxavq_s32): Likewise.
8846         (vmaxaq_s32): Likewise.
8847         (vbrsrq_n_u32): Likewise.
8848         (vshlq_n_u32): Likewise.
8849         (vrshrq_n_u32): Likewise.
8850         (vqshlq_n_u32): Likewise.
8851         (vcmpneq_n_s32): Likewise.
8852         (vcmpltq_s32): Likewise.
8853         (vcmpltq_n_s32): Likewise.
8854         (vcmpleq_s32): Likewise.
8855         (vcmpleq_n_s32): Likewise.
8856         (vcmpgtq_s32): Likewise.
8857         (vcmpgtq_n_s32): Likewise.
8858         (vcmpgeq_s32): Likewise.
8859         (vcmpgeq_n_s32): Likewise.
8860         (vcmpeqq_s32): Likewise.
8861         (vcmpeqq_n_s32): Likewise.
8862         (vqshluq_n_s32): Likewise.
8863         (vaddvq_p_s32): Likewise.
8864         (vsubq_s32): Likewise.
8865         (vsubq_n_s32): Likewise.
8866         (vshlq_r_s32): Likewise.
8867         (vrshlq_s32): Likewise.
8868         (vrshlq_n_s32): Likewise.
8869         (vrmulhq_s32): Likewise.
8870         (vrhaddq_s32): Likewise.
8871         (vqsubq_s32): Likewise.
8872         (vqsubq_n_s32): Likewise.
8873         (vqshlq_s32): Likewise.
8874         (vqshlq_r_s32): Likewise.
8875         (vqrshlq_s32): Likewise.
8876         (vqrshlq_n_s32): Likewise.
8877         (vqrdmulhq_s32): Likewise.
8878         (vqrdmulhq_n_s32): Likewise.
8879         (vqdmulhq_s32): Likewise.
8880         (vqdmulhq_n_s32): Likewise.
8881         (vqaddq_s32): Likewise.
8882         (vqaddq_n_s32): Likewise.
8883         (vorrq_s32): Likewise.
8884         (vornq_s32): Likewise.
8885         (vmulq_s32): Likewise.
8886         (vmulq_n_s32): Likewise.
8887         (vmulltq_int_s32): Likewise.
8888         (vmullbq_int_s32): Likewise.
8889         (vmulhq_s32): Likewise.
8890         (vmlsdavxq_s32): Likewise.
8891         (vmlsdavq_s32): Likewise.
8892         (vmladavxq_s32): Likewise.
8893         (vmladavq_s32): Likewise.
8894         (vminvq_s32): Likewise.
8895         (vminq_s32): Likewise.
8896         (vmaxvq_s32): Likewise.
8897         (vmaxq_s32): Likewise.
8898         (vhsubq_s32): Likewise.
8899         (vhsubq_n_s32): Likewise.
8900         (vhcaddq_rot90_s32): Likewise.
8901         (vhcaddq_rot270_s32): Likewise.
8902         (vhaddq_s32): Likewise.
8903         (vhaddq_n_s32): Likewise.
8904         (veorq_s32): Likewise.
8905         (vcaddq_rot90_s32): Likewise.
8906         (vcaddq_rot270_s32): Likewise.
8907         (vbrsrq_n_s32): Likewise.
8908         (vbicq_s32): Likewise.
8909         (vandq_s32): Likewise.
8910         (vaddvaq_s32): Likewise.
8911         (vaddq_n_s32): Likewise.
8912         (vabdq_s32): Likewise.
8913         (vshlq_n_s32): Likewise.
8914         (vrshrq_n_s32): Likewise.
8915         (vqshlq_n_s32): Likewise.
8916         (__arm_vsubq_u8): Define intrinsic.
8917         (__arm_vsubq_n_u8): Likewise.
8918         (__arm_vrmulhq_u8): Likewise.
8919         (__arm_vrhaddq_u8): Likewise.
8920         (__arm_vqsubq_u8): Likewise.
8921         (__arm_vqsubq_n_u8): Likewise.
8922         (__arm_vqaddq_u8): Likewise.
8923         (__arm_vqaddq_n_u8): Likewise.
8924         (__arm_vorrq_u8): Likewise.
8925         (__arm_vornq_u8): Likewise.
8926         (__arm_vmulq_u8): Likewise.
8927         (__arm_vmulq_n_u8): Likewise.
8928         (__arm_vmulltq_int_u8): Likewise.
8929         (__arm_vmullbq_int_u8): Likewise.
8930         (__arm_vmulhq_u8): Likewise.
8931         (__arm_vmladavq_u8): Likewise.
8932         (__arm_vminvq_u8): Likewise.
8933         (__arm_vminq_u8): Likewise.
8934         (__arm_vmaxvq_u8): Likewise.
8935         (__arm_vmaxq_u8): Likewise.
8936         (__arm_vhsubq_u8): Likewise.
8937         (__arm_vhsubq_n_u8): Likewise.
8938         (__arm_vhaddq_u8): Likewise.
8939         (__arm_vhaddq_n_u8): Likewise.
8940         (__arm_veorq_u8): Likewise.
8941         (__arm_vcmpneq_n_u8): Likewise.
8942         (__arm_vcmphiq_u8): Likewise.
8943         (__arm_vcmphiq_n_u8): Likewise.
8944         (__arm_vcmpeqq_u8): Likewise.
8945         (__arm_vcmpeqq_n_u8): Likewise.
8946         (__arm_vcmpcsq_u8): Likewise.
8947         (__arm_vcmpcsq_n_u8): Likewise.
8948         (__arm_vcaddq_rot90_u8): Likewise.
8949         (__arm_vcaddq_rot270_u8): Likewise.
8950         (__arm_vbicq_u8): Likewise.
8951         (__arm_vandq_u8): Likewise.
8952         (__arm_vaddvq_p_u8): Likewise.
8953         (__arm_vaddvaq_u8): Likewise.
8954         (__arm_vaddq_n_u8): Likewise.
8955         (__arm_vabdq_u8): Likewise.
8956         (__arm_vshlq_r_u8): Likewise.
8957         (__arm_vrshlq_u8): Likewise.
8958         (__arm_vrshlq_n_u8): Likewise.
8959         (__arm_vqshlq_u8): Likewise.
8960         (__arm_vqshlq_r_u8): Likewise.
8961         (__arm_vqrshlq_u8): Likewise.
8962         (__arm_vqrshlq_n_u8): Likewise.
8963         (__arm_vminavq_s8): Likewise.
8964         (__arm_vminaq_s8): Likewise.
8965         (__arm_vmaxavq_s8): Likewise.
8966         (__arm_vmaxaq_s8): Likewise.
8967         (__arm_vbrsrq_n_u8): Likewise.
8968         (__arm_vshlq_n_u8): Likewise.
8969         (__arm_vrshrq_n_u8): Likewise.
8970         (__arm_vqshlq_n_u8): Likewise.
8971         (__arm_vcmpneq_n_s8): Likewise.
8972         (__arm_vcmpltq_s8): Likewise.
8973         (__arm_vcmpltq_n_s8): Likewise.
8974         (__arm_vcmpleq_s8): Likewise.
8975         (__arm_vcmpleq_n_s8): Likewise.
8976         (__arm_vcmpgtq_s8): Likewise.
8977         (__arm_vcmpgtq_n_s8): Likewise.
8978         (__arm_vcmpgeq_s8): Likewise.
8979         (__arm_vcmpgeq_n_s8): Likewise.
8980         (__arm_vcmpeqq_s8): Likewise.
8981         (__arm_vcmpeqq_n_s8): Likewise.
8982         (__arm_vqshluq_n_s8): Likewise.
8983         (__arm_vaddvq_p_s8): Likewise.
8984         (__arm_vsubq_s8): Likewise.
8985         (__arm_vsubq_n_s8): Likewise.
8986         (__arm_vshlq_r_s8): Likewise.
8987         (__arm_vrshlq_s8): Likewise.
8988         (__arm_vrshlq_n_s8): Likewise.
8989         (__arm_vrmulhq_s8): Likewise.
8990         (__arm_vrhaddq_s8): Likewise.
8991         (__arm_vqsubq_s8): Likewise.
8992         (__arm_vqsubq_n_s8): Likewise.
8993         (__arm_vqshlq_s8): Likewise.
8994         (__arm_vqshlq_r_s8): Likewise.
8995         (__arm_vqrshlq_s8): Likewise.
8996         (__arm_vqrshlq_n_s8): Likewise.
8997         (__arm_vqrdmulhq_s8): Likewise.
8998         (__arm_vqrdmulhq_n_s8): Likewise.
8999         (__arm_vqdmulhq_s8): Likewise.
9000         (__arm_vqdmulhq_n_s8): Likewise.
9001         (__arm_vqaddq_s8): Likewise.
9002         (__arm_vqaddq_n_s8): Likewise.
9003         (__arm_vorrq_s8): Likewise.
9004         (__arm_vornq_s8): Likewise.
9005         (__arm_vmulq_s8): Likewise.
9006         (__arm_vmulq_n_s8): Likewise.
9007         (__arm_vmulltq_int_s8): Likewise.
9008         (__arm_vmullbq_int_s8): Likewise.
9009         (__arm_vmulhq_s8): Likewise.
9010         (__arm_vmlsdavxq_s8): Likewise.
9011         (__arm_vmlsdavq_s8): Likewise.
9012         (__arm_vmladavxq_s8): Likewise.
9013         (__arm_vmladavq_s8): Likewise.
9014         (__arm_vminvq_s8): Likewise.
9015         (__arm_vminq_s8): Likewise.
9016         (__arm_vmaxvq_s8): Likewise.
9017         (__arm_vmaxq_s8): Likewise.
9018         (__arm_vhsubq_s8): Likewise.
9019         (__arm_vhsubq_n_s8): Likewise.
9020         (__arm_vhcaddq_rot90_s8): Likewise.
9021         (__arm_vhcaddq_rot270_s8): Likewise.
9022         (__arm_vhaddq_s8): Likewise.
9023         (__arm_vhaddq_n_s8): Likewise.
9024         (__arm_veorq_s8): Likewise.
9025         (__arm_vcaddq_rot90_s8): Likewise.
9026         (__arm_vcaddq_rot270_s8): Likewise.
9027         (__arm_vbrsrq_n_s8): Likewise.
9028         (__arm_vbicq_s8): Likewise.
9029         (__arm_vandq_s8): Likewise.
9030         (__arm_vaddvaq_s8): Likewise.
9031         (__arm_vaddq_n_s8): Likewise.
9032         (__arm_vabdq_s8): Likewise.
9033         (__arm_vshlq_n_s8): Likewise.
9034         (__arm_vrshrq_n_s8): Likewise.
9035         (__arm_vqshlq_n_s8): Likewise.
9036         (__arm_vsubq_u16): Likewise.
9037         (__arm_vsubq_n_u16): Likewise.
9038         (__arm_vrmulhq_u16): Likewise.
9039         (__arm_vrhaddq_u16): Likewise.
9040         (__arm_vqsubq_u16): Likewise.
9041         (__arm_vqsubq_n_u16): Likewise.
9042         (__arm_vqaddq_u16): Likewise.
9043         (__arm_vqaddq_n_u16): Likewise.
9044         (__arm_vorrq_u16): Likewise.
9045         (__arm_vornq_u16): Likewise.
9046         (__arm_vmulq_u16): Likewise.
9047         (__arm_vmulq_n_u16): Likewise.
9048         (__arm_vmulltq_int_u16): Likewise.
9049         (__arm_vmullbq_int_u16): Likewise.
9050         (__arm_vmulhq_u16): Likewise.
9051         (__arm_vmladavq_u16): Likewise.
9052         (__arm_vminvq_u16): Likewise.
9053         (__arm_vminq_u16): Likewise.
9054         (__arm_vmaxvq_u16): Likewise.
9055         (__arm_vmaxq_u16): Likewise.
9056         (__arm_vhsubq_u16): Likewise.
9057         (__arm_vhsubq_n_u16): Likewise.
9058         (__arm_vhaddq_u16): Likewise.
9059         (__arm_vhaddq_n_u16): Likewise.
9060         (__arm_veorq_u16): Likewise.
9061         (__arm_vcmpneq_n_u16): Likewise.
9062         (__arm_vcmphiq_u16): Likewise.
9063         (__arm_vcmphiq_n_u16): Likewise.
9064         (__arm_vcmpeqq_u16): Likewise.
9065         (__arm_vcmpeqq_n_u16): Likewise.
9066         (__arm_vcmpcsq_u16): Likewise.
9067         (__arm_vcmpcsq_n_u16): Likewise.
9068         (__arm_vcaddq_rot90_u16): Likewise.
9069         (__arm_vcaddq_rot270_u16): Likewise.
9070         (__arm_vbicq_u16): Likewise.
9071         (__arm_vandq_u16): Likewise.
9072         (__arm_vaddvq_p_u16): Likewise.
9073         (__arm_vaddvaq_u16): Likewise.
9074         (__arm_vaddq_n_u16): Likewise.
9075         (__arm_vabdq_u16): Likewise.
9076         (__arm_vshlq_r_u16): Likewise.
9077         (__arm_vrshlq_u16): Likewise.
9078         (__arm_vrshlq_n_u16): Likewise.
9079         (__arm_vqshlq_u16): Likewise.
9080         (__arm_vqshlq_r_u16): Likewise.
9081         (__arm_vqrshlq_u16): Likewise.
9082         (__arm_vqrshlq_n_u16): Likewise.
9083         (__arm_vminavq_s16): Likewise.
9084         (__arm_vminaq_s16): Likewise.
9085         (__arm_vmaxavq_s16): Likewise.
9086         (__arm_vmaxaq_s16): Likewise.
9087         (__arm_vbrsrq_n_u16): Likewise.
9088         (__arm_vshlq_n_u16): Likewise.
9089         (__arm_vrshrq_n_u16): Likewise.
9090         (__arm_vqshlq_n_u16): Likewise.
9091         (__arm_vcmpneq_n_s16): Likewise.
9092         (__arm_vcmpltq_s16): Likewise.
9093         (__arm_vcmpltq_n_s16): Likewise.
9094         (__arm_vcmpleq_s16): Likewise.
9095         (__arm_vcmpleq_n_s16): Likewise.
9096         (__arm_vcmpgtq_s16): Likewise.
9097         (__arm_vcmpgtq_n_s16): Likewise.
9098         (__arm_vcmpgeq_s16): Likewise.
9099         (__arm_vcmpgeq_n_s16): Likewise.
9100         (__arm_vcmpeqq_s16): Likewise.
9101         (__arm_vcmpeqq_n_s16): Likewise.
9102         (__arm_vqshluq_n_s16): Likewise.
9103         (__arm_vaddvq_p_s16): Likewise.
9104         (__arm_vsubq_s16): Likewise.
9105         (__arm_vsubq_n_s16): Likewise.
9106         (__arm_vshlq_r_s16): Likewise.
9107         (__arm_vrshlq_s16): Likewise.
9108         (__arm_vrshlq_n_s16): Likewise.
9109         (__arm_vrmulhq_s16): Likewise.
9110         (__arm_vrhaddq_s16): Likewise.
9111         (__arm_vqsubq_s16): Likewise.
9112         (__arm_vqsubq_n_s16): Likewise.
9113         (__arm_vqshlq_s16): Likewise.
9114         (__arm_vqshlq_r_s16): Likewise.
9115         (__arm_vqrshlq_s16): Likewise.
9116         (__arm_vqrshlq_n_s16): Likewise.
9117         (__arm_vqrdmulhq_s16): Likewise.
9118         (__arm_vqrdmulhq_n_s16): Likewise.
9119         (__arm_vqdmulhq_s16): Likewise.
9120         (__arm_vqdmulhq_n_s16): Likewise.
9121         (__arm_vqaddq_s16): Likewise.
9122         (__arm_vqaddq_n_s16): Likewise.
9123         (__arm_vorrq_s16): Likewise.
9124         (__arm_vornq_s16): Likewise.
9125         (__arm_vmulq_s16): Likewise.
9126         (__arm_vmulq_n_s16): Likewise.
9127         (__arm_vmulltq_int_s16): Likewise.
9128         (__arm_vmullbq_int_s16): Likewise.
9129         (__arm_vmulhq_s16): Likewise.
9130         (__arm_vmlsdavxq_s16): Likewise.
9131         (__arm_vmlsdavq_s16): Likewise.
9132         (__arm_vmladavxq_s16): Likewise.
9133         (__arm_vmladavq_s16): Likewise.
9134         (__arm_vminvq_s16): Likewise.
9135         (__arm_vminq_s16): Likewise.
9136         (__arm_vmaxvq_s16): Likewise.
9137         (__arm_vmaxq_s16): Likewise.
9138         (__arm_vhsubq_s16): Likewise.
9139         (__arm_vhsubq_n_s16): Likewise.
9140         (__arm_vhcaddq_rot90_s16): Likewise.
9141         (__arm_vhcaddq_rot270_s16): Likewise.
9142         (__arm_vhaddq_s16): Likewise.
9143         (__arm_vhaddq_n_s16): Likewise.
9144         (__arm_veorq_s16): Likewise.
9145         (__arm_vcaddq_rot90_s16): Likewise.
9146         (__arm_vcaddq_rot270_s16): Likewise.
9147         (__arm_vbrsrq_n_s16): Likewise.
9148         (__arm_vbicq_s16): Likewise.
9149         (__arm_vandq_s16): Likewise.
9150         (__arm_vaddvaq_s16): Likewise.
9151         (__arm_vaddq_n_s16): Likewise.
9152         (__arm_vabdq_s16): Likewise.
9153         (__arm_vshlq_n_s16): Likewise.
9154         (__arm_vrshrq_n_s16): Likewise.
9155         (__arm_vqshlq_n_s16): Likewise.
9156         (__arm_vsubq_u32): Likewise.
9157         (__arm_vsubq_n_u32): Likewise.
9158         (__arm_vrmulhq_u32): Likewise.
9159         (__arm_vrhaddq_u32): Likewise.
9160         (__arm_vqsubq_u32): Likewise.
9161         (__arm_vqsubq_n_u32): Likewise.
9162         (__arm_vqaddq_u32): Likewise.
9163         (__arm_vqaddq_n_u32): Likewise.
9164         (__arm_vorrq_u32): Likewise.
9165         (__arm_vornq_u32): Likewise.
9166         (__arm_vmulq_u32): Likewise.
9167         (__arm_vmulq_n_u32): Likewise.
9168         (__arm_vmulltq_int_u32): Likewise.
9169         (__arm_vmullbq_int_u32): Likewise.
9170         (__arm_vmulhq_u32): Likewise.
9171         (__arm_vmladavq_u32): Likewise.
9172         (__arm_vminvq_u32): Likewise.
9173         (__arm_vminq_u32): Likewise.
9174         (__arm_vmaxvq_u32): Likewise.
9175         (__arm_vmaxq_u32): Likewise.
9176         (__arm_vhsubq_u32): Likewise.
9177         (__arm_vhsubq_n_u32): Likewise.
9178         (__arm_vhaddq_u32): Likewise.
9179         (__arm_vhaddq_n_u32): Likewise.
9180         (__arm_veorq_u32): Likewise.
9181         (__arm_vcmpneq_n_u32): Likewise.
9182         (__arm_vcmphiq_u32): Likewise.
9183         (__arm_vcmphiq_n_u32): Likewise.
9184         (__arm_vcmpeqq_u32): Likewise.
9185         (__arm_vcmpeqq_n_u32): Likewise.
9186         (__arm_vcmpcsq_u32): Likewise.
9187         (__arm_vcmpcsq_n_u32): Likewise.
9188         (__arm_vcaddq_rot90_u32): Likewise.
9189         (__arm_vcaddq_rot270_u32): Likewise.
9190         (__arm_vbicq_u32): Likewise.
9191         (__arm_vandq_u32): Likewise.
9192         (__arm_vaddvq_p_u32): Likewise.
9193         (__arm_vaddvaq_u32): Likewise.
9194         (__arm_vaddq_n_u32): Likewise.
9195         (__arm_vabdq_u32): Likewise.
9196         (__arm_vshlq_r_u32): Likewise.
9197         (__arm_vrshlq_u32): Likewise.
9198         (__arm_vrshlq_n_u32): Likewise.
9199         (__arm_vqshlq_u32): Likewise.
9200         (__arm_vqshlq_r_u32): Likewise.
9201         (__arm_vqrshlq_u32): Likewise.
9202         (__arm_vqrshlq_n_u32): Likewise.
9203         (__arm_vminavq_s32): Likewise.
9204         (__arm_vminaq_s32): Likewise.
9205         (__arm_vmaxavq_s32): Likewise.
9206         (__arm_vmaxaq_s32): Likewise.
9207         (__arm_vbrsrq_n_u32): Likewise.
9208         (__arm_vshlq_n_u32): Likewise.
9209         (__arm_vrshrq_n_u32): Likewise.
9210         (__arm_vqshlq_n_u32): Likewise.
9211         (__arm_vcmpneq_n_s32): Likewise.
9212         (__arm_vcmpltq_s32): Likewise.
9213         (__arm_vcmpltq_n_s32): Likewise.
9214         (__arm_vcmpleq_s32): Likewise.
9215         (__arm_vcmpleq_n_s32): Likewise.
9216         (__arm_vcmpgtq_s32): Likewise.
9217         (__arm_vcmpgtq_n_s32): Likewise.
9218         (__arm_vcmpgeq_s32): Likewise.
9219         (__arm_vcmpgeq_n_s32): Likewise.
9220         (__arm_vcmpeqq_s32): Likewise.
9221         (__arm_vcmpeqq_n_s32): Likewise.
9222         (__arm_vqshluq_n_s32): Likewise.
9223         (__arm_vaddvq_p_s32): Likewise.
9224         (__arm_vsubq_s32): Likewise.
9225         (__arm_vsubq_n_s32): Likewise.
9226         (__arm_vshlq_r_s32): Likewise.
9227         (__arm_vrshlq_s32): Likewise.
9228         (__arm_vrshlq_n_s32): Likewise.
9229         (__arm_vrmulhq_s32): Likewise.
9230         (__arm_vrhaddq_s32): Likewise.
9231         (__arm_vqsubq_s32): Likewise.
9232         (__arm_vqsubq_n_s32): Likewise.
9233         (__arm_vqshlq_s32): Likewise.
9234         (__arm_vqshlq_r_s32): Likewise.
9235         (__arm_vqrshlq_s32): Likewise.
9236         (__arm_vqrshlq_n_s32): Likewise.
9237         (__arm_vqrdmulhq_s32): Likewise.
9238         (__arm_vqrdmulhq_n_s32): Likewise.
9239         (__arm_vqdmulhq_s32): Likewise.
9240         (__arm_vqdmulhq_n_s32): Likewise.
9241         (__arm_vqaddq_s32): Likewise.
9242         (__arm_vqaddq_n_s32): Likewise.
9243         (__arm_vorrq_s32): Likewise.
9244         (__arm_vornq_s32): Likewise.
9245         (__arm_vmulq_s32): Likewise.
9246         (__arm_vmulq_n_s32): Likewise.
9247         (__arm_vmulltq_int_s32): Likewise.
9248         (__arm_vmullbq_int_s32): Likewise.
9249         (__arm_vmulhq_s32): Likewise.
9250         (__arm_vmlsdavxq_s32): Likewise.
9251         (__arm_vmlsdavq_s32): Likewise.
9252         (__arm_vmladavxq_s32): Likewise.
9253         (__arm_vmladavq_s32): Likewise.
9254         (__arm_vminvq_s32): Likewise.
9255         (__arm_vminq_s32): Likewise.
9256         (__arm_vmaxvq_s32): Likewise.
9257         (__arm_vmaxq_s32): Likewise.
9258         (__arm_vhsubq_s32): Likewise.
9259         (__arm_vhsubq_n_s32): Likewise.
9260         (__arm_vhcaddq_rot90_s32): Likewise.
9261         (__arm_vhcaddq_rot270_s32): Likewise.
9262         (__arm_vhaddq_s32): Likewise.
9263         (__arm_vhaddq_n_s32): Likewise.
9264         (__arm_veorq_s32): Likewise.
9265         (__arm_vcaddq_rot90_s32): Likewise.
9266         (__arm_vcaddq_rot270_s32): Likewise.
9267         (__arm_vbrsrq_n_s32): Likewise.
9268         (__arm_vbicq_s32): Likewise.
9269         (__arm_vandq_s32): Likewise.
9270         (__arm_vaddvaq_s32): Likewise.
9271         (__arm_vaddq_n_s32): Likewise.
9272         (__arm_vabdq_s32): Likewise.
9273         (__arm_vshlq_n_s32): Likewise.
9274         (__arm_vrshrq_n_s32): Likewise.
9275         (__arm_vqshlq_n_s32): Likewise.
9276         (vsubq): Define polymorphic variant.
9277         (vsubq_n): Likewise.
9278         (vshlq_r): Likewise.
9279         (vrshlq_n): Likewise.
9280         (vrshlq): Likewise.
9281         (vrmulhq): Likewise.
9282         (vrhaddq): Likewise.
9283         (vqsubq_n): Likewise.
9284         (vqsubq): Likewise.
9285         (vqshlq): Likewise.
9286         (vqshlq_r): Likewise.
9287         (vqshluq): Likewise.
9288         (vrshrq_n): Likewise.
9289         (vshlq_n): Likewise.
9290         (vqshluq_n): Likewise.
9291         (vqshlq_n): Likewise.
9292         (vqrshlq_n): Likewise.
9293         (vqrshlq): Likewise.
9294         (vqrdmulhq_n): Likewise.
9295         (vqrdmulhq): Likewise.
9296         (vqdmulhq_n): Likewise.
9297         (vqdmulhq): Likewise.
9298         (vqaddq_n): Likewise.
9299         (vqaddq): Likewise.
9300         (vorrq_n): Likewise.
9301         (vorrq): Likewise.
9302         (vornq): Likewise.
9303         (vmulq_n): Likewise.
9304         (vmulq): Likewise.
9305         (vmulltq_int): Likewise.
9306         (vmullbq_int): Likewise.
9307         (vmulhq): Likewise.
9308         (vminq): Likewise.
9309         (vminaq): Likewise.
9310         (vmaxq): Likewise.
9311         (vmaxaq): Likewise.
9312         (vhsubq_n): Likewise.
9313         (vhsubq): Likewise.
9314         (vhcaddq_rot90): Likewise.
9315         (vhcaddq_rot270): Likewise.
9316         (vhaddq_n): Likewise.
9317         (vhaddq): Likewise.
9318         (veorq): Likewise.
9319         (vcaddq_rot90): Likewise.
9320         (vcaddq_rot270): Likewise.
9321         (vbrsrq_n): Likewise.
9322         (vbicq_n): Likewise.
9323         (vbicq): Likewise.
9324         (vaddq): Likewise.
9325         (vaddq_n): Likewise.
9326         (vandq): Likewise.
9327         (vabdq): Likewise.
9328         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
9329         (BINOP_NONE_NONE_NONE): Likewise.
9330         (BINOP_NONE_NONE_UNONE): Likewise.
9331         (BINOP_UNONE_NONE_IMM): Likewise.
9332         (BINOP_UNONE_NONE_NONE): Likewise.
9333         (BINOP_UNONE_UNONE_IMM): Likewise.
9334         (BINOP_UNONE_UNONE_NONE): Likewise.
9335         (BINOP_UNONE_UNONE_UNONE): Likewise.
9336         * config/arm/constraints.md (Ra): Define constraint to check constant is
9337         in the range of 0 to 7.
9338         (Rg): Define constriant to check the constant is one among 1, 2, 4
9339         and 8.
9340         * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
9341         (mve_vaddq_n_<supf>): Likewise.
9342         (mve_vaddvaq_<supf>): Likewise.
9343         (mve_vaddvq_p_<supf>): Likewise.
9344         (mve_vandq_<supf>): Likewise.
9345         (mve_vbicq_<supf>): Likewise.
9346         (mve_vbrsrq_n_<supf>): Likewise.
9347         (mve_vcaddq_rot270_<supf>): Likewise.
9348         (mve_vcaddq_rot90_<supf>): Likewise.
9349         (mve_vcmpcsq_n_u): Likewise.
9350         (mve_vcmpcsq_u): Likewise.
9351         (mve_vcmpeqq_n_<supf>): Likewise.
9352         (mve_vcmpeqq_<supf>): Likewise.
9353         (mve_vcmpgeq_n_s): Likewise.
9354         (mve_vcmpgeq_s): Likewise.
9355         (mve_vcmpgtq_n_s): Likewise.
9356         (mve_vcmpgtq_s): Likewise.
9357         (mve_vcmphiq_n_u): Likewise.
9358         (mve_vcmphiq_u): Likewise.
9359         (mve_vcmpleq_n_s): Likewise.
9360         (mve_vcmpleq_s): Likewise.
9361         (mve_vcmpltq_n_s): Likewise.
9362         (mve_vcmpltq_s): Likewise.
9363         (mve_vcmpneq_n_<supf>): Likewise.
9364         (mve_vddupq_n_u): Likewise.
9365         (mve_veorq_<supf>): Likewise.
9366         (mve_vhaddq_n_<supf>): Likewise.
9367         (mve_vhaddq_<supf>): Likewise.
9368         (mve_vhcaddq_rot270_s): Likewise.
9369         (mve_vhcaddq_rot90_s): Likewise.
9370         (mve_vhsubq_n_<supf>): Likewise.
9371         (mve_vhsubq_<supf>): Likewise.
9372         (mve_vidupq_n_u): Likewise.
9373         (mve_vmaxaq_s): Likewise.
9374         (mve_vmaxavq_s): Likewise.
9375         (mve_vmaxq_<supf>): Likewise.
9376         (mve_vmaxvq_<supf>): Likewise.
9377         (mve_vminaq_s): Likewise.
9378         (mve_vminavq_s): Likewise.
9379         (mve_vminq_<supf>): Likewise.
9380         (mve_vminvq_<supf>): Likewise.
9381         (mve_vmladavq_<supf>): Likewise.
9382         (mve_vmladavxq_s): Likewise.
9383         (mve_vmlsdavq_s): Likewise.
9384         (mve_vmlsdavxq_s): Likewise.
9385         (mve_vmulhq_<supf>): Likewise.
9386         (mve_vmullbq_int_<supf>): Likewise.
9387         (mve_vmulltq_int_<supf>): Likewise.
9388         (mve_vmulq_n_<supf>): Likewise.
9389         (mve_vmulq_<supf>): Likewise.
9390         (mve_vornq_<supf>): Likewise.
9391         (mve_vorrq_<supf>): Likewise.
9392         (mve_vqaddq_n_<supf>): Likewise.
9393         (mve_vqaddq_<supf>): Likewise.
9394         (mve_vqdmulhq_n_s): Likewise.
9395         (mve_vqdmulhq_s): Likewise.
9396         (mve_vqrdmulhq_n_s): Likewise.
9397         (mve_vqrdmulhq_s): Likewise.
9398         (mve_vqrshlq_n_<supf>): Likewise.
9399         (mve_vqrshlq_<supf>): Likewise.
9400         (mve_vqshlq_n_<supf>): Likewise.
9401         (mve_vqshlq_r_<supf>): Likewise.
9402         (mve_vqshlq_<supf>): Likewise.
9403         (mve_vqshluq_n_s): Likewise.
9404         (mve_vqsubq_n_<supf>): Likewise.
9405         (mve_vqsubq_<supf>): Likewise.
9406         (mve_vrhaddq_<supf>): Likewise.
9407         (mve_vrmulhq_<supf>): Likewise.
9408         (mve_vrshlq_n_<supf>): Likewise.
9409         (mve_vrshlq_<supf>): Likewise.
9410         (mve_vrshrq_n_<supf>): Likewise.
9411         (mve_vshlq_n_<supf>): Likewise.
9412         (mve_vshlq_r_<supf>): Likewise.
9413         (mve_vsubq_n_<supf>): Likewise.
9414         (mve_vsubq_<supf>): Likewise.
9415         * config/arm/predicates.md (mve_imm_7): Define predicate to check
9416         the matching constraint Ra.
9417         (mve_imm_selective_upto_8): Define predicate to check the matching
9418         constraint Rg.
9419
9420 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
9421             Mihail Ionescu  <mihail.ionescu@arm.com>
9422             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
9423
9424         * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
9425         qualifier for binary operands.
9426         (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
9427         (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
9428         * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
9429         (vaddlvq_p_u32): Likewise.
9430         (vcmpneq_s8): Likewise.
9431         (vcmpneq_s16): Likewise.
9432         (vcmpneq_s32): Likewise.
9433         (vcmpneq_u8): Likewise.
9434         (vcmpneq_u16): Likewise.
9435         (vcmpneq_u32): Likewise.
9436         (vshlq_s8): Likewise.
9437         (vshlq_s16): Likewise.
9438         (vshlq_s32): Likewise.
9439         (vshlq_u8): Likewise.
9440         (vshlq_u16): Likewise.
9441         (vshlq_u32): Likewise.
9442         (__arm_vaddlvq_p_s32): Define intrinsic.
9443         (__arm_vaddlvq_p_u32): Likewise.
9444         (__arm_vcmpneq_s8): Likewise.
9445         (__arm_vcmpneq_s16): Likewise.
9446         (__arm_vcmpneq_s32): Likewise.
9447         (__arm_vcmpneq_u8): Likewise.
9448         (__arm_vcmpneq_u16): Likewise.
9449         (__arm_vcmpneq_u32): Likewise.
9450         (__arm_vshlq_s8): Likewise.
9451         (__arm_vshlq_s16): Likewise.
9452         (__arm_vshlq_s32): Likewise.
9453         (__arm_vshlq_u8): Likewise.
9454         (__arm_vshlq_u16): Likewise.
9455         (__arm_vshlq_u32): Likewise.
9456         (vaddlvq_p): Define polymorphic variant.
9457         (vcmpneq): Likewise.
9458         (vshlq): Likewise.
9459         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
9460         Use it.
9461         (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
9462         (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
9463         * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
9464         (mve_vcmpneq_<supf><mode>): Likewise.
9465         (mve_vshlq_<supf><mode>): Likewise.
9466
9467 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
9468             Mihail Ionescu  <mihail.ionescu@arm.com>
9469             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
9470
9471         * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
9472         qualifier for binary operands.
9473         (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
9474         (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
9475         * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
9476         (vcvtq_n_s32_f32): Likewise.
9477         (vcvtq_n_u16_f16): Likewise.
9478         (vcvtq_n_u32_f32): Likewise.
9479         (vcreateq_u8): Likewise.
9480         (vcreateq_u16): Likewise.
9481         (vcreateq_u32): Likewise.
9482         (vcreateq_u64): Likewise.
9483         (vcreateq_s8): Likewise.
9484         (vcreateq_s16): Likewise.
9485         (vcreateq_s32): Likewise.
9486         (vcreateq_s64): Likewise.
9487         (vshrq_n_s8): Likewise.
9488         (vshrq_n_s16): Likewise.
9489         (vshrq_n_s32): Likewise.
9490         (vshrq_n_u8): Likewise.
9491         (vshrq_n_u16): Likewise.
9492         (vshrq_n_u32): Likewise.
9493         (__arm_vcreateq_u8): Define intrinsic.
9494         (__arm_vcreateq_u16): Likewise.
9495         (__arm_vcreateq_u32): Likewise.
9496         (__arm_vcreateq_u64): Likewise.
9497         (__arm_vcreateq_s8): Likewise.
9498         (__arm_vcreateq_s16): Likewise.
9499         (__arm_vcreateq_s32): Likewise.
9500         (__arm_vcreateq_s64): Likewise.
9501         (__arm_vshrq_n_s8): Likewise.
9502         (__arm_vshrq_n_s16): Likewise.
9503         (__arm_vshrq_n_s32): Likewise.
9504         (__arm_vshrq_n_u8): Likewise.
9505         (__arm_vshrq_n_u16): Likewise.
9506         (__arm_vshrq_n_u32): Likewise.
9507         (__arm_vcvtq_n_s16_f16): Likewise.
9508         (__arm_vcvtq_n_s32_f32): Likewise.
9509         (__arm_vcvtq_n_u16_f16): Likewise.
9510         (__arm_vcvtq_n_u32_f32): Likewise.
9511         (vshrq_n): Define polymorphic variant.
9512         * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
9513         Use it.
9514         (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
9515         (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
9516         * config/arm/constraints.md (Rb): Define constraint to check constant is
9517         in the range of 1 to 8.
9518         (Rf): Define constraint to check constant is in the range of 1 to 32.
9519         * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
9520         (mve_vshrq_n_<supf><mode>): Likewise.
9521         (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
9522         * config/arm/predicates.md (mve_imm_8): Define predicate to check
9523         the matching constraint Rb.
9524         (mve_imm_32): Define predicate to check the matching constraint Rf.
9525
9526 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
9527             Mihail Ionescu  <mihail.ionescu@arm.com>
9528             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
9529
9530         * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
9531         qualifier for binary operands.
9532         (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
9533         (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
9534         (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
9535         * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
9536         (vsubq_n_f32): Likewise.
9537         (vbrsrq_n_f16): Likewise.
9538         (vbrsrq_n_f32): Likewise.
9539         (vcvtq_n_f16_s16): Likewise.
9540         (vcvtq_n_f32_s32): Likewise.
9541         (vcvtq_n_f16_u16): Likewise.
9542         (vcvtq_n_f32_u32): Likewise.
9543         (vcreateq_f16): Likewise.
9544         (vcreateq_f32): Likewise.
9545         (__arm_vsubq_n_f16): Define intrinsic.
9546         (__arm_vsubq_n_f32): Likewise.
9547         (__arm_vbrsrq_n_f16): Likewise.
9548         (__arm_vbrsrq_n_f32): Likewise.
9549         (__arm_vcvtq_n_f16_s16): Likewise.
9550         (__arm_vcvtq_n_f32_s32): Likewise.
9551         (__arm_vcvtq_n_f16_u16): Likewise.
9552         (__arm_vcvtq_n_f32_u32): Likewise.
9553         (__arm_vcreateq_f16): Likewise.
9554         (__arm_vcreateq_f32): Likewise.
9555         (vsubq): Define polymorphic variant.
9556         (vbrsrq): Likewise.
9557         (vcvtq_n): Likewise.
9558         * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
9559         it.
9560         (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
9561         (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
9562         (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
9563         * config/arm/constraints.md (Rd): Define constraint to check constant is
9564         in the range of 1 to 16.
9565         * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
9566         mve_vbrsrq_n_f<mode>: Likewise.
9567         mve_vcvtq_n_to_f_<supf><mode>: Likewise.
9568         mve_vcreateq_f<mode>: Likewise.
9569         * config/arm/predicates.md (mve_imm_16): Define predicate to check
9570         the matching constraint Rd.
9571
9572 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
9573             Mihail Ionescu  <mihail.ionescu@arm.com>
9574             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
9575
9576         * config/arm/arm-builtins.c (hi_UP): Define mode.
9577         * config/arm/arm.h (IS_VPR_REGNUM): Move.
9578         * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
9579         (APSRQ_REGNUM): Modify.
9580         (APSRGE_REGNUM): Modify.
9581         * config/arm/arm_mve.h (vctp16q): Define macro.
9582         (vctp32q): Likewise.
9583         (vctp64q): Likewise.
9584         (vctp8q): Likewise.
9585         (vpnot): Likewise.
9586         (__arm_vctp16q): Define intrinsic.
9587         (__arm_vctp32q): Likewise.
9588         (__arm_vctp64q): Likewise.
9589         (__arm_vctp8q): Likewise.
9590         (__arm_vpnot): Likewise.
9591         * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
9592         qualifier.
9593         * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
9594         (mve_vpnothi): Likewise.
9595
9596 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
9597             Mihail Ionescu  <mihail.ionescu@arm.com>
9598             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
9599
9600         * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
9601         * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
9602         (vdupq_n_s16): Likewise.
9603         (vdupq_n_s32): Likewise.
9604         (vabsq_s8): Likewise.
9605         (vabsq_s16): Likewise.
9606         (vabsq_s32): Likewise.
9607         (vclsq_s8): Likewise.
9608         (vclsq_s16): Likewise.
9609         (vclsq_s32): Likewise.
9610         (vclzq_s8): Likewise.
9611         (vclzq_s16): Likewise.
9612         (vclzq_s32): Likewise.
9613         (vnegq_s8): Likewise.
9614         (vnegq_s16): Likewise.
9615         (vnegq_s32): Likewise.
9616         (vaddlvq_s32): Likewise.
9617         (vaddvq_s8): Likewise.
9618         (vaddvq_s16): Likewise.
9619         (vaddvq_s32): Likewise.
9620         (vmovlbq_s8): Likewise.
9621         (vmovlbq_s16): Likewise.
9622         (vmovltq_s8): Likewise.
9623         (vmovltq_s16): Likewise.
9624         (vmvnq_s8): Likewise.
9625         (vmvnq_s16): Likewise.
9626         (vmvnq_s32): Likewise.
9627         (vrev16q_s8): Likewise.
9628         (vrev32q_s8): Likewise.
9629         (vrev32q_s16): Likewise.
9630         (vqabsq_s8): Likewise.
9631         (vqabsq_s16): Likewise.
9632         (vqabsq_s32): Likewise.
9633         (vqnegq_s8): Likewise.
9634         (vqnegq_s16): Likewise.
9635         (vqnegq_s32): Likewise.
9636         (vcvtaq_s16_f16): Likewise.
9637         (vcvtaq_s32_f32): Likewise.
9638         (vcvtnq_s16_f16): Likewise.
9639         (vcvtnq_s32_f32): Likewise.
9640         (vcvtpq_s16_f16): Likewise.
9641         (vcvtpq_s32_f32): Likewise.
9642         (vcvtmq_s16_f16): Likewise.
9643         (vcvtmq_s32_f32): Likewise.
9644         (vmvnq_u8): Likewise.
9645         (vmvnq_u16): Likewise.
9646         (vmvnq_u32): Likewise.
9647         (vdupq_n_u8): Likewise.
9648         (vdupq_n_u16): Likewise.
9649         (vdupq_n_u32): Likewise.
9650         (vclzq_u8): Likewise.
9651         (vclzq_u16): Likewise.
9652         (vclzq_u32): Likewise.
9653         (vaddvq_u8): Likewise.
9654         (vaddvq_u16): Likewise.
9655         (vaddvq_u32): Likewise.
9656         (vrev32q_u8): Likewise.
9657         (vrev32q_u16): Likewise.
9658         (vmovltq_u8): Likewise.
9659         (vmovltq_u16): Likewise.
9660         (vmovlbq_u8): Likewise.
9661         (vmovlbq_u16): Likewise.
9662         (vrev16q_u8): Likewise.
9663         (vaddlvq_u32): Likewise.
9664         (vcvtpq_u16_f16): Likewise.
9665         (vcvtpq_u32_f32): Likewise.
9666         (vcvtnq_u16_f16): Likewise.
9667         (vcvtmq_u16_f16): Likewise.
9668         (vcvtmq_u32_f32): Likewise.
9669         (vcvtaq_u16_f16): Likewise.
9670         (vcvtaq_u32_f32): Likewise.
9671         (__arm_vdupq_n_s8): Define intrinsic.
9672         (__arm_vdupq_n_s16): Likewise.
9673         (__arm_vdupq_n_s32): Likewise.
9674         (__arm_vabsq_s8): Likewise.
9675         (__arm_vabsq_s16): Likewise.
9676         (__arm_vabsq_s32): Likewise.
9677         (__arm_vclsq_s8): Likewise.
9678         (__arm_vclsq_s16): Likewise.
9679         (__arm_vclsq_s32): Likewise.
9680         (__arm_vclzq_s8): Likewise.
9681         (__arm_vclzq_s16): Likewise.
9682         (__arm_vclzq_s32): Likewise.
9683         (__arm_vnegq_s8): Likewise.
9684         (__arm_vnegq_s16): Likewise.
9685         (__arm_vnegq_s32): Likewise.
9686         (__arm_vaddlvq_s32): Likewise.
9687         (__arm_vaddvq_s8): Likewise.
9688         (__arm_vaddvq_s16): Likewise.
9689         (__arm_vaddvq_s32): Likewise.
9690         (__arm_vmovlbq_s8): Likewise.
9691         (__arm_vmovlbq_s16): Likewise.
9692         (__arm_vmovltq_s8): Likewise.
9693         (__arm_vmovltq_s16): Likewise.
9694         (__arm_vmvnq_s8): Likewise.
9695         (__arm_vmvnq_s16): Likewise.
9696         (__arm_vmvnq_s32): Likewise.
9697         (__arm_vrev16q_s8): Likewise.
9698         (__arm_vrev32q_s8): Likewise.
9699         (__arm_vrev32q_s16): Likewise.
9700         (__arm_vqabsq_s8): Likewise.
9701         (__arm_vqabsq_s16): Likewise.
9702         (__arm_vqabsq_s32): Likewise.
9703         (__arm_vqnegq_s8): Likewise.
9704         (__arm_vqnegq_s16): Likewise.
9705         (__arm_vqnegq_s32): Likewise.
9706         (__arm_vmvnq_u8): Likewise.
9707         (__arm_vmvnq_u16): Likewise.
9708         (__arm_vmvnq_u32): Likewise.
9709         (__arm_vdupq_n_u8): Likewise.
9710         (__arm_vdupq_n_u16): Likewise.
9711         (__arm_vdupq_n_u32): Likewise.
9712         (__arm_vclzq_u8): Likewise.
9713         (__arm_vclzq_u16): Likewise.
9714         (__arm_vclzq_u32): Likewise.
9715         (__arm_vaddvq_u8): Likewise.
9716         (__arm_vaddvq_u16): Likewise.
9717         (__arm_vaddvq_u32): Likewise.
9718         (__arm_vrev32q_u8): Likewise.
9719         (__arm_vrev32q_u16): Likewise.
9720         (__arm_vmovltq_u8): Likewise.
9721         (__arm_vmovltq_u16): Likewise.
9722         (__arm_vmovlbq_u8): Likewise.
9723         (__arm_vmovlbq_u16): Likewise.
9724         (__arm_vrev16q_u8): Likewise.
9725         (__arm_vaddlvq_u32): Likewise.
9726         (__arm_vcvtpq_u16_f16): Likewise.
9727         (__arm_vcvtpq_u32_f32): Likewise.
9728         (__arm_vcvtnq_u16_f16): Likewise.
9729         (__arm_vcvtmq_u16_f16): Likewise.
9730         (__arm_vcvtmq_u32_f32): Likewise.
9731         (__arm_vcvtaq_u16_f16): Likewise.
9732         (__arm_vcvtaq_u32_f32): Likewise.
9733         (__arm_vcvtaq_s16_f16): Likewise.
9734         (__arm_vcvtaq_s32_f32): Likewise.
9735         (__arm_vcvtnq_s16_f16): Likewise.
9736         (__arm_vcvtnq_s32_f32): Likewise.
9737         (__arm_vcvtpq_s16_f16): Likewise.
9738         (__arm_vcvtpq_s32_f32): Likewise.
9739         (__arm_vcvtmq_s16_f16): Likewise.
9740         (__arm_vcvtmq_s32_f32): Likewise.
9741         (vdupq_n): Define polymorphic variant.
9742         (vabsq): Likewise.
9743         (vclsq): Likewise.
9744         (vclzq): Likewise.
9745         (vnegq): Likewise.
9746         (vaddlvq): Likewise.
9747         (vaddvq): Likewise.
9748         (vmovlbq): Likewise.
9749         (vmovltq): Likewise.
9750         (vmvnq): Likewise.
9751         (vrev16q): Likewise.
9752         (vrev32q): Likewise.
9753         (vqabsq): Likewise.
9754         (vqnegq): Likewise.
9755         * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
9756         (UNOP_SNONE_NONE): Likewise.
9757         (UNOP_UNONE_UNONE): Likewise.
9758         (UNOP_UNONE_NONE): Likewise.
9759         * config/arm/constraints.md (e): Define new constriant to allow only
9760         even registers.
9761         * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
9762         (mve_vnegq_s<mode>): Likewise.
9763         (mve_vmvnq_<supf><mode>): Likewise.
9764         (mve_vdupq_n_<supf><mode>): Likewise.
9765         (mve_vclzq_<supf><mode>): Likewise.
9766         (mve_vclsq_s<mode>): Likewise.
9767         (mve_vaddvq_<supf><mode>): Likewise.
9768         (mve_vabsq_s<mode>): Likewise.
9769         (mve_vrev32q_<supf><mode>): Likewise.
9770         (mve_vmovltq_<supf><mode>): Likewise.
9771         (mve_vmovlbq_<supf><mode>): Likewise.
9772         (mve_vcvtpq_<supf><mode>): Likewise.
9773         (mve_vcvtnq_<supf><mode>): Likewise.
9774         (mve_vcvtmq_<supf><mode>): Likewise.
9775         (mve_vcvtaq_<supf><mode>): Likewise.
9776         (mve_vrev16q_<supf>v16qi): Likewise.
9777         (mve_vaddlvq_<supf>v4si): Likewise.
9778
9779 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
9780
9781         * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
9782         a dump message.
9783         * tree-sra.c (create_access_replacement): Fix up duplicated word issue
9784         in a comment.
9785         * read-rtl-function.c (find_param_by_name,
9786         function_reader::parse_enum_value, function_reader::get_insn_by_uid):
9787         Likewise.
9788         * spellcheck.c (get_edit_distance_cutoff): Likewise.
9789         * tree-data-ref.c (create_ifn_alias_checks): Likewise.
9790         * tree.def (SWITCH_EXPR): Likewise.
9791         * selftest.c (assert_str_contains): Likewise.
9792         * ipa-param-manipulation.h (class ipa_param_body_adjustments):
9793         Likewise.
9794         * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
9795         * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
9796         * langhooks.h (struct lang_hooks_for_decls): Likewise.
9797         * ipa-prop.h (struct ipa_param_descriptor): Likewise.
9798         * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
9799         Likewise.
9800         * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
9801         * tree-ssa-reassoc.c (reassociate_bb): Likewise.
9802         * tree.c (component_ref_size): Likewise.
9803         * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
9804         * gimple-ssa-sprintf.c (get_string_length, format_string,
9805         format_directive): Likewise.
9806         * omp-grid.c (grid_process_kernel_body_copy): Likewise.
9807         * input.c (string_concat_db::get_string_concatenation,
9808         test_lexer_string_locations_ucn4): Likewise.
9809         * cfgexpand.c (pass_expand::execute): Likewise.
9810         * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
9811         maybe_diag_overlap): Likewise.
9812         * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
9813         * shrink-wrap.c (spread_components): Likewise.
9814         * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
9815         Likewise.
9816         * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
9817         Likewise.
9818         * dwarf2out.c (dwarf2out_early_finish): Likewise.
9819         * gimple-ssa-store-merging.c: Likewise.
9820         * ira-costs.c (record_operand_costs): Likewise.
9821         * tree-vect-loop.c (vectorizable_reduction): Likewise.
9822         * target.def (dispatch): Likewise.
9823         (validate_dims, gen_ccmp_first): Fix up duplicated word issue
9824         in documentation text.
9825         * doc/tm.texi: Regenerated.
9826         * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
9827         duplicated word issue in a comment.
9828         * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
9829         * config/i386/i386-features.c (remove_partial_avx_dependency):
9830         Likewise.
9831         * config/msp430/msp430.c (msp430_select_section): Likewise.
9832         * config/gcn/gcn-run.c (load_image): Likewise.
9833         * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
9834         * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
9835         * config/aarch64/falkor-tag-collision-avoidance.c
9836         (single_dest_per_chain): Likewise.
9837         * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
9838         * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
9839         * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
9840         * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
9841         Likewise.
9842         * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
9843         * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
9844         * config/rs6000/rs6000-logue.c
9845         (rs6000_emit_probe_stack_range_stack_clash): Likewise.
9846         * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
9847         Fix various other issues in the comment.
9848
9849 2020-03-17  Mihail Ionescu  <mihail.ionescu@arm.com>
9850
9851         * config/arm/t-rmprofile: create new multilib for
9852         armv8.1-m.main+mve hard float and reuse v8-m.main ones for
9853         v8.1-m.main+mve.
9854
9855 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
9856
9857         PR tree-optimization/94015
9858         * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
9859         function where EXP is address of the bytes being stored rather than
9860         the bytes themselves into count_nonzero_bytes_addr.  Punt on zero
9861         sized MEM_REF.  Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
9862         Use ctor_for_folding instead of looking at DECL_INITIAL.  Punt before
9863         calling native_encode_expr if host or target doesn't have 8-bit
9864         chars.  Formatting fixes.
9865         (count_nonzero_bytes_addr): New function.
9866
9867 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
9868             Mihail Ionescu  <mihail.ionescu@arm.com>
9869             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
9870
9871         * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
9872         (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
9873         (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
9874         (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
9875         (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
9876         (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
9877         * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
9878         (vmvnq_n_s32): Likewise.
9879         (vrev64q_s8): Likewise.
9880         (vrev64q_s16): Likewise.
9881         (vrev64q_s32): Likewise.
9882         (vcvtq_s16_f16): Likewise.
9883         (vcvtq_s32_f32): Likewise.
9884         (vrev64q_u8): Likewise.
9885         (vrev64q_u16): Likewise.
9886         (vrev64q_u32): Likewise.
9887         (vmvnq_n_u16): Likewise.
9888         (vmvnq_n_u32): Likewise.
9889         (vcvtq_u16_f16): Likewise.
9890         (vcvtq_u32_f32): Likewise.
9891         (__arm_vmvnq_n_s16): Define intrinsic.
9892         (__arm_vmvnq_n_s32): Likewise.
9893         (__arm_vrev64q_s8): Likewise.
9894         (__arm_vrev64q_s16): Likewise.
9895         (__arm_vrev64q_s32): Likewise.
9896         (__arm_vrev64q_u8): Likewise.
9897         (__arm_vrev64q_u16): Likewise.
9898         (__arm_vrev64q_u32): Likewise.
9899         (__arm_vmvnq_n_u16): Likewise.
9900         (__arm_vmvnq_n_u32): Likewise.
9901         (__arm_vcvtq_s16_f16): Likewise.
9902         (__arm_vcvtq_s32_f32): Likewise.
9903         (__arm_vcvtq_u16_f16): Likewise.
9904         (__arm_vcvtq_u32_f32): Likewise.
9905         (vrev64q): Define polymorphic variant.
9906         * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
9907         (UNOP_SNONE_NONE): Likewise.
9908         (UNOP_SNONE_IMM): Likewise.
9909         (UNOP_UNONE_UNONE): Likewise.
9910         (UNOP_UNONE_NONE): Likewise.
9911         (UNOP_UNONE_IMM): Likewise.
9912         * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
9913         (mve_vcvtq_from_f_<supf><mode>): Likewise.
9914         (mve_vmvnq_n_<supf><mode>): Likewise.
9915
9916 2020-03-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
9917             Mihail Ionescu  <mihail.ionescu@arm.com>
9918             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
9919
9920         * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
9921         (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
9922         (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
9923         * config/arm/arm_mve.h (vrndxq_f16): Define macro.
9924         (vrndxq_f32): Likewise.
9925         (vrndq_f16) Likewise.
9926         (vrndq_f32): Likewise.
9927         (vrndpq_f16): Likewise.
9928         (vrndpq_f32): Likewise.
9929         (vrndnq_f16): Likewise.
9930         (vrndnq_f32): Likewise.
9931         (vrndmq_f16): Likewise.
9932         (vrndmq_f32): Likewise.
9933         (vrndaq_f16): Likewise.
9934         (vrndaq_f32): Likewise.
9935         (vrev64q_f16): Likewise.
9936         (vrev64q_f32): Likewise.
9937         (vnegq_f16): Likewise.
9938         (vnegq_f32): Likewise.
9939         (vdupq_n_f16): Likewise.
9940         (vdupq_n_f32): Likewise.
9941         (vabsq_f16): Likewise.
9942         (vabsq_f32): Likewise.
9943         (vrev32q_f16): Likewise.
9944         (vcvttq_f32_f16): Likewise.
9945         (vcvtbq_f32_f16): Likewise.
9946         (vcvtq_f16_s16): Likewise.
9947         (vcvtq_f32_s32): Likewise.
9948         (vcvtq_f16_u16): Likewise.
9949         (vcvtq_f32_u32): Likewise.
9950         (__arm_vrndxq_f16): Define intrinsic.
9951         (__arm_vrndxq_f32): Likewise.
9952         (__arm_vrndq_f16): Likewise.
9953         (__arm_vrndq_f32): Likewise.
9954         (__arm_vrndpq_f16): Likewise.
9955         (__arm_vrndpq_f32): Likewise.
9956         (__arm_vrndnq_f16): Likewise.
9957         (__arm_vrndnq_f32): Likewise.
9958         (__arm_vrndmq_f16): Likewise.
9959         (__arm_vrndmq_f32): Likewise.
9960         (__arm_vrndaq_f16): Likewise.
9961         (__arm_vrndaq_f32): Likewise.
9962         (__arm_vrev64q_f16): Likewise.
9963         (__arm_vrev64q_f32): Likewise.
9964         (__arm_vnegq_f16): Likewise.
9965         (__arm_vnegq_f32): Likewise.
9966         (__arm_vdupq_n_f16): Likewise.
9967         (__arm_vdupq_n_f32): Likewise.
9968         (__arm_vabsq_f16): Likewise.
9969         (__arm_vabsq_f32): Likewise.
9970         (__arm_vrev32q_f16): Likewise.
9971         (__arm_vcvttq_f32_f16): Likewise.
9972         (__arm_vcvtbq_f32_f16): Likewise.
9973         (__arm_vcvtq_f16_s16): Likewise.
9974         (__arm_vcvtq_f32_s32): Likewise.
9975         (__arm_vcvtq_f16_u16): Likewise.
9976         (__arm_vcvtq_f32_u32): Likewise.
9977         (vrndxq): Define polymorphic variants.
9978         (vrndq): Likewise.
9979         (vrndpq): Likewise.
9980         (vrndnq): Likewise.
9981         (vrndmq): Likewise.
9982         (vrndaq): Likewise.
9983         (vrev64q): Likewise.
9984         (vnegq): Likewise.
9985         (vabsq): Likewise.
9986         (vrev32q): Likewise.
9987         (vcvtbq_f32): Likewise.
9988         (vcvttq_f32): Likewise.
9989         (vcvtq): Likewise.
9990         * config/arm/arm_mve_builtins.def (VAR2): Define.
9991         (VAR1): Define.
9992         * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
9993         (mve_vrndq_f<mode>): Likewise.
9994         (mve_vrndpq_f<mode>): Likewise.
9995         (mve_vrndnq_f<mode>): Likewise.
9996         (mve_vrndmq_f<mode>): Likewise.
9997         (mve_vrndaq_f<mode>): Likewise.
9998         (mve_vrev64q_f<mode>): Likewise.
9999         (mve_vnegq_f<mode>): Likewise.
10000         (mve_vdupq_n_f<mode>): Likewise.
10001         (mve_vabsq_f<mode>): Likewise.
10002         (mve_vrev32q_fv8hf): Likewise.
10003         (mve_vcvttq_f32_f16v4sf): Likewise.
10004         (mve_vcvtbq_f32_f16v4sf): Likewise.
10005         (mve_vcvtq_to_f_<supf><mode>): Likewise.
10006
10007 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
10008             Mihail Ionescu  <mihail.ionescu@arm.com>
10009             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
10010
10011         * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
10012         (VAR1): Define.
10013         (ARM_BUILTIN_MVE_PATTERN_START): Define.
10014         (arm_init_mve_builtins): Define function.
10015         (arm_init_builtins): Add TARGET_HAVE_MVE check.
10016         (arm_expand_builtin_1): Check the range of fcode.
10017         (arm_expand_mve_builtin): Define function to expand MVE builtins.
10018         (arm_expand_builtin): Check the range of fcode.
10019         * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
10020         types.
10021         (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
10022         (vst4q_s8): Define macro.
10023         (vst4q_s16): Likewise.
10024         (vst4q_s32): Likewise.
10025         (vst4q_u8): Likewise.
10026         (vst4q_u16): Likewise.
10027         (vst4q_u32): Likewise.
10028         (vst4q_f16): Likewise.
10029         (vst4q_f32): Likewise.
10030         (__arm_vst4q_s8): Define inline builtin.
10031         (__arm_vst4q_s16): Likewise.
10032         (__arm_vst4q_s32): Likewise.
10033         (__arm_vst4q_u8): Likewise.
10034         (__arm_vst4q_u16): Likewise.
10035         (__arm_vst4q_u32): Likewise.
10036         (__arm_vst4q_f16): Likewise.
10037         (__arm_vst4q_f32): Likewise.
10038         (__ARM_mve_typeid): Define macro with MVE types.
10039         (__ARM_mve_coerce): Define macro with _Generic feature.
10040         (vst4q): Define polymorphic variant for different vst4q builtins.
10041         * config/arm/arm_mve_builtins.def: New file.
10042         * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
10043         modes in MVE.
10044         * config/arm/mve.md (MVE_VLD_ST): Define iterator.
10045         (unspec): Define unspec.
10046         (mve_vst4q<mode>): Define RTL pattern.
10047         * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
10048         modes in MVE.
10049         (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
10050         in MVE.
10051         (define_split): Allow OI mode split for MVE after reload.
10052         (define_split): Allow XI mode split for MVE after reload.
10053         * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
10054         (arm-builtins.o): Likewise.
10055
10056 2020-03-17  Christophe Lyon  <christophe.lyon@linaro.org>
10057
10058         * c-typeck.c (process_init_element): Handle constructor_type with
10059         type size represented by POLY_INT_CST.
10060
10061 2020-03-17  Jakub Jelinek  <jakub@redhat.com>
10062
10063         PR tree-optimization/94187
10064         * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
10065         nchars - offset < nbytes.
10066
10067         PR middle-end/94189
10068         * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
10069         emit a warning if it was enabled and don't depend on TREE_NO_WARNING
10070         for code-generation.
10071
10072 2020-03-16  Vladimir Makarov  <vmakarov@redhat.com>
10073
10074         PR target/94185
10075         * lra-spills.c (remove_pseudos): Do not reuse insn alternative
10076         after changing memory subreg.
10077
10078 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
10079             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
10080
10081         * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
10082         emulator calls for dobule precision arithmetic operations for MVE.
10083
10084 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
10085             Mihail Ionescu  <mihail.ionescu@arm.com>
10086             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
10087
10088         * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
10089         feature bit is on and -mfpu=auto is passed as compiler option, do not
10090         generate error on not finding any matching fpu. Because in this case
10091         fpu is not required.
10092         * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
10093         enabled for MVE and also for all VFP extensions.
10094         (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
10095         is enabled.
10096         (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
10097         (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
10098         along with feature bits mve_float.
10099         (mve): Modify add options in armv8.1-m.main arch for MVE.
10100         (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
10101         floating point.
10102         * config/arm/arm.c (use_return_insn): Replace the
10103         check with TARGET_VFP_BASE.
10104         (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
10105         TARGET_VFP_BASE.
10106         (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
10107         with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
10108         well.
10109         (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
10110         TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
10111         as well.
10112         (arm_compute_frame_layout): Likewise.
10113         (arm_save_coproc_regs): Likewise.
10114         (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
10115         in MVE as well.
10116         (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
10117         with equivalent macro TARGET_VFP_BASE.
10118         (arm_expand_epilogue_apcs_frame): Likewise.
10119         (arm_expand_epilogue): Likewise.
10120         (arm_conditional_register_usage): Likewise.
10121         (arm_declare_function_name): Add check to skip printing .fpu directive
10122         in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
10123         "softvfp".
10124         * config/arm/arm.h (TARGET_VFP_BASE): Define.
10125         * config/arm/arm.md (arch): Add "mve" to arch.
10126         (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
10127         (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
10128         || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
10129         * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
10130         in MVE.
10131         * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
10132         to not allow for MVE.
10133         * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
10134         enum.
10135         (VUNSPEC_GET_FPSCR): Define.
10136         * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
10137         instructions which move to general-purpose Register from Floating-point
10138         Special register and vice-versa.
10139         (thumb2_movhi_fp16): Likewise.
10140         (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
10141         with MCR and MRC instructions which set and get Floating-point Status
10142         and Control Register (FPSCR).
10143         (movdi_vfp): Modify pattern to enable Single-precision scalar float move
10144         in MVE.
10145         (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
10146         float move patterns in MVE.
10147         (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
10148         code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
10149         (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
10150         code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
10151         (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
10152         TARGET_VFP_BASE check.
10153         (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
10154         using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
10155         register.
10156         (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
10157         using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
10158         register.
10159
10160
10161 2020-03-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
10162             Mihail Ionescu  <mihail.ionescu@arm.com>
10163             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
10164
10165         * config.gcc (arm_mve.h): Include mve intrinsics header file.
10166         * config/arm/aout.h (p0): Add new register name for MVE predicated
10167         cases.
10168         * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
10169         common to Neon and MVE.
10170         (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
10171         (arm_init_simd_builtin_types): Disable poly types for MVE.
10172         (arm_init_neon_builtins): Move a check to arm_init_builtins function.
10173         (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
10174         ARM_BUILTIN_NEON_LANE_CHECK.
10175         (mve_dereference_pointer): Add function.
10176         (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
10177         enabled.
10178         (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
10179         (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
10180         * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
10181         with floating point enabled.
10182         * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
10183         simd_immediate_valid_for_move.
10184         (simd_immediate_valid_for_move): Renamed from
10185         neon_immediate_valid_for_move function.
10186         * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
10187         error if vfpv2 feature bit is disabled and mve feature bit is also
10188         disabled for HARD_FLOAT_ABI.
10189         (use_return_insn): Check to not push VFP regs for MVE.
10190         (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
10191         as Neon.
10192         (aapcs_vfp_allocate_return_reg): Likewise.
10193         (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
10194         address operand for MVE.
10195         (arm_rtx_costs_internal): MVE check to determine cost of rtx.
10196         (neon_valid_immediate): Rename to simd_valid_immediate.
10197         (simd_valid_immediate): Rename from neon_valid_immediate.
10198         (simd_valid_immediate): MVE check on size of vector is 128 bits.
10199         (neon_immediate_valid_for_move): Rename to
10200         simd_immediate_valid_for_move.
10201         (simd_immediate_valid_for_move): Rename from
10202         neon_immediate_valid_for_move.
10203         (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
10204         function.
10205         (neon_make_constant): Modify call to neon_valid_immediate function.
10206         (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
10207         for MVE.
10208         (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
10209         (arm_compute_frame_layout): Calculate space for saved VFP registers for
10210         MVE.
10211         (arm_save_coproc_regs): Save coproc registers for MVE.
10212         (arm_print_operand): Add case 'E' to print memory operands for MVE.
10213         (arm_print_operand_address): Check to print register number for MVE.
10214         (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
10215         (arm_modes_tieable_p): Check to allow structure mode for MVE.
10216         (arm_regno_class): Add VPR_REGNUM check.
10217         (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
10218         for APCS frame.
10219         (arm_expand_epilogue): MVE check for enabling pop instructions in
10220         epilogue.
10221         (arm_print_asm_arch_directives): Modify function to disable print of
10222         .arch_extension "mve" and "fp" for cases where MVE is enabled with
10223         "SOFT FLOAT ABI".
10224         (arm_vector_mode_supported_p): Check for modes available in MVE interger
10225         and MVE floating point.
10226         (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
10227         pointer support.
10228         (arm_conditional_register_usage): Enable usage of conditional regsiter
10229         for MVE.
10230         (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
10231         (arm_declare_function_name): Modify function to disable print of
10232         .arch_extension "mve" and "fp" for cases where MVE is enabled with
10233         "SOFT FLOAT ABI".
10234         * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
10235         when target general registers are required.
10236         (TARGET_HAVE_MVE_FLOAT): Likewise.
10237         (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
10238         for MVE.
10239         (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
10240         which indicate this is not available for across function calls.
10241         (FIRST_PSEUDO_REGISTER): Modify.
10242         (VALID_MVE_MODE): Define valid MVE mode.
10243         (VALID_MVE_SI_MODE): Define valid MVE SI mode.
10244         (VALID_MVE_SF_MODE): Define valid MVE SF mode.
10245         (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
10246         (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
10247         for MVE.
10248         (IS_VPR_REGNUM): Macro to check for VPR_REG register.
10249         (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
10250         (enum reg_class): Add VPR_REG entry.
10251         (REG_CLASS_NAMES): Add VPR_REG entry.
10252         * config/arm/arm.md (VPR_REGNUM): Define.
10253         (conds): Check is_mve_type attrbiute to differentiate "conditional" and
10254         "unconditional" instructions.
10255         (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
10256         (movdf_soft_insn): Modify RTL to not allow for MVE.
10257         (vfp_pop_multiple_with_writeback): Enable for MVE.
10258         (include "mve.md"): Include mve.md file.
10259         * config/arm/arm_mve.h: Add MVE intrinsics head file.
10260         * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
10261         for vector predicated operands.
10262         * config/arm/iterators.md (VNIM1): Define.
10263         (VNINOTM1): Define.
10264         (VHFBF_split): Define
10265         * config/arm/mve.md: New file.
10266         (mve_mov<mode>): Define RTL for move, store and load in MVE.
10267         (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
10268         second operand.
10269         * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
10270         simd_immediate_valid_for_move.
10271         (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
10272         is common to MVE and  NEON to vec-common.md file.
10273         (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
10274         * config/arm/predicates.md (vpr_register_operand): Define.
10275         * config/arm/t-arm: Add mve.md file.
10276         * config/arm/types.md (mve_move): Add MVE instructions mve_move to
10277         attribute "type".
10278         (mve_store): Add MVE instructions mve_store to attribute "type".
10279         (mve_load): Add MVE instructions mve_load to attribute "type".
10280         (is_mve_type): Define attribute.
10281         * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
10282         standard move patterns in MVE along with NEON and IWMMXT with mode
10283         iterator VNIM1.
10284         (mov<mode>): Modify RTL expand to support standard move patterns in NEON
10285         and IWMMXT with mode iterator V8HF.
10286         (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
10287         NEON and MVE.
10288         * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
10289         simd_immediate_valid_for_move.
10290
10291
10292 2020-03-16  H.J. Lu  <hongjiu.lu@intel.com>
10293
10294         PR target/89229
10295         * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
10296         for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
10297         check.
10298         * config/i386/predicates.md (ext_sse_reg_operand): Removed.
10299
10300 2020-03-16  Jakub Jelinek  <jakub@redhat.com>
10301
10302         PR debug/94167
10303         * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
10304         DEBUG_STMTs.
10305
10306         PR tree-optimization/94166
10307         * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
10308         as secondary comparison key.
10309
10310 2020-03-16  Bin Cheng  <bin.cheng@linux.alibaba.com>
10311
10312         PR tree-optimization/94125
10313         * tree-loop-distribution.c
10314         (loop_distribution::break_alias_scc_partitions): Update post order
10315         number for merged scc.
10316
10317 2020-03-15  H.J. Lu  <hongjiu.lu@intel.com>
10318
10319         PR target/89229
10320         * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
10321         MODE_SF.
10322         * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
10323         for TYPE_SSEMOV.  Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
10324         and ext_sse_reg_operand check.
10325
10326 2020-03-15  Lewis Hyatt  <lhyatt@gmail.com>
10327
10328         * common.opt: Avoid redundancy in the help text.
10329         * config/arc/arc.opt: Likewise.
10330         * config/cr16/cr16.opt: Likewise.
10331
10332 2020-03-14  Jakub Jelinek  <jakub@redhat.com>
10333
10334         PR middle-end/93566
10335         * tree-nested.c (convert_nonlocal_omp_clauses,
10336         convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
10337         with C/C++ array sections.
10338
10339 2020-03-14  H.J. Lu  <hongjiu.lu@intel.com>
10340
10341         PR target/89229
10342         * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
10343         for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
10344         check.
10345
10346 2020-03-14  Jakub Jelinek  <jakub@redhat.com>
10347
10348         * gimple-fold.c (gimple_fold_builtin_strncpy): Change
10349         "a an" to "an" in a comment.
10350         * hsa-common.h (is_a_helper): Likewise.
10351         * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
10352         * config/arc/arc.c (arc600_corereg_hazard): Likewise.
10353         * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
10354
10355 2020-03-13  Aaron Sawdey  <acsawdey@linux.ibm.com>
10356
10357         PR target/92379
10358         * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
10359         64-bit value by 64 bits (UB).
10360
10361 2020-03-13  Vladimir Makarov  <vmakarov@redhat.com>
10362
10363         PR rtl-optimization/92303
10364         * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
10365
10366 2020-03-13  Segher Boessenkool  <segher@kernel.crashing.org>
10367
10368         PR rtl-optimization/94148
10369         PR rtl-optimization/94042
10370         * df-core.c (BB_LAST_CHANGE_AGE): Delete.
10371         (df_worklist_propagate_forward): New parameter last_change_age, use
10372         that instead of bb->aux.
10373         (df_worklist_propagate_backward): Ditto.
10374         (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
10375
10376 2020-03-13  Richard Biener  <rguenther@suse.de>
10377
10378         PR tree-optimization/94163
10379         * tree-ssa-pre.c (create_expression_by_pieces): Check
10380         whether alignment would be zero.
10381
10382 2020-03-13  Martin Liska  <mliska@suse.cz>
10383
10384         PR lto/94157
10385         * lto-wrapper.c (run_gcc): Use concat for appending
10386         to collect_gcc_options.
10387
10388 2020-03-13  Jakub Jelinek  <jakub@redhat.com>
10389
10390         PR target/94121
10391         * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
10392         instead of GEN_INT.
10393
10394 2020-03-13  H.J. Lu  <hongjiu.lu@intel.com>
10395
10396         PR target/89229
10397         * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
10398         * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
10399         for TYPE_SSEMOV.  Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
10400         TARGET_AVX512VL and ext_sse_reg_operand check.
10401
10402 2020-03-13  Bu Le  <bule1@huawei.com>
10403
10404         PR target/94154
10405         * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
10406         (-param=aarch64-double-recp-precision=): New options.
10407         * doc/invoke.texi: Document them.
10408         * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
10409         instead of hard-coding the choice of 1 for float and 2 for double.
10410
10411 2020-03-13  Eric Botcazou  <ebotcazou@adacore.com>
10412
10413         PR rtl-optimization/94119
10414         * resource.h (clear_hashed_info_until_next_barrier): Declare.
10415         * resource.c (clear_hashed_info_until_next_barrier): New function.
10416         * reorg.c (add_to_delay_list): Fix formatting.
10417         (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
10418         the next instruction after removing a BARRIER.
10419
10420 2020-03-13  Eric Botcazou  <ebotcazou@adacore.com>
10421
10422         PR middle-end/92071
10423         * expmed.c (store_integral_bit_field): For fields larger than a word,
10424         call extract_bit_field on the value if the mode is BLKmode.  Remove
10425         specific path for big-endian targets and tidy things up a little bit.
10426
10427 2020-03-12  Richard Sandiford  <richard.sandiford@arm.com>
10428
10429         PR rtl-optimization/90275
10430         * cse.c (cse_insn): Delete no-op register moves too.
10431
10432 2020-03-12  Darius Galis  <darius.galis@cyberthorstudios.com>
10433
10434         * config/rx/rx.md (CTRLREG_CPEN): Remove.
10435         * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
10436
10437 2020-03-12  Richard Biener  <rguenther@suse.de>
10438
10439         PR tree-optimization/94103
10440         * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
10441         punning when the mode precision is not sufficient.
10442
10443 2020-03-12  H.J. Lu  <hongjiu.lu@intel.com>
10444
10445         PR target/89229
10446         * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
10447         MODE_V1DF and MODE_V2SF.
10448         * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
10449         ix86_output_ssemov for TYPE_SSEMOV.  Remove ext_sse_reg_operand
10450         check.
10451
10452 2020-03-12  Jakub Jelinek  <jakub@redhat.com>
10453
10454         * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
10455         ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
10456         and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
10457         * doc/tm.texi: Regenerated.
10458
10459         PR tree-optimization/94130
10460         * tree-ssa-dse.c: Include gimplify.h.
10461         (increment_start_addr): If stmt has lhs, drop the lhs from call and
10462         set it after the call to the original value of the first argument.
10463         Formatting fixes.
10464         (decrement_count): Formatting fix.
10465
10466 2020-03-11  Delia Burduv  <delia.burduv@arm.com>
10467
10468         * config/arm/arm-builtins.c
10469         (arm_init_simd_builtin_scalar_types): New.
10470         * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
10471         (vld2q_bf16): Used new builtin type.
10472         (vld3_bf16): Used new builtin type.
10473         (vld3q_bf16): Used new builtin type.
10474         (vld4_bf16): Used new builtin type.
10475         (vld4q_bf16): Used new builtin type.
10476         (vld2_dup_bf16): Used new builtin type.
10477         (vld2q_dup_bf16): Used new builtin type.
10478         (vld3_dup_bf16): Used new builtin type.
10479         (vld3q_dup_bf16): Used new builtin type.
10480         (vld4_dup_bf16): Used new builtin type.
10481         (vld4q_dup_bf16): Used new builtin type.
10482
10483 2020-03-11  Jakub Jelinek  <jakub@redhat.com>
10484
10485         PR target/94134
10486         * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
10487         at the start to switch to data section.  Don't print extra newline if
10488         .globl directive has not been emitted.
10489
10490 2020-03-11  Richard Biener  <rguenther@suse.de>
10491
10492         * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
10493         New pattern.
10494
10495 2020-03-11  Eric Botcazou  <ebotcazou@adacore.com>
10496
10497         PR middle-end/93961
10498         * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
10499         whose type is a qualified union.
10500
10501 2020-03-11  Jakub Jelinek  <jakub@redhat.com>
10502
10503         PR target/94121
10504         * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
10505         instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
10506
10507         PR bootstrap/93962
10508         * value-prof.c (dump_histogram_value): Use abs_hwi instead of
10509         std::abs.
10510         (get_nth_most_common_value): Use abs_hwi instead of abs.
10511
10512         PR middle-end/94111
10513         * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
10514         is rvc_normal, otherwise use real_to_decimal to print the number to
10515         string.
10516
10517         PR tree-optimization/94114
10518         * tree-loop-distribution.c (generate_memset_builtin): Call
10519         rewrite_to_non_trapping_overflow even on mem.
10520         (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
10521         on dest and src.
10522
10523 2020-03-10  Jeff Law  <law@redhat.com>
10524
10525         * config/bfin/bfin.md (movsi_insv): Add length attribute.
10526
10527 2020-03-10  Jiufu Guo  <guojiufu@linux.ibm.com>
10528
10529         PR target/93709
10530         * gcc/config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
10531         NAN and SIGNED_ZEROR for smax/smin.
10532
10533 2020-03-10  Will Schmidt  <will_schmidt@vnet.ibm.com>
10534
10535         PR target/90763
10536         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
10537         clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
10538
10539 2020-03-10  Roman Zhuykov  <zhroma@ispras.ru>
10540
10541         * loop-iv.c (find_simple_exit): Make it static.
10542         * cfgloop.h: Remove the corresponding prototype.
10543
10544 2020-03-10  Roman Zhuykov  <zhroma@ispras.ru>
10545
10546         * ddg.c (create_ddg): Fix intendation.
10547         (set_recurrence_length): Likewise.
10548         (create_ddg_all_sccs): Likewise.
10549
10550 2020-03-10  Jakub Jelinek  <jakub@redhat.com>
10551
10552         PR target/94088
10553         * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
10554         CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
10555         is 32.
10556
10557 2020-03-09  Jason Merrill  <jason@redhat.com>
10558
10559         * gdbinit.in (pgs): Fix typo in documentation.
10560
10561 2020-03-09  Vladimir Makarov  <vmakarov@redhat.com>
10562
10563         Revert:
10564
10565         2020-02-28  Vladimir Makarov  <vmakarov@redhat.com>
10566
10567         PR rtl-optimization/93564
10568         * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
10569         do not honor reg alloc order.
10570
10571 2020-03-09  Andrew Pinski  <apinski@marvell.com>
10572
10573         PR inline-asm/94095
10574         * doc/extend.texi (x86 Operand Modifiers): Fix column
10575         for 'A' modifier.
10576
10577 2020-03-09  Martin Liska  <mliska@suse.cz>
10578
10579         PR target/93800
10580         * config/rs6000/rs6000.c (rs6000_option_override_internal):
10581         Remove set of str_align_loops and str_align_jumps as these
10582         should be set in previous 2 conditions in the function.
10583
10584 2020-03-09  Jakub Jelinek  <jakub@redhat.com>
10585
10586         PR rtl-optimization/94045
10587         * params.opt (-param=max-find-base-term-values=): New option.
10588         * alias.c (find_base_term): Add cut-off for number of visited VALUEs
10589         in a single toplevel find_base_term call.
10590
10591 2020-03-06  Wilco Dijkstra  <wdijkstr@arm.com>
10592
10593         PR target/91598
10594         * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
10595         * config/aarch64/aarch64-simd.md
10596         (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
10597         (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
10598         * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
10599         * config/aarch64/arm_neon.h:
10600         (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
10601         (vmlal_lane_u16): Likewise.
10602         (vmlal_lane_s32): Likewise.
10603         (vmlal_lane_u32): Likewise.
10604         (vmlal_laneq_s16): Likewise.
10605         (vmlal_laneq_u16): Likewise.
10606         (vmlal_laneq_s32): Likewise.
10607         (vmlal_laneq_u32): Likewise.
10608         (vmull_lane_s16): Likewise.
10609         (vmull_lane_u16): Likewise.
10610         (vmull_lane_s32): Likewise.
10611         (vmull_lane_u32): Likewise.
10612         (vmull_laneq_s16): Likewise.
10613         (vmull_laneq_u16): Likewise.
10614         (vmull_laneq_s32): Likewise.
10615         (vmull_laneq_u32): Likewise.
10616         * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
10617         (Qlane): Likewise.
10618
10619 2020-03-06  Wilco Dijkstra  <wdijkstr@arm.com>
10620
10621         * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
10622         (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
10623         (aarch64_mls_elt<mode>): Likewise.
10624         (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
10625         (aarch64_fma4_elt<mode>): Likewise.
10626         (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
10627         (aarch64_fma4_elt_to_64v2df): Likewise.
10628         (aarch64_fnma4_elt<mode>): Likewise.
10629         (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
10630         (aarch64_fnma4_elt_to_64v2df): Likewise.
10631
10632 2020-03-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
10633
10634         * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
10635         Specify movprfx attribute.
10636         (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
10637
10638 2020-03-06  David Edelsohn  <dje.gcc@gmail.com>
10639
10640         PR target/94065
10641         * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
10642         cmodel=large.
10643         (TARGET_NO_FP_IN_TOC): Same.
10644         * config/rs6000/aix71.h: Same.
10645         * config/rs6000/aix72.h: Same.
10646
10647 2020-03-06  Andrew Pinski  <apinski@marvell.com>
10648             Jeff Law  <law@redhat.com>
10649
10650         PR rtl-optimization/93996
10651         * haifa-sched.c (remove_notes): Be more careful when adding
10652         REG_SAVE_NOTE.
10653
10654 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
10655
10656         * config/arm/arm_neon.h (vld2_bf16): New.
10657         (vld2q_bf16): New.
10658         (vld3_bf16): New.
10659         (vld3q_bf16): New.
10660         (vld4_bf16): New.
10661         (vld4q_bf16): New.
10662         (vld2_dup_bf16): New.
10663         (vld2q_dup_bf16): New.
10664         (vld3_dup_bf16): New.
10665         (vld3q_dup_bf16): New.
10666         (vld4_dup_bf16): New.
10667         (vld4q_dup_bf16): New.
10668         * config/arm/arm_neon_builtins.def
10669         (vld2): Changed to VAR13 and added v4bf, v8bf
10670         (vld2_dup): Changed to VAR8 and added v4bf, v8bf
10671         (vld3): Changed to VAR13 and added v4bf, v8bf
10672         (vld3_dup): Changed to VAR8 and added v4bf, v8bf
10673         (vld4): Changed to VAR13 and added v4bf, v8bf
10674         (vld4_dup): Changed to VAR8 and added v4bf, v8bf
10675         * config/arm/iterators.md (VDXBF2): New iterator.
10676         *config/arm/neon.md (neon_vld2): Use new iterators.
10677         (neon_vld2_dup<mode): Use new iterators.
10678         (neon_vld3<mode>): Likewise.
10679         (neon_vld3qa<mode>): Likewise.
10680         (neon_vld3qb<mode>): Likewise.
10681         (neon_vld3_dup<mode>): Likewise.
10682         (neon_vld4<mode>): Likewise.
10683         (neon_vld4qa<mode>): Likewise.
10684         (neon_vld4qb<mode>): Likewise.
10685         (neon_vld4_dup<mode>): Likewise.
10686         (neon_vld2_dupv8bf): New.
10687         (neon_vld3_dupv8bf): Likewise.
10688         (neon_vld4_dupv8bf): Likewise.
10689
10690 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
10691
10692         * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
10693         (bfloat16x8x2_t): New typedef.
10694         (bfloat16x4x3_t): New typedef.
10695         (bfloat16x8x3_t): New typedef.
10696         (bfloat16x4x4_t): New typedef.
10697         (bfloat16x8x4_t): New typedef.
10698         (vst2_bf16): New.
10699         (vst2q_bf16): New.
10700         (vst3_bf16): New.
10701         (vst3q_bf16): New.
10702         (vst4_bf16): New.
10703         (vst4q_bf16): New.
10704         * config/arm/arm-builtins.c (v2bf_UP): Define.
10705         (VAR13): New.
10706         (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
10707         * config/arm/arm-modes.def (V2BF): New mode.
10708         * config/arm/arm-simd-builtin-types.def
10709         (Bfloat16x2_t): New entry.
10710         * config/arm/arm_neon_builtins.def
10711         (vst2): Changed to VAR13 and added v4bf, v8bf
10712         (vst3): Changed to VAR13 and added v4bf, v8bf
10713         (vst4): Changed to VAR13 and added v4bf, v8bf
10714         * config/arm/iterators.md (VDXBF): New iterator.
10715         (VQ2BF): New iterator.
10716         *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
10717         (neon_vst2<mode>): Used new iterators.
10718         (neon_vst3<mode>): Used new iterators.
10719         (neon_vst3<mode>): Used new iterators.
10720         (neon_vst3qa<mode>): Used new iterators.
10721         (neon_vst3qb<mode>): Used new iterators.
10722         (neon_vst4<mode>): Used new iterators.
10723         (neon_vst4<mode>): Used new iterators.
10724         (neon_vst4qa<mode>): Used new iterators.
10725         (neon_vst4qb<mode>): Used new iterators.
10726
10727 2020-03-06  Delia Burduv  <delia.burduv@arm.com>
10728
10729         * config/aarch64/aarch64-simd-builtins.def
10730         (bfcvtn): New built-in function.
10731         (bfcvtn_q): New built-in function.
10732         (bfcvtn2): New built-in function.
10733         (bfcvt): New built-in function.
10734         * config/aarch64/aarch64-simd.md
10735         (aarch64_bfcvtn<q><mode>): New pattern.
10736         (aarch64_bfcvtn2v8bf): New pattern.
10737         (aarch64_bfcvtbf): New pattern.
10738         * config/aarch64/arm_bf16.h (float32_t): New typedef.
10739         (vcvth_bf16_f32): New intrinsic.
10740         * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
10741         (vcvtq_low_bf16_f32): New intrinsic.
10742         (vcvtq_high_bf16_f32): New intrinsic.
10743         * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
10744         (UNSPEC_BFCVTN): New UNSPEC.
10745         (UNSPEC_BFCVTN2): New UNSPEC.
10746         (UNSPEC_BFCVT): New UNSPEC.
10747         * config/arm/types.md (bf_cvt): New type.
10748
10749 2020-03-06  Andreas Krebbel  <krebbel@linux.ibm.com>
10750
10751         * config/s390/s390.md ("tabort"): Get rid of two consecutive
10752         blanks in format string.
10753
10754 2020-03-05  H.J. Lu  <hongjiu.lu@intel.com>
10755
10756         PR target/89229
10757         PR target/89346
10758         * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
10759         * config/i386/i386.c (ix86_get_ssemov): New function.
10760         (ix86_output_ssemov): Likewise.
10761         * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
10762         ix86_output_ssemov for TYPE_SSEMOV.  Remove TARGET_AVX512VL
10763         check.
10764         (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
10765         (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
10766         Remove ext_sse_reg_operand and TARGET_AVX512VL check.
10767         (*movti_internal): Likewise.
10768         (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
10769
10770 2020-03-05  Jeff Law  <law@redhat.com>
10771
10772         PR tree-optimization/91890
10773         * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
10774         Use gimple_or_expr_nonartificial_location.
10775         (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
10776         Use gimple_or_expr_nonartificial_location.
10777         * gimple.c (gimple_or_expr_nonartificial_location): New function.
10778         * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
10779         * tree-ssa-strlen.c (maybe_warn_overflow): Use
10780         gimple_or_expr_nonartificial_location.
10781         (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
10782         (maybe_warn_pointless_strcmp): Likewise.
10783
10784 2020-03-05  Jakub Jelinek  <jakub@redhat.com>
10785
10786         PR target/94046
10787         * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
10788         SRC and MASK arguments to __m128 from __m128d.
10789         (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
10790         from __m256d.
10791         (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
10792         from __m128d.
10793         * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
10794         argument to __m128i from __m128d.
10795         (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
10796         __m256d.
10797         (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
10798         (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
10799         __m256.
10800
10801 2020-03-05  Delia Burduv  <delia.burduv@arm.com>
10802
10803         * config/arm/arm_neon.h (vbfmmlaq_f32): New.
10804         (vbfmlalbq_f32): New.
10805         (vbfmlaltq_f32): New.
10806         (vbfmlalbq_lane_f32): New.
10807         (vbfmlaltq_lane_f32): New.
10808         (vbfmlalbq_laneq_f32): New.
10809         (vbfmlaltq_laneq_f32): New.
10810         * config/arm/arm_neon_builtins.def (vmmla): New.
10811         (vfmab): New.
10812         (vfmat): New.
10813         (vfmab_lane): New.
10814         (vfmat_lane): New.
10815         (vfmab_laneq): New.
10816         (vfmat_laneq): New.
10817         * config/arm/iterators.md (BF_MA): New int iterator.
10818         (bt): New int attribute.
10819         (VQXBF): Copy of VQX with V8BF.
10820         * config/arm/neon.md (neon_vmmlav8bf): New insn.
10821         (neon_vfma<bt>v8bf): New insn.
10822         (neon_vfma<bt>_lanev8bf): New insn.
10823         (neon_vfma<bt>_laneqv8bf): New expand.
10824         (neon_vget_high<mode>): Changed iterator to VQXBF.
10825         * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
10826         (UNSPEC_BFMAB): New UNSPEC.
10827         (UNSPEC_BFMAT): New UNSPEC.
10828
10829 2020-03-05  Jakub Jelinek  <jakub@redhat.com>
10830
10831         PR middle-end/93399
10832         * tree-pretty-print.h (pretty_print_string): Declare.
10833         * tree-pretty-print.c (pretty_print_string): Remove forward
10834         declaration, no longer static.  Change nbytes parameter type
10835         from unsigned to size_t.
10836         * print-rtl.c (print_value) <case CONST_STRING>: Use
10837         pretty_print_string and for shrink way too long strings.
10838
10839 2020-03-05  Richard Biener  <rguenther@suse.de>
10840             Jakub Jelinek  <jakub@redhat.com>
10841
10842         PR tree-optimization/93582
10843         * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
10844         last operand as signed when looking for memset offset.  Formatting
10845         fix.
10846
10847 2020-03-04  Andrew Pinski  <apinski@marvell.com>
10848
10849         PR bootstrap/93962
10850         * value-prof.c (dump_histogram_value): Use std::abs.
10851
10852 2020-03-04  Martin Sebor  <msebor@redhat.com>
10853
10854         PR tree-optimization/93986
10855         * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
10856         operands to the same precision widest_int to avoid ICEs.
10857
10858 2020-03-04  Bill Schmidt  <wschmidt@linux.ibm.com>
10859
10860         PR target/87560
10861         * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
10862         * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
10863         for OPTION_MASK_ALTIVEC.
10864
10865 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
10866
10867         * config.gcc: Include the glibc-stdint.h header for zTPF.
10868
10869 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
10870
10871         * config/s390/s390.c (s390_secondary_memory_needed): Disallow
10872         direct FPR-GPR copies.
10873         (s390_register_info_gprtofpr): Disallow GPR content to be saved in
10874         FPRs.
10875
10876 2020-03-04  Andreas Krebbel  <krebbel@linux.ibm.com>
10877
10878         * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
10879         operands to the prologue_tpf expander.
10880         (s390_emit_epilogue): Likewise.
10881         (s390_option_override_internal): Do error checking and setup for
10882         the new options.
10883         * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
10884         (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
10885         (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
10886         (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
10887         * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
10888         operands for the check flag and the branch target.
10889         * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
10890         ("mtpf-trace-hook-prologue-target")
10891         ("mtpf-trace-hook-epilogue-check")
10892         ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
10893         options.
10894         * doc/invoke.texi: Document -mtpf-trace-skip option. The other
10895         options are for debugging purposes and will not be documented
10896         here.
10897
10898 2020-03-04  Jakub Jelinek  <jakub@redhat.com>
10899
10900         PR debug/93888
10901         * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
10902
10903         * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
10904         argument.  Change pd argument so that it can be modified.  Turn
10905         constant non-CONSTRUCTOR store into non-constant if it is too large.
10906         Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
10907         overflows.
10908         (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
10909         callers.
10910
10911 2020-02-04  Richard Biener  <rguenther@suse.de>
10912
10913         PR tree-optimization/93964
10914         * graphite-isl-ast-to-gimple.c
10915         (gcc_expression_from_isl_ast_expr_id): Add intermediate
10916         conversion for pointer to integer converts.
10917         * graphite-scop-detection.c (assign_parameter_index_in_region):
10918         Relax assert.
10919
10920 2020-03-04  Martin Liska  <mliska@suse.cz>
10921
10922         PR c/93886
10923         PR c/93887
10924         * doc/invoke.texi: Clarify --help=language and --help=common
10925         interaction.
10926
10927 2020-03-04  Jakub Jelinek  <jakub@redhat.com>
10928
10929         PR tree-optimization/94001
10930         * tree-tailcall.c (process_assignment): Before comparing op1 to
10931         *ass_var, verify *ass_var is non-NULL.
10932
10933 2020-03-04  Kito Cheng  <kito.cheng@sifive.com>
10934
10935         PR target/93995
10936         * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
10937         the result of IOR.
10938
10939 2020-03-03  Dennis Zhang  <dennis.zhang@arm.com>
10940
10941         * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
10942         * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
10943         (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
10944         (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
10945         * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
10946         (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
10947         * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
10948         (V_bf_low, V_bf_cvt_m): New mode attributes.
10949         * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
10950         (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
10951         (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
10952         (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
10953         * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
10954
10955 2020-03-03  Jakub Jelinek  <jakub@redhat.com>
10956
10957         PR tree-optimization/93582
10958         * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
10959         * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
10960         members, initialize them in the constructor and if mask is non-NULL,
10961         artificially push_partial_def {} for the portions of the mask that
10962         contain zeros.
10963         (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
10964         val and return (void *)-1.  Formatting fix.
10965         (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
10966         Formatting fix.
10967         (vn_reference_lookup): Add mask argument.  If non-NULL, don't call
10968         fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
10969         data.mask_result.
10970         (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
10971         mask.
10972         (visit_stmt): Formatting fix.
10973
10974 2020-03-03  Richard Biener  <rguenther@suse.de>
10975
10976         PR tree-optimization/93946
10977         * alias.h (refs_same_for_tbaa_p): Declare.
10978         * alias.c (refs_same_for_tbaa_p): New function.
10979         * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
10980         zero.
10981         * tree-ssa-scopedtables.h
10982         (avail_exprs_stack::lookup_avail_expr): Add output argument
10983         giving access to the hashtable entry.
10984         * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
10985         Likewise.
10986         * tree-ssa-dom.c: Include alias.h.
10987         (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
10988         removing redundant store.
10989         * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
10990         (ao_ref_init_from_vn_reference): Adjust prototype.
10991         (vn_reference_lookup_pieces): Likewise.
10992         (vn_reference_insert_pieces): Likewise.
10993         * tree-ssa-sccvn.c: Track base alias set in addition to alias
10994         set everywhere.
10995         (eliminate_dom_walker::eliminate_stmt): Also check base alias
10996         set when removing redundant stores.
10997         (visit_reference_op_store): Likewise.
10998         * dse.c (record_store): Adjust valdity check for redundant
10999         store removal.
11000
11001 2020-03-03  Jakub Jelinek  <jakub@redhat.com>
11002
11003         PR target/26877
11004         * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
11005
11006         PR rtl-optimization/94002
11007         * explow.c (plus_constant): Punt if cst has VOIDmode and
11008         get_pool_mode is different from mode.
11009
11010 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
11011
11012         * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
11013         address has an offset which fits the scalling constraint for a
11014         load/store operation.
11015         (legitimate_scaled_address_p): Update use
11016         leigitimate_small_data_address_p.
11017         (arc_print_operand): Likewise.
11018         (arc_legitimate_address_p): Likewise.
11019         (legitimate_small_data_address_p): Likewise.
11020
11021 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
11022
11023         * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
11024         (fnmasf4_fpu): Likewise.
11025
11026 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
11027
11028         * config/arc/arc.md (adddi3): Early expand the 64bit operation into
11029         32bit ops.
11030         (subdi3): Likewise.
11031         (adddi3_i): Remove pattern.
11032         (subdi3_i): Likewise.
11033
11034 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
11035
11036         * config/arc/arc.md (eh_return): Add length info.
11037
11038 2020-03-02  David Malcolm  <dmalcolm@redhat.com>
11039
11040         * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
11041
11042 2020-03-02  David Malcolm  <dmalcolm@redhat.com>
11043
11044         * doc/invoke.texi (Static Analyzer Options): Add
11045         -Wanalyzer-stale-setjmp-buffer to the list of options enabled
11046         by -fanalyzer.
11047
11048 2020-03-02  Uroš Bizjak  <ubizjak@gmail.com>
11049
11050         PR target/93997
11051         * config/i386/i386.md (movstrict<mode>): Allow only
11052         registers with VALID_INT_MODE_P modes.
11053
11054 2020-03-02  Andrew Stubbs  <ams@codesourcery.com>
11055
11056         * config/gcn/gcn-valu.md (dpp_move<mode>): New.
11057         (reduc_insn): Use 'U' and 'B' operand codes.
11058         (reduc_<reduc_op>_scal_<mode>): Allow all types.
11059         (reduc_<reduc_op>_scal_v64di): Delete.
11060         (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
11061         (*plus_carry_dpp_shr_v64si): Change to ...
11062         (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
11063         (mov_from_lane63_v64di): Change to ...
11064         (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
11065         * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
11066         Support UNSPEC_MOV_DPP_SHR output formats.
11067         (gcn_expand_reduc_scalar): Add "use_moves" reductions.
11068         Add "use_extends" reductions.
11069         (print_operand_address): Add 'I' and 'U' codes.
11070         * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
11071
11072 2020-03-02  Martin Liska  <mliska@suse.cz>
11073
11074         * lto-wrapper.c: Fix typo in comment about
11075         C++ standard version.
11076
11077 2020-03-01  Martin Sebor  <msebor@redhat.com>
11078
11079         PR c++/92721
11080         * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
11081
11082 2020-03-01  Martin Sebor  <msebor@redhat.com>
11083
11084         PR middle-end/93829
11085         * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
11086           of a pointer in the outermost ADDR_EXPRs.
11087
11088 2020-02-28  Jeff Law  <law@redhat.com>
11089
11090         * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
11091         * config/v850/v850.c (v850_asm_trampoline_template): Update
11092         accordingly.
11093
11094 2020-02-28  Michael Meissner  <meissner@linux.ibm.com>
11095
11096         PR target/93937
11097         * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
11098         Delete insn.
11099
11100 2020-02-28  Martin Liska  <mliska@suse.cz>
11101
11102         PR other/93965
11103         * configure.ac: Improve detection of ld_date by requiring
11104         either two dashes or none.
11105         * configure: Regenerate.
11106
11107 2020-02-28  Vladimir Makarov  <vmakarov@redhat.com>
11108
11109         PR rtl-optimization/93564
11110         * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
11111         do not honor reg alloc order.
11112
11113 2020-02-27  Joel Hutton  <Joel.Hutton@arm.com>
11114
11115         PR target/87612
11116         * config/aarch64/aarch64.c (aarch64_override_options): Fix
11117         misleading warning string.
11118
11119 2020-02-27  Martin Sebor  <msebor@redhat.com>
11120
11121         * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
11122
11123 2020-02-27  Michael Meissner  <meissner@linux.ibm.com>
11124
11125         PR target/93932
11126         * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
11127         Split the insn into two parts.  This insn only does variable
11128         extract from a register.
11129         (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
11130         variable extract from memory.
11131         (vsx_extract_v4sf_var): Split the insn into two parts.  This insn
11132         only does variable extract from a register.
11133         (vsx_extract_v4sf_var_load): New insn, do variable extract from
11134         memory.
11135         (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
11136         into two parts.  This insn only does variable extract from a
11137         register.
11138         (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
11139         do variable extract from memory.
11140
11141 2020-02-27  Martin Jambor  <mjambor@suse.cz>
11142             Feng Xue  <fxue@os.amperecomputing.com>
11143
11144         PR ipa/93707
11145         * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
11146         new function calls_same_node_or_its_all_contexts_clone_p.
11147         (cgraph_edge_brings_value_p): Use it.
11148         (cgraph_edge_brings_value_p): Likewise.
11149         (self_recursive_pass_through_p): Return false if caller is a clone.
11150         (self_recursive_agg_pass_through_p): Likewise.
11151
11152 2020-02-27  Jan Hubicka  <hubicka@ucw.cz>
11153
11154         PR middle-end/92152
11155         * alias.c (ends_tbaa_access_path_p): Break out from ...
11156         (component_uses_parent_alias_set_from): ... here.
11157         * alias.h (ends_tbaa_access_path_p): Declare.
11158         * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
11159         handle trailing arrays past end of tbaa access path.
11160         (aliasing_component_refs_p): ... here; likewise.
11161         (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
11162         path; disambiguate also past end of it.
11163         (nonoverlapping_component_refs_p): Use only TBAA segment of the access
11164         path.
11165
11166 2020-02-27  Mihail Ionescu  <mihail.ionescu@arm.com>
11167
11168         * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
11169         beginning of the file.
11170         (vcreate_bf16, vcombine_bf16): New.
11171         (vdup_n_bf16, vdupq_n_bf16): New.
11172         (vdup_lane_bf16, vdup_laneq_bf16): New.
11173         (vdupq_lane_bf16, vdupq_laneq_bf16): New.
11174         (vduph_lane_bf16, vduph_laneq_bf16): New.
11175         (vset_lane_bf16, vsetq_lane_bf16): New.
11176         (vget_lane_bf16, vgetq_lane_bf16): New.
11177         (vget_high_bf16, vget_low_bf16): New.
11178         (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
11179         (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
11180         (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
11181         (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
11182         (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
11183         (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
11184         (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
11185         (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
11186         (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
11187         (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
11188         (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
11189         (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
11190         (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
11191         (vreinterpretq_bf16_p128): New.
11192         (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
11193         (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
11194         (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
11195         (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
11196         (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
11197         (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
11198         (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
11199         (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
11200         (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
11201         (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
11202         (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
11203         (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
11204         (vreinterpretq_p128_bf16): New.
11205         * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
11206         (V_elem): Likewise.
11207         (V_elem_l): Likewise.
11208         (VD_LANE): Likewise.
11209         (VQX) Add V8BF.
11210         (V_DOUBLE): Likewise.
11211         (VDQX): Add V4BF and V8BF.
11212         (V_two_elem, V_three_elem, V_four_elem): Likewise.
11213         (V_reg): Likewise.
11214         (V_HALF): Likewise.
11215         (V_double_vector_mode): Likewise.
11216         (V_cmp_result): Likewise.
11217         (V_uf_sclr): Likewise.
11218         (V_sz_elem): Likewise.
11219         (Is_d_reg): Likewise.
11220         (V_mode_nunits): Likewise.
11221         * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
11222
11223 2020-02-27  Andrew Stubbs  <ams@codesourcery.com>
11224
11225         * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
11226         (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
11227         (<expander><mode>3<exec>): Likewise.
11228         (<expander><mode>3): New.
11229         (v<expander><mode>3): New.
11230         (<expander><mode>3): New.
11231         (<expander><mode>3<exec>): Rename to ...
11232         (<expander>v64si3<exec>): ... this, and change modes to V64SI.
11233         * config/gcn/gcn.md (mnemonic): Use '%B' for not.
11234
11235 2020-02-27  Alexandre Oliva <oliva@adacore.com>
11236
11237         * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
11238         them alone on vx7.
11239
11240 2020-02-27  Richard Biener  <rguenther@suse.de>
11241
11242         PR tree-optimization/93508
11243         * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
11244         non-_CHK variants.  Valueize their length arguments.
11245
11246 2020-02-27  Richard Biener  <rguenther@suse.de>
11247
11248         PR tree-optimization/93953
11249         * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
11250         to the hash-map entry.
11251
11252 2020-02-27  Andrew Stubbs  <ams@codesourcery.com>
11253
11254         * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
11255
11256 2020-02-27  Mark Williams  <mwilliams@fb.com>
11257
11258         * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
11259         * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
11260         -ffile-prefix-map and -fmacro-prefix-map.
11261         * lto-streamer-out.c: Include file-prefix-map.h.
11262         (lto_output_location): Remap the file part of locations.
11263
11264 2020-02-27  Jakub Jelinek  <jakub@redhat.com>
11265
11266         PR c/93949
11267         * gimplify.c (gimplify_init_constructor): Don't promote readonly
11268         DECL_REGISTER variables to TREE_STATIC.
11269
11270         PR tree-optimization/93582
11271         PR tree-optimization/93945
11272         * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
11273         non-zero INTEGER_CST second argument and ref->offset or ref->size
11274         not a multiple of BITS_PER_UNIT.
11275
11276 2020-02-27  Jonathan Wakely  <jwakely@redhat.com>
11277
11278         * doc/install.texi (Binaries): Update description of BullFreeware.
11279
11280 2020-02-26  Sandra Loosemore  <sandra@codesourcery.com>
11281
11282         PR c++/90467
11283
11284         * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
11285         C++ Language Options, Warning Options, and Static Analyzer
11286         Options lists.  Document negative form of options enabled by
11287         default.  Move some things around to more accurately sort
11288         warnings by category.
11289         (C++ Dialect Options, Warning Options, Static Analyzer
11290         Options): Document negative form of options when enabled by
11291         default.  Move some things around to more accurately sort
11292         warnings by category.  Add some missing index entries.
11293         Light copy-editing.
11294
11295 2020-02-26  Carl Love  <cel@us.ibm.com>
11296
11297         PR target/91276
11298         * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
11299         ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
11300         for the vector unsigned short arguments.  It is also listed as the
11301         name of the built-in for arguments vector unsigned short,
11302         vector unsigned int and vector unsigned long long built-ins.  The
11303         name of the builtins for these arguments should be:
11304         __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
11305         __builtin_crypto_vpmsumd respectively.
11306
11307 2020-02-26  Richard Biener  <rguenther@suse.de>
11308
11309         * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
11310         and load permutation.
11311
11312 2020-02-26  Richard Sandiford  <richard.sandiford@arm.com>
11313
11314         PR middle-end/93843
11315         * optabs-tree.c (supportable_convert_operation): Reject types with
11316         scalar modes.
11317
11318 2020-02-26  David Malcolm  <dmalcolm@redhat.com>
11319
11320         * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
11321
11322 2020-02-26  Jakub Jelinek  <jakub@redhat.com>
11323
11324         PR tree-optimization/93820
11325         * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
11326         argument to ALL_INTEGER_CST_P boolean.
11327         (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
11328         (imm_store_chain_info::coalesce_immediate_stores): Likewise.  Handle
11329         adjacent INTEGER_CST store into merged_store->only_constants like
11330         overlapping one.
11331
11332 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
11333
11334         PR other/93912
11335         * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
11336         -> probability.
11337         * cfghooks.c (verify_flow_info): Likewise.
11338         * predict.c (combine_predictions_for_bb): Likewise.
11339         * bb-reorder.c (connect_better_edge_p): Likewise.  Fix comment typo,
11340         sucessor -> successor.
11341         (find_traces_1_round): Fix comment typo, destinarion -> destination.
11342         * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
11343         successors.
11344         * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
11345         message typo, sucessors -> successors.
11346
11347 2020-02-25  Martin Sebor  <msebor@redhat.com>
11348
11349         * doc/extend.texi (attribute access): Correct an example.
11350
11351 2020-02-25  Mihail Ionescu  <mihail.ionescu@arm.com>
11352
11353         * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
11354         Add simd_bf.
11355         (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
11356         (VAR15, VAR16): New.
11357         * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
11358         (VD): Enable for V4BF.
11359         (VDC): Likewise.
11360         (VQ): Enable for V8BF.
11361         (VQ2): Likewise.
11362         (VQ_NO2E): Likewise.
11363         (VDBL, Vdbl): Add V4BF.
11364         (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
11365         * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
11366         (bfloat16x8x2_t): Likewise.
11367         (bfloat16x4x3_t): Likewise.
11368         (bfloat16x8x3_t): Likewise.
11369         (bfloat16x4x4_t): Likewise.
11370         (bfloat16x8x4_t): Likewise.
11371         (vcombine_bf16): New.
11372         (vld1_bf16, vld1_bf16_x2): New.
11373         (vld1_bf16_x3, vld1_bf16_x4): New.
11374         (vld1q_bf16, vld1q_bf16_x2): New.
11375         (vld1q_bf16_x3, vld1q_bf16_x4): New.
11376         (vld1_lane_bf16): New.
11377         (vld1q_lane_bf16): New.
11378         (vld1_dup_bf16): New.
11379         (vld1q_dup_bf16): New.
11380         (vld2_bf16): New.
11381         (vld2q_bf16): New.
11382         (vld2_dup_bf16): New.
11383         (vld2q_dup_bf16): New.
11384         (vld3_bf16): New.
11385         (vld3q_bf16): New.
11386         (vld3_dup_bf16): New.
11387         (vld3q_dup_bf16): New.
11388         (vld4_bf16): New.
11389         (vld4q_bf16): New.
11390         (vld4_dup_bf16): New.
11391         (vld4q_dup_bf16): New.
11392         (vst1_bf16, vst1_bf16_x2): New.
11393         (vst1_bf16_x3, vst1_bf16_x4): New.
11394         (vst1q_bf16, vst1q_bf16_x2): New.
11395         (vst1q_bf16_x3, vst1q_bf16_x4): New.
11396         (vst1_lane_bf16): New.
11397         (vst1q_lane_bf16): New.
11398         (vst2_bf16): New.
11399         (vst2q_bf16): New.
11400         (vst3_bf16): New.
11401         (vst3q_bf16): New.
11402         (vst4_bf16): New.
11403         (vst4q_bf16): New.
11404
11405 2020-02-25  Mihail Ionescu  <mihail.ionescu@arm.com>
11406
11407         * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
11408         (VALL_F16): Likewise.
11409         (VALLDI_F16): Likewise.
11410         (Vtype): Likewise.
11411         (Vetype): Likewise.
11412         (vswap_width_name): Likewise.
11413         (VSWAP_WIDTH): Likewise.
11414         (Vel): Likewise.
11415         (VEL): Likewise.
11416         (q): Likewise.
11417         * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
11418         (vget_lane_bf16, vgetq_lane_bf16): New.
11419         (vcreate_bf16): New.
11420         (vdup_n_bf16, vdupq_n_bf16): New.
11421         (vdup_lane_bf16, vdup_laneq_bf16): New.
11422         (vdupq_lane_bf16, vdupq_laneq_bf16): New.
11423         (vduph_lane_bf16, vduph_laneq_bf16): New.
11424         (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
11425         (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
11426         (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
11427         (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
11428         (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
11429         (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
11430         (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
11431         (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
11432         (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
11433         (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
11434         (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
11435         (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
11436         (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
11437         (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
11438         (vreinterpretq_bf16_p128): New.
11439         (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
11440         (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
11441         (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
11442         (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
11443         (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
11444         (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
11445         (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
11446         (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
11447         (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
11448         (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
11449         (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
11450         (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
11451         (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
11452         (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
11453         (vreinterpretq_p128_bf16): New.
11454
11455 2020-02-25  Dennis Zhang  <dennis.zhang@arm.com>
11456
11457         * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
11458         (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
11459         (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
11460         * config/arm/arm_neon_builtins.def (vbfdot): New entry.
11461         (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
11462         * config/arm/iterators.md (VSF2BF): New attribute.
11463         * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
11464         (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
11465         (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
11466
11467 2020-02-25  Christophe Lyon  <christophe.lyon@linaro.org>
11468
11469         * config/arm/arm.md (required_for_purecode): New attribute.
11470         (enabled): Handle required_for_purecode.
11471         * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
11472         work with -mpure-code.
11473
11474 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
11475
11476         PR rtl-optimization/93908
11477         * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
11478         with mask.
11479
11480 2019-02-25  Eric Botcazou  <ebotcazou@adacore.com>
11481
11482         * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
11483
11484 2020-02-25  Roman Zhuykov  <zhroma@ispras.ru>
11485
11486         * doc/install.texi (--enable-checking): Adjust wording.
11487
11488 2020-02-25  Richard Biener  <rguenther@suse.de>
11489
11490         PR tree-optimization/93868
11491         * tree-vect-slp.c (slp_copy_subtree): New function.
11492         (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
11493         re-arranging stmts in it.
11494
11495 2020-02-25  Jakub Jelinek  <jakub@redhat.com>
11496
11497         PR middle-end/93874
11498         * passes.c (pass_manager::dump_passes): Create a cgraph node for the
11499         dummy function and remove it at the end.
11500
11501         PR translation/93864
11502         * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
11503         paramter -> parameter.
11504         * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
11505         * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
11506
11507 2020-02-24  Roman Zhuykov  <zhroma@ispras.ru>
11508
11509         * doc/install.texi (--enable-checking): Properly document current
11510         behavior.
11511         (--enable-stage1-checking): Minor clarification about bootstrap.
11512
11513 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
11514
11515         PR analyzer/93032
11516         * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
11517         -fanalyzer-checker=taint is also required.
11518         (-fanalyzer-checker=): Note that providing this option enables the
11519         given checker, and doing so may be required for checkers that are
11520         disabled by default.
11521
11522 2020-02-24  David Malcolm  <dmalcolm@redhat.com>
11523
11524         * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
11525         significant control flow events; add a "3" which shows all
11526         control flow events; the old "3" becomes "4".
11527
11528 2020-02-24  Jakub Jelinek  <jakub@redhat.com>
11529
11530         PR tree-optimization/93582
11531         * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
11532         pd.offset and pd.size to be counted in bits rather than bytes, add
11533         support for maxsizei that is not a multiple of BITS_PER_UNIT and
11534         handle bitfield stores and loads.
11535         (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
11536         uncomparable quantities - bytes vs. bits.  Allow push_partial_def
11537         on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
11538         pd.offset/pd.size to be counted in bits rather than bytes.
11539         Formatting fix.  Rename shadowed len variable to buflen.
11540
11541 2020-02-24  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
11542             Kugan Vivekandarajah  <kugan.vivekanandarajah@linaro.org>
11543
11544         PR driver/47785
11545         * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
11546         (driver::main): Call putenv_COLLECT_AS_OPTIONS.
11547         * opts-common.c (parse_options_from_collect_gcc_options): New function.
11548         (prepend_xassembler_to_collect_as_options): Likewise.
11549         * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
11550         (prepend_xassembler_to_collect_as_options): Likewise.
11551         * lto-opts.c (lto_write_options): Stream assembler options
11552         in COLLECT_AS_OPTIONS.
11553         * lto-wrapper.c (xassembler_options_error): New static variable.
11554         (get_options_from_collect_gcc_options): Move parsing options code to
11555         parse_options_from_collect_gcc_options and call it.
11556         (merge_and_complain): Validate -Xassembler options.
11557         (append_compiler_options): Handle OPT_Xassembler.
11558         (run_gcc): Append command line -Xassembler options to
11559         collect_gcc_options.
11560         * doc/invoke.texi: Add documentation about using Xassembler
11561         options with LTO.
11562
11563 2020-02-24  Kito Cheng  <kito.cheng@sifive.com>
11564
11565         * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
11566         for LTGT.
11567         (riscv_rtx_costs): Update cost model for LTGT.
11568
11569 2020-02-23  Vladimir Makarov  <vmakarov@redhat.com>
11570
11571         PR rtl-optimization/93564
11572         * ira-color.c (struct update_cost_queue_elem): New member start.
11573         (queue_update_cost, get_next_update_cost): Add new arg start.
11574         (allocnos_conflict_p): New function.
11575         (update_costs_from_allocno): Add new arg conflict_cost_update_p.
11576         Add checking conflicts with allocnos_conflict_p.
11577         (update_costs_from_prefs, restore_costs_from_copies): Adjust
11578         update_costs_from_allocno calls.
11579         (update_conflict_hard_regno_costs): Add checking conflicts with
11580         allocnos_conflict_p.  Adjust calls of queue_update_cost and
11581         get_next_update_cost.
11582         (assign_hard_reg): Adjust calls of queue_update_cost.  Add
11583         debugging print.
11584         (bucket_allocno_compare_func): Restore previous version.
11585
11586 2020-02-21  John David Anglin  <danglin@gcc.gnu.org>
11587
11588         * gcc/config/pa/pa.c (pa_function_value): Fix check for word and
11589         double-word size when handling aggregate return values.
11590         * gcc/config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
11591         that homogeneous SFmode and DFmode aggregates are passed and returned
11592         in general registers.
11593
11594 2020-02-21  Jakub Jelinek  <jakub@redhat.com>
11595
11596         PR translation/93759
11597         * opts.c (print_filtered_help): Translate help before appending
11598         messages to it rather than after that.
11599
11600 2020-02-19  Richard Sandiford  <richard.sandiford@arm.com>
11601
11602         PR rtl-optimization/PR92989
11603         * lra-lives.c (process_bb_lives): Restore the original order
11604         of the bb liveness update.  Call make_hard_regno_dead for each
11605         register clobbered at the start of an EH receiver.
11606
11607 2020-02-18  Feng Xue  <fxue@os.amperecomputing.com>
11608
11609         PR ipa/93763
11610         * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
11611         self-recursively generated.
11612
11613 2020-02-21  Iain Sandoe  <iain@sandoe.co.uk>
11614
11615         PR target/93860
11616         * config/darwin-c.c (pop_field_alignment): Adjust quoting of
11617         error string.
11618
11619 2020-02-21  Mihail Ionescu  <mihail.ionescu@arm.com>
11620
11621         * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
11622         Document new target supports option.
11623
11624 2020-02-21  Dennis Zhang  <dennis.zhang@arm.com>
11625
11626         * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
11627         * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
11628         * config/arm/iterators.md (MATMUL): New iterator.
11629         (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
11630         (mmla_sfx): New attribute.
11631         * config/arm/neon.md (neon_<sup>mmlav16qi): New.
11632         * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
11633         (UNSPEC_MATMUL_US): New.
11634
11635 2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
11636
11637         * config/arm/arm.md: Prevent scalar shifts from being used when big
11638         endian is enabled.
11639
11640 2020-02-21  Jan Hubicka  <hubicka@ucw.cz>
11641             Richard Biener  <rguenther@suse.de>
11642
11643         PR tree-optimization/93586
11644         * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
11645         after mismatched array refs; do not sure type size information to
11646         recover from unmatched referneces with !flag_strict_aliasing_p.
11647
11648 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
11649
11650         * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
11651         (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
11652         (scatter_store<mode>): Rename to ...
11653         (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
11654         (scatter<mode>_exec): Delete. Move contents ...
11655         (mask_scatter_store<mode>): ... here, and rename that to ...
11656         (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
11657         Remove mode conversion.
11658         (mask_gather_load<mode>): Rename to ...
11659         (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
11660         Remove mode conversion.
11661         * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
11662
11663 2020-02-21  Martin Jambor  <mjambor@suse.cz>
11664
11665         PR tree-optimization/93845
11666         * tree-sra.c (verify_sra_access_forest): Only test access size of
11667         scalar types.
11668
11669 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
11670
11671         * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
11672         * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
11673         (addv64di3_exec): Likewise.
11674         (subv64di3): Likewise.
11675         (subv64di3_exec): Likewise.
11676         (addv64di3_zext): Likewise.
11677         (addv64di3_zext_exec): Likewise.
11678         (addv64di3_zext_dup): Likewise.
11679         (addv64di3_zext_dup_exec): Likewise.
11680         (addv64di3_zext_dup2): Likewise.
11681         (addv64di3_zext_dup2_exec): Likewise.
11682         (addv64di3_sext_dup2): Likewise.
11683         (addv64di3_sext_dup2_exec): Likewise.
11684         (<expander>v64di3): Likewise.
11685         (<expander>v64di3_exec): Likewise.
11686         (*<reduc_op>_dpp_shr_v64di): Likewise.
11687         (*plus_carry_dpp_shr_v64di): Likewise.
11688         * config/gcn/gcn.md (adddi3): Likewise.
11689         (addptrdi3): Likewise.
11690         (<expander>di3): Likewise.
11691
11692 2020-02-21  Andrew Stubbs  <ams@codesourcery.com>
11693
11694         * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
11695
11696 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
11697
11698         * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
11699         support.  Use aarch64_emit_mult instead of emitting multiplication
11700         instructions directly.
11701         * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
11702         (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
11703
11704 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
11705
11706         * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
11707         (aarch64_emit_approx_div): Add SVE support.  Use aarch64_emit_mult
11708         instead of emitting multiplication instructions directly.
11709         * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
11710         * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
11711         (@aarch64_frecps<mode>): New expanders.
11712
11713 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
11714
11715         * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
11716         on and produce uint64_ts rather than ints.
11717         (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
11718         (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
11719
11720 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
11721
11722         * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
11723         an unused xmsk register when handling approximate rsqrt.
11724
11725 2020-02-21  Richard Sandiford  <richard.sandiford@arm.com>
11726
11727         * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
11728         flag_finite_math_only condition.
11729
11730 2020-02-20  Uroš Bizjak  <ubizjak@gmail.com>
11731
11732         PR target/93828
11733         * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
11734         to destination operand for shufps alternative.
11735         (*vec_extractv2si_1): Ditto.
11736
11737 2020-02-20  Peter Bergner  <bergner@linux.ibm.com>
11738
11739         PR target/93658
11740         * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
11741         vector modes.
11742
11743 2020-02-20  Martin Liska  <mliska@suse.cz>
11744
11745         PR translation/93831
11746         * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
11747
11748 2020-02-20  Martin Liska  <mliska@suse.cz>
11749
11750         PR translation/93830
11751         * common/config/avr/avr-common.c: Remote trailing "|".
11752
11753 2020-02-19  Bernd Edlinger  <bernd.edlinger@hotmail.de>
11754
11755         * collect2.c (maybe_run_lto_and_relink): Fix typo in
11756         comment.
11757
11758 2020-02-19  Richard Sandiford  <richard.sandiford@arm.com>
11759
11760         PR tree-optimization/93767
11761         * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
11762         access-size bias from the offset calculations for negative strides.
11763
11764 2020-02-19  Bernd Edlinger  <bernd.edlinger@hotmail.de>
11765
11766         * collect2.c (c_file, o_file): Make const again.
11767         (ldout,lderrout, dump_ld_file): Remove.
11768         (tool_cleanup): Avoid calling not signal-safe functions.
11769         (maybe_run_lto_and_relink): Avoid possible signal handler
11770         access to unintialzed memory (lto_o_files).
11771         (main): Avoid leaking temp files in $TMPDIR.
11772         Initialize c_file/o_file with concat, which avoids exposing
11773         uninitialized memory to signal handler, which calls unlink(!).
11774         Avoid calling maybe_unlink when the main function returns,
11775         since the atexit handler is already doing this.
11776         * collect2.h (dump_ld_file, ldout, lderrout): Remove.
11777
11778 2020-02-19  Martin Jambor  <mjambor@suse.cz>
11779
11780         PR tree-optimization/93776
11781         * tree-sra.c (create_access): Do not create zero size accesses.
11782         (get_access_for_expr): Do not search for zero sized accesses.
11783
11784 2020-02-19  Martin Jambor  <mjambor@suse.cz>
11785
11786         PR tree-optimization/93667
11787         * tree-sra.c (scalarizable_type_p): Return false if record fields
11788         do not follow wach other.
11789
11790 2020-01-21  Kito Cheng  <kito.cheng@sifive.com>
11791
11792         * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
11793         rather than fmv.x.s/fmv.s.x.
11794
11795 2020-02-18  James Greenhalgh  <james.greenhalgh@arm.com>
11796
11797         * config/aarch64/aarch64-simd-builtins.def
11798         (intrinsic_vec_smult_lo_): New.
11799         (intrinsic_vec_umult_lo_): Likewise.
11800         (vec_widen_smult_hi_): Likewise.
11801         (vec_widen_umult_hi_): Likewise.
11802         * config/aarch64/aarch64-simd.md
11803         (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
11804         * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
11805         (vmull_high_s16): Likewise.
11806         (vmull_high_s32): Likewise.
11807         (vmull_high_u8): Likewise.
11808         (vmull_high_u16): Likewise.
11809         (vmull_high_u32): Likewise.
11810         (vmull_s8): Likewise.
11811         (vmull_s16): Likewise.
11812         (vmull_s32): Likewise.
11813         (vmull_u8): Likewise.
11814         (vmull_u16): Likewise.
11815         (vmull_u32): Likewise.
11816
11817 2020-02-18  Martin Liska  <mliska@suse.cz>
11818
11819         * value-prof.c (stream_out_histogram_value): Restore LTO PGO
11820         bootstrap by missing removal of invalid sanity check.
11821
11822 2020-02-18  Martin Liska  <mliska@suse.cz>
11823
11824         PR ipa/92518
11825         * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
11826         Always compare LHS of gimple_assign.
11827
11828 2020-02-18  Martin Liska  <mliska@suse.cz>
11829
11830         PR ipa/93583
11831         * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
11832         and return type of functions.
11833         * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
11834         Drop MALLOC attribute for void functions.
11835         * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
11836         malloc_state for a new VOID clone.
11837
11838 2020-02-18  Martin Liska  <mliska@suse.cz>
11839
11840         PR ipa/92924
11841         * common.opt: Add -fprofile-reproducibility.
11842         * doc/invoke.texi: Document it.
11843         * value-prof.c (dump_histogram_value):
11844         Document and support behavior for counters[0]
11845         being a negative value.
11846         (get_nth_most_common_value): Handle negative
11847         counters[0] in respect to flag_profile_reproducible.
11848
11849 2020-02-18  Jakub Jelinek  <jakub@redhat.com>
11850
11851         PR ipa/93797
11852         * cgraph.c (verify_speculative_call): Use speculative_id instead of
11853         speculative_uid in messages.  Remove trailing whitespace from error
11854         message.  Use num_speculative_call_targets instead of
11855         num_speculative_targets in a message.
11856         (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
11857         edge messages and stmt instead of cal_stmt in reference message.
11858
11859         PR tree-optimization/93780
11860         * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
11861         before calling build_vector_type.
11862         (execute_update_addresses_taken): Likewise.
11863
11864         PR driver/93796
11865         * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
11866         typo, functoin -> function.
11867         * tree.c (free_lang_data_in_decl): Fix comment typo,
11868         functoin -> function.
11869         * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
11870
11871 2020-02-17  David Malcolm  <dmalcolm@redhat.com>
11872
11873         * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
11874         won't be printed.
11875         (print_option_information): Don't call get_option_url if URLs
11876         won't be printed.
11877
11878 2020-02-17  Alexandre Oliva  <oliva@adacore.com>
11879
11880         * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
11881         handling of register_common-less targets.
11882
11883 2020-02-17  Martin Liska  <mliska@suse.cz>
11884
11885         PR ipa/93760
11886         * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
11887
11888 2020-02-17  Martin Liska  <mliska@suse.cz>
11889
11890         PR translation/93755
11891         * config/rs6000/rs6000.c (rs6000_option_override_internal):
11892         Fix double quotes.
11893
11894 2020-02-17  Martin Liska  <mliska@suse.cz>
11895
11896         PR other/93756
11897         * config/rx/elf.opt: Fix typo.
11898
11899 2020-02-17  Richard Biener  <rguenther@suse.de>
11900
11901         PR c/86134
11902         * opts-global.c (print_ignored_options): Use inform and
11903         amend message.
11904
11905 2020-02-17  Jiufu Guo  <guojiufu@linux.ibm.com>
11906
11907         PR target/93047
11908         * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
11909
11910 2020-02-16  Uroš Bizjak  <ubizjak@gmail.com>
11911
11912         PR target/93743
11913         * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
11914         (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
11915
11916 2020-02-15  Jason Merrill  <jason@redhat.com>
11917
11918         * doc/invoke.texi (C Dialect Options): Add -std=c++20.
11919
11920 2020-02-15  Jakub Jelinek  <jakub@redhat.com>
11921
11922         PR tree-optimization/93744
11923         * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
11924         A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
11925         A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
11926         sure @2 in the first and @1 in the other patterns has no side-effects.
11927
11928 2020-02-15  David Malcolm  <dmalcolm@redhat.com>
11929             Bernd Edlinger  <bernd.edlinger@hotmail.de>
11930
11931         PR 87488
11932         PR other/93168
11933         * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
11934         * configure.ac (--with-diagnostics-urls): New configuration
11935         option, based on --with-diagnostics-color.
11936         (DIAGNOSTICS_URLS_DEFAULT): New define.
11937         * config.h: Regenerate.
11938         * configure: Regenerate.
11939         * diagnostic.c (diagnostic_urls_init): Handle -1 for
11940         DIAGNOSTICS_URLS_DEFAULT from configure-time
11941         --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
11942         and TERM_URLS environment variable.
11943         * diagnostic-url.h (diagnostic_url_format): New enum type.
11944         (diagnostic_urls_enabled_p): rename to...
11945         (determine_url_format): ... this, and change return type.
11946         * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
11947         (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
11948         the linux console, and mingw.
11949         (diagnostic_urls_enabled_p): rename to...
11950         (determine_url_format): ... this, and adjust.
11951         * pretty-print.h (pretty_printer::show_urls): rename to...
11952         (pretty_printer::url_format): ... this, and change to enum.
11953         * pretty-print.c (pretty_printer::pretty_printer,
11954         pp_begin_url, pp_end_url, test_urls): Adjust.
11955         * doc/install.texi (--with-diagnostics-urls): Document the new
11956         configuration option.
11957         (--with-diagnostics-color): Document the existing interaction
11958         with GCC_COLORS better.
11959         * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
11960         vindex reference.  Update description of defaults based on the above.
11961         (-fdiagnostics-color): Update description of how -fdiagnostics-color
11962         interacts with GCC_COLORS.
11963
11964 2020-02-14  Eric Botcazou  <ebotcazou@adacore.com>
11965
11966         PR target/93704
11967         * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
11968         conjunction with TARGET_GNU_TLS in early return.
11969
11970 2020-02-14  Alexander Monakov  <amonakov@ispras.ru>
11971
11972         * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
11973         the mode is not wider than UNITS_PER_WORD.
11974
11975 2020-02-14  Martin Jambor  <mjambor@suse.cz>
11976
11977         PR tree-optimization/93516
11978         * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
11979         access of the same type as the parent.
11980         (propagate_subaccesses_from_lhs): Likewise.
11981
11982 2020-02-14 Hongtao Liu  <hongtao.liu@intel.com>
11983
11984         PR target/93724
11985         * config/i386/avx512vbmi2intrin.h
11986         (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
11987         _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
11988         _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
11989         _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
11990         _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
11991         _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
11992         _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
11993         _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
11994         _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
11995         of lacking a closing parenthesis.
11996         * config/i386/avx512vbmi2vlintrin.h
11997         (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
11998         _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
11999         _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
12000         _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
12001         _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
12002         _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
12003         _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
12004         _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
12005         _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
12006         _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
12007         _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
12008         _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
12009         _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
12010         _m_maskz_shrdi_epi64, _mm_shldi_epi16,
12011         _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
12012         _mm_shldi_epi32, _mm_mask_shldi_epi32,
12013         _mm_maskz_shldi_epi32, _mm_shldi_epi64,
12014         _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
12015
12016 2020-02-13  H.J. Lu  <hongjiu.lu@intel.com>
12017
12018         PR target/93656
12019         * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
12020         the target function entry.
12021
12022 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
12023
12024         * common/config/arc/arc-common.c (arc_option_optimization_table):
12025         Disable if-conversion step when optimized for size.
12026
12027 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
12028
12029         * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
12030         R12-R15 are always in ARCOMPACT16_REGS register class.
12031         * config/arc/arc.opt (mq-class): Deprecate.
12032         * config/arc/constraint.md ("q"): Remove dependency on mq-class
12033         option.
12034         * doc/invoke.texi (mq-class): Update text.
12035         * common/config/arc/arc-common.c (arc_option_optimization_table):
12036         Update list.
12037
12038 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
12039
12040         * config/arc/arc.c (arc_insn_cost): New function.
12041         (TARGET_INSN_COST): Define.
12042         * config/arc/arc.md (cost): New attribute.
12043         (add_n): Use arc_nonmemory_operand.
12044         (ashlsi3_insn): Likewise, also update constraints.
12045         (ashrsi3_insn): Likewise.
12046         (rotrsi3): Likewise.
12047         (add_shift): Likewise.
12048         * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
12049
12050 2020-02-13  Claudiu Zissulescu  <claziss@synopsys.com>
12051
12052         * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
12053         registers.
12054         (umulsidi_600): Likewise.
12055
12056 2020-02-13  Jakub Jelinek  <jakub@redhat.com>
12057
12058         PR target/93696
12059         * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
12060         _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
12061         _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
12062         _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
12063         pass __A to the builtin followed by __W instead of __A followed by
12064         __B.
12065         * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
12066         _mm512_mask_popcnt_epi64): Likewise.
12067         * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
12068         _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
12069         _mm256_mask_popcnt_epi64): Likewise.
12070
12071         PR tree-optimization/93582
12072         * fold-const.h (shift_bytes_in_array_left,
12073         shift_bytes_in_array_right): Declare.
12074         * fold-const.c (shift_bytes_in_array_left,
12075         shift_bytes_in_array_right): New function, moved from
12076         gimple-ssa-store-merging.c, no longer static.
12077         * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
12078         to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
12079         (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
12080         (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
12081         shift_bytes_in_array.
12082         (verify_shift_bytes_in_array): Rename to ...
12083         (verify_shift_bytes_in_array_left): ... this.  Use
12084         shift_bytes_in_array_left instead of shift_bytes_in_array.
12085         (store_merging_c_tests): Call verify_shift_bytes_in_array_left
12086         instead of verify_shift_bytes_in_array.
12087         * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
12088         / native_interpret_expr where the store covers all needed bits,
12089         punt on PDP-endian, otherwise allow all involved offsets and sizes
12090         not to be byte-aligned.
12091
12092         PR target/93673
12093         * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
12094         use const_0_to_255_operand predicate instead of immediate_operand.
12095         (avx512dq_fpclass<mode><mask_scalar_merge_name>,
12096         avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
12097         vgf2p8affineinvqb_<mode><mask_name>,
12098         vgf2p8affineqb_<mode><mask_name>): Drop mode from
12099         const_0_to_255_operand predicated operands.
12100
12101 2020-02-12  Jeff Law  <law@redhat.com>
12102
12103         * config/h8300/h8300.md (comparison shortening peepholes): Use
12104         a mode iterator to merge the HImode and SImode peepholes.
12105
12106 2020-02-12  Jakub Jelinek  <jakub@redhat.com>
12107
12108         PR middle-end/93663
12109         * real.c (is_even): Make static.  Function comment fix.
12110         (is_halfway_below): Make static, don't assert R is not inf/nan,
12111         instead return false for those.  Small formatting fixes.
12112
12113 2020-02-12  Martin Sebor  <msebor@redhat.com>
12114
12115         PR middle-end/93646
12116         * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
12117         (handle_builtin_stxncpy_strncat): ...to this.  Change first argument.
12118         Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
12119         (strlen_check_and_optimize_call): Adjust callee name.
12120
12121 2020-02-12  Jeff Law  <law@redhat.com>
12122
12123         * config/h8300/h8300.md (comparison shortening peepholes): Drop
12124         (and (xor)) variant.  Combine other two into single peephole.
12125
12126 2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
12127
12128         PR rtl-optimization/93565
12129         * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
12130
12131 2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
12132
12133         * config/aarch64/aarch64-simd.md
12134         (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
12135         * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
12136         generating separate ADDV and zero_extend patterns.
12137         * config/aarch64/iterators.md (VDQV_E): New iterator.
12138
12139 2020-02-12  Jeff Law  <law@redhat.com>
12140
12141         * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
12142         expanders, splits, etc.
12143         (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
12144         (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
12145         (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
12146         * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
12147         (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
12148         * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
12149         function prototype.
12150         (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
12151
12152 2020-02-12  Jakub Jelinek  <jakub@redhat.com>
12153
12154         PR target/93670
12155         * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
12156         (avx512vl_vextractf128<mode>): Use it instead of VI48F_256.  Remove
12157         TARGET_AVX512DQ from condition.
12158         (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
12159         instead of <mask_mode512bit_condition> in condition.  If
12160         TARGET_AVX512DQ is false, emit vextract*64x4 instead of
12161         vextract*32x8.
12162         (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
12163         from condition.
12164
12165 2020-02-12  Kewen Lin  <linkw@gcc.gnu.org>
12166
12167         PR target/91052
12168         * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
12169
12170 2020-02-12  Segher Boessenkool  <segher@kernel.crashing.org>
12171
12172         * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
12173         where strlen is more legible.
12174         (rs6000_builtin_vectorized_libmass): Ditto.
12175         (rs6000_print_options_internal): Ditto.
12176
12177 2020-02-11  Martin Sebor  <msebor@redhat.com>
12178
12179         PR tree-optimization/93683
12180         * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
12181
12182 2020-02-11  Michael Meissner  <meissner@linux.ibm.com>
12183
12184         * config/rs6000/predicates.md (cint34_operand): Rename the
12185         -mprefixed-addr option to be -mprefixed.
12186         * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
12187         the -mprefixed-addr option to be -mprefixed.
12188         (OTHER_FUTURE_MASKS): Likewise.
12189         (POWERPC_MASKS): Likewise.
12190         * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
12191         the -mprefixed-addr option to be -mprefixed.  Change error
12192         messages to refer to -mprefixed.
12193         (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
12194         -mprefixed.
12195         (rs6000_legitimate_offset_address_p): Likewise.
12196         (rs6000_mode_dependent_address): Likewise.
12197         (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
12198         "-mprefixed" for target attributes and pragmas.
12199         (address_to_insn_form): Rename the -mprefixed-addr option to be
12200         -mprefixed.
12201         (rs6000_adjust_insn_length): Likewise.
12202         * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
12203         -mprefixed-addr option to be -mprefixed.
12204         (ASM_OUTPUT_OPCODE): Likewise.
12205         * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
12206         -mprefixed-addr option to be -mprefixed.
12207         * config/rs6000/rs6000.opt (-mprefixed): Rename the
12208         -mprefixed-addr option to be prefixed.  Change the option from
12209         being undocumented to being documented.
12210         * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
12211         -mprefixed option.  Update the -mpcrel documentation to mention
12212         -mprefixed.
12213
12214 2020-02-11  Hans-Peter Nilsson  <hp@axis.com>
12215
12216         * ira-conflicts.c (print_hard_reg_set): Correct output for sets
12217         including FIRST_PSEUDO_REGISTER - 1.
12218         * ira-color.c (print_hard_reg_set): Ditto.
12219
12220 2020-02-11  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
12221
12222         * config/arm/arm-builtins.c (enum arm_type_qualifiers):
12223         (USTERNOP_QUALIFIERS): New define.
12224         (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
12225         (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
12226         (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
12227         (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
12228         * config/arm/arm_neon.h (vusdot_s32): New.
12229         (vusdot_lane_s32): New.
12230         (vusdotq_lane_s32): New.
12231         (vsudot_lane_s32): New.
12232         (vsudotq_lane_s32): New.
12233         * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
12234         * config/arm/iterators.md (DOTPROD_I8MM): New.
12235         (sup, opsuffix): Add <us/su>.
12236         * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
12237         * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
12238
12239 2020-02-11  Richard Biener  <rguenther@suse.de>
12240
12241         PR tree-optimization/93661
12242         PR tree-optimization/93662
12243         * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
12244         tree_to_poly_int64.
12245         * tree-sra.c (get_access_for_expr): Likewise.
12246
12247 2020-02-10  Jakub Jelinek  <jakub@redhat.com>
12248
12249         PR target/93637
12250         * config/i386/sse.md (VI_256_AVX2): New mode iterator.
12251         (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
12252         Change condition from TARGET_AVX2 to TARGET_AVX.
12253
12254 2020-02-10  Iain Sandoe  <iain@sandoe.co.uk>
12255
12256         PR other/93641
12257         * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
12258         argument of strncmp.
12259
12260 2020-02-10  Hans-Peter Nilsson  <hp@axis.com>
12261
12262         Try to generate zero-based comparisons.
12263         * config/cris/cris.c (cris_reduce_compare): New function.
12264         * config/cris/cris-protos.h  (cris_reduce_compare): Add prototype.
12265         * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
12266         (cstore<mode>4"): Apply cris_reduce_compare in expanders.
12267
12268 2020-02-10  Richard Earnshaw  <rearnsha@arm.com>
12269
12270         PR target/91913
12271         * config/arm/arm.md (movsi_compare0): Allow SP as a source register
12272         in Thumb state and also as a destination in Arm state.  Add T16
12273         variants.
12274
12275 2020-02-10  Hans-Peter Nilsson  <hp@axis.com>
12276
12277         * md.texi (Define Subst): Match closing paren in example.
12278
12279 2020-02-10  Jakub Jelinek  <jakub@redhat.com>
12280
12281         PR target/58218
12282         PR other/93641
12283         * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
12284         arguments of strncmp.
12285
12286 2020-02-10  Feng Xue  <fxue@os.amperecomputing.com>
12287
12288         PR ipa/93203
12289         * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
12290         but different source value.
12291         (adjust_callers_for_value_intersection): New function.
12292         (gather_edges_for_value): Adjust order of callers to let a
12293         non-self-recursive caller be the first element.
12294         (self_recursive_pass_through_p): Add a new parameter "simple", and
12295         check generalized self-recursive pass-through jump function.
12296         (self_recursive_agg_pass_through_p): Likewise.
12297         (find_more_scalar_values_for_callers_subset): Compute value from
12298         pass-through jump function for self-recursive.
12299         (intersect_with_plats): Cleanup previous implementation code for value
12300         itersection with self-recursive call edge.
12301         (intersect_with_agg_replacements): Likewise.
12302         (intersect_aggregates_with_edge): Deduce value from pass-through jump
12303         function for self-recursive call edge.  Cleanup previous implementation
12304         code for value intersection with self-recursive call edge.
12305         (decide_whether_version_node): Remove dead callers and adjust order
12306         to let a non-self-recursive caller be the first element.
12307
12308 2020-02-09  Uroš Bizjak  <ubizjak@gmail.com>
12309
12310         * recog.c: Move pass_split_before_sched2 code in front of
12311         pass_split_before_regstack.
12312         (pass_data_split_before_sched2): Rename pass to split3 from split4.
12313         (pass_data_split_before_regstack): Rename pass to split4 from split3.
12314         (rest_of_handle_split_before_sched2): Remove.
12315         (pass_split_before_sched2::execute): Unconditionally call
12316         split_all_insns.
12317         (enable_split_before_sched2): New function.
12318         (pass_split_before_sched2::gate): Use enable_split_before_sched2.
12319         (pass_split_before_regstack::gate): Ditto.
12320         * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
12321         Update name check for renamed split4 pass.
12322         * config/sh/sh.c (register_sh_passes): Update pass insertion
12323         point for renamed split4 pass.
12324
12325 2020-02-09  Jakub Jelinek  <jakub@redhat.com>
12326
12327         * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
12328         DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
12329         copying them around between host and target.
12330
12331 2020-02-08  Andrew Pinski  <apinski@marvell.com>
12332
12333         PR target/91927
12334         * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
12335         STRICT_ALIGNMENT also.
12336
12337 2020-02-08  Jim Wilson  <jimw@sifive.com>
12338
12339         PR target/93532
12340         * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
12341
12342 2020-02-08  Uroš Bizjak  <ubizjak@gmail.com>
12343             Jakub Jelinek  <jakub@redhat.com>
12344
12345         PR target/65782
12346         * config/i386/i386.h (CALL_USED_REGISTERS): Make
12347         xmm16-xmm31 call-used even in 64-bit ms-abi.
12348
12349 2020-02-07  Dennis Zhang  <dennis.zhang@arm.com>
12350
12351         * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
12352         (simd_ummla, simd_usmmla): Likewise.
12353         * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
12354         * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
12355         (vusmmlaq_s32): New.
12356
12357 2020-02-07  Richard Biener  <rguenther@suse.de>
12358
12359         PR middle-end/93519
12360         * tree-inline.c (fold_marked_statements): Do a PRE walk,
12361         skipping unreachable regions.
12362         (optimize_inline_calls): Skip folding stmts when we didn't
12363         inline.
12364
12365 2020-02-07  H.J. Lu  <hongjiu.lu@intel.com>
12366
12367         PR target/85667
12368         * config/i386/i386.c (function_arg_ms_64): Add a type argument.
12369         Don't return aggregates with only SFmode and DFmode in SSE
12370         register.
12371         (ix86_function_arg): Pass arg.type to function_arg_ms_64.
12372
12373 2020-02-07  Jakub Jelinek  <jakub@redhat.com>
12374
12375         PR target/93122
12376         * config/rs6000/rs6000-logue.c
12377         (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
12378         if it fails, move rs into end_addr and retry.  Add
12379         REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
12380         the insn pattern doesn't describe well what exactly happens to
12381         dwarf2cfi.c.
12382
12383         PR target/93594
12384         * config/i386/predicates.md (avx_identity_operand): Remove.
12385         * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
12386         (avx_<castmode><avxsizesuffix>_<castmode>,
12387         avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
12388         a VEC_CONCAT of the operand and UNSPEC_CAST.
12389         (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
12390         a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
12391         UNSPEC_CAST.
12392
12393         PR target/93611
12394         * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
12395         recog_data.insn if distance_non_agu_define changed it.
12396
12397 2020-02-06  Michael Meissner  <meissner@linux.ibm.com>
12398
12399         PR target/93569
12400         * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
12401         we only had X-FORM (reg+reg) addressing for vectors.  Also before
12402         ISA 3.0, we only had X-FORM addressing for scalars in the
12403         traditional Altivec registers.
12404
12405 2020-02-06  <zhongyunde@huawei.com>
12406             Vladimir Makarov  <vmakarov@redhat.com>
12407
12408         PR rtl-optimization/93561
12409         * lra-assigns.c (spill_for): Check that tested hard regno is not out of
12410         hard register range.
12411
12412 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
12413
12414         * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
12415         attribute.
12416
12417 2020-02-06  Segher Boessenkool  <segher@kernel.crashing.org>
12418
12419         * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
12420         where the low and the high 32 bits are equal to each other specially,
12421         with an rldimi instruction.
12422
12423 2020-02-06  Mihail Ionescu  <mihail.ionescu@arm.com>
12424
12425         * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
12426
12427 2020-02-06  Mihail Ionescu  <mihail.ionescu@arm.com>
12428
12429         * config/arm/arm-tables.opt: Regenerate.
12430
12431 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
12432
12433         PR target/87763
12434         * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
12435         * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
12436         * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
12437
12438 2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>
12439
12440         PR rtl-optimization/87763
12441         * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
12442
12443 2020-02-06  Delia Burduv  <delia.burduv@arm.com>
12444
12445         * config/aarch64/aarch64-simd-builtins.def
12446         (bfmlaq): New built-in function.
12447         (bfmlalb): New built-in function.
12448         (bfmlalt): New built-in function.
12449         (bfmlalb_lane): New built-in function.
12450         (bfmlalt_lane): New built-in function.
12451         * config/aarch64/aarch64-simd.md
12452         (aarch64_bfmmlaqv4sf): New pattern.
12453         (aarch64_bfmlal<bt>v4sf): New pattern.
12454         (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
12455         * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
12456         (vbfmlalbq_f32): New intrinsic.
12457         (vbfmlaltq_f32): New intrinsic.
12458         (vbfmlalbq_lane_f32): New intrinsic.
12459         (vbfmlaltq_lane_f32): New intrinsic.
12460         (vbfmlalbq_laneq_f32): New intrinsic.
12461         (vbfmlaltq_laneq_f32): New intrinsic.
12462         * config/aarch64/iterators.md (BF_MLA): New int iterator.
12463         (bt): New int attribute.
12464
12465 2020-02-06  Uroš Bizjak  <ubizjak@gmail.com>
12466
12467         * config/i386/i386.md (*pushtf): Emit "#" instead of
12468         calling gcc_unreachable in insn output.
12469         (*pushxf): Ditto.
12470         (*pushdf): Ditto.
12471         (*pushsf_rex64): Ditto for alternatives other than 1.
12472         (*pushsf): Ditto for alternatives other than 1.
12473
12474 2020-02-06  Martin Liska  <mliska@suse.cz>
12475
12476         PR gcov-profile/91971
12477         PR gcov-profile/93466
12478         * coverage.c (coverage_init): Revert mangling of
12479         path into filename.  It can lead to huge filename length.
12480         Creation of subfolders seem more natural.
12481
12482 2020-02-06  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
12483
12484         PR target/93300
12485         * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
12486         (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
12487         Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
12488
12489 2020-02-06  Jakub Jelinek  <jakub@redhat.com>
12490
12491         PR target/93594
12492         * config/i386/predicates.md (avx_identity_operand): New predicate.
12493         * config/i386/sse.md (*avx_vec_concat<mode>_1): New
12494         define_insn_and_split.
12495
12496         PR libgomp/93515
12497         * omp-low.c (use_pointer_for_field): For nested constructs, also
12498         look for map clauses on target construct.
12499         (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
12500         taskreg_nesting_level.
12501
12502         PR libgomp/93515
12503         * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
12504         shared clause, call omp_notice_variable on outer context if any.
12505
12506 2020-02-05  Jason Merrill  <jason@redhat.com>
12507
12508         PR c++/92003
12509         * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
12510         non-zero address even if weak and not yet defined.
12511
12512 2020-02-05  Martin Sebor  <msebor@redhat.com>
12513
12514         PR tree-optimization/92765
12515         * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
12516         * tree-ssa-strlen.c (compute_string_length): Remove.
12517         (determine_min_objsize): Remove.
12518         (get_len_or_size): Add an argument.  Call get_range_strlen_dynamic.
12519         Avoid using type size as the upper bound on string length.
12520         (handle_builtin_string_cmp): Add an argument.  Adjust.
12521         (strlen_check_and_optimize_call): Pass additional argument to
12522         handle_builtin_string_cmp.
12523
12524 2020-02-05  Uroš Bizjak  <ubizjak@gmail.com>
12525
12526         * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
12527         (*pushdi2_rex64 peephole2): Unconditionally split after
12528         epilogue_completed.
12529         (*ashl<mode>3_doubleword): Ditto.
12530         (*<shift_insn><mode>3_doubleword): Ditto.
12531
12532 2020-02-05  Michael Meissner  <meissner@linux.ibm.com>
12533
12534         PR target/93568
12535         * config/rs6000/rs6000.c (get_vector_offset): Fix
12536
12537 2020-02-05  Andrew Stubbs  <ams@codesourcery.com>
12538
12539         * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
12540
12541 2020-02-05  David Malcolm  <dmalcolm@redhat.com>
12542
12543         * doc/analyzer.texi
12544         (Special Functions for Debugging the Analyzer): Update description
12545         of __analyzer_dump_exploded_nodes.
12546
12547 2020-02-05  Jakub Jelinek  <jakub@redhat.com>
12548
12549         PR target/92190
12550         * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
12551         include sets and not clobbers in the vzeroupper pattern.
12552         * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
12553         the parallel has 17 (64-bit) or 9 (32-bit) elts.
12554         (*avx_vzeroupper_1): New define_insn_and_split.
12555
12556         PR target/92190
12557         * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
12558         don't run when !optimize.
12559         (pass_split_before_regstack::gate): For STACK_REGS targets, run even
12560         when !optimize.
12561
12562 2020-02-05  Richard Biener  <rguenther@suse.de>
12563
12564         PR middle-end/90648
12565         * genmatch.c (dt_node::gen_kids_1): Emit number of argument
12566         checks before matching calls.
12567
12568 2020-02-05  Jakub Jelinek  <jakub@redhat.com>
12569
12570         * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
12571         function comment typo.
12572
12573         PR middle-end/93555
12574         * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
12575         simd_clone_create failed when i == 0, adjust clone->nargs by
12576         clone->inbranch.
12577
12578 2020-02-05  Martin Liska  <mliska@suse.cz>
12579
12580         PR c++/92717
12581         * doc/invoke.texi: Document that one should
12582         not combine ASLR and -fpch.
12583
12584 2020-02-04  Richard Biener  <rguenther@suse.de>
12585
12586         PR tree-optimization/93538
12587         * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
12588
12589 2020-02-04  Richard Biener  <rguenther@suse.de>
12590
12591         PR tree-optimization/91123
12592         * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
12593         (vn_walk_cb_data::last_vuse): New member.
12594         (vn_walk_cb_data::saved_operands): Likewsie.
12595         (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
12596         (vn_walk_cb_data::push_partial_def): Use finish.
12597         (vn_reference_lookup_2): Update last_vuse and use finish if
12598         we've saved operands.
12599         (vn_reference_lookup_3): Use finish and update calls to
12600         push_partial_defs everywhere.  When translating through
12601         memcpy or aggregate copies save off operands and alias-set.
12602         (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
12603         operation for redundant store removal.
12604
12605 2020-02-04  Richard Biener  <rguenther@suse.de>
12606
12607         PR tree-optimization/92819
12608         * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
12609         generating more stmts than before.
12610
12611 2020-02-04  Martin Liska  <mliska@suse.cz>
12612
12613         * config/arm/arm.c (arm_gen_far_branch): Move the function
12614         outside of selftests.
12615
12616 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
12617
12618         * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
12619         function to adjust PC-relative vector addresses.
12620         (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
12621         handle vectors with PC-relative addresses.
12622
12623 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
12624
12625         * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
12626         reference.
12627         (hard_reg_and_mode_to_addr_mask): Delete.
12628         (rs6000_adjust_vec_address): If the original vector address
12629         was REG+REG or REG+OFFSET and the element is not zero, do the add
12630         of the elements in the original address before adding the offset
12631         for the vector element.  Use address_to_insn_form to validate the
12632         address using the register being loaded, rather than guessing
12633         whether the address is a DS-FORM or DQ-FORM address.
12634
12635 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
12636
12637         * config/rs6000/rs6000.c (get_vector_offset): New helper function
12638         to calculate the offset in memory from the start of a vector of a
12639         particular element.  Add code to keep the element number in
12640         bounds if the element number is variable.
12641         (rs6000_adjust_vec_address): Move calculation of offset of the
12642         vector element to get_vector_offset.
12643         (rs6000_split_vec_extract_var): Do not do the initial AND of
12644         element here, move the code to get_vector_offset.
12645
12646 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
12647
12648         * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
12649         gcc_asserts.
12650
12651 2020-02-03  Segher Boessenkool  <segher@kernel.crashing.org>
12652
12653         * config/rs6000/constraints.md: Improve documentation.
12654
12655 2020-02-03  Richard Earnshaw  <rearnsha@arm.com>
12656
12657         PR target/93548
12658         * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
12659         ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
12660
12661 2020-02-03  Andrew Stubbs  <ams@codesourcery.com>
12662
12663         * config.gcc: Remove "carrizo" support.
12664         * config/gcn/gcn-opts.h (processor_type): Likewise.
12665         * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
12666         * config/gcn/gcn.opt (gpu_type): Likewise.
12667         * config/gcn/t-omp-device: Likewise.
12668
12669 2020-02-03  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
12670
12671         PR target/91816
12672         * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
12673         * config/arm/arm.c (arm_gen_far_branch): New function
12674         arm_gen_far_branch.
12675         * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
12676
12677 2020-02-03  Julian Brown  <julian@codesourcery.com>
12678             Tobias Burnus  <tobias@codesourcery.com>
12679
12680         * doc/invoke.texi: Update mention of OpenACC version to 2.6.
12681
12682 2020-02-03  Jakub Jelinek  <jakub@redhat.com>
12683
12684         PR target/93533
12685         * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
12686         valid RTL to sum up the lowest and second lowest bytes of the popcnt
12687         result.
12688
12689 2020-02-02  Vladimir Makarov  <vmakarov@redhat.com>
12690
12691         PR rtl-optimization/91333
12692         * ira-color.c (struct allocno_color_data): Add member
12693         hard_reg_prefs.
12694         (init_allocno_threads): Set the member up.
12695         (bucket_allocno_compare_func): Add compare hard reg
12696         prefs.
12697
12698 2020-01-31  Sandra Loosemore  <sandra@codesourcery.com>
12699
12700         nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
12701
12702         * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
12703         * config.in: Regenerated.
12704         * configure: Regenerated.
12705         * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
12706         for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
12707         (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
12708
12709 2020-02-01  Andrew Burgess  <andrew.burgess@embecosm.com>
12710
12711         * configure: Regenerate.
12712
12713 2020-01-31  Vladimir Makarov  <vmakarov@redhat.com>
12714
12715         PR rtl-optimization/91333
12716         * ira-color.c (bucket_allocno_compare_func): Move conflict hard
12717         reg preferences comparison up.
12718
12719 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
12720
12721         * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
12722         * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
12723         aarch64-sve-builtins-base.h.
12724         * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
12725         aarch64-sve-builtins-base.cc.
12726         * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
12727         (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12728         (svcvtnt): Declare.
12729         * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
12730         (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12731         (svcvtnt): New functions.
12732         * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
12733         (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12734         (svcvtnt): New functions.
12735         (svcvt): Add a form that converts f32 to bf16.
12736         * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
12737         (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
12738         Declare.
12739         * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
12740         Treat B as bfloat16_t.
12741         (ternary_bfloat_lane_base): New class.
12742         (ternary_bfloat_def): Likewise.
12743         (ternary_bfloat): New shape.
12744         (ternary_bfloat_lane_def): New class.
12745         (ternary_bfloat_lane): New shape.
12746         (ternary_bfloat_lanex2_def): New class.
12747         (ternary_bfloat_lanex2): New shape.
12748         (ternary_bfloat_opt_n_def): New class.
12749         (ternary_bfloat_opt_n): New shape.
12750         * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
12751         * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
12752         (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
12753         (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
12754         (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
12755         (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
12756         (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
12757         * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
12758         the pattern off the narrow mode instead of the wider one.
12759         * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
12760         (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
12761         (sve_fp_op): Handle them.
12762         (SVE_BFLOAT_TERNARY_LONG): New int itertor.
12763         (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
12764
12765 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
12766
12767         * config/aarch64/arm_sve.h: Include arm_bf16.h.
12768         * config/aarch64/aarch64-modes.def (BF): Move definition before
12769         VECTOR_MODES.  Remove separate VECTOR_MODES for V4BF and V8BF.
12770         (SVE_MODES): Handle BF modes.
12771         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
12772         BF modes.
12773         (aarch64_full_sve_mode): Likewise.
12774         * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
12775         and VNx32BF.
12776         (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
12777         (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
12778         (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
12779         (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
12780         new SVE BF modes.
12781         * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
12782         type_class_index.
12783         * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
12784         (TYPES_all_data): Add bf16.
12785         (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
12786         (register_tuple_type): Increase buffer size.
12787         * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
12788         (bf16): New type suffix.
12789         * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
12790         (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
12791         (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
12792         Change type from all_data to all_arith.
12793         * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
12794         (svminp): Likewise.
12795
12796 2020-01-31  Dennis Zhang  <dennis.zhang@arm.com>
12797             Matthew Malcomson  <matthew.malcomson@arm.com>
12798             Richard Sandiford  <richard.sandiford@arm.com>
12799
12800         * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
12801         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
12802         __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
12803         __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate.  Don't define
12804         __ARM_FEATURE_MATMUL_FP64.
12805         * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
12806         (sve): Add AARCH64_FL_F32MM to the list of extensions that should
12807         be disabled at the same time.
12808         (f32mm): New extension.
12809         * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
12810         (AARCH64_FL_F64MM): Bump to the next bit up.
12811         (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
12812         (TARGET_SVE_F64MM): New macros.
12813         * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
12814         (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
12815         (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
12816         (UNSPEC_ZIP2Q): New unspeccs.
12817         (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
12818         (optab, sur, perm_insn): Handle the new unspecs.
12819         (sve_fp_op): Handle UNSPEC_FMMLA.  Resort.
12820         * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
12821         TARGET_SVE_F64MM instead of separate tests.
12822         (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
12823         (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
12824         (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
12825         (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
12826         (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
12827         * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
12828         (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
12829         (TYPES_s_signed): New macro.
12830         (TYPES_s_integer): Use it.
12831         (TYPES_d_float): New macro.
12832         (TYPES_d_data): Use it.
12833         * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
12834         (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
12835         (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
12836         * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
12837         (svmmla): New shape.
12838         (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
12839         template parameters.
12840         (ternary_resize2_lane_base): Likewise.
12841         (ternary_resize2_base): New class.
12842         (ternary_qq_lane_base): Likewise.
12843         (ternary_intq_uintq_lane_def): Likewise.
12844         (ternary_intq_uintq_lane): New shape.
12845         (ternary_intq_uintq_opt_n_def): New class
12846         (ternary_intq_uintq_opt_n): New shape.
12847         (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
12848         (ternary_uintq_intq_def): New class.
12849         (ternary_uintq_intq): New shape.
12850         (ternary_uintq_intq_lane_def): New class.
12851         (ternary_uintq_intq_lane): New shape.
12852         (ternary_uintq_intq_opt_n_def): New class.
12853         (ternary_uintq_intq_opt_n): New shape.
12854         * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
12855         (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
12856         (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
12857         * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
12858         Generalize to...
12859         (svdotprod_lane_impl): ...this new class.
12860         (svmmla_impl, svusdot_impl): New classes.
12861         (svdot_lane): Update to use svdotprod_lane_impl.
12862         (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
12863         (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
12864         functions.
12865         * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
12866         function, with no types defined.
12867         (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
12868         AARCH64_FL_I8MM functions.
12869         (svmmla): New AARCH64_FL_F32MM function.
12870         (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
12871         (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
12872         AARCH64_FL_F64MM function.
12873         (REQUIRED_EXTENSIONS):
12874
12875 2020-01-31  Andrew Stubbs  <ams@codesourcery.com>
12876
12877         * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
12878         alternative only.
12879
12880 2020-01-31  Uroš Bizjak  <ubizjak@gmail.com>
12881
12882         * config/i386/i386.md (*movoi_internal_avx): Do not check for
12883         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.  Remove MODE_V8SF handling.
12884         (*movti_internal): Do not check for
12885         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
12886         (*movtf_internal): Move check for TARGET_SSE2 and size optimization
12887         just after check for TARGET_AVX.
12888         (*movdf_internal): Ditto.
12889         * config/i386/mmx.md (*mov<mode>_internal): Do not check for
12890         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
12891         * config/i386/sse.md (mov<mode>_internal): Only check
12892         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode.  Move check
12893         for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
12894         (<sse>_andnot<mode>3<mask_name>): Move check for
12895         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
12896         (<code><mode>3<mask_name>): Ditto.
12897         (*andnot<mode>3): Ditto.
12898         (*andnottf3): Ditto.
12899         (*<code><mode>3): Ditto.
12900         (*<code>tf3): Ditto.
12901         (*andnot<VI:mode>3): Remove
12902         TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
12903         (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
12904         (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
12905         (sse4_1_blendv<ssemodesuffix>): Ditto.
12906         * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
12907         Explain that tune applies to 128bit instructions only.
12908
12909 2020-01-31  Kwok Cheung Yeung  <kcy@codesourcery.com>
12910
12911         * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
12912         to definition of hsa_kernel_description.  Parse assembly to find SGPR
12913         and VGPR count of kernel and store in hsa_kernel_description.
12914
12915 2020-01-31  Tamar Christina  <tamar.christina@arm.com>
12916
12917         PR rtl-optimization/91838
12918         * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
12919         to truncate if allowed or reject combination.
12920
12921 2020-01-31  Andrew Stubbs  <ams@codesourcery.com>
12922
12923         * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
12924         (find_inv_vars_cb): Likewise.
12925
12926 2020-01-31  David Malcolm  <dmalcolm@redhat.com>
12927
12928         * calls.c (special_function_p): Split out the check for DECL_NAME
12929         being non-NULL and fndecl being extern at file scope into a
12930         new maybe_special_function_p and call it.  Drop check for fndecl
12931         being non-NULL that was after a usage of DECL_NAME (fndecl).
12932         * tree.h (maybe_special_function_p): New inline function.
12933
12934 2020-01-30  Andrew Stubbs  <ams@codesourcery.com>
12935
12936         * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
12937         (mask_gather_load<mode>): ... here, and zero-initialize the
12938         destination.
12939         (maskload<mode>di): Zero-initialize the destination.
12940         * config/gcn/gcn.c:
12941
12942 2020-01-30  David Malcolm  <dmalcolm@redhat.com>
12943
12944         PR analyzer/93356
12945         * doc/analyzer.texi (Limitations): Note that constraints on
12946         floating-point values are currently ignored.
12947
12948 2020-01-30  Jakub Jelinek  <jakub@redhat.com>
12949
12950         PR lto/93384
12951         * symtab.c (symtab_node::noninterposable_alias): If localalias
12952         already exists, but is not usable, append numbers after it until
12953         a unique name is found.  Formatting fix.
12954
12955         PR middle-end/93505
12956         * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
12957         rotate counts.
12958
12959 2020-01-30  Andrew Stubbs  <ams@codesourcery.com>
12960
12961         * config/gcn/gcn.c (print_operand): Handle LTGT.
12962         * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
12963
12964 2020-01-30  Richard Biener  <rguenther@suse.de>
12965
12966         * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
12967         and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
12968
12969 2020-01-30  John David Anglin  <danglin@gcc.gnu.org>
12970
12971         * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
12972         without a DECL in .data.rel.ro.local.
12973
12974 2020-01-30  Jakub Jelinek  <jakub@redhat.com>
12975
12976         PR target/93494
12977         * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
12978         returned.
12979
12980         PR target/91824
12981         * config/i386/sse.md
12982         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
12983         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this.  Use
12984         any_extend code iterator instead of always zero_extend.
12985         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
12986         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
12987         Use any_extend code iterator instead of always zero_extend.
12988         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
12989         (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
12990         Use any_extend code iterator instead of always zero_extend.
12991         (*sse2_pmovmskb_ext): New define_insn.
12992         (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
12993
12994         PR target/91824
12995         * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
12996         (*popcountsi2_zext_falsedep): New define_insn.
12997
12998 2020-01-30  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
12999
13000         * config.in: Regenerated.
13001         * configure: Regenerated.
13002
13003 2020-01-29  Tobias Burnus  <tobias@codesourcery.com>
13004
13005         PR bootstrap/93409
13006         * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
13007         LLVM's assembler changed the default in version 9.
13008
13009 2020-01-24  Jeff Law  <law@redhat.com>
13010
13011         PR tree-optimization/89689
13012         * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
13013
13014 2020-01-29  Richard Sandiford  <richard.sandiford@arm.com>
13015
13016         Revert:
13017
13018         2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
13019
13020         PR rtl-optimization/87763
13021         * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
13022         simplification to handle subregs as well as bare regs.
13023         * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
13024
13025 2020-01-29  Joel Hutton  <Joel.Hutton@arm.com>
13026
13027         PR target/93221
13028         * ira.c (ira): Revert use of simplified LRA algorithm.
13029
13030 2020-01-29  Martin Jambor  <mjambor@suse.cz>
13031
13032         PR tree-optimization/92706
13033         * tree-sra.c (struct access): Fields first_link, last_link,
13034         next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
13035         next_rhs_queued and grp_rhs_queued respectively, new fields
13036         first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
13037         (struct assign_link): Field next renamed to next_rhs, new field
13038         next_lhs.  Updated comment.
13039         (work_queue_head): Renamed to rhs_work_queue_head.
13040         (lhs_work_queue_head): New variable.
13041         (add_link_to_lhs): New function.
13042         (relink_to_new_repr): Also relink LHS lists.
13043         (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
13044         (add_access_to_lhs_work_queue): New function.
13045         (pop_access_from_work_queue): Renamed to
13046         pop_access_from_rhs_work_queue.
13047         (pop_access_from_lhs_work_queue): New function.
13048         (build_accesses_from_assign): Also add links to LHS lists and to LHS
13049         work_queue.
13050         (child_would_conflict_in_lacc): Renamed to
13051         child_would_conflict_in_acc.  Adjusted parameter names.
13052         (create_artificial_child_access): New parameter set_grp_read, use it.
13053         (subtree_mark_written_and_enqueue): Renamed to
13054         subtree_mark_written_and_rhs_enqueue.
13055         (propagate_subaccesses_across_link): Renamed to
13056         propagate_subaccesses_from_rhs.
13057         (propagate_subaccesses_from_lhs): New function.
13058         (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
13059         RHSs.
13060
13061 2020-01-29  Martin Jambor  <mjambor@suse.cz>
13062
13063         PR tree-optimization/92706
13064         * tree-sra.c (struct access): Adjust comment of
13065         grp_total_scalarization.
13066         (find_access_in_subtree): Look for single children spanning an entire
13067         access.
13068         (scalarizable_type_p): Allow register accesses, adjust callers.
13069         (completely_scalarize): Remove function.
13070         (scalarize_elem): Likewise.
13071         (create_total_scalarization_access): Likewise.
13072         (sort_and_splice_var_accesses): Do not track total scalarization
13073         flags.
13074         (analyze_access_subtree): New parameter totally, adjust to new meaning
13075         of grp_total_scalarization.
13076         (analyze_access_trees): Pass new parameter to analyze_access_subtree.
13077         (can_totally_scalarize_forest_p): New function.
13078         (create_total_scalarization_access): Likewise.
13079         (create_total_access_and_reshape): Likewise.
13080         (total_should_skip_creating_access): Likewise.
13081         (totally_scalarize_subtree): Likewise.
13082         (analyze_all_variable_accesses): Perform total scalarization after
13083         subaccess propagation using the new functions above.
13084         (initialize_constant_pool_replacements): Output initializers by
13085         traversing the access tree.
13086
13087 2020-01-29  Martin Jambor  <mjambor@suse.cz>
13088
13089         * tree-sra.c (verify_sra_access_forest): New function.
13090         (verify_all_sra_access_forests): Likewise.
13091         (create_artificial_child_access): Set parent.
13092         (analyze_all_variable_accesses): Call the verifier.
13093
13094 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
13095
13096         * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
13097         if called on indirect edge.
13098         (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
13099         speculative call if needed.
13100
13101 2020-01-29  Richard Biener  <rguenther@suse.de>
13102
13103         PR tree-optimization/93428
13104         * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
13105         permutation when the load node is created.
13106         (vect_analyze_slp_instance): Re-use it here.
13107
13108 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
13109
13110         * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
13111
13112 2020-01-28  Vladimir Makarov  <vmakarov@redhat.com>
13113
13114         PR rtl-optimization/93272
13115         * ira-lives.c (process_out_of_region_eh_regs): New function.
13116         (process_bb_node_lives): Call it.
13117
13118 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
13119
13120         * coverage.c (read_counts_file): Make error message lowercase.
13121
13122 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
13123
13124         * profile-count.c (profile_quality_display_names): Fix ordering.
13125
13126 2020-01-28  Jan Hubicka  <hubicka@ucw.cz>
13127
13128         PR lto/93318
13129         * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
13130         hash only when edge is first within the sequence.
13131         (cgraph_edge::set_call_stmt): Update handling of speculative calls.
13132         (symbol_table::create_edge): Do not set target_prob.
13133         (cgraph_edge::remove_caller): Watch for speculative calls when updating
13134         the call site hash.
13135         (cgraph_edge::make_speculative): Drop target_prob parameter.
13136         (cgraph_edge::speculative_call_info): Remove.
13137         (cgraph_edge::first_speculative_call_target): New member function.
13138         (update_call_stmt_hash_for_removing_direct_edge): New function.
13139         (cgraph_edge::resolve_speculation): Rewrite to new API.
13140         (cgraph_edge::speculative_call_for_target): New member function.
13141         (cgraph_edge::make_direct): Rewrite to new API; fix handling of
13142         multiple speculation targets.
13143         (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
13144         of profile.
13145         (verify_speculative_call): Verify that targets form an interval.
13146         * cgraph.h (cgraph_edge::speculative_call_info): Remove.
13147         (cgraph_edge::first_speculative_call_target): New member function.
13148         (cgraph_edge::next_speculative_call_target): New member function.
13149         (cgraph_edge::speculative_call_target_ref): New member function.
13150         (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
13151         (cgraph_edge): Remove target_prob.
13152         * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
13153         Fix handling of speculative calls.
13154         * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
13155         * ipa-fnsummary.c (analyze_function_body): Likewise.
13156         * ipa-inline.c (speculation_useful_p): Use new speculative call API.
13157         * ipa-profile.c (dump_histogram): Fix formating.
13158         (ipa_profile_generate_summary): Watch for overflows.
13159         (ipa_profile): Do not require probablity to be 1/2; update to new API.
13160         * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
13161         (update_indirect_edges_after_inlining): Update to new API.
13162         * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
13163         profiles.
13164         * profile-count.h: (profile_probability::adjusted): New.
13165         * tree-inline.c (copy_bb): Update to new speculative call API; fix
13166         updating of profile.
13167         * value-prof.c (gimple_ic_transform): Rename to ...
13168         (dump_ic_profile): ... this one; update dumping.
13169         (stream_in_histogram_value): Fix formating.
13170         (gimple_value_profile_transformations): Update.
13171
13172 2020-01-28  H.J. Lu  <hongjiu.lu@intel.com>
13173
13174         PR target/91461
13175         * config/i386/i386.md (*movoi_internal_avx): Remove
13176         TARGET_SSE_TYPELESS_STORES check.
13177         (*movti_internal): Prefer TARGET_AVX over
13178         TARGET_SSE_TYPELESS_STORES.
13179         (*movtf_internal): Likewise.
13180         * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
13181         TARGET_SSE_TYPELESS_STORES.  Remove "<MODE_SIZE> == 16" check
13182         from TARGET_SSE_TYPELESS_STORES.
13183
13184 2020-01-28  David Malcolm  <dmalcolm@redhat.com>
13185
13186         * diagnostic-core.h (warning_at): Rename overload to...
13187         (warning_meta): ...this.
13188         (emit_diagnostic_valist): Delete decl of overload taking
13189         diagnostic_metadata.
13190         * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
13191         (warning_at): Rename overload taking diagnostic_metadata to...
13192         (warning_meta): ...this.
13193
13194 2020-01-28  Richard Biener  <rguenther@suse.de>
13195
13196         PR tree-optimization/93439
13197         * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
13198         * tree-cfg.c (move_sese_region_to_fn): ... here.
13199         (verify_types_in_gimple_reference): Verify used cliques are
13200         tracked.
13201
13202 2020-01-28  H.J. Lu  <hongjiu.lu@intel.com>
13203
13204         PR target/91399
13205         * config/i386/i386-options.c (set_ix86_tune_features): Add an
13206         argument of a pointer to struct gcc_options and pass it to
13207         parse_mtune_ctrl_str.
13208         (ix86_function_specific_restore): Pass opts to
13209         set_ix86_tune_features.
13210         (ix86_option_override_internal): Likewise.
13211         (parse_mtune_ctrl_str): Add an argument of a pointer to struct
13212         gcc_options and use it for x_ix86_tune_ctrl_string.
13213
13214 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
13215
13216         PR rtl-optimization/87763
13217         * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
13218         simplification to handle subregs as well as bare regs.
13219         * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
13220
13221 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
13222
13223         * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
13224         for reduction chains that (now) include a call.
13225
13226 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
13227
13228         PR tree-optimization/92822
13229         * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
13230         out the don't-care elements of a vector whose significant elements
13231         are duplicates, make the don't-care elements duplicates too.
13232
13233 2020-01-28  Richard Sandiford  <richard.sandiford@arm.com>
13234
13235         PR tree-optimization/93434
13236         * tree-predcom.c (split_data_refs_to_components): Record which
13237         components have had aliasing loads removed.  Prevent store-store
13238         commoning for all such components.
13239
13240 2020-01-28  Jakub Jelinek  <jakub@redhat.com>
13241
13242         PR target/93418
13243         * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
13244         -1 or is_vshift is true, use new_vector with number of elts npatterns
13245         rather than new_unary_operation.
13246
13247         PR tree-optimization/93454
13248         * gimple-fold.c (fold_array_ctor_reference): Perform
13249         elt_size.to_uhwi () just once, instead of calling it in every
13250         iteration.  Punt if that value is above size of the temporary
13251         buffer.  Decrease third native_encode_expr argument when
13252         bufoff + elt_sz is above size of buf.
13253
13254 2020-01-27  Joseph Myers  <joseph@codesourcery.com>
13255
13256         * config/mips/mips.c (mips_declare_object_name)
13257         [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
13258
13259 2020-01-27  Martin Liska  <mliska@suse.cz>
13260
13261         PR gcov-profile/93403
13262         * tree-profile.c (gimple_init_gcov_profiler): Generate
13263         both __gcov_indirect_call_profiler_v4 and
13264         __gcov_indirect_call_profiler_v4_atomic.
13265
13266 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
13267
13268         PR target/92822
13269         * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
13270         expander.
13271         (@aarch64_split_simd_mov<mode>): Use it.
13272         (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
13273         Leave the vec_extract patterns to handle 2-element vectors.
13274         (aarch64_simd_mov_from_<mode>high): Likewise.
13275         (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
13276         (vec_extractv2dfv1df): Likewise.
13277
13278 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
13279
13280         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
13281         jump conditions for *compare_condjump<GPI:mode>.
13282
13283 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
13284
13285         PR analyzer/93276
13286         * digraph.cc (test_edge::test_edge): Specify template for base
13287         class initializer.
13288
13289 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
13290
13291         * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
13292
13293 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
13294
13295         * config/arc/arc-protos.h (gen_mlo): Remove.
13296         (gen_mhi): Likewise.
13297         * config/arc/arc.c (AUX_MULHI): Define.
13298         (arc_must_save_reister): Special handling for r58/59.
13299         (arc_compute_frame_size): Consider mlo/mhi registers.
13300         (arc_save_callee_saves): Emit fp/sp move only when emit_move
13301         paramter is true.
13302         (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
13303         mlo/mhi name selection.
13304         (arc_restore_callee_saves): Don't early restore blink when ISR.
13305         (arc_expand_prologue): Add mlo/mhi saving.
13306         (arc_expand_epilogue): Add mlo/mhi restoring.
13307         (gen_mlo): Remove.
13308         (gen_mhi): Remove.
13309         * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
13310         numbering when MUL64 option is used.
13311         (DWARF2_FRAME_REG_OUT): Define.
13312         * config/arc/arc.md (arc600_stall): New pattern.
13313         (VUNSPEC_ARC_ARC600_STALL): Define.
13314         (mulsi64): Use correct mlo/mhi registers.
13315         (mulsi_600): Clean it up.
13316         * config/arc/predicates.md (mlo_operand): Remove any dependency on
13317         TARGET_BIG_ENDIAN.
13318         (mhi_operand): Likewise.
13319
13320 2020-01-27  Claudiu Zissulescu  <claziss@synopsys.com>
13321             Petro Karashchenko  <petro.karashchenko@ring.com>
13322
13323         * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
13324         attributes if needed.
13325         (prepare_move_operands): Generate special unspec instruction for
13326         direct access.
13327         (arc_isuncached_mem_p): Propagate uncached attribute to each
13328         structure member.
13329         * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
13330         (VUNSPEC_ARC_STDI): Likewise.
13331         (ALLI): New mode iterator.
13332         (mALLI): New mode attribute.
13333         (lddi): New instruction pattern.
13334         (stdi): Likewise.
13335         (stdidi_split): Split instruction for architectures which are not
13336         supporting ll64 option.
13337         (lddidi_split): Likewise.
13338
13339 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
13340
13341         PR rtl-optimization/92989
13342         * lra-lives.c (process_bb_lives): Update the live-in set before
13343         processing additional clobbers.
13344
13345 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
13346
13347         PR rtl-optimization/93170
13348         * cselib.c (cselib_invalidate_regno_val): New function, split out
13349         from...
13350         (cselib_invalidate_regno): ...here.
13351         (cselib_invalidated_by_call_p): New function.
13352         (cselib_process_insn): Iterate over all the hard-register entries in
13353         REG_VALUES and invalidate any that cross call-clobbered registers.
13354
13355 2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
13356
13357         * dojump.c (split_comparison): Use HONOR_NANS rather than
13358         HONOR_SNANS when splitting LTGT.
13359
13360 2020-01-27  Martin Liska  <mliska@suse.cz>
13361
13362         PR driver/91220
13363         * opts.c (print_filtered_help): Exclude language-specific
13364         options from --help=common unless enabled in all FEs.
13365
13366 2020-01-27  Martin Liska  <mliska@suse.cz>
13367
13368         * opts.c (print_help): Exclude params from
13369         all except --help=param.
13370
13371 2020-01-27  Martin Liska  <mliska@suse.cz>
13372
13373         PR target/93274
13374         * config/i386/i386-features.c (make_resolver_func):
13375         Align the code with ppc64 target implementation.
13376         Do not generate a unique name for resolver function.
13377
13378 2020-01-27  Richard Biener  <rguenther@suse.de>
13379
13380         PR tree-optimization/93397
13381         * tree-vect-slp.c (vect_analyze_slp_instance): Delay
13382         converted reduction chain SLP graph adjustment.
13383
13384 2020-01-26  Marek Polacek  <polacek@redhat.com>
13385
13386         PR sanitizer/93436
13387         * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
13388         null DECL_NAME.
13389
13390 2020-01-26  Jason Merrill  <jason@redhat.com>
13391
13392         PR c++/92601
13393         * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
13394         of complete types.
13395
13396 2020-01-26  Darius Galis  <darius.galis@cyberthorstudios.com>
13397
13398         * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
13399         (rx_setmem): Likewise.
13400
13401 2020-01-26  Jakub Jelinek  <jakub@redhat.com>
13402
13403         PR target/93412
13404         * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
13405         Use nonimmediate_operand instead of x86_64_hilo_general_operand and
13406         drop <di> from constraint of last operand.
13407
13408         PR target/93430
13409         * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
13410         TARGET_AVX2 and V4DFmode not in the split condition, but in the
13411         pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
13412
13413 2020-01-25  Feng Xue  <fxue@os.amperecomputing.com>
13414
13415         PR ipa/93166
13416         * ipa-cp.c (get_info_about_necessary_edges): Remove value
13417         check assertion.
13418
13419 2020-01-24  Jeff Law  <law@redhat.com>
13420
13421         PR tree-optimization/92788
13422         * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
13423         not EDGE_ABNORMAL.
13424
13425 2020-01-24  Jakub Jelinek  <jakub@redhat.com>
13426
13427         PR target/93395
13428         * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
13429         *avx_vperm_broadcast_<mode>,
13430         <sse2_avx_avx512f>_vpermil<mode><mask_name>,
13431         *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
13432         Move before avx2_perm<mode>/avx512f_perm<mode>.
13433
13434         PR target/93376
13435         * simplify-rtx.c (simplify_const_unary_operation,
13436         simplify_const_binary_operation): Punt for mode precision above
13437         MAX_BITSIZE_MODE_ANY_INT.
13438
13439 2020-01-24  Andrew Pinski  <apinski@marvell.com>
13440
13441         * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
13442         alu.shift_reg to 0.
13443
13444 2020-01-24  Jeff Law  <law@redhat.com>
13445
13446         PR target/13721
13447         * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
13448         for REGs.  Call output_operand_lossage to get more reasonable
13449         diagnostics.
13450
13451 2020-01-24  Andrew Stubbs  <ams@codesourcery.com>
13452
13453         * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
13454         gcn_fp_compare_operator.
13455         (vec_cmpu<mode>di): Use gcn_compare_operator.
13456         (vec_cmp<u>v64qidi): Use gcn_compare_operator.
13457         (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
13458         (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
13459         (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
13460         (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
13461         (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
13462         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
13463         gcn_fp_compare_operator.
13464         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
13465         gcn_fp_compare_operator.
13466         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
13467         gcn_fp_compare_operator.
13468         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
13469         gcn_fp_compare_operator.
13470
13471 2020-01-24  Maciej W. Rozycki  <macro@wdc.com>
13472
13473         * doc/install.texi (Cross-Compiler-Specific Options): Document
13474         `--with-toolexeclibdir' option.
13475
13476 2020-01-24  Hans-Peter Nilsson  <hp@axis.com>
13477
13478         * target.def (flags_regnum): Also mention effect on delay slot filling.
13479         * doc/tm.texi: Regenerate.
13480
13481 2020-01-23  Jeff Law  <law@redhat.com>
13482
13483         PR translation/90162
13484         * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
13485
13486 2020-01-23  Mikael Tillenius  <mti-1@tillenius.com>
13487
13488         PR target/92269
13489         * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
13490         profiling label
13491
13492 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
13493
13494         PR rtl-optimization/93402
13495         * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
13496         USE insns.
13497
13498 2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
13499
13500         * config.in: Regenerated.
13501         * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
13502         for TARGET_LIBC_GNUSTACK.
13503         * configure: Regenerated.
13504         * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
13505         found to be 2.31 or greater.
13506
13507 2020-01-23  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
13508
13509         * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
13510         TARGET_SOFT_FLOAT.
13511         * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
13512         (mips_asm_file_end): New function. Delegate to
13513         file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
13514         * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
13515
13516 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
13517
13518         PR target/93376
13519         * config/i386/i386-modes.def (POImode): New mode.
13520         (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
13521         * config/i386/i386.md (DPWI): New mode attribute.
13522         (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
13523         (QWI): Rename to...
13524         (QPWI): ... this.  Use POI instead of OI for TImode.
13525         (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
13526         *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
13527         instead of <QWI>.
13528
13529 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
13530
13531         PR target/93341
13532         * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
13533         unspec.
13534         (speculation_tracker_rev): New pattern.
13535         * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
13536         Use speculation_tracker_rev to track the inverse condition.
13537
13538 2020-01-23  Richard Biener  <rguenther@suse.de>
13539
13540         PR tree-optimization/93381
13541         * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
13542         alias-set of the def as argument and record the first one.
13543         (vn_walk_cb_data::first_set): New member.
13544         (vn_reference_lookup_3): Pass the alias-set of the current def
13545         to push_partial_def.  Fix alias-set used in the aggregate copy
13546         case.
13547         (vn_reference_lookup): Consistently set *last_vuse_ptr.
13548         * real.c (clear_significand_below): Fix out-of-bound access.
13549
13550 2020-01-23  Jakub Jelinek  <jakub@redhat.com>
13551
13552         PR target/93346
13553         * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
13554         New define_insn patterns.
13555
13556 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
13557
13558         * doc/sourcebuild.texi (check-function-bodies): Add an
13559         optional target/xfail selector.
13560
13561 2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
13562
13563         PR rtl-optimization/93124
13564         * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
13565         bare USE and CLOBBER insns.
13566
13567 2020-01-22  Andrew Pinski  <apinski@marvell.com>
13568
13569         * config/arc/arc.c (output_short_suffix): Check insn for nullness.
13570
13571 2020-01-22  David Malcolm  <dmalcolm@redhat.com>
13572
13573         PR analyzer/93307
13574         * gdbinit.in (break-on-saved-diagnostic): Update for move of
13575         diagnostic_manager into "ana" namespace.
13576         * selftest-run-tests.c (selftest::run_tests): Update for move of
13577         selftest::run_analyzer_selftests to
13578         ana::selftest::run_analyzer_selftests.
13579
13580 2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>
13581
13582         * cfgexpand.c (union_stack_vars): Update the size.
13583
13584 2020-01-22  Richard Biener  <rguenther@suse.de>
13585
13586         PR tree-optimization/93381
13587         * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
13588         throughout, handle all conversions the same.
13589
13590 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
13591
13592         PR target/93335
13593         * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
13594         gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
13595         predicate, not whenever it is CONST_INT.  Otherwise, force_reg it.
13596         Call force_reg on high_in2 unconditionally.
13597
13598 2020-01-22  Martin Liska  <mliska@suse.cz>
13599
13600         PR tree-optimization/92924
13601         * profile.c (compute_value_histograms): Divide
13602         all counter values.
13603
13604 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
13605
13606         PR target/91298
13607         * output.h (assemble_name_resolve): Declare.
13608         * varasm.c (assemble_name_resolve): New function.
13609         (assemble_name): Use it.
13610         * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
13611
13612 2020-01-22  Joseph Myers  <joseph@codesourcery.com>
13613
13614         * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
13615         update_web_docs_git instead of update_web_docs_svn.
13616
13617 2020-01-21  Andrew Pinski  <apinski@marvell.com>
13618
13619         PR target/9311
13620         * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
13621         as PTR mode. Have operand 1 as being modeless, it can be P mode.
13622         (*tlsgd_small_<mode>): Likewise.
13623         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
13624         <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
13625         register.  Convert that register back to dest using convert_mode.
13626
13627 2020-01-21  Jim Wilson  <jimw@sifive.com>
13628
13629         * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
13630         instead of XINT.
13631
13632 2020-01-21  H.J. Lu  <hongjiu.lu@intel.com>
13633             Uros Bizjak    <ubizjak@gmail.com>
13634
13635         PR target/93319
13636         * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
13637         with ptr_mode.
13638         (legitimize_tls_address): Do GNU2 TLS address computation in
13639         ptr_mode and zero-extend result to Pmode.
13640         *  config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
13641         :P with :PTR and Pmode with ptr_mode.
13642         (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
13643         (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
13644         (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
13645
13646 2020-01-21  Jakub Jelinek  <jakub@redhat.com>
13647
13648         PR target/93333
13649         * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
13650         the last two operands are CONST_INT_P before using them as such.
13651
13652 2020-01-21  Richard Sandiford  <richard.sandiford@arm.com>
13653
13654         * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
13655         to get the integer element types.
13656
13657 2020-01-21  Richard Sandiford  <richard.sandiford@arm.com>
13658
13659         * config/aarch64/aarch64-sve-builtins.h
13660         (function_expander::convert_to_pmode): Declare.
13661         * config/aarch64/aarch64-sve-builtins.cc
13662         (function_expander::convert_to_pmode): New function.
13663         (function_expander::get_contiguous_base): Use it.
13664         (function_expander::prepare_gather_address_operands): Likewise.
13665         * config/aarch64/aarch64-sve-builtins-sve2.cc
13666         (svwhilerw_svwhilewr_impl::expand): Likewise.
13667
13668 2020-01-21  Szabolcs Nagy  <szabolcs.nagy@arm.com>
13669
13670         PR target/92424
13671         * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
13672         cfun->machine->label_is_assembled.
13673         (aarch64_print_patchable_function_entry): New.
13674         (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
13675         * config/aarch64/aarch64.h (struct machine_function): New field,
13676         label_is_assembled.
13677
13678 2020-01-21  David Malcolm  <dmalcolm@redhat.com>
13679
13680         PR ipa/93315
13681         * ipa-profile.c (ipa_profile): Delete call_sums and set it to
13682         NULL on exit.
13683
13684 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
13685
13686         PR lto/93318
13687         * cgraph.c (cgraph_edge::resolve_speculation,
13688         cgraph_edge::redirect_call_stmt_to_callee): Fix update of
13689         call_stmt_site_hash.
13690
13691 2020-01-21  Martin Liska  <mliska@suse.cz>
13692
13693         * config/rs6000/rs6000.c (common_mode_defined): Remove
13694         unused variable.
13695
13696 2020-01-21  Richard Biener  <rguenther@suse.de>
13697
13698         PR tree-optimization/92328
13699         * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
13700         type when value-numbering same-sized store by inserting a
13701         VIEW_CONVERT_EXPR.
13702         (eliminate_dom_walker::eliminate_stmt): When eliminating
13703         a redundant store handle bit-reinterpretation of the same value.
13704
13705 2020-01-21  Andrew Pinski  <apinski@marvel.com>
13706
13707         PR tree-opt/93321
13708         * tree-into-ssa.c (prepare_block_for_update_1): Split out
13709         from ...
13710         (prepare_block_for_update): This.  Use a worklist instead of
13711         recursing.
13712
13713 2020-01-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
13714
13715         * gcc/config/arm/arm.c (clear_operation_p):
13716         Initialise last_regno, skip first iteration
13717         based on the first_set value and use ints instead
13718         of the unnecessary HOST_WIDE_INTs.
13719
13720 2020-01-21  Jakub Jelinek  <jakub@redhat.com>
13721
13722         PR target/93073
13723         * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
13724         compare_mode other than SFmode or DFmode.
13725
13726 2020-01-21  Kito Cheng  <kito.cheng@sifive.com>
13727
13728         PR target/93304
13729         * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
13730         * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
13731         * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
13732
13733 2020-01-20  Wilco Dijkstra  <wdijkstr@arm.com>
13734
13735         * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
13736
13737 2020-01-20  Andrew Pinski  <apinski@marvell.com>
13738
13739         PR middle-end/93242
13740         * targhooks.c (default_print_patchable_function_entry): Use
13741         output_asm_insn to emit the nop instruction.
13742
13743 2020-01-20  Fangrui Song  <maskray@google.com>
13744
13745         PR middle-end/93194
13746         * targhooks.c (default_print_patchable_function_entry): Align to
13747         POINTER_SIZE.
13748
13749 2020-01-20  H.J. Lu  <hongjiu.lu@intel.com>
13750
13751         PR target/93319
13752         * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
13753         gen_tls_dynamic_gnu2_64.  Compute GNU2 TLS address in ptr_mode.
13754         * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
13755         (@tls_dynamic_gnu2_64_<mode>): This.  Replace DI with P.
13756         (*tls_dynamic_gnu2_lea_64): Renamed to ...
13757         (*tls_dynamic_gnu2_lea_64_<mode>): This.  Replace DI with P.
13758         Remove the {q} suffix from lea.
13759         (*tls_dynamic_gnu2_call_64): Renamed to ...
13760         (*tls_dynamic_gnu2_call_64_<mode>): This.  Replace DI with P.
13761         (*tls_dynamic_gnu2_combine_64): Renamed to ...
13762         (*tls_dynamic_gnu2_combine_64_<mode>): This.  Replace DI with P.
13763         Pass Pmode to gen_tls_dynamic_gnu2_64.
13764
13765 2020-01-20  Wilco Dijkstra  <wdijkstr@arm.com>
13766
13767         * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
13768
13769 2020-01-20  Richard Sandiford  <richard.sandiford@arm.com>
13770
13771         * config/aarch64/aarch64-sve-builtins-base.cc
13772         (svld1ro_impl::memory_vector_mode): Remove parameter name.
13773
13774 2020-01-20  Richard Biener  <rguenther@suse.de>
13775
13776         PR debug/92763
13777         * dwarf2out.c (prune_unused_types): Unconditionally mark
13778         called function DIEs.
13779
13780 2020-01-20  Martin Liska  <mliska@suse.cz>
13781
13782         PR tree-optimization/93199
13783         * tree-eh.c (struct leh_state): Add
13784         new field outer_non_cleanup.
13785         (cleanup_is_dead_in): Pass leh_state instead
13786         of eh_region.  Add a checking that state->outer_non_cleanup
13787         points to outer non-clean up region.
13788         (lower_try_finally): Record outer_non_cleanup
13789         for this_state.
13790         (lower_catch): Likewise.
13791         (lower_eh_filter): Likewise.
13792         (lower_eh_must_not_throw): Likewise.
13793         (lower_cleanup): Likewise.
13794
13795 2020-01-20  Richard Biener  <rguenther@suse.de>
13796
13797         PR tree-optimization/93094
13798         * tree-vectorizer.h (vect_loop_versioning): Adjust.
13799         (vect_transform_loop): Likewise.
13800         * tree-vectorizer.c (try_vectorize_loop_1): Pass down
13801         loop_vectorized_call to vect_transform_loop.
13802         * tree-vect-loop.c (vect_transform_loop): Pass down
13803         loop_vectorized_call to vect_loop_versioning.
13804         * tree-vect-loop-manip.c (vect_loop_versioning): Use
13805         the earlier discovered loop_vectorized_call.
13806
13807 2020-01-19  Eric S. Raymond <esr@thyrsus.com>
13808
13809         * doc/contribute.texi: Update for SVN -> Git transition.
13810         * doc/install.texi: Likewise.
13811
13812 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
13813
13814         PR lto/93318
13815         * cgraph.c (cgraph_edge::make_speculative): Increase number of
13816         speculative targets.
13817         (verify_speculative_call): New function
13818         (cgraph_node::verify_node): Use it.
13819         * ipa-profile.c (ipa_profile): Fix formating; do not set number of
13820         speculations.
13821
13822 2020-01-18  Jan Hubicka  <hubicka@ucw.cz>
13823
13824         PR lto/93318
13825         * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
13826         (cgraph_edge::make_direct): Remove all indirect targets.
13827         (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
13828         (cgraph_node::verify_node): Verify that only one call_stmt or
13829         lto_stmt_uid is set.
13830         * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
13831         lto_stmt_uid.
13832         * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
13833         (lto_output_ref): Simplify streaming of stmt.
13834         * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
13835
13836 2020-01-18  Tamar Christina  <tamar.christina@arm.com>
13837
13838         * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
13839         Mark parameter unused.
13840
13841 2020-01-18  Hans-Peter Nilsson  <hp@axis.com>
13842
13843         * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
13844
13845 2019-01-18  Gerald Pfeifer  <gerald@pfeifer.com>
13846
13847         * varpool.c (ctor_useable_for_folding_p): Fix grammar.
13848
13849 2020-01-18  Iain Sandoe  <iain@sandoe.co.uk>
13850
13851         * Makefile.in: Add coroutine-passes.o.
13852         * builtin-types.def (BT_CONST_SIZE): New.
13853         (BT_FN_BOOL_PTR): New.
13854         (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
13855         * builtins.def (DEF_COROUTINE_BUILTIN): New.
13856         * coroutine-builtins.def: New file.
13857         * coroutine-passes.cc: New file.
13858         * function.h (struct GTY function): Add a bit to indicate that the
13859         function is a coroutine component.
13860         * internal-fn.c (expand_CO_FRAME): New.
13861         (expand_CO_YIELD): New.
13862         (expand_CO_SUSPN): New.
13863         (expand_CO_ACTOR): New.
13864         * internal-fn.def (CO_ACTOR): New.
13865         (CO_YIELD): New.
13866         (CO_SUSPN): New.
13867         (CO_FRAME): New.
13868         * passes.def: Add pass_coroutine_lower_builtins,
13869         pass_coroutine_early_expand_ifns.
13870         * tree-pass.h (make_pass_coroutine_lower_builtins): New.
13871         (make_pass_coroutine_early_expand_ifns): New.
13872         * doc/invoke.texi: Document the fcoroutines command line
13873         switch.
13874
13875 2020-01-18  Jakub Jelinek  <jakub@redhat.com>
13876
13877         * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
13878
13879         PR target/93312
13880         * config/arm/arm.c (clear_operation_p): Don't use REGNO until
13881         after checking the argument is a REG.  Don't use REGNO (reg)
13882         again to set last_regno, reuse regno variable instead.
13883
13884 2020-01-17  David Malcolm  <dmalcolm@redhat.com>
13885
13886         * doc/analyzer.texi (Limitations): Add note about NaN.
13887
13888 2020-01-17  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
13889             Sudakshina Das  <sudi.das@arm.com>
13890
13891         * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
13892         and valid immediate.
13893         (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
13894         (lshrdi3): Generate thumb2_lsrl for valid immediates.
13895         * config/arm/constraints.md (Pg): New.
13896         * config/arm/predicates.md (long_shift_imm): New.
13897         (arm_reg_or_long_shift_imm): Likewise.
13898         * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
13899         (thumb2_lsll): Likewise.
13900         (thumb2_lsrl): New.
13901
13902 2020-01-17  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
13903             Sudakshina Das  <sudi.das@arm.com>
13904
13905         * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
13906         (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
13907         * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
13908         register pairs for doubleword quantities for ARMv8.1M-Mainline.
13909         * config/arm/thumb2.md (thumb2_asrl): New.
13910         (thumb2_lsll): Likewise.
13911
13912 2020-01-17  Jakub Jelinek  <jakub@redhat.com>
13913
13914         * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
13915         unused variable.
13916
13917 2020-01-17  Alexander Monakov  <amonakov@ispras.ru>
13918
13919         * gdbinit.in (help-gcc-hooks): New command.
13920         (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
13921         pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
13922         documentation.
13923
13924 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
13925
13926         * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
13927         correct target macro.
13928
13929 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
13930
13931         * config/aarch64/aarch64-protos.h
13932         (aarch64_sve_ld1ro_operand_p): New.
13933         * config/aarch64/aarch64-sve-builtins-base.cc
13934         (class load_replicate): New.
13935         (class svld1ro_impl): New.
13936         (class svld1rq_impl): Change to inherit from load_replicate.
13937         (svld1ro): New sve intrinsic function base.
13938         * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
13939         New DEF_SVE_FUNCTION.
13940         * config/aarch64/aarch64-sve-builtins-base.h
13941         (svld1ro): New decl.
13942         * config/aarch64/aarch64-sve-builtins.cc
13943         (function_expander::add_mem_operand): Modify assert to allow
13944         OImode.
13945         * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
13946         pattern.
13947         * config/aarch64/aarch64.c
13948         (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
13949         (aarch64_sve_ld1rq_ld1ro_operand_p): This.
13950         (aarch64_sve_ld1ro_operand_p): New.
13951         * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
13952         * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
13953         * config/aarch64/predicates.md
13954         (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
13955
13956 2020-01-17  Matthew Malcomson  <matthew.malcomson@arm.com>
13957
13958         * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
13959         Introduce this ACLE specified predefined macro.
13960         * config/aarch64/aarch64-option-extensions.def (f64mm): New.
13961         (fp): Disabling this disables f64mm.
13962         (simd): Disabling this disables f64mm.
13963         (fp16): Disabling this disables f64mm.
13964         (sve): Disabling this disables f64mm.
13965         * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
13966         (AARCH64_ISA_F64MM): New.
13967         (TARGET_F64MM): New.
13968         * doc/invoke.texi (f64mm): Document new option.
13969
13970 2020-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
13971
13972         * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
13973         (neoversen1_tunings): Likewise.
13974
13975 2020-01-17  Wilco Dijkstra  <wdijkstr@arm.com>
13976
13977         PR target/92692
13978         * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
13979         Add assert to ensure prolog has been emitted.
13980         (aarch64_split_atomic_op): Likewise.
13981         * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
13982         Use epilogue_completed rather than reload_completed.
13983         (aarch64_atomic_exchange<mode>): Likewise.
13984         (aarch64_atomic_<atomic_optab><mode>): Likewise.
13985         (atomic_nand<mode>): Likewise.
13986         (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
13987         (atomic_fetch_nand<mode>): Likewise.
13988         (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
13989         (atomic_nand_fetch<mode>): Likewise.
13990
13991 2020-01-17  Richard Sandiford  <richard.sandiford@arm.com>
13992
13993         PR target/93133
13994         * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
13995         for FP modes.
13996         (REVERSE_CONDITION): Delete.
13997         * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
13998         (CCFP_CCFPE): Likewise.
13999         (e): New mode attribute.
14000         * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
14001         (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
14002         (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
14003         (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
14004         (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
14005         (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
14006         * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
14007         name of generator from gen_ccmpdi to gen_ccmpccdi.
14008         (aarch64_gen_ccmp_next): Use code_for_ccmp.  If we want to reverse
14009         the previous comparison but aren't able to, use the new ccmp_rev
14010         patterns instead.
14011
14012 2020-01-17  Richard Sandiford  <richard.sandiford@arm.com>
14013
14014         * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
14015         than testing directly for INTEGER_CST.
14016         (gimplify_target_expr, gimplify_omp_depend): Likewise.
14017
14018 2020-01-17  Jakub Jelinek  <jakub@redhat.com>
14019
14020         PR tree-optimization/93292
14021         * tree-vect-stmts.c (vectorizable_comparison): Punt also if
14022         get_vectype_for_scalar_type returns NULL.
14023
14024 2020-01-16  Jan Hubicka  <hubicka@ucw.cz>
14025
14026         * params.opt (-param=max-predicted-iterations): Increase range from 0.
14027         * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
14028
14029 2020-01-16  Jan Hubicka  <hubicka@ucw.cz>
14030
14031         * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
14032         dump.
14033         * params.opt: (max-predicted-iterations): Set bounds.
14034         * predict.c (real_almost_one, real_br_prob_base,
14035         real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
14036         (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
14037         probabilities; do not truncate to reg_br_prob_bases.
14038         (estimate_loops_at_level): Pass max_cyclic_prob.
14039         (estimate_loops): Compute max_cyclic_prob.
14040         (estimate_bb_frequencies): Do not initialize real_*; update calculation
14041         of back edge prob.
14042         * profile-count.c (profile_probability::to_sreal): New.
14043         * profile-count.h (class sreal): Move up in file.
14044         (profile_probability::to_sreal): Declare.
14045
14046 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
14047
14048         * config/arm/arm.c
14049         (arm_invalid_conversion): New function for target hook.
14050         (arm_invalid_unary_op): New function for target hook.
14051         (arm_invalid_binary_op): New function for target hook.
14052
14053 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
14054
14055         * config.gcc: Add arm_bf16.h.
14056         * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
14057         (arm_simd_builtin_std_type): Add BFmode.
14058         (arm_init_simd_builtin_types): Define element types for vector types.
14059         (arm_init_bf16_types): New function.
14060         (arm_init_builtins): Add arm_init_bf16_types function call.
14061         * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
14062         * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
14063         * config/arm/arm.c (aapcs_vfp_sub_candidate):  Add BFmode.
14064         (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
14065         (arm_vector_mode_supported_p): Add V4BF, V8BF.
14066         (arm_mangle_type):  Add __bf16.
14067         * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
14068         VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
14069         arm_bf16_ptr_type_node.
14070         * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
14071         define_split between ARM registers.
14072         * config/arm/arm_bf16.h: New file.
14073         * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
14074         * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
14075         (VQXMOV): Add V8BF.
14076         * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
14077         * config/arm/vfp.md: Add BFmode to movhf patterns.
14078
14079 2020-01-16  Mihail Ionescu  <mihail.ionescu@arm.com>
14080             Andre Vieira  <andre.simoesdiasvieira@arm.com>
14081
14082         * config/arm/arm-cpus.in (mve, mve_float): New features.
14083         (dsp, mve, mve.fp): New options.
14084         * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
14085         * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
14086         * doc/invoke.texi: Document the armv8.1-m mve and dps options.
14087
14088 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14089             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14090
14091         * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
14092         Armv8-M Mainline.
14093         * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
14094         error for using -mcmse when targeting Armv8.1-M Mainline.
14095
14096 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14097             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14098
14099         * config/arm/arm.md (nonsecure_call_internal): Do not force memory
14100         address in r4 when targeting Armv8.1-M Mainline.
14101         (nonsecure_call_value_internal): Likewise.
14102         * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
14103         a register match_operand again.  Emit BLXNS when targeting
14104         Armv8.1-M Mainline.
14105         (nonsecure_call_value_reg_thumb2): Likewise.
14106
14107 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14108             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14109
14110         * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
14111         (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
14112         variable as true when floating-point ABI is not hard.  Replace
14113         check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
14114         Generate VLSTM and VLLDM instruction respectively before and
14115         after a function call to cmse_nonsecure_call function.
14116         * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
14117         (VUNSPEC_VLLDM): Likewise.
14118         * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
14119         (lazy_load_multiple_insn): Likewise.
14120
14121 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14122             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14123
14124         * config/arm/arm.c (vfp_emit_fstmd): Declare early.
14125         (arm_emit_vfp_multi_reg_pop): Likewise.
14126         (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
14127         registers to clear in max_fp_regno.  Emit VPUSH and VPOP to save and
14128         restore callee-saved VFP registers.
14129
14130 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14131             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14132
14133         * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
14134         (cmse_nonsecure_call_clear_caller_saved): Rename into ...
14135         (cmse_nonsecure_call_inline_register_clear): This.  Save and clear
14136         callee-saved GPRs as well as clear ip register before doing a nonsecure
14137         call then restore callee-saved GPRs after it when targeting
14138         Armv8.1-M Mainline.
14139         (arm_reorg): Adapt to function rename.
14140
14141 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14142             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14143
14144         * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
14145         * config/arm/arm.c (clear_operation_p): Extend to be able to check a
14146         clear_vfp_multiple pattern based on a new vfp parameter.
14147         (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
14148         targeting Armv8.1-M Mainline.
14149         (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
14150         unconditionally when targeting Armv8.1-M Mainline architecture.  Check
14151         whether VFP registers are available before looking call_used_regs for a
14152         VFP register.
14153         * config/arm/predicates.md (clear_multiple_operation): Adapt to change
14154         of prototype of clear_operation_p.
14155         (clear_vfp_multiple_operation): New predicate.
14156         * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
14157         * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
14158
14159 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14160             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14161
14162         * config/arm/arm-protos.h (clear_operation_p): Declare.
14163         * config/arm/arm.c (clear_operation_p): New function.
14164         (cmse_clear_registers): Generate clear_multiple instruction pattern if
14165         targeting Armv8.1-M Mainline or successor.
14166         (output_return_instruction): Only output APSR register clearing if
14167         Armv8.1-M Mainline instructions not available.
14168         (thumb_exit): Likewise.
14169         * config/arm/predicates.md (clear_multiple_operation): New predicate.
14170         * config/arm/thumb2.md (clear_apsr): New define_insn.
14171         (clear_multiple): Likewise.
14172         * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
14173
14174 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14175             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14176
14177         * config/arm/arm.c (fp_sysreg_names): Declare and define.
14178         (use_return_insn): Also return false for Armv8.1-M Mainline.
14179         (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
14180         Mainline instructions are available.
14181         (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
14182         when targeting Armv8.1-M Mainline Security Extensions.
14183         (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
14184         Mainline entry function.
14185         (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
14186         targeting Armv8.1-M Mainline or successor.
14187         (arm_expand_epilogue): Fix indentation of caller-saved register
14188         clearing.  Restore FPCXTNS if this is an Armv8.1-M Mainline
14189         entry function.
14190         * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
14191         (FP_SYSREGS): Likewise.
14192         (enum vfp_sysregs_encoding): Define enum.
14193         (fp_sysreg_names): Declare.
14194         * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
14195         * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
14196         (pop_fpsysreg_insn): Likewise.
14197
14198 2020-01-16  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
14199             Thomas Preud'homme  <thomas.preudhomme@arm.com>
14200
14201         * config/arm/arm-cpus.in (armv8_1m_main): New feature.
14202         (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
14203         ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
14204         ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
14205         ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
14206         (ARMv8_1m_main): New feature group.
14207         (armv8.1-m.main): New architecture.
14208         * config/arm/arm-tables.opt: Regenerate.
14209         * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
14210         (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
14211         (arm_options_perform_arch_sanity_checks): Error out when targeting
14212         Armv8.1-M Mainline Security Extensions.
14213         * config/arm/arm.h (arm_arch8_1m_main): Declare.
14214
14215 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
14216
14217         * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
14218         aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
14219         * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
14220         aarch64_bfdot_laneq): New.
14221         * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
14222         vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
14223         vbfdotq_laneq_f32): New.
14224         * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
14225         VBFMLA_W, VBF): New.
14226         (isquadop): Add V4BF, V8BF.
14227
14228 2020-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
14229
14230         * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
14231         New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
14232         TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
14233         (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
14234         (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
14235         * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
14236         usdot_laneq, sudot_lane,sudot_laneq): New.
14237         * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
14238         (aarch64_<sur>dot_lane): New.
14239         * config/aarch64/arm_neon.h (vusdot_s32): New.
14240         (vusdotq_s32): New.
14241         (vusdot_lane_s32): New.
14242         (vsudot_lane_s32): New.
14243         * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
14244         (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
14245
14246 2020-01-16  Martin Liska  <mliska@suse.cz>
14247
14248         * value-prof.c (dump_histogram_value): Fix
14249         obvious spacing issue.
14250
14251 2020-01-16  Andrew Pinski  <apinski@marvell.com>
14252
14253         * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
14254         !storage_order_barrier_p.
14255
14256 2020-01-16  Andrew Pinski  <apinski@marvell.com>
14257
14258         * sched-int.h (_dep): Add unused bit-field field for the padding.
14259         * sched-deps.c (init_dep_1): Init unused field.
14260
14261 2020-01-16  Andrew Pinski  <apinski@marvell.com>
14262
14263         * optabs.h (create_expand_operand): Initialize target field also.
14264
14265 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
14266
14267         PR tree-optimization/92429
14268         * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
14269         * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
14270         control folding.
14271         * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
14272         tree.
14273
14274 2020-01-16  Richard Sandiford  <richard.sandiford@arm.com>
14275
14276         * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
14277         aarch64_sve_int_mode to each mode.
14278
14279 2020-01-15  David Malcolm  <dmalcolm@redhat.com>
14280
14281         * doc/analyzer.texi (Overview): Add note about
14282         -fdump-ipa-analyzer.
14283
14284 2020-01-15  Wilco Dijkstra  <wdijkstr@arm.com>
14285
14286         PR tree-optimization/93231
14287         * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
14288         input_type is unsigned.  Use tree_to_shwi for shift constant.
14289         Check CST_STRING element size is CHAR_TYPE_SIZE bits.
14290         (simplify_count_trailing_zeroes): Add test to handle known non-zero
14291         inputs more efficiently.
14292
14293 2020-01-15  Uroš Bizjak  <ubizjak@gmail.com>
14294
14295         * config/i386/i386.md (*movsf_internal): Do not require
14296         SSE2 ISA for alternatives 14 and 15.
14297
14298 2020-01-15  Richard Biener  <rguenther@suse.de>
14299
14300         PR middle-end/93273
14301         * tree-eh.c (sink_clobbers): If we already visited the destination
14302         block do not defer insertion.
14303         (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
14304         the purpose of defered insertion.
14305
14306 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
14307
14308         * BASE-VER: Bump to 10.0.1.
14309
14310 2020-01-15  Richard Sandiford  <richard.sandiford@arm.com>
14311
14312         PR tree-optimization/93247
14313         * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
14314         type of the stmt that we're going to vectorize.
14315
14316 2020-01-15  Richard Sandiford  <richard.sandiford@arm.com>
14317
14318         * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
14319         VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
14320         type from the lhs.
14321
14322 2020-01-15  Martin Liska  <mliska@suse.cz>
14323
14324         * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
14325         2 calls of streamer_read_hwi in a function call.
14326
14327 2020-01-15  Richard Biener  <rguenther@suse.de>
14328
14329         * alias.c (record_alias_subset): Avoid redundant work when
14330         subset is already recorded.
14331
14332 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
14333
14334         * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
14335         the analyzer options provide CWE identifiers.
14336
14337 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
14338
14339         * tree-diagnostic-path.cc (path_summary::event_range::print):
14340         When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
14341         using get_pure_location.
14342
14343 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
14344
14345         PR tree-optimization/93262
14346         * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
14347         perform head trimming only if the last argument is constant,
14348         either all ones, or larger or equal to head trim, in the latter
14349         case decrease the last argument by head_trim.
14350
14351         PR tree-optimization/93249
14352         * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
14353         (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
14354         function body scope, reindent.  For BUILTIN_IN_STRNCPY*, don't
14355         perform head trim unless we can prove there are no '\0' chars
14356         from the source among the first head_trim chars.
14357
14358 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
14359
14360         * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
14361
14362 2020-01-15  Jakub Jelinek  <jakub@redhat.com>
14363
14364         PR target/93009
14365         * config/i386/sse.md
14366         (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
14367         *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
14368         *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
14369         *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
14370         just a single alternative instead of two, make operands 1 and 2
14371         commutative.
14372
14373 2020-01-14  Jan Hubicka  <hubicka@ucw.cz>
14374
14375         PR lto/91576
14376         * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
14377         TYPE_MODE.
14378
14379 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
14380
14381         * Makefile.in (lang_opt_files): Add analyzer.opt.
14382         (ANALYZER_OBJS): New.
14383         (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
14384         tristate.o and ANALYZER_OBJS.
14385         (TEXI_GCCINT_FILES): Add analyzer.texi.
14386         * common.opt (-fanalyzer): New driver option.
14387         * config.in: Regenerate.
14388         * configure: Regenerate.
14389         * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
14390         (gccdepdir): Also create depdir for "analyzer" subdir.
14391         * digraph.cc: New file.
14392         * digraph.h: New file.
14393         * doc/analyzer.texi: New file.
14394         * doc/gccint.texi ("Static Analyzer") New menu item.
14395         (analyzer.texi): Include it.
14396         * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
14397         ("Warning Options"): Add static analysis warnings to the list.
14398         (-Wno-analyzer-double-fclose): New option.
14399         (-Wno-analyzer-double-free): New option.
14400         (-Wno-analyzer-exposure-through-output-file): New option.
14401         (-Wno-analyzer-file-leak): New option.
14402         (-Wno-analyzer-free-of-non-heap): New option.
14403         (-Wno-analyzer-malloc-leak): New option.
14404         (-Wno-analyzer-possible-null-argument): New option.
14405         (-Wno-analyzer-possible-null-dereference): New option.
14406         (-Wno-analyzer-null-argument): New option.
14407         (-Wno-analyzer-null-dereference): New option.
14408         (-Wno-analyzer-stale-setjmp-buffer): New option.
14409         (-Wno-analyzer-tainted-array-index): New option.
14410         (-Wno-analyzer-use-after-free): New option.
14411         (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
14412         (-Wno-analyzer-use-of-uninitialized-value): New option.
14413         (-Wanalyzer-too-complex): New option.
14414         (-fanalyzer-call-summaries): New warning.
14415         (-fanalyzer-checker=): New warning.
14416         (-fanalyzer-fine-grained): New warning.
14417         (-fno-analyzer-state-merge): New warning.
14418         (-fno-analyzer-state-purge): New warning.
14419         (-fanalyzer-transitivity): New warning.
14420         (-fanalyzer-verbose-edges): New warning.
14421         (-fanalyzer-verbose-state-changes): New warning.
14422         (-fanalyzer-verbosity=): New warning.
14423         (-fdump-analyzer): New warning.
14424         (-fdump-analyzer-callgraph): New warning.
14425         (-fdump-analyzer-exploded-graph): New warning.
14426         (-fdump-analyzer-exploded-nodes): New warning.
14427         (-fdump-analyzer-exploded-nodes-2): New warning.
14428         (-fdump-analyzer-exploded-nodes-3): New warning.
14429         (-fdump-analyzer-supergraph): New warning.
14430         * doc/sourcebuild.texi (dg-require-dot): New.
14431         (dg-check-dot): New.
14432         * gdbinit.in (break-on-saved-diagnostic): New command.
14433         * graphviz.cc: New file.
14434         * graphviz.h: New file.
14435         * ordered-hash-map-tests.cc: New file.
14436         * ordered-hash-map.h: New file.
14437         * passes.def (pass_analyzer): Add before
14438         pass_ipa_whole_program_visibility.
14439         * selftest-run-tests.c (selftest::run_tests): Call
14440         selftest::ordered_hash_map_tests_cc_tests.
14441         * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
14442         decl.
14443         * shortest-paths.h: New file.
14444         * timevar.def (TV_ANALYZER): New timevar.
14445         (TV_ANALYZER_SUPERGRAPH): Likewise.
14446         (TV_ANALYZER_STATE_PURGE): Likewise.
14447         (TV_ANALYZER_PLAN): Likewise.
14448         (TV_ANALYZER_SCC): Likewise.
14449         (TV_ANALYZER_WORKLIST): Likewise.
14450         (TV_ANALYZER_DUMP): Likewise.
14451         (TV_ANALYZER_DIAGNOSTICS): Likewise.
14452         (TV_ANALYZER_SHORTEST_PATHS): Likewise.
14453         * tree-pass.h (make_pass_analyzer): New decl.
14454         * tristate.cc: New file.
14455         * tristate.h: New file.
14456
14457 2020-01-14  Uroš Bizjak  <ubizjak@gmail.com>
14458
14459         PR target/93254
14460         * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
14461         alternatives 9 and 10.
14462
14463 2020-01-14  David Malcolm  <dmalcolm@redhat.com>
14464
14465         * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
14466         * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
14467         * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
14468         * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
14469         (selftest::hash_map_tests_c_tests): Call it.
14470         * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
14471         New static constant, using the value of = H::empty_zero_p.
14472         (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
14473         from default_hash_traits <Value>.
14474         * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
14475         from Traits.
14476         * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
14477         * hash-table.h (hash_table::alloc_entries): Guard the loop of
14478         calls to mark_empty with !Descriptor::empty_zero_p.
14479         (hash_table::empty_slow): Conditionalize the memset call with a
14480         check that Descriptor::empty_zero_p; otherwise, loop through the
14481         entries calling mark_empty on them.
14482         * hash-traits.h (int_hash::empty_zero_p): New static constant.
14483         (pointer_hash::empty_zero_p): Likewise.
14484         (pair_hash::empty_zero_p): Likewise.
14485         * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
14486         Likewise.
14487         * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
14488         (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
14489         * profile.c (location_triplet_hash::empty_zero_p): Likewise.
14490         * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
14491         (sanopt_tree_couple_hash::empty_zero_p): Likewise.
14492         * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
14493         * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
14494         * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
14495         * tree-vectorizer.h
14496         (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
14497         Likewise.
14498
14499 2020-01-14  Kewen Lin  <linkw@gcc.gnu.org>
14500
14501         * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
14502         fix typo on return value.
14503
14504 2020-01-14  Xiong Hu Luo  <luoxhu@linux.ibm.com>
14505
14506         PR ipa/69678
14507         * cgraph.c (symbol_table::create_edge): Init speculative_id and
14508         target_prob.
14509         (cgraph_edge::make_speculative): Add param for setting speculative_id
14510         and target_prob.
14511         (cgraph_edge::speculative_call_info): Update comments and find reference
14512         by speculative_id for multiple indirect targets.
14513         (cgraph_edge::resolve_speculation): Decrease the speculations
14514         for indirect edge, drop it's speculative if not direct target
14515         left. Update comments.
14516         (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
14517         (cgraph_node::dump): Print num_speculative_call_targets.
14518         (cgraph_node::verify_node): Don't report error if speculative
14519         edge not include statement.
14520         (cgraph_edge::num_speculative_call_targets_p): New function.
14521         * cgraph.h (int common_target_id): Remove.
14522         (int common_target_probability): Remove.
14523         (num_speculative_call_targets): New variable.
14524         (make_speculative): Add param for setting speculative_id.
14525         (cgraph_edge::num_speculative_call_targets_p): New declare.
14526         (target_prob): New variable.
14527         (speculative_id): New variable.
14528         * ipa-fnsummary.c (analyze_function_body): Create and duplicate
14529           call summaries for multiple speculative call targets.
14530         * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
14531         * ipa-profile.c (struct speculative_call_target): New struct.
14532         (class speculative_call_summary): New class.
14533         (class speculative_call_summaries): New class.
14534         (call_sums): New variable.
14535         (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
14536         (ipa_profile_write_edge_summary): New function.
14537         (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
14538         (ipa_profile_dump_all_summaries): New function.
14539         (ipa_profile_read_edge_summary): New function.
14540         (ipa_profile_read_summary_section): New function.
14541         (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
14542         (ipa_profile): Generate num_speculative_call_targets from
14543         profile summaries.
14544         * ipa-ref.h (speculative_id): New variable.
14545         * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
14546         * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
14547         common_target_probability.   Stream out speculative_id and
14548         num_speculative_call_targets.
14549         (input_edge): Likewise.
14550         * predict.c (dump_prediction): Remove edges count assert to be
14551         precise.
14552         * symtab.c (symtab_node::create_reference): Init speculative_id.
14553         (symtab_node::clone_references): Clone speculative_id.
14554         (symtab_node::clone_referring): Clone speculative_id.
14555         (symtab_node::clone_reference): Clone speculative_id.
14556         (symtab_node::clear_stmts_in_references): Clear speculative_id.
14557         * tree-inline.c (copy_bb): Duplicate all the speculative edges
14558         if indirect call contains multiple speculative targets.
14559         * value-prof.h  (check_ic_target): Remove.
14560         * value-prof.c  (gimple_value_profile_transformations):
14561         Use void function gimple_ic_transform.
14562         * value-prof.c  (gimple_ic_transform): Handle topn case.
14563         Fix comment typos.  Change it to a void function.
14564
14565 2020-01-13  Andrew Pinski  <apinski@marvell.com>
14566
14567         * config/aarch64/aarch64-cores.def (octeontx2): New define.
14568         (octeontx2t98): New define.
14569         (octeontx2t96): New define.
14570         (octeontx2t93): New define.
14571         (octeontx2f95): New define.
14572         (octeontx2f95n): New define.
14573         (octeontx2f95mm): New define.
14574         * config/aarch64/aarch64-tune.md: Regenerate.
14575         * doc/invoke.texi (-mcpu=): Document the new cpu types.
14576
14577 2020-01-13  Jason Merrill  <jason@redhat.com>
14578
14579         PR c++/33799 - destroy return value if local cleanup throws.
14580         * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
14581
14582 2020-01-13  Martin Liska  <mliska@suse.cz>
14583
14584         * ipa-cp.c (get_max_overall_size): Use newly
14585         renamed param param_ipa_cp_unit_growth.
14586         * params.opt: Remove legacy param name.
14587
14588 2020-01-13  Martin Sebor  <msebor@redhat.com>
14589
14590         PR tree-optimization/93213
14591         * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
14592         stores to be eliminated.
14593
14594 2020-01-13  Martin Liska  <mliska@suse.cz>
14595
14596         * opts.c (print_help): Do not print CL_PARAM
14597         and CL_WARNING for CL_OPTIMIZATION.
14598
14599 2020-01-13  Jonathan Wakely  <jwakely@redhat.com>
14600
14601         PR driver/92757
14602         * doc/invoke.texi (Warning Options): Add caveat about some warnings
14603         depending on optimization settings.
14604
14605 2020-01-13  Jakub Jelinek  <jakub@redhat.com>
14606
14607         PR tree-optimization/90838
14608         * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
14609         SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
14610         argument rather than to initialize temporary for targets that
14611         don't use the mode argument at all.  Initialize ctzval to avoid
14612         warning at -O0.
14613
14614 2020-01-10  Thomas Schwinge  <thomas@codesourcery.com>
14615
14616         * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
14617         * tree-core.h: Document it.
14618         * gimplify.c (gimplify_omp_workshare): Set it.
14619         * omp-low.c (lower_omp_target): Use it.
14620         * tree-pretty-print.c (dump_omp_clause): Print it.
14621
14622         * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
14623         Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
14624
14625 2020-01-10  David Malcolm  <dmalcolm@redhat.com>
14626
14627         * Makefile.in (OBJS): Add tree-diagnostic-path.o.
14628         * common.opt (fdiagnostics-path-format=): New option.
14629         (diagnostic_path_format): New enum.
14630         (fdiagnostics-show-path-depths): New option.
14631         * coretypes.h (diagnostic_event_id_t): New forward decl.
14632         * diagnostic-color.c (color_dict): Add "path".
14633         * diagnostic-event-id.h: New file.
14634         * diagnostic-format-json.cc (json_from_expanded_location): Make
14635         non-static.
14636         (json_end_diagnostic): Call context->make_json_for_path if it
14637         exists and the diagnostic has a path.
14638         (diagnostic_output_format_init): Clear context->print_path.
14639         * diagnostic-path.h: New file.
14640         * diagnostic-show-locus.c (colorizer::set_range): Special-case
14641         when printing a run of events in a diagnostic_path so that they
14642         all get the same color.
14643         (layout::m_diagnostic_path_p): New field.
14644         (layout::layout): Initialize it.
14645         (layout::print_any_labels): Don't colorize the label text for an
14646         event in a diagnostic_path.
14647         (gcc_rich_location::add_location_if_nearby): Add
14648         "restrict_to_current_line_spans" and "label" params.  Pass the
14649         former to layout.maybe_add_location_range; pass the latter
14650         when calling add_range.
14651         * diagnostic.c: Include "diagnostic-path.h".
14652         (diagnostic_initialize): Initialize context->path_format and
14653         context->show_path_depths.
14654         (diagnostic_show_any_path): New function.
14655         (diagnostic_path::interprocedural_p): New function.
14656         (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
14657         (simple_diagnostic_path::num_events): New function.
14658         (simple_diagnostic_path::get_event): New function.
14659         (simple_diagnostic_path::add_event): New function.
14660         (simple_diagnostic_event::simple_diagnostic_event): New ctor.
14661         (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
14662         (debug): New overload taking a diagnostic_path *.
14663         * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
14664         * diagnostic.h (enum diagnostic_path_format): New enum.
14665         (json::value): New forward decl.
14666         (diagnostic_context::path_format): New field.
14667         (diagnostic_context::show_path_depths): New field.
14668         (diagnostic_context::print_path): New callback field.
14669         (diagnostic_context::make_json_for_path): New callback field.
14670         (diagnostic_show_any_path): New decl.
14671         (json_from_expanded_location): New decl.
14672         * doc/invoke.texi (-fdiagnostics-path-format=): New option.
14673         (-fdiagnostics-show-path-depths): New option.
14674         (-fdiagnostics-color): Add "path" to description of default
14675         GCC_COLORS; describe it.
14676         (-fdiagnostics-format=json): Document how diagnostic paths are
14677         represented in the JSON output format.
14678         * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
14679         Add optional params "restrict_to_current_line_spans" and "label".
14680         * opts.c (common_handle_option): Handle
14681         OPT_fdiagnostics_path_format_ and
14682         OPT_fdiagnostics_show_path_depths.
14683         * pretty-print.c: Include "diagnostic-event-id.h".
14684         (pp_format): Implement "%@" format code for printing
14685         diagnostic_event_id_t *.
14686         (selftest::test_pp_format): Add tests for "%@".
14687         * selftest-run-tests.c (selftest::run_tests): Call
14688         selftest::tree_diagnostic_path_cc_tests.
14689         * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
14690         * toplev.c (general_init): Initialize global_dc->path_format and
14691         global_dc->show_path_depths.
14692         * tree-diagnostic-path.cc: New file.
14693         * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
14694         non-static.  Drop "diagnostic" param in favor of storing the
14695         original value of "where" and re-using it.
14696         (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
14697         maybe_unwind_expanded_macro_loc.
14698         (tree_diagnostics_defaults): Initialize context->print_path and
14699         context->make_json_for_path.
14700         * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
14701         decl.
14702         (default_tree_make_json_for_path): New decl.
14703         (maybe_unwind_expanded_macro_loc): New decl.
14704
14705 2020-01-10  Jakub Jelinek  <jakub@redhat.com>
14706
14707         PR tree-optimization/93210
14708         * fold-const.h (native_encode_initializer,
14709         can_native_interpret_type_p): Declare.
14710         * fold-const.c (native_encode_string): Fix up handling with off != -1,
14711         simplify.
14712         (native_encode_initializer): New function, moved from dwarf2out.c.
14713         Adjust to native_encode_expr compatible arguments, including dry-run
14714         and partial extraction modes.  Don't handle STRING_CST.
14715         (can_native_interpret_type_p): No longer static.
14716         * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
14717         offset / BITS_PER_UNIT fits into int and don't call it if
14718         can_native_interpret_type_p fails.  If suboff is NULL and for
14719         CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
14720         native_encode_initializer.
14721         (fold_const_aggregate_ref_1): Formatting fix.
14722         * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
14723         (tree_add_const_value_attribute): Adjust caller.
14724
14725         PR tree-optimization/90838
14726         * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
14727         SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
14728         CTZ_DEFINED_VALUE_AT_ZERO.
14729
14730 2020-01-10  Vladimir Makarov  <vmakarov@redhat.com>
14731
14732         PR inline-asm/93027
14733         * lra-constraints.c (match_reload): Permit input operands have the
14734         same mode as output while other input operands have a different
14735         mode.
14736
14737 2020-01-10  Wilco Dijkstra  <wdijkstr@arm.com>
14738
14739         PR tree-optimization/90838
14740         * tree-ssa-forwprop.c (check_ctz_array): Add new function.
14741         (check_ctz_string): Likewise.
14742         (optimize_count_trailing_zeroes): Likewise.
14743         (simplify_count_trailing_zeroes): Likewise.
14744         (pass_forwprop::execute): Try ctz simplification.
14745         * match.pd: Add matching for ctz idioms.
14746
14747 2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
14748
14749         * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
14750         for target hook.
14751         (aarch64_invalid_unary_op): New function for target hook.
14752         (aarch64_invalid_binary_op): New function for target hook.
14753
14754 2020-01-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
14755
14756         * config.gcc: Add arm_bf16.h.
14757         * config/aarch64/aarch64-builtins.c
14758         (aarch64_simd_builtin_std_type): Add BFmode.
14759         (aarch64_init_simd_builtin_types): Define element types for vector
14760         types.
14761         (aarch64_init_bf16_types): New function.
14762         (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
14763         * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
14764         modes.
14765         * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
14766         * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
14767         patterns.
14768         * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
14769         (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
14770         * config/aarch64/aarch64.c
14771         (aarch64_classify_vector_mode): Add support for BF types.
14772         (aarch64_gimplify_va_arg_expr): Add support for BF types.
14773         (aarch64_vq_mode): Add support for BF types.
14774         (aarch64_simd_container_mode): Add support for BF types.
14775         (aarch64_mangle_type): Add support for BF scalar type.
14776         * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
14777         * config/aarch64/arm_bf16.h: New file.
14778         * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
14779         * config/aarch64/iterators.md: Add BF types to mode attributes.
14780         (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
14781
14782 2020-01-10  Jason Merrill  <jason@redhat.com>
14783
14784         PR c++/93173 - incorrect tree sharing.
14785         * gimplify.c (copy_if_shared): No longer static.
14786         * gimplify.h: Declare it.
14787
14788 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
14789
14790         * doc/invoke.texi (-msve-vector-bits=): Document that
14791         -msve-vector-bits=128 now generates VL-specific code for
14792         little-endian targets.
14793         * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
14794         build_vector_type_for_mode to construct the data vector types.
14795         * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
14796         VL-specific code for -msve-vector-bits=128 on little-endian targets.
14797         (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
14798         for 128-bit vectors.
14799
14800 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
14801
14802         * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
14803         invocation.
14804
14805 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
14806
14807         * config/aarch64/aarch64-builtins.c
14808         (aarch64_builtin_vectorized_function): Check for specific vector modes,
14809         rather than checking the number of elements and the element mode.
14810
14811 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
14812
14813         * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
14814         get_related_vectype_for_scalar_type rather than build_vector_type
14815         to create the index type for a conditional reduction.
14816
14817 2020-01-10  Richard Sandiford  <richard.sandiford@arm.com>
14818
14819         * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
14820         for any type of gather or scatter, including strided accesses.
14821
14822 2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>
14823
14824         * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
14825          comment.
14826
14827 2020-01-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>
14828
14829         * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
14830         get_dr_vinfo_offset
14831         * tree-vect-loop.c (update_epilogue_loop_vinfo):  Remove orig_drs_init
14832         parameter and its use to reset DR_OFFSET's.
14833         (vect_transform_loop): Remove orig_drs_init argument.
14834         * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
14835         member of dr_vec_info rather than the offset of the associated
14836         data_reference's innermost_loop_behavior.
14837         (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
14838         (vect_do_peeling): Remove orig_drs_init parameter and its construction.
14839         * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
14840         get_dr_vinfo_offset.
14841         (vectorizable_store): Likewise.
14842         (vectorizable_load): Likewise.
14843
14844 2020-01-10  Richard Biener  <rguenther@suse.de>
14845
14846         * gimple-ssa-store-merging
14847         (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
14848
14849 2020-01-10  Martin Liska  <mliska@suse.cz>
14850
14851         PR ipa/93217
14852         * ipa-inline-analysis.c (offline_size): Make proper parenthesis
14853         encapsulation that was there before r280040.
14854
14855 2020-01-10  Richard Biener  <rguenther@suse.de>
14856
14857         PR middle-end/93199
14858         * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
14859         sequences to avoid walking them again for secondary opportunities.
14860         (pass_lower_eh_dispatch::execute): Instead actually insert
14861         them here.
14862
14863 2020-01-10  Richard Biener  <rguenther@suse.de>
14864
14865         PR middle-end/93199
14866         * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
14867         (cleanup_all_empty_eh): Walk landing pads in reverse order to
14868         avoid quadraticness.
14869
14870 2020-01-10  Martin Jambor  <mjambor@suse.cz>
14871
14872         * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
14873         * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
14874         to get param_ipa_sra_max_replacements.
14875         (param_splitting_across_edge): Pass the caller to
14876         pull_accesses_from_callee.
14877
14878 2020-01-10  Martin Jambor  <mjambor@suse.cz>
14879
14880         * params.opt (param_ipcp_unit_growth): Mark as Optimization.
14881         * ipa-cp.c (max_new_size): Removed.
14882         (orig_overall_size): New variable.
14883         (get_max_overall_size): New function.
14884         (estimate_local_effects): Use it.  Adjust dump.
14885         (decide_about_value): Likewise.
14886         (ipcp_propagate_stage): Do not calculate max_new_size, just store
14887         orig_overall_size.  Adjust dump.
14888         (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
14889
14890 2020-01-10  Martin Jambor  <mjambor@suse.cz>
14891
14892         * params.opt (param_ipa_max_agg_items): Mark as Optimization
14893         * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
14894         instead of param_ipa_max_agg_items.
14895         (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
14896         optimization info for the callee.
14897
14898 2020-01-09  Kwok Cheung Yeung  <kcy@codesourcery.com>
14899
14900         * lto-streamer-in.c (input_function): Remove streamed-in inline debug
14901         markers if debug_inline_points is false.
14902
14903 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
14904
14905         * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
14906         extra_objs.
14907         * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
14908         aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
14909         aarch64-sve-builtins-sve2.h.
14910         (aarch64-sve-builtins-sve2.o): New rule.
14911         * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
14912         (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
14913         (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
14914         (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
14915         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
14916         TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
14917         TARGET_SVE2_SM4.
14918         * config/aarch64/aarch64-sve.md: Update comments with SVE2
14919         instructions that are handled here.
14920         (@cond_asrd<mode>): Generalize to...
14921         (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
14922         (*cond_asrd<mode>_2): Generalize to...
14923         (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
14924         (*cond_asrd<mode>_z): Generalize to...
14925         (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
14926         * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
14927         (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
14928         (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
14929         * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
14930         pattern.
14931         (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
14932         (@aarch64_scatter_stnt<mode>): Likewise.
14933         (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
14934         (@aarch64_mul_lane_<mode>): Likewise.
14935         (@aarch64_sve_suqadd<mode>_const): Likewise.
14936         (*<sur>h<addsub><mode>): Generalize to...
14937         (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
14938         new pattern.
14939         (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
14940         (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
14941         (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
14942         (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
14943         (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
14944         (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
14945         (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
14946         (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
14947         (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
14948         (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
14949         (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
14950         (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
14951         (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
14952         (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
14953         (@aarch64_sve_add_mul_lane_<mode>): Likewise.
14954         (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
14955         (@aarch64_sve2_xar<mode>): Likewise.
14956         (@aarch64_sve2_bcax<mode>): Likewise.
14957         (*aarch64_sve2_eor3<mode>): Rename to...
14958         (@aarch64_sve2_eor3<mode>): ...this.
14959         (@aarch64_sve2_bsl<mode>): New expander.
14960         (@aarch64_sve2_nbsl<mode>): Likewise.
14961         (@aarch64_sve2_bsl1n<mode>): Likewise.
14962         (@aarch64_sve2_bsl2n<mode>): Likewise.
14963         (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
14964         (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
14965         (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
14966         (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
14967         (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
14968         (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
14969         (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
14970         (<su>mull<bt><Vwide>): Generalize to...
14971         (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
14972         pattern.
14973         (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
14974         (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
14975         (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
14976         (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
14977         (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
14978         (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
14979         (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
14980         (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
14981         (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
14982         (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
14983         (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
14984         (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
14985         (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
14986         (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
14987         (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
14988         (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
14989         (<SHRNB:r>shrnb<mode>): Generalize to...
14990         (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
14991         new pattern.
14992         (<SHRNT:r>shrnt<mode>): Generalize to...
14993         (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
14994         new pattern.
14995         (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
14996         (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
14997         (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
14998         (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
14999         (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
15000         (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
15001         (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
15002         (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
15003         (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
15004         (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
15005         (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
15006         (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
15007         (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
15008         (@aarch64_sve2_cvtnt<mode>): Likewise.
15009         (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
15010         (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
15011         (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
15012         (@aarch64_sve2_cvtxnt<mode>): Likewise.
15013         (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
15014         (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
15015         (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
15016         (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
15017         (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
15018         (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
15019         (@aarch64_sve2_pmul<mode>): Likewise.
15020         (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
15021         (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
15022         (@aarch64_sve2_tbl2<mode>): Likewise.
15023         (@aarch64_sve2_tbx<mode>): Likewise.
15024         (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
15025         (@aarch64_sve2_histcnt<mode>): Likewise.
15026         (@aarch64_sve2_histseg<mode>): Likewise.
15027         (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
15028         (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
15029         (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
15030         (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
15031         (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
15032         (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
15033         (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
15034         (<su>mulh<r>s<mode>3): Update after above pattern name changes.
15035         * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
15036         (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
15037         (SVE2_PMULL_PAIR_I): New mode iterators.
15038         (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
15039         (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
15040         (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
15041         (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
15042         (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
15043         (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
15044         (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
15045         (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
15046         (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
15047         (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
15048         (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
15049         (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
15050         (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
15051         (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
15052         (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
15053         (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
15054         (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
15055         (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
15056         (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
15057         (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
15058         (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
15059         (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
15060         (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
15061         (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
15062         (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
15063         (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
15064         (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
15065         (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
15066         (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
15067         (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
15068         (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
15069         further down file.
15070         (VNARROW, Ventype): New mode attributes.
15071         (Vewtype): Handle VNx2DI.  Fix typo in comment.
15072         (VDOUBLE): New mode attribute.
15073         (sve_lane_con): Handle VNx8HI.
15074         (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
15075         (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
15076         (sve_int_op, sve_int_op_rev): Handle the above codes.
15077         (sve_pred_int_rhs2_operand): Likewise.
15078         (MULLBT, SHRNB, SHRNT): Delete.
15079         (SVE_INT_SHIFT_IMM): New int iterator.
15080         (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
15081         and UNSPEC_WHILEHS for TARGET_SVE2.
15082         (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
15083         (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
15084         (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
15085         (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
15086         (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
15087         (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
15088         (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
15089         (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
15090         (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
15091         (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
15092         (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
15093         (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
15094         (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
15095         (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
15096         (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
15097         (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
15098         (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
15099         (optab): Handle the new unspecs.
15100         (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
15101         and UNSPEC_RSHRNT.
15102         (lr): Handle the new unspecs.
15103         (bt): Delete.
15104         (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
15105         (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
15106         (sve_int_qsub_op): New int attributes.
15107         (sve_fp_op, rot): Handle the new unspecs.
15108         * config/aarch64/aarch64-sve-builtins.h
15109         (function_resolver::require_matching_pointer_type): Declare.
15110         (function_resolver::resolve_unary): Add an optional boolean argument.
15111         (function_resolver::finish_opt_n_resolution): Add an optional
15112         type_suffix_index argument.
15113         (gimple_folder::redirect_call): Declare.
15114         (gimple_expander::prepare_gather_address_operands): Add an optional
15115         bool parameter.
15116         * config/aarch64/aarch64-sve-builtins.cc: Include
15117         aarch64-sve-builtins-sve2.h.
15118         (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
15119         (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
15120         (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
15121         (TYPES_hsd_integer): Use TYPES_hsd_signed.
15122         (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
15123         (TYPES_s_unsigned): Likewise.
15124         (TYPES_s_integer): Use TYPES_s_unsigned.
15125         (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
15126         (TYPES_sd_integer): Use them.
15127         (TYPES_d_unsigned): New macro.
15128         (TYPES_d_integer): Use it.
15129         (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
15130         (TYPES_cvt_narrow): Likewise.
15131         (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
15132         (preds_mx): New variable.
15133         (function_builder::add_overloaded_function): Allow the new feature
15134         set to be more restrictive than the original one.
15135         (function_resolver::infer_pointer_type): Remove qualifiers from
15136         the pointer type before printing it.
15137         (function_resolver::require_matching_pointer_type): New function.
15138         (function_resolver::resolve_sv_displacement): Handle functions
15139         that don't support 32-bit vector indices or svint32_t vector offsets.
15140         (function_resolver::finish_opt_n_resolution): Take the inferred type
15141         as a separate argument.
15142         (function_resolver::resolve_unary): Optionally treat all forms in
15143         the same way as normal merging functions.
15144         (gimple_folder::redirect_call): New function.
15145         (function_expander::prepare_gather_address_operands): Add an argument
15146         that says whether scaled forms are available.  If they aren't,
15147         handle scaling of vector indices and don't add the extension and
15148         scaling operands.
15149         (function_expander::map_to_unspecs): If aarch64_sve isn't available,
15150         fall back to using cond_* instead.
15151         * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
15152         Split out the member variables into...
15153         (rtx_code_function_base): ...this new base class.
15154         (rtx_code_function_rotated): Inherit rtx_code_function_base.
15155         (unspec_based_function): Split out the member variables into...
15156         (unspec_based_function_base): ...this new base class.
15157         (unspec_based_function_rotated): Inherit unspec_based_function_base.
15158         (unspec_based_function_exact_insn): New class.
15159         (unspec_based_add_function, unspec_based_add_lane_function)
15160         (unspec_based_lane_function, unspec_based_pred_function)
15161         (unspec_based_qadd_function, unspec_based_qadd_lane_function)
15162         (unspec_based_qsub_function, unspec_based_qsub_lane_function)
15163         (unspec_based_sub_function, unspec_based_sub_lane_function): New
15164         typedefs.
15165         (unspec_based_fused_function): New class.
15166         (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
15167         (unspec_based_fused_lane_function): New class.
15168         (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
15169         typedefs.
15170         (CODE_FOR_MODE1): New macro.
15171         (fixed_insn_function): New class.
15172         (while_comparison): Likewise.
15173         * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
15174         (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
15175         (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
15176         (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
15177         (load_gather_sv_restricted, shift_left_imm_long): Declare.
15178         (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
15179         (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
15180         (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
15181         (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
15182         (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
15183         (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
15184         (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
15185         (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
15186         * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
15187         Also add an initial argument for unary_convert_narrowt, regardless
15188         of the predication type.
15189         (build_32_64): Allow loads and stores to specify MODE_none.
15190         (build_sv_index64, build_sv_uint_offset): New functions.
15191         (long_type_suffix): New function.
15192         (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
15193         (binary_imm_long_base, load_gather_sv_base): Likewise.
15194         (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
15195         (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
15196         (unary_narrowb_base, unary_narrowt_base): Likewise.
15197         (binary_long_lane_def, binary_long_lane): New shape.
15198         (binary_long_opt_n_def, binary_long_opt_n): Likewise.
15199         (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
15200         (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
15201         (binary_to_uint_def, binary_to_uint): Likewise.
15202         (binary_wide_def, binary_wide): Likewise.
15203         (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
15204         (compare_def, compare): Likewise.
15205         (compare_ptr_def, compare_ptr): Likewise.
15206         (load_ext_gather_index_restricted_def,
15207         load_ext_gather_index_restricted): Likewise.
15208         (load_ext_gather_offset_restricted_def,
15209         load_ext_gather_offset_restricted): Likewise.
15210         (load_gather_sv_def): Inherit from load_gather_sv_base.
15211         (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
15212         (shift_left_imm_def, shift_left_imm): Likewise.
15213         (shift_left_imm_long_def, shift_left_imm_long): Likewise.
15214         (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
15215         (store_scatter_index_restricted_def,
15216         store_scatter_index_restricted): Likewise.
15217         (store_scatter_offset_restricted_def,
15218         store_scatter_offset_restricted): Likewise.
15219         (tbl_tuple_def, tbl_tuple): Likewise.
15220         (ternary_long_lane_def, ternary_long_lane): Likewise.
15221         (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
15222         (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
15223         (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
15224         (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
15225         (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
15226         (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
15227         (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
15228         (ternary_uint_def, ternary_uint): Likewise.
15229         (unary_convert): Fix typo in comment.
15230         (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
15231         (unary_long_def, unary_long): Likewise.
15232         (unary_narrowb_def, unary_narrowb): Likewise.
15233         (unary_narrowt_def, unary_narrowt): Likewise.
15234         (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
15235         (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
15236         (unary_to_int_def, unary_to_int): Likewise.
15237         * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
15238         (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
15239         (svasrd_impl): Delete.
15240         (svcadd_impl::expand): Handle integer operations too.
15241         (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
15242         new functions to derive the unspec numbers.
15243         (svmla_svmls_lane_impl): Replace with...
15244         (svmla_lane_impl, svmls_lane_impl): ...these new classes.  Handle
15245         integer operations too.
15246         (svwhile_impl): Rename to...
15247         (svwhilelx_impl): ...this and inherit from while_comparison.
15248         (svasrd): Use unspec_based_function.
15249         (svmla_lane): Use svmla_lane_impl.
15250         (svmls_lane): Use svmls_lane_impl.
15251         (svrecpe, svrsqrte): Handle unsigned integer operations too.
15252         (svwhilele, svwhilelt): Use svwhilelx_impl.
15253         * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
15254         * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
15255         * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
15256         * config/aarch64/aarch64-sve-builtins.def: Include
15257         aarch64-sve-builtins-sve2.def.
15258
15259 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15260
15261         * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
15262         (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
15263         * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
15264         (aarch64_sve_sqadd_sqsub_immediate_p): Likewise.  Handle scalar
15265         immediates as well as vector ones.
15266         * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
15267         (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
15268         (aarch64_sve_qsub_immediate): Update calls accordingly.
15269
15270 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15271
15272         * config/aarch64/aarch64-sve2.md: Add banner comments.
15273         (<su>mulh<r>s<mode>3): Move further up file.
15274         (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
15275         (*aarch64_sve2_sra<mode>): Move further down file.
15276         * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
15277
15278 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15279
15280         * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
15281         and UNSPEC_WHILEWR.
15282         (while_optab_cmp): Handle them.
15283         * config/aarch64/aarch64-sve.md
15284         (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
15285         and add a "@" marker.
15286         * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
15287         instead of gen_aarch64_sve2_while_ptest.
15288         (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
15289
15290 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15291
15292         * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
15293         (UNSPEC_WHILELE): ...this.
15294         (UNSPEC_WHILE_LO): Rename to...
15295         (UNSPEC_WHILELO): ...this.
15296         (UNSPEC_WHILE_LS): Rename to...
15297         (UNSPEC_WHILELS): ...this.
15298         (UNSPEC_WHILE_LT): Rename to...
15299         (UNSPEC_WHILELT): ...this.
15300         * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
15301         (cmp_op, while_optab_cmp): Likewise.
15302         * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
15303         * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
15304         (svwhilelt): Likewise.
15305
15306 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15307
15308         * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
15309         (unary_to_uint): Define.
15310         * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
15311         (unary_count): Rename to...
15312         (unary_to_uint_def, unary_to_uint): ...this.
15313         * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
15314
15315 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15316
15317         * config/aarch64/aarch64-sve-builtins-functions.h
15318         (code_for_mode_function): New class.
15319         (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
15320         * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
15321         (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
15322         (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
15323         (svmul_lane, svtmad): Use CODE_FOR_MODE0.
15324
15325 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15326
15327         * config/aarch64/iterators.md (addsub): New code attribute.
15328         * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
15329         Re-express as...
15330         (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
15331         in the asm string and attributes.  Fix indentation.
15332         * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
15333         Re-express as...
15334         (@aarch64_sve_<optab><mode>): ...this.
15335         * config/aarch64/aarch64-sve-builtins.h
15336         (function_expander::expand_signed_unpred_op): Delete.
15337         * config/aarch64/aarch64-sve-builtins.cc
15338         (function_expander::expand_signed_unpred_op): Likewise.
15339         (function_expander::map_to_rtx_codes): If the optab isn't defined,
15340         try using code_for_aarch64_sve instead.
15341         * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
15342         (svqsub_impl): Likewise.
15343         (svqadd, svqsub): Use rtx_code_function instead.
15344
15345 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15346
15347         * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
15348         (HADDSUB, sur, addsub): Remove them.
15349
15350 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15351
15352         * tree-nrv.c (pass_return_slot::execute): Handle all internal
15353         functions the same way, rather than singling out those that
15354         aren't mapped directly to optabs.
15355
15356 2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>
15357
15358         * target.def (compatible_vector_types_p): New target hook.
15359         * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
15360         * hooks.c (hook_bool_const_tree_const_tree_true): New function.
15361         * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
15362         * doc/tm.texi: Regenerate.
15363         * gimple-expr.c: Include target.h.
15364         (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
15365         * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
15366         function.
15367         (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
15368         * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
15369         Use the original predicate if it already has a suitable type.
15370
15371 2020-01-09  Martin Jambor  <mjambor@suse.cz>
15372
15373         * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
15374         resolve_speculation and redirect_call_stmt_to_callee static.  Change
15375         return type of set_call_stmt to cgraph_edge *.
15376         * auto-profile.c (afdo_indirect_call): Adjust call to
15377         redirect_call_stmt_to_callee.
15378         * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
15379         make the this pointer explicit, adjust self-recursive calls and the
15380         call top make_direct.  Return the resulting edge.
15381         (cgraph_edge::remove): Make this pointer explicit.
15382         (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
15383         (cgraph_edge::make_direct): Likewise, adjust call to
15384         resolve_speculation.
15385         (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
15386         call to set_call_stmt.
15387         (cgraph_update_edges_for_call_stmt_node): Update call to
15388         set_call_stmt and remove.
15389         * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
15390         Renamed edge to master_edge.  Adjusted calls to set_call_stmt.
15391         (cgraph_node::create_edge_including_clones): Moved "first" definition
15392         of edge to the block where it was used.  Adjusted calls to
15393         set_call_stmt.
15394         (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
15395         cgraph_edge::remove.
15396         * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
15397         make_direct and redirect_call_stmt_to_callee.
15398         * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
15399         resolve_speculation and make_direct.
15400         * ipa-inline-transform.c (inline_transform): Adjust call to
15401         redirect_call_stmt_to_callee.
15402         (check_speculations_1):: Adjust call to resolve_speculation.
15403         * ipa-inline.c (resolve_noninline_speculation): Adjust call to
15404         resolve-speculation.
15405         (inline_small_functions): Adjust call to resolve_speculation.
15406         (ipa_inline): Likewise.
15407         * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
15408         make_direct.
15409         * ipa-visibility.c (function_and_variable_visibility): Make iteration
15410         safe with regards to edge removal, adjust calls to
15411         redirect_call_stmt_to_callee.
15412         * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
15413         and redirect_call_stmt_to_callee.
15414         * multiple_target.c (create_dispatcher_calls): Adjust call to
15415         redirect_call_stmt_to_callee
15416         (redirect_to_specific_clone): Likewise.
15417         * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
15418         Adjust calls to cgraph_edge::remove.
15419         * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
15420         (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
15421         (expand_call_inline): Adjust call to cgraph_edge::remove.
15422
15423 2020-01-09  Martin Liska  <mliska@suse.cz>
15424
15425         * params.opt: Set Optimization for
15426         param_max_speculative_devirt_maydefs.
15427
15428 2020-01-09  Martin Sebor  <msebor@redhat.com>
15429
15430         PR middle-end/93200
15431         PR fortran/92956
15432         * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
15433
15434 2020-01-09  Martin Liska  <mliska@suse.cz>
15435
15436         * auto-profile.c (auto_profile): Use opt_for_fn
15437         for a parameter.
15438         * ipa-cp.c (ipcp_lattice::add_value): Likewise.
15439         (propagate_vals_across_arith_jfunc): Likewise.
15440         (hint_time_bonus): Likewise.
15441         (incorporate_penalties): Likewise.
15442         (good_cloning_opportunity_p): Likewise.
15443         (perform_estimation_of_a_value): Likewise.
15444         (estimate_local_effects): Likewise.
15445         (ipcp_propagate_stage): Likewise.
15446         * ipa-fnsummary.c (decompose_param_expr): Likewise.
15447         (set_switch_stmt_execution_predicate): Likewise.
15448         (analyze_function_body): Likewise.
15449         * ipa-inline-analysis.c (offline_size): Likewise.
15450         * ipa-inline.c (early_inliner): Likewise.
15451         * ipa-prop.c (ipa_analyze_node): Likewise.
15452         (ipcp_transform_function): Likewise.
15453         * ipa-sra.c (process_scan_results): Likewise.
15454         (ipa_sra_summarize_function): Likewise.
15455         * params.opt: Rename ipcp-unit-growth to
15456         ipa-cp-unit-growth.  Add Optimization for various
15457         IPA-related parameters.
15458
15459 2020-01-09  Richard Biener  <rguenther@suse.de>
15460
15461         PR middle-end/93054
15462         * gimplify.c (gimplify_expr): Deal with NOP definitions.
15463
15464 2020-01-09  Richard Biener  <rguenther@suse.de>
15465
15466         PR tree-optimization/93040
15467         * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
15468
15469 2020-01-09  Georg-Johann Lay  <avr@gjlay.de>
15470
15471         * common/config/avr/avr-common.c (avr_option_optimization_table)
15472         [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
15473
15474 2020-01-09  Martin Liska  <mliska@suse.cz>
15475
15476         * cgraphclones.c (symbol_table::materialize_all_clones):
15477         Use cgraph_node::dump_name.
15478
15479 2020-01-09  Jakub Jelinek  <jakub@redhat.com>
15480
15481         PR inline-asm/93202
15482         * config/riscv/riscv.c (riscv_print_operand_reloc): Use
15483         output_operand_lossage instead of gcc_unreachable.
15484         * doc/md.texi (riscv f constraint): Fix typo.
15485
15486         PR target/93141
15487         * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
15488         SWI.  Use <general_hilo_operand> instead of <general_operand>.  Use
15489         CONST_SCALAR_INT_P instead of CONST_INT_P.
15490         (*subv<mode>4_1): Rename to ...
15491         (subv<mode>4_1): ... this.
15492         (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
15493         define_insn_and_split patterns.
15494         (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
15495         patterns.
15496
15497 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
15498
15499         * vec.c (class selftest::count_dtor): New class.
15500         (selftest::test_auto_delete_vec): New test.
15501         (selftest::vec_c_tests): Call it.
15502         * vec.h (class auto_delete_vec): New class template.
15503         (auto_delete_vec<T>::~auto_delete_vec): New dtor.
15504
15505 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
15506
15507         * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
15508
15509 2020-01-08  Jim Wilson  <jimw@sifive.com>
15510
15511         * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
15512         use of TLS_MODEL_LOCAL_EXEC when not pic.
15513
15514 2020-01-08  David Malcolm  <dmalcolm@redhat.com>
15515
15516         * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
15517         memory leak.
15518
15519 2020-01-08  Jakub Jelinek  <jakub@redhat.com>
15520
15521         PR target/93187
15522         * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
15523         *stack_protect_set_3 peephole2): Also check that the second
15524         insns source is general_operand.
15525
15526         PR target/93174
15527         * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
15528         predicate for output operand instead of register_operand.
15529         (addcarry<mode>, addcarry<mode>_1): Likewise.  Add alternative with
15530         memory destination and non-memory operands[2].
15531
15532 2020-01-08  Martin Liska  <mliska@suse.cz>
15533
15534         * cgraph.c (cgraph_node::dump): Use ::dump_name or
15535         ::dump_asm_name instead of (::name or ::asm_name).
15536         * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
15537         * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
15538         (analyze_functions): Likewise.
15539         (expand_all_functions): Likewise.
15540         * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
15541         (propagate_bits_across_jump_function): Likewise.
15542         (dump_profile_updates): Likewise.
15543         (ipcp_store_bits_results): Likewise.
15544         (ipcp_store_vr_results): Likewise.
15545         * ipa-devirt.c (dump_targets): Likewise.
15546         * ipa-fnsummary.c (analyze_function_body): Likewise.
15547         * ipa-hsa.c (check_warn_node_versionable): Likewise.
15548         (process_hsa_functions): Likewise.
15549         * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
15550         (set_alias_uids): Likewise.
15551         * ipa-inline-transform.c (save_inline_function_body): Likewise.
15552         * ipa-inline.c (recursive_inlining): Likewise.
15553         (inline_to_all_callers_1): Likewise.
15554         (ipa_inline): Likewise.
15555         * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
15556         (ipa_propagate_frequency): Likewise.
15557         * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
15558         (remove_described_reference): Likewise.
15559         * ipa-pure-const.c (worse_state): Likewise.
15560         (check_retval_uses): Likewise.
15561         (analyze_function): Likewise.
15562         (propagate_pure_const): Likewise.
15563         (propagate_nothrow): Likewise.
15564         (dump_malloc_lattice): Likewise.
15565         (propagate_malloc): Likewise.
15566         (pass_local_pure_const::execute): Likewise.
15567         * ipa-visibility.c (optimize_weakref): Likewise.
15568         (function_and_variable_visibility): Likewise.
15569         * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
15570         (ipa_discover_variable_flags): Likewise.
15571         * lto-streamer-out.c (output_function): Likewise.
15572         (output_constructor): Likewise.
15573         * tree-inline.c (copy_bb): Likewise.
15574         * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
15575         * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
15576
15577 2020-01-08  Richard Biener  <rguenther@suse.de>
15578
15579         PR middle-end/93199
15580         * tree-eh.c (sink_clobbers): Update virtual operands for
15581         the first and last stmt only.  Add a dry-run capability.
15582         (pass_lower_eh_dispatch::execute): Perform clobber sinking
15583         after CFG manipulations and in RPO order to catch all
15584         secondary opportunities reliably.
15585
15586 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
15587
15588         PR target/93182
15589         * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
15590
15591 2019-01-08  Richard Biener  <rguenther@suse.de>
15592
15593         PR middle-end/93199
15594         * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
15595         * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
15596         virtual operand, also updating SSA use.
15597         * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
15598         Update stmt after resetting virtual operand.
15599         (tree_loop_interchange::move_code_to_inner_loop): Likewise.
15600         * gimple-iterator.c (gsi_remove): When not removing the stmt
15601         permanently do not delink immediate uses or mark the stmt modified.
15602
15603 2020-01-08  Martin Liska  <mliska@suse.cz>
15604
15605         * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
15606         (ipa_call_context::estimate_size_and_time): Likewise.
15607         (inline_analyze_function): Likewise.
15608
15609 2020-01-08  Martin Liska  <mliska@suse.cz>
15610
15611         * cgraph.c (cgraph_node::dump): Use systematically
15612         dump_asm_name.
15613
15614 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
15615
15616         Add -nodevicespecs option for avr.
15617
15618         PR target/93182
15619         * config/avr/avr.opt (-nodevicespecs): New driver option.
15620         * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
15621         "-specs=device-specs/..." if that option is not set.
15622         * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
15623
15624 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
15625
15626         Implement 64-bit double functions for avr.
15627
15628         PR target/92055
15629         * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
15630         --with-double-comparison.
15631         * doc/install.texi: Document them.
15632         * config/avr/avr-c.c (avr_cpu_cpp_builtins)
15633         <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
15634         <WITH_DOUBLE_COMPARISON>: New built-in defines.
15635         * doc/invoke.texi (AVR Built-in Macros): Document them.
15636         * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
15637         * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
15638         * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
15639
15640 2020-01-08  Richard Earnshaw  <rearnsha@arm.com>
15641
15642         PR target/93188
15643         * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
15644         armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
15645         when only building rm-profile multilibs.
15646
15647 2020-01-08  Feng Xue  <fxue@os.amperecomputing.com>
15648
15649         PR ipa/93084
15650         * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
15651         lattice for a value to check.
15652         (propagate_vals_across_arith_jfunc): Add an assertion to ensure
15653         finite propagation in self-recursive scc.
15654
15655 2020-01-08  Luo Xiong Hu  <luoxhu@linux.ibm.com>
15656
15657         * ipa-inline.c (caller_growth_limits): Restore the AND.
15658
15659 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
15660
15661         * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
15662         (VEC_ALLREG_ALT): New iterator.
15663         (VEC_ALLREG_INT_MODE): New iterator.
15664         (VCMP_MODE): New iterator.
15665         (VCMP_MODE_INT): New iterator.
15666         (vec_cmpu<mode>di): Use VCMP_MODE_INT.
15667         (vec_cmp<u>v64qidi): New define_expand.
15668         (vec_cmp<mode>di_exec): Use VCMP_MODE.
15669         (vec_cmpu<mode>di_exec): New define_expand.
15670         (vec_cmp<u>v64qidi_exec): New define_expand.
15671         (vec_cmp<mode>di_dup): Use VCMP_MODE.
15672         (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
15673         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
15674         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
15675         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
15676         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
15677         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
15678         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
15679         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
15680         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
15681         this.
15682         * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
15683         * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
15684
15685 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
15686
15687         * config/gcn/constraints.md (DA): Update description and match.
15688         (DB): Likewise.
15689         (Db): New constraint.
15690         * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
15691         parameter.
15692         * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
15693         Implement 'Db' mixed immediate type.
15694         * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
15695         (addcv64si3_dup<exec_vcc>): Delete.
15696         (subcv64si3<exec_vcc>): Rework constraints.
15697         (addv64di3): Rework constraints.
15698         (addv64di3_exec): Rework constraints.
15699         (subv64di3): Rework constraints.
15700         (addv64di3_dup): Delete.
15701         (addv64di3_dup_exec): Delete.
15702         (addv64di3_zext): Rework constraints.
15703         (addv64di3_zext_exec): Rework constraints.
15704         (addv64di3_zext_dup): Rework constraints.
15705         (addv64di3_zext_dup_exec): Rework constraints.
15706         (addv64di3_zext_dup2): Rework constraints.
15707         (addv64di3_zext_dup2_exec): Rework constraints.
15708         (addv64di3_sext_dup2): Rework constraints.
15709         (addv64di3_sext_dup2_exec): Rework constraints.
15710
15711 2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
15712
15713         * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
15714         existing target checks.
15715
15716 2020-01-07  Richard Biener  <rguenther@suse.de>
15717
15718         * doc/install.texi: Bump minimal supported MPC version.
15719
15720 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
15721
15722         * langhooks-def.h (lhd_simulate_enum_decl): Declare.
15723         (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
15724         * langhooks.c: Include stor-layout.h.
15725         (lhd_simulate_enum_decl): New function.
15726         * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
15727         handle_arm_sve_h for the LTO frontend.
15728         (register_vector_type): Cope with null returns from pushdecl.
15729
15730 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
15731
15732         * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
15733         (aarch64_sve::nvectors_if_data_type): Replace with...
15734         (aarch64_sve::builtin_type_p): ...this.
15735         * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
15736         (find_vector_type): Delete.
15737         (add_sve_type_attribute): New function.
15738         (lookup_sve_type_attribute): Likewise.
15739         (register_builtin_types): Add an "SVE type" attribute to each type.
15740         (register_tuple_type): Likewise.
15741         (svbool_type_p, nvectors_if_data_type): Delete.
15742         (mangle_builtin_type): Use lookup_sve_type_attribute.
15743         (builtin_type_p): Likewise.  Add an overload that returns the
15744         number of constituent vector and predicate registers.
15745         * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
15746         (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
15747         instead of aarch64_sve_argument_p.
15748         (aarch64_takes_arguments_in_sve_regs_p): Likewise.
15749         (aarch64_pass_by_reference): Likewise.
15750         (aarch64_function_value_1): Likewise.
15751         (aarch64_return_in_memory): Likewise.
15752         (aarch64_layout_arg): Likewise.
15753
15754 2020-01-07  Jakub Jelinek  <jakub@redhat.com>
15755
15756         PR tree-optimization/93156
15757         * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
15758         least significant bit is always clear.
15759
15760         PR tree-optimization/93118
15761         * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
15762         simplifier with two intermediate conversions.
15763
15764 2020-01-07  Martin Liska  <mliska@suse.cz>
15765
15766         * params.opt: Add Optimization for various parameters.
15767
15768 2020-01-07  Martin Liska  <mliska@suse.cz>
15769
15770         PR ipa/83411
15771         * doc/extend.texi: Explain cloning for target_clone
15772         attribute.
15773
15774 2020-01-07  Martin Liska  <mliska@suse.cz>
15775
15776         PR tree-optimization/92860
15777         * common.opt: Make in Optimization option
15778         as it is affected by -O0, which is an Optimization
15779         option.
15780         * tree-inline.c (tree_inlinable_function_p):
15781         Use opt_for_fn for warn_inline.
15782         (expand_call_inline): Likewise.
15783
15784 2020-01-07  Martin Liska  <mliska@suse.cz>
15785
15786         PR tree-optimization/92860
15787         * common.opt: Make flag_ree as optimization
15788         attribute.
15789
15790 2020-01-07  Martin Liska  <mliska@suse.cz>
15791
15792         PR optimization/92860
15793         * params.opt: Mark param_min_crossjump_insns with Optimization
15794         keyword.
15795
15796 2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>
15797
15798         * ipa-inline-analysis.c (estimate_growth): Fix typo.
15799         * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
15800
15801 2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
15802
15803         * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
15804         helper function to return the valid addressing formats for a given
15805         hard register and mode.
15806         (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
15807
15808         * config/rs6000/constraints.md (Q constraint): Update
15809         documentation.
15810         * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
15811         documentation.
15812
15813         * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
15814         Use 'Q' for doing vector extract from memory.
15815         (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
15816         memory.
15817         (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
15818         doing vector extract from memory.
15819         (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
15820         extract from memory.
15821
15822         * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
15823         for the offset being 34-bits when -mcpu=future is used.
15824
15825 2020-01-06  John David Anglin  <danglin@gcc.gnu.org>
15826
15827         * config/pa/pa.md: Revert change to use ordered_comparison_operator
15828         instead of cmpib_comparison_operator in cmpib patterns.
15829         * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
15830         of cmpib_comparison_operator.  Revise comment.
15831
15832 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
15833
15834         * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
15835         in an IFN_DIV_POW2 node to be equal.
15836
15837 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
15838
15839         * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
15840         (vect_check_scalar_mask): ...this.
15841         (vectorizable_store, vectorizable_load): Update call accordingly.
15842         (vectorizable_call): Use vect_check_scalar_mask to check the mask
15843         argument in calls to conditional internal functions.
15844
15845 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
15846
15847         * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
15848         '0' matching inputs.
15849         (subv64di3_exec): Likewise.
15850
15851 2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>
15852
15853         * config/mips/mips.c (vr4130_align_insns): Fix typo.
15854         * doc/md.texi (movstr): Likewise.
15855
15856 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
15857
15858         * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
15859         clobber.
15860
15861 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
15862
15863         * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
15864         Depend on...
15865         (s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
15866         to a temporary file and use move-if-change to update the real
15867         file where necessary.
15868
15869 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
15870
15871         * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
15872         rather than Upa for CPY /M.
15873
15874 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
15875
15876         * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
15877         immediate.
15878
15879 2020-01-06  Martin Liska  <mliska@suse.cz>
15880
15881     PR tree-optimization/92860
15882     * params.opt: Mark param_max_combine_insns with Optimization
15883     keyword.
15884
15885 2020-01-05  Jakub Jelinek  <jakub@redhat.com>
15886
15887         PR target/93141
15888         * config/i386/i386.md (SWIDWI): New mode iterator.
15889         (DWI, dwi): Add TImode variants.
15890         (addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
15891         <general_hilo_operand> instead of <general_operand>.  Use
15892         CONST_SCALAR_INT_P instead of CONST_INT_P.
15893         (*addv<mode>4_1): Rename to ...
15894         (addv<mode>4_1): ... this.
15895         (QWI): New mode attribute.
15896         (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
15897         define_insn_and_split patterns.
15898         (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
15899         patterns.
15900         (uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
15901         <general_hilo_operand> instead of <general_operand>.
15902         (*addcarry<mode>_1): New define_insn.
15903         (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
15904
15905 2020-01-03  Konstantin Kharlamov  <Hi-Angel@yandex.ru>
15906
15907         * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
15908         Use "call" instead of "set".
15909
15910 2020-01-03  Martin Jambor  <mjambor@suse.cz>
15911
15912         PR ipa/92917
15913         * ipa-cp.c (print_all_lattices): Skip functions without info.
15914
15915 2020-01-03  Jakub Jelinek  <jakub@redhat.com>
15916
15917         PR target/93089
15918         * config/i386/i386-options.c (ix86_simd_clone_adjust): If
15919         TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
15920         simd clones.  If TARGET_PREFER_AVX256, use prefer-vector-width=512
15921         for 'e' simd clones.
15922
15923         PR target/93089
15924         * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
15925         entry.
15926         (mprefer-vector-width=): Add Save.
15927         * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
15928         -mprefer-vector-width= if non-zero.  Fix up -mfpmath= comment.
15929         (ix86_debug_options, ix86_function_specific_print): Adjust
15930         ix86_target_string callers.
15931         (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
15932         (ix86_valid_target_attribute_tree): Likewise.
15933         * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
15934         * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
15935         ix86_target_string caller.
15936
15937         PR target/93110
15938         * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
15939         emitting ASHIFTRT, XOR and MINUS by hand.  Use gen_int_mode with QImode
15940         instead of gen_int_shift_amount + convert_modes.
15941
15942         PR rtl-optimization/93088
15943         * loop-iv.c (find_single_def_src): Punt after looking through
15944         128 reg copies for regs with single definitions.  Move definitions
15945         to first uses.
15946
15947 2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>
15948
15949         * config/arm/arm-c.c (arm_cpu_builtins): Define
15950         __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
15951         __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
15952         __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
15953         * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
15954         * config/arm/arm-tables.opt: Regenerated.
15955         * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
15956         arm_arch_i8mm and arm_arch_bf16 when enabled.
15957         * config/arm/arm.h (TARGET_I8MM): New macro.
15958         (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
15959         * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
15960         * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
15961         * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
15962         (v8_6_a_simd_variants): New.
15963         (v8_*_a_simd_variants): Add i8mm and bf16.
15964         * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
15965
15966 2020-01-02  Jakub Jelinek  <jakub@redhat.com>
15967
15968         PR ipa/93087
15969         * predict.c (compute_function_frequency): Don't call
15970         warn_function_cold on functions that already have cold attribute.
15971
15972 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
15973
15974         PR target/67834
15975         * config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
15976         COMDAT group function labels in .data.rel.ro.local section.
15977         * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
15978
15979         PR target/93111
15980         * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
15981         comparison_operator in B and S integer comparisons.  Likewise, use
15982         ordered_comparison_operator instead of cmpib_comparison_operator in
15983         cmpib patterns.
15984         * config/pa/predicates.md (cmpib_comparison_operator): Remove.
15985
15986 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
15987
15988         Update copyright years.
15989
15990         * gcc.c (process_command): Update copyright notice dates.
15991         * gcov-dump.c (print_version): Ditto.
15992         * gcov.c (print_version): Ditto.
15993         * gcov-tool.c (print_version): Ditto.
15994         * gengtype.c (create_file): Ditto.
15995         * doc/cpp.texi: Bump @copying's copyright year.
15996         * doc/cppinternals.texi: Ditto.
15997         * doc/gcc.texi: Ditto.
15998         * doc/gccint.texi: Ditto.
15999         * doc/gcov.texi: Ditto.
16000         * doc/install.texi: Ditto.
16001         * doc/invoke.texi: Ditto.
16002
16003 2020-01-01  Jan Hubicka  <hubicka@ucw.cz>
16004
16005         * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
16006         summary.
16007
16008 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
16009
16010         PR tree-optimization/93098
16011         * match.pd (popcount): For shift amounts, use integer_onep
16012         or wi::to_widest () == cst instead of tree_to_uhwi () == cst
16013         tests.  Make sure that precision is power of two larger than or equal
16014         to 16.  Ensure shift is never negative.  Use HOST_WIDE_INT_UC macro
16015         instead of ULL suffixed constants.  Formatting fixes.
16016 \f
16017 Copyright (C) 2020 Free Software Foundation, Inc.
16018
16019 Copying and distribution of this file, with or without modification,
16020 are permitted in any medium without royalty provided the copyright
16021 notice and this notice are preserved.